mpt(4): Use MSI on SAS adapters that support it.
[dragonfly.git] / sys / dev / disk / mpt / mpt_pci.c
CommitLineData
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1/*-
2 * PCI specific probe and attach routines for LSI Fusion Adapters
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3 * FreeBSD Version.
4 *
d751f32e 5 * Copyright (c) 2000, 2001 by Greg Ansley
984263bc 6 * Partially derived from Matt Jacob's ISP driver.
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7 * Copyright (c) 1997, 1998, 1999, 2000, 2001, 2002 by Matthew Jacob
8 * Feral Software
9 * All rights reserved.
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10 *
11 * Redistribution and use in source and binary forms, with or without
12 * modification, are permitted provided that the following conditions
13 * are met:
14 * 1. Redistributions of source code must retain the above copyright
15 * notice immediately at the beginning of the file, without modification,
16 * this list of conditions, and the following disclaimer.
17 * 2. The name of the author may not be used to endorse or promote products
18 * derived from this software without specific prior written permission.
19 *
20 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
21 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
22 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
23 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE FOR
24 * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
25 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
26 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
27 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
28 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
29 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
30 * SUCH DAMAGE.
31 */
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32/*-
33 * Copyright (c) 2002, 2006 by Matthew Jacob
34 * All rights reserved.
35 *
36 * Redistribution and use in source and binary forms, with or without
37 * modification, are permitted provided that the following conditions are
38 * met:
39 * 1. Redistributions of source code must retain the above copyright
40 * notice, this list of conditions and the following disclaimer.
41 * 2. Redistributions in binary form must reproduce at minimum a disclaimer
42 * substantially similar to the "NO WARRANTY" disclaimer below
43 * ("Disclaimer") and any redistribution must be conditioned upon including
44 * a substantially similar Disclaimer requirement for further binary
45 * redistribution.
46 * 3. Neither the names of the above listed copyright holders nor the names
47 * of any contributors may be used to endorse or promote products derived
48 * from this software without specific prior written permission.
49 *
50 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
51 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
52 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
53 * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
54 * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
55 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
56 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
57 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
58 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
59 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF THE COPYRIGHT
60 * OWNER OR CONTRIBUTOR IS ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
61 *
62 * Support from Chris Ellsworth in order to make SAS adapters work
63 * is gratefully acknowledged.
64 *
65 * Support from LSI-Logic has also gone a great deal toward making this a
66 * workable subsystem and is gratefully acknowledged.
67 */
984263bc 68/*
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69 * Copyright (c) 2004, Avid Technology, Inc. and its contributors.
70 * Copyright (c) 2005, WHEEL Sp. z o.o.
71 * Copyright (c) 2004, 2005 Justin T. Gibbs
72 * All rights reserved.
73 *
74 * Redistribution and use in source and binary forms, with or without
75 * modification, are permitted provided that the following conditions are
76 * met:
77 * 1. Redistributions of source code must retain the above copyright
78 * notice, this list of conditions and the following disclaimer.
79 * 2. Redistributions in binary form must reproduce at minimum a disclaimer
80 * substantially similar to the "NO WARRANTY" disclaimer below
81 * ("Disclaimer") and any redistribution must be conditioned upon including
82 * a substantially similar Disclaimer requirement for further binary
83 * redistribution.
84 * 3. Neither the names of the above listed copyright holders nor the names
85 * of any contributors may be used to endorse or promote products derived
86 * from this software without specific prior written permission.
87 *
88 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
89 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
90 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
91 * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
92 * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
93 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
94 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
95 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
96 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
97 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF THE COPYRIGHT
98 * OWNER OR CONTRIBUTOR IS ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
32af04f7 99 *
4c42baf4 100 * $FreeBSD: src/sys/dev/mpt/mpt_pci.c,v 1.70 2012/04/04 20:42:45 marius Exp $
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101 */
102
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103#include <dev/disk/mpt/mpt.h>
104#include <dev/disk/mpt/mpt_cam.h>
105#include <dev/disk/mpt/mpt_raid.h>
984263bc 106
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SW
107/*
108 * XXX it seems no other MPT driver knows about the following chips.
109 */
d751f32e 110
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111#ifndef MPI_MANUFACTPAGE_DEVICEID_FC909_FB
112#define MPI_MANUFACTPAGE_DEVICEID_FC909_FB 0x0620
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113#endif
114
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115#ifndef MPI_MANUFACTPAGE_DEVICEID_FC919_LAN_FB
116#define MPI_MANUFACTPAGE_DEVICEID_FC919_LAN_FB 0x0625
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117#endif
118
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119#ifndef MPI_MANUFACTPAGE_DEVICEID_FC929_LAN_FB
120#define MPI_MANUFACTPAGE_DEVICEID_FC929_LAN_FB 0x0623
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121#endif
122
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123#ifndef MPI_MANUFACTPAGE_DEVICEID_FC929X_LAN_FB
124#define MPI_MANUFACTPAGE_DEVICEID_FC929X_LAN_FB 0x0627
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125#endif
126
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127#ifndef MPI_MANUFACTPAGE_DEVICEID_FC919X_LAN_FB
128#define MPI_MANUFACTPAGE_DEVICEID_FC919X_LAN_FB 0x0629
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129#endif
130
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131#ifndef MPI_MANUFACTPAGE_DEVID_SAS1068A_FB
132#define MPI_MANUFACTPAGE_DEVID_SAS1068A_FB 0x0055
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133#endif
134
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135#ifndef MPI_MANUFACTPAGE_DEVID_SAS1068E_FB
136#define MPI_MANUFACTPAGE_DEVID_SAS1068E_FB 0x0059
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137#endif
138
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139#ifndef MPI_MANUFACTPAGE_DEVID_SAS1078DE_FB
140#define MPI_MANUFACTPAGE_DEVID_SAS1078DE_FB 0x007C
d751f32e 141#endif
984263bc 142
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143#ifndef PCIM_CMD_SERRESPEN
144#define PCIM_CMD_SERRESPEN 0x0100
145#endif
146
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147static int mpt_pci_probe(device_t);
148static int mpt_pci_attach(device_t);
149static void mpt_free_bus_resources(struct mpt_softc *mpt);
150static int mpt_pci_detach(device_t);
151static int mpt_pci_shutdown(device_t);
152static int mpt_dma_mem_alloc(struct mpt_softc *mpt);
153static void mpt_dma_mem_free(struct mpt_softc *mpt);
4c42baf4 154#if 0
d751f32e 155static void mpt_read_config_regs(struct mpt_softc *mpt);
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156static void mpt_set_config_regs(struct mpt_softc *mpt);
157#endif
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158static void mpt_pci_intr(void *);
159
160static device_method_t mpt_methods[] = {
161 /* Device interface */
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162 DEVMETHOD(device_probe, mpt_pci_probe),
163 DEVMETHOD(device_attach, mpt_pci_attach),
164 DEVMETHOD(device_detach, mpt_pci_detach),
165 DEVMETHOD(device_shutdown, mpt_pci_shutdown),
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166 { 0, 0 }
167};
168
169static driver_t mpt_driver = {
d751f32e 170 "mpt", mpt_methods, sizeof(struct mpt_softc)
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171};
172static devclass_t mpt_devclass;
aa2b9d05 173DRIVER_MODULE(mpt, pci, mpt_driver, mpt_devclass, NULL, NULL);
d751f32e 174MODULE_DEPEND(mpt, pci, 1, 1, 1);
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175MODULE_VERSION(mpt, 1);
176
984263bc 177static int
d751f32e 178mpt_pci_probe(device_t dev)
984263bc 179{
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180 const char *desc;
181 int rval;
984263bc 182
4c42baf4 183 if (pci_get_vendor(dev) != MPI_MANUFACTPAGE_VENDORID_LSILOGIC)
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184 return (ENXIO);
185
4c42baf4 186 rval = BUS_PROBE_DEFAULT;
a261e0e0 187 switch (pci_get_device(dev)) {
4c42baf4 188 case MPI_MANUFACTPAGE_DEVICEID_FC909_FB:
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189 desc = "LSILogic FC909 FC Adapter";
190 break;
4c42baf4 191 case MPI_MANUFACTPAGE_DEVICEID_FC909:
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192 desc = "LSILogic FC909A FC Adapter";
193 break;
4c42baf4 194 case MPI_MANUFACTPAGE_DEVICEID_FC919:
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195 desc = "LSILogic FC919 FC Adapter";
196 break;
4c42baf4 197 case MPI_MANUFACTPAGE_DEVICEID_FC919_LAN_FB:
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198 desc = "LSILogic FC919 LAN Adapter";
199 break;
4c42baf4 200 case MPI_MANUFACTPAGE_DEVICEID_FC929:
d751f32e 201 desc = "Dual LSILogic FC929 FC Adapter";
984263bc 202 break;
4c42baf4 203 case MPI_MANUFACTPAGE_DEVICEID_FC929_LAN_FB:
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204 desc = "Dual LSILogic FC929 LAN Adapter";
205 break;
4c42baf4 206 case MPI_MANUFACTPAGE_DEVICEID_FC919X:
d751f32e 207 desc = "LSILogic FC919 FC PCI-X Adapter";
d30c73c7 208 break;
4c42baf4 209 case MPI_MANUFACTPAGE_DEVICEID_FC919X_LAN_FB:
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210 desc = "LSILogic FC919 LAN PCI-X Adapter";
211 break;
4c42baf4 212 case MPI_MANUFACTPAGE_DEVICEID_FC929X:
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213 desc = "Dual LSILogic FC929X 2Gb/s FC PCI-X Adapter";
214 break;
4c42baf4 215 case MPI_MANUFACTPAGE_DEVICEID_FC929X_LAN_FB:
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216 desc = "Dual LSILogic FC929X LAN PCI-X Adapter";
217 break;
4c42baf4 218 case MPI_MANUFACTPAGE_DEVICEID_FC949E:
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219 desc = "Dual LSILogic FC7X04X 4Gb/s FC PCI-Express Adapter";
220 break;
4c42baf4 221 case MPI_MANUFACTPAGE_DEVICEID_FC949X:
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222 desc = "Dual LSILogic FC7X04X 4Gb/s FC PCI-X Adapter";
223 break;
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224 case MPI_MANUFACTPAGE_DEVID_53C1030:
225 case MPI_MANUFACTPAGE_DEVID_53C1030ZC:
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226 desc = "LSILogic 1030 Ultra4 Adapter";
227 break;
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228 case MPI_MANUFACTPAGE_DEVID_SAS1068E_FB:
229 /*
230 * Allow mfi(4) to claim this device in case it's in MegaRAID
231 * mode.
232 */
233 rval = BUS_PROBE_LOW_PRIORITY;
234 /* FALLTHROUGH */
235 case MPI_MANUFACTPAGE_DEVID_SAS1064:
236 case MPI_MANUFACTPAGE_DEVID_SAS1064A:
237 case MPI_MANUFACTPAGE_DEVID_SAS1064E:
238 case MPI_MANUFACTPAGE_DEVID_SAS1066:
239 case MPI_MANUFACTPAGE_DEVID_SAS1066E:
240 case MPI_MANUFACTPAGE_DEVID_SAS1068:
241 case MPI_MANUFACTPAGE_DEVID_SAS1068A_FB:
242 case MPI_MANUFACTPAGE_DEVID_SAS1068E:
243 case MPI_MANUFACTPAGE_DEVID_SAS1078:
244 case MPI_MANUFACTPAGE_DEVID_SAS1078DE_FB:
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245 desc = "LSILogic SAS/SATA Adapter";
246 break;
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247 default:
248 return (ENXIO);
249 }
250
251 device_set_desc(dev, desc);
4c42baf4 252 return (rval);
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253}
254
984263bc 255static void
d751f32e 256mpt_set_options(struct mpt_softc *mpt)
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257{
258 int bitmap;
f0731c1e 259 int tval;
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260
261 bitmap = 0;
2545bca0 262 if (kgetenv_int("mpt_disable", &bitmap)) {
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263 if (bitmap & (1 << mpt->unit)) {
264 mpt->disabled = 1;
265 }
266 }
d751f32e 267 bitmap = 0;
2545bca0 268 if (kgetenv_int("mpt_debug", &bitmap)) {
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269 if (bitmap & (1 << mpt->unit)) {
270 mpt->verbose = MPT_PRT_DEBUG;
271 }
272 }
273 bitmap = 0;
2545bca0 274 if (kgetenv_int("mpt_debug1", &bitmap)) {
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275 if (bitmap & (1 << mpt->unit)) {
276 mpt->verbose = MPT_PRT_DEBUG1;
277 }
278 }
279 bitmap = 0;
2545bca0 280 if (kgetenv_int("mpt_debug2", &bitmap)) {
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281 if (bitmap & (1 << mpt->unit)) {
282 mpt->verbose = MPT_PRT_DEBUG2;
283 }
284 }
285 bitmap = 0;
2545bca0 286 if (kgetenv_int("mpt_debug3", &bitmap)) {
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287 if (bitmap & (1 << mpt->unit)) {
288 mpt->verbose = MPT_PRT_DEBUG3;
289 }
290 }
984263bc 291
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292 mpt->cfg_role = MPT_ROLE_DEFAULT;
293 bitmap = 0;
2545bca0 294 if (kgetenv_int("mpt_nil_role", &bitmap)) {
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295 if (bitmap & (1 << mpt->unit)) {
296 mpt->cfg_role = 0;
297 }
298 mpt->do_cfg_role = 1;
299 }
300 bitmap = 0;
2545bca0 301 if (kgetenv_int("mpt_tgt_role", &bitmap)) {
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302 if (bitmap & (1 << mpt->unit)) {
303 mpt->cfg_role |= MPT_ROLE_TARGET;
304 }
305 mpt->do_cfg_role = 1;
306 }
984263bc 307 bitmap = 0;
2545bca0 308 if (kgetenv_int("mpt_ini_role", &bitmap)) {
984263bc 309 if (bitmap & (1 << mpt->unit)) {
d751f32e 310 mpt->cfg_role |= MPT_ROLE_INITIATOR;
984263bc 311 }
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312 mpt->do_cfg_role = 1;
313 }
f0731c1e 314 tval = 0;
d751f32e 315 mpt->msi_enable = 0;
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316 if (mpt->is_sas)
317 mpt->msi_enable = 1;
318 if (kgetenv_int("hw.mpt.msi.enable", &tval))
319 mpt->msi_enable = tval;
d751f32e 320}
d751f32e 321
984263bc 322static void
d751f32e 323mpt_link_peer(struct mpt_softc *mpt)
984263bc 324{
d751f32e 325 struct mpt_softc *mpt2;
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326
327 if (mpt->unit == 0) {
328 return;
329 }
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330 /*
331 * XXX: depends on probe order
332 */
d751f32e 333 mpt2 = (struct mpt_softc *)devclass_get_softc(mpt_devclass,mpt->unit-1);
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334
335 if (mpt2 == NULL) {
336 return;
337 }
338 if (pci_get_vendor(mpt2->dev) != pci_get_vendor(mpt->dev)) {
339 return;
340 }
341 if (pci_get_device(mpt2->dev) != pci_get_device(mpt->dev)) {
342 return;
343 }
344 mpt->mpt2 = mpt2;
345 mpt2->mpt2 = mpt;
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346 if (mpt->verbose >= MPT_PRT_DEBUG) {
347 mpt_prt(mpt, "linking with peer (mpt%d)\n",
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348 device_get_unit(mpt2->dev));
349 }
350}
351
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352static void
353mpt_unlink_peer(struct mpt_softc *mpt)
354{
4c42baf4 355
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356 if (mpt->mpt2) {
357 mpt->mpt2->mpt2 = NULL;
358 }
359}
360
984263bc 361static int
d751f32e 362mpt_pci_attach(device_t dev)
984263bc 363{
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MD
364 struct mpt_softc *mpt;
365 int iqd;
366 uint32_t data, cmd;
6d259fc1 367 int mpt_io_bar, mpt_mem_bar;
f0731c1e 368 u_int irq_flags;
984263bc 369
d751f32e 370 mpt = (struct mpt_softc*)device_get_softc(dev);
4c42baf4 371
a261e0e0 372 switch (pci_get_device(dev)) {
4c42baf4
SW
373 case MPI_MANUFACTPAGE_DEVICEID_FC909_FB:
374 case MPI_MANUFACTPAGE_DEVICEID_FC909:
375 case MPI_MANUFACTPAGE_DEVICEID_FC919:
376 case MPI_MANUFACTPAGE_DEVICEID_FC919_LAN_FB:
377 case MPI_MANUFACTPAGE_DEVICEID_FC929:
378 case MPI_MANUFACTPAGE_DEVICEID_FC929_LAN_FB:
379 case MPI_MANUFACTPAGE_DEVICEID_FC929X:
380 case MPI_MANUFACTPAGE_DEVICEID_FC929X_LAN_FB:
381 case MPI_MANUFACTPAGE_DEVICEID_FC919X:
382 case MPI_MANUFACTPAGE_DEVICEID_FC919X_LAN_FB:
383 case MPI_MANUFACTPAGE_DEVICEID_FC949E:
384 case MPI_MANUFACTPAGE_DEVICEID_FC949X:
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385 mpt->is_fc = 1;
386 break;
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387 case MPI_MANUFACTPAGE_DEVID_SAS1078:
388 case MPI_MANUFACTPAGE_DEVID_SAS1078DE_FB:
389 mpt->is_1078 = 1;
390 /* FALLTHROUGH */
391 case MPI_MANUFACTPAGE_DEVID_SAS1064:
392 case MPI_MANUFACTPAGE_DEVID_SAS1064A:
393 case MPI_MANUFACTPAGE_DEVID_SAS1064E:
394 case MPI_MANUFACTPAGE_DEVID_SAS1066:
395 case MPI_MANUFACTPAGE_DEVID_SAS1066E:
396 case MPI_MANUFACTPAGE_DEVID_SAS1068:
397 case MPI_MANUFACTPAGE_DEVID_SAS1068A_FB:
398 case MPI_MANUFACTPAGE_DEVID_SAS1068E:
399 case MPI_MANUFACTPAGE_DEVID_SAS1068E_FB:
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400 mpt->is_sas = 1;
401 break;
984263bc 402 default:
d751f32e 403 mpt->is_spi = 1;
984263bc
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404 break;
405 }
406 mpt->dev = dev;
407 mpt->unit = device_get_unit(dev);
d751f32e
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408 mpt->raid_resync_rate = MPT_RAID_RESYNC_RATE_DEFAULT;
409 mpt->raid_mwce_setting = MPT_RAID_MWCE_DEFAULT;
410 mpt->raid_queue_depth = MPT_RAID_QUEUE_DEPTH_DEFAULT;
411 mpt->verbose = MPT_PRT_NONE;
412 mpt->role = MPT_ROLE_NONE;
6d259fc1 413 mpt->mpt_ini_id = MPT_INI_ID_NONE;
984263bc 414 mpt_set_options(mpt);
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415 if (mpt->verbose == MPT_PRT_NONE) {
416 mpt->verbose = MPT_PRT_WARN;
417 /* Print INFO level (if any) if bootverbose is set */
418 mpt->verbose += (bootverbose != 0)? 1 : 0;
419 }
984263bc
MD
420 /* Make sure memory access decoders are enabled */
421 cmd = pci_read_config(dev, PCIR_COMMAND, 2);
422 if ((cmd & PCIM_CMD_MEMEN) == 0) {
423 device_printf(dev, "Memory accesses disabled");
d751f32e 424 return (ENXIO);
984263bc
MD
425 }
426
427 /*
428 * Make sure that SERR, PERR, WRITE INVALIDATE and BUSMASTER are set.
429 */
430 cmd |=
431 PCIM_CMD_SERRESPEN | PCIM_CMD_PERRESPEN |
432 PCIM_CMD_BUSMASTEREN | PCIM_CMD_MWRICEN;
433 pci_write_config(dev, PCIR_COMMAND, cmd, 2);
434
435 /*
436 * Make sure we've disabled the ROM.
437 */
438 data = pci_read_config(dev, PCIR_BIOS, 4);
6d259fc1 439 data &= ~PCIM_BIOS_ENABLE;
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440 pci_write_config(dev, PCIR_BIOS, data, 4);
441
984263bc
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442 /*
443 * Is this part a dual?
444 * If so, link with our partner (around yet)
445 */
a261e0e0 446 switch (pci_get_device(dev)) {
4c42baf4
SW
447 case MPI_MANUFACTPAGE_DEVICEID_FC929:
448 case MPI_MANUFACTPAGE_DEVICEID_FC929_LAN_FB:
449 case MPI_MANUFACTPAGE_DEVICEID_FC949E:
450 case MPI_MANUFACTPAGE_DEVICEID_FC949X:
451 case MPI_MANUFACTPAGE_DEVID_53C1030:
452 case MPI_MANUFACTPAGE_DEVID_53C1030ZC:
984263bc 453 mpt_link_peer(mpt);
a261e0e0
SW
454 break;
455 default:
456 break;
984263bc
MD
457 }
458
d751f32e 459 /*
6d259fc1
SW
460 * Figure out which are the I/O and MEM Bars
461 */
462 data = pci_read_config(dev, PCIR_BAR(0), 4);
463 if (PCI_BAR_IO(data)) {
464 /* BAR0 is IO, BAR1 is memory */
465 mpt_io_bar = 0;
466 mpt_mem_bar = 1;
467 } else {
468 /* BAR0 is memory, BAR1 is IO */
469 mpt_mem_bar = 0;
470 mpt_io_bar = 1;
471 }
472
473 /*
d751f32e
MD
474 * Set up register access. PIO mode is required for
475 * certain reset operations (but must be disabled for
476 * some cards otherwise).
477 */
4c42baf4 478 mpt_io_bar = PCIR_BAR(mpt_io_bar);
6d259fc1 479 mpt->pci_pio_reg = bus_alloc_resource_any(dev, SYS_RES_IOPORT,
4c42baf4 480 &mpt_io_bar, RF_ACTIVE);
d751f32e 481 if (mpt->pci_pio_reg == NULL) {
4c42baf4
SW
482 if (bootverbose) {
483 device_printf(dev,
484 "unable to map registers in PIO mode\n");
485 }
486 } else {
487 mpt->pci_pio_st = rman_get_bustag(mpt->pci_pio_reg);
488 mpt->pci_pio_sh = rman_get_bushandle(mpt->pci_pio_reg);
d751f32e 489 }
d751f32e 490
4c42baf4 491 mpt_mem_bar = PCIR_BAR(mpt_mem_bar);
6d259fc1 492 mpt->pci_reg = bus_alloc_resource_any(dev, SYS_RES_MEMORY,
4c42baf4 493 &mpt_mem_bar, RF_ACTIVE);
984263bc 494 if (mpt->pci_reg == NULL) {
4c42baf4
SW
495 if (bootverbose || mpt->is_sas || mpt->pci_pio_reg == NULL) {
496 device_printf(dev,
497 "Unable to memory map registers.\n");
498 }
499 if (mpt->is_sas || mpt->pci_pio_reg == NULL) {
d751f32e
MD
500 device_printf(dev, "Giving Up.\n");
501 goto bad;
502 }
4c42baf4
SW
503 if (bootverbose) {
504 device_printf(dev, "Falling back to PIO mode.\n");
505 }
d751f32e
MD
506 mpt->pci_st = mpt->pci_pio_st;
507 mpt->pci_sh = mpt->pci_pio_sh;
508 } else {
509 mpt->pci_st = rman_get_bustag(mpt->pci_reg);
510 mpt->pci_sh = rman_get_bushandle(mpt->pci_reg);
984263bc 511 }
984263bc
MD
512
513 /* Get a handle to the interrupt */
514 iqd = 0;
9dc47ee5 515#ifdef OLD_MSI
d751f32e
MD
516 if (mpt->msi_enable) {
517 /*
518 * First try to alloc an MSI-X message. If that
519 * fails, then try to alloc an MSI message instead.
520 */
521 if (pci_msix_count(dev) == 1) {
522 mpt->pci_msi_count = 1;
523 if (pci_alloc_msix(dev, &mpt->pci_msi_count) == 0) {
524 iqd = 1;
525 } else {
526 mpt->pci_msi_count = 0;
527 }
528 }
d751f32e 529 }
9dc47ee5 530#endif
f0731c1e
SW
531 mpt->irq_type = pci_alloc_1intr(dev, mpt->msi_enable, &iqd,
532 &irq_flags);
d751f32e 533 mpt->pci_irq = bus_alloc_resource_any(dev, SYS_RES_IRQ, &iqd,
f0731c1e 534 irq_flags);
984263bc
MD
535 if (mpt->pci_irq == NULL) {
536 device_printf(dev, "could not allocate interrupt\n");
537 goto bad;
538 }
539
984263bc
MD
540 MPT_LOCK_SETUP(mpt);
541
542 /* Disable interrupts at the part */
543 mpt_disable_ints(mpt);
544
d751f32e 545 /* Register the interrupt handler */
3592c6a6 546 if (mpt_setup_intr(dev, mpt->pci_irq, MPT_IFLAGS, NULL, mpt_pci_intr,
d751f32e
MD
547 mpt, &mpt->ih)) {
548 device_printf(dev, "could not setup interrupt\n");
549 goto bad;
550 }
551
984263bc
MD
552 /* Allocate dma memory */
553 if (mpt_dma_mem_alloc(mpt)) {
d751f32e 554 mpt_prt(mpt, "Could not allocate DMA memory\n");
984263bc
MD
555 goto bad;
556 }
557
4c42baf4 558#if 0
984263bc
MD
559 /*
560 * Save the PCI config register values
561 *
562 * Hard resets are known to screw up the BAR for diagnostic
563 * memory accesses (Mem1).
564 *
6d259fc1 565 * Using Mem1 is known to make the chip stop responding to
984263bc
MD
566 * configuration space transfers, so we need to save it now
567 */
568
569 mpt_read_config_regs(mpt);
4c42baf4 570#endif
984263bc 571
d751f32e
MD
572 /*
573 * Disable PIO until we need it
574 */
575 if (mpt->is_sas) {
576 pci_disable_io(dev, SYS_RES_IOPORT);
577 }
578
984263bc
MD
579 /* Initialize the hardware */
580 if (mpt->disabled == 0) {
d751f32e 581 if (mpt_attach(mpt) != 0) {
984263bc
MD
582 goto bad;
583 }
d751f32e
MD
584 } else {
585 mpt_prt(mpt, "device disabled at user request\n");
586 goto bad;
984263bc
MD
587 }
588
d751f32e
MD
589 mpt->eh = EVENTHANDLER_REGISTER(shutdown_post_sync, mpt_pci_shutdown,
590 dev, SHUTDOWN_PRI_DEFAULT);
591
592 if (mpt->eh == NULL) {
593 mpt_prt(mpt, "shutdown event registration failed\n");
594 (void) mpt_detach(mpt);
595 goto bad;
596 }
984263bc
MD
597 return (0);
598
599bad:
600 mpt_dma_mem_free(mpt);
601 mpt_free_bus_resources(mpt);
d751f32e
MD
602 mpt_unlink_peer(mpt);
603
604 MPT_LOCK_DESTROY(mpt);
984263bc
MD
605
606 /*
607 * but return zero to preserve unit numbering
608 */
609 return (0);
610}
611
612/*
613 * Free bus resources
614 */
615static void
d751f32e 616mpt_free_bus_resources(struct mpt_softc *mpt)
984263bc 617{
4c42baf4 618
984263bc
MD
619 if (mpt->ih) {
620 bus_teardown_intr(mpt->dev, mpt->pci_irq, mpt->ih);
4c42baf4 621 mpt->ih = NULL;
984263bc
MD
622 }
623
624 if (mpt->pci_irq) {
d751f32e 625 bus_release_resource(mpt->dev, SYS_RES_IRQ,
4c42baf4
SW
626 rman_get_rid(mpt->pci_irq), mpt->pci_irq);
627 mpt->pci_irq = NULL;
984263bc
MD
628 }
629
f0731c1e 630 if (mpt->irq_type == PCI_INTR_TYPE_MSI)
d751f32e 631 pci_release_msi(mpt->dev);
d751f32e
MD
632
633 if (mpt->pci_pio_reg) {
4c42baf4
SW
634 bus_release_resource(mpt->dev, SYS_RES_IOPORT,
635 rman_get_rid(mpt->pci_pio_reg), mpt->pci_pio_reg);
636 mpt->pci_pio_reg = NULL;
d751f32e 637 }
984263bc 638 if (mpt->pci_reg) {
4c42baf4
SW
639 bus_release_resource(mpt->dev, SYS_RES_MEMORY,
640 rman_get_rid(mpt->pci_reg), mpt->pci_reg);
641 mpt->pci_reg = NULL;
984263bc
MD
642 }
643 MPT_LOCK_DESTROY(mpt);
644}
645
984263bc
MD
646/*
647 * Disconnect ourselves from the system.
648 */
649static int
d751f32e 650mpt_pci_detach(device_t dev)
984263bc 651{
d751f32e 652 struct mpt_softc *mpt;
984263bc 653
d751f32e 654 mpt = (struct mpt_softc*)device_get_softc(dev);
984263bc
MD
655
656 if (mpt) {
657 mpt_disable_ints(mpt);
d751f32e
MD
658 mpt_detach(mpt);
659 mpt_reset(mpt, /*reinit*/FALSE);
984263bc
MD
660 mpt_dma_mem_free(mpt);
661 mpt_free_bus_resources(mpt);
d751f32e
MD
662 mpt_raid_free_mem(mpt);
663 if (mpt->eh != NULL) {
664 EVENTHANDLER_DEREGISTER(shutdown_post_sync, mpt->eh);
665 }
984263bc
MD
666 }
667 return(0);
668}
669
984263bc
MD
670/*
671 * Disable the hardware
672 */
673static int
d751f32e 674mpt_pci_shutdown(device_t dev)
984263bc 675{
d751f32e 676 struct mpt_softc *mpt;
984263bc 677
d751f32e 678 mpt = (struct mpt_softc *)device_get_softc(dev);
984263bc 679 if (mpt) {
d751f32e
MD
680 int r;
681 r = mpt_shutdown(mpt);
682 return (r);
984263bc
MD
683 }
684 return(0);
685}
686
984263bc 687static int
d751f32e 688mpt_dma_mem_alloc(struct mpt_softc *mpt)
984263bc 689{
984263bc 690 size_t len;
d751f32e 691 struct mpt_map_info mi;
984263bc
MD
692
693 /* Check if we alreay have allocated the reply memory */
3641b7ca 694 if (mpt->reply_phys != 0) {
984263bc
MD
695 return 0;
696 }
697
d751f32e 698 len = sizeof (request_t) * MPT_MAX_REQUESTS(mpt);
2545bca0 699 mpt->request_pool = (request_t *)kmalloc(len, M_DEVBUF, M_WAITOK|M_ZERO);
d751f32e
MD
700 if (mpt->request_pool == NULL) {
701 mpt_prt(mpt, "cannot allocate request pool\n");
702 return (1);
703 }
984263bc
MD
704
705 /*
d751f32e 706 * Create a parent dma tag for this device.
984263bc 707 *
d751f32e
MD
708 * Align at byte boundaries,
709 * Limit to 32-bit addressing for request/reply queues.
984263bc 710 */
6d259fc1 711 if (mpt_dma_tag_create(mpt, /*parent*/NULL,
d751f32e
MD
712 /*alignment*/1, /*boundary*/0, /*lowaddr*/BUS_SPACE_MAXADDR,
713 /*highaddr*/BUS_SPACE_MAXADDR, /*filter*/NULL, /*filterarg*/NULL,
714 /*maxsize*/BUS_SPACE_MAXSIZE_32BIT,
6d259fc1
SW
715 /*nsegments*/BUS_SPACE_UNRESTRICTED,
716 /*maxsegsz*/BUS_SPACE_MAXSIZE_32BIT, /*flags*/0,
984263bc 717 &mpt->parent_dmat) != 0) {
d751f32e 718 mpt_prt(mpt, "cannot create parent dma tag\n");
984263bc
MD
719 return (1);
720 }
721
722 /* Create a child tag for reply buffers */
d751f32e
MD
723 if (mpt_dma_tag_create(mpt, mpt->parent_dmat, PAGE_SIZE, 0,
724 BUS_SPACE_MAXADDR_32BIT, BUS_SPACE_MAXADDR,
725 NULL, NULL, 2 * PAGE_SIZE, 1, BUS_SPACE_MAXSIZE_32BIT, 0,
984263bc 726 &mpt->reply_dmat) != 0) {
d751f32e 727 mpt_prt(mpt, "cannot create a dma tag for replies\n");
984263bc
MD
728 return (1);
729 }
730
6d259fc1 731 /* Allocate some DMA accessible memory for replies */
984263bc
MD
732 if (bus_dmamem_alloc(mpt->reply_dmat, (void **)&mpt->reply,
733 BUS_DMA_NOWAIT, &mpt->reply_dmap) != 0) {
d751f32e
MD
734 mpt_prt(mpt, "cannot allocate %lu bytes of reply memory\n",
735 (u_long) (2 * PAGE_SIZE));
984263bc
MD
736 return (1);
737 }
738
d751f32e
MD
739 mi.mpt = mpt;
740 mi.error = 0;
984263bc
MD
741
742 /* Load and lock it into "bus space" */
743 bus_dmamap_load(mpt->reply_dmat, mpt->reply_dmap, mpt->reply,
d751f32e 744 2 * PAGE_SIZE, mpt_map_rquest, &mi, 0);
984263bc 745
d751f32e
MD
746 if (mi.error) {
747 mpt_prt(mpt, "error %d loading dma map for DMA reply queue\n",
748 mi.error);
984263bc
MD
749 return (1);
750 }
d751f32e 751 mpt->reply_phys = mi.phys;
984263bc 752
984263bc
MD
753 return (0);
754}
755
6d259fc1 756/* Deallocate memory that was allocated by mpt_dma_mem_alloc
984263bc
MD
757 */
758static void
d751f32e 759mpt_dma_mem_free(struct mpt_softc *mpt)
984263bc 760{
984263bc
MD
761
762 /* Make sure we aren't double destroying */
763 if (mpt->reply_dmat == 0) {
d751f32e 764 mpt_lprt(mpt, MPT_PRT_DEBUG, "already released dma memory\n");
984263bc
MD
765 return;
766 }
6d259fc1 767
984263bc
MD
768 bus_dmamap_unload(mpt->reply_dmat, mpt->reply_dmap);
769 bus_dmamem_free(mpt->reply_dmat, mpt->reply, mpt->reply_dmap);
770 bus_dma_tag_destroy(mpt->reply_dmat);
771 bus_dma_tag_destroy(mpt->parent_dmat);
4c42baf4 772 mpt->reply_dmat = NULL;
2545bca0 773 kfree(mpt->request_pool, M_DEVBUF);
4c42baf4 774 mpt->request_pool = NULL;
984263bc
MD
775}
776
4c42baf4 777#if 0
984263bc
MD
778/* Reads modifiable (via PCI transactions) config registers */
779static void
d751f32e 780mpt_read_config_regs(struct mpt_softc *mpt)
984263bc 781{
4c42baf4 782
984263bc
MD
783 mpt->pci_cfg.Command = pci_read_config(mpt->dev, PCIR_COMMAND, 2);
784 mpt->pci_cfg.LatencyTimer_LineSize =
785 pci_read_config(mpt->dev, PCIR_CACHELNSZ, 2);
d751f32e
MD
786 mpt->pci_cfg.IO_BAR = pci_read_config(mpt->dev, PCIR_BAR(0), 4);
787 mpt->pci_cfg.Mem0_BAR[0] = pci_read_config(mpt->dev, PCIR_BAR(1), 4);
788 mpt->pci_cfg.Mem0_BAR[1] = pci_read_config(mpt->dev, PCIR_BAR(2), 4);
789 mpt->pci_cfg.Mem1_BAR[0] = pci_read_config(mpt->dev, PCIR_BAR(3), 4);
790 mpt->pci_cfg.Mem1_BAR[1] = pci_read_config(mpt->dev, PCIR_BAR(4), 4);
984263bc
MD
791 mpt->pci_cfg.ROM_BAR = pci_read_config(mpt->dev, PCIR_BIOS, 4);
792 mpt->pci_cfg.IntLine = pci_read_config(mpt->dev, PCIR_INTLINE, 1);
793 mpt->pci_cfg.PMCSR = pci_read_config(mpt->dev, 0x44, 4);
794}
795
796/* Sets modifiable config registers */
4c42baf4 797static void
d751f32e 798mpt_set_config_regs(struct mpt_softc *mpt)
984263bc 799{
d751f32e 800 uint32_t val;
984263bc
MD
801
802#define MPT_CHECK(reg, offset, size) \
803 val = pci_read_config(mpt->dev, offset, size); \
804 if (mpt->pci_cfg.reg != val) { \
d751f32e 805 mpt_prt(mpt, \
984263bc
MD
806 "Restoring " #reg " to 0x%X from 0x%X\n", \
807 mpt->pci_cfg.reg, val); \
808 }
809
d751f32e 810 if (mpt->verbose >= MPT_PRT_DEBUG) {
984263bc
MD
811 MPT_CHECK(Command, PCIR_COMMAND, 2);
812 MPT_CHECK(LatencyTimer_LineSize, PCIR_CACHELNSZ, 2);
d751f32e
MD
813 MPT_CHECK(IO_BAR, PCIR_BAR(0), 4);
814 MPT_CHECK(Mem0_BAR[0], PCIR_BAR(1), 4);
815 MPT_CHECK(Mem0_BAR[1], PCIR_BAR(2), 4);
816 MPT_CHECK(Mem1_BAR[0], PCIR_BAR(3), 4);
817 MPT_CHECK(Mem1_BAR[1], PCIR_BAR(4), 4);
984263bc
MD
818 MPT_CHECK(ROM_BAR, PCIR_BIOS, 4);
819 MPT_CHECK(IntLine, PCIR_INTLINE, 1);
820 MPT_CHECK(PMCSR, 0x44, 4);
821 }
822#undef MPT_CHECK
823
824 pci_write_config(mpt->dev, PCIR_COMMAND, mpt->pci_cfg.Command, 2);
825 pci_write_config(mpt->dev, PCIR_CACHELNSZ,
826 mpt->pci_cfg.LatencyTimer_LineSize, 2);
d751f32e
MD
827 pci_write_config(mpt->dev, PCIR_BAR(0), mpt->pci_cfg.IO_BAR, 4);
828 pci_write_config(mpt->dev, PCIR_BAR(1), mpt->pci_cfg.Mem0_BAR[0], 4);
829 pci_write_config(mpt->dev, PCIR_BAR(2), mpt->pci_cfg.Mem0_BAR[1], 4);
830 pci_write_config(mpt->dev, PCIR_BAR(3), mpt->pci_cfg.Mem1_BAR[0], 4);
831 pci_write_config(mpt->dev, PCIR_BAR(4), mpt->pci_cfg.Mem1_BAR[1], 4);
984263bc
MD
832 pci_write_config(mpt->dev, PCIR_BIOS, mpt->pci_cfg.ROM_BAR, 4);
833 pci_write_config(mpt->dev, PCIR_INTLINE, mpt->pci_cfg.IntLine, 1);
834 pci_write_config(mpt->dev, 0x44, mpt->pci_cfg.PMCSR, 4);
835}
4c42baf4 836#endif
984263bc
MD
837
838static void
839mpt_pci_intr(void *arg)
840{
d751f32e
MD
841 struct mpt_softc *mpt;
842
843 mpt = (struct mpt_softc *)arg;
984263bc 844 MPT_LOCK(mpt);
d751f32e 845 mpt_intr(mpt);
984263bc
MD
846 MPT_UNLOCK(mpt);
847}