[dragonfly.git] / sys / dev / netif / wl / if_wl_i82586.h

/* 
 * Mach Operating System
 * Copyright (c) 1991,1990,1989 Carnegie Mellon University
 * All Rights Reserved.
 * 
 * Permission to use, copy, modify and distribute this software and its
 * documentation is hereby granted, provided that both the copyright
 * notice and this permission notice appear in all copies of the
 * software, derivative works or modified versions, and any portions
 * thereof, and that both notices appear in supporting documentation.
 * 
 * CARNEGIE MELLON ALLOWS FREE USE OF THIS SOFTWARE IN ITS "AS IS"
 * CONDITION.  CARNEGIE MELLON DISCLAIMS ANY LIABILITY OF ANY KIND FOR
 * ANY DAMAGES WHATSOEVER RESULTING FROM THE USE OF THIS SOFTWARE.
 * 
 * Carnegie Mellon requests users of this software to return to
 * 
 *  Software Distribution Coordinator  or  Software.Distribution@CS.CMU.EDU
 *  School of Computer Science
 *  Carnegie Mellon University
 *  Pittsburgh PA 15213-3890
 * 
 * any improvements or extensions that they make and grant Carnegie Mellon
 * the rights to redistribute these changes.
 *
 * $FreeBSD: src/sys/i386/isa/ic/if_wl_i82586.h,v 1.1.10.1 2000/08/03 01:01:25 peter Exp $
 * $DragonFly: src/sys/dev/netif/wl/if_wl_i82586.h,v 1.2 2003/06/17 04:28:37 dillon Exp $
 */
/*
  Copyright 1988, 1989 by Olivetti Advanced Technology Center, Inc.,
Cupertino, California.

		All Rights Reserved

  Permission to use, copy, modify, and distribute this software and
its documentation for any purpose and without fee is hereby
granted, provided that the above copyright notice appears in all
copies and that both the copyright notice and this permission notice
appear in supporting documentation, and that the name of Olivetti
not be used in advertising or publicity pertaining to distribution
of the software without specific, written prior permission.

  OLIVETTI DISCLAIMS ALL WARRANTIES WITH REGARD TO THIS SOFTWARE
INCLUDING ALL IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS,
IN NO EVENT SHALL OLIVETTI BE LIABLE FOR ANY SPECIAL, INDIRECT, OR
CONSEQUENTIAL DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM
LOSS OF USE, DATA OR PROFITS, WHETHER IN ACTION OF CONTRACT,
NEGLIGENCE, OR OTHER TORTIOUS ACTION, ARISING OUR OF OR IN CONNECTION
WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
*/

/*
 * Defines for managing the status word of the 82586 cpu.  For details see
 * the Intel LAN Component User's Manual starting at p. 2-14.
 *
 */

#define SCB_SW_INT	0xf000
#define SCB_SW_CX	0x8000		/* CU finished w/ int. bit set */
#define SCB_SW_FR	0x4000		/* RU finished receiving a frame */
#define SCB_SW_CNA	0x2000		/* CU left active state */
#define SCB_SW_RNR	0x1000		/* RU left ready state */

/* 
 * Defines for managing the Command Unit Status portion of the 82586
 * System Control Block.
 *
 */

#define SCB_CUS_IDLE	0x0000
#define SCB_CUS_SUSPND	0x0100
#define SCB_CUS_ACTV	0x0200

/* 
 * Defines for managing the Receive Unit Status portion of the System
 * Control Block.
 *
 */

#define SCB_RUS_IDLE	0x0000
#define SCB_RUS_SUSPND	0x0010
#define SCB_RUS_NORESRC 0x0020
#define SCB_RUS_READY	0x0040

/*
 * Defines that manage portions of the Command Word in the System Control
 * Block of the 82586.  Below are the Interrupt Acknowledge Bits and their
 * appropriate masks.
 *
 */

#define SCB_ACK_CX	0x8000
#define SCB_ACK_FR	0x4000
#define SCB_ACK_CNA	0x2000
#define SCB_ACK_RNR	0x1000

/* 
 * Defines for managing the Command Unit Control word, and the Receive
 * Unit Control word.  The software RESET bit is also defined.
 *
 */

#define SCB_CU_STRT	0x0100
#define SCB_CU_RSUM	0x0200
#define SCB_CU_SUSPND	0x0300
#define SCB_CU_ABRT	0x0400

#define SCB_RESET	0x0080

#define SCB_RU_STRT	0x0010
#define SCB_RU_RSUM	0x0020
#define SCB_RU_SUSPND	0x0030
#define SCB_RU_ABRT	0x0040


/*
 * The following define Action Commands for the 82586 chip.
 *
 */

#define	AC_NOP		0x00
#define AC_IASETUP	0x01
#define AC_CONFIGURE	0x02
#define AC_MCSETUP	0x03
#define AC_TRANSMIT	0x04
#define AC_TDR		0x05
#define AC_DUMP		0x06
#define AC_DIAGNOSE	0x07


/*
 * Defines for General Format for Action Commands, both Status Words, and
 * Command Words.
 *
 */

#define AC_SW_C		0x8000
#define AC_SW_B		0x4000
#define AC_SW_OK	0x2000
#define AC_SW_A		0x1000
#define TC_CARRIER	0x0400
#define TC_CLS		0x0200
#define TC_DMA		0x0100
#define TC_DEFER	0x0080
#define TC_SQE		0x0040
#define TC_COLLISION	0x0020
#define	AC_CW_EL	0x8000
#define AC_CW_S		0x4000
#define AC_CW_I		0x2000

/*
 * Specific defines for the transmit action command.
 *
 */

#define TBD_SW_EOF	0x8000
#define TBD_SW_COUNT	0x3fff

/*
 * Specific defines for the receive frame actions.
 *
 */

#define RBD_SW_EOF	0x8000
#define RBD_SW_COUNT	0x3fff

#define RFD_DONE	0x8000
#define RFD_BUSY	0x4000
#define RFD_OK		0x2000
#define RFD_CRC		0x0800
#define RFD_ALN		0x0400
#define RFD_RSC		0x0200
#define RFD_DMA		0x0100
#define RFD_SHORT	0x0080
#define RFD_EOF		0x0040
#define RFD_EL		0x8000
#define RFD_SUSP	0x4000
/*
 * 82586 chip specific structure definitions.  For details, see the Intel
 * LAN Components manual.
 *
 */


typedef	struct	{
	u_short	scp_sysbus;
	u_short	scp_unused[2];
	u_short	scp_iscp;
	u_short	scp_iscp_base;
} scp_t;


typedef	struct	{
	u_short	iscp_busy;
	u_short	iscp_scb_offset;
	u_short	iscp_scb;
	u_short	iscp_scb_base;
} iscp_t;


typedef struct	{
	u_short	scb_status;
	u_short	scb_command;
	u_short	scb_cbl_offset;
	u_short	scb_rfa_offset;
	u_short	scb_crcerrs;
	u_short	scb_alnerrs;
	u_short	scb_rscerrs;
	u_short	scb_ovrnerrs;
} scb_t;


typedef	struct	{
	u_short	tbd_offset;
	u_char	dest_addr[6];
	u_short	length;
} transmit_t;


typedef	struct	{
	u_short	fifolim_bytecnt;
	u_short	addrlen_mode;
	u_short	linprio_interframe;
	u_short	slot_time;
	u_short	hardware;
	u_short	min_frame_len;
} configure_t;


typedef	struct	{
	u_short	ac_status;
	u_short	ac_command;
	u_short	ac_link_offset;
	union	{
		transmit_t	transmit;
		configure_t	configure;
		u_char		iasetup[6];
	} cmd;
} ac_t;
	

typedef	struct	{
	u_short	act_count;
	u_short	next_tbd_offset;
	u_short	buffer_addr;
	u_short	buffer_base;
} tbd_t;


typedef	struct	{
	u_short	status;
	u_short	command;
	u_short	link_offset;
	u_short	rbd_offset;
	u_char	destination[6];
	u_char	source[6];
	u_short	length;
} fd_t;


typedef	struct	{
	u_short	status;
	u_short	next_rbd_offset;
	u_short	buffer_addr;
	u_short	buffer_base;
	u_short	size;
} rbd_t;
Commit	Line	Data
984263bc MD	1	/*
	2	* Mach Operating System
	3	* Copyright (c) 1991,1990,1989 Carnegie Mellon University
	4	* All Rights Reserved.
	5	*
	6	* Permission to use, copy, modify and distribute this software and its
	7	* documentation is hereby granted, provided that both the copyright
	8	* notice and this permission notice appear in all copies of the
	9	* software, derivative works or modified versions, and any portions
	10	* thereof, and that both notices appear in supporting documentation.
	11	*
	12	* CARNEGIE MELLON ALLOWS FREE USE OF THIS SOFTWARE IN ITS "AS IS"
	13	* CONDITION. CARNEGIE MELLON DISCLAIMS ANY LIABILITY OF ANY KIND FOR
	14	* ANY DAMAGES WHATSOEVER RESULTING FROM THE USE OF THIS SOFTWARE.
	15	*
	16	* Carnegie Mellon requests users of this software to return to
	17	*
	18	* Software Distribution Coordinator or Software.Distribution@CS.CMU.EDU
	19	* School of Computer Science
	20	* Carnegie Mellon University
	21	* Pittsburgh PA 15213-3890
	22	*
	23	* any improvements or extensions that they make and grant Carnegie Mellon
	24	* the rights to redistribute these changes.
	25	*
	26	* $FreeBSD: src/sys/i386/isa/ic/if_wl_i82586.h,v 1.1.10.1 2000/08/03 01:01:25 peter Exp $
1de703da	27	* $DragonFly: src/sys/dev/netif/wl/if_wl_i82586.h,v 1.2 2003/06/17 04:28:37 dillon Exp $
984263bc MD	28	*/
	29	/*
	30	Copyright 1988, 1989 by Olivetti Advanced Technology Center, Inc.,
	31	Cupertino, California.
	32
	33	All Rights Reserved
	34
	35	Permission to use, copy, modify, and distribute this software and
	36	its documentation for any purpose and without fee is hereby
	37	granted, provided that the above copyright notice appears in all
	38	copies and that both the copyright notice and this permission notice
	39	appear in supporting documentation, and that the name of Olivetti
	40	not be used in advertising or publicity pertaining to distribution
	41	of the software without specific, written prior permission.
	42
	43	OLIVETTI DISCLAIMS ALL WARRANTIES WITH REGARD TO THIS SOFTWARE
	44	INCLUDING ALL IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS,
	45	IN NO EVENT SHALL OLIVETTI BE LIABLE FOR ANY SPECIAL, INDIRECT, OR
	46	CONSEQUENTIAL DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM
	47	LOSS OF USE, DATA OR PROFITS, WHETHER IN ACTION OF CONTRACT,
	48	NEGLIGENCE, OR OTHER TORTIOUS ACTION, ARISING OUR OF OR IN CONNECTION
	49	WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
	50	*/
	51
	52	/*
	53	* Defines for managing the status word of the 82586 cpu. For details see
	54	* the Intel LAN Component User's Manual starting at p. 2-14.
	55	*
	56	*/
	57
	58	#define SCB_SW_INT 0xf000
	59	#define SCB_SW_CX 0x8000 /* CU finished w/ int. bit set */
	60	#define SCB_SW_FR 0x4000 /* RU finished receiving a frame */
	61	#define SCB_SW_CNA 0x2000 /* CU left active state */
	62	#define SCB_SW_RNR 0x1000 /* RU left ready state */
	63
	64	/*
	65	* Defines for managing the Command Unit Status portion of the 82586
	66	* System Control Block.
	67	*
	68	*/
	69
	70	#define SCB_CUS_IDLE 0x0000
	71	#define SCB_CUS_SUSPND 0x0100
	72	#define SCB_CUS_ACTV 0x0200
	73
	74	/*
	75	* Defines for managing the Receive Unit Status portion of the System
	76	* Control Block.
	77	*
	78	*/
	79
	80	#define SCB_RUS_IDLE 0x0000
	81	#define SCB_RUS_SUSPND 0x0010
	82	#define SCB_RUS_NORESRC 0x0020
	83	#define SCB_RUS_READY 0x0040
	84
	85	/*
	86	* Defines that manage portions of the Command Word in the System Control
	87	* Block of the 82586. Below are the Interrupt Acknowledge Bits and their
	88	* appropriate masks.
	89	*
	90	*/
	91
92	#define SCB_ACK_CX 0x8000
93	#define SCB_ACK_FR 0x4000
94	#define SCB_ACK_CNA 0x2000
95	#define SCB_ACK_RNR 0x1000
96
97	/*
98	* Defines for managing the Command Unit Control word, and the Receive
99	* Unit Control word. The software RESET bit is also defined.
100	*
101	*/
102
103	#define SCB_CU_STRT 0x0100
104	#define SCB_CU_RSUM 0x0200
105	#define SCB_CU_SUSPND 0x0300
106	#define SCB_CU_ABRT 0x0400
107
108	#define SCB_RESET 0x0080
109
110	#define SCB_RU_STRT 0x0010
111	#define SCB_RU_RSUM 0x0020
112	#define SCB_RU_SUSPND 0x0030
113	#define SCB_RU_ABRT 0x0040
114
115
116	/*
117	* The following define Action Commands for the 82586 chip.
118	*
119	*/
120
121	#define AC_NOP 0x00
122	#define AC_IASETUP 0x01
123	#define AC_CONFIGURE 0x02
124	#define AC_MCSETUP 0x03
125	#define AC_TRANSMIT 0x04
126	#define AC_TDR 0x05
127	#define AC_DUMP 0x06
128	#define AC_DIAGNOSE 0x07
129
130
131	/*
132	* Defines for General Format for Action Commands, both Status Words, and
133	* Command Words.
134	*
135	*/
136
137	#define AC_SW_C 0x8000
138	#define AC_SW_B 0x4000
139	#define AC_SW_OK 0x2000
140	#define AC_SW_A 0x1000
141	#define TC_CARRIER 0x0400
142	#define TC_CLS 0x0200
143	#define TC_DMA 0x0100
144	#define TC_DEFER 0x0080
145	#define TC_SQE 0x0040
146	#define TC_COLLISION 0x0020
147	#define AC_CW_EL 0x8000
148	#define AC_CW_S 0x4000
149	#define AC_CW_I 0x2000
150
151	/*
152	* Specific defines for the transmit action command.
153	*
154	*/
155
156	#define TBD_SW_EOF 0x8000
157	#define TBD_SW_COUNT 0x3fff
158
159	/*
160	* Specific defines for the receive frame actions.
161	*
162	*/
163
164	#define RBD_SW_EOF 0x8000
165	#define RBD_SW_COUNT 0x3fff
166
167	#define RFD_DONE 0x8000
168	#define RFD_BUSY 0x4000
169	#define RFD_OK 0x2000
170	#define RFD_CRC 0x0800
171	#define RFD_ALN 0x0400
172	#define RFD_RSC 0x0200
173	#define RFD_DMA 0x0100
174	#define RFD_SHORT 0x0080
175	#define RFD_EOF 0x0040
176	#define RFD_EL 0x8000
177	#define RFD_SUSP 0x4000
178	/*
179	* 82586 chip specific structure definitions. For details, see the Intel
180	* LAN Components manual.
181	*
182	*/
183
184
185	typedef struct {
186	u_short scp_sysbus;
187	u_short scp_unused[2];
188	u_short scp_iscp;
189	u_short scp_iscp_base;
190	} scp_t;
191
192
193	typedef struct {
194	u_short iscp_busy;
195	u_short iscp_scb_offset;
196	u_short iscp_scb;
197	u_short iscp_scb_base;
198	} iscp_t;
199
200
201	typedef struct {
202	u_short scb_status;
203	u_short scb_command;
204	u_short scb_cbl_offset;
205	u_short scb_rfa_offset;
206	u_short scb_crcerrs;
207	u_short scb_alnerrs;
208	u_short scb_rscerrs;
209	u_short scb_ovrnerrs;
210	} scb_t;
211
212
213	typedef struct {
214	u_short tbd_offset;
215	u_char dest_addr[6];
216	u_short length;
217	} transmit_t;
218
219
220	typedef struct {
221	u_short fifolim_bytecnt;
222	u_short addrlen_mode;
223	u_short linprio_interframe;
224	u_short slot_time;
225	u_short hardware;
226	u_short min_frame_len;
227	} configure_t;
228
229
230	typedef struct {
231	u_short ac_status;
232	u_short ac_command;
233	u_short ac_link_offset;
234	union {
235	transmit_t transmit;
236	configure_t configure;
237	u_char iasetup[6];
238	} cmd;
239	} ac_t;
240
241
242	typedef struct {
243	u_short act_count;
244	u_short next_tbd_offset;
245	u_short buffer_addr;
246	u_short buffer_base;
247	} tbd_t;
248
249
250	typedef struct {
251	u_short status;
252	u_short command;
253	u_short link_offset;
254	u_short rbd_offset;
255	u_char destination[6];
256	u_char source[6];
257	u_short length;
258	} fd_t;
259
260
261	typedef struct {
262	u_short status;
263	u_short next_rbd_offset;
264	u_short buffer_addr;
265	u_short buffer_base;
266	u_short size;
267	} rbd_t;