sendfile() was seriously broken. It was calling vm_page_free() without
[dragonfly.git] / sys / platform / pc32 / i386 / machdep.c
CommitLineData
984263bc
MD
1/*-
2 * Copyright (c) 1992 Terrence R. Lambert.
3 * Copyright (c) 1982, 1987, 1990 The Regents of the University of California.
4 * All rights reserved.
5 *
6 * This code is derived from software contributed to Berkeley by
7 * William Jolitz.
8 *
9 * Redistribution and use in source and binary forms, with or without
10 * modification, are permitted provided that the following conditions
11 * are met:
12 * 1. Redistributions of source code must retain the above copyright
13 * notice, this list of conditions and the following disclaimer.
14 * 2. Redistributions in binary form must reproduce the above copyright
15 * notice, this list of conditions and the following disclaimer in the
16 * documentation and/or other materials provided with the distribution.
17 * 3. All advertising materials mentioning features or use of this software
18 * must display the following acknowledgement:
19 * This product includes software developed by the University of
20 * California, Berkeley and its contributors.
21 * 4. Neither the name of the University nor the names of its contributors
22 * may be used to endorse or promote products derived from this software
23 * without specific prior written permission.
24 *
25 * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
26 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
27 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
28 * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
29 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
30 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
31 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
32 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
33 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
34 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
35 * SUCH DAMAGE.
36 *
37 * from: @(#)machdep.c 7.4 (Berkeley) 6/3/91
38 * $FreeBSD: src/sys/i386/i386/machdep.c,v 1.385.2.30 2003/05/31 08:48:05 alc Exp $
28abdbbb 39 * $DragonFly: src/sys/platform/pc32/i386/machdep.c,v 1.67 2004/10/25 13:48:42 simokawa Exp $
984263bc
MD
40 */
41
1f2de5d4
MD
42#include "use_apm.h"
43#include "use_ether.h"
44#include "use_npx.h"
45#include "use_isa.h"
984263bc
MD
46#include "opt_atalk.h"
47#include "opt_compat.h"
48#include "opt_cpu.h"
49#include "opt_ddb.h"
50#include "opt_directio.h"
51#include "opt_inet.h"
52#include "opt_ipx.h"
53#include "opt_maxmem.h"
54#include "opt_msgbuf.h"
55#include "opt_perfmon.h"
56#include "opt_swap.h"
984263bc
MD
57#include "opt_userconfig.h"
58
59#include <sys/param.h>
60#include <sys/systm.h>
61#include <sys/sysproto.h>
62#include <sys/signalvar.h>
63#include <sys/kernel.h>
64#include <sys/linker.h>
65#include <sys/malloc.h>
66#include <sys/proc.h>
67#include <sys/buf.h>
68#include <sys/reboot.h>
984263bc
MD
69#include <sys/mbuf.h>
70#include <sys/msgbuf.h>
71#include <sys/sysent.h>
72#include <sys/sysctl.h>
73#include <sys/vmmeter.h>
74#include <sys/bus.h>
a722be49 75#include <sys/upcall.h>
984263bc
MD
76
77#include <vm/vm.h>
78#include <vm/vm_param.h>
79#include <sys/lock.h>
80#include <vm/vm_kern.h>
81#include <vm/vm_object.h>
82#include <vm/vm_page.h>
83#include <vm/vm_map.h>
84#include <vm/vm_pager.h>
85#include <vm/vm_extern.h>
86
4b5f931b
MD
87#include <sys/thread2.h>
88
984263bc
MD
89#include <sys/user.h>
90#include <sys/exec.h>
91#include <sys/cons.h>
92
93#include <ddb/ddb.h>
94
984263bc
MD
95#include <machine/cpu.h>
96#include <machine/reg.h>
97#include <machine/clock.h>
98#include <machine/specialreg.h>
99#include <machine/bootinfo.h>
100#include <machine/ipl.h>
101#include <machine/md_var.h>
102#include <machine/pcb_ext.h> /* pcb.h included via sys/user.h */
85100692 103#include <machine/globaldata.h> /* CPU_prvspace */
984263bc
MD
104#ifdef SMP
105#include <machine/smp.h>
984263bc
MD
106#endif
107#ifdef PERFMON
108#include <machine/perfmon.h>
109#endif
110#include <machine/cputypes.h>
111
112#ifdef OLD_BUS_ARCH
1f2de5d4 113#include <bus/isa/i386/isa_device.h>
984263bc
MD
114#endif
115#include <i386/isa/intr_machdep.h>
1f2de5d4 116#include <bus/isa/rtc.h>
984263bc
MD
117#include <machine/vm86.h>
118#include <sys/random.h>
119#include <sys/ptrace.h>
120#include <machine/sigframe.h>
121
3ae0cd58
RG
122extern void init386 (int first);
123extern void dblfault_handler (void);
984263bc
MD
124
125extern void printcpuinfo(void); /* XXX header file */
126extern void finishidentcpu(void);
127extern void panicifcpuunsupported(void);
128extern void initializecpu(void);
129
3ae0cd58 130static void cpu_startup (void *);
642a6e88 131#ifndef CPU_DISABLE_SSE
3ae0cd58
RG
132static void set_fpregs_xmm (struct save87 *, struct savexmm *);
133static void fill_fpregs_xmm (struct savexmm *, struct save87 *);
642a6e88 134#endif /* CPU_DISABLE_SSE */
984263bc
MD
135#ifdef DIRECTIO
136extern void ffs_rawread_setup(void);
137#endif /* DIRECTIO */
8a8d5d85 138static void init_locks(void);
984263bc
MD
139
140SYSINIT(cpu, SI_SUB_CPU, SI_ORDER_FIRST, cpu_startup, NULL)
141
984263bc
MD
142int _udatasel, _ucodesel;
143u_int atdevbase;
144
145#if defined(SWTCH_OPTIM_STATS)
146extern int swtch_optim_stats;
147SYSCTL_INT(_debug, OID_AUTO, swtch_optim_stats,
148 CTLFLAG_RD, &swtch_optim_stats, 0, "");
149SYSCTL_INT(_debug, OID_AUTO, tlb_flush_count,
150 CTLFLAG_RD, &tlb_flush_count, 0, "");
151#endif
152
153#ifdef PC98
154static int ispc98 = 1;
155#else
156static int ispc98 = 0;
157#endif
158SYSCTL_INT(_machdep, OID_AUTO, ispc98, CTLFLAG_RD, &ispc98, 0, "");
159
160int physmem = 0;
161int cold = 1;
162
163static int
164sysctl_hw_physmem(SYSCTL_HANDLER_ARGS)
165{
166 int error = sysctl_handle_int(oidp, 0, ctob(physmem), req);
167 return (error);
168}
169
170SYSCTL_PROC(_hw, HW_PHYSMEM, physmem, CTLTYPE_INT|CTLFLAG_RD,
171 0, 0, sysctl_hw_physmem, "IU", "");
172
173static int
174sysctl_hw_usermem(SYSCTL_HANDLER_ARGS)
175{
176 int error = sysctl_handle_int(oidp, 0,
12e4aaff 177 ctob(physmem - vmstats.v_wire_count), req);
984263bc
MD
178 return (error);
179}
180
181SYSCTL_PROC(_hw, HW_USERMEM, usermem, CTLTYPE_INT|CTLFLAG_RD,
182 0, 0, sysctl_hw_usermem, "IU", "");
183
184static int
185sysctl_hw_availpages(SYSCTL_HANDLER_ARGS)
186{
187 int error = sysctl_handle_int(oidp, 0,
188 i386_btop(avail_end - avail_start), req);
189 return (error);
190}
191
192SYSCTL_PROC(_hw, OID_AUTO, availpages, CTLTYPE_INT|CTLFLAG_RD,
193 0, 0, sysctl_hw_availpages, "I", "");
194
195static int
196sysctl_machdep_msgbuf(SYSCTL_HANDLER_ARGS)
197{
198 int error;
199
200 /* Unwind the buffer, so that it's linear (possibly starting with
201 * some initial nulls).
202 */
203 error=sysctl_handle_opaque(oidp,msgbufp->msg_ptr+msgbufp->msg_bufr,
204 msgbufp->msg_size-msgbufp->msg_bufr,req);
205 if(error) return(error);
206 if(msgbufp->msg_bufr>0) {
207 error=sysctl_handle_opaque(oidp,msgbufp->msg_ptr,
208 msgbufp->msg_bufr,req);
209 }
210 return(error);
211}
212
213SYSCTL_PROC(_machdep, OID_AUTO, msgbuf, CTLTYPE_STRING|CTLFLAG_RD,
214 0, 0, sysctl_machdep_msgbuf, "A","Contents of kernel message buffer");
215
216static int msgbuf_clear;
217
218static int
219sysctl_machdep_msgbuf_clear(SYSCTL_HANDLER_ARGS)
220{
221 int error;
222 error = sysctl_handle_int(oidp, oidp->oid_arg1, oidp->oid_arg2,
223 req);
224 if (!error && req->newptr) {
225 /* Clear the buffer and reset write pointer */
226 bzero(msgbufp->msg_ptr,msgbufp->msg_size);
227 msgbufp->msg_bufr=msgbufp->msg_bufx=0;
228 msgbuf_clear=0;
229 }
230 return (error);
231}
232
233SYSCTL_PROC(_machdep, OID_AUTO, msgbuf_clear, CTLTYPE_INT|CTLFLAG_RW,
234 &msgbuf_clear, 0, sysctl_machdep_msgbuf_clear, "I",
235 "Clear kernel message buffer");
236
6ef943a3
MD
237int bootverbose = 0;
238vm_paddr_t Maxmem = 0;
984263bc
MD
239long dumplo;
240
6ef943a3 241vm_paddr_t phys_avail[10];
984263bc
MD
242
243/* must be 2 less so 0 0 can signal end of chunks */
244#define PHYS_AVAIL_ARRAY_END ((sizeof(phys_avail) / sizeof(vm_offset_t)) - 2)
245
246static vm_offset_t buffer_sva, buffer_eva;
247vm_offset_t clean_sva, clean_eva;
248static vm_offset_t pager_sva, pager_eva;
249static struct trapframe proc0_tf;
250
251static void
252cpu_startup(dummy)
253 void *dummy;
254{
c9faf524 255 caddr_t v;
cb840899 256 vm_offset_t minaddr;
984263bc
MD
257 vm_offset_t maxaddr;
258 vm_size_t size = 0;
259 int firstaddr;
984263bc
MD
260
261 if (boothowto & RB_VERBOSE)
262 bootverbose++;
263
264 /*
265 * Good {morning,afternoon,evening,night}.
266 */
267 printf("%s", version);
268 startrtclock();
269 printcpuinfo();
270 panicifcpuunsupported();
271#ifdef PERFMON
272 perfmon_init();
273#endif
6ef943a3 274 printf("real memory = %llu (%lluK bytes)\n", ptoa(Maxmem), ptoa(Maxmem) / 1024);
984263bc
MD
275 /*
276 * Display any holes after the first chunk of extended memory.
277 */
278 if (bootverbose) {
279 int indx;
280
281 printf("Physical memory chunk(s):\n");
282 for (indx = 0; phys_avail[indx + 1] != 0; indx += 2) {
6ef943a3 283 vm_paddr_t size1 = phys_avail[indx + 1] - phys_avail[indx];
984263bc 284
6ef943a3 285 printf("0x%08llx - 0x%08llx, %llu bytes (%llu pages)\n",
984263bc
MD
286 phys_avail[indx], phys_avail[indx + 1] - 1, size1,
287 size1 / PAGE_SIZE);
288 }
289 }
290
984263bc
MD
291 /*
292 * Allocate space for system data structures.
293 * The first available kernel virtual address is in "v".
294 * As pages of kernel virtual memory are allocated, "v" is incremented.
295 * As pages of memory are allocated and cleared,
296 * "firstaddr" is incremented.
297 * An index into the kernel page table corresponding to the
298 * virtual memory address maintained in "v" is kept in "mapaddr".
299 */
300
301 /*
302 * Make two passes. The first pass calculates how much memory is
303 * needed and allocates it. The second pass assigns virtual
304 * addresses to the various data structures.
305 */
306 firstaddr = 0;
307again:
308 v = (caddr_t)firstaddr;
309
310#define valloc(name, type, num) \
311 (name) = (type *)v; v = (caddr_t)((name)+(num))
312#define valloclim(name, type, num, lim) \
313 (name) = (type *)v; v = (caddr_t)((lim) = ((name)+(num)))
314
984263bc
MD
315 /*
316 * The nominal buffer size (and minimum KVA allocation) is BKVASIZE.
317 * For the first 64MB of ram nominally allocate sufficient buffers to
318 * cover 1/4 of our ram. Beyond the first 64MB allocate additional
319 * buffers to cover 1/20 of our ram over 64MB. When auto-sizing
320 * the buffer cache we limit the eventual kva reservation to
321 * maxbcache bytes.
322 *
323 * factor represents the 1/4 x ram conversion.
324 */
325 if (nbuf == 0) {
326 int factor = 4 * BKVASIZE / 1024;
327 int kbytes = physmem * (PAGE_SIZE / 1024);
328
329 nbuf = 50;
330 if (kbytes > 4096)
331 nbuf += min((kbytes - 4096) / factor, 65536 / factor);
332 if (kbytes > 65536)
333 nbuf += (kbytes - 65536) * 2 / (factor * 5);
334 if (maxbcache && nbuf > maxbcache / BKVASIZE)
335 nbuf = maxbcache / BKVASIZE;
336 }
337
338 /*
339 * Do not allow the buffer_map to be more then 1/2 the size of the
340 * kernel_map.
341 */
342 if (nbuf > (kernel_map->max_offset - kernel_map->min_offset) /
343 (BKVASIZE * 2)) {
344 nbuf = (kernel_map->max_offset - kernel_map->min_offset) /
345 (BKVASIZE * 2);
346 printf("Warning: nbufs capped at %d\n", nbuf);
347 }
348
349 nswbuf = max(min(nbuf/4, 256), 16);
350#ifdef NSWBUF_MIN
351 if (nswbuf < NSWBUF_MIN)
352 nswbuf = NSWBUF_MIN;
353#endif
354#ifdef DIRECTIO
355 ffs_rawread_setup();
356#endif
357
358 valloc(swbuf, struct buf, nswbuf);
359 valloc(buf, struct buf, nbuf);
360 v = bufhashinit(v);
361
362 /*
363 * End of first pass, size has been calculated so allocate memory
364 */
365 if (firstaddr == 0) {
366 size = (vm_size_t)(v - firstaddr);
367 firstaddr = (int)kmem_alloc(kernel_map, round_page(size));
368 if (firstaddr == 0)
369 panic("startup: no room for tables");
370 goto again;
371 }
372
373 /*
374 * End of second pass, addresses have been assigned
375 */
376 if ((vm_size_t)(v - firstaddr) != size)
377 panic("startup: table size inconsistency");
378
379 clean_map = kmem_suballoc(kernel_map, &clean_sva, &clean_eva,
380 (nbuf*BKVASIZE) + (nswbuf*MAXPHYS) + pager_map_size);
381 buffer_map = kmem_suballoc(clean_map, &buffer_sva, &buffer_eva,
382 (nbuf*BKVASIZE));
383 buffer_map->system_map = 1;
384 pager_map = kmem_suballoc(clean_map, &pager_sva, &pager_eva,
385 (nswbuf*MAXPHYS) + pager_map_size);
386 pager_map->system_map = 1;
387 exec_map = kmem_suballoc(kernel_map, &minaddr, &maxaddr,
388 (16*(ARG_MAX+(PAGE_SIZE*3))));
389
984263bc
MD
390#if defined(USERCONFIG)
391 userconfig();
392 cninit(); /* the preferred console may have changed */
393#endif
394
12e4aaff
MD
395 printf("avail memory = %u (%uK bytes)\n", ptoa(vmstats.v_free_count),
396 ptoa(vmstats.v_free_count) / 1024);
984263bc
MD
397
398 /*
399 * Set up buffers, so they can be used to read disk labels.
400 */
401 bufinit();
402 vm_pager_bufferinit();
403
404#ifdef SMP
405 /*
406 * OK, enough kmem_alloc/malloc state should be up, lets get on with it!
407 */
408 mp_start(); /* fire up the APs and APICs */
409 mp_announce();
410#endif /* SMP */
411 cpu_setregs();
412}
413
984263bc
MD
414/*
415 * Send an interrupt to process.
416 *
417 * Stack is set up to allow sigcode stored
418 * at top to call routine, followed by kcall
419 * to sigreturn routine below. After sigreturn
420 * resets the signal mask, the stack, and the
421 * frame pointer, it returns to the user
422 * specified pc, psl.
423 */
984263bc
MD
424void
425sendsig(catcher, sig, mask, code)
426 sig_t catcher;
427 int sig;
428 sigset_t *mask;
429 u_long code;
430{
431 struct proc *p = curproc;
432 struct trapframe *regs;
433 struct sigacts *psp = p->p_sigacts;
434 struct sigframe sf, *sfp;
435 int oonstack;
436
984263bc
MD
437 regs = p->p_md.md_regs;
438 oonstack = (p->p_sigstk.ss_flags & SS_ONSTACK) ? 1 : 0;
439
440 /* save user context */
441 bzero(&sf, sizeof(struct sigframe));
442 sf.sf_uc.uc_sigmask = *mask;
443 sf.sf_uc.uc_stack = p->p_sigstk;
444 sf.sf_uc.uc_mcontext.mc_onstack = oonstack;
445 sf.sf_uc.uc_mcontext.mc_gs = rgs();
446 bcopy(regs, &sf.sf_uc.uc_mcontext.mc_fs, sizeof(struct trapframe));
447
448 /* Allocate and validate space for the signal handler context. */
449 if ((p->p_flag & P_ALTSTACK) != 0 && !oonstack &&
450 SIGISMEMBER(psp->ps_sigonstack, sig)) {
451 sfp = (struct sigframe *)(p->p_sigstk.ss_sp +
452 p->p_sigstk.ss_size - sizeof(struct sigframe));
453 p->p_sigstk.ss_flags |= SS_ONSTACK;
454 }
455 else
456 sfp = (struct sigframe *)regs->tf_esp - 1;
457
458 /* Translate the signal is appropriate */
459 if (p->p_sysent->sv_sigtbl) {
460 if (sig <= p->p_sysent->sv_sigsize)
461 sig = p->p_sysent->sv_sigtbl[_SIG_IDX(sig)];
462 }
463
464 /* Build the argument list for the signal handler. */
465 sf.sf_signum = sig;
466 sf.sf_ucontext = (register_t)&sfp->sf_uc;
467 if (SIGISMEMBER(p->p_sigacts->ps_siginfo, sig)) {
468 /* Signal handler installed with SA_SIGINFO. */
469 sf.sf_siginfo = (register_t)&sfp->sf_si;
470 sf.sf_ahu.sf_action = (__siginfohandler_t *)catcher;
471
472 /* fill siginfo structure */
473 sf.sf_si.si_signo = sig;
474 sf.sf_si.si_code = code;
475 sf.sf_si.si_addr = (void*)regs->tf_err;
476 }
477 else {
478 /* Old FreeBSD-style arguments. */
479 sf.sf_siginfo = code;
480 sf.sf_addr = regs->tf_err;
481 sf.sf_ahu.sf_handler = catcher;
482 }
483
484 /*
485 * If we're a vm86 process, we want to save the segment registers.
486 * We also change eflags to be our emulated eflags, not the actual
487 * eflags.
488 */
489 if (regs->tf_eflags & PSL_VM) {
490 struct trapframe_vm86 *tf = (struct trapframe_vm86 *)regs;
b7c628e4 491 struct vm86_kernel *vm86 = &p->p_thread->td_pcb->pcb_ext->ext_vm86;
984263bc
MD
492
493 sf.sf_uc.uc_mcontext.mc_gs = tf->tf_vm86_gs;
494 sf.sf_uc.uc_mcontext.mc_fs = tf->tf_vm86_fs;
495 sf.sf_uc.uc_mcontext.mc_es = tf->tf_vm86_es;
496 sf.sf_uc.uc_mcontext.mc_ds = tf->tf_vm86_ds;
497
498 if (vm86->vm86_has_vme == 0)
499 sf.sf_uc.uc_mcontext.mc_eflags =
500 (tf->tf_eflags & ~(PSL_VIF | PSL_VIP)) |
501 (vm86->vm86_eflags & (PSL_VIF | PSL_VIP));
502
503 /*
504 * Clear PSL_NT to inhibit T_TSSFLT faults on return from
505 * syscalls made by the signal handler. This just avoids
506 * wasting time for our lazy fixup of such faults. PSL_NT
507 * does nothing in vm86 mode, but vm86 programs can set it
508 * almost legitimately in probes for old cpu types.
509 */
510 tf->tf_eflags &= ~(PSL_VM | PSL_NT | PSL_VIF | PSL_VIP);
511 }
512
513 /*
514 * Copy the sigframe out to the user's stack.
515 */
516 if (copyout(&sf, sfp, sizeof(struct sigframe)) != 0) {
517 /*
518 * Something is wrong with the stack pointer.
519 * ...Kill the process.
520 */
521 sigexit(p, SIGILL);
522 }
523
524 regs->tf_esp = (int)sfp;
525 regs->tf_eip = PS_STRINGS - *(p->p_sysent->sv_szsigcode);
526 regs->tf_eflags &= ~PSL_T;
527 regs->tf_cs = _ucodesel;
528 regs->tf_ds = _udatasel;
529 regs->tf_es = _udatasel;
530 regs->tf_fs = _udatasel;
984263bc
MD
531 regs->tf_ss = _udatasel;
532}
533
534/*
65957d54 535 * sigreturn(ucontext_t *sigcntxp)
41c20dac 536 *
984263bc
MD
537 * System call to cleanup state after a signal
538 * has been taken. Reset signal mask and
539 * stack state from context left by sendsig (above).
540 * Return to previous pc and psl as specified by
541 * context left by sendsig. Check carefully to
542 * make sure that the user has not modified the
543 * state to gain improper privileges.
544 */
545#define EFL_SECURE(ef, oef) ((((ef) ^ (oef)) & ~PSL_USERCHANGE) == 0)
546#define CS_SECURE(cs) (ISPL(cs) == SEL_UPL)
547
984263bc 548int
41c20dac 549sigreturn(struct sigreturn_args *uap)
984263bc 550{
41c20dac 551 struct proc *p = curproc;
984263bc
MD
552 struct trapframe *regs;
553 ucontext_t *ucp;
554 int cs, eflags;
555
556 ucp = uap->sigcntxp;
557
984263bc
MD
558 if (!useracc((caddr_t)ucp, sizeof(ucontext_t), VM_PROT_READ))
559 return (EFAULT);
560
561 regs = p->p_md.md_regs;
562 eflags = ucp->uc_mcontext.mc_eflags;
563
564 if (eflags & PSL_VM) {
565 struct trapframe_vm86 *tf = (struct trapframe_vm86 *)regs;
566 struct vm86_kernel *vm86;
567
568 /*
569 * if pcb_ext == 0 or vm86_inited == 0, the user hasn't
570 * set up the vm86 area, and we can't enter vm86 mode.
571 */
b7c628e4 572 if (p->p_thread->td_pcb->pcb_ext == 0)
984263bc 573 return (EINVAL);
b7c628e4 574 vm86 = &p->p_thread->td_pcb->pcb_ext->ext_vm86;
984263bc
MD
575 if (vm86->vm86_inited == 0)
576 return (EINVAL);
577
578 /* go back to user mode if both flags are set */
579 if ((eflags & PSL_VIP) && (eflags & PSL_VIF))
580 trapsignal(p, SIGBUS, 0);
581
582 if (vm86->vm86_has_vme) {
583 eflags = (tf->tf_eflags & ~VME_USERCHANGE) |
584 (eflags & VME_USERCHANGE) | PSL_VM;
585 } else {
586 vm86->vm86_eflags = eflags; /* save VIF, VIP */
587 eflags = (tf->tf_eflags & ~VM_USERCHANGE) | (eflags & VM_USERCHANGE) | PSL_VM;
588 }
589 bcopy(&ucp->uc_mcontext.mc_fs, tf, sizeof(struct trapframe));
590 tf->tf_eflags = eflags;
591 tf->tf_vm86_ds = tf->tf_ds;
592 tf->tf_vm86_es = tf->tf_es;
593 tf->tf_vm86_fs = tf->tf_fs;
594 tf->tf_vm86_gs = ucp->uc_mcontext.mc_gs;
595 tf->tf_ds = _udatasel;
596 tf->tf_es = _udatasel;
597 tf->tf_fs = _udatasel;
598 } else {
599 /*
600 * Don't allow users to change privileged or reserved flags.
601 */
602 /*
603 * XXX do allow users to change the privileged flag PSL_RF.
604 * The cpu sets PSL_RF in tf_eflags for faults. Debuggers
605 * should sometimes set it there too. tf_eflags is kept in
606 * the signal context during signal handling and there is no
607 * other place to remember it, so the PSL_RF bit may be
608 * corrupted by the signal handler without us knowing.
609 * Corruption of the PSL_RF bit at worst causes one more or
610 * one less debugger trap, so allowing it is fairly harmless.
611 */
612 if (!EFL_SECURE(eflags & ~PSL_RF, regs->tf_eflags & ~PSL_RF)) {
613 printf("sigreturn: eflags = 0x%x\n", eflags);
614 return(EINVAL);
615 }
616
617 /*
618 * Don't allow users to load a valid privileged %cs. Let the
619 * hardware check for invalid selectors, excess privilege in
620 * other selectors, invalid %eip's and invalid %esp's.
621 */
622 cs = ucp->uc_mcontext.mc_cs;
623 if (!CS_SECURE(cs)) {
624 printf("sigreturn: cs = 0x%x\n", cs);
625 trapsignal(p, SIGBUS, T_PROTFLT);
626 return(EINVAL);
627 }
628 bcopy(&ucp->uc_mcontext.mc_fs, regs, sizeof(struct trapframe));
629 }
630
631 if (ucp->uc_mcontext.mc_onstack & 1)
632 p->p_sigstk.ss_flags |= SS_ONSTACK;
633 else
634 p->p_sigstk.ss_flags &= ~SS_ONSTACK;
635
636 p->p_sigmask = ucp->uc_sigmask;
637 SIG_CANTMASK(p->p_sigmask);
638 return(EJUSTRETURN);
639}
640
a722be49
MD
641/*
642 * Stack frame on entry to function. %eax will contain the function vector,
643 * %ecx will contain the function data. flags, ecx, and eax will have
644 * already been pushed on the stack.
645 */
646struct upc_frame {
647 register_t eax;
648 register_t ecx;
0a455ac5 649 register_t edx;
a722be49
MD
650 register_t flags;
651 register_t oldip;
652};
653
654void
655sendupcall(struct vmupcall *vu, int morepending)
656{
657 struct proc *p = curproc;
658 struct trapframe *regs;
659 struct upcall upcall;
660 struct upc_frame upc_frame;
6e58b5df 661 int crit_count = 0;
a722be49
MD
662
663 /*
664 * Get the upcall data structure
665 */
6e58b5df
MD
666 if (copyin(p->p_upcall, &upcall, sizeof(upcall)) ||
667 copyin((char *)upcall.upc_uthread + upcall.upc_critoff, &crit_count, sizeof(int))
668 ) {
a722be49
MD
669 vu->vu_pending = 0;
670 printf("bad upcall address\n");
671 return;
672 }
673
674 /*
675 * If the data structure is already marked pending or has a critical
676 * section count, mark the data structure as pending and return
677 * without doing an upcall. vu_pending is left set.
678 */
6e58b5df
MD
679 if (upcall.upc_pending || crit_count >= vu->vu_pending) {
680 if (upcall.upc_pending < vu->vu_pending) {
681 upcall.upc_pending = vu->vu_pending;
682 copyout(&upcall.upc_pending, &p->p_upcall->upc_pending,
683 sizeof(upcall.upc_pending));
a722be49
MD
684 }
685 return;
686 }
687
688 /*
689 * We can run this upcall now, clear vu_pending.
690 *
691 * Bump our critical section count and set or clear the
692 * user pending flag depending on whether more upcalls are
693 * pending. The user will be responsible for calling
694 * upc_dispatch(-1) to process remaining upcalls.
695 */
696 vu->vu_pending = 0;
6e58b5df
MD
697 upcall.upc_pending = morepending;
698 crit_count += TDPRI_CRIT;
699 copyout(&upcall.upc_pending, &p->p_upcall->upc_pending,
700 sizeof(upcall.upc_pending));
701 copyout(&crit_count, (char *)upcall.upc_uthread + upcall.upc_critoff,
702 sizeof(int));
a722be49
MD
703
704 /*
705 * Construct a stack frame and issue the upcall
706 */
707 regs = p->p_md.md_regs;
708 upc_frame.eax = regs->tf_eax;
709 upc_frame.ecx = regs->tf_ecx;
0a455ac5 710 upc_frame.edx = regs->tf_edx;
a722be49
MD
711 upc_frame.flags = regs->tf_eflags;
712 upc_frame.oldip = regs->tf_eip;
713 if (copyout(&upc_frame, (void *)(regs->tf_esp - sizeof(upc_frame)),
714 sizeof(upc_frame)) != 0) {
715 printf("bad stack on upcall\n");
716 } else {
717 regs->tf_eax = (register_t)vu->vu_func;
718 regs->tf_ecx = (register_t)vu->vu_data;
0a455ac5 719 regs->tf_edx = (register_t)p->p_upcall;
a722be49
MD
720 regs->tf_eip = (register_t)vu->vu_ctx;
721 regs->tf_esp -= sizeof(upc_frame);
722 }
723}
724
725/*
726 * fetchupcall occurs in the context of a system call, which means that
0a455ac5
MD
727 * we have to return EJUSTRETURN in order to prevent eax and edx from
728 * being overwritten by the syscall return value.
a722be49
MD
729 *
730 * if vu is not NULL we return the new context in %edx, the new data in %ecx,
731 * and the function pointer in %eax.
732 */
733int
0a455ac5 734fetchupcall (struct vmupcall *vu, int morepending, void *rsp)
a722be49
MD
735{
736 struct upc_frame upc_frame;
737 struct proc *p;
738 struct trapframe *regs;
739 int error;
6e58b5df
MD
740 struct upcall upcall;
741 int crit_count;
a722be49
MD
742
743 p = curproc;
744 regs = p->p_md.md_regs;
745
6e58b5df 746 error = copyout(&morepending, &p->p_upcall->upc_pending, sizeof(int));
a722be49
MD
747 if (error == 0) {
748 if (vu) {
749 /*
750 * This jumps us to the next ready context.
751 */
752 vu->vu_pending = 0;
6e58b5df
MD
753 error = copyin(p->p_upcall, &upcall, sizeof(upcall));
754 crit_count = 0;
755 if (error == 0)
756 error = copyin((char *)upcall.upc_uthread + upcall.upc_critoff, &crit_count, sizeof(int));
757 crit_count += TDPRI_CRIT;
a722be49 758 if (error == 0)
6e58b5df 759 error = copyout(&crit_count, (char *)upcall.upc_uthread + upcall.upc_critoff, sizeof(int));
a722be49
MD
760 regs->tf_eax = (register_t)vu->vu_func;
761 regs->tf_ecx = (register_t)vu->vu_data;
0a455ac5 762 regs->tf_edx = (register_t)p->p_upcall;
a722be49
MD
763 regs->tf_eip = (register_t)vu->vu_ctx;
764 regs->tf_esp = (register_t)rsp;
765 } else {
766 /*
767 * This returns us to the originally interrupted code.
768 */
769 error = copyin(rsp, &upc_frame, sizeof(upc_frame));
770 regs->tf_eax = upc_frame.eax;
771 regs->tf_ecx = upc_frame.ecx;
0a455ac5 772 regs->tf_edx = upc_frame.edx;
6e58b5df
MD
773 regs->tf_eflags = (regs->tf_eflags & ~PSL_USERCHANGE) |
774 (upc_frame.flags & PSL_USERCHANGE);
a722be49
MD
775 regs->tf_eip = upc_frame.oldip;
776 regs->tf_esp = (register_t)((char *)rsp + sizeof(upc_frame));
777 }
778 }
779 if (error == 0)
780 error = EJUSTRETURN;
781 return(error);
782}
783
984263bc
MD
784/*
785 * Machine dependent boot() routine
786 *
787 * I haven't seen anything to put here yet
788 * Possibly some stuff might be grafted back here from boot()
789 */
790void
791cpu_boot(int howto)
792{
793}
794
795/*
796 * Shutdown the CPU as much as possible
797 */
798void
799cpu_halt(void)
800{
801 for (;;)
802 __asm__ ("hlt");
803}
804
805/*
8ad65e08
MD
806 * cpu_idle() represents the idle LWKT. You cannot return from this function
807 * (unless you want to blow things up!). Instead we look for runnable threads
808 * and loop or halt as appropriate. Giant is not held on entry to the thread.
984263bc 809 *
26a0694b 810 * The main loop is entered with a critical section held, we must release
a2a5ad0d
MD
811 * the critical section before doing anything else. lwkt_switch() will
812 * check for pending interrupts due to entering and exiting its own
813 * critical section.
26a0694b 814 *
a2a5ad0d
MD
815 * Note on cpu_idle_hlt: On an SMP system we rely on a scheduler IPI
816 * to wake a HLTed cpu up. However, there are cases where the idlethread
817 * will be entered with the possibility that no IPI will occur and in such
818 * cases lwkt_switch() sets TDF_IDLE_NOHLT.
984263bc 819 */
96728c05 820static int cpu_idle_hlt = 1;
60f945af
MD
821static int cpu_idle_hltcnt;
822static int cpu_idle_spincnt;
984263bc
MD
823SYSCTL_INT(_machdep, OID_AUTO, cpu_idle_hlt, CTLFLAG_RW,
824 &cpu_idle_hlt, 0, "Idle loop HLT enable");
60f945af
MD
825SYSCTL_INT(_machdep, OID_AUTO, cpu_idle_hltcnt, CTLFLAG_RW,
826 &cpu_idle_hltcnt, 0, "Idle loop entry halts");
827SYSCTL_INT(_machdep, OID_AUTO, cpu_idle_spincnt, CTLFLAG_RW,
828 &cpu_idle_spincnt, 0, "Idle loop entry spins");
984263bc 829
f9d8cd12
MD
830static void
831cpu_idle_default_hook(void)
832{
833 /*
834 * We must guarentee that hlt is exactly the instruction
835 * following the sti.
836 */
837 __asm __volatile("sti; hlt");
838}
839
840/* Other subsystems (e.g., ACPI) can hook this later. */
841void (*cpu_idle_hook)(void) = cpu_idle_default_hook;
842
984263bc
MD
843void
844cpu_idle(void)
845{
a2a5ad0d
MD
846 struct thread *td = curthread;
847
26a0694b 848 crit_exit();
a2a5ad0d 849 KKASSERT(td->td_pri < TDPRI_CRIT);
8ad65e08 850 for (;;) {
a2a5ad0d
MD
851 /*
852 * See if there are any LWKTs ready to go.
853 */
8ad65e08 854 lwkt_switch();
a2a5ad0d
MD
855
856 /*
857 * If we are going to halt call splz unconditionally after
858 * CLIing to catch any interrupt races. Note that we are
859 * at SPL0 and interrupts are enabled.
860 */
861 if (cpu_idle_hlt && !lwkt_runnable() &&
862 (td->td_flags & TDF_IDLE_NOHLT) == 0) {
a2a5ad0d
MD
863 __asm __volatile("cli");
864 splz();
f9d8cd12 865 cpu_idle_hook();
60f945af 866 ++cpu_idle_hltcnt;
8ad65e08 867 } else {
a2a5ad0d 868 td->td_flags &= ~TDF_IDLE_NOHLT;
60f945af 869 splz();
8ad65e08 870 __asm __volatile("sti");
60f945af 871 ++cpu_idle_spincnt;
8ad65e08 872 }
984263bc
MD
873 }
874}
875
876/*
877 * Clear registers on exec
878 */
879void
880setregs(p, entry, stack, ps_strings)
881 struct proc *p;
882 u_long entry;
883 u_long stack;
884 u_long ps_strings;
885{
886 struct trapframe *regs = p->p_md.md_regs;
b7c628e4 887 struct pcb *pcb = p->p_thread->td_pcb;
984263bc
MD
888
889 /* Reset pc->pcb_gs and %gs before possibly invalidating it. */
890 pcb->pcb_gs = _udatasel;
891 load_gs(_udatasel);
892
984263bc
MD
893 /* was i386_user_cleanup() in NetBSD */
894 user_ldt_free(pcb);
984263bc
MD
895
896 bzero((char *)regs, sizeof(struct trapframe));
897 regs->tf_eip = entry;
898 regs->tf_esp = stack;
899 regs->tf_eflags = PSL_USER | (regs->tf_eflags & PSL_T);
900 regs->tf_ss = _udatasel;
901 regs->tf_ds = _udatasel;
902 regs->tf_es = _udatasel;
903 regs->tf_fs = _udatasel;
904 regs->tf_cs = _ucodesel;
905
906 /* PS_STRINGS value for BSD/OS binaries. It is 0 for non-BSD/OS. */
907 regs->tf_ebx = ps_strings;
908
909 /*
910 * Reset the hardware debug registers if they were in use.
911 * They won't have any meaning for the newly exec'd process.
912 */
913 if (pcb->pcb_flags & PCB_DBREGS) {
914 pcb->pcb_dr0 = 0;
915 pcb->pcb_dr1 = 0;
916 pcb->pcb_dr2 = 0;
917 pcb->pcb_dr3 = 0;
918 pcb->pcb_dr6 = 0;
919 pcb->pcb_dr7 = 0;
b7c628e4 920 if (pcb == curthread->td_pcb) {
984263bc
MD
921 /*
922 * Clear the debug registers on the running
923 * CPU, otherwise they will end up affecting
924 * the next process we switch to.
925 */
926 reset_dbregs();
927 }
928 pcb->pcb_flags &= ~PCB_DBREGS;
929 }
930
931 /*
932 * Initialize the math emulator (if any) for the current process.
933 * Actually, just clear the bit that says that the emulator has
934 * been initialized. Initialization is delayed until the process
935 * traps to the emulator (if it is done at all) mainly because
936 * emulators don't provide an entry point for initialization.
937 */
b7c628e4 938 p->p_thread->td_pcb->pcb_flags &= ~FP_SOFTFP;
984263bc
MD
939
940 /*
a02705a9
MD
941 * note: do not set CR0_TS here. npxinit() must do it after clearing
942 * gd_npxthread. Otherwise a preemptive interrupt thread may panic
943 * in npxdna().
984263bc 944 */
a02705a9
MD
945 crit_enter();
946 load_cr0(rcr0() | CR0_MP);
984263bc
MD
947
948#if NNPX > 0
949 /* Initialize the npx (if any) for the current process. */
950 npxinit(__INITIAL_NPXCW__);
951#endif
a02705a9 952 crit_exit();
984263bc 953
90b9818c
MD
954 /*
955 * note: linux emulator needs edx to be 0x0 on entry, which is
c0510e9a
MD
956 * handled in execve simply by setting the 64 bit syscall
957 * return value to 0.
90b9818c 958 */
984263bc
MD
959}
960
961void
962cpu_setregs(void)
963{
964 unsigned int cr0;
965
966 cr0 = rcr0();
967 cr0 |= CR0_NE; /* Done by npxinit() */
968 cr0 |= CR0_MP | CR0_TS; /* Done at every execve() too. */
969#ifdef I386_CPU
970 if (cpu_class != CPUCLASS_386)
971#endif
972 cr0 |= CR0_WP | CR0_AM;
973 load_cr0(cr0);
974 load_gs(_udatasel);
975}
976
977static int
978sysctl_machdep_adjkerntz(SYSCTL_HANDLER_ARGS)
979{
980 int error;
981 error = sysctl_handle_int(oidp, oidp->oid_arg1, oidp->oid_arg2,
982 req);
983 if (!error && req->newptr)
984 resettodr();
985 return (error);
986}
987
988SYSCTL_PROC(_machdep, CPU_ADJKERNTZ, adjkerntz, CTLTYPE_INT|CTLFLAG_RW,
989 &adjkerntz, 0, sysctl_machdep_adjkerntz, "I", "");
990
991SYSCTL_INT(_machdep, CPU_DISRTCSET, disable_rtc_set,
992 CTLFLAG_RW, &disable_rtc_set, 0, "");
993
994SYSCTL_STRUCT(_machdep, CPU_BOOTINFO, bootinfo,
995 CTLFLAG_RD, &bootinfo, bootinfo, "");
996
997SYSCTL_INT(_machdep, CPU_WALLCLOCK, wall_cmos_clock,
998 CTLFLAG_RW, &wall_cmos_clock, 0, "");
999
1000extern u_long bootdev; /* not a dev_t - encoding is different */
1001SYSCTL_ULONG(_machdep, OID_AUTO, guessed_bootdev,
1002 CTLFLAG_RD, &bootdev, 0, "Boot device (not in dev_t format)");
1003
1004/*
1005 * Initialize 386 and configure to run kernel
1006 */
1007
1008/*
1009 * Initialize segments & interrupt table
1010 */
1011
1012int _default_ldt;
1013union descriptor gdt[NGDT * MAXCPU]; /* global descriptor table */
1014static struct gate_descriptor idt0[NIDT];
1015struct gate_descriptor *idt = &idt0[0]; /* interrupt descriptor table */
1016union descriptor ldt[NLDT]; /* local descriptor table */
17a9f566
MD
1017
1018/* table descriptors - used to load tables by cpu */
984263bc 1019struct region_descriptor r_gdt, r_idt;
984263bc 1020
984263bc
MD
1021#if defined(I586_CPU) && !defined(NO_F00F_HACK)
1022extern int has_f00f_bug;
1023#endif
1024
1025static struct i386tss dblfault_tss;
1026static char dblfault_stack[PAGE_SIZE];
1027
1028extern struct user *proc0paddr;
1029
1030
1031/* software prototypes -- in more palatable form */
1032struct soft_segment_descriptor gdt_segs[] = {
1033/* GNULL_SEL 0 Null Descriptor */
1034{ 0x0, /* segment base address */
1035 0x0, /* length */
1036 0, /* segment type */
1037 0, /* segment descriptor priority level */
1038 0, /* segment descriptor present */
1039 0, 0,
1040 0, /* default 32 vs 16 bit size */
1041 0 /* limit granularity (byte/page units)*/ },
1042/* GCODE_SEL 1 Code Descriptor for kernel */
1043{ 0x0, /* segment base address */
1044 0xfffff, /* length - all address space */
1045 SDT_MEMERA, /* segment type */
1046 0, /* segment descriptor priority level */
1047 1, /* segment descriptor present */
1048 0, 0,
1049 1, /* default 32 vs 16 bit size */
1050 1 /* limit granularity (byte/page units)*/ },
1051/* GDATA_SEL 2 Data Descriptor for kernel */
1052{ 0x0, /* segment base address */
1053 0xfffff, /* length - all address space */
1054 SDT_MEMRWA, /* segment type */
1055 0, /* segment descriptor priority level */
1056 1, /* segment descriptor present */
1057 0, 0,
1058 1, /* default 32 vs 16 bit size */
1059 1 /* limit granularity (byte/page units)*/ },
1060/* GPRIV_SEL 3 SMP Per-Processor Private Data Descriptor */
1061{ 0x0, /* segment base address */
1062 0xfffff, /* length - all address space */
1063 SDT_MEMRWA, /* segment type */
1064 0, /* segment descriptor priority level */
1065 1, /* segment descriptor present */
1066 0, 0,
1067 1, /* default 32 vs 16 bit size */
1068 1 /* limit granularity (byte/page units)*/ },
1069/* GPROC0_SEL 4 Proc 0 Tss Descriptor */
1070{
1071 0x0, /* segment base address */
1072 sizeof(struct i386tss)-1,/* length - all address space */
1073 SDT_SYS386TSS, /* segment type */
1074 0, /* segment descriptor priority level */
1075 1, /* segment descriptor present */
1076 0, 0,
1077 0, /* unused - default 32 vs 16 bit size */
1078 0 /* limit granularity (byte/page units)*/ },
1079/* GLDT_SEL 5 LDT Descriptor */
1080{ (int) ldt, /* segment base address */
1081 sizeof(ldt)-1, /* length - all address space */
1082 SDT_SYSLDT, /* segment type */
1083 SEL_UPL, /* segment descriptor priority level */
1084 1, /* segment descriptor present */
1085 0, 0,
1086 0, /* unused - default 32 vs 16 bit size */
1087 0 /* limit granularity (byte/page units)*/ },
1088/* GUSERLDT_SEL 6 User LDT Descriptor per process */
1089{ (int) ldt, /* segment base address */
1090 (512 * sizeof(union descriptor)-1), /* length */
1091 SDT_SYSLDT, /* segment type */
1092 0, /* segment descriptor priority level */
1093 1, /* segment descriptor present */
1094 0, 0,
1095 0, /* unused - default 32 vs 16 bit size */
1096 0 /* limit granularity (byte/page units)*/ },
1097/* GTGATE_SEL 7 Null Descriptor - Placeholder */
1098{ 0x0, /* segment base address */
1099 0x0, /* length - all address space */
1100 0, /* segment type */
1101 0, /* segment descriptor priority level */
1102 0, /* segment descriptor present */
1103 0, 0,
1104 0, /* default 32 vs 16 bit size */
1105 0 /* limit granularity (byte/page units)*/ },
1106/* GBIOSLOWMEM_SEL 8 BIOS access to realmode segment 0x40, must be #8 in GDT */
1107{ 0x400, /* segment base address */
1108 0xfffff, /* length */
1109 SDT_MEMRWA, /* segment type */
1110 0, /* segment descriptor priority level */
1111 1, /* segment descriptor present */
1112 0, 0,
1113 1, /* default 32 vs 16 bit size */
1114 1 /* limit granularity (byte/page units)*/ },
1115/* GPANIC_SEL 9 Panic Tss Descriptor */
1116{ (int) &dblfault_tss, /* segment base address */
1117 sizeof(struct i386tss)-1,/* length - all address space */
1118 SDT_SYS386TSS, /* segment type */
1119 0, /* segment descriptor priority level */
1120 1, /* segment descriptor present */
1121 0, 0,
1122 0, /* unused - default 32 vs 16 bit size */
1123 0 /* limit granularity (byte/page units)*/ },
1124/* GBIOSCODE32_SEL 10 BIOS 32-bit interface (32bit Code) */
1125{ 0, /* segment base address (overwritten) */
1126 0xfffff, /* length */
1127 SDT_MEMERA, /* segment type */
1128 0, /* segment descriptor priority level */
1129 1, /* segment descriptor present */
1130 0, 0,
1131 0, /* default 32 vs 16 bit size */
1132 1 /* limit granularity (byte/page units)*/ },
1133/* GBIOSCODE16_SEL 11 BIOS 32-bit interface (16bit Code) */
1134{ 0, /* segment base address (overwritten) */
1135 0xfffff, /* length */
1136 SDT_MEMERA, /* segment type */
1137 0, /* segment descriptor priority level */
1138 1, /* segment descriptor present */
1139 0, 0,
1140 0, /* default 32 vs 16 bit size */
1141 1 /* limit granularity (byte/page units)*/ },
1142/* GBIOSDATA_SEL 12 BIOS 32-bit interface (Data) */
1143{ 0, /* segment base address (overwritten) */
1144 0xfffff, /* length */
1145 SDT_MEMRWA, /* segment type */
1146 0, /* segment descriptor priority level */
1147 1, /* segment descriptor present */
1148 0, 0,
1149 1, /* default 32 vs 16 bit size */
1150 1 /* limit granularity (byte/page units)*/ },
1151/* GBIOSUTIL_SEL 13 BIOS 16-bit interface (Utility) */
1152{ 0, /* segment base address (overwritten) */
1153 0xfffff, /* length */
1154 SDT_MEMRWA, /* segment type */
1155 0, /* segment descriptor priority level */
1156 1, /* segment descriptor present */
1157 0, 0,
1158 0, /* default 32 vs 16 bit size */
1159 1 /* limit granularity (byte/page units)*/ },
1160/* GBIOSARGS_SEL 14 BIOS 16-bit interface (Arguments) */
1161{ 0, /* segment base address (overwritten) */
1162 0xfffff, /* length */
1163 SDT_MEMRWA, /* segment type */
1164 0, /* segment descriptor priority level */
1165 1, /* segment descriptor present */
1166 0, 0,
1167 0, /* default 32 vs 16 bit size */
1168 1 /* limit granularity (byte/page units)*/ },
1169};
1170
1171static struct soft_segment_descriptor ldt_segs[] = {
1172 /* Null Descriptor - overwritten by call gate */
1173{ 0x0, /* segment base address */
1174 0x0, /* length - all address space */
1175 0, /* segment type */
1176 0, /* segment descriptor priority level */
1177 0, /* segment descriptor present */
1178 0, 0,
1179 0, /* default 32 vs 16 bit size */
1180 0 /* limit granularity (byte/page units)*/ },
1181 /* Null Descriptor - overwritten by call gate */
1182{ 0x0, /* segment base address */
1183 0x0, /* length - all address space */
1184 0, /* segment type */
1185 0, /* segment descriptor priority level */
1186 0, /* segment descriptor present */
1187 0, 0,
1188 0, /* default 32 vs 16 bit size */
1189 0 /* limit granularity (byte/page units)*/ },
1190 /* Null Descriptor - overwritten by call gate */
1191{ 0x0, /* segment base address */
1192 0x0, /* length - all address space */
1193 0, /* segment type */
1194 0, /* segment descriptor priority level */
1195 0, /* segment descriptor present */
1196 0, 0,
1197 0, /* default 32 vs 16 bit size */
1198 0 /* limit granularity (byte/page units)*/ },
1199 /* Code Descriptor for user */
1200{ 0x0, /* segment base address */
1201 0xfffff, /* length - all address space */
1202 SDT_MEMERA, /* segment type */
1203 SEL_UPL, /* segment descriptor priority level */
1204 1, /* segment descriptor present */
1205 0, 0,
1206 1, /* default 32 vs 16 bit size */
1207 1 /* limit granularity (byte/page units)*/ },
1208 /* Null Descriptor - overwritten by call gate */
1209{ 0x0, /* segment base address */
1210 0x0, /* length - all address space */
1211 0, /* segment type */
1212 0, /* segment descriptor priority level */
1213 0, /* segment descriptor present */
1214 0, 0,
1215 0, /* default 32 vs 16 bit size */
1216 0 /* limit granularity (byte/page units)*/ },
1217 /* Data Descriptor for user */
1218{ 0x0, /* segment base address */
1219 0xfffff, /* length - all address space */
1220 SDT_MEMRWA, /* segment type */
1221 SEL_UPL, /* segment descriptor priority level */
1222 1, /* segment descriptor present */
1223 0, 0,
1224 1, /* default 32 vs 16 bit size */
1225 1 /* limit granularity (byte/page units)*/ },
1226};
1227
1228void
1229setidt(idx, func, typ, dpl, selec)
1230 int idx;
1231 inthand_t *func;
1232 int typ;
1233 int dpl;
1234 int selec;
1235{
1236 struct gate_descriptor *ip;
1237
1238 ip = idt + idx;
1239 ip->gd_looffset = (int)func;
1240 ip->gd_selector = selec;
1241 ip->gd_stkcpy = 0;
1242 ip->gd_xx = 0;
1243 ip->gd_type = typ;
1244 ip->gd_dpl = dpl;
1245 ip->gd_p = 1;
1246 ip->gd_hioffset = ((int)func)>>16 ;
1247}
1248
1249#define IDTVEC(name) __CONCAT(X,name)
1250
1251extern inthand_t
1252 IDTVEC(div), IDTVEC(dbg), IDTVEC(nmi), IDTVEC(bpt), IDTVEC(ofl),
1253 IDTVEC(bnd), IDTVEC(ill), IDTVEC(dna), IDTVEC(fpusegm),
1254 IDTVEC(tss), IDTVEC(missing), IDTVEC(stk), IDTVEC(prot),
f7bc9806
MD
1255 IDTVEC(page), IDTVEC(mchk), IDTVEC(fpu), IDTVEC(align),
1256 IDTVEC(xmm), IDTVEC(syscall),
1257 IDTVEC(rsvd0);
a64ba182 1258extern inthand_t
7062f5b4
EN
1259 IDTVEC(int0x80_syscall), IDTVEC(int0x81_syscall),
1260 IDTVEC(int0x82_syscall);
984263bc 1261
f7bc9806
MD
1262#ifdef DEBUG_INTERRUPTS
1263extern inthand_t *Xrsvdary[256];
1264#endif
1265
984263bc
MD
1266void
1267sdtossd(sd, ssd)
1268 struct segment_descriptor *sd;
1269 struct soft_segment_descriptor *ssd;
1270{
1271 ssd->ssd_base = (sd->sd_hibase << 24) | sd->sd_lobase;
1272 ssd->ssd_limit = (sd->sd_hilimit << 16) | sd->sd_lolimit;
1273 ssd->ssd_type = sd->sd_type;
1274 ssd->ssd_dpl = sd->sd_dpl;
1275 ssd->ssd_p = sd->sd_p;
1276 ssd->ssd_def32 = sd->sd_def32;
1277 ssd->ssd_gran = sd->sd_gran;
1278}
1279
1280#define PHYSMAP_SIZE (2 * 8)
1281
1282/*
1283 * Populate the (physmap) array with base/bound pairs describing the
1284 * available physical memory in the system, then test this memory and
1285 * build the phys_avail array describing the actually-available memory.
1286 *
1287 * If we cannot accurately determine the physical memory map, then use
1288 * value from the 0xE801 call, and failing that, the RTC.
1289 *
1290 * Total memory size may be set by the kernel environment variable
1291 * hw.physmem or the compile-time define MAXMEM.
1292 */
1293static void
1294getmemsize(int first)
1295{
1296 int i, physmap_idx, pa_indx;
1297 int hasbrokenint12;
1298 u_int basemem, extmem;
1299 struct vm86frame vmf;
1300 struct vm86context vmc;
1301 vm_offset_t pa, physmap[PHYSMAP_SIZE];
b5b32410 1302 pt_entry_t *pte;
984263bc
MD
1303 const char *cp;
1304 struct {
1305 u_int64_t base;
1306 u_int64_t length;
1307 u_int32_t type;
1308 } *smap;
28abdbbb 1309 quad_t dcons_addr, dcons_size;
984263bc
MD
1310
1311 hasbrokenint12 = 0;
1312 TUNABLE_INT_FETCH("hw.hasbrokenint12", &hasbrokenint12);
1313 bzero(&vmf, sizeof(struct vm86frame));
1314 bzero(physmap, sizeof(physmap));
1315 basemem = 0;
1316
1317 /*
1318 * Some newer BIOSes has broken INT 12H implementation which cause
1319 * kernel panic immediately. In this case, we need to scan SMAP
1320 * with INT 15:E820 first, then determine base memory size.
1321 */
1322 if (hasbrokenint12) {
1323 goto int15e820;
1324 }
1325
1326 /*
7febcc6e
MD
1327 * Perform "base memory" related probes & setup. If we get a crazy
1328 * value give the bios some scribble space just in case.
984263bc
MD
1329 */
1330 vm86_intcall(0x12, &vmf);
1331 basemem = vmf.vmf_ax;
1332 if (basemem > 640) {
7febcc6e
MD
1333 printf("Preposterous BIOS basemem of %uK, "
1334 "truncating to < 640K\n", basemem);
1335 basemem = 636;
984263bc
MD
1336 }
1337
1338 /*
1339 * XXX if biosbasemem is now < 640, there is a `hole'
1340 * between the end of base memory and the start of
1341 * ISA memory. The hole may be empty or it may
1342 * contain BIOS code or data. Map it read/write so
1343 * that the BIOS can write to it. (Memory from 0 to
1344 * the physical end of the kernel is mapped read-only
1345 * to begin with and then parts of it are remapped.
1346 * The parts that aren't remapped form holes that
1347 * remain read-only and are unused by the kernel.
1348 * The base memory area is below the physical end of
1349 * the kernel and right now forms a read-only hole.
1350 * The part of it from PAGE_SIZE to
1351 * (trunc_page(biosbasemem * 1024) - 1) will be
1352 * remapped and used by the kernel later.)
1353 *
1354 * This code is similar to the code used in
1355 * pmap_mapdev, but since no memory needs to be
1356 * allocated we simply change the mapping.
1357 */
1358 for (pa = trunc_page(basemem * 1024);
1359 pa < ISA_HOLE_START; pa += PAGE_SIZE) {
b5b32410 1360 pte = vtopte(pa + KERNBASE);
984263bc
MD
1361 *pte = pa | PG_RW | PG_V;
1362 }
1363
1364 /*
1365 * if basemem != 640, map pages r/w into vm86 page table so
1366 * that the bios can scribble on it.
1367 */
b5b32410 1368 pte = vm86paddr;
984263bc
MD
1369 for (i = basemem / 4; i < 160; i++)
1370 pte[i] = (i << PAGE_SHIFT) | PG_V | PG_RW | PG_U;
1371
1372int15e820:
1373 /*
1374 * map page 1 R/W into the kernel page table so we can use it
1375 * as a buffer. The kernel will unmap this page later.
1376 */
b5b32410 1377 pte = vtopte(KERNBASE + (1 << PAGE_SHIFT));
984263bc
MD
1378 *pte = (1 << PAGE_SHIFT) | PG_RW | PG_V;
1379
1380 /*
1381 * get memory map with INT 15:E820
1382 */
1383#define SMAPSIZ sizeof(*smap)
1384#define SMAP_SIG 0x534D4150 /* 'SMAP' */
1385
1386 vmc.npages = 0;
1387 smap = (void *)vm86_addpage(&vmc, 1, KERNBASE + (1 << PAGE_SHIFT));
1388 vm86_getptr(&vmc, (vm_offset_t)smap, &vmf.vmf_es, &vmf.vmf_di);
1389
1390 physmap_idx = 0;
1391 vmf.vmf_ebx = 0;
1392 do {
1393 vmf.vmf_eax = 0xE820;
1394 vmf.vmf_edx = SMAP_SIG;
1395 vmf.vmf_ecx = SMAPSIZ;
1396 i = vm86_datacall(0x15, &vmf, &vmc);
1397 if (i || vmf.vmf_eax != SMAP_SIG)
1398 break;
1399 if (boothowto & RB_VERBOSE)
1400 printf("SMAP type=%02x base=%08x %08x len=%08x %08x\n",
1401 smap->type,
1402 *(u_int32_t *)((char *)&smap->base + 4),
1403 (u_int32_t)smap->base,
1404 *(u_int32_t *)((char *)&smap->length + 4),
1405 (u_int32_t)smap->length);
1406
1407 if (smap->type != 0x01)
1408 goto next_run;
1409
1410 if (smap->length == 0)
1411 goto next_run;
1412
1413 if (smap->base >= 0xffffffff) {
1414 printf("%uK of memory above 4GB ignored\n",
1415 (u_int)(smap->length / 1024));
1416 goto next_run;
1417 }
1418
1419 for (i = 0; i <= physmap_idx; i += 2) {
1420 if (smap->base < physmap[i + 1]) {
1421 if (boothowto & RB_VERBOSE)
1422 printf(
1423 "Overlapping or non-montonic memory region, ignoring second region\n");
1424 goto next_run;
1425 }
1426 }
1427
1428 if (smap->base == physmap[physmap_idx + 1]) {
1429 physmap[physmap_idx + 1] += smap->length;
1430 goto next_run;
1431 }
1432
1433 physmap_idx += 2;
1434 if (physmap_idx == PHYSMAP_SIZE) {
1435 printf(
1436 "Too many segments in the physical address map, giving up\n");
1437 break;
1438 }
1439 physmap[physmap_idx] = smap->base;
1440 physmap[physmap_idx + 1] = smap->base + smap->length;
1441next_run:
6b08710e 1442 ; /* fix GCC3.x warning */
984263bc
MD
1443 } while (vmf.vmf_ebx != 0);
1444
1445 /*
1446 * Perform "base memory" related probes & setup based on SMAP
1447 */
1448 if (basemem == 0) {
1449 for (i = 0; i <= physmap_idx; i += 2) {
1450 if (physmap[i] == 0x00000000) {
1451 basemem = physmap[i + 1] / 1024;
1452 break;
1453 }
1454 }
1455
1456 if (basemem == 0) {
1457 basemem = 640;
1458 }
1459
1460 if (basemem > 640) {
1461 printf("Preposterous BIOS basemem of %uK, truncating to 640K\n",
1462 basemem);
1463 basemem = 640;
1464 }
1465
1466 for (pa = trunc_page(basemem * 1024);
1467 pa < ISA_HOLE_START; pa += PAGE_SIZE) {
b5b32410 1468 pte = vtopte(pa + KERNBASE);
984263bc
MD
1469 *pte = pa | PG_RW | PG_V;
1470 }
1471
b5b32410 1472 pte = vm86paddr;
984263bc
MD
1473 for (i = basemem / 4; i < 160; i++)
1474 pte[i] = (i << PAGE_SHIFT) | PG_V | PG_RW | PG_U;
1475 }
1476
1477 if (physmap[1] != 0)
1478 goto physmap_done;
1479
1480 /*
1481 * If we failed above, try memory map with INT 15:E801
1482 */
1483 vmf.vmf_ax = 0xE801;
1484 if (vm86_intcall(0x15, &vmf) == 0) {
1485 extmem = vmf.vmf_cx + vmf.vmf_dx * 64;
1486 } else {
1487#if 0
1488 vmf.vmf_ah = 0x88;
1489 vm86_intcall(0x15, &vmf);
1490 extmem = vmf.vmf_ax;
1491#else
1492 /*
1493 * Prefer the RTC value for extended memory.
1494 */
1495 extmem = rtcin(RTC_EXTLO) + (rtcin(RTC_EXTHI) << 8);
1496#endif
1497 }
1498
1499 /*
1500 * Special hack for chipsets that still remap the 384k hole when
1501 * there's 16MB of memory - this really confuses people that
1502 * are trying to use bus mastering ISA controllers with the
1503 * "16MB limit"; they only have 16MB, but the remapping puts
1504 * them beyond the limit.
1505 *
1506 * If extended memory is between 15-16MB (16-17MB phys address range),
1507 * chop it to 15MB.
1508 */
1509 if ((extmem > 15 * 1024) && (extmem < 16 * 1024))
1510 extmem = 15 * 1024;
1511
1512 physmap[0] = 0;
1513 physmap[1] = basemem * 1024;
1514 physmap_idx = 2;
1515 physmap[physmap_idx] = 0x100000;
1516 physmap[physmap_idx + 1] = physmap[physmap_idx] + extmem * 1024;
1517
1518physmap_done:
1519 /*
1520 * Now, physmap contains a map of physical memory.
1521 */
1522
1523#ifdef SMP
17a9f566 1524 /* make hole for AP bootstrap code YYY */
984263bc
MD
1525 physmap[1] = mp_bootaddress(physmap[1] / 1024);
1526
1527 /* look for the MP hardware - needed for apic addresses */
1528 mp_probe();
1529#endif
1530
1531 /*
1532 * Maxmem isn't the "maximum memory", it's one larger than the
1533 * highest page of the physical address space. It should be
1534 * called something like "Maxphyspage". We may adjust this
1535 * based on ``hw.physmem'' and the results of the memory test.
1536 */
1537 Maxmem = atop(physmap[physmap_idx + 1]);
1538
1539#ifdef MAXMEM
1540 Maxmem = MAXMEM / 4;
1541#endif
1542
1543 /*
eb7d35b8 1544 * hw.physmem is a size in bytes; we also allow k, m, and g suffixes
984263bc
MD
1545 * for the appropriate modifiers. This overrides MAXMEM.
1546 */
1547 if ((cp = getenv("hw.physmem")) != NULL) {
1548 u_int64_t AllowMem, sanity;
1549 char *ep;
1550
1551 sanity = AllowMem = strtouq(cp, &ep, 0);
1552 if ((ep != cp) && (*ep != 0)) {
1553 switch(*ep) {
1554 case 'g':
1555 case 'G':
1556 AllowMem <<= 10;
1557 case 'm':
1558 case 'M':
1559 AllowMem <<= 10;
1560 case 'k':
1561 case 'K':
1562 AllowMem <<= 10;
1563 break;
1564 default:
1565 AllowMem = sanity = 0;
1566 }
1567 if (AllowMem < sanity)
1568 AllowMem = 0;
1569 }
1570 if (AllowMem == 0)
1571 printf("Ignoring invalid memory size of '%s'\n", cp);
1572 else
1573 Maxmem = atop(AllowMem);
1574 }
1575
1576 if (atop(physmap[physmap_idx + 1]) != Maxmem &&
1577 (boothowto & RB_VERBOSE))
6ef943a3 1578 printf("Physical memory use set to %lluK\n", Maxmem * 4);
984263bc
MD
1579
1580 /*
1581 * If Maxmem has been increased beyond what the system has detected,
1582 * extend the last memory segment to the new limit.
1583 */
1584 if (atop(physmap[physmap_idx + 1]) < Maxmem)
1585 physmap[physmap_idx + 1] = ptoa(Maxmem);
1586
1587 /* call pmap initialization to make new kernel address space */
1588 pmap_bootstrap(first, 0);
1589
1590 /*
1591 * Size up each available chunk of physical memory.
1592 */
1593 physmap[0] = PAGE_SIZE; /* mask off page 0 */
1594 pa_indx = 0;
1595 phys_avail[pa_indx++] = physmap[0];
1596 phys_avail[pa_indx] = physmap[0];
b5b32410 1597 pte = CMAP1;
984263bc 1598
28abdbbb
HS
1599 /*
1600 * Get dcons buffer address
1601 */
1602 if (getenv_quad("dcons.addr", &dcons_addr) == 0 ||
1603 getenv_quad("dcons.size", &dcons_size) == 0)
1604 dcons_addr = 0;
1605
984263bc
MD
1606 /*
1607 * physmap is in bytes, so when converting to page boundaries,
1608 * round up the start address and round down the end address.
1609 */
1610 for (i = 0; i <= physmap_idx; i += 2) {
1611 vm_offset_t end;
1612
1613 end = ptoa(Maxmem);
1614 if (physmap[i + 1] < end)
1615 end = trunc_page(physmap[i + 1]);
1616 for (pa = round_page(physmap[i]); pa < end; pa += PAGE_SIZE) {
1617 int tmp, page_bad;
1618#if 0
1619 int *ptr = 0;
1620#else
1621 int *ptr = (int *)CADDR1;
1622#endif
1623
1624 /*
1625 * block out kernel memory as not available.
1626 */
1627 if (pa >= 0x100000 && pa < first)
1628 continue;
1629
28abdbbb
HS
1630 /*
1631 * block out dcons buffer
1632 */
1633 if (dcons_addr > 0
1634 && pa >= trunc_page(dcons_addr)
1635 && pa < dcons_addr + dcons_size)
1636 continue;
1637
984263bc
MD
1638 page_bad = FALSE;
1639
1640 /*
1641 * map page into kernel: valid, read/write,non-cacheable
1642 */
1643 *pte = pa | PG_V | PG_RW | PG_N;
0f7a3396 1644 cpu_invltlb();
984263bc
MD
1645
1646 tmp = *(int *)ptr;
1647 /*
1648 * Test for alternating 1's and 0's
1649 */
1650 *(volatile int *)ptr = 0xaaaaaaaa;
1651 if (*(volatile int *)ptr != 0xaaaaaaaa) {
1652 page_bad = TRUE;
1653 }
1654 /*
1655 * Test for alternating 0's and 1's
1656 */
1657 *(volatile int *)ptr = 0x55555555;
1658 if (*(volatile int *)ptr != 0x55555555) {
1659 page_bad = TRUE;
1660 }
1661 /*
1662 * Test for all 1's
1663 */
1664 *(volatile int *)ptr = 0xffffffff;
1665 if (*(volatile int *)ptr != 0xffffffff) {
1666 page_bad = TRUE;
1667 }
1668 /*
1669 * Test for all 0's
1670 */
1671 *(volatile int *)ptr = 0x0;
1672 if (*(volatile int *)ptr != 0x0) {
1673 page_bad = TRUE;
1674 }
1675 /*
1676 * Restore original value.
1677 */
1678 *(int *)ptr = tmp;
1679
1680 /*
1681 * Adjust array of valid/good pages.
1682 */
1683 if (page_bad == TRUE) {
1684 continue;
1685 }
1686 /*
1687 * If this good page is a continuation of the
1688 * previous set of good pages, then just increase
1689 * the end pointer. Otherwise start a new chunk.
1690 * Note that "end" points one higher than end,
1691 * making the range >= start and < end.
1692 * If we're also doing a speculative memory
1693 * test and we at or past the end, bump up Maxmem
1694 * so that we keep going. The first bad page
1695 * will terminate the loop.
1696 */
1697 if (phys_avail[pa_indx] == pa) {
1698 phys_avail[pa_indx] += PAGE_SIZE;
1699 } else {
1700 pa_indx++;
1701 if (pa_indx == PHYS_AVAIL_ARRAY_END) {
1702 printf("Too many holes in the physical address space, giving up\n");
1703 pa_indx--;
1704 break;
1705 }
1706 phys_avail[pa_indx++] = pa; /* start */
1707 phys_avail[pa_indx] = pa + PAGE_SIZE; /* end */
1708 }
1709 physmem++;
1710 }
1711 }
1712 *pte = 0;
0f7a3396 1713 cpu_invltlb();
984263bc
MD
1714
1715 /*
1716 * XXX
1717 * The last chunk must contain at least one page plus the message
1718 * buffer to avoid complicating other code (message buffer address
1719 * calculation, etc.).
1720 */
1721 while (phys_avail[pa_indx - 1] + PAGE_SIZE +
1722 round_page(MSGBUF_SIZE) >= phys_avail[pa_indx]) {
1723 physmem -= atop(phys_avail[pa_indx] - phys_avail[pa_indx - 1]);
1724 phys_avail[pa_indx--] = 0;
1725 phys_avail[pa_indx--] = 0;
1726 }
1727
1728 Maxmem = atop(phys_avail[pa_indx]);
1729
1730 /* Trim off space for the message buffer. */
1731 phys_avail[pa_indx] -= round_page(MSGBUF_SIZE);
1732
1733 avail_end = phys_avail[pa_indx];
1734}
1735
f7bc9806
MD
1736/*
1737 * IDT VECTORS:
1738 * 0 Divide by zero
1739 * 1 Debug
1740 * 2 NMI
1741 * 3 BreakPoint
1742 * 4 OverFlow
1743 * 5 Bound-Range
1744 * 6 Invalid OpCode
1745 * 7 Device Not Available (x87)
1746 * 8 Double-Fault
1747 * 9 Coprocessor Segment overrun (unsupported, reserved)
1748 * 10 Invalid-TSS
1749 * 11 Segment not present
1750 * 12 Stack
1751 * 13 General Protection
1752 * 14 Page Fault
1753 * 15 Reserved
1754 * 16 x87 FP Exception pending
1755 * 17 Alignment Check
1756 * 18 Machine Check
1757 * 19 SIMD floating point
1758 * 20-31 reserved
1759 * 32-255 INTn/external sources
1760 */
984263bc 1761void
17a9f566 1762init386(int first)
984263bc
MD
1763{
1764 struct gate_descriptor *gdp;
1765 int gsel_tss, metadata_missing, off, x;
85100692 1766 struct mdglobaldata *gd;
984263bc
MD
1767
1768 /*
1769 * Prevent lowering of the ipl if we call tsleep() early.
1770 */
85100692 1771 gd = &CPU_prvspace[0].mdglobaldata;
8a8d5d85 1772 bzero(gd, sizeof(*gd));
984263bc 1773
85100692 1774 gd->mi.gd_curthread = &thread0;
984263bc
MD
1775
1776 atdevbase = ISA_HOLE_START + KERNBASE;
1777
1778 metadata_missing = 0;
1779 if (bootinfo.bi_modulep) {
1780 preload_metadata = (caddr_t)bootinfo.bi_modulep + KERNBASE;
1781 preload_bootstrap_relocate(KERNBASE);
1782 } else {
1783 metadata_missing = 1;
1784 }
1785 if (bootinfo.bi_envp)
1786 kern_envp = (caddr_t)bootinfo.bi_envp + KERNBASE;
1787
c5cc06e3
MD
1788 /*
1789 * start with one cpu. Note: ncpus2_shift and ncpus2_mask are left
1790 * at 0.
1791 */
4e8e646b 1792 ncpus = 1;
c5cc06e3 1793 ncpus2 = 1;
984263bc
MD
1794 /* Init basic tunables, hz etc */
1795 init_param1();
1796
1797 /*
1798 * make gdt memory segments, the code segment goes up to end of the
1799 * page with etext in it, the data segment goes to the end of
1800 * the address space
1801 */
1802 /*
1803 * XXX text protection is temporarily (?) disabled. The limit was
1804 * i386_btop(round_page(etext)) - 1.
1805 */
1806 gdt_segs[GCODE_SEL].ssd_limit = atop(0 - 1);
1807 gdt_segs[GDATA_SEL].ssd_limit = atop(0 - 1);
17a9f566 1808
984263bc
MD
1809 gdt_segs[GPRIV_SEL].ssd_limit =
1810 atop(sizeof(struct privatespace) - 1);
8ad65e08 1811 gdt_segs[GPRIV_SEL].ssd_base = (int) &CPU_prvspace[0];
984263bc 1812 gdt_segs[GPROC0_SEL].ssd_base =
85100692 1813 (int) &CPU_prvspace[0].mdglobaldata.gd_common_tss;
17a9f566 1814
85100692 1815 gd->mi.gd_prvspace = &CPU_prvspace[0];
17a9f566 1816
84b592ba
MD
1817 /*
1818 * Note: on both UP and SMP curthread must be set non-NULL
1819 * early in the boot sequence because the system assumes
1820 * that 'curthread' is never NULL.
1821 */
984263bc
MD
1822
1823 for (x = 0; x < NGDT; x++) {
1824#ifdef BDE_DEBUGGER
1825 /* avoid overwriting db entries with APM ones */
1826 if (x >= GAPMCODE32_SEL && x <= GAPMDATA_SEL)
1827 continue;
1828#endif
1829 ssdtosd(&gdt_segs[x], &gdt[x].sd);
1830 }
1831
1832 r_gdt.rd_limit = NGDT * sizeof(gdt[0]) - 1;
1833 r_gdt.rd_base = (int) gdt;
1834 lgdt(&r_gdt);
1835
73e4f7b9
MD
1836 mi_gdinit(&gd->mi, 0);
1837 cpu_gdinit(gd, 0);
f470d0c8 1838 lwkt_init_thread(&thread0, proc0paddr, LWKT_THREAD_STACK, 0, &gd->mi);
73e4f7b9
MD
1839 lwkt_set_comm(&thread0, "thread0");
1840 proc0.p_addr = (void *)thread0.td_kstack;
1841 proc0.p_thread = &thread0;
98a7f915 1842 varsymset_init(&proc0.p_varsymset, NULL);
d9eea1a5 1843 thread0.td_flags |= TDF_RUNNING;
73e4f7b9
MD
1844 thread0.td_proc = &proc0;
1845 thread0.td_switch = cpu_heavy_switch; /* YYY eventually LWKT */
1846 safepri = thread0.td_cpl = SWI_MASK | HWI_MASK;
1847
984263bc
MD
1848 /* make ldt memory segments */
1849 /*
1850 * XXX - VM_MAXUSER_ADDRESS is an end address, not a max. And it
1851 * should be spelled ...MAX_USER...
1852 */
1853 ldt_segs[LUCODE_SEL].ssd_limit = atop(VM_MAXUSER_ADDRESS - 1);
1854 ldt_segs[LUDATA_SEL].ssd_limit = atop(VM_MAXUSER_ADDRESS - 1);
1855 for (x = 0; x < sizeof ldt_segs / sizeof ldt_segs[0]; x++)
1856 ssdtosd(&ldt_segs[x], &ldt[x].sd);
1857
1858 _default_ldt = GSEL(GLDT_SEL, SEL_KPL);
1859 lldt(_default_ldt);
17a9f566 1860 gd->gd_currentldt = _default_ldt;
8a8d5d85
MD
1861 /* spinlocks and the BGL */
1862 init_locks();
984263bc
MD
1863
1864 /* exceptions */
f7bc9806
MD
1865 for (x = 0; x < NIDT; x++) {
1866#ifdef DEBUG_INTERRUPTS
1867 setidt(x, Xrsvdary[x], SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL));
1868#else
1869 setidt(x, &IDTVEC(rsvd0), SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL));
1870#endif
1871 }
984263bc
MD
1872 setidt(0, &IDTVEC(div), SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL));
1873 setidt(1, &IDTVEC(dbg), SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL));
1874 setidt(2, &IDTVEC(nmi), SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL));
1875 setidt(3, &IDTVEC(bpt), SDT_SYS386TGT, SEL_UPL, GSEL(GCODE_SEL, SEL_KPL));
1876 setidt(4, &IDTVEC(ofl), SDT_SYS386TGT, SEL_UPL, GSEL(GCODE_SEL, SEL_KPL));
1877 setidt(5, &IDTVEC(bnd), SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL));
1878 setidt(6, &IDTVEC(ill), SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL));
1879 setidt(7, &IDTVEC(dna), SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL));
1880 setidt(8, 0, SDT_SYSTASKGT, SEL_KPL, GSEL(GPANIC_SEL, SEL_KPL));
1881 setidt(9, &IDTVEC(fpusegm), SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL));
1882 setidt(10, &IDTVEC(tss), SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL));
1883 setidt(11, &IDTVEC(missing), SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL));
1884 setidt(12, &IDTVEC(stk), SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL));
1885 setidt(13, &IDTVEC(prot), SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL));
1886 setidt(14, &IDTVEC(page), SDT_SYS386IGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL));
f7bc9806 1887 setidt(15, &IDTVEC(rsvd0), SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL));
984263bc
MD
1888 setidt(16, &IDTVEC(fpu), SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL));
1889 setidt(17, &IDTVEC(align), SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL));
1890 setidt(18, &IDTVEC(mchk), SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL));
1891 setidt(19, &IDTVEC(xmm), SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL));
1892 setidt(0x80, &IDTVEC(int0x80_syscall),
1893 SDT_SYS386TGT, SEL_UPL, GSEL(GCODE_SEL, SEL_KPL));
a64ba182
MD
1894 setidt(0x81, &IDTVEC(int0x81_syscall),
1895 SDT_SYS386TGT, SEL_UPL, GSEL(GCODE_SEL, SEL_KPL));
7062f5b4
EN
1896 setidt(0x82, &IDTVEC(int0x82_syscall),
1897 SDT_SYS386TGT, SEL_UPL, GSEL(GCODE_SEL, SEL_KPL));
984263bc
MD
1898
1899 r_idt.rd_limit = sizeof(idt0) - 1;
1900 r_idt.rd_base = (int) idt;
1901 lidt(&r_idt);
1902
1903 /*
1904 * Initialize the console before we print anything out.
1905 */
1906 cninit();
1907
1908 if (metadata_missing)
1909 printf("WARNING: loader(8) metadata is missing!\n");
1910
984263bc
MD
1911#if NISA >0
1912 isa_defaultirq();
1913#endif
1914 rand_initialize();
1915
1916#ifdef DDB
1917 kdb_init();
1918 if (boothowto & RB_KDB)
1919 Debugger("Boot flags requested debugger");
1920#endif
1921
1922 finishidentcpu(); /* Final stage of CPU initialization */
1923 setidt(6, &IDTVEC(ill), SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL));
1924 setidt(13, &IDTVEC(prot), SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL));
1925 initializecpu(); /* Initialize CPU registers */
1926
b7c628e4
MD
1927 /*
1928 * make an initial tss so cpu can get interrupt stack on syscall!
1929 * The 16 bytes is to save room for a VM86 context.
1930 */
17a9f566
MD
1931 gd->gd_common_tss.tss_esp0 = (int) thread0.td_pcb - 16;
1932 gd->gd_common_tss.tss_ss0 = GSEL(GDATA_SEL, SEL_KPL) ;
984263bc 1933 gsel_tss = GSEL(GPROC0_SEL, SEL_KPL);
17a9f566
MD
1934 gd->gd_tss_gdt = &gdt[GPROC0_SEL].sd;
1935 gd->gd_common_tssd = *gd->gd_tss_gdt;
85100692 1936 gd->gd_common_tss.tss_ioopt = (sizeof gd->gd_common_tss) << 16;
984263bc
MD
1937 ltr(gsel_tss);
1938
1939 dblfault_tss.tss_esp = dblfault_tss.tss_esp0 = dblfault_tss.tss_esp1 =
1940 dblfault_tss.tss_esp2 = (int) &dblfault_stack[sizeof(dblfault_stack)];
1941 dblfault_tss.tss_ss = dblfault_tss.tss_ss0 = dblfault_tss.tss_ss1 =
1942 dblfault_tss.tss_ss2 = GSEL(GDATA_SEL, SEL_KPL);
1943 dblfault_tss.tss_cr3 = (int)IdlePTD;
1944 dblfault_tss.tss_eip = (int) dblfault_handler;
1945 dblfault_tss.tss_eflags = PSL_KERNEL;
1946 dblfault_tss.tss_ds = dblfault_tss.tss_es =
1947 dblfault_tss.tss_gs = GSEL(GDATA_SEL, SEL_KPL);
1948 dblfault_tss.tss_fs = GSEL(GPRIV_SEL, SEL_KPL);
1949 dblfault_tss.tss_cs = GSEL(GCODE_SEL, SEL_KPL);
1950 dblfault_tss.tss_ldt = GSEL(GLDT_SEL, SEL_KPL);
1951
1952 vm86_initialize();
1953 getmemsize(first);
1954 init_param2(physmem);
1955
1956 /* now running on new page tables, configured,and u/iom is accessible */
1957
1958 /* Map the message buffer. */
1959 for (off = 0; off < round_page(MSGBUF_SIZE); off += PAGE_SIZE)
1960 pmap_kenter((vm_offset_t)msgbufp + off, avail_end + off);
1961
1962 msgbufinit(msgbufp, MSGBUF_SIZE);
1963
1964 /* make a call gate to reenter kernel with */
1965 gdp = &ldt[LSYS5CALLS_SEL].gd;
1966
1967 x = (int) &IDTVEC(syscall);
1968 gdp->gd_looffset = x++;
1969 gdp->gd_selector = GSEL(GCODE_SEL,SEL_KPL);
1970 gdp->gd_stkcpy = 1;
1971 gdp->gd_type = SDT_SYS386CGT;
1972 gdp->gd_dpl = SEL_UPL;
1973 gdp->gd_p = 1;
1974 gdp->gd_hioffset = ((int) &IDTVEC(syscall)) >>16;
1975
1976 /* XXX does this work? */
1977 ldt[LBSDICALLS_SEL] = ldt[LSYS5CALLS_SEL];
1978 ldt[LSOL26CALLS_SEL] = ldt[LSYS5CALLS_SEL];
1979
1980 /* transfer to user mode */
1981
1982 _ucodesel = LSEL(LUCODE_SEL, SEL_UPL);
1983 _udatasel = LSEL(LUDATA_SEL, SEL_UPL);
1984
1985 /* setup proc 0's pcb */
b7c628e4
MD
1986 thread0.td_pcb->pcb_flags = 0;
1987 thread0.td_pcb->pcb_cr3 = (int)IdlePTD; /* should already be setup */
b7c628e4 1988 thread0.td_pcb->pcb_ext = 0;
984263bc
MD
1989 proc0.p_md.md_regs = &proc0_tf;
1990}
1991
8ad65e08 1992/*
17a9f566
MD
1993 * Initialize machine-dependant portions of the global data structure.
1994 * Note that the global data area and cpu0's idlestack in the private
1995 * data space were allocated in locore.
ef0fdad1
MD
1996 *
1997 * Note: the idlethread's cpl is 0
73e4f7b9
MD
1998 *
1999 * WARNING! Called from early boot, 'mycpu' may not work yet.
8ad65e08
MD
2000 */
2001void
85100692 2002cpu_gdinit(struct mdglobaldata *gd, int cpu)
8ad65e08 2003{
7d0bac62 2004 if (cpu)
a2a5ad0d 2005 gd->mi.gd_curthread = &gd->mi.gd_idlethread;
17a9f566 2006
f470d0c8
MD
2007 lwkt_init_thread(&gd->mi.gd_idlethread,
2008 gd->mi.gd_prvspace->idlestack,
2009 sizeof(gd->mi.gd_prvspace->idlestack), 0, &gd->mi);
a2a5ad0d
MD
2010 lwkt_set_comm(&gd->mi.gd_idlethread, "idle_%d", cpu);
2011 gd->mi.gd_idlethread.td_switch = cpu_lwkt_switch;
2012 gd->mi.gd_idlethread.td_sp -= sizeof(void *);
2013 *(void **)gd->mi.gd_idlethread.td_sp = cpu_idle_restore;
8ad65e08
MD
2014}
2015
12e4aaff
MD
2016struct globaldata *
2017globaldata_find(int cpu)
2018{
2019 KKASSERT(cpu >= 0 && cpu < ncpus);
2020 return(&CPU_prvspace[cpu].mdglobaldata.mi);
2021}
2022
984263bc
MD
2023#if defined(I586_CPU) && !defined(NO_F00F_HACK)
2024static void f00f_hack(void *unused);
2025SYSINIT(f00f_hack, SI_SUB_INTRINSIC, SI_ORDER_FIRST, f00f_hack, NULL);
2026
2027static void
17a9f566
MD
2028f00f_hack(void *unused)
2029{
984263bc 2030 struct gate_descriptor *new_idt;
984263bc
MD
2031 vm_offset_t tmp;
2032
2033 if (!has_f00f_bug)
2034 return;
2035
2036 printf("Intel Pentium detected, installing workaround for F00F bug\n");
2037
2038 r_idt.rd_limit = sizeof(idt0) - 1;
2039
2040 tmp = kmem_alloc(kernel_map, PAGE_SIZE * 2);
2041 if (tmp == 0)
2042 panic("kmem_alloc returned 0");
2043 if (((unsigned int)tmp & (PAGE_SIZE-1)) != 0)
2044 panic("kmem_alloc returned non-page-aligned memory");
2045 /* Put the first seven entries in the lower page */
2046 new_idt = (struct gate_descriptor*)(tmp + PAGE_SIZE - (7*8));
2047 bcopy(idt, new_idt, sizeof(idt0));
2048 r_idt.rd_base = (int)new_idt;
2049 lidt(&r_idt);
2050 idt = new_idt;
2051 if (vm_map_protect(kernel_map, tmp, tmp + PAGE_SIZE,
2052 VM_PROT_READ, FALSE) != KERN_SUCCESS)
2053 panic("vm_map_protect failed");
2054 return;
2055}
2056#endif /* defined(I586_CPU) && !NO_F00F_HACK */
2057
2058int
2059ptrace_set_pc(p, addr)
2060 struct proc *p;
2061 unsigned long addr;
2062{
2063 p->p_md.md_regs->tf_eip = addr;
2064 return (0);
2065}
2066
2067int
2068ptrace_single_step(p)
2069 struct proc *p;
2070{
2071 p->p_md.md_regs->tf_eflags |= PSL_T;
2072 return (0);
2073}
2074
2075int ptrace_read_u_check(p, addr, len)
2076 struct proc *p;
2077 vm_offset_t addr;
2078 size_t len;
2079{
2080 vm_offset_t gap;
2081
2082 if ((vm_offset_t) (addr + len) < addr)
2083 return EPERM;
2084 if ((vm_offset_t) (addr + len) <= sizeof(struct user))
2085 return 0;
2086
2087 gap = (char *) p->p_md.md_regs - (char *) p->p_addr;
2088
2089 if ((vm_offset_t) addr < gap)
2090 return EPERM;
2091 if ((vm_offset_t) (addr + len) <=
2092 (vm_offset_t) (gap + sizeof(struct trapframe)))
2093 return 0;
2094 return EPERM;
2095}
2096
2097int ptrace_write_u(p, off, data)
2098 struct proc *p;
2099 vm_offset_t off;
2100 long data;
2101{
2102 struct trapframe frame_copy;
2103 vm_offset_t min;
2104 struct trapframe *tp;
2105
2106 /*
2107 * Privileged kernel state is scattered all over the user area.
2108 * Only allow write access to parts of regs and to fpregs.
2109 */
2110 min = (char *)p->p_md.md_regs - (char *)p->p_addr;
2111 if (off >= min && off <= min + sizeof(struct trapframe) - sizeof(int)) {
2112 tp = p->p_md.md_regs;
2113 frame_copy = *tp;
2114 *(int *)((char *)&frame_copy + (off - min)) = data;
2115 if (!EFL_SECURE(frame_copy.tf_eflags, tp->tf_eflags) ||
2116 !CS_SECURE(frame_copy.tf_cs))
2117 return (EINVAL);
2118 *(int*)((char *)p->p_addr + off) = data;
2119 return (0);
2120 }
b7c628e4
MD
2121
2122 /*
2123 * The PCB is at the end of the user area YYY
2124 */
2125 min = (char *)p->p_thread->td_pcb - (char *)p->p_addr;
2126 min += offsetof(struct pcb, pcb_save);
984263bc
MD
2127 if (off >= min && off <= min + sizeof(union savefpu) - sizeof(int)) {
2128 *(int*)((char *)p->p_addr + off) = data;
2129 return (0);
2130 }
2131 return (EFAULT);
2132}
2133
2134int
2135fill_regs(p, regs)
2136 struct proc *p;
2137 struct reg *regs;
2138{
2139 struct pcb *pcb;
2140 struct trapframe *tp;
2141
2142 tp = p->p_md.md_regs;
2143 regs->r_fs = tp->tf_fs;
2144 regs->r_es = tp->tf_es;
2145 regs->r_ds = tp->tf_ds;
2146 regs->r_edi = tp->tf_edi;
2147 regs->r_esi = tp->tf_esi;
2148 regs->r_ebp = tp->tf_ebp;
2149 regs->r_ebx = tp->tf_ebx;
2150 regs->r_edx = tp->tf_edx;
2151 regs->r_ecx = tp->tf_ecx;
2152 regs->r_eax = tp->tf_eax;
2153 regs->r_eip = tp->tf_eip;
2154 regs->r_cs = tp->tf_cs;
2155 regs->r_eflags = tp->tf_eflags;
2156 regs->r_esp = tp->tf_esp;
2157 regs->r_ss = tp->tf_ss;
b7c628e4 2158 pcb = p->p_thread->td_pcb;
984263bc
MD
2159 regs->r_gs = pcb->pcb_gs;
2160 return (0);
2161}
2162
2163int
2164set_regs(p, regs)
2165 struct proc *p;
2166 struct reg *regs;
2167{
2168 struct pcb *pcb;
2169 struct trapframe *tp;
2170
2171 tp = p->p_md.md_regs;
2172 if (!EFL_SECURE(regs->r_eflags, tp->tf_eflags) ||
2173 !CS_SECURE(regs->r_cs))
2174 return (EINVAL);
2175 tp->tf_fs = regs->r_fs;
2176 tp->tf_es = regs->r_es;
2177 tp->tf_ds = regs->r_ds;
2178 tp->tf_edi = regs->r_edi;
2179 tp->tf_esi = regs->r_esi;
2180 tp->tf_ebp = regs->r_ebp;
2181 tp->tf_ebx = regs->r_ebx;
2182 tp->tf_edx = regs->r_edx;
2183 tp->tf_ecx = regs->r_ecx;
2184 tp->tf_eax = regs->r_eax;
2185 tp->tf_eip = regs->r_eip;
2186 tp->tf_cs = regs->r_cs;
2187 tp->tf_eflags = regs->r_eflags;
2188 tp->tf_esp = regs->r_esp;
2189 tp->tf_ss = regs->r_ss;
b7c628e4 2190 pcb = p->p_thread->td_pcb;
984263bc
MD
2191 pcb->pcb_gs = regs->r_gs;
2192 return (0);
2193}
2194
642a6e88 2195#ifndef CPU_DISABLE_SSE
984263bc
MD
2196static void
2197fill_fpregs_xmm(sv_xmm, sv_87)
2198 struct savexmm *sv_xmm;
2199 struct save87 *sv_87;
2200{
c9faf524
RG
2201 struct env87 *penv_87 = &sv_87->sv_env;
2202 struct envxmm *penv_xmm = &sv_xmm->sv_env;
984263bc
MD
2203 int i;
2204
2205 /* FPU control/status */
2206 penv_87->en_cw = penv_xmm->en_cw;
2207 penv_87->en_sw = penv_xmm->en_sw;
2208 penv_87->en_tw = penv_xmm->en_tw;
2209 penv_87->en_fip = penv_xmm->en_fip;
2210 penv_87->en_fcs = penv_xmm->en_fcs;
2211 penv_87->en_opcode = penv_xmm->en_opcode;
2212 penv_87->en_foo = penv_xmm->en_foo;
2213 penv_87->en_fos = penv_xmm->en_fos;
2214
2215 /* FPU registers */
2216 for (i = 0; i < 8; ++i)
2217 sv_87->sv_ac[i] = sv_xmm->sv_fp[i].fp_acc;
2218
2219 sv_87->sv_ex_sw = sv_xmm->sv_ex_sw;
2220}
2221
2222static void
2223set_fpregs_xmm(sv_87, sv_xmm)
2224 struct save87 *sv_87;
2225 struct savexmm *sv_xmm;
2226{
c9faf524
RG
2227 struct env87 *penv_87 = &sv_87->sv_env;
2228 struct envxmm *penv_xmm = &sv_xmm->sv_env;
984263bc
MD
2229 int i;
2230
2231 /* FPU control/status */
2232 penv_xmm->en_cw = penv_87->en_cw;
2233 penv_xmm->en_sw = penv_87->en_sw;
2234 penv_xmm->en_tw = penv_87->en_tw;
2235 penv_xmm->en_fip = penv_87->en_fip;
2236 penv_xmm->en_fcs = penv_87->en_fcs;
2237 penv_xmm->en_opcode = penv_87->en_opcode;
2238 penv_xmm->en_foo = penv_87->en_foo;
2239 penv_xmm->en_fos = penv_87->en_fos;
2240
2241 /* FPU registers */
2242 for (i = 0; i < 8; ++i)
2243 sv_xmm->sv_fp[i].fp_acc = sv_87->sv_ac[i];
2244
2245 sv_xmm->sv_ex_sw = sv_87->sv_ex_sw;
2246}
642a6e88 2247#endif /* CPU_DISABLE_SSE */
984263bc
MD
2248
2249int
2250fill_fpregs(p, fpregs)
2251 struct proc *p;
2252 struct fpreg *fpregs;
2253{
642a6e88 2254#ifndef CPU_DISABLE_SSE
984263bc 2255 if (cpu_fxsr) {
b7c628e4 2256 fill_fpregs_xmm(&p->p_thread->td_pcb->pcb_save.sv_xmm,
984263bc
MD
2257 (struct save87 *)fpregs);
2258 return (0);
2259 }
642a6e88 2260#endif /* CPU_DISABLE_SSE */
b7c628e4 2261 bcopy(&p->p_thread->td_pcb->pcb_save.sv_87, fpregs, sizeof *fpregs);
984263bc
MD
2262 return (0);
2263}
2264
2265int
2266set_fpregs(p, fpregs)
2267 struct proc *p;
2268 struct fpreg *fpregs;
2269{
642a6e88 2270#ifndef CPU_DISABLE_SSE
984263bc
MD
2271 if (cpu_fxsr) {
2272 set_fpregs_xmm((struct save87 *)fpregs,
b7c628e4 2273 &p->p_thread->td_pcb->pcb_save.sv_xmm);
984263bc
MD
2274 return (0);
2275 }
642a6e88 2276#endif /* CPU_DISABLE_SSE */
b7c628e4 2277 bcopy(fpregs, &p->p_thread->td_pcb->pcb_save.sv_87, sizeof *fpregs);
984263bc
MD
2278 return (0);
2279}
2280
2281int
2282fill_dbregs(p, dbregs)
2283 struct proc *p;
2284 struct dbreg *dbregs;
2285{
2286 struct pcb *pcb;
2287
2288 if (p == NULL) {
2289 dbregs->dr0 = rdr0();
2290 dbregs->dr1 = rdr1();
2291 dbregs->dr2 = rdr2();
2292 dbregs->dr3 = rdr3();
2293 dbregs->dr4 = rdr4();
2294 dbregs->dr5 = rdr5();
2295 dbregs->dr6 = rdr6();
2296 dbregs->dr7 = rdr7();
2297 }
2298 else {
b7c628e4 2299 pcb = p->p_thread->td_pcb;
984263bc
MD
2300 dbregs->dr0 = pcb->pcb_dr0;
2301 dbregs->dr1 = pcb->pcb_dr1;
2302 dbregs->dr2 = pcb->pcb_dr2;
2303 dbregs->dr3 = pcb->pcb_dr3;
2304 dbregs->dr4 = 0;
2305 dbregs->dr5 = 0;
2306 dbregs->dr6 = pcb->pcb_dr6;
2307 dbregs->dr7 = pcb->pcb_dr7;
2308 }
2309 return (0);
2310}
2311
2312int
2313set_dbregs(p, dbregs)
2314 struct proc *p;
2315 struct dbreg *dbregs;
2316{
2317 struct pcb *pcb;
2318 int i;
2319 u_int32_t mask1, mask2;
2320
2321 if (p == NULL) {
2322 load_dr0(dbregs->dr0);
2323 load_dr1(dbregs->dr1);
2324 load_dr2(dbregs->dr2);
2325 load_dr3(dbregs->dr3);
2326 load_dr4(dbregs->dr4);
2327 load_dr5(dbregs->dr5);
2328 load_dr6(dbregs->dr6);
2329 load_dr7(dbregs->dr7);
2330 }
2331 else {
2332 /*
2333 * Don't let an illegal value for dr7 get set. Specifically,
2334 * check for undefined settings. Setting these bit patterns
2335 * result in undefined behaviour and can lead to an unexpected
2336 * TRCTRAP.
2337 */
2338 for (i = 0, mask1 = 0x3<<16, mask2 = 0x2<<16; i < 8;
2339 i++, mask1 <<= 2, mask2 <<= 2)
2340 if ((dbregs->dr7 & mask1) == mask2)
2341 return (EINVAL);
2342
b7c628e4 2343 pcb = p->p_thread->td_pcb;
984263bc
MD
2344
2345 /*
2346 * Don't let a process set a breakpoint that is not within the
2347 * process's address space. If a process could do this, it
2348 * could halt the system by setting a breakpoint in the kernel
2349 * (if ddb was enabled). Thus, we need to check to make sure
2350 * that no breakpoints are being enabled for addresses outside
2351 * process's address space, unless, perhaps, we were called by
2352 * uid 0.
2353 *
2354 * XXX - what about when the watched area of the user's
2355 * address space is written into from within the kernel
2356 * ... wouldn't that still cause a breakpoint to be generated
2357 * from within kernel mode?
2358 */
2359
dadab5e9 2360 if (suser_cred(p->p_ucred, 0) != 0) {
984263bc
MD
2361 if (dbregs->dr7 & 0x3) {
2362 /* dr0 is enabled */
2363 if (dbregs->dr0 >= VM_MAXUSER_ADDRESS)
2364 return (EINVAL);
2365 }
2366
2367 if (dbregs->dr7 & (0x3<<2)) {
2368 /* dr1 is enabled */
2369 if (dbregs->dr1 >= VM_MAXUSER_ADDRESS)
2370 return (EINVAL);
2371 }
2372
2373 if (dbregs->dr7 & (0x3<<4)) {
2374 /* dr2 is enabled */
2375 if (dbregs->dr2 >= VM_MAXUSER_ADDRESS)
2376 return (EINVAL);
2377 }
2378
2379 if (dbregs->dr7 & (0x3<<6)) {
2380 /* dr3 is enabled */
2381 if (dbregs->dr3 >= VM_MAXUSER_ADDRESS)
2382 return (EINVAL);
2383 }
2384 }
2385
2386 pcb->pcb_dr0 = dbregs->dr0;
2387 pcb->pcb_dr1 = dbregs->dr1;
2388 pcb->pcb_dr2 = dbregs->dr2;
2389 pcb->pcb_dr3 = dbregs->dr3;
2390 pcb->pcb_dr6 = dbregs->dr6;
2391 pcb->pcb_dr7 = dbregs->dr7;
2392
2393 pcb->pcb_flags |= PCB_DBREGS;
2394 }
2395
2396 return (0);
2397}
2398
2399/*
2400 * Return > 0 if a hardware breakpoint has been hit, and the
2401 * breakpoint was in user space. Return 0, otherwise.
2402 */
2403int
2404user_dbreg_trap(void)
2405{
2406 u_int32_t dr7, dr6; /* debug registers dr6 and dr7 */
2407 u_int32_t bp; /* breakpoint bits extracted from dr6 */
2408 int nbp; /* number of breakpoints that triggered */
2409 caddr_t addr[4]; /* breakpoint addresses */
2410 int i;
2411
2412 dr7 = rdr7();
2413 if ((dr7 & 0x000000ff) == 0) {
2414 /*
2415 * all GE and LE bits in the dr7 register are zero,
2416 * thus the trap couldn't have been caused by the
2417 * hardware debug registers
2418 */
2419 return 0;
2420 }
2421
2422 nbp = 0;
2423 dr6 = rdr6();
2424 bp = dr6 & 0x0000000f;
2425
2426 if (!bp) {
2427 /*
2428 * None of the breakpoint bits are set meaning this
2429 * trap was not caused by any of the debug registers
2430 */
2431 return 0;
2432 }
2433
2434 /*
2435 * at least one of the breakpoints were hit, check to see
2436 * which ones and if any of them are user space addresses
2437 */
2438
2439 if (bp & 0x01) {
2440 addr[nbp++] = (caddr_t)rdr0();
2441 }
2442 if (bp & 0x02) {
2443 addr[nbp++] = (caddr_t)rdr1();
2444 }
2445 if (bp & 0x04) {
2446 addr[nbp++] = (caddr_t)rdr2();
2447 }
2448 if (bp & 0x08) {
2449 addr[nbp++] = (caddr_t)rdr3();
2450 }
2451
2452 for (i=0; i<nbp; i++) {
2453 if (addr[i] <
2454 (caddr_t)VM_MAXUSER_ADDRESS) {
2455 /*
2456 * addr[i] is in user space
2457 */
2458 return nbp;
2459 }
2460 }
2461
2462 /*
2463 * None of the breakpoints are in user space.
2464 */
2465 return 0;
2466}
2467
2468
2469#ifndef DDB
2470void
2471Debugger(const char *msg)
2472{
2473 printf("Debugger(\"%s\") called.\n", msg);
2474}
2475#endif /* no DDB */
2476
f9d8cd12
MD
2477#include <machine/apicvar.h>
2478
2479/*
2480 * Provide stub functions so that the MADT APIC enumerator in the acpi
2481 * kernel module will link against a kernel without 'option APIC_IO'.
2482 *
2483 * XXX - This is a gross hack.
2484 */
2485void
2486apic_register_enumerator(struct apic_enumerator *enumerator)
2487{
2488}
2489
2490void *
2491ioapic_create(uintptr_t addr, int32_t id, int intbase)
2492{
2493 return (NULL);
2494}
2495
2496int
2497ioapic_disable_pin(void *cookie, u_int pin)
2498{
2499 return (ENXIO);
2500}
2501
2502void
2503ioapic_enable_mixed_mode(void)
2504{
2505}
2506
2507int
2508ioapic_get_vector(void *cookie, u_int pin)
2509{
2510 return (-1);
2511}
2512
2513void
2514ioapic_register(void *cookie)
2515{
2516}
2517
2518int
2519ioapic_remap_vector(void *cookie, u_int pin, int vector)
2520{
2521 return (ENXIO);
2522}
2523
2524int
2525ioapic_set_extint(void *cookie, u_int pin)
2526{
2527 return (ENXIO);
2528}
2529
2530int
2531ioapic_set_nmi(void *cookie, u_int pin)
2532{
2533 return (ENXIO);
2534}
2535
2536int
2537ioapic_set_polarity(void *cookie, u_int pin, char activehi)
2538{
2539 return (ENXIO);
2540}
2541
2542int
2543ioapic_set_triggermode(void *cookie, u_int pin, char edgetrigger)
2544{
2545 return (ENXIO);
2546}
2547
2548void
2549lapic_create(u_int apic_id, int boot_cpu)
2550{
2551}
2552
2553void
2554lapic_init(uintptr_t addr)
2555{
2556}
2557
2558int
2559lapic_set_lvt_mode(u_int apic_id, u_int lvt, u_int32_t mode)
2560{
2561 return (ENXIO);
2562}
2563
2564int
2565lapic_set_lvt_polarity(u_int apic_id, u_int lvt, u_char activehi)
2566{
2567 return (ENXIO);
2568}
2569
2570int
2571lapic_set_lvt_triggermode(u_int apic_id, u_int lvt, u_char edgetrigger)
2572{
2573 return (ENXIO);
2574}
f9d8cd12 2575
984263bc
MD
2576#include <sys/disklabel.h>
2577
2578/*
2579 * Determine the size of the transfer, and make sure it is
2580 * within the boundaries of the partition. Adjust transfer
2581 * if needed, and signal errors or early completion.
2582 */
2583int
2584bounds_check_with_label(struct buf *bp, struct disklabel *lp, int wlabel)
2585{
2586 struct partition *p = lp->d_partitions + dkpart(bp->b_dev);
2587 int labelsect = lp->d_partitions[0].p_offset;
2588 int maxsz = p->p_size,
2589 sz = (bp->b_bcount + DEV_BSIZE - 1) >> DEV_BSHIFT;
2590
2591 /* overwriting disk label ? */
2592 /* XXX should also protect bootstrap in first 8K */
2593 if (bp->b_blkno + p->p_offset <= LABELSECTOR + labelsect &&
2594#if LABELSECTOR != 0
2595 bp->b_blkno + p->p_offset + sz > LABELSECTOR + labelsect &&
2596#endif
2597 (bp->b_flags & B_READ) == 0 && wlabel == 0) {
2598 bp->b_error = EROFS;
2599 goto bad;
2600 }
2601
2602#if defined(DOSBBSECTOR) && defined(notyet)
2603 /* overwriting master boot record? */
2604 if (bp->b_blkno + p->p_offset <= DOSBBSECTOR &&
2605 (bp->b_flags & B_READ) == 0 && wlabel == 0) {
2606 bp->b_error = EROFS;
2607 goto bad;
2608 }
2609#endif
2610
2611 /* beyond partition? */
2612 if (bp->b_blkno < 0 || bp->b_blkno + sz > maxsz) {
2613 /* if exactly at end of disk, return an EOF */
2614 if (bp->b_blkno == maxsz) {
2615 bp->b_resid = bp->b_bcount;
2616 return(0);
2617 }
2618 /* or truncate if part of it fits */
2619 sz = maxsz - bp->b_blkno;
2620 if (sz <= 0) {
2621 bp->b_error = EINVAL;
2622 goto bad;
2623 }
2624 bp->b_bcount = sz << DEV_BSHIFT;
2625 }
2626
2627 bp->b_pblkno = bp->b_blkno + p->p_offset;
2628 return(1);
2629
2630bad:
2631 bp->b_flags |= B_ERROR;
2632 return(-1);
2633}
2634
2635#ifdef DDB
2636
2637/*
2638 * Provide inb() and outb() as functions. They are normally only
2639 * available as macros calling inlined functions, thus cannot be
2640 * called inside DDB.
2641 *
2642 * The actual code is stolen from <machine/cpufunc.h>, and de-inlined.
2643 */
2644
2645#undef inb
2646#undef outb
2647
2648/* silence compiler warnings */
2649u_char inb(u_int);
2650void outb(u_int, u_char);
2651
2652u_char
2653inb(u_int port)
2654{
2655 u_char data;
2656 /*
2657 * We use %%dx and not %1 here because i/o is done at %dx and not at
2658 * %edx, while gcc generates inferior code (movw instead of movl)
2659 * if we tell it to load (u_short) port.
2660 */
2661 __asm __volatile("inb %%dx,%0" : "=a" (data) : "d" (port));
2662 return (data);
2663}
2664
2665void
2666outb(u_int port, u_char data)
2667{
2668 u_char al;
2669 /*
2670 * Use an unnecessary assignment to help gcc's register allocator.
2671 * This make a large difference for gcc-1.40 and a tiny difference
2672 * for gcc-2.6.0. For gcc-1.40, al had to be ``asm("ax")'' for
2673 * best results. gcc-2.6.0 can't handle this.
2674 */
2675 al = data;
2676 __asm __volatile("outb %0,%%dx" : : "a" (al), "d" (port));
2677}
2678
2679#endif /* DDB */
8a8d5d85
MD
2680
2681
2682
2683#include "opt_cpu.h"
8a8d5d85
MD
2684
2685
2686/*
2687 * initialize all the SMP locks
2688 */
2689
2690/* critical region around IO APIC, apic_imen */
2691struct spinlock imen_spinlock;
2692
2693/* Make FAST_INTR() routines sequential */
2694struct spinlock fast_intr_spinlock;
2695
2696/* critical region for old style disable_intr/enable_intr */
2697struct spinlock mpintr_spinlock;
2698
2699/* critical region around INTR() routines */
2700struct spinlock intr_spinlock;
2701
2702/* lock region used by kernel profiling */
2703struct spinlock mcount_spinlock;
2704
2705/* locks com (tty) data/hardware accesses: a FASTINTR() */
2706struct spinlock com_spinlock;
2707
2708/* locks kernel printfs */
2709struct spinlock cons_spinlock;
2710
2711/* lock regions around the clock hardware */
2712struct spinlock clock_spinlock;
2713
2714/* lock around the MP rendezvous */
2715struct spinlock smp_rv_spinlock;
2716
2717static void
2718init_locks(void)
2719{
2720 /*
2721 * mp_lock = 0; BSP already owns the MP lock
2722 */
2723 /*
2724 * Get the initial mp_lock with a count of 1 for the BSP.
2725 * This uses a LOGICAL cpu ID, ie BSP == 0.
2726 */
2727#ifdef SMP
2728 cpu_get_initial_mplock();
2729#endif
41a01a4d 2730 /* DEPRECATED */
8a8d5d85
MD
2731 spin_lock_init(&mcount_spinlock);
2732 spin_lock_init(&fast_intr_spinlock);
2733 spin_lock_init(&intr_spinlock);
2734 spin_lock_init(&mpintr_spinlock);
2735 spin_lock_init(&imen_spinlock);
2736 spin_lock_init(&smp_rv_spinlock);
2737 spin_lock_init(&com_spinlock);
2738 spin_lock_init(&clock_spinlock);
2739 spin_lock_init(&cons_spinlock);
41a01a4d
MD
2740
2741 /* our token pool needs to work early */
2742 lwkt_token_pool_init();
8a8d5d85
MD
2743}
2744