Add a new macro IF_LLSOCKADDR which maps a ifnet pointer to the
[dragonfly.git] / sys / dev / netif / an / if_an.c
CommitLineData
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1/*
2 * Copyright (c) 1997, 1998, 1999
3 * Bill Paul <wpaul@ctr.columbia.edu>. All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions
7 * are met:
8 * 1. Redistributions of source code must retain the above copyright
9 * notice, this list of conditions and the following disclaimer.
10 * 2. Redistributions in binary form must reproduce the above copyright
11 * notice, this list of conditions and the following disclaimer in the
12 * documentation and/or other materials provided with the distribution.
13 * 3. All advertising materials mentioning features or use of this software
14 * must display the following acknowledgement:
15 * This product includes software developed by Bill Paul.
16 * 4. Neither the name of the author nor the names of any co-contributors
17 * may be used to endorse or promote products derived from this software
18 * without specific prior written permission.
19 *
20 * THIS SOFTWARE IS PROVIDED BY Bill Paul AND CONTRIBUTORS ``AS IS'' AND
21 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
22 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
23 * ARE DISCLAIMED. IN NO EVENT SHALL Bill Paul OR THE VOICES IN HIS HEAD
24 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
25 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
26 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
27 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
28 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
29 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF
30 * THE POSSIBILITY OF SUCH DAMAGE.
31 *
32 * $FreeBSD: src/sys/dev/an/if_an.c,v 1.2.2.13 2003/02/11 03:32:48 ambrisko Exp $
f2682cb9 33 * $DragonFly: src/sys/dev/netif/an/if_an.c,v 1.22 2005/06/03 23:23:03 joerg Exp $
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34 */
35
36/*
37 * Aironet 4500/4800 802.11 PCMCIA/ISA/PCI driver for FreeBSD.
38 *
39 * Written by Bill Paul <wpaul@ctr.columbia.edu>
40 * Electrical Engineering Department
41 * Columbia University, New York City
42 */
43
44/*
45 * The Aironet 4500/4800 series cards come in PCMCIA, ISA and PCI form.
46 * This driver supports all three device types (PCI devices are supported
47 * through an extra PCI shim: /sys/dev/an/if_an_pci.c). ISA devices can be
48 * supported either using hard-coded IO port/IRQ settings or via Plug
49 * and Play. The 4500 series devices support 1Mbps and 2Mbps data rates.
50 * The 4800 devices support 1, 2, 5.5 and 11Mbps rates.
51 *
52 * Like the WaveLAN/IEEE cards, the Aironet NICs are all essentially
53 * PCMCIA devices. The ISA and PCI cards are a combination of a PCMCIA
54 * device and a PCMCIA to ISA or PCMCIA to PCI adapter card. There are
55 * a couple of important differences though:
56 *
57 * - Lucent ISA card looks to the host like a PCMCIA controller with
58 * a PCMCIA WaveLAN card inserted. This means that even desktop
59 * machines need to be configured with PCMCIA support in order to
60 * use WaveLAN/IEEE ISA cards. The Aironet cards on the other hand
61 * actually look like normal ISA and PCI devices to the host, so
62 * no PCMCIA controller support is needed
63 *
64 * The latter point results in a small gotcha. The Aironet PCMCIA
65 * cards can be configured for one of two operating modes depending
66 * on how the Vpp1 and Vpp2 programming voltages are set when the
67 * card is activated. In order to put the card in proper PCMCIA
68 * operation (where the CIS table is visible and the interface is
69 * programmed for PCMCIA operation), both Vpp1 and Vpp2 have to be
70 * set to 5 volts. FreeBSD by default doesn't set the Vpp voltages,
71 * which leaves the card in ISA/PCI mode, which prevents it from
72 * being activated as an PCMCIA device.
73 *
74 * Note that some PCMCIA controller software packages for Windows NT
75 * fail to set the voltages as well.
76 *
77 * The Aironet devices can operate in both station mode and access point
78 * mode. Typically, when programmed for station mode, the card can be set
79 * to automatically perform encapsulation/decapsulation of Ethernet II
80 * and 802.3 frames within 802.11 frames so that the host doesn't have
81 * to do it itself. This driver doesn't program the card that way: the
82 * driver handles all of the encapsulation/decapsulation itself.
83 */
84
85#include "opt_inet.h"
86
87#ifdef INET
88#define ANCACHE /* enable signal strength cache */
89#endif
90
91#include <sys/param.h>
92#include <sys/systm.h>
93#include <sys/sockio.h>
94#include <sys/mbuf.h>
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95#include <sys/kernel.h>
96#include <sys/proc.h>
97#include <sys/ucred.h>
98#include <sys/socket.h>
99#ifdef ANCACHE
100#include <sys/syslog.h>
101#endif
102#include <sys/sysctl.h>
103#include <machine/clock.h> /* for DELAY */
104
105#include <sys/module.h>
106#include <sys/sysctl.h>
107#include <sys/bus.h>
108#include <machine/bus.h>
109#include <sys/rman.h>
110#include <machine/resource.h>
111#include <sys/malloc.h>
112
113#include <net/if.h>
38de8487 114#include <net/ifq_var.h>
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115#include <net/if_arp.h>
116#include <net/ethernet.h>
117#include <net/if_dl.h>
118#include <net/if_types.h>
984263bc 119#include <net/if_media.h>
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120#include <netproto/802_11/ieee80211.h>
121#include <netproto/802_11/ieee80211_ioctl.h>
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122
123#ifdef INET
124#include <netinet/in.h>
125#include <netinet/in_systm.h>
126#include <netinet/in_var.h>
127#include <netinet/ip.h>
128#endif
129
130#include <net/bpf.h>
131
132#include <machine/md_var.h>
133
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134#include "if_aironet_ieee.h"
135#include "if_anreg.h"
984263bc 136
984263bc 137/* These are global because we need them in sys/pci/if_an_p.c. */
b5101a88 138static void an_reset (struct an_softc *);
1c70eebf 139static int an_init_mpi350_desc (struct an_softc *);
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140static int an_ioctl (struct ifnet *, u_long, caddr_t,
141 struct ucred *);
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142static void an_init (void *);
143static int an_init_tx_ring (struct an_softc *);
144static void an_start (struct ifnet *);
145static void an_watchdog (struct ifnet *);
146static void an_rxeof (struct an_softc *);
147static void an_txeof (struct an_softc *, int);
148
149static void an_promisc (struct an_softc *, int);
150static int an_cmd (struct an_softc *, int, int);
151static int an_cmd_struct (struct an_softc *, struct an_command *,
152 struct an_reply *);
153static int an_read_record (struct an_softc *, struct an_ltv_gen *);
154static int an_write_record (struct an_softc *, struct an_ltv_gen *);
155static int an_read_data (struct an_softc *, int,
156 int, caddr_t, int);
157static int an_write_data (struct an_softc *, int,
158 int, caddr_t, int);
159static int an_seek (struct an_softc *, int, int, int);
160static int an_alloc_nicmem (struct an_softc *, int, int *);
161static int an_dma_malloc (struct an_softc *, bus_size_t,
162 struct an_dma_alloc *, int);
163static void an_dma_free (struct an_softc *,
164 struct an_dma_alloc *);
165static void an_dma_malloc_cb (void *, bus_dma_segment_t *, int, int);
166static void an_stats_update (void *);
167static void an_setdef (struct an_softc *, struct an_req *);
984263bc 168#ifdef ANCACHE
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169static void an_cache_store (struct an_softc *, struct mbuf *,
170 uint8_t, uint8_t);
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171#endif
172
173/* function definitions for use with the Cisco's Linux configuration
174 utilities
175*/
176
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177static int readrids (struct ifnet*, struct aironet_ioctl*);
178static int writerids (struct ifnet*, struct aironet_ioctl*);
179static int flashcard (struct ifnet*, struct aironet_ioctl*);
984263bc 180
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181static int cmdreset (struct ifnet *);
182static int setflashmode (struct ifnet *);
183static int flashgchar (struct ifnet *,int,int);
184static int flashpchar (struct ifnet *,int,int);
185static int flashputbuf (struct ifnet *);
186static int flashrestart (struct ifnet *);
187static int WaitBusy (struct ifnet *, int);
188static int unstickbusy (struct ifnet *);
984263bc 189
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190static void an_dump_record (struct an_softc *,struct an_ltv_gen *,
191 char *);
984263bc 192
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193static int an_media_change (struct ifnet *);
194static void an_media_status (struct ifnet *, struct ifmediareq *);
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195
196static int an_dump = 0;
197static int an_cache_mode = 0;
198
199#define DBM 0
200#define PERCENT 1
201#define RAW 2
202
203static char an_conf[256];
204static char an_conf_cache[256];
205
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206DECLARE_DUMMY_MODULE(if_an);
207
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208/* sysctl vars */
209
210SYSCTL_NODE(_hw, OID_AUTO, an, CTLFLAG_RD, 0, "Wireless driver parameters");
211
212static int
213sysctl_an_dump(SYSCTL_HANDLER_ARGS)
214{
215 int error, r, last;
216 char *s = an_conf;
217
218 last = an_dump;
219
220 switch (an_dump) {
221 case 0:
222 strcpy(an_conf, "off");
223 break;
224 case 1:
225 strcpy(an_conf, "type");
226 break;
227 case 2:
228 strcpy(an_conf, "dump");
229 break;
230 default:
231 snprintf(an_conf, 5, "%x", an_dump);
232 break;
233 }
234
235 error = sysctl_handle_string(oidp, an_conf, sizeof(an_conf), req);
236
237 if (strncmp(an_conf,"off", 3) == 0) {
238 an_dump = 0;
239 }
240 if (strncmp(an_conf,"dump", 4) == 0) {
241 an_dump = 1;
242 }
243 if (strncmp(an_conf,"type", 4) == 0) {
244 an_dump = 2;
245 }
246 if (*s == 'f') {
247 r = 0;
248 for (;;s++) {
249 if ((*s >= '0') && (*s <= '9')) {
250 r = r * 16 + (*s - '0');
251 } else if ((*s >= 'a') && (*s <= 'f')) {
252 r = r * 16 + (*s - 'a' + 10);
253 } else {
254 break;
255 }
256 }
257 an_dump = r;
258 }
259 if (an_dump != last)
260 printf("Sysctl changed for Aironet driver\n");
261
262 return error;
263}
264
265SYSCTL_PROC(_hw_an, OID_AUTO, an_dump, CTLTYPE_STRING | CTLFLAG_RW,
266 0, sizeof(an_conf), sysctl_an_dump, "A", "");
267
268static int
269sysctl_an_cache_mode(SYSCTL_HANDLER_ARGS)
270{
271 int error, last;
272
273 last = an_cache_mode;
274
275 switch (an_cache_mode) {
276 case 1:
277 strcpy(an_conf_cache, "per");
278 break;
279 case 2:
280 strcpy(an_conf_cache, "raw");
281 break;
282 default:
283 strcpy(an_conf_cache, "dbm");
284 break;
285 }
286
287 error = sysctl_handle_string(oidp, an_conf_cache,
288 sizeof(an_conf_cache), req);
289
290 if (strncmp(an_conf_cache,"dbm", 3) == 0) {
291 an_cache_mode = 0;
292 }
293 if (strncmp(an_conf_cache,"per", 3) == 0) {
294 an_cache_mode = 1;
295 }
296 if (strncmp(an_conf_cache,"raw", 3) == 0) {
297 an_cache_mode = 2;
298 }
299
300 return error;
301}
302
303SYSCTL_PROC(_hw_an, OID_AUTO, an_cache_mode, CTLTYPE_STRING | CTLFLAG_RW,
304 0, sizeof(an_conf_cache), sysctl_an_cache_mode, "A", "");
305
306/*
307 * We probe for an Aironet 4500/4800 card by attempting to
308 * read the default SSID list. On reset, the first entry in
309 * the SSID list will contain the name "tsunami." If we don't
310 * find this, then there's no card present.
311 */
312int
313an_probe(dev)
314 device_t dev;
315{
316 struct an_softc *sc = device_get_softc(dev);
317 struct an_ltv_ssidlist ssid;
318 int error;
319
320 bzero((char *)&ssid, sizeof(ssid));
321
322 error = an_alloc_port(dev, 0, AN_IOSIZ);
323 if (error != 0)
324 return (0);
325
326 /* can't do autoprobing */
327 if (rman_get_start(sc->port_res) == -1)
328 return(0);
329
330 /*
331 * We need to fake up a softc structure long enough
332 * to be able to issue commands and call some of the
333 * other routines.
334 */
335 sc->an_bhandle = rman_get_bushandle(sc->port_res);
336 sc->an_btag = rman_get_bustag(sc->port_res);
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337
338 ssid.an_len = sizeof(ssid);
339 ssid.an_type = AN_RID_SSIDLIST;
340
341 /* Make sure interrupts are disabled. */
342 CSR_WRITE_2(sc, AN_INT_EN(sc->mpi350), 0);
343 CSR_WRITE_2(sc, AN_EVENT_ACK(sc->mpi350), 0xFFFF);
344
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345 if_initname(&sc->arpcom.ac_if, device_get_name(dev),
346 device_get_unit(dev));
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347 an_reset(sc);
348 /* No need for an_init_mpi350_desc since it will be done in attach */
349
350 if (an_cmd(sc, AN_CMD_READCFG, 0))
351 return(0);
352
353 if (an_read_record(sc, (struct an_ltv_gen *)&ssid))
354 return(0);
355
356 /* See if the ssid matches what we expect ... but doesn't have to */
357 if (strcmp(ssid.an_ssid1, AN_DEF_SSID))
358 return(0);
359
360 return(AN_IOSIZ);
361}
362
363/*
364 * Allocate a port resource with the given resource id.
365 */
366int
367an_alloc_port(dev, rid, size)
368 device_t dev;
369 int rid;
370 int size;
371{
372 struct an_softc *sc = device_get_softc(dev);
373 struct resource *res;
374
375 res = bus_alloc_resource(dev, SYS_RES_IOPORT, &rid,
376 0ul, ~0ul, size, RF_ACTIVE);
377 if (res) {
378 sc->port_rid = rid;
379 sc->port_res = res;
380 return (0);
381 } else {
382 return (ENOENT);
383 }
384}
385
386/*
387 * Allocate a memory resource with the given resource id.
388 */
389int an_alloc_memory(device_t dev, int rid, int size)
390{
391 struct an_softc *sc = device_get_softc(dev);
392 struct resource *res;
393
394 res = bus_alloc_resource(dev, SYS_RES_MEMORY, &rid,
395 0ul, ~0ul, size, RF_ACTIVE);
396 if (res) {
397 sc->mem_rid = rid;
398 sc->mem_res = res;
399 sc->mem_used = size;
400 return (0);
401 } else {
402 return (ENOENT);
403 }
404}
405
406/*
407 * Allocate a auxilary memory resource with the given resource id.
408 */
409int an_alloc_aux_memory(device_t dev, int rid, int size)
410{
411 struct an_softc *sc = device_get_softc(dev);
412 struct resource *res;
413
414 res = bus_alloc_resource(dev, SYS_RES_MEMORY, &rid,
415 0ul, ~0ul, size, RF_ACTIVE);
416 if (res) {
417 sc->mem_aux_rid = rid;
418 sc->mem_aux_res = res;
419 sc->mem_aux_used = size;
420 return (0);
421 } else {
422 return (ENOENT);
423 }
424}
425
426/*
427 * Allocate an irq resource with the given resource id.
428 */
429int
430an_alloc_irq(dev, rid, flags)
431 device_t dev;
432 int rid;
433 int flags;
434{
435 struct an_softc *sc = device_get_softc(dev);
436 struct resource *res;
437
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438 res = bus_alloc_resource_any(dev, SYS_RES_IRQ, &rid,
439 (RF_ACTIVE | flags));
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440 if (res) {
441 sc->irq_rid = rid;
442 sc->irq_res = res;
443 return (0);
444 } else {
445 return (ENOENT);
446 }
447}
448
449static void
450an_dma_malloc_cb(arg, segs, nseg, error)
451 void *arg;
452 bus_dma_segment_t *segs;
453 int nseg;
454 int error;
455{
456 bus_addr_t *paddr = (bus_addr_t*) arg;
457 *paddr = segs->ds_addr;
458}
459
460/*
461 * Alloc DMA memory and set the pointer to it
462 */
463static int
464an_dma_malloc(sc, size, dma, mapflags)
465 struct an_softc *sc;
466 bus_size_t size;
467 struct an_dma_alloc *dma;
468 int mapflags;
469{
470 int r;
471
472 r = bus_dmamap_create(sc->an_dtag, BUS_DMA_NOWAIT, &dma->an_dma_map);
473 if (r != 0)
474 goto fail_0;
475
476 r = bus_dmamem_alloc(sc->an_dtag, (void**) &dma->an_dma_vaddr,
477 BUS_DMA_NOWAIT, &dma->an_dma_map);
478 if (r != 0)
479 goto fail_1;
480
481 r = bus_dmamap_load(sc->an_dtag, dma->an_dma_map, dma->an_dma_vaddr,
482 size,
483 an_dma_malloc_cb,
484 &dma->an_dma_paddr,
485 mapflags | BUS_DMA_NOWAIT);
486 if (r != 0)
487 goto fail_2;
488
489 dma->an_dma_size = size;
490 return (0);
491
492fail_2:
493 bus_dmamap_unload(sc->an_dtag, dma->an_dma_map);
494fail_1:
495 bus_dmamem_free(sc->an_dtag, dma->an_dma_vaddr, dma->an_dma_map);
496fail_0:
497 bus_dmamap_destroy(sc->an_dtag, dma->an_dma_map);
498 dma->an_dma_map = NULL;
499 return (r);
500}
501
502static void
503an_dma_free(sc, dma)
504 struct an_softc *sc;
505 struct an_dma_alloc *dma;
506{
507 bus_dmamap_unload(sc->an_dtag, dma->an_dma_map);
508 bus_dmamem_free(sc->an_dtag, dma->an_dma_vaddr, dma->an_dma_map);
509 bus_dmamap_destroy(sc->an_dtag, dma->an_dma_map);
510}
511
512/*
513 * Release all resources
514 */
515void
516an_release_resources(dev)
517 device_t dev;
518{
519 struct an_softc *sc = device_get_softc(dev);
520 int i;
521
522 if (sc->port_res) {
523 bus_release_resource(dev, SYS_RES_IOPORT,
524 sc->port_rid, sc->port_res);
525 sc->port_res = 0;
526 }
527 if (sc->mem_res) {
528 bus_release_resource(dev, SYS_RES_MEMORY,
529 sc->mem_rid, sc->mem_res);
530 sc->mem_res = 0;
531 }
532 if (sc->mem_aux_res) {
533 bus_release_resource(dev, SYS_RES_MEMORY,
534 sc->mem_aux_rid, sc->mem_aux_res);
535 sc->mem_aux_res = 0;
536 }
537 if (sc->irq_res) {
538 bus_release_resource(dev, SYS_RES_IRQ,
539 sc->irq_rid, sc->irq_res);
540 sc->irq_res = 0;
541 }
542 if (sc->an_rid_buffer.an_dma_paddr) {
543 an_dma_free(sc, &sc->an_rid_buffer);
544 }
545 for (i = 0; i < AN_MAX_RX_DESC; i++)
546 if (sc->an_rx_buffer[i].an_dma_paddr) {
547 an_dma_free(sc, &sc->an_rx_buffer[i]);
548 }
549 for (i = 0; i < AN_MAX_TX_DESC; i++)
550 if (sc->an_tx_buffer[i].an_dma_paddr) {
551 an_dma_free(sc, &sc->an_tx_buffer[i]);
552 }
553 if (sc->an_dtag) {
554 bus_dma_tag_destroy(sc->an_dtag);
555 }
556
557}
558
559int
560an_init_mpi350_desc(sc)
561 struct an_softc *sc;
562{
563 struct an_command cmd_struct;
564 struct an_reply reply;
565 struct an_card_rid_desc an_rid_desc;
566 struct an_card_rx_desc an_rx_desc;
567 struct an_card_tx_desc an_tx_desc;
568 int i, desc;
569
570 if(!sc->an_rid_buffer.an_dma_paddr)
571 an_dma_malloc(sc, AN_RID_BUFFER_SIZE,
572 &sc->an_rid_buffer, 0);
573 for (i = 0; i < AN_MAX_RX_DESC; i++)
574 if(!sc->an_rx_buffer[i].an_dma_paddr)
575 an_dma_malloc(sc, AN_RX_BUFFER_SIZE,
576 &sc->an_rx_buffer[i], 0);
577 for (i = 0; i < AN_MAX_TX_DESC; i++)
578 if(!sc->an_tx_buffer[i].an_dma_paddr)
579 an_dma_malloc(sc, AN_TX_BUFFER_SIZE,
580 &sc->an_tx_buffer[i], 0);
581
582 /*
583 * Allocate RX descriptor
584 */
585 bzero(&reply,sizeof(reply));
586 cmd_struct.an_cmd = AN_CMD_ALLOC_DESC;
587 cmd_struct.an_parm0 = AN_DESCRIPTOR_RX;
588 cmd_struct.an_parm1 = AN_RX_DESC_OFFSET;
589 cmd_struct.an_parm2 = AN_MAX_RX_DESC;
590 if (an_cmd_struct(sc, &cmd_struct, &reply)) {
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591 if_printf(&sc->arpcom.ac_if,
592 "failed to allocate RX descriptor\n");
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593 return(EIO);
594 }
595
596 for (desc = 0; desc < AN_MAX_RX_DESC; desc++) {
597 bzero(&an_rx_desc, sizeof(an_rx_desc));
598 an_rx_desc.an_valid = 1;
599 an_rx_desc.an_len = AN_RX_BUFFER_SIZE;
600 an_rx_desc.an_done = 0;
601 an_rx_desc.an_phys = sc->an_rx_buffer[desc].an_dma_paddr;
602
603 for (i = 0; i < sizeof(an_rx_desc) / 4; i++)
604 CSR_MEM_AUX_WRITE_4(sc, AN_RX_DESC_OFFSET
605 + (desc * sizeof(an_rx_desc))
606 + (i * 4),
607 ((u_int32_t*)&an_rx_desc)[i]);
608 }
609
610 /*
611 * Allocate TX descriptor
612 */
613
614 bzero(&reply,sizeof(reply));
615 cmd_struct.an_cmd = AN_CMD_ALLOC_DESC;
616 cmd_struct.an_parm0 = AN_DESCRIPTOR_TX;
617 cmd_struct.an_parm1 = AN_TX_DESC_OFFSET;
618 cmd_struct.an_parm2 = AN_MAX_TX_DESC;
619 if (an_cmd_struct(sc, &cmd_struct, &reply)) {
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620 if_printf(&sc->arpcom.ac_if,
621 "failed to allocate TX descriptor\n");
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622 return(EIO);
623 }
624
625 for (desc = 0; desc < AN_MAX_TX_DESC; desc++) {
626 bzero(&an_tx_desc, sizeof(an_tx_desc));
627 an_tx_desc.an_offset = 0;
628 an_tx_desc.an_eoc = 0;
629 an_tx_desc.an_valid = 0;
630 an_tx_desc.an_len = 0;
631 an_tx_desc.an_phys = sc->an_tx_buffer[desc].an_dma_paddr;
632
633 for (i = 0; i < sizeof(an_tx_desc) / 4; i++)
634 CSR_MEM_AUX_WRITE_4(sc, AN_TX_DESC_OFFSET
635 + (desc * sizeof(an_tx_desc))
636 + (i * 4),
637 ((u_int32_t*)&an_tx_desc)[i]);
638 }
639
640 /*
641 * Allocate RID descriptor
642 */
643
644 bzero(&reply,sizeof(reply));
645 cmd_struct.an_cmd = AN_CMD_ALLOC_DESC;
646 cmd_struct.an_parm0 = AN_DESCRIPTOR_HOSTRW;
647 cmd_struct.an_parm1 = AN_HOST_DESC_OFFSET;
648 cmd_struct.an_parm2 = 1;
649 if (an_cmd_struct(sc, &cmd_struct, &reply)) {
1c70eebf
JS
650 if_printf(&sc->arpcom.ac_if,
651 "failed to allocate host descriptor\n");
984263bc
MD
652 return(EIO);
653 }
654
655 bzero(&an_rid_desc, sizeof(an_rid_desc));
656 an_rid_desc.an_valid = 1;
657 an_rid_desc.an_len = AN_RID_BUFFER_SIZE;
658 an_rid_desc.an_rid = 0;
659 an_rid_desc.an_phys = sc->an_rid_buffer.an_dma_paddr;
660
661 for (i = 0; i < sizeof(an_rid_desc) / 4; i++)
662 CSR_MEM_AUX_WRITE_4(sc, AN_HOST_DESC_OFFSET + i * 4,
663 ((u_int32_t*)&an_rid_desc)[i]);
664
665 return(0);
666}
667
668int
1c70eebf 669an_attach(sc, dev, flags)
984263bc 670 struct an_softc *sc;
1c70eebf 671 device_t dev;
984263bc
MD
672 int flags;
673{
674 struct ifnet *ifp = &sc->arpcom.ac_if;
675 int error;
676
89c0f216 677 callout_init(&sc->an_stat_timer);
984263bc
MD
678 sc->an_gone = 0;
679 sc->an_associated = 0;
680 sc->an_monitor = 0;
681 sc->an_was_monitor = 0;
682 sc->an_flash_buffer = NULL;
683
1c70eebf
JS
684 ifp->if_softc = sc;
685 if_initname(ifp, device_get_name(dev), device_get_unit(dev));
686
984263bc
MD
687 /* Reset the NIC. */
688 an_reset(sc);
689 if (sc->mpi350) {
690 error = an_init_mpi350_desc(sc);
691 if (error)
692 return(error);
693 }
694
695 /* Load factory config */
696 if (an_cmd(sc, AN_CMD_READCFG, 0)) {
1c70eebf 697 device_printf(dev, "failed to load config data\n");
984263bc
MD
698 return(EIO);
699 }
700
701 /* Read the current configuration */
702 sc->an_config.an_type = AN_RID_GENCONFIG;
703 sc->an_config.an_len = sizeof(struct an_ltv_genconfig);
704 if (an_read_record(sc, (struct an_ltv_gen *)&sc->an_config)) {
1c70eebf 705 device_printf(dev, "read record failed\n");
984263bc
MD
706 return(EIO);
707 }
708
709 /* Read the card capabilities */
710 sc->an_caps.an_type = AN_RID_CAPABILITIES;
711 sc->an_caps.an_len = sizeof(struct an_ltv_caps);
712 if (an_read_record(sc, (struct an_ltv_gen *)&sc->an_caps)) {
1c70eebf 713 device_printf(dev, "read record failed\n");
984263bc
MD
714 return(EIO);
715 }
716
717 /* Read ssid list */
718 sc->an_ssidlist.an_type = AN_RID_SSIDLIST;
719 sc->an_ssidlist.an_len = sizeof(struct an_ltv_ssidlist);
720 if (an_read_record(sc, (struct an_ltv_gen *)&sc->an_ssidlist)) {
1c70eebf 721 device_printf(dev, "read record failed\n");
984263bc
MD
722 return(EIO);
723 }
724
725 /* Read AP list */
726 sc->an_aplist.an_type = AN_RID_APLIST;
727 sc->an_aplist.an_len = sizeof(struct an_ltv_aplist);
728 if (an_read_record(sc, (struct an_ltv_gen *)&sc->an_aplist)) {
1c70eebf 729 device_printf(dev, "read record failed\n");
984263bc
MD
730 return(EIO);
731 }
732
733#ifdef ANCACHE
734 /* Read the RSSI <-> dBm map */
735 sc->an_have_rssimap = 0;
736 if (sc->an_caps.an_softcaps & 8) {
737 sc->an_rssimap.an_type = AN_RID_RSSI_MAP;
738 sc->an_rssimap.an_len = sizeof(struct an_ltv_rssi_map);
739 if (an_read_record(sc, (struct an_ltv_gen *)&sc->an_rssimap)) {
1c70eebf 740 device_printf(dev, "unable to get RSSI <-> dBM map\n");
984263bc 741 } else {
1c70eebf 742 device_printf(dev, "got RSSI <-> dBM map\n");
984263bc
MD
743 sc->an_have_rssimap = 1;
744 }
745 } else {
1c70eebf 746 device_printf(dev, "no RSSI <-> dBM map\n");
984263bc
MD
747 }
748#endif
749
984263bc
MD
750 ifp->if_mtu = ETHERMTU;
751 ifp->if_flags = IFF_BROADCAST | IFF_SIMPLEX | IFF_MULTICAST;
752 ifp->if_ioctl = an_ioctl;
984263bc
MD
753 ifp->if_start = an_start;
754 ifp->if_watchdog = an_watchdog;
755 ifp->if_init = an_init;
756 ifp->if_baudrate = 10000000;
38de8487
JS
757 ifq_set_maxlen(&ifp->if_snd, IFQ_MAXLEN);
758 ifq_set_ready(&ifp->if_snd);
984263bc
MD
759
760 bzero(sc->an_config.an_nodename, sizeof(sc->an_config.an_nodename));
761 bcopy(AN_DEFAULT_NODENAME, sc->an_config.an_nodename,
762 sizeof(AN_DEFAULT_NODENAME) - 1);
763
764 bzero(sc->an_ssidlist.an_ssid1, sizeof(sc->an_ssidlist.an_ssid1));
765 bcopy(AN_DEFAULT_NETNAME, sc->an_ssidlist.an_ssid1,
766 sizeof(AN_DEFAULT_NETNAME) - 1);
767 sc->an_ssidlist.an_ssid1_len = strlen(AN_DEFAULT_NETNAME);
768
769 sc->an_config.an_opmode =
770 AN_OPMODE_INFRASTRUCTURE_STATION;
771
772 sc->an_tx_rate = 0;
773 bzero((char *)&sc->an_stats, sizeof(sc->an_stats));
774
775 ifmedia_init(&sc->an_ifmedia, 0, an_media_change, an_media_status);
776#define ADD(m, c) ifmedia_add(&sc->an_ifmedia, (m), (c), NULL)
777 ADD(IFM_MAKEWORD(IFM_IEEE80211, IFM_IEEE80211_DS1,
778 IFM_IEEE80211_ADHOC, 0), 0);
779 ADD(IFM_MAKEWORD(IFM_IEEE80211, IFM_IEEE80211_DS1, 0, 0), 0);
780 ADD(IFM_MAKEWORD(IFM_IEEE80211, IFM_IEEE80211_DS2,
781 IFM_IEEE80211_ADHOC, 0), 0);
782 ADD(IFM_MAKEWORD(IFM_IEEE80211, IFM_IEEE80211_DS2, 0, 0), 0);
783 if (sc->an_caps.an_rates[2] == AN_RATE_5_5MBPS) {
784 ADD(IFM_MAKEWORD(IFM_IEEE80211, IFM_IEEE80211_DS5,
785 IFM_IEEE80211_ADHOC, 0), 0);
786 ADD(IFM_MAKEWORD(IFM_IEEE80211, IFM_IEEE80211_DS5, 0, 0), 0);
787 }
788 if (sc->an_caps.an_rates[3] == AN_RATE_11MBPS) {
789 ADD(IFM_MAKEWORD(IFM_IEEE80211, IFM_IEEE80211_DS11,
790 IFM_IEEE80211_ADHOC, 0), 0);
791 ADD(IFM_MAKEWORD(IFM_IEEE80211, IFM_IEEE80211_DS11, 0, 0), 0);
792 }
793 ADD(IFM_MAKEWORD(IFM_IEEE80211, IFM_AUTO,
794 IFM_IEEE80211_ADHOC, 0), 0);
795 ADD(IFM_MAKEWORD(IFM_IEEE80211, IFM_AUTO, 0, 0), 0);
796#undef ADD
797 ifmedia_set(&sc->an_ifmedia, IFM_MAKEWORD(IFM_IEEE80211, IFM_AUTO,
798 0, 0));
799
800 /*
801 * Call MI attach routine.
802 */
0a8b5977 803 ether_ifattach(ifp, sc->an_caps.an_oemaddr);
984263bc
MD
804
805 return(0);
806}
807
808static void
809an_rxeof(sc)
810 struct an_softc *sc;
811{
812 struct ifnet *ifp;
813 struct ether_header *eh;
814 struct ieee80211_frame *ih;
815 struct an_rxframe rx_frame;
816 struct an_rxframe_802_3 rx_frame_802_3;
817 struct mbuf *m;
818 int len, id, error = 0, i, count = 0;
819 int ieee80211_header_len;
820 u_char *bpf_buf;
821 u_short fc1;
822 struct an_card_rx_desc an_rx_desc;
823 u_int8_t *buf;
824
825 ifp = &sc->arpcom.ac_if;
826
827 if (!sc->mpi350) {
828 id = CSR_READ_2(sc, AN_RX_FID);
829
830 if (sc->an_monitor && (ifp->if_flags & IFF_PROMISC)) {
831 /* read raw 802.11 packet */
832 bpf_buf = sc->buf_802_11;
833
834 /* read header */
835 if (an_read_data(sc, id, 0x0, (caddr_t)&rx_frame,
836 sizeof(rx_frame))) {
837 ifp->if_ierrors++;
838 return;
839 }
840
841 /*
842 * skip beacon by default since this increases the
843 * system load a lot
844 */
845
846 if (!(sc->an_monitor & AN_MONITOR_INCLUDE_BEACON) &&
847 (rx_frame.an_frame_ctl &
848 IEEE80211_FC0_SUBTYPE_BEACON)) {
849 return;
850 }
851
852 if (sc->an_monitor & AN_MONITOR_AIRONET_HEADER) {
853 len = rx_frame.an_rx_payload_len
854 + sizeof(rx_frame);
855 /* Check for insane frame length */
856 if (len > sizeof(sc->buf_802_11)) {
1c70eebf
JS
857 if_printf(ifp,
858 "oversized packet received "
859 "(%d, %d)\n", len, MCLBYTES);
984263bc
MD
860 ifp->if_ierrors++;
861 return;
862 }
863
864 bcopy((char *)&rx_frame,
865 bpf_buf, sizeof(rx_frame));
866
867 error = an_read_data(sc, id, sizeof(rx_frame),
868 (caddr_t)bpf_buf+sizeof(rx_frame),
869 rx_frame.an_rx_payload_len);
870 } else {
871 fc1=rx_frame.an_frame_ctl >> 8;
872 ieee80211_header_len =
873 sizeof(struct ieee80211_frame);
874 if ((fc1 & IEEE80211_FC1_DIR_TODS) &&
875 (fc1 & IEEE80211_FC1_DIR_FROMDS)) {
876 ieee80211_header_len += ETHER_ADDR_LEN;
877 }
878
879 len = rx_frame.an_rx_payload_len
880 + ieee80211_header_len;
881 /* Check for insane frame length */
882 if (len > sizeof(sc->buf_802_11)) {
1c70eebf
JS
883 if_printf(ifp,
884 "oversized packet received "
885 "(%d, %d)\n", len, MCLBYTES);
984263bc
MD
886 ifp->if_ierrors++;
887 return;
888 }
889
890 ih = (struct ieee80211_frame *)bpf_buf;
891
892 bcopy((char *)&rx_frame.an_frame_ctl,
893 (char *)ih, ieee80211_header_len);
894
895 error = an_read_data(sc, id, sizeof(rx_frame) +
896 rx_frame.an_gaplen,
897 (caddr_t)ih +ieee80211_header_len,
898 rx_frame.an_rx_payload_len);
899 }
7600679e 900 BPF_TAP(ifp, bpf_buf, len);
984263bc
MD
901 } else {
902 MGETHDR(m, M_NOWAIT, MT_DATA);
903 if (m == NULL) {
904 ifp->if_ierrors++;
905 return;
906 }
907 MCLGET(m, M_NOWAIT);
908 if (!(m->m_flags & M_EXT)) {
909 m_freem(m);
910 ifp->if_ierrors++;
911 return;
912 }
913 m->m_pkthdr.rcvif = ifp;
914 /* Read Ethernet encapsulated packet */
915
916#ifdef ANCACHE
917 /* Read NIC frame header */
918 if (an_read_data(sc, id, 0, (caddr_t)&rx_frame,
919 sizeof(rx_frame))) {
920 ifp->if_ierrors++;
921 return;
922 }
923#endif
924 /* Read in the 802_3 frame header */
925 if (an_read_data(sc, id, 0x34,
926 (caddr_t)&rx_frame_802_3,
927 sizeof(rx_frame_802_3))) {
928 ifp->if_ierrors++;
929 return;
930 }
931 if (rx_frame_802_3.an_rx_802_3_status != 0) {
932 ifp->if_ierrors++;
933 return;
934 }
935 /* Check for insane frame length */
936 len = rx_frame_802_3.an_rx_802_3_payload_len;
937 if (len > sizeof(sc->buf_802_11)) {
1c70eebf
JS
938 if_printf(ifp,
939 "oversized packet received (%d, %d)\n",
940 len, MCLBYTES);
984263bc
MD
941 ifp->if_ierrors++;
942 return;
943 }
944 m->m_pkthdr.len = m->m_len =
945 rx_frame_802_3.an_rx_802_3_payload_len + 12;
946
947 eh = mtod(m, struct ether_header *);
948
949 bcopy((char *)&rx_frame_802_3.an_rx_dst_addr,
950 (char *)&eh->ether_dhost, ETHER_ADDR_LEN);
951 bcopy((char *)&rx_frame_802_3.an_rx_src_addr,
952 (char *)&eh->ether_shost, ETHER_ADDR_LEN);
953
954 /* in mbuf header type is just before payload */
955 error = an_read_data(sc, id, 0x44,
956 (caddr_t)&(eh->ether_type),
957 rx_frame_802_3.an_rx_802_3_payload_len);
958
959 if (error) {
960 m_freem(m);
961 ifp->if_ierrors++;
962 return;
963 }
964 ifp->if_ipackets++;
965
984263bc 966#ifdef ANCACHE
3013ac0e 967 an_cache_store(sc, m,
984263bc
MD
968 rx_frame.an_rx_signal_strength,
969 rx_frame.an_rsvd0);
970#endif
3013ac0e 971 (*ifp->if_input)(ifp, m);
984263bc
MD
972 }
973
974 } else { /* MPI-350 */
975 for (count = 0; count < AN_MAX_RX_DESC; count++){
976 for (i = 0; i < sizeof(an_rx_desc) / 4; i++)
977 ((u_int32_t*)&an_rx_desc)[i]
978 = CSR_MEM_AUX_READ_4(sc,
979 AN_RX_DESC_OFFSET
980 + (count * sizeof(an_rx_desc))
981 + (i * 4));
982
983 if (an_rx_desc.an_done && !an_rx_desc.an_valid) {
984 buf = sc->an_rx_buffer[count].an_dma_vaddr;
985
986 MGETHDR(m, M_NOWAIT, MT_DATA);
987 if (m == NULL) {
988 ifp->if_ierrors++;
989 return;
990 }
991 MCLGET(m, M_NOWAIT);
992 if (!(m->m_flags & M_EXT)) {
993 m_freem(m);
994 ifp->if_ierrors++;
995 return;
996 }
997 m->m_pkthdr.rcvif = ifp;
998 /* Read Ethernet encapsulated packet */
999
1000 /*
1001 * No ANCACHE support since we just get back
1002 * an Ethernet packet no 802.11 info
1003 */
1004#if 0
1005#ifdef ANCACHE
1006 /* Read NIC frame header */
1007 bcopy(buf, (caddr_t)&rx_frame,
1008 sizeof(rx_frame));
1009#endif
1010#endif
1011 /* Check for insane frame length */
1012 len = an_rx_desc.an_len + 12;
1013 if (len > MCLBYTES) {
1c70eebf
JS
1014 if_printf(ifp,
1015 "oversized packet received "
1016 "(%d, %d)\n", len, MCLBYTES);
984263bc
MD
1017 ifp->if_ierrors++;
1018 return;
1019 }
1020
1021 m->m_pkthdr.len = m->m_len =
1022 an_rx_desc.an_len + 12;
1023
1024 eh = mtod(m, struct ether_header *);
1025
1026 bcopy(buf, (char *)eh,
1027 m->m_pkthdr.len);
1028
1029 ifp->if_ipackets++;
1030
984263bc
MD
1031#if 0
1032#ifdef ANCACHE
3013ac0e 1033 an_cache_store(sc, m,
984263bc
MD
1034 rx_frame.an_rx_signal_strength,
1035 rx_frame.an_rsvd0);
1036#endif
1037#endif
3013ac0e 1038 (*ifp->if_input)(ifp, m);
984263bc
MD
1039
1040 an_rx_desc.an_valid = 1;
1041 an_rx_desc.an_len = AN_RX_BUFFER_SIZE;
1042 an_rx_desc.an_done = 0;
1043 an_rx_desc.an_phys =
1044 sc->an_rx_buffer[count].an_dma_paddr;
1045
1046 for (i = 0; i < sizeof(an_rx_desc) / 4; i++)
1047 CSR_MEM_AUX_WRITE_4(sc,
1048 AN_RX_DESC_OFFSET
1049 + (count * sizeof(an_rx_desc))
1050 + (i * 4),
1051 ((u_int32_t*)&an_rx_desc)[i]);
1052
1053 } else {
1c70eebf
JS
1054 if_printf(ifp, "Didn't get valid RX packet "
1055 "%x %x %d\n",
1056 an_rx_desc.an_done,
1057 an_rx_desc.an_valid,
1058 an_rx_desc.an_len);
984263bc
MD
1059 }
1060 }
1061 }
1062}
1063
1064static void
1065an_txeof(sc, status)
1066 struct an_softc *sc;
1067 int status;
1068{
1069 struct ifnet *ifp;
1070 int id, i;
1071
1072 ifp = &sc->arpcom.ac_if;
1073
1074 ifp->if_timer = 0;
1075 ifp->if_flags &= ~IFF_OACTIVE;
1076
1077 if (!sc->mpi350) {
1078 id = CSR_READ_2(sc, AN_TX_CMP_FID);
1079
1080 if (status & AN_EV_TX_EXC) {
1081 ifp->if_oerrors++;
1082 } else
1083 ifp->if_opackets++;
1084
1085 for (i = 0; i < AN_TX_RING_CNT; i++) {
1086 if (id == sc->an_rdata.an_tx_ring[i]) {
1087 sc->an_rdata.an_tx_ring[i] = 0;
1088 break;
1089 }
1090 }
1091
1092 AN_INC(sc->an_rdata.an_tx_cons, AN_TX_RING_CNT);
1093 } else { /* MPI 350 */
1094 AN_INC(sc->an_rdata.an_tx_cons, AN_MAX_TX_DESC);
1095 if (sc->an_rdata.an_tx_prod ==
1096 sc->an_rdata.an_tx_cons)
1097 sc->an_rdata.an_tx_empty = 1;
1098 }
1099
1100 return;
1101}
1102
1103/*
1104 * We abuse the stats updater to check the current NIC status. This
1105 * is important because we don't want to allow transmissions until
1106 * the NIC has synchronized to the current cell (either as the master
1107 * in an ad-hoc group, or as a station connected to an access point).
1108 */
1109static void
1110an_stats_update(xsc)
1111 void *xsc;
1112{
1113 struct an_softc *sc;
1114 struct ifnet *ifp;
1115 int s;
1116
1117 s = splimp();
1118
1119 sc = xsc;
1120 ifp = &sc->arpcom.ac_if;
1121
1122 sc->an_status.an_type = AN_RID_STATUS;
1123 sc->an_status.an_len = sizeof(struct an_ltv_status);
1124 an_read_record(sc, (struct an_ltv_gen *)&sc->an_status);
1125
1126 if (sc->an_status.an_opmode & AN_STATUS_OPMODE_IN_SYNC)
1127 sc->an_associated = 1;
1128 else
1129 sc->an_associated = 0;
1130
1131 /* Don't do this while we're transmitting */
1132 if (ifp->if_flags & IFF_OACTIVE) {
89c0f216 1133 callout_reset(&sc->an_stat_timer, hz, an_stats_update, sc);
984263bc
MD
1134 splx(s);
1135 return;
1136 }
1137
1138 sc->an_stats.an_len = sizeof(struct an_ltv_stats);
1139 sc->an_stats.an_type = AN_RID_32BITS_CUM;
1140 an_read_record(sc, (struct an_ltv_gen *)&sc->an_stats.an_len);
1141
89c0f216 1142 callout_reset(&sc->an_stat_timer, hz, an_stats_update, sc);
984263bc
MD
1143 splx(s);
1144
1145 return;
1146}
1147
1148void
1149an_intr(xsc)
1150 void *xsc;
1151{
1152 struct an_softc *sc;
1153 struct ifnet *ifp;
1154 u_int16_t status;
1155
1156 sc = (struct an_softc*)xsc;
1157
1158 if (sc->an_gone)
1159 return;
1160
1161 ifp = &sc->arpcom.ac_if;
1162
1163 /* Disable interrupts. */
1164 CSR_WRITE_2(sc, AN_INT_EN(sc->mpi350), 0);
1165
1166 status = CSR_READ_2(sc, AN_EVENT_STAT(sc->mpi350));
1167 CSR_WRITE_2(sc, AN_EVENT_ACK(sc->mpi350), ~AN_INTRS);
1168
1169 if (status & AN_EV_AWAKE) {
1170 CSR_WRITE_2(sc, AN_EVENT_ACK(sc->mpi350), AN_EV_AWAKE);
1171 }
1172
1173 if (status & AN_EV_LINKSTAT) {
1174 if (CSR_READ_2(sc, AN_LINKSTAT(sc->mpi350))
1175 == AN_LINKSTAT_ASSOCIATED)
1176 sc->an_associated = 1;
1177 else
1178 sc->an_associated = 0;
1179 CSR_WRITE_2(sc, AN_EVENT_ACK(sc->mpi350), AN_EV_LINKSTAT);
1180 }
1181
1182 if (status & AN_EV_RX) {
1183 an_rxeof(sc);
1184 CSR_WRITE_2(sc, AN_EVENT_ACK(sc->mpi350), AN_EV_RX);
1185 }
1186
1187 if (status & AN_EV_TX) {
1188 an_txeof(sc, status);
1189 CSR_WRITE_2(sc, AN_EVENT_ACK(sc->mpi350), AN_EV_TX);
1190 }
1191
1192 if (status & AN_EV_TX_EXC) {
1193 an_txeof(sc, status);
1194 CSR_WRITE_2(sc, AN_EVENT_ACK(sc->mpi350), AN_EV_TX_EXC);
1195 }
1196
1197 if (status & AN_EV_ALLOC)
1198 CSR_WRITE_2(sc, AN_EVENT_ACK(sc->mpi350), AN_EV_ALLOC);
1199
1200 /* Re-enable interrupts. */
1201 CSR_WRITE_2(sc, AN_INT_EN(sc->mpi350), AN_INTRS);
1202
38de8487 1203 if ((ifp->if_flags & IFF_UP) && !ifq_is_empty(&ifp->if_snd))
984263bc
MD
1204 an_start(ifp);
1205
1206 return;
1207}
1208
1209static int
1210an_cmd_struct(sc, cmd, reply)
1211 struct an_softc *sc;
1212 struct an_command *cmd;
1213 struct an_reply *reply;
1214{
1215 int i;
1216
1217 for (i = 0; i != AN_TIMEOUT; i++) {
1218 if (CSR_READ_2(sc, AN_COMMAND(sc->mpi350)) & AN_CMD_BUSY) {
1219 DELAY(1000);
1220 } else
1221 break;
1222 }
1223 if( i == AN_TIMEOUT) {
1224 printf("BUSY\n");
1225 return(ETIMEDOUT);
1226 }
1227
1228 CSR_WRITE_2(sc, AN_PARAM0(sc->mpi350), cmd->an_parm0);
1229 CSR_WRITE_2(sc, AN_PARAM1(sc->mpi350), cmd->an_parm1);
1230 CSR_WRITE_2(sc, AN_PARAM2(sc->mpi350), cmd->an_parm2);
1231 CSR_WRITE_2(sc, AN_COMMAND(sc->mpi350), cmd->an_cmd);
1232
1233 for (i = 0; i < AN_TIMEOUT; i++) {
1234 if (CSR_READ_2(sc, AN_EVENT_STAT(sc->mpi350)) & AN_EV_CMD)
1235 break;
1236 DELAY(1000);
1237 }
1238
1239 reply->an_resp0 = CSR_READ_2(sc, AN_RESP0(sc->mpi350));
1240 reply->an_resp1 = CSR_READ_2(sc, AN_RESP1(sc->mpi350));
1241 reply->an_resp2 = CSR_READ_2(sc, AN_RESP2(sc->mpi350));
1242 reply->an_status = CSR_READ_2(sc, AN_STATUS(sc->mpi350));
1243
1244 if (CSR_READ_2(sc, AN_COMMAND(sc->mpi350)) & AN_CMD_BUSY)
1245 CSR_WRITE_2(sc, AN_EVENT_ACK(sc->mpi350), AN_EV_CLR_STUCK_BUSY);
1246
1247 /* Ack the command */
1248 CSR_WRITE_2(sc, AN_EVENT_ACK(sc->mpi350), AN_EV_CMD);
1249
1250 if (i == AN_TIMEOUT)
1251 return(ETIMEDOUT);
1252
1253 return(0);
1254}
1255
1256static int
1257an_cmd(sc, cmd, val)
1258 struct an_softc *sc;
1259 int cmd;
1260 int val;
1261{
1262 int i, s = 0;
1263
1264 CSR_WRITE_2(sc, AN_PARAM0(sc->mpi350), val);
1265 CSR_WRITE_2(sc, AN_PARAM1(sc->mpi350), 0);
1266 CSR_WRITE_2(sc, AN_PARAM2(sc->mpi350), 0);
1267 CSR_WRITE_2(sc, AN_COMMAND(sc->mpi350), cmd);
1268
1269 for (i = 0; i < AN_TIMEOUT; i++) {
1270 if (CSR_READ_2(sc, AN_EVENT_STAT(sc->mpi350)) & AN_EV_CMD)
1271 break;
1272 else {
1273 if (CSR_READ_2(sc, AN_COMMAND(sc->mpi350)) == cmd)
1274 CSR_WRITE_2(sc, AN_COMMAND(sc->mpi350), cmd);
1275 }
1276 }
1277
1278 for (i = 0; i < AN_TIMEOUT; i++) {
1279 CSR_READ_2(sc, AN_RESP0(sc->mpi350));
1280 CSR_READ_2(sc, AN_RESP1(sc->mpi350));
1281 CSR_READ_2(sc, AN_RESP2(sc->mpi350));
1282 s = CSR_READ_2(sc, AN_STATUS(sc->mpi350));
1283 if ((s & AN_STAT_CMD_CODE) == (cmd & AN_STAT_CMD_CODE))
1284 break;
1285 }
1286
1287 /* Ack the command */
1288 CSR_WRITE_2(sc, AN_EVENT_ACK(sc->mpi350), AN_EV_CMD);
1289
1290 if (CSR_READ_2(sc, AN_COMMAND(sc->mpi350)) & AN_CMD_BUSY)
1291 CSR_WRITE_2(sc, AN_EVENT_ACK(sc->mpi350), AN_EV_CLR_STUCK_BUSY);
1292
1293 if (i == AN_TIMEOUT)
1294 return(ETIMEDOUT);
1295
1296 return(0);
1297}
1298
1299/*
1300 * This reset sequence may look a little strange, but this is the
1301 * most reliable method I've found to really kick the NIC in the
1302 * head and force it to reboot correctly.
1303 */
1304static void
1305an_reset(sc)
1306 struct an_softc *sc;
1307{
1308 if (sc->an_gone)
1309 return;
1310
1311 an_cmd(sc, AN_CMD_ENABLE, 0);
1312 an_cmd(sc, AN_CMD_FW_RESTART, 0);
1313 an_cmd(sc, AN_CMD_NOOP2, 0);
1314
1315 if (an_cmd(sc, AN_CMD_FORCE_SYNCLOSS, 0) == ETIMEDOUT)
1c70eebf 1316 if_printf(&sc->arpcom.ac_if, "reset failed\n");
984263bc
MD
1317
1318 an_cmd(sc, AN_CMD_DISABLE, 0);
1319
1320 return;
1321}
1322
1323/*
1324 * Read an LTV record from the NIC.
1325 */
1326static int
1327an_read_record(sc, ltv)
1328 struct an_softc *sc;
1329 struct an_ltv_gen *ltv;
1330{
1331 struct an_ltv_gen *an_ltv;
1332 struct an_card_rid_desc an_rid_desc;
1333 struct an_command cmd;
1334 struct an_reply reply;
1335 u_int16_t *ptr;
1336 u_int8_t *ptr2;
1337 int i, len;
1338
1339 if (ltv->an_len < 4 || ltv->an_type == 0)
1340 return(EINVAL);
1341
1342 if (!sc->mpi350){
1343 /* Tell the NIC to enter record read mode. */
1344 if (an_cmd(sc, AN_CMD_ACCESS|AN_ACCESS_READ, ltv->an_type)) {
1c70eebf 1345 if_printf(&sc->arpcom.ac_if, "RID access failed\n");
984263bc
MD
1346 return(EIO);
1347 }
1348
1349 /* Seek to the record. */
1350 if (an_seek(sc, ltv->an_type, 0, AN_BAP1)) {
1c70eebf 1351 if_printf(&sc->arpcom.ac_if, "seek to record failed\n");
984263bc
MD
1352 return(EIO);
1353 }
1354
1355 /*
1356 * Read the length and record type and make sure they
1357 * match what we expect (this verifies that we have enough
1358 * room to hold all of the returned data).
1359 * Length includes type but not length.
1360 */
1361 len = CSR_READ_2(sc, AN_DATA1);
1362 if (len > (ltv->an_len - 2)) {
1c70eebf
JS
1363 if_printf(&sc->arpcom.ac_if,
1364 "record length mismatch -- expected %d, "
1365 "got %d for Rid %x\n",
1366 ltv->an_len - 2, len, ltv->an_type);
984263bc
MD
1367 len = ltv->an_len - 2;
1368 } else {
1369 ltv->an_len = len + 2;
1370 }
1371
1372 /* Now read the data. */
1373 len -= 2; /* skip the type */
1374 ptr = &ltv->an_val;
1375 for (i = len; i > 1; i -= 2)
1376 *ptr++ = CSR_READ_2(sc, AN_DATA1);
1377 if (i) {
1378 ptr2 = (u_int8_t *)ptr;
1379 *ptr2 = CSR_READ_1(sc, AN_DATA1);
1380 }
1381 } else { /* MPI-350 */
1382 an_rid_desc.an_valid = 1;
1383 an_rid_desc.an_len = AN_RID_BUFFER_SIZE;
1384 an_rid_desc.an_rid = 0;
1385 an_rid_desc.an_phys = sc->an_rid_buffer.an_dma_paddr;
1386 bzero(sc->an_rid_buffer.an_dma_vaddr, AN_RID_BUFFER_SIZE);
1387
1388 bzero(&cmd, sizeof(cmd));
1389 bzero(&reply, sizeof(reply));
1390 cmd.an_cmd = AN_CMD_ACCESS|AN_ACCESS_READ;
1391 cmd.an_parm0 = ltv->an_type;
1392
1393 for (i = 0; i < sizeof(an_rid_desc) / 4; i++)
1394 CSR_MEM_AUX_WRITE_4(sc, AN_HOST_DESC_OFFSET + i * 4,
1395 ((u_int32_t*)&an_rid_desc)[i]);
1396
1397 if (an_cmd_struct(sc, &cmd, &reply)
1398 || reply.an_status & AN_CMD_QUAL_MASK) {
1c70eebf
JS
1399 if_printf(&sc->arpcom.ac_if,
1400 "failed to read RID %x %x %x %x %x, %d\n",
1401 ltv->an_type,
1402 reply.an_status,
1403 reply.an_resp0,
1404 reply.an_resp1,
1405 reply.an_resp2,
1406 i);
984263bc
MD
1407 return(EIO);
1408 }
1409
1410 an_ltv = (struct an_ltv_gen *)sc->an_rid_buffer.an_dma_vaddr;
1411 if (an_ltv->an_len + 2 < an_rid_desc.an_len) {
1412 an_rid_desc.an_len = an_ltv->an_len;
1413 }
1414
1415 if (an_rid_desc.an_len > 2)
1416 bcopy(&an_ltv->an_type,
1417 &ltv->an_val,
1418 an_rid_desc.an_len - 2);
1419 ltv->an_len = an_rid_desc.an_len + 2;
1420 }
1421
1422 if (an_dump)
1423 an_dump_record(sc, ltv, "Read");
1424
1425 return(0);
1426}
1427
1428/*
1429 * Same as read, except we inject data instead of reading it.
1430 */
1431static int
1432an_write_record(sc, ltv)
1433 struct an_softc *sc;
1434 struct an_ltv_gen *ltv;
1435{
1436 struct an_card_rid_desc an_rid_desc;
1437 struct an_command cmd;
1438 struct an_reply reply;
1439 char *buf;
1440 u_int16_t *ptr;
1441 u_int8_t *ptr2;
1442 int i, len;
1443
1444 if (an_dump)
1445 an_dump_record(sc, ltv, "Write");
1446
1447 if (!sc->mpi350){
1448 if (an_cmd(sc, AN_CMD_ACCESS|AN_ACCESS_READ, ltv->an_type))
1449 return(EIO);
1450
1451 if (an_seek(sc, ltv->an_type, 0, AN_BAP1))
1452 return(EIO);
1453
1454 /*
1455 * Length includes type but not length.
1456 */
1457 len = ltv->an_len - 2;
1458 CSR_WRITE_2(sc, AN_DATA1, len);
1459
1460 len -= 2; /* skip the type */
1461 ptr = &ltv->an_val;
1462 for (i = len; i > 1; i -= 2)
1463 CSR_WRITE_2(sc, AN_DATA1, *ptr++);
1464 if (i) {
1465 ptr2 = (u_int8_t *)ptr;
1466 CSR_WRITE_1(sc, AN_DATA0, *ptr2);
1467 }
1468
1469 if (an_cmd(sc, AN_CMD_ACCESS|AN_ACCESS_WRITE, ltv->an_type))
1470 return(EIO);
1471 } else {
1472 /* MPI-350 */
1473
1474 for (i = 0; i != AN_TIMEOUT; i++) {
1475 if (CSR_READ_2(sc, AN_COMMAND(sc->mpi350))
1476 & AN_CMD_BUSY) {
1477 DELAY(10);
1478 } else
1479 break;
1480 }
1481 if (i == AN_TIMEOUT) {
1482 printf("BUSY\n");
1483 }
1484
1485 an_rid_desc.an_valid = 1;
1486 an_rid_desc.an_len = ltv->an_len - 2;
1487 an_rid_desc.an_rid = ltv->an_type;
1488 an_rid_desc.an_phys = sc->an_rid_buffer.an_dma_paddr;
1489
1490 bcopy(&ltv->an_type, sc->an_rid_buffer.an_dma_vaddr,
1491 an_rid_desc.an_len);
1492
1493 bzero(&cmd,sizeof(cmd));
1494 bzero(&reply,sizeof(reply));
1495 cmd.an_cmd = AN_CMD_ACCESS|AN_ACCESS_WRITE;
1496 cmd.an_parm0 = ltv->an_type;
1497
1498 for (i = 0; i < sizeof(an_rid_desc) / 4; i++)
1499 CSR_MEM_AUX_WRITE_4(sc, AN_HOST_DESC_OFFSET + i * 4,
1500 ((u_int32_t*)&an_rid_desc)[i]);
1501
1502 if ((i = an_cmd_struct(sc, &cmd, &reply))) {
1c70eebf
JS
1503 if_printf(&sc->arpcom.ac_if,
1504 "failed to write RID 1 %x %x %x %x %x, %d\n",
1505 ltv->an_type,
984263bc
MD
1506 reply.an_status,
1507 reply.an_resp0,
1508 reply.an_resp1,
1509 reply.an_resp2,
1510 i);
1511 return(EIO);
1512 }
1513
1514 ptr = (u_int16_t *)buf;
1515
1516 if (reply.an_status & AN_CMD_QUAL_MASK) {
1c70eebf
JS
1517 if_printf(&sc->arpcom.ac_if,
1518 "failed to write RID 2 %x %x %x %x %x, %d\n",
1519 ltv->an_type,
984263bc
MD
1520 reply.an_status,
1521 reply.an_resp0,
1522 reply.an_resp1,
1523 reply.an_resp2,
1524 i);
1525 return(EIO);
1526 }
1527 }
1528
1529 return(0);
1530}
1531
1532static void
1533an_dump_record(sc, ltv, string)
1534 struct an_softc *sc;
1535 struct an_ltv_gen *ltv;
1536 char *string;
1537{
1538 u_int8_t *ptr2;
1539 int len;
1540 int i;
1541 int count = 0;
1542 char buf[17], temp;
1543
1544 len = ltv->an_len - 4;
1c70eebf
JS
1545 if_printf(&sc->arpcom.ac_if, "RID %4x, Length %4d, Mode %s\n",
1546 ltv->an_type, ltv->an_len - 4, string);
984263bc
MD
1547
1548 if (an_dump == 1 || (an_dump == ltv->an_type)) {
1c70eebf 1549 if_printf(&sc->arpcom.ac_if, "\t");
984263bc
MD
1550 bzero(buf,sizeof(buf));
1551
1552 ptr2 = (u_int8_t *)&ltv->an_val;
1553 for (i = len; i > 0; i--) {
1554 printf("%02x ", *ptr2);
1555
1556 temp = *ptr2++;
1557 if (temp >= ' ' && temp <= '~')
1558 buf[count] = temp;
1559 else if (temp >= 'A' && temp <= 'Z')
1560 buf[count] = temp;
1561 else
1562 buf[count] = '.';
1563 if (++count == 16) {
1564 count = 0;
1565 printf("%s\n",buf);
1c70eebf 1566 if_printf(&sc->arpcom.ac_if, "\t");
984263bc
MD
1567 bzero(buf,sizeof(buf));
1568 }
1569 }
1570 for (; count != 16; count++) {
1571 printf(" ");
1572 }
1573 printf(" %s\n",buf);
1574 }
1575}
1576
1577static int
1578an_seek(sc, id, off, chan)
1579 struct an_softc *sc;
1580 int id, off, chan;
1581{
1582 int i;
1583 int selreg, offreg;
1584
1585 switch (chan) {
1586 case AN_BAP0:
1587 selreg = AN_SEL0;
1588 offreg = AN_OFF0;
1589 break;
1590 case AN_BAP1:
1591 selreg = AN_SEL1;
1592 offreg = AN_OFF1;
1593 break;
1594 default:
1c70eebf 1595 if_printf(&sc->arpcom.ac_if, "invalid data path: %x\n", chan);
984263bc
MD
1596 return(EIO);
1597 }
1598
1599 CSR_WRITE_2(sc, selreg, id);
1600 CSR_WRITE_2(sc, offreg, off);
1601
1602 for (i = 0; i < AN_TIMEOUT; i++) {
1603 if (!(CSR_READ_2(sc, offreg) & (AN_OFF_BUSY|AN_OFF_ERR)))
1604 break;
1605 }
1606
1607 if (i == AN_TIMEOUT)
1608 return(ETIMEDOUT);
1609
1610 return(0);
1611}
1612
1613static int
1614an_read_data(sc, id, off, buf, len)
1615 struct an_softc *sc;
1616 int id, off;
1617 caddr_t buf;
1618 int len;
1619{
1620 int i;
1621 u_int16_t *ptr;
1622 u_int8_t *ptr2;
1623
1624 if (off != -1) {
1625 if (an_seek(sc, id, off, AN_BAP1))
1626 return(EIO);
1627 }
1628
1629 ptr = (u_int16_t *)buf;
1630 for (i = len; i > 1; i -= 2)
1631 *ptr++ = CSR_READ_2(sc, AN_DATA1);
1632 if (i) {
1633 ptr2 = (u_int8_t *)ptr;
1634 *ptr2 = CSR_READ_1(sc, AN_DATA1);
1635 }
1636
1637 return(0);
1638}
1639
1640static int
1641an_write_data(sc, id, off, buf, len)
1642 struct an_softc *sc;
1643 int id, off;
1644 caddr_t buf;
1645 int len;
1646{
1647 int i;
1648 u_int16_t *ptr;
1649 u_int8_t *ptr2;
1650
1651 if (off != -1) {
1652 if (an_seek(sc, id, off, AN_BAP0))
1653 return(EIO);
1654 }
1655
1656 ptr = (u_int16_t *)buf;
1657 for (i = len; i > 1; i -= 2)
1658 CSR_WRITE_2(sc, AN_DATA0, *ptr++);
1659 if (i) {
1660 ptr2 = (u_int8_t *)ptr;
1661 CSR_WRITE_1(sc, AN_DATA0, *ptr2);
1662 }
1663
1664 return(0);
1665}
1666
1667/*
1668 * Allocate a region of memory inside the NIC and zero
1669 * it out.
1670 */
1671static int
1672an_alloc_nicmem(sc, len, id)
1673 struct an_softc *sc;
1674 int len;
1675 int *id;
1676{
1677 int i;
1678
1679 if (an_cmd(sc, AN_CMD_ALLOC_MEM, len)) {
1c70eebf
JS
1680 if_printf(&sc->arpcom.ac_if,
1681 "failed to allocate %d bytes on NIC\n", len);
984263bc
MD
1682 return(ENOMEM);
1683 }
1684
1685 for (i = 0; i < AN_TIMEOUT; i++) {
1686 if (CSR_READ_2(sc, AN_EVENT_STAT(sc->mpi350)) & AN_EV_ALLOC)
1687 break;
1688 }
1689
1690 if (i == AN_TIMEOUT)
1691 return(ETIMEDOUT);
1692
1693 CSR_WRITE_2(sc, AN_EVENT_ACK(sc->mpi350), AN_EV_ALLOC);
1694 *id = CSR_READ_2(sc, AN_ALLOC_FID);
1695
1696 if (an_seek(sc, *id, 0, AN_BAP0))
1697 return(EIO);
1698
1699 for (i = 0; i < len / 2; i++)
1700 CSR_WRITE_2(sc, AN_DATA0, 0);
1701
1702 return(0);
1703}
1704
1705static void
1706an_setdef(sc, areq)
1707 struct an_softc *sc;
1708 struct an_req *areq;
1709{
984263bc
MD
1710 struct ifnet *ifp;
1711 struct an_ltv_genconfig *cfg;
1712 struct an_ltv_ssidlist *ssid;
1713 struct an_ltv_aplist *ap;
1714 struct an_ltv_gen *sp;
1715
1716 ifp = &sc->arpcom.ac_if;
1717
1718 switch (areq->an_type) {
1719 case AN_RID_GENCONFIG:
1720 cfg = (struct an_ltv_genconfig *)areq;
1721
984263bc
MD
1722 bcopy((char *)&cfg->an_macaddr, (char *)&sc->arpcom.ac_enaddr,
1723 ETHER_ADDR_LEN);
f2682cb9 1724 bcopy((char *)&cfg->an_macaddr, IF_LLADDR(ifp), ETHER_ADDR_LEN);
984263bc
MD
1725
1726 bcopy((char *)cfg, (char *)&sc->an_config,
1727 sizeof(struct an_ltv_genconfig));
1728 break;
1729 case AN_RID_SSIDLIST:
1730 ssid = (struct an_ltv_ssidlist *)areq;
1731 bcopy((char *)ssid, (char *)&sc->an_ssidlist,
1732 sizeof(struct an_ltv_ssidlist));
1733 break;
1734 case AN_RID_APLIST:
1735 ap = (struct an_ltv_aplist *)areq;
1736 bcopy((char *)ap, (char *)&sc->an_aplist,
1737 sizeof(struct an_ltv_aplist));
1738 break;
1739 case AN_RID_TX_SPEED:
1740 sp = (struct an_ltv_gen *)areq;
1741 sc->an_tx_rate = sp->an_val;
1742
1743 /* Read the current configuration */
1744 sc->an_config.an_type = AN_RID_GENCONFIG;
1745 sc->an_config.an_len = sizeof(struct an_ltv_genconfig);
1746 an_read_record(sc, (struct an_ltv_gen *)&sc->an_config);
1747 cfg = &sc->an_config;
1748
1749 /* clear other rates and set the only one we want */
1750 bzero(cfg->an_rates, sizeof(cfg->an_rates));
1751 cfg->an_rates[0] = sc->an_tx_rate;
1752
1753 /* Save the new rate */
1754 sc->an_config.an_type = AN_RID_GENCONFIG;
1755 sc->an_config.an_len = sizeof(struct an_ltv_genconfig);
1756 break;
1757 case AN_RID_WEP_TEMP:
1758 /* Cache the temp keys */
1759 bcopy(areq,
1760 &sc->an_temp_keys[((struct an_ltv_key *)areq)->kindex],
1761 sizeof(struct an_ltv_key));
1762 case AN_RID_WEP_PERM:
1763 case AN_RID_LEAPUSERNAME:
1764 case AN_RID_LEAPPASSWORD:
1765 /* Disable the MAC. */
1766 an_cmd(sc, AN_CMD_DISABLE, 0);
1767
1768 /* Write the key */
1769 an_write_record(sc, (struct an_ltv_gen *)areq);
1770
1771 /* Turn the MAC back on. */
1772 an_cmd(sc, AN_CMD_ENABLE, 0);
1773
1774 break;
1775 case AN_RID_MONITOR_MODE:
1776 cfg = (struct an_ltv_genconfig *)areq;
1777 bpfdetach(ifp);
1778 if (ng_ether_detach_p != NULL)
1779 (*ng_ether_detach_p) (ifp);
1780 sc->an_monitor = cfg->an_len;
1781
1782 if (sc->an_monitor & AN_MONITOR) {
1783 if (sc->an_monitor & AN_MONITOR_AIRONET_HEADER) {
1784 bpfattach(ifp, DLT_AIRONET_HEADER,
1785 sizeof(struct ether_header));
1786 } else {
1787 bpfattach(ifp, DLT_IEEE802_11,
1788 sizeof(struct ether_header));
1789 }
1790 } else {
1791 bpfattach(ifp, DLT_EN10MB,
1792 sizeof(struct ether_header));
1793 if (ng_ether_attach_p != NULL)
1794 (*ng_ether_attach_p) (ifp);
1795 }
1796 break;
1797 default:
1c70eebf 1798 if_printf(ifp, "unknown RID: %x\n", areq->an_type);
984263bc
MD
1799 return;
1800 break;
1801 }
1802
1803
1804 /* Reinitialize the card. */
1805 if (ifp->if_flags)
1806 an_init(sc);
1807
1808 return;
1809}
1810
1811/*
1812 * Derived from Linux driver to enable promiscious mode.
1813 */
1814
1815static void
1816an_promisc(sc, promisc)
1817 struct an_softc *sc;
1818 int promisc;
1819{
1820 if (sc->an_was_monitor)
1821 an_reset(sc);
1c70eebf
JS
1822 if (sc->mpi350)
1823 an_init_mpi350_desc(sc);
984263bc
MD
1824 if (sc->an_monitor || sc->an_was_monitor)
1825 an_init(sc);
1826
1827 sc->an_was_monitor = sc->an_monitor;
1828 an_cmd(sc, AN_CMD_SET_MODE, promisc ? 0xffff : 0);
1829
1830 return;
1831}
1832
1833static int
bd4539cc 1834an_ioctl(ifp, command, data, cr)
984263bc
MD
1835 struct ifnet *ifp;
1836 u_long command;
1837 caddr_t data;
bd4539cc 1838 struct ucred *cr;
984263bc
MD
1839{
1840 int s, error = 0;
1841 int len;
1842 int i;
1843 struct an_softc *sc;
1844 struct ifreq *ifr;
984263bc
MD
1845 struct ieee80211req *ireq;
1846 u_int8_t tmpstr[IEEE80211_NWID_LEN*2];
1847 u_int8_t *tmpptr;
1848 struct an_ltv_genconfig *config;
1849 struct an_ltv_key *key;
1850 struct an_ltv_status *status;
1851 struct an_ltv_ssidlist *ssids;
1852 int mode;
1853 struct aironet_ioctl l_ioctl;
1854
1855 sc = ifp->if_softc;
1856 s = splimp();
1857 ifr = (struct ifreq *)data;
1858 ireq = (struct ieee80211req *)data;
1859
1860 config = (struct an_ltv_genconfig *)&sc->areq;
1861 key = (struct an_ltv_key *)&sc->areq;
1862 status = (struct an_ltv_status *)&sc->areq;
1863 ssids = (struct an_ltv_ssidlist *)&sc->areq;
1864
1865 if (sc->an_gone) {
1866 error = ENODEV;
1867 goto out;
1868 }
1869
1870 switch (command) {
984263bc
MD
1871 case SIOCSIFFLAGS:
1872 if (ifp->if_flags & IFF_UP) {
1873 if (ifp->if_flags & IFF_RUNNING &&
1874 ifp->if_flags & IFF_PROMISC &&
1875 !(sc->an_if_flags & IFF_PROMISC)) {
1876 an_promisc(sc, 1);
1877 } else if (ifp->if_flags & IFF_RUNNING &&
1878 !(ifp->if_flags & IFF_PROMISC) &&
1879 sc->an_if_flags & IFF_PROMISC) {
1880 an_promisc(sc, 0);
1881 } else
1882 an_init(sc);
1883 } else {
1884 if (ifp->if_flags & IFF_RUNNING)
1885 an_stop(sc);
1886 }
1887 sc->an_if_flags = ifp->if_flags;
1888 error = 0;
1889 break;
1890 case SIOCSIFMEDIA:
1891 case SIOCGIFMEDIA:
1892 error = ifmedia_ioctl(ifp, ifr, &sc->an_ifmedia, command);
1893 break;
1894 case SIOCADDMULTI:
1895 case SIOCDELMULTI:
1896 /* The Aironet has no multicast filter. */
1897 error = 0;
1898 break;
1899 case SIOCGAIRONET:
1900 error = copyin(ifr->ifr_data, &sc->areq, sizeof(sc->areq));
1901 if (error != 0)
1902 break;
1903#ifdef ANCACHE
1904 if (sc->areq.an_type == AN_RID_ZERO_CACHE) {
bd4539cc 1905 error = suser_cred(cr, NULL_CRED_OKAY);
984263bc
MD
1906 if (error)
1907 break;
1908 sc->an_sigitems = sc->an_nextitem = 0;
1909 break;
1910 } else if (sc->areq.an_type == AN_RID_READ_CACHE) {
1911 char *pt = (char *)&sc->areq.an_val;
1912 bcopy((char *)&sc->an_sigitems, (char *)pt,
1913 sizeof(int));
1914 pt += sizeof(int);
1915 sc->areq.an_len = sizeof(int) / 2;
1916 bcopy((char *)&sc->an_sigcache, (char *)pt,
1917 sizeof(struct an_sigcache) * sc->an_sigitems);
1918 sc->areq.an_len += ((sizeof(struct an_sigcache) *
1919 sc->an_sigitems) / 2) + 1;
1920 } else
1921#endif
1922 if (an_read_record(sc, (struct an_ltv_gen *)&sc->areq)) {
1923 error = EINVAL;
1924 break;
1925 }
1926 error = copyout(&sc->areq, ifr->ifr_data, sizeof(sc->areq));
1927 break;
1928 case SIOCSAIRONET:
bd4539cc 1929 if ((error = suser_cred(cr, NULL_CRED_OKAY)))
984263bc
MD
1930 goto out;
1931 error = copyin(ifr->ifr_data, &sc->areq, sizeof(sc->areq));
1932 if (error != 0)
1933 break;
1934 an_setdef(sc, &sc->areq);
1935 break;
1936 case SIOCGPRIVATE_0: /* used by Cisco client utility */
bd4539cc 1937 if ((error = suser_cred(cr, NULL_CRED_OKAY)))
984263bc
MD
1938 goto out;
1939 copyin(ifr->ifr_data, &l_ioctl, sizeof(l_ioctl));
1940 mode = l_ioctl.command;
1941
1942 if (mode >= AIROGCAP && mode <= AIROGSTATSD32) {
1943 error = readrids(ifp, &l_ioctl);
1944 } else if (mode >= AIROPCAP && mode <= AIROPLEAPUSR) {
1945 error = writerids(ifp, &l_ioctl);
1946 } else if (mode >= AIROFLSHRST && mode <= AIRORESTART) {
1947 error = flashcard(ifp, &l_ioctl);
1948 } else {
1949 error =-1;
1950 }
1951
1952 /* copy out the updated command info */
1953 copyout(&l_ioctl, ifr->ifr_data, sizeof(l_ioctl));
1954
1955 break;
1956 case SIOCGPRIVATE_1: /* used by Cisco client utility */
bd4539cc 1957 if ((error = suser_cred(cr, NULL_CRED_OKAY)))
984263bc
MD
1958 goto out;
1959 copyin(ifr->ifr_data, &l_ioctl, sizeof(l_ioctl));
1960 l_ioctl.command = 0;
1961 error = AIROMAGIC;
1962 copyout(&error, l_ioctl.data, sizeof(error));
1963 error = 0;
1964 break;
1965 case SIOCG80211:
1966 sc->areq.an_len = sizeof(sc->areq);
1967 /* was that a good idea DJA we are doing a short-cut */
1968 switch (ireq->i_type) {
1969 case IEEE80211_IOC_SSID:
1970 if (ireq->i_val == -1) {
1971 sc->areq.an_type = AN_RID_STATUS;
1972 if (an_read_record(sc,
1973 (struct an_ltv_gen *)&sc->areq)) {
1974 error = EINVAL;
1975 break;
1976 }
1977 len = status->an_ssidlen;
1978 tmpptr = status->an_ssid;
1979 } else if (ireq->i_val >= 0) {
1980 sc->areq.an_type = AN_RID_SSIDLIST;
1981 if (an_read_record(sc,
1982 (struct an_ltv_gen *)&sc->areq)) {
1983 error = EINVAL;
1984 break;
1985 }
1986 if (ireq->i_val == 0) {
1987 len = ssids->an_ssid1_len;
1988 tmpptr = ssids->an_ssid1;
1989 } else if (ireq->i_val == 1) {
1990 len = ssids->an_ssid2_len;
1991 tmpptr = ssids->an_ssid2;
1992 } else if (ireq->i_val == 2) {
1993 len = ssids->an_ssid3_len;
1994 tmpptr = ssids->an_ssid3;
1995 } else {
1996 error = EINVAL;
1997 break;
1998 }
1999 } else {
2000 error = EINVAL;
2001 break;
2002 }
2003 if (len > IEEE80211_NWID_LEN) {
2004 error = EINVAL;
2005 break;
2006 }
2007 ireq->i_len = len;
2008 bzero(tmpstr, IEEE80211_NWID_LEN);
2009 bcopy(tmpptr, tmpstr, len);
2010 error = copyout(tmpstr, ireq->i_data,
2011 IEEE80211_NWID_LEN);
2012 break;
2013 case IEEE80211_IOC_NUMSSIDS:
2014 ireq->i_val = 3;
2015 break;
2016 case IEEE80211_IOC_WEP:
2017 sc->areq.an_type = AN_RID_ACTUALCFG;
2018 if (an_read_record(sc,
2019 (struct an_ltv_gen *)&sc->areq)) {
2020 error = EINVAL;
2021 break;
2022 }
2023 if (config->an_authtype & AN_AUTHTYPE_PRIVACY_IN_USE) {
2024 if (config->an_authtype &
2025 AN_AUTHTYPE_ALLOW_UNENCRYPTED)
2026 ireq->i_val = IEEE80211_WEP_MIXED;
2027 else
2028 ireq->i_val = IEEE80211_WEP_ON;
2029 } else {
2030 ireq->i_val = IEEE80211_WEP_OFF;
2031 }
2032 break;
2033 case IEEE80211_IOC_WEPKEY:
2034 /*
2035 * XXX: I'm not entierly convinced this is
2036 * correct, but it's what is implemented in
2037 * ancontrol so it will have to do until we get
2038 * access to actual Cisco code.
2039 */
2040 if (ireq->i_val < 0 || ireq->i_val > 8) {
2041 error = EINVAL;
2042 break;
2043 }
2044 len = 0;
2045 if (ireq->i_val < 5) {
2046 sc->areq.an_type = AN_RID_WEP_TEMP;
2047 for (i = 0; i < 5; i++) {
2048 if (an_read_record(sc,
2049 (struct an_ltv_gen *)&sc->areq)) {
2050 error = EINVAL;
2051 break;
2052 }
2053 if (key->kindex == 0xffff)
2054 break;
2055 if (key->kindex == ireq->i_val)
2056 len = key->klen;
2057 /* Required to get next entry */
2058 sc->areq.an_type = AN_RID_WEP_PERM;
2059 }
2060 if (error != 0)
2061 break;
2062 }
2063 /* We aren't allowed to read the value of the
2064 * key from the card so we just output zeros
2065 * like we would if we could read the card, but
2066 * denied the user access.
2067 */
2068 bzero(tmpstr, len);
2069 ireq->i_len = len;
2070 error = copyout(tmpstr, ireq->i_data, len);
2071 break;
2072 case IEEE80211_IOC_NUMWEPKEYS:
2073 ireq->i_val = 9; /* include home key */
2074 break;
2075 case IEEE80211_IOC_WEPTXKEY:
2076 /*
2077 * For some strange reason, you have to read all
2078 * keys before you can read the txkey.
2079 */
2080 sc->areq.an_type = AN_RID_WEP_TEMP;
2081 for (i = 0; i < 5; i++) {
2082 if (an_read_record(sc,
2083 (struct an_ltv_gen *) &sc->areq)) {
2084 error = EINVAL;
2085 break;
2086 }
2087 if (key->kindex == 0xffff)
2088 break;
2089 /* Required to get next entry */
2090 sc->areq.an_type = AN_RID_WEP_PERM;
2091 }
2092 if (error != 0)
2093 break;
2094
2095 sc->areq.an_type = AN_RID_WEP_PERM;
2096 key->kindex = 0xffff;
2097 if (an_read_record(sc,
2098 (struct an_ltv_gen *)&sc->areq)) {
2099 error = EINVAL;
2100 break;
2101 }
2102 ireq->i_val = key->mac[0];
2103 /*
2104 * Check for home mode. Map home mode into
2105 * 5th key since that is how it is stored on
2106 * the card
2107 */
2108 sc->areq.an_len = sizeof(struct an_ltv_genconfig);
2109 sc->areq.an_type = AN_RID_GENCONFIG;
2110 if (an_read_record(sc,
2111 (struct an_ltv_gen *)&sc->areq)) {
2112 error = EINVAL;
2113 break;
2114 }
2115 if (config->an_home_product & AN_HOME_NETWORK)
2116 ireq->i_val = 4;
2117 break;
2118 case IEEE80211_IOC_AUTHMODE:
2119 sc->areq.an_type = AN_RID_ACTUALCFG;
2120 if (an_read_record(sc,
2121 (struct an_ltv_gen *)&sc->areq)) {
2122 error = EINVAL;
2123 break;
2124 }
2125 if ((config->an_authtype & AN_AUTHTYPE_MASK) ==
2126 AN_AUTHTYPE_NONE) {
2127 ireq->i_val = IEEE80211_AUTH_NONE;
2128 } else if ((config->an_authtype & AN_AUTHTYPE_MASK) ==
2129 AN_AUTHTYPE_OPEN) {
2130 ireq->i_val = IEEE80211_AUTH_OPEN;
2131 } else if ((config->an_authtype & AN_AUTHTYPE_MASK) ==
2132 AN_AUTHTYPE_SHAREDKEY) {
2133 ireq->i_val = IEEE80211_AUTH_SHARED;
2134 } else
2135 error = EINVAL;
2136 break;
2137 case IEEE80211_IOC_STATIONNAME:
2138 sc->areq.an_type = AN_RID_ACTUALCFG;
2139 if (an_read_record(sc,
2140 (struct an_ltv_gen *)&sc->areq)) {
2141 error = EINVAL;
2142 break;
2143 }
2144 ireq->i_len = sizeof(config->an_nodename);
2145 tmpptr = config->an_nodename;
2146 bzero(tmpstr, IEEE80211_NWID_LEN);
2147 bcopy(tmpptr, tmpstr, ireq->i_len);
2148 error = copyout(tmpstr, ireq->i_data,
2149 IEEE80211_NWID_LEN);
2150 break;
2151 case IEEE80211_IOC_CHANNEL:
2152 sc->areq.an_type = AN_RID_STATUS;
2153 if (an_read_record(sc,
2154 (struct an_ltv_gen *)&sc->areq)) {
2155 error = EINVAL;
2156 break;
2157 }
2158 ireq->i_val = status->an_cur_channel;
2159 break;
2160 case IEEE80211_IOC_POWERSAVE:
2161 sc->areq.an_type = AN_RID_ACTUALCFG;
2162 if (an_read_record(sc,
2163 (struct an_ltv_gen *)&sc->areq)) {
2164 error = EINVAL;
2165 break;
2166 }
2167 if (config->an_psave_mode == AN_PSAVE_NONE) {
2168 ireq->i_val = IEEE80211_POWERSAVE_OFF;
2169 } else if (config->an_psave_mode == AN_PSAVE_CAM) {
2170 ireq->i_val = IEEE80211_POWERSAVE_CAM;
2171 } else if (config->an_psave_mode == AN_PSAVE_PSP) {
2172 ireq->i_val = IEEE80211_POWERSAVE_PSP;
2173 } else if (config->an_psave_mode == AN_PSAVE_PSP_CAM) {
2174 ireq->i_val = IEEE80211_POWERSAVE_PSP_CAM;
2175 } else
2176 error = EINVAL;
2177 break;
2178 case IEEE80211_IOC_POWERSAVESLEEP:
2179 sc->areq.an_type = AN_RID_ACTUALCFG;
2180 if (an_read_record(sc,
2181 (struct an_ltv_gen *)&sc->areq)) {
2182 error = EINVAL;
2183 break;
2184 }
2185 ireq->i_val = config->an_listen_interval;
2186 break;
2187 }
2188 break;
2189 case SIOCS80211:
bd4539cc 2190 if ((error = suser_cred(cr, NULL_CRED_OKAY)))
984263bc
MD
2191 goto out;
2192 sc->areq.an_len = sizeof(sc->areq);
2193 /*
2194 * We need a config structure for everything but the WEP
2195 * key management and SSIDs so we get it now so avoid
2196 * duplicating this code every time.
2197 */
2198 if (ireq->i_type != IEEE80211_IOC_SSID &&
2199 ireq->i_type != IEEE80211_IOC_WEPKEY &&
2200 ireq->i_type != IEEE80211_IOC_WEPTXKEY) {
2201 sc->areq.an_type = AN_RID_GENCONFIG;
2202 if (an_read_record(sc,
2203 (struct an_ltv_gen *)&sc->areq)) {
2204 error = EINVAL;
2205 break;
2206 }
2207 }
2208 switch (ireq->i_type) {
2209 case IEEE80211_IOC_SSID:
2210 sc->areq.an_type = AN_RID_SSIDLIST;
2211 if (an_read_record(sc,
2212 (struct an_ltv_gen *)&sc->areq)) {
2213 error = EINVAL;
2214 break;
2215 }
2216 if (ireq->i_len > IEEE80211_NWID_LEN) {
2217 error = EINVAL;
2218 break;
2219 }
2220 switch (ireq->i_val) {
2221 case 0:
2222 error = copyin(ireq->i_data,
2223 ssids->an_ssid1, ireq->i_len);
2224 ssids->an_ssid1_len = ireq->i_len;
2225 break;
2226 case 1:
2227 error = copyin(ireq->i_data,
2228 ssids->an_ssid2, ireq->i_len);
2229 ssids->an_ssid2_len = ireq->i_len;
2230 break;
2231 case 2:
2232 error = copyin(ireq->i_data,
2233 ssids->an_ssid3, ireq->i_len);
2234 ssids->an_ssid3_len = ireq->i_len;
2235 break;
2236 default:
2237 error = EINVAL;
2238 break;
2239 }
2240 break;
2241 case IEEE80211_IOC_WEP:
2242 switch (ireq->i_val) {
2243 case IEEE80211_WEP_OFF:
2244 config->an_authtype &=
2245 ~(AN_AUTHTYPE_PRIVACY_IN_USE |
2246 AN_AUTHTYPE_ALLOW_UNENCRYPTED);
2247 break;
2248 case IEEE80211_WEP_ON:
2249 config->an_authtype |=
2250 AN_AUTHTYPE_PRIVACY_IN_USE;
2251 config->an_authtype &=
2252 ~AN_AUTHTYPE_ALLOW_UNENCRYPTED;
2253 break;
2254 case IEEE80211_WEP_MIXED:
2255 config->an_authtype |=
2256 AN_AUTHTYPE_PRIVACY_IN_USE |
2257 AN_AUTHTYPE_ALLOW_UNENCRYPTED;
2258 break;
2259 default:
2260 error = EINVAL;
2261 break;
2262 }
2263 break;
2264 case IEEE80211_IOC_WEPKEY:
2265 if (ireq->i_val < 0 || ireq->i_val > 8 ||
2266 ireq->i_len > 13) {
2267 error = EINVAL;
2268 break;
2269 }
2270 error = copyin(ireq->i_data, tmpstr, 13);
2271 if (error != 0)
2272 break;
2273 /*
2274 * Map the 9th key into the home mode
2275 * since that is how it is stored on
2276 * the card
2277 */
2278 bzero(&sc->areq, sizeof(struct an_ltv_key));
2279 sc->areq.an_len = sizeof(struct an_ltv_key);
2280 key->mac[0] = 1; /* The others are 0. */
2281 if (ireq->i_val < 4) {
2282 sc->areq.an_type = AN_RID_WEP_TEMP;
2283 key->kindex = ireq->i_val;
2284 } else {
2285 sc->areq.an_type = AN_RID_WEP_PERM;
2286 key->kindex = ireq->i_val - 4;
2287 }
2288 key->klen = ireq->i_len;
2289 bcopy(tmpstr, key->key, key->klen);
2290 break;
2291 case IEEE80211_IOC_WEPTXKEY:
2292 if (ireq->i_val < 0 || ireq->i_val > 4) {
2293 error = EINVAL;
2294 break;
2295 }
2296
2297 /*
2298 * Map the 5th key into the home mode
2299 * since that is how it is stored on
2300 * the card
2301 */
2302 sc->areq.an_len = sizeof(struct an_ltv_genconfig);
2303 sc->areq.an_type = AN_RID_ACTUALCFG;
2304 if (an_read_record(sc,
2305 (struct an_ltv_gen *)&sc->areq)) {
2306 error = EINVAL;
2307 break;
2308 }
2309 if (ireq->i_val == 4) {
2310 config->an_home_product |= AN_HOME_NETWORK;
2311 ireq->i_val = 0;
2312 } else {
2313 config->an_home_product &= ~AN_HOME_NETWORK;
2314 }
2315
2316 sc->an_config.an_home_product
2317 = config->an_home_product;
2318
2319 /* update configuration */
2320 an_init(sc);
2321
2322 bzero(&sc->areq, sizeof(struct an_ltv_key));
2323 sc->areq.an_len = sizeof(struct an_ltv_key);
2324 sc->areq.an_type = AN_RID_WEP_PERM;
2325 key->kindex = 0xffff;
2326 key->mac[0] = ireq->i_val;
2327 break;
2328 case IEEE80211_IOC_AUTHMODE:
2329 switch (ireq->i_val) {
2330 case IEEE80211_AUTH_NONE:
2331 config->an_authtype = AN_AUTHTYPE_NONE |
2332 (config->an_authtype & ~AN_AUTHTYPE_MASK);
2333 break;
2334 case IEEE80211_AUTH_OPEN:
2335 config->an_authtype = AN_AUTHTYPE_OPEN |
2336 (config->an_authtype & ~AN_AUTHTYPE_MASK);
2337 break;
2338 case IEEE80211_AUTH_SHARED:
2339 config->an_authtype = AN_AUTHTYPE_SHAREDKEY |
2340 (config->an_authtype & ~AN_AUTHTYPE_MASK);
2341 break;
2342 default:
2343 error = EINVAL;
2344 }
2345 break;
2346 case IEEE80211_IOC_STATIONNAME:
2347 if (ireq->i_len > 16) {
2348 error = EINVAL;
2349 break;
2350 }
2351 bzero(config->an_nodename, 16);
2352 error = copyin(ireq->i_data,
2353 config->an_nodename, ireq->i_len);
2354 break;
2355 case IEEE80211_IOC_CHANNEL:
2356 /*
2357 * The actual range is 1-14, but if you set it
2358 * to 0 you get the default so we let that work
2359 * too.
2360 */
2361 if (ireq->i_val < 0 || ireq->i_val >14) {
2362 error = EINVAL;
2363 break;
2364 }
2365 config->an_ds_channel = ireq->i_val;
2366 break;
2367 case IEEE80211_IOC_POWERSAVE:
2368 switch (ireq->i_val) {
2369 case IEEE80211_POWERSAVE_OFF:
2370 config->an_psave_mode = AN_PSAVE_NONE;
2371 break;
2372 case IEEE80211_POWERSAVE_CAM:
2373 config->an_psave_mode = AN_PSAVE_CAM;
2374 break;
2375 case IEEE80211_POWERSAVE_PSP:
2376 config->an_psave_mode = AN_PSAVE_PSP;
2377 break;
2378 case IEEE80211_POWERSAVE_PSP_CAM:
2379 config->an_psave_mode = AN_PSAVE_PSP_CAM;
2380 break;
2381 default:
2382 error = EINVAL;
2383 break;
2384 }
2385 break;
2386 case IEEE80211_IOC_POWERSAVESLEEP:
2387 config->an_listen_interval = ireq->i_val;
2388 break;
2389 }
2390
2391 if (!error)
2392 an_setdef(sc, &sc->areq);
2393 break;
2394 default:
4cde4dd5 2395 error = ether_ioctl(ifp, command, data);
984263bc
MD
2396 break;
2397 }
2398out:
2399 splx(s);
2400
2401 return(error != 0);
2402}
2403
2404static int
2405an_init_tx_ring(sc)
2406 struct an_softc *sc;
2407{
2408 int i;
2409 int id;
2410
2411 if (sc->an_gone)
2412 return (0);
2413
2414 if (!sc->mpi350) {
2415 for (i = 0; i < AN_TX_RING_CNT; i++) {
2416 if (an_alloc_nicmem(sc, 1518 +
2417 0x44, &id))
2418 return(ENOMEM);
2419 sc->an_rdata.an_tx_fids[i] = id;
2420 sc->an_rdata.an_tx_ring[i] = 0;
2421 }
2422 }
2423
2424 sc->an_rdata.an_tx_prod = 0;
2425 sc->an_rdata.an_tx_cons = 0;
2426 sc->an_rdata.an_tx_empty = 1;
2427
2428 return(0);
2429}
2430
2431static void
2432an_init(xsc)
2433 void *xsc;
2434{
2435 struct an_softc *sc = xsc;
2436 struct ifnet *ifp = &sc->arpcom.ac_if;
2437 int s;
2438
2439 s = splimp();
2440
2441 if (sc->an_gone) {
2442 splx(s);
2443 return;
2444 }
2445
2446 if (ifp->if_flags & IFF_RUNNING)
2447 an_stop(sc);
2448
2449 sc->an_associated = 0;
2450
2451 /* Allocate the TX buffers */
2452 if (an_init_tx_ring(sc)) {
2453 an_reset(sc);
2454 if (sc->mpi350)
2455 an_init_mpi350_desc(sc);
2456 if (an_init_tx_ring(sc)) {
1c70eebf 2457 if_printf(ifp, "tx buffer allocation failed\n");
984263bc
MD
2458 splx(s);
2459 return;
2460 }
2461 }
2462
2463 /* Set our MAC address. */
2464 bcopy((char *)&sc->arpcom.ac_enaddr,
2465 (char *)&sc->an_config.an_macaddr, ETHER_ADDR_LEN);
2466
2467 if (ifp->if_flags & IFF_BROADCAST)
2468 sc->an_config.an_rxmode = AN_RXMODE_BC_ADDR;
2469 else
2470 sc->an_config.an_rxmode = AN_RXMODE_ADDR;
2471
2472 if (ifp->if_flags & IFF_MULTICAST)
2473 sc->an_config.an_rxmode = AN_RXMODE_BC_MC_ADDR;
2474
2475 if (ifp->if_flags & IFF_PROMISC) {
2476 if (sc->an_monitor & AN_MONITOR) {
2477 if (sc->an_monitor & AN_MONITOR_ANY_BSS) {
2478 sc->an_config.an_rxmode |=
2479 AN_RXMODE_80211_MONITOR_ANYBSS |
2480 AN_RXMODE_NO_8023_HEADER;
2481 } else {
2482 sc->an_config.an_rxmode |=
2483 AN_RXMODE_80211_MONITOR_CURBSS |
2484 AN_RXMODE_NO_8023_HEADER;
2485 }
2486 }
2487 }
2488
2489 if (sc->an_have_rssimap)
2490 sc->an_config.an_rxmode |= AN_RXMODE_NORMALIZED_RSSI;
2491
2492 /* Set the ssid list */
2493 sc->an_ssidlist.an_type = AN_RID_SSIDLIST;
2494 sc->an_ssidlist.an_len = sizeof(struct an_ltv_ssidlist);
2495 if (an_write_record(sc, (struct an_ltv_gen *)&sc->an_ssidlist)) {
1c70eebf 2496 if_printf(ifp, "failed to set ssid list\n");
984263bc
MD
2497 splx(s);
2498 return;
2499 }
2500
2501 /* Set the AP list */
2502 sc->an_aplist.an_type = AN_RID_APLIST;
2503 sc->an_aplist.an_len = sizeof(struct an_ltv_aplist);
2504 if (an_write_record(sc, (struct an_ltv_gen *)&sc->an_aplist)) {
1c70eebf 2505 if_printf(ifp, "failed to set AP list\n");
984263bc
MD
2506 splx(s);
2507 return;
2508 }
2509
2510 /* Set the configuration in the NIC */
2511 sc->an_config.an_len = sizeof(struct an_ltv_genconfig);
2512 sc->an_config.an_type = AN_RID_GENCONFIG;
2513 if (an_write_record(sc, (struct an_ltv_gen *)&sc->an_config)) {
1c70eebf 2514 if_printf(ifp, "failed to set configuration\n");
984263bc
MD
2515 splx(s);
2516 return;
2517 }
2518
2519 /* Enable the MAC */
2520 if (an_cmd(sc, AN_CMD_ENABLE, 0)) {
1c70eebf 2521 if_printf(ifp, "failed to enable MAC\n");
984263bc
MD
2522 splx(s);
2523 return;
2524 }
2525
2526 if (ifp->if_flags & IFF_PROMISC)
2527 an_cmd(sc, AN_CMD_SET_MODE, 0xffff);
2528
2529 /* enable interrupts */
2530 CSR_WRITE_2(sc, AN_INT_EN(sc->mpi350), AN_INTRS);
2531
2532 ifp->if_flags |= IFF_RUNNING;
2533 ifp->if_flags &= ~IFF_OACTIVE;
2534
89c0f216 2535 callout_reset(&sc->an_stat_timer, hz, an_stats_update, sc);
984263bc
MD
2536 splx(s);
2537
2538 return;
2539}
2540
2541static void
2542an_start(ifp)
2543 struct ifnet *ifp;
2544{
2545 struct an_softc *sc;
2546 struct mbuf *m0 = NULL;
2547 struct an_txframe_802_3 tx_frame_802_3;
2548 struct ether_header *eh;
2549 int id, idx, i;
2550 unsigned char txcontrol;
2551 struct an_card_tx_desc an_tx_desc;
2552 u_int8_t *ptr;
2553 u_int8_t *buf;
2554
2555 sc = ifp->if_softc;
2556
2557 if (sc->an_gone)
2558 return;
2559
2560 if (ifp->if_flags & IFF_OACTIVE)
2561 return;
2562
2563 if (!sc->an_associated)
2564 return;
2565
2566 /* We can't send in monitor mode so toss any attempts. */
2567 if (sc->an_monitor && (ifp->if_flags & IFF_PROMISC)) {
38de8487 2568 ifq_purge(&ifp->if_snd);
984263bc
MD
2569 return;
2570 }
2571
2572 idx = sc->an_rdata.an_tx_prod;
2573
2574 if (!sc->mpi350) {
2575 bzero((char *)&tx_frame_802_3, sizeof(tx_frame_802_3));
2576
2577 while (sc->an_rdata.an_tx_ring[idx] == 0) {
38de8487 2578 m0 = ifq_dequeue(&ifp->if_snd);
984263bc
MD
2579 if (m0 == NULL)
2580 break;
2581
2582 id = sc->an_rdata.an_tx_fids[idx];
2583 eh = mtod(m0, struct ether_header *);
2584
2585 bcopy((char *)&eh->ether_dhost,
2586 (char *)&tx_frame_802_3.an_tx_dst_addr,
2587 ETHER_ADDR_LEN);
2588 bcopy((char *)&eh->ether_shost,
2589 (char *)&tx_frame_802_3.an_tx_src_addr,
2590 ETHER_ADDR_LEN);
2591
2592 /* minus src/dest mac & type */
2593 tx_frame_802_3.an_tx_802_3_payload_len =
2594 m0->m_pkthdr.len - 12;
2595
2596 m_copydata(m0, sizeof(struct ether_header) - 2 ,
2597 tx_frame_802_3.an_tx_802_3_payload_len,
2598 (caddr_t)&sc->an_txbuf);
2599
2600 txcontrol = AN_TXCTL_8023;
2601 /* write the txcontrol only */
2602 an_write_data(sc, id, 0x08, (caddr_t)&txcontrol,
2603 sizeof(txcontrol));
2604
2605 /* 802_3 header */
2606 an_write_data(sc, id, 0x34, (caddr_t)&tx_frame_802_3,
2607 sizeof(struct an_txframe_802_3));
2608
2609 /* in mbuf header type is just before payload */
2610 an_write_data(sc, id, 0x44, (caddr_t)&sc->an_txbuf,
2611 tx_frame_802_3.an_tx_802_3_payload_len);
2612
7600679e 2613 BPF_MTAP(ifp, m0);
984263bc
MD
2614
2615 m_freem(m0);
2616 m0 = NULL;
2617
2618 sc->an_rdata.an_tx_ring[idx] = id;
2619 if (an_cmd(sc, AN_CMD_TX, id))
1c70eebf 2620 if_printf(ifp, "xmit failed\n");
984263bc
MD
2621
2622 AN_INC(idx, AN_TX_RING_CNT);
2623 }
2624 } else { /* MPI-350 */
2625 while (sc->an_rdata.an_tx_empty ||
2626 idx != sc->an_rdata.an_tx_cons) {
38de8487 2627 m0 = ifq_dequeue(&ifp->if_snd);
984263bc
MD
2628 if (m0 == NULL) {
2629 break;
2630 }
2631 buf = sc->an_tx_buffer[idx].an_dma_vaddr;
2632
2633 eh = mtod(m0, struct ether_header *);
2634
2635 /* DJA optimize this to limit bcopy */
2636 bcopy((char *)&eh->ether_dhost,
2637 (char *)&tx_frame_802_3.an_tx_dst_addr,
2638 ETHER_ADDR_LEN);
2639 bcopy((char *)&eh->ether_shost,
2640 (char *)&tx_frame_802_3.an_tx_src_addr,
2641 ETHER_ADDR_LEN);
2642
2643 /* minus src/dest mac & type */
2644 tx_frame_802_3.an_tx_802_3_payload_len =
2645 m0->m_pkthdr.len - 12;
2646
2647 m_copydata(m0, sizeof(struct ether_header) - 2 ,
2648 tx_frame_802_3.an_tx_802_3_payload_len,
2649 (caddr_t)&sc->an_txbuf);
2650
2651 txcontrol = AN_TXCTL_8023;
2652 /* write the txcontrol only */
2653 bcopy((caddr_t)&txcontrol, &buf[0x08],
2654 sizeof(txcontrol));
2655
2656 /* 802_3 header */
2657 bcopy((caddr_t)&tx_frame_802_3, &buf[0x34],
2658 sizeof(struct an_txframe_802_3));
2659
2660 /* in mbuf header type is just before payload */
2661 bcopy((caddr_t)&sc->an_txbuf, &buf[0x44],
2662 tx_frame_802_3.an_tx_802_3_payload_len);
2663
2664
2665 bzero(&an_tx_desc, sizeof(an_tx_desc));
2666 an_tx_desc.an_offset = 0;
2667 an_tx_desc.an_eoc = 1;
2668 an_tx_desc.an_valid = 1;
2669 an_tx_desc.an_len = 0x44 +
2670 tx_frame_802_3.an_tx_802_3_payload_len;
2671 an_tx_desc.an_phys = sc->an_tx_buffer[idx].an_dma_paddr;
2672 ptr = (u_int8_t*)&an_tx_desc;
2673 for (i = 0; i < sizeof(an_tx_desc); i++) {
2674 CSR_MEM_AUX_WRITE_1(sc, AN_TX_DESC_OFFSET + i,
2675 ptr[i]);
2676 }
2677
7600679e 2678 BPF_MTAP(ifp, m0);
984263bc
MD
2679
2680 m_freem(m0);
2681 m0 = NULL;
2682
2683 CSR_WRITE_2(sc, AN_EVENT_ACK(sc->mpi350), AN_EV_ALLOC);
2684
2685 AN_INC(idx, AN_MAX_TX_DESC);
2686 sc->an_rdata.an_tx_empty = 0;
2687 }
2688 }
2689
2690 if (m0 != NULL)
2691 ifp->if_flags |= IFF_OACTIVE;
2692
2693 sc->an_rdata.an_tx_prod = idx;
2694
2695 /*
2696 * Set a timeout in case the chip goes out to lunch.
2697 */
2698 ifp->if_timer = 5;
2699
2700 return;
2701}
2702
2703void
2704an_stop(sc)
2705 struct an_softc *sc;
2706{
2707 struct ifnet *ifp;
2708 int i;
2709 int s;
2710
2711 s = splimp();
2712
2713 if (sc->an_gone) {
2714 splx(s);
2715 return;
2716 }
2717
2718 ifp = &sc->arpcom.ac_if;
2719
2720 an_cmd(sc, AN_CMD_FORCE_SYNCLOSS, 0);
2721 CSR_WRITE_2(sc, AN_INT_EN(sc->mpi350), 0);
2722 an_cmd(sc, AN_CMD_DISABLE, 0);
2723
2724 for (i = 0; i < AN_TX_RING_CNT; i++)
2725 an_cmd(sc, AN_CMD_DEALLOC_MEM, sc->an_rdata.an_tx_fids[i]);
2726
89c0f216 2727 callout_stop(&sc->an_stat_timer);
984263bc
MD
2728
2729 ifp->if_flags &= ~(IFF_RUNNING|IFF_OACTIVE);
2730
2731 if (sc->an_flash_buffer) {
2732 free(sc->an_flash_buffer, M_DEVBUF);
2733 sc->an_flash_buffer = NULL;
2734 }
2735
2736 splx(s);
2737
2738 return;
2739}
2740
2741static void
2742an_watchdog(ifp)
2743 struct ifnet *ifp;
2744{
2745 struct an_softc *sc;
2746 int s;
2747
2748 sc = ifp->if_softc;
2749 s = splimp();
2750
2751 if (sc->an_gone) {
2752 splx(s);
2753 return;
2754 }
2755
1c70eebf 2756 if_printf(ifp, "device timeout\n");
984263bc
MD
2757
2758 an_reset(sc);
2759 if (sc->mpi350)
2760 an_init_mpi350_desc(sc);
2761 an_init(sc);
2762
2763 ifp->if_oerrors++;
2764 splx(s);
2765
2766 return;
2767}
2768
2769void
2770an_shutdown(dev)
2771 device_t dev;
2772{
2773 struct an_softc *sc;
2774
2775 sc = device_get_softc(dev);
2776 an_stop(sc);
2777
2778 return;
2779}
2780
2781void
2782an_resume(dev)
2783 device_t dev;
2784{
2785 struct an_softc *sc;
2786 struct ifnet *ifp;
2787 int i;
2788
2789 sc = device_get_softc(dev);
2790 ifp = &sc->arpcom.ac_if;
2791
2792 an_reset(sc);
2793 if (sc->mpi350)
2794 an_init_mpi350_desc(sc);
2795 an_init(sc);
2796
2797 /* Recovery temporary keys */
2798 for (i = 0; i < 4; i++) {
2799 sc->areq.an_type = AN_RID_WEP_TEMP;
2800 sc->areq.an_len = sizeof(struct an_ltv_key);
2801 bcopy(&sc->an_temp_keys[i],
2802 &sc->areq, sizeof(struct an_ltv_key));
2803 an_setdef(sc, &sc->areq);
2804 }
2805
2806 if (ifp->if_flags & IFF_UP)
2807 an_start(ifp);
2808
2809 return;
2810}
2811
2812#ifdef ANCACHE
2813/* Aironet signal strength cache code.
2814 * store signal/noise/quality on per MAC src basis in
2815 * a small fixed cache. The cache wraps if > MAX slots
2816 * used. The cache may be zeroed out to start over.
2817 * Two simple filters exist to reduce computation:
2818 * 1. ip only (literally 0x800, ETHERTYPE_IP) which may be used
2819 * to ignore some packets. It defaults to ip only.
2820 * it could be used to focus on broadcast, non-IP 802.11 beacons.
2821 * 2. multicast/broadcast only. This may be used to
2822 * ignore unicast packets and only cache signal strength
2823 * for multicast/broadcast packets (beacons); e.g., Mobile-IP
2824 * beacons and not unicast traffic.
2825 *
2826 * The cache stores (MAC src(index), IP src (major clue), signal,
2827 * quality, noise)
2828 *
2829 * No apologies for storing IP src here. It's easy and saves much
2830 * trouble elsewhere. The cache is assumed to be INET dependent,
2831 * although it need not be.
2832 *
2833 * Note: the Aironet only has a single byte of signal strength value
2834 * in the rx frame header, and it's not scaled to anything sensible.
2835 * This is kind of lame, but it's all we've got.
2836 */
2837
2838#ifdef documentation
2839
2840int an_sigitems; /* number of cached entries */
2841struct an_sigcache an_sigcache[MAXANCACHE]; /* array of cache entries */
2842int an_nextitem; /* index/# of entries */
2843
2844
2845#endif
2846
2847/* control variables for cache filtering. Basic idea is
2848 * to reduce cost (e.g., to only Mobile-IP agent beacons
2849 * which are broadcast or multicast). Still you might
2850 * want to measure signal strength anth unicast ping packets
2851 * on a pt. to pt. ant. setup.
2852 */
2853/* set true if you want to limit cache items to broadcast/mcast
2854 * only packets (not unicast). Useful for mobile-ip beacons which
2855 * are broadcast/multicast at network layer. Default is all packets
2856 * so ping/unicast anll work say anth pt. to pt. antennae setup.
2857 */
2858static int an_cache_mcastonly = 0;
2859SYSCTL_INT(_hw_an, OID_AUTO, an_cache_mcastonly, CTLFLAG_RW,
2860 &an_cache_mcastonly, 0, "");
2861
2862/* set true if you want to limit cache items to IP packets only
2863*/
2864static int an_cache_iponly = 1;
2865SYSCTL_INT(_hw_an, OID_AUTO, an_cache_iponly, CTLFLAG_RW,
2866 &an_cache_iponly, 0, "");
2867
2868/*
2869 * an_cache_store, per rx packet store signal
2870 * strength in MAC (src) indexed cache.
2871 */
2872static void
3013ac0e 2873an_cache_store (sc, m, rx_rssi, rx_quality)
984263bc 2874 struct an_softc *sc;
984263bc
MD
2875 struct mbuf *m;
2876 u_int8_t rx_rssi;
2877 u_int8_t rx_quality;
2878{
3013ac0e
JS
2879 struct ether_header *eh = mtod(m, struct ether_header *);
2880 struct ip *ip = NULL;
984263bc
MD
2881 int i;
2882 static int cache_slot = 0; /* use this cache entry */
2883 static int wrapindex = 0; /* next "free" cache entry */
984263bc
MD
2884
2885 /* filters:
2886 * 1. ip only
2887 * 2. configurable filter to throw out unicast packets,
2888 * keep multicast only.
2889 */
2890
3013ac0e
JS
2891 if ((ntohs(eh->ether_type) == ETHERTYPE_IP))
2892 ip = (struct ip *)(mtod(m, uint8_t *) + ETHER_HDR_LEN);
2893 else if (an_cache_iponly)
984263bc 2894 return;
984263bc
MD
2895
2896 /* filter for broadcast/multicast only
2897 */
2898 if (an_cache_mcastonly && ((eh->ether_dhost[0] & 1) == 0)) {
2899 return;
2900 }
2901
2902#ifdef SIGDEBUG
1c70eebf
JS
2903 if_printf(&sc->arpcom.ac_if, "q value %x (MSB=0x%x, LSB=0x%x)\n",
2904 rx_rssi & 0xffff, rx_rssi >> 8, rx_rssi & 0xff);
984263bc
MD
2905#endif
2906
984263bc
MD
2907 /* do a linear search for a matching MAC address
2908 * in the cache table
2909 * . MAC address is 6 bytes,
2910 * . var w_nextitem holds total number of entries already cached
2911 */
2912 for (i = 0; i < sc->an_nextitem; i++) {
2913 if (! bcmp(eh->ether_shost , sc->an_sigcache[i].macsrc, 6 )) {
2914 /* Match!,
2915 * so we already have this entry,
2916 * update the data
2917 */
2918 break;
2919 }
2920 }
2921
2922 /* did we find a matching mac address?
2923 * if yes, then overwrite a previously existing cache entry
2924 */
2925 if (i < sc->an_nextitem ) {
2926 cache_slot = i;
2927 }
2928 /* else, have a new address entry,so
2929 * add this new entry,
2930 * if table full, then we need to replace LRU entry
2931 */
2932 else {
2933
2934 /* check for space in cache table
2935 * note: an_nextitem also holds number of entries
2936 * added in the cache table
2937 */
2938 if ( sc->an_nextitem < MAXANCACHE ) {
2939 cache_slot = sc->an_nextitem;
2940 sc->an_nextitem++;
2941 sc->an_sigitems = sc->an_nextitem;
2942 }
2943 /* no space found, so simply wrap anth wrap index
2944 * and "zap" the next entry
2945 */
2946 else {
2947 if (wrapindex == MAXANCACHE) {
2948 wrapindex = 0;
2949 }
2950 cache_slot = wrapindex++;
2951 }
2952 }
2953
2954 /* invariant: cache_slot now points at some slot
2955 * in cache.
2956 */
2957 if (cache_slot < 0 || cache_slot >= MAXANCACHE) {
2958 log(LOG_ERR, "an_cache_store, bad index: %d of "
2959 "[0..%d], gross cache error\n",
2960 cache_slot, MAXANCACHE);
2961 return;
2962 }
2963
2964 /* store items in cache
2965 * .ip source address
2966 * .mac src
2967 * .signal, etc.
2968 */
3013ac0e 2969 if (ip != NULL) {
984263bc
MD
2970 sc->an_sigcache[cache_slot].ipsrc = ip->ip_src.s_addr;
2971 }
2972 bcopy( eh->ether_shost, sc->an_sigcache[cache_slot].macsrc, 6);
2973
2974
2975 switch (an_cache_mode) {
2976 case DBM:
2977 if (sc->an_have_rssimap) {
2978 sc->an_sigcache[cache_slot].signal =
2979 - sc->an_rssimap.an_entries[rx_rssi].an_rss_dbm;
2980 sc->an_sigcache[cache_slot].quality =
2981 - sc->an_rssimap.an_entries[rx_quality].an_rss_dbm;
2982 } else {
2983 sc->an_sigcache[cache_slot].signal = rx_rssi - 100;
2984 sc->an_sigcache[cache_slot].quality = rx_quality - 100;
2985 }
2986 break;
2987 case PERCENT:
2988 if (sc->an_have_rssimap) {
2989 sc->an_sigcache[cache_slot].signal =
2990 sc->an_rssimap.an_entries[rx_rssi].an_rss_pct;
2991 sc->an_sigcache[cache_slot].quality =
2992 sc->an_rssimap.an_entries[rx_quality].an_rss_pct;
2993 } else {
2994 if (rx_rssi > 100)
2995 rx_rssi = 100;
2996 if (rx_quality > 100)
2997 rx_quality = 100;
2998 sc->an_sigcache[cache_slot].signal = rx_rssi;
2999 sc->an_sigcache[cache_slot].quality = rx_quality;
3000 }
3001 break;
3002 case RAW:
3003 sc->an_sigcache[cache_slot].signal = rx_rssi;
3004 sc->an_sigcache[cache_slot].quality = rx_quality;
3005 break;
3006 }
3007
3008 sc->an_sigcache[cache_slot].noise = 0;
3009
3010 return;
3011}
3012#endif
3013
3014static int
3015an_media_change(ifp)
3016 struct ifnet *ifp;
3017{
3018 struct an_softc *sc = ifp->if_softc;
3019 struct an_ltv_genconfig *cfg;
3020 int otype = sc->an_config.an_opmode;
3021 int orate = sc->an_tx_rate;
3022
3023 if ((sc->an_ifmedia.ifm_cur->ifm_media & IFM_IEEE80211_ADHOC) != 0)
3024 sc->an_config.an_opmode = AN_OPMODE_IBSS_ADHOC;
3025 else
3026 sc->an_config.an_opmode = AN_OPMODE_INFRASTRUCTURE_STATION;
3027
3028 switch (IFM_SUBTYPE(sc->an_ifmedia.ifm_cur->ifm_media)) {
3029 case IFM_IEEE80211_DS1:
3030 sc->an_tx_rate = AN_RATE_1MBPS;
3031 break;
3032 case IFM_IEEE80211_DS2:
3033 sc->an_tx_rate = AN_RATE_2MBPS;
3034 break;
3035 case IFM_IEEE80211_DS5:
3036 sc->an_tx_rate = AN_RATE_5_5MBPS;
3037 break;
3038 case IFM_IEEE80211_DS11:
3039 sc->an_tx_rate = AN_RATE_11MBPS;
3040 break;
3041 case IFM_AUTO:
3042 sc->an_tx_rate = 0;
3043 break;
3044 }
3045
3046 if (orate != sc->an_tx_rate) {
3047 /* Read the current configuration */
3048 sc->an_config.an_type = AN_RID_GENCONFIG;
3049 sc->an_config.an_len = sizeof(struct an_ltv_genconfig);
3050 an_read_record(sc, (struct an_ltv_gen *)&sc->an_config);
3051 cfg = &sc->an_config;
3052
3053 /* clear other rates and set the only one we want */
3054 bzero(cfg->an_rates, sizeof(cfg->an_rates));
3055 cfg->an_rates[0] = sc->an_tx_rate;
3056
3057 /* Save the new rate */
3058 sc->an_config.an_type = AN_RID_GENCONFIG;
3059 sc->an_config.an_len = sizeof(struct an_ltv_genconfig);
3060 }
3061
3062 if (otype != sc->an_config.an_opmode ||
3063 orate != sc->an_tx_rate)
3064 an_init(sc);
3065
3066 return(0);
3067}
3068
3069static void
3070an_media_status(ifp, imr)
3071 struct ifnet *ifp;
3072 struct ifmediareq *imr;
3073{
3074 struct an_ltv_status status;
3075 struct an_softc *sc = ifp->if_softc;
3076
3077 status.an_len = sizeof(status);
3078 status.an_type = AN_RID_STATUS;
3079 if (an_read_record(sc, (struct an_ltv_gen *)&status)) {
3080 /* If the status read fails, just lie. */
3081 imr->ifm_active = sc->an_ifmedia.ifm_cur->ifm_media;
3082 imr->ifm_status = IFM_AVALID|IFM_ACTIVE;
3083 }
3084
3085 if (sc->an_tx_rate == 0) {
3086 imr->ifm_active = IFM_IEEE80211|IFM_AUTO;
3087 if (sc->an_config.an_opmode == AN_OPMODE_IBSS_ADHOC)
3088 imr->ifm_active |= IFM_IEEE80211_ADHOC;
3089 switch (status.an_current_tx_rate) {
3090 case AN_RATE_1MBPS:
3091 imr->ifm_active |= IFM_IEEE80211_DS1;
3092 break;
3093 case AN_RATE_2MBPS:
3094 imr->ifm_active |= IFM_IEEE80211_DS2;
3095 break;
3096 case AN_RATE_5_5MBPS:
3097 imr->ifm_active |= IFM_IEEE80211_DS5;
3098 break;
3099 case AN_RATE_11MBPS:
3100 imr->ifm_active |= IFM_IEEE80211_DS11;
3101 break;
3102 }
3103 } else {
3104 imr->ifm_active = sc->an_ifmedia.ifm_cur->ifm_media;
3105 }
3106
3107 imr->ifm_status = IFM_AVALID;
3108 if (status.an_opmode & AN_STATUS_OPMODE_ASSOCIATED)
3109 imr->ifm_status |= IFM_ACTIVE;
3110}
3111
3112/********************** Cisco utility support routines *************/
3113
3114/*
3115 * ReadRids & WriteRids derived from Cisco driver additions to Ben Reed's
3116 * Linux driver
3117 */
3118
3119static int
3120readrids(ifp, l_ioctl)
3121 struct ifnet *ifp;
3122 struct aironet_ioctl *l_ioctl;
3123{
3124 unsigned short rid;
3125 struct an_softc *sc;
3126
3127 switch (l_ioctl->command) {
3128 case AIROGCAP:
3129 rid = AN_RID_CAPABILITIES;
3130 break;
3131 case AIROGCFG:
3132 rid = AN_RID_GENCONFIG;
3133 break;
3134 case AIROGSLIST:
3135 rid = AN_RID_SSIDLIST;
3136 break;
3137 case AIROGVLIST:
3138 rid = AN_RID_APLIST;
3139 break;
3140 case AIROGDRVNAM:
3141 rid = AN_RID_DRVNAME;
3142 break;
3143 case AIROGEHTENC:
3144 rid = AN_RID_ENCAPPROTO;
3145 break;
3146 case AIROGWEPKTMP:
3147 rid = AN_RID_WEP_TEMP;
3148 break;
3149 case AIROGWEPKNV:
3150 rid = AN_RID_WEP_PERM;
3151 break;
3152 case AIROGSTAT:
3153 rid = AN_RID_STATUS;
3154 break;
3155 case AIROGSTATSD32:
3156 rid = AN_RID_32BITS_DELTA;
3157 break;
3158 case AIROGSTATSC32:
3159 rid = AN_RID_32BITS_CUM;
3160 break;
3161 default:
3162 rid = 999;
3163 break;
3164 }
3165
3166 if (rid == 999) /* Is bad command */
3167 return -EINVAL;
3168
3169 sc = ifp->if_softc;
3170 sc->areq.an_len = AN_MAX_DATALEN;
3171 sc->areq.an_type = rid;
3172
3173 an_read_record(sc, (struct an_ltv_gen *)&sc->areq);
3174
3175 l_ioctl->len = sc->areq.an_len - 4; /* just data */
3176
3177 /* the data contains the length at first */
3178 if (copyout(&(sc->areq.an_len), l_ioctl->data,
3179 sizeof(sc->areq.an_len))) {
3180 return -EFAULT;
3181 }
3182 /* Just copy the data back */
3183 if (copyout(&(sc->areq.an_val), l_ioctl->data + 2,
3184 l_ioctl->len)) {
3185 return -EFAULT;
3186 }
3187 return 0;
3188}
3189
3190static int
3191writerids(ifp, l_ioctl)
3192 struct ifnet *ifp;
3193 struct aironet_ioctl *l_ioctl;
3194{
3195 struct an_softc *sc;
3196 int rid, command;
3197
3198 sc = ifp->if_softc;
3199 rid = 0;
3200 command = l_ioctl->command;
3201
3202 switch (command) {
3203 case AIROPSIDS:
3204 rid = AN_RID_SSIDLIST;
3205 break;
3206 case AIROPCAP:
3207 rid = AN_RID_CAPABILITIES;
3208 break;
3209 case AIROPAPLIST:
3210 rid = AN_RID_APLIST;
3211 break;
3212 case AIROPCFG:
3213 rid = AN_RID_GENCONFIG;
3214 break;
3215 case AIROPMACON:
3216 an_cmd(sc, AN_CMD_ENABLE, 0);
3217 return 0;
3218 break;
3219 case AIROPMACOFF:
3220 an_cmd(sc, AN_CMD_DISABLE, 0);
3221 return 0;
3222 break;
3223 case AIROPSTCLR:
3224 /*
3225 * This command merely clears the counts does not actually
3226 * store any data only reads rid. But as it changes the cards
3227 * state, I put it in the writerid routines.
3228 */
3229
3230 rid = AN_RID_32BITS_DELTACLR;
3231 sc = ifp->if_softc;
3232 sc->areq.an_len = AN_MAX_DATALEN;
3233 sc->areq.an_type = rid;
3234
3235 an_read_record(sc, (struct an_ltv_gen *)&sc->areq);
3236 l_ioctl->len = sc->areq.an_len - 4; /* just data */
3237
3238 /* the data contains the length at first */
3239 if (copyout(&(sc->areq.an_len), l_ioctl->data,
3240 sizeof(sc->areq.an_len))) {
3241 return -EFAULT;
3242 }
3243 /* Just copy the data */
3244 if (copyout(&(sc->areq.an_val), l_ioctl->data + 2,
3245 l_ioctl->len)) {
3246 return -EFAULT;
3247 }
3248 return 0;
3249 break;
3250 case AIROPWEPKEY:
3251 rid = AN_RID_WEP_TEMP;
3252 break;
3253 case AIROPWEPKEYNV:
3254 rid = AN_RID_WEP_PERM;
3255 break;
3256 case AIROPLEAPUSR:
3257 rid = AN_RID_LEAPUSERNAME;
3258 break;
3259 case AIROPLEAPPWD:
3260 rid = AN_RID_LEAPPASSWORD;
3261 break;
3262 default:
3263 return -EOPNOTSUPP;
3264 }
3265
3266 if (rid) {
3267 if (l_ioctl->len > sizeof(sc->areq.an_val) + 4)
3268 return -EINVAL;
3269 sc->areq.an_len = l_ioctl->len + 4; /* add type & length */
3270 sc->areq.an_type = rid;
3271
3272 /* Just copy the data back */
3273 copyin((l_ioctl->data) + 2, &sc->areq.an_val,
3274 l_ioctl->len);
3275
3276 an_cmd(sc, AN_CMD_DISABLE, 0);
3277 an_write_record(sc, (struct an_ltv_gen *)&sc->areq);
3278 an_cmd(sc, AN_CMD_ENABLE, 0);
3279 return 0;
3280 }
3281 return -EOPNOTSUPP;
3282}
3283
3284/*
3285 * General Flash utilities derived from Cisco driver additions to Ben Reed's
3286 * Linux driver
3287 */
3288
377d4740 3289#define FLASH_DELAY(x) tsleep(ifp, 0, "flash", ((x) / hz) + 1);
984263bc
MD
3290#define FLASH_COMMAND 0x7e7e
3291#define FLASH_SIZE 32 * 1024
3292
3293static int
3294unstickbusy(ifp)
3295 struct ifnet *ifp;
3296{
3297 struct an_softc *sc = ifp->if_softc;
3298
3299 if (CSR_READ_2(sc, AN_COMMAND(sc->mpi350)) & AN_CMD_BUSY) {
3300 CSR_WRITE_2(sc, AN_EVENT_ACK(sc->mpi350),
3301 AN_EV_CLR_STUCK_BUSY);
3302 return 1;
3303 }
3304 return 0;
3305}
3306
3307/*
3308 * Wait for busy completion from card wait for delay uSec's Return true for
3309 * success meaning command reg is clear
3310 */
3311
3312static int
3313WaitBusy(ifp, uSec)
3314 struct ifnet *ifp;
3315 int uSec;
3316{
3317 int statword = 0xffff;
3318 int delay = 0;
3319 struct an_softc *sc = ifp->if_softc;
3320
3321 while ((statword & AN_CMD_BUSY) && delay <= (1000 * 100)) {
3322 FLASH_DELAY(10);
3323 delay += 10;
3324 statword = CSR_READ_2(sc, AN_COMMAND(sc->mpi350));
3325
3326 if ((AN_CMD_BUSY & statword) && (delay % 200)) {
3327 unstickbusy(ifp);
3328 }
3329 }
3330
3331 return 0 == (AN_CMD_BUSY & statword);
3332}
3333
3334/*
3335 * STEP 1) Disable MAC and do soft reset on card.
3336 */
3337
3338static int
3339cmdreset(ifp)
3340 struct ifnet *ifp;
3341{
3342 int status;
3343 struct an_softc *sc = ifp->if_softc;
3344
3345 an_stop(sc);
3346
3347 an_cmd(sc, AN_CMD_DISABLE, 0);
3348
3349 if (!(status = WaitBusy(ifp, AN_TIMEOUT))) {
1c70eebf 3350 if_printf(ifp, "Waitbusy hang b4 RESET =%d\n", status);
984263bc
MD
3351 return -EBUSY;
3352 }
3353 CSR_WRITE_2(sc, AN_COMMAND(sc->mpi350), AN_CMD_FW_RESTART);
3354
3355 FLASH_DELAY(1000); /* WAS 600 12/7/00 */
3356
3357
3358 if (!(status = WaitBusy(ifp, 100))) {
1c70eebf 3359 if_printf(ifp, "Waitbusy hang AFTER RESET =%d\n", status);
984263bc
MD
3360 return -EBUSY;
3361 }
3362 return 0;
3363}
3364
3365/*
3366 * STEP 2) Put the card in legendary flash mode
3367 */
3368
3369static int
3370setflashmode(ifp)
3371 struct ifnet *ifp;
3372{
3373 int status;
3374 struct an_softc *sc = ifp->if_softc;
3375
3376 CSR_WRITE_2(sc, AN_SW0(sc->mpi350), FLASH_COMMAND);
3377 CSR_WRITE_2(sc, AN_SW1(sc->mpi350), FLASH_COMMAND);
3378 CSR_WRITE_2(sc, AN_SW0(sc->mpi350), FLASH_COMMAND);
3379 CSR_WRITE_2(sc, AN_COMMAND(sc->mpi350), FLASH_COMMAND);
3380
3381 /*
3382 * mdelay(500); // 500ms delay
3383 */
3384
3385 FLASH_DELAY(500);
3386
3387 if (!(status = WaitBusy(ifp, AN_TIMEOUT))) {
3388 printf("Waitbusy hang after setflash mode\n");
3389 return -EIO;
3390 }
3391 return 0;
3392}
3393
3394/*
3395 * Get a character from the card matching matchbyte Step 3)
3396 */
3397
3398static int
3399flashgchar(ifp, matchbyte, dwelltime)
3400 struct ifnet *ifp;
3401 int matchbyte;
3402 int dwelltime;
3403{
3404 int rchar;
3405 unsigned char rbyte = 0;
3406 int success = -1;
3407 struct an_softc *sc = ifp->if_softc;
3408
3409
3410 do {
3411 rchar = CSR_READ_2(sc, AN_SW1(sc->mpi350));
3412
3413 if (dwelltime && !(0x8000 & rchar)) {
3414 dwelltime -= 10;
3415 FLASH_DELAY(10);
3416 continue;
3417 }
3418 rbyte = 0xff & rchar;
3419
3420 if ((rbyte == matchbyte) && (0x8000 & rchar)) {
3421 CSR_WRITE_2(sc, AN_SW1(sc->mpi350), 0);
3422 success = 1;
3423 break;
3424 }
3425 if (rbyte == 0x81 || rbyte == 0x82 || rbyte == 0x83 || rbyte == 0x1a || 0xffff == rchar)
3426 break;
3427 CSR_WRITE_2(sc, AN_SW1(sc->mpi350), 0);
3428
3429 } while (dwelltime > 0);
3430 return success;
3431}
3432
3433/*
3434 * Put character to SWS0 wait for dwelltime x 50us for echo .
3435 */
3436
3437static int
3438flashpchar(ifp, byte, dwelltime)
3439 struct ifnet *ifp;
3440 int byte;
3441 int dwelltime;
3442{
3443 int echo;
3444 int pollbusy, waittime;
3445 struct an_softc *sc = ifp->if_softc;
3446
3447 byte |= 0x8000;
3448
3449 if (dwelltime == 0)
3450 dwelltime = 200;
3451
3452 waittime = dwelltime;
3453
3454 /*
3455 * Wait for busy bit d15 to go false indicating buffer empty
3456 */
3457 do {
3458 pollbusy = CSR_READ_2(sc, AN_SW0(sc->mpi350));
3459
3460 if (pollbusy & 0x8000) {
3461 FLASH_DELAY(50);
3462 waittime -= 50;
3463 continue;
3464 } else
3465 break;
3466 }
3467 while (waittime >= 0);
3468
3469 /* timeout for busy clear wait */
3470
3471 if (waittime <= 0) {
1c70eebf 3472 if_printf(ifp, "flash putchar busywait timeout!\n");
984263bc
MD
3473 return -1;
3474 }
3475 /*
3476 * Port is clear now write byte and wait for it to echo back
3477 */
3478 do {
3479 CSR_WRITE_2(sc, AN_SW0(sc->mpi350), byte);
3480 FLASH_DELAY(50);
3481 dwelltime -= 50;
3482 echo = CSR_READ_2(sc, AN_SW1(sc->mpi350));
3483 } while (dwelltime >= 0 && echo != byte);
3484
3485
3486 CSR_WRITE_2(sc, AN_SW1(sc->mpi350), 0);
3487
3488 return echo == byte;
3489}
3490
3491/*
3492 * Transfer 32k of firmware data from user buffer to our buffer and send to
3493 * the card
3494 */
3495
3496static int
3497flashputbuf(ifp)
3498 struct ifnet *ifp;
3499{
3500 unsigned short *bufp;
3501 int nwords;
3502 struct an_softc *sc = ifp->if_softc;
3503
3504 /* Write stuff */
3505
3506 bufp = sc->an_flash_buffer;
3507
3508 if (!sc->mpi350) {
3509 CSR_WRITE_2(sc, AN_AUX_PAGE, 0x100);
3510 CSR_WRITE_2(sc, AN_AUX_OFFSET, 0);
3511
3512 for (nwords = 0; nwords != FLASH_SIZE / 2; nwords++) {
3513 CSR_WRITE_2(sc, AN_AUX_DATA, bufp[nwords] & 0xffff);
3514 }
3515 } else {
3516 for (nwords = 0; nwords != FLASH_SIZE / 4; nwords++) {
3517 CSR_MEM_AUX_WRITE_4(sc, 0x8000,
3518 ((u_int32_t *)bufp)[nwords] & 0xffff);
3519 }
3520 }
3521
3522 CSR_WRITE_2(sc, AN_SW0(sc->mpi350), 0x8000);
3523
3524 return 0;
3525}
3526
3527/*
3528 * After flashing restart the card.
3529 */
3530
3531static int
3532flashrestart(ifp)
3533 struct ifnet *ifp;
3534{
3535 int status = 0;
3536 struct an_softc *sc = ifp->if_softc;
3537
3538 FLASH_DELAY(1024); /* Added 12/7/00 */
3539
3540 an_init(sc);
3541
3542 FLASH_DELAY(1024); /* Added 12/7/00 */
3543 return status;
3544}
3545
3546/*
3547 * Entry point for flash ioclt.
3548 */
3549
3550static int
3551flashcard(ifp, l_ioctl)
3552 struct ifnet *ifp;
3553 struct aironet_ioctl *l_ioctl;
3554{
3555 int z = 0, status;
3556 struct an_softc *sc;
3557
3558 sc = ifp->if_softc;
3559 if (sc->mpi350) {
1c70eebf 3560 if_printf(ifp, "flashing not supported on MPI 350 yet\n");
984263bc
MD
3561 return(-1);
3562 }
3563 status = l_ioctl->command;
3564
3565 switch (l_ioctl->command) {
3566 case AIROFLSHRST:
3567 return cmdreset(ifp);
3568 break;
3569 case AIROFLSHSTFL:
3570 if (sc->an_flash_buffer) {
3571 free(sc->an_flash_buffer, M_DEVBUF);
3572 sc->an_flash_buffer = NULL;
3573 }
3574 sc->an_flash_buffer = malloc(FLASH_SIZE, M_DEVBUF, 0);
3575 if (sc->an_flash_buffer)
3576 return setflashmode(ifp);
3577 else
3578 return ENOBUFS;
3579 break;
3580 case AIROFLSHGCHR: /* Get char from aux */
3581 copyin(l_ioctl->data, &sc->areq, l_ioctl->len);
3582 z = *(int *)&sc->areq;
3583 if ((status = flashgchar(ifp, z, 8000)) == 1)
3584 return 0;
3585 else
3586 return -1;
3587 break;
3588 case AIROFLSHPCHR: /* Send char to card. */
3589 copyin(l_ioctl->data, &sc->areq, l_ioctl->len);
3590 z = *(int *)&sc->areq;
3591 if ((status = flashpchar(ifp, z, 8000)) == -1)
3592 return -EIO;
3593 else
3594 return 0;
3595 break;
3596 case AIROFLPUTBUF: /* Send 32k to card */
3597 if (l_ioctl->len > FLASH_SIZE) {
1c70eebf
JS
3598 if_printf(ifp, "Buffer to big, %x %x\n",
3599 l_ioctl->len, FLASH_SIZE);
984263bc
MD
3600 return -EINVAL;
3601 }
3602 copyin(l_ioctl->data, sc->an_flash_buffer, l_ioctl->len);
3603
3604 if ((status = flashputbuf(ifp)) != 0)
3605 return -EIO;
3606 else
3607 return 0;
3608 break;
3609 case AIRORESTART:
3610 if ((status = flashrestart(ifp)) != 0) {
1c70eebf 3611 if_printf(ifp, "FLASHRESTART returned %d\n", status);
984263bc
MD
3612 return -EIO;
3613 } else
3614 return 0;
3615
3616 break;
3617 default:
3618 return -EINVAL;
3619 }
3620
3621 return -EINVAL;
3622}