fast intr: Don't dispatch to the BGL owner, if BGL could not be holden;
[dragonfly.git] / sys / kern / kern_intr.c
CommitLineData
984263bc 1/*
033a4603 2 * Copyright (c) 2003 Matthew Dillon <dillon@backplane.com> All rights reserved.
ef0fdad1 3 * Copyright (c) 1997, Stefan Esser <se@freebsd.org> All rights reserved.
984263bc
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4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions
7 * are met:
8 * 1. Redistributions of source code must retain the above copyright
9 * notice unmodified, this list of conditions, and the following
10 * disclaimer.
11 * 2. Redistributions in binary form must reproduce the above copyright
12 * notice, this list of conditions and the following disclaimer in the
13 * documentation and/or other materials provided with the distribution.
14 *
15 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
16 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
17 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
18 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
19 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
20 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
21 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
22 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
23 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
24 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
25 *
26 * $FreeBSD: src/sys/kern/kern_intr.c,v 1.24.2.1 2001/10/14 20:05:50 luigi Exp $
c2bfaa3d 27 * $DragonFly: src/sys/kern/kern_intr.c,v 1.55 2008/09/01 12:49:00 sephe Exp $
984263bc
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28 *
29 */
30
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31#include <sys/param.h>
32#include <sys/systm.h>
33#include <sys/malloc.h>
34#include <sys/kernel.h>
35#include <sys/sysctl.h>
ef0fdad1
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36#include <sys/thread.h>
37#include <sys/proc.h>
38#include <sys/thread2.h>
7e071e7a 39#include <sys/random.h>
477d3c1c 40#include <sys/serialize.h>
a7231bde 41#include <sys/interrupt.h>
477d3c1c 42#include <sys/bus.h>
37e7efec 43#include <sys/machintr.h>
984263bc 44
477d3c1c 45#include <machine/frame.h>
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46
47#include <sys/interrupt.h>
48
9d522d14
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49struct info_info;
50
ef0fdad1
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51typedef struct intrec {
52 struct intrec *next;
9d522d14 53 struct intr_info *info;
ef0fdad1
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54 inthand2_t *handler;
55 void *argument;
477d3c1c 56 char *name;
ef0fdad1 57 int intr;
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58 int intr_flags;
59 struct lwkt_serialize *serializer;
60} *intrec_t;
61
62struct intr_info {
63 intrec_t i_reclist;
64 struct thread i_thread;
65 struct random_softc i_random;
66 int i_running;
862f2618
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67 long i_count; /* interrupts dispatched */
68 int i_mplock_required;
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69 int i_fast;
70 int i_slow;
f33e9c1c 71 int i_state;
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72 int i_errorticks;
73 unsigned long i_straycount;
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74} intr_info_ary[MAX_INTS];
75
76int max_installed_hard_intr;
77int max_installed_soft_intr;
477d3c1c 78
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79#define EMERGENCY_INTR_POLLING_FREQ_MAX 20000
80
81static int sysctl_emergency_freq(SYSCTL_HANDLER_ARGS);
82static int sysctl_emergency_enable(SYSCTL_HANDLER_ARGS);
83static void emergency_intr_timer_callback(systimer_t, struct intrframe *);
84static void ithread_handler(void *arg);
85static void ithread_emergency(void *arg);
b560de96 86static void report_stray_interrupt(int intr, struct intr_info *info);
4c846371
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87static void int_moveto_destcpu(int *, int *, int);
88static void int_moveto_origcpu(int, int);
a9d00ec1 89
477d3c1c 90int intr_info_size = sizeof(intr_info_ary) / sizeof(intr_info_ary[0]);
37d44089 91
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92static struct systimer emergency_intr_timer;
93static struct thread emergency_intr_thread;
94
f33e9c1c
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95#define ISTATE_NOTHREAD 0
96#define ISTATE_NORMAL 1
97#define ISTATE_LIVELOCKED 2
37d44089 98
0e6beaa3 99#ifdef SMP
c2bfaa3d 100static int intr_mpsafe = 1;
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101TUNABLE_INT("kern.intr_mpsafe", &intr_mpsafe);
102SYSCTL_INT(_kern, OID_AUTO, intr_mpsafe,
103 CTLFLAG_RW, &intr_mpsafe, 0, "Run INTR_MPSAFE handlers without the BGL");
0e6beaa3 104#endif
b560de96 105static int livelock_limit = 40000;
0e6beaa3 106static int livelock_lowater = 20000;
b560de96 107static int livelock_debug = -1;
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108SYSCTL_INT(_kern, OID_AUTO, livelock_limit,
109 CTLFLAG_RW, &livelock_limit, 0, "Livelock interrupt rate limit");
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110SYSCTL_INT(_kern, OID_AUTO, livelock_lowater,
111 CTLFLAG_RW, &livelock_lowater, 0, "Livelock low-water mark restore");
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112SYSCTL_INT(_kern, OID_AUTO, livelock_debug,
113 CTLFLAG_RW, &livelock_debug, 0, "Livelock debug intr#");
984263bc 114
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115static int emergency_intr_enable = 0; /* emergency interrupt polling */
116TUNABLE_INT("kern.emergency_intr_enable", &emergency_intr_enable);
117SYSCTL_PROC(_kern, OID_AUTO, emergency_intr_enable, CTLTYPE_INT | CTLFLAG_RW,
118 0, 0, sysctl_emergency_enable, "I", "Emergency Interrupt Poll Enable");
119
120static int emergency_intr_freq = 10; /* emergency polling frequency */
121TUNABLE_INT("kern.emergency_intr_freq", &emergency_intr_freq);
122SYSCTL_PROC(_kern, OID_AUTO, emergency_intr_freq, CTLTYPE_INT | CTLFLAG_RW,
123 0, 0, sysctl_emergency_freq, "I", "Emergency Interrupt Poll Frequency");
124
125/*
126 * Sysctl support routines
127 */
128static int
129sysctl_emergency_enable(SYSCTL_HANDLER_ARGS)
130{
131 int error, enabled;
132
133 enabled = emergency_intr_enable;
134 error = sysctl_handle_int(oidp, &enabled, 0, req);
135 if (error || req->newptr == NULL)
136 return error;
137 emergency_intr_enable = enabled;
138 if (emergency_intr_enable) {
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139 systimer_adjust_periodic(&emergency_intr_timer,
140 emergency_intr_freq);
a9d00ec1 141 } else {
ba39e2e0 142 systimer_adjust_periodic(&emergency_intr_timer, 1);
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143 }
144 return 0;
145}
146
147static int
148sysctl_emergency_freq(SYSCTL_HANDLER_ARGS)
149{
150 int error, phz;
151
152 phz = emergency_intr_freq;
153 error = sysctl_handle_int(oidp, &phz, 0, req);
154 if (error || req->newptr == NULL)
155 return error;
156 if (phz <= 0)
157 return EINVAL;
158 else if (phz > EMERGENCY_INTR_POLLING_FREQ_MAX)
159 phz = EMERGENCY_INTR_POLLING_FREQ_MAX;
160
161 emergency_intr_freq = phz;
162 if (emergency_intr_enable) {
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163 systimer_adjust_periodic(&emergency_intr_timer,
164 emergency_intr_freq);
a9d00ec1 165 } else {
ba39e2e0 166 systimer_adjust_periodic(&emergency_intr_timer, 1);
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167 }
168 return 0;
169}
984263bc 170
45d76888
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171/*
172 * Register an SWI or INTerrupt handler.
45d76888 173 */
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174void *
175register_swi(int intr, inthand2_t *handler, void *arg, const char *name,
176 struct lwkt_serialize *serializer)
984263bc 177{
5f456c40 178 if (intr < FIRST_SOFTINT || intr >= MAX_INTS)
ef0fdad1 179 panic("register_swi: bad intr %d", intr);
477d3c1c 180 return(register_int(intr, handler, arg, name, serializer, 0));
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181}
182
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183void *
184register_int(int intr, inthand2_t *handler, void *arg, const char *name,
185 struct lwkt_serialize *serializer, int intr_flags)
984263bc 186{
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187 struct intr_info *info;
188 struct intrec **list;
189 intrec_t rec;
4c846371 190 int orig_cpuid, cpuid;
ef0fdad1 191
5f456c40 192 if (intr < 0 || intr >= MAX_INTS)
ef0fdad1 193 panic("register_int: bad intr %d", intr);
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194 if (name == NULL)
195 name = "???";
196 info = &intr_info_ary[intr];
197
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198 /*
199 * Construct an interrupt handler record
200 */
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201 rec = kmalloc(sizeof(struct intrec), M_DEVBUF, M_INTWAIT);
202 rec->name = kmalloc(strlen(name) + 1, M_DEVBUF, M_INTWAIT);
477d3c1c 203 strcpy(rec->name, name);
ef0fdad1 204
9d522d14 205 rec->info = info;
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206 rec->handler = handler;
207 rec->argument = arg;
ef0fdad1 208 rec->intr = intr;
477d3c1c 209 rec->intr_flags = intr_flags;
ef0fdad1 210 rec->next = NULL;
477d3c1c 211 rec->serializer = serializer;
ef0fdad1 212
a9d00ec1
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213 /*
214 * Create an emergency polling thread and set up a systimer to wake
215 * it up.
216 */
217 if (emergency_intr_thread.td_kstack == NULL) {
218 lwkt_create(ithread_emergency, NULL, NULL,
219 &emergency_intr_thread, TDF_STOPREQ|TDF_INTTHREAD, -1,
220 "ithread emerg");
221 systimer_init_periodic_nq(&emergency_intr_timer,
222 emergency_intr_timer_callback, &emergency_intr_thread,
223 (emergency_intr_enable ? emergency_intr_freq : 1));
224 }
225
4c846371 226 int_moveto_destcpu(&orig_cpuid, &cpuid, intr);
db958607 227
ef0fdad1
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228 /*
229 * Create an interrupt thread if necessary, leave it in an unscheduled
45d76888 230 * state.
ef0fdad1 231 */
f33e9c1c
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232 if (info->i_state == ISTATE_NOTHREAD) {
233 info->i_state = ISTATE_NORMAL;
973c11b9 234 lwkt_create((void *)ithread_handler, (void *)(intptr_t)intr, NULL,
862f2618 235 &info->i_thread, TDF_STOPREQ|TDF_INTTHREAD|TDF_MPSAFE, -1,
75cdbe6c 236 "ithread %d", intr);
5f456c40 237 if (intr >= FIRST_SOFTINT)
477d3c1c 238 lwkt_setpri(&info->i_thread, TDPRI_SOFT_NORM);
4b5f931b 239 else
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240 lwkt_setpri(&info->i_thread, TDPRI_INT_MED);
241 info->i_thread.td_preemptable = lwkt_preempt;
ef0fdad1
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242 }
243
9d522d14
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244 list = &info->i_reclist;
245
ef0fdad1 246 /*
9d522d14 247 * Keep track of how many fast and slow interrupts we have.
862f2618
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248 * Set i_mplock_required if any handler in the chain requires
249 * the MP lock to operate.
ef0fdad1 250 */
862f2618
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251 if ((intr_flags & INTR_MPSAFE) == 0)
252 info->i_mplock_required = 1;
9d522d14
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253 if (intr_flags & INTR_FAST)
254 ++info->i_fast;
255 else
256 ++info->i_slow;
257
8b3ec75a
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258 /*
259 * Enable random number generation keying off of this interrupt.
260 */
261 if ((intr_flags & INTR_NOENTROPY) == 0 && info->i_random.sc_enabled == 0) {
262 info->i_random.sc_enabled = 1;
263 info->i_random.sc_intr = intr;
264 }
265
9d522d14
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266 /*
267 * Add the record to the interrupt list.
268 */
269 crit_enter();
ef0fdad1
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270 while (*list != NULL)
271 list = &(*list)->next;
272 *list = rec;
273 crit_exit();
5f456c40
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274
275 /*
276 * Update max_installed_hard_intr to make the emergency intr poll
277 * a bit more efficient.
278 */
279 if (intr < FIRST_SOFTINT) {
280 if (max_installed_hard_intr <= intr)
281 max_installed_hard_intr = intr + 1;
282 } else {
283 if (max_installed_soft_intr <= intr)
284 max_installed_soft_intr = intr + 1;
285 }
9d522d14
MD
286
287 /*
288 * Setup the machine level interrupt vector
cd2cd928
MD
289 *
290 * XXX temporary workaround for some ACPI brokedness. ACPI installs
291 * its interrupt too early, before the IOAPICs have been configured,
292 * which means the IOAPIC is not enabled by the registration of the
293 * ACPI interrupt. Anything else sharing that IRQ will wind up not
294 * being enabled. Temporarily work around the problem by always
295 * installing and enabling on every new interrupt handler, even
296 * if one has already been setup on that irq.
9d522d14 297 */
cd2cd928 298 if (intr < FIRST_SOFTINT /* && info->i_slow + info->i_fast == 1*/) {
9d522d14 299 if (machintr_vector_setup(intr, intr_flags))
6ea70f76 300 kprintf("machintr_vector_setup: failed on irq %d\n", intr);
9d522d14
MD
301 }
302
4c846371 303 int_moveto_origcpu(orig_cpuid, cpuid);
db958607 304
477d3c1c 305 return(rec);
ef0fdad1 306}
984263bc 307
9d522d14 308void
477d3c1c 309unregister_swi(void *id)
ef0fdad1 310{
9d522d14 311 unregister_int(id);
984263bc
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312}
313
9d522d14 314void
477d3c1c 315unregister_int(void *id)
984263bc 316{
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MD
317 struct intr_info *info;
318 struct intrec **list;
319 intrec_t rec;
4c846371 320 int intr, orig_cpuid, cpuid;
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MD
321
322 intr = ((intrec_t)id)->intr;
ef0fdad1 323
5f456c40 324 if (intr < 0 || intr >= MAX_INTS)
ef0fdad1 325 panic("register_int: bad intr %d", intr);
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326
327 info = &intr_info_ary[intr];
328
4c846371
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329 int_moveto_destcpu(&orig_cpuid, &cpuid, intr);
330
477d3c1c 331 /*
9d522d14
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332 * Remove the interrupt descriptor, adjust the descriptor count,
333 * and teardown the machine level vector if this was the last interrupt.
477d3c1c 334 */
ef0fdad1 335 crit_enter();
477d3c1c 336 list = &info->i_reclist;
ef0fdad1 337 while ((rec = *list) != NULL) {
9d522d14 338 if (rec == id)
ef0fdad1 339 break;
ef0fdad1
MD
340 list = &rec->next;
341 }
9d522d14 342 if (rec) {
acf7409e
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343 intrec_t rec0;
344
9d522d14
MD
345 *list = rec->next;
346 if (rec->intr_flags & INTR_FAST)
347 --info->i_fast;
348 else
349 --info->i_slow;
e8727dce 350 if (intr < FIRST_SOFTINT && info->i_fast + info->i_slow == 0)
9d522d14 351 machintr_vector_teardown(intr);
862f2618 352
acf7409e
SZ
353 /*
354 * Clear i_mplock_required if no handlers in the chain require the
355 * MP lock.
356 */
357 for (rec0 = info->i_reclist; rec0; rec0 = rec0->next) {
358 if ((rec0->intr_flags & INTR_MPSAFE) == 0)
359 break;
360 }
361 if (rec0 == NULL)
862f2618 362 info->i_mplock_required = 0;
acf7409e 363 }
862f2618 364
ef0fdad1 365 crit_exit();
477d3c1c 366
4c846371
SZ
367 int_moveto_origcpu(orig_cpuid, cpuid);
368
477d3c1c 369 /*
9d522d14 370 * Free the record.
477d3c1c 371 */
ef0fdad1 372 if (rec != NULL) {
efda3bd0
MD
373 kfree(rec->name, M_DEVBUF);
374 kfree(rec, M_DEVBUF);
ef0fdad1 375 } else {
6ea70f76 376 kprintf("warning: unregister_int: int %d handler for %s not found\n",
477d3c1c 377 intr, ((intrec_t)id)->name);
ef0fdad1 378 }
477d3c1c
MD
379}
380
381const char *
382get_registered_name(int intr)
383{
384 intrec_t rec;
385
5f456c40 386 if (intr < 0 || intr >= MAX_INTS)
477d3c1c
MD
387 panic("register_int: bad intr %d", intr);
388
389 if ((rec = intr_info_ary[intr].i_reclist) == NULL)
390 return(NULL);
391 else if (rec->next)
392 return("mux");
393 else
394 return(rec->name);
984263bc
MD
395}
396
477d3c1c
MD
397int
398count_registered_ints(int intr)
399{
400 struct intr_info *info;
401
5f456c40 402 if (intr < 0 || intr >= MAX_INTS)
477d3c1c
MD
403 panic("register_int: bad intr %d", intr);
404 info = &intr_info_ary[intr];
405 return(info->i_fast + info->i_slow);
406}
407
408long
409get_interrupt_counter(int intr)
410{
411 struct intr_info *info;
412
5f456c40 413 if (intr < 0 || intr >= MAX_INTS)
477d3c1c
MD
414 panic("register_int: bad intr %d", intr);
415 info = &intr_info_ary[intr];
416 return(info->i_count);
417}
418
419
4b5f931b
MD
420void
421swi_setpriority(int intr, int pri)
422{
477d3c1c 423 struct intr_info *info;
4b5f931b 424
5f456c40 425 if (intr < FIRST_SOFTINT || intr >= MAX_INTS)
4b5f931b 426 panic("register_swi: bad intr %d", intr);
477d3c1c 427 info = &intr_info_ary[intr];
f33e9c1c 428 if (info->i_state != ISTATE_NOTHREAD)
477d3c1c 429 lwkt_setpri(&info->i_thread, pri);
4b5f931b
MD
430}
431
7e071e7a
MD
432void
433register_randintr(int intr)
434{
477d3c1c
MD
435 struct intr_info *info;
436
5f456c40 437 if (intr < 0 || intr >= MAX_INTS)
417c990a 438 panic("register_randintr: bad intr %d", intr);
477d3c1c
MD
439 info = &intr_info_ary[intr];
440 info->i_random.sc_intr = intr;
441 info->i_random.sc_enabled = 1;
7e071e7a
MD
442}
443
444void
445unregister_randintr(int intr)
446{
477d3c1c
MD
447 struct intr_info *info;
448
5f456c40 449 if (intr < 0 || intr >= MAX_INTS)
477d3c1c
MD
450 panic("register_swi: bad intr %d", intr);
451 info = &intr_info_ary[intr];
8b3ec75a 452 info->i_random.sc_enabled = -1;
7e071e7a
MD
453}
454
5f456c40
MD
455int
456next_registered_randintr(int intr)
457{
458 struct intr_info *info;
459
460 if (intr < 0 || intr >= MAX_INTS)
461 panic("register_swi: bad intr %d", intr);
462 while (intr < MAX_INTS) {
463 info = &intr_info_ary[intr];
8b3ec75a 464 if (info->i_random.sc_enabled > 0)
5f456c40
MD
465 break;
466 ++intr;
467 }
468 return(intr);
469}
470
ef0fdad1 471/*
b68b7282
MD
472 * Dispatch an interrupt. If there's nothing to do we have a stray
473 * interrupt and can just return, leaving the interrupt masked.
96728c05 474 *
477d3c1c 475 * We need to schedule the interrupt and set its i_running bit. If
96728c05
MD
476 * we are not on the interrupt thread's cpu we have to send a message
477 * to the correct cpu that will issue the desired action (interlocking
f33e9c1c
MD
478 * with the interrupt thread's critical section). We do NOT attempt to
479 * reschedule interrupts whos i_running bit is already set because
480 * this would prematurely wakeup a livelock-limited interrupt thread.
481 *
482 * i_running is only tested/set on the same cpu as the interrupt thread.
96728c05
MD
483 *
484 * We are NOT in a critical section, which will allow the scheduled
71ef2f5c 485 * interrupt to preempt us. The MP lock might *NOT* be held here.
ef0fdad1 486 */
b8a98473
MD
487#ifdef SMP
488
96728c05
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489static void
490sched_ithd_remote(void *arg)
491{
492 sched_ithd((int)arg);
493}
494
b8a98473
MD
495#endif
496
ef0fdad1
MD
497void
498sched_ithd(int intr)
499{
477d3c1c 500 struct intr_info *info;
ef0fdad1 501
477d3c1c
MD
502 info = &intr_info_ary[intr];
503
504 ++info->i_count;
f33e9c1c 505 if (info->i_state != ISTATE_NOTHREAD) {
477d3c1c 506 if (info->i_reclist == NULL) {
b560de96 507 report_stray_interrupt(intr, info);
b68b7282 508 } else {
b8a98473 509#ifdef SMP
477d3c1c 510 if (info->i_thread.td_gd == mycpu) {
f33e9c1c
MD
511 if (info->i_running == 0) {
512 info->i_running = 1;
513 if (info->i_state != ISTATE_LIVELOCKED)
514 lwkt_schedule(&info->i_thread); /* MIGHT PREEMPT */
515 }
96728c05 516 } else {
477d3c1c
MD
517 lwkt_send_ipiq(info->i_thread.td_gd,
518 sched_ithd_remote, (void *)intr);
96728c05 519 }
b8a98473 520#else
f33e9c1c
MD
521 if (info->i_running == 0) {
522 info->i_running = 1;
523 if (info->i_state != ISTATE_LIVELOCKED)
524 lwkt_schedule(&info->i_thread); /* MIGHT PREEMPT */
525 }
b8a98473 526#endif
b68b7282 527 }
ef0fdad1 528 } else {
b560de96 529 report_stray_interrupt(intr, info);
ef0fdad1
MD
530 }
531}
532
b560de96
MD
533static void
534report_stray_interrupt(int intr, struct intr_info *info)
535{
536 ++info->i_straycount;
537 if (info->i_straycount < 10) {
538 if (info->i_errorticks == ticks)
539 return;
540 info->i_errorticks = ticks;
541 kprintf("sched_ithd: stray interrupt %d on cpu %d\n",
542 intr, mycpuid);
7e88c0e6 543 } else if (info->i_straycount == 10) {
b560de96
MD
544 kprintf("sched_ithd: %ld stray interrupts %d on cpu %d - "
545 "there will be no further reports\n",
546 info->i_straycount, intr, mycpuid);
547 }
548}
549
37d44089
MD
550/*
551 * This is run from a periodic SYSTIMER (and thus must be MP safe, the BGL
552 * might not be held).
553 */
554static void
477d3c1c 555ithread_livelock_wakeup(systimer_t st)
37d44089 556{
477d3c1c 557 struct intr_info *info;
37d44089 558
973c11b9 559 info = &intr_info_ary[(int)(intptr_t)st->data];
f33e9c1c 560 if (info->i_state != ISTATE_NOTHREAD)
477d3c1c 561 lwkt_schedule(&info->i_thread);
37d44089
MD
562}
563
67b9bb39 564/*
7bd34050 565 * This function is called directly from the ICU or APIC vector code assembly
477d3c1c
MD
566 * to process an interrupt. The critical section and interrupt deferral
567 * checks have already been done but the function is entered WITHOUT
568 * a critical section held. The BGL may or may not be held.
569 *
570 * Must return non-zero if we do not want the vector code to re-enable
571 * the interrupt (which we don't if we have to schedule the interrupt)
67b9bb39 572 */
c7eb0589 573int ithread_fast_handler(struct intrframe *frame);
477d3c1c
MD
574
575int
c7eb0589 576ithread_fast_handler(struct intrframe *frame)
477d3c1c
MD
577{
578 int intr;
579 struct intr_info *info;
580 struct intrec **list;
581 int must_schedule;
582#ifdef SMP
583 int got_mplock;
584#endif
585 intrec_t rec, next_rec;
586 globaldata_t gd;
587
c7eb0589 588 intr = frame->if_vec;
477d3c1c
MD
589 gd = mycpu;
590
591 info = &intr_info_ary[intr];
592
593 /*
594 * If we are not processing any FAST interrupts, just schedule the thing.
595 * (since we aren't in a critical section, this can result in a
596 * preemption)
3848f1c7
TS
597 *
598 * XXX Protect sched_ithd() call with gd_intr_nesting_level? Interrupts
599 * aren't enabled, but still...
477d3c1c
MD
600 */
601 if (info->i_fast == 0) {
3848f1c7 602 ++gd->gd_cnt.v_intr;
477d3c1c
MD
603 sched_ithd(intr);
604 return(1);
605 }
606
607 /*
608 * This should not normally occur since interrupts ought to be
609 * masked if the ithread has been scheduled or is running.
610 */
611 if (info->i_running)
612 return(1);
613
614 /*
615 * Bump the interrupt nesting level to process any FAST interrupts.
616 * Obtain the MP lock as necessary. If the MP lock cannot be obtained,
617 * schedule the interrupt thread to deal with the issue instead.
618 *
619 * To reduce overhead, just leave the MP lock held once it has been
620 * obtained.
621 */
622 crit_enter_gd(gd);
623 ++gd->gd_intr_nesting_level;
624 ++gd->gd_cnt.v_intr;
625 must_schedule = info->i_slow;
626#ifdef SMP
627 got_mplock = 0;
628#endif
629
630 list = &info->i_reclist;
631 for (rec = *list; rec; rec = next_rec) {
632 next_rec = rec->next; /* rec may be invalid after call */
633
634 if (rec->intr_flags & INTR_FAST) {
635#ifdef SMP
636 if ((rec->intr_flags & INTR_MPSAFE) == 0 && got_mplock == 0) {
637 if (try_mplock() == 0) {
f5c2d910
SZ
638 /* Couldn't get the MP lock; just schedule it. */
639 must_schedule = 1;
477d3c1c
MD
640 break;
641 }
642 got_mplock = 1;
643 }
644#endif
645 if (rec->serializer) {
646 must_schedule += lwkt_serialize_handler_try(
647 rec->serializer, rec->handler,
c7eb0589 648 rec->argument, frame);
477d3c1c 649 } else {
c7eb0589 650 rec->handler(rec->argument, frame);
477d3c1c
MD
651 }
652 }
653 }
654
655 /*
656 * Cleanup
657 */
658 --gd->gd_intr_nesting_level;
659#ifdef SMP
660 if (got_mplock)
661 rel_mplock();
662#endif
663 crit_exit_gd(gd);
664
665 /*
666 * If we had a problem, schedule the thread to catch the missed
667 * records (it will just re-run all of them). A return value of 0
668 * indicates that all handlers have been run and the interrupt can
669 * be re-enabled, and a non-zero return indicates that the interrupt
670 * thread controls re-enablement.
671 */
afd7b1c0 672 if (must_schedule > 0)
477d3c1c 673 sched_ithd(intr);
afd7b1c0 674 else if (must_schedule == 0)
477d3c1c
MD
675 ++info->i_count;
676 return(must_schedule);
677}
678
679#if 0
680
6816: ; \
682 /* could not get the MP lock, forward the interrupt */ \
683 movl mp_lock, %eax ; /* check race */ \
684 cmpl $MP_FREE_LOCK,%eax ; \
685 je 2b ; \
686 incl PCPU(cnt)+V_FORWARDED_INTS ; \
687 subl $12,%esp ; \
688 movl $irq_num,8(%esp) ; \
689 movl $forward_fastint_remote,4(%esp) ; \
690 movl %eax,(%esp) ; \
691 call lwkt_send_ipiq_bycpu ; \
692 addl $12,%esp ; \
693 jmp 5f ;
694
695#endif
67b9bb39 696
37d44089 697
b68b7282 698/*
45d76888
MD
699 * Interrupt threads run this as their main loop.
700 *
701 * The handler begins execution outside a critical section and with the BGL
702 * held.
37d44089 703 *
477d3c1c 704 * The i_running state starts at 0. When an interrupt occurs, the hardware
37d44089
MD
705 * interrupt is disabled and sched_ithd() The HW interrupt remains disabled
706 * until all routines have run. We then call ithread_done() to reenable
45d76888
MD
707 * the HW interrupt and deschedule us until the next interrupt.
708 *
477d3c1c 709 * We are responsible for atomically checking i_running and ithread_done()
45d76888 710 * is responsible for atomically checking for platform-specific delayed
477d3c1c 711 * interrupts. i_running for our irq is only set in the context of our cpu,
45d76888 712 * so a critical section is a sufficient interlock.
b68b7282 713 */
93781523
MD
714#define LIVELOCK_TIMEFRAME(freq) ((freq) >> 2) /* 1/4 second */
715
ef0fdad1
MD
716static void
717ithread_handler(void *arg)
718{
477d3c1c 719 struct intr_info *info;
f33e9c1c 720 int use_limit;
b560de96 721 __uint32_t lseconds;
477d3c1c 722 int intr;
9d522d14 723 int mpheld;
477d3c1c
MD
724 struct intrec **list;
725 intrec_t rec, nrec;
f33e9c1c 726 globaldata_t gd;
67b9bb39 727 struct systimer ill_timer; /* enforced freq. timer */
f33e9c1c 728 u_int ill_count; /* interrupt livelock counter */
45d76888 729
f33e9c1c 730 ill_count = 0;
973c11b9 731 intr = (int)(intptr_t)arg;
477d3c1c
MD
732 info = &intr_info_ary[intr];
733 list = &info->i_reclist;
734 gd = mycpu;
b560de96 735 lseconds = gd->gd_time_seconds;
477d3c1c 736
45d76888 737 /*
862f2618
MD
738 * The loop must be entered with one critical section held. The thread
739 * is created with TDF_MPSAFE so the MP lock is not held on start.
45d76888
MD
740 */
741 crit_enter_gd(gd);
862f2618 742 mpheld = 0;
ef0fdad1 743
ef0fdad1 744 for (;;) {
862f2618
MD
745 /*
746 * The chain is only considered MPSAFE if all its interrupt handlers
747 * are MPSAFE. However, if intr_mpsafe has been turned off we
748 * always operate with the BGL.
749 */
0e6beaa3 750#ifdef SMP
862f2618
MD
751 if (intr_mpsafe == 0) {
752 if (mpheld == 0) {
753 get_mplock();
754 mpheld = 1;
755 }
756 } else if (info->i_mplock_required != mpheld) {
757 if (info->i_mplock_required) {
758 KKASSERT(mpheld == 0);
759 get_mplock();
760 mpheld = 1;
761 } else {
762 KKASSERT(mpheld != 0);
763 rel_mplock();
764 mpheld = 0;
765 }
766 }
0e6beaa3 767#endif
862f2618 768
93781523 769 /*
f33e9c1c
MD
770 * If an interrupt is pending, clear i_running and execute the
771 * handlers. Note that certain types of interrupts can re-trigger
772 * and set i_running again.
45d76888 773 *
f33e9c1c 774 * Each handler is run in a critical section. Note that we run both
862f2618 775 * FAST and SLOW designated service routines.
93781523 776 */
f33e9c1c
MD
777 if (info->i_running) {
778 ++ill_count;
779 info->i_running = 0;
9d522d14 780
b560de96
MD
781 if (*list == NULL)
782 report_stray_interrupt(intr, info);
783
f33e9c1c
MD
784 for (rec = *list; rec; rec = nrec) {
785 nrec = rec->next;
786 if (rec->serializer) {
787 lwkt_serialize_handler_call(rec->serializer, rec->handler,
788 rec->argument, NULL);
789 } else {
790 rec->handler(rec->argument, NULL);
791 }
477d3c1c 792 }
ef0fdad1 793 }
37d44089
MD
794
795 /*
796 * This is our interrupt hook to add rate randomness to the random
797 * number generator.
798 */
8b3ec75a 799 if (info->i_random.sc_enabled > 0)
96728c05 800 add_interrupt_randomness(intr);
37d44089
MD
801
802 /*
f33e9c1c
MD
803 * Unmask the interrupt to allow it to trigger again. This only
804 * applies to certain types of interrupts (typ level interrupts).
805 * This can result in the interrupt retriggering, but the retrigger
806 * will not be processed until we cycle our critical section.
363d922a
MD
807 *
808 * Only unmask interrupts while handlers are installed. It is
809 * possible to hit a situation where no handlers are installed
810 * due to a device driver livelocking and then tearing down its
811 * interrupt on close (the parallel bus being a good example).
37d44089 812 */
363d922a 813 if (*list)
37e7efec 814 machintr_intren(intr);
f33e9c1c
MD
815
816 /*
817 * Do a quick exit/enter to catch any higher-priority interrupt
818 * sources, such as the statclock, so thread time accounting
819 * will still work. This may also cause an interrupt to re-trigger.
820 */
821 crit_exit_gd(gd);
822 crit_enter_gd(gd);
823
824 /*
825 * LIVELOCK STATE MACHINE
826 */
827 switch(info->i_state) {
828 case ISTATE_NORMAL:
829 /*
b560de96 830 * Reset the count each second.
f33e9c1c 831 */
b560de96
MD
832 if (lseconds != gd->gd_time_seconds) {
833 lseconds = gd->gd_time_seconds;
834 ill_count = 0;
f33e9c1c
MD
835 }
836
837 /*
838 * If we did not exceed the frequency limit, we are done.
839 * If the interrupt has not retriggered we deschedule ourselves.
840 */
841 if (ill_count <= livelock_limit) {
842 if (info->i_running == 0) {
843 lwkt_deschedule_self(gd->gd_curthread);
844 lwkt_switch();
845 }
37d44089 846 break;
f33e9c1c
MD
847 }
848
849 /*
850 * Otherwise we are livelocked. Set up a periodic systimer
851 * to wake the thread up at the limit frequency.
852 */
b560de96 853 kprintf("intr %d at %d/%d hz, livelocked limit engaged!\n",
59d9413f 854 intr, ill_count, livelock_limit);
f33e9c1c
MD
855 info->i_state = ISTATE_LIVELOCKED;
856 if ((use_limit = livelock_limit) < 100)
857 use_limit = 100;
858 else if (use_limit > 500000)
859 use_limit = 500000;
79b38af2 860 systimer_init_periodic_nq(&ill_timer, ithread_livelock_wakeup,
973c11b9 861 (void *)(intptr_t)intr, use_limit);
37d44089 862 /* fall through */
f33e9c1c 863 case ISTATE_LIVELOCKED:
37d44089 864 /*
f33e9c1c
MD
865 * Wait for our periodic timer to go off. Since the interrupt
866 * has re-armed it can still set i_running, but it will not
867 * reschedule us while we are in a livelocked state.
37d44089 868 */
f33e9c1c 869 lwkt_deschedule_self(gd->gd_curthread);
37d44089 870 lwkt_switch();
93781523 871
37d44089 872 /*
b560de96
MD
873 * Check once a second to see if the livelock condition no
874 * longer applies.
37d44089 875 */
b560de96
MD
876 if (lseconds != gd->gd_time_seconds) {
877 lseconds = gd->gd_time_seconds;
f33e9c1c 878 if (ill_count < livelock_lowater) {
b560de96
MD
879 info->i_state = ISTATE_NORMAL;
880 systimer_del(&ill_timer);
881 kprintf("intr %d at %d/%d hz, livelock removed\n",
882 intr, ill_count, livelock_lowater);
883 } else if (livelock_debug == intr ||
884 (bootverbose && cold)) {
885 kprintf("intr %d at %d/%d hz, in livelock\n",
886 intr, ill_count, livelock_lowater);
f33e9c1c 887 }
b560de96 888 ill_count = 0;
37d44089
MD
889 }
890 break;
891 }
ef0fdad1 892 }
e43a034f 893 /* not reached */
ef0fdad1
MD
894}
895
a9d00ec1
MD
896/*
897 * Emergency interrupt polling thread. The thread begins execution
898 * outside a critical section with the BGL held.
899 *
900 * If emergency interrupt polling is enabled, this thread will
901 * execute all system interrupts not marked INTR_NOPOLL at the
902 * specified polling frequency.
903 *
904 * WARNING! This thread runs *ALL* interrupt service routines that
905 * are not marked INTR_NOPOLL, which basically means everything except
906 * the 8254 clock interrupt and the ATA interrupt. It has very high
907 * overhead and should only be used in situations where the machine
908 * cannot otherwise be made to work. Due to the severe performance
909 * degredation, it should not be enabled on production machines.
910 */
911static void
912ithread_emergency(void *arg __unused)
913{
914 struct intr_info *info;
915 intrec_t rec, nrec;
916 int intr;
917
918 for (;;) {
5f456c40 919 for (intr = 0; intr < max_installed_hard_intr; ++intr) {
a9d00ec1
MD
920 info = &intr_info_ary[intr];
921 for (rec = info->i_reclist; rec; rec = nrec) {
922 if ((rec->intr_flags & INTR_NOPOLL) == 0) {
923 if (rec->serializer) {
924 lwkt_serialize_handler_call(rec->serializer,
925 rec->handler, rec->argument, NULL);
926 } else {
927 rec->handler(rec->argument, NULL);
928 }
929 }
930 nrec = rec->next;
931 }
932 }
933 lwkt_deschedule_self(curthread);
934 lwkt_switch();
935 }
936}
937
938/*
939 * Systimer callback - schedule the emergency interrupt poll thread
940 * if emergency polling is enabled.
941 */
942static
943void
944emergency_intr_timer_callback(systimer_t info, struct intrframe *frame __unused)
945{
946 if (emergency_intr_enable)
947 lwkt_schedule(info->data);
948}
949
9db4b353
SZ
950int
951ithread_cpuid(int intr)
952{
953 const struct intr_info *info;
954
955 KKASSERT(intr >= 0 && intr < MAX_INTS);
956 info = &intr_info_ary[intr];
957
958 if (info->i_state == ISTATE_NOTHREAD)
959 return -1;
960 return info->i_thread.td_gd->gd_cpuid;
961}
962
984263bc
MD
963/*
964 * Sysctls used by systat and others: hw.intrnames and hw.intrcnt.
965 * The data for this machine dependent, and the declarations are in machine
966 * dependent code. The layout of intrnames and intrcnt however is machine
967 * independent.
968 *
969 * We do not know the length of intrcnt and intrnames at compile time, so
970 * calculate things at run time.
971 */
477d3c1c 972
984263bc
MD
973static int
974sysctl_intrnames(SYSCTL_HANDLER_ARGS)
975{
477d3c1c
MD
976 struct intr_info *info;
977 intrec_t rec;
978 int error = 0;
979 int len;
980 int intr;
981 char buf[64];
982
5f456c40 983 for (intr = 0; error == 0 && intr < MAX_INTS; ++intr) {
477d3c1c
MD
984 info = &intr_info_ary[intr];
985
986 len = 0;
987 buf[0] = 0;
988 for (rec = info->i_reclist; rec; rec = rec->next) {
f8c7a42d 989 ksnprintf(buf + len, sizeof(buf) - len, "%s%s",
477d3c1c
MD
990 (len ? "/" : ""), rec->name);
991 len += strlen(buf + len);
992 }
993 if (len == 0) {
f8c7a42d 994 ksnprintf(buf, sizeof(buf), "irq%d", intr);
477d3c1c
MD
995 len = strlen(buf);
996 }
997 error = SYSCTL_OUT(req, buf, len + 1);
998 }
999 return (error);
984263bc
MD
1000}
1001
477d3c1c 1002
984263bc
MD
1003SYSCTL_PROC(_hw, OID_AUTO, intrnames, CTLTYPE_OPAQUE | CTLFLAG_RD,
1004 NULL, 0, sysctl_intrnames, "", "Interrupt Names");
1005
1006static int
1007sysctl_intrcnt(SYSCTL_HANDLER_ARGS)
1008{
477d3c1c
MD
1009 struct intr_info *info;
1010 int error = 0;
1011 int intr;
1012
5f456c40 1013 for (intr = 0; intr < max_installed_hard_intr; ++intr) {
477d3c1c
MD
1014 info = &intr_info_ary[intr];
1015
1016 error = SYSCTL_OUT(req, &info->i_count, sizeof(info->i_count));
1017 if (error)
5f456c40
MD
1018 goto failed;
1019 }
1020 for (intr = FIRST_SOFTINT; intr < max_installed_soft_intr; ++intr) {
1021 info = &intr_info_ary[intr];
1022
1023 error = SYSCTL_OUT(req, &info->i_count, sizeof(info->i_count));
1024 if (error)
1025 goto failed;
477d3c1c 1026 }
5f456c40 1027failed:
477d3c1c 1028 return(error);
984263bc
MD
1029}
1030
1031SYSCTL_PROC(_hw, OID_AUTO, intrcnt, CTLTYPE_OPAQUE | CTLFLAG_RD,
1032 NULL, 0, sysctl_intrcnt, "", "Interrupt Counts");
477d3c1c 1033
4c846371
SZ
1034static void
1035int_moveto_destcpu(int *orig_cpuid0, int *cpuid0, int intr)
1036{
1037 int orig_cpuid = mycpuid, cpuid;
1038 char envpath[32];
1039
1040 cpuid = orig_cpuid;
1041 ksnprintf(envpath, sizeof(envpath), "hw.irq.%d.dest", intr);
1042 kgetenv_int(envpath, &cpuid);
1043 if (cpuid >= ncpus)
1044 cpuid = orig_cpuid;
1045
1046 if (cpuid != orig_cpuid)
1047 lwkt_migratecpu(cpuid);
1048
1049 *orig_cpuid0 = orig_cpuid;
1050 *cpuid0 = cpuid;
1051}
1052
1053static void
1054int_moveto_origcpu(int orig_cpuid, int cpuid)
1055{
1056 if (cpuid != orig_cpuid)
1057 lwkt_migratecpu(orig_cpuid);
1058}