Register keyword removal
[dragonfly.git] / sys / platform / pc32 / i386 / machdep.c
CommitLineData
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1/*-
2 * Copyright (c) 1992 Terrence R. Lambert.
3 * Copyright (c) 1982, 1987, 1990 The Regents of the University of California.
4 * All rights reserved.
5 *
6 * This code is derived from software contributed to Berkeley by
7 * William Jolitz.
8 *
9 * Redistribution and use in source and binary forms, with or without
10 * modification, are permitted provided that the following conditions
11 * are met:
12 * 1. Redistributions of source code must retain the above copyright
13 * notice, this list of conditions and the following disclaimer.
14 * 2. Redistributions in binary form must reproduce the above copyright
15 * notice, this list of conditions and the following disclaimer in the
16 * documentation and/or other materials provided with the distribution.
17 * 3. All advertising materials mentioning features or use of this software
18 * must display the following acknowledgement:
19 * This product includes software developed by the University of
20 * California, Berkeley and its contributors.
21 * 4. Neither the name of the University nor the names of its contributors
22 * may be used to endorse or promote products derived from this software
23 * without specific prior written permission.
24 *
25 * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
26 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
27 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
28 * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
29 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
30 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
31 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
32 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
33 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
34 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
35 * SUCH DAMAGE.
36 *
37 * from: @(#)machdep.c 7.4 (Berkeley) 6/3/91
38 * $FreeBSD: src/sys/i386/i386/machdep.c,v 1.385.2.30 2003/05/31 08:48:05 alc Exp $
90b9818c 39 * $DragonFly: src/sys/platform/pc32/i386/machdep.c,v 1.29 2003/07/26 18:12:42 dillon Exp $
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40 */
41
42#include "apm.h"
43#include "ether.h"
44#include "npx.h"
45#include "opt_atalk.h"
46#include "opt_compat.h"
47#include "opt_cpu.h"
48#include "opt_ddb.h"
49#include "opt_directio.h"
50#include "opt_inet.h"
51#include "opt_ipx.h"
52#include "opt_maxmem.h"
53#include "opt_msgbuf.h"
54#include "opt_perfmon.h"
55#include "opt_swap.h"
56#include "opt_user_ldt.h"
57#include "opt_userconfig.h"
58
59#include <sys/param.h>
60#include <sys/systm.h>
61#include <sys/sysproto.h>
62#include <sys/signalvar.h>
63#include <sys/kernel.h>
64#include <sys/linker.h>
65#include <sys/malloc.h>
66#include <sys/proc.h>
67#include <sys/buf.h>
68#include <sys/reboot.h>
69#include <sys/callout.h>
70#include <sys/mbuf.h>
71#include <sys/msgbuf.h>
72#include <sys/sysent.h>
73#include <sys/sysctl.h>
74#include <sys/vmmeter.h>
75#include <sys/bus.h>
76
77#include <vm/vm.h>
78#include <vm/vm_param.h>
79#include <sys/lock.h>
80#include <vm/vm_kern.h>
81#include <vm/vm_object.h>
82#include <vm/vm_page.h>
83#include <vm/vm_map.h>
84#include <vm/vm_pager.h>
85#include <vm/vm_extern.h>
86
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87#include <sys/thread2.h>
88
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89#include <sys/user.h>
90#include <sys/exec.h>
91#include <sys/cons.h>
92
93#include <ddb/ddb.h>
94
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95#include <machine/cpu.h>
96#include <machine/reg.h>
97#include <machine/clock.h>
98#include <machine/specialreg.h>
99#include <machine/bootinfo.h>
100#include <machine/ipl.h>
101#include <machine/md_var.h>
102#include <machine/pcb_ext.h> /* pcb.h included via sys/user.h */
85100692 103#include <machine/globaldata.h> /* CPU_prvspace */
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104#ifdef SMP
105#include <machine/smp.h>
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106#endif
107#ifdef PERFMON
108#include <machine/perfmon.h>
109#endif
110#include <machine/cputypes.h>
111
112#ifdef OLD_BUS_ARCH
113#include <i386/isa/isa_device.h>
114#endif
115#include <i386/isa/intr_machdep.h>
116#include <isa/rtc.h>
117#include <machine/vm86.h>
118#include <sys/random.h>
119#include <sys/ptrace.h>
120#include <machine/sigframe.h>
121
122extern void init386 __P((int first));
123extern void dblfault_handler __P((void));
124
125extern void printcpuinfo(void); /* XXX header file */
126extern void finishidentcpu(void);
127extern void panicifcpuunsupported(void);
128extern void initializecpu(void);
129
130static void cpu_startup __P((void *));
131#ifdef CPU_ENABLE_SSE
132static void set_fpregs_xmm __P((struct save87 *, struct savexmm *));
133static void fill_fpregs_xmm __P((struct savexmm *, struct save87 *));
134#endif /* CPU_ENABLE_SSE */
135#ifdef DIRECTIO
136extern void ffs_rawread_setup(void);
137#endif /* DIRECTIO */
8a8d5d85 138static void init_locks(void);
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139
140SYSINIT(cpu, SI_SUB_CPU, SI_ORDER_FIRST, cpu_startup, NULL)
141
142static MALLOC_DEFINE(M_MBUF, "mbuf", "mbuf");
143
144int _udatasel, _ucodesel;
145u_int atdevbase;
146
147#if defined(SWTCH_OPTIM_STATS)
148extern int swtch_optim_stats;
149SYSCTL_INT(_debug, OID_AUTO, swtch_optim_stats,
150 CTLFLAG_RD, &swtch_optim_stats, 0, "");
151SYSCTL_INT(_debug, OID_AUTO, tlb_flush_count,
152 CTLFLAG_RD, &tlb_flush_count, 0, "");
153#endif
154
155#ifdef PC98
156static int ispc98 = 1;
157#else
158static int ispc98 = 0;
159#endif
160SYSCTL_INT(_machdep, OID_AUTO, ispc98, CTLFLAG_RD, &ispc98, 0, "");
161
162int physmem = 0;
163int cold = 1;
164
165static int
166sysctl_hw_physmem(SYSCTL_HANDLER_ARGS)
167{
168 int error = sysctl_handle_int(oidp, 0, ctob(physmem), req);
169 return (error);
170}
171
172SYSCTL_PROC(_hw, HW_PHYSMEM, physmem, CTLTYPE_INT|CTLFLAG_RD,
173 0, 0, sysctl_hw_physmem, "IU", "");
174
175static int
176sysctl_hw_usermem(SYSCTL_HANDLER_ARGS)
177{
178 int error = sysctl_handle_int(oidp, 0,
12e4aaff 179 ctob(physmem - vmstats.v_wire_count), req);
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180 return (error);
181}
182
183SYSCTL_PROC(_hw, HW_USERMEM, usermem, CTLTYPE_INT|CTLFLAG_RD,
184 0, 0, sysctl_hw_usermem, "IU", "");
185
186static int
187sysctl_hw_availpages(SYSCTL_HANDLER_ARGS)
188{
189 int error = sysctl_handle_int(oidp, 0,
190 i386_btop(avail_end - avail_start), req);
191 return (error);
192}
193
194SYSCTL_PROC(_hw, OID_AUTO, availpages, CTLTYPE_INT|CTLFLAG_RD,
195 0, 0, sysctl_hw_availpages, "I", "");
196
197static int
198sysctl_machdep_msgbuf(SYSCTL_HANDLER_ARGS)
199{
200 int error;
201
202 /* Unwind the buffer, so that it's linear (possibly starting with
203 * some initial nulls).
204 */
205 error=sysctl_handle_opaque(oidp,msgbufp->msg_ptr+msgbufp->msg_bufr,
206 msgbufp->msg_size-msgbufp->msg_bufr,req);
207 if(error) return(error);
208 if(msgbufp->msg_bufr>0) {
209 error=sysctl_handle_opaque(oidp,msgbufp->msg_ptr,
210 msgbufp->msg_bufr,req);
211 }
212 return(error);
213}
214
215SYSCTL_PROC(_machdep, OID_AUTO, msgbuf, CTLTYPE_STRING|CTLFLAG_RD,
216 0, 0, sysctl_machdep_msgbuf, "A","Contents of kernel message buffer");
217
218static int msgbuf_clear;
219
220static int
221sysctl_machdep_msgbuf_clear(SYSCTL_HANDLER_ARGS)
222{
223 int error;
224 error = sysctl_handle_int(oidp, oidp->oid_arg1, oidp->oid_arg2,
225 req);
226 if (!error && req->newptr) {
227 /* Clear the buffer and reset write pointer */
228 bzero(msgbufp->msg_ptr,msgbufp->msg_size);
229 msgbufp->msg_bufr=msgbufp->msg_bufx=0;
230 msgbuf_clear=0;
231 }
232 return (error);
233}
234
235SYSCTL_PROC(_machdep, OID_AUTO, msgbuf_clear, CTLTYPE_INT|CTLFLAG_RW,
236 &msgbuf_clear, 0, sysctl_machdep_msgbuf_clear, "I",
237 "Clear kernel message buffer");
238
239int bootverbose = 0, Maxmem = 0;
240long dumplo;
241
242vm_offset_t phys_avail[10];
243
244/* must be 2 less so 0 0 can signal end of chunks */
245#define PHYS_AVAIL_ARRAY_END ((sizeof(phys_avail) / sizeof(vm_offset_t)) - 2)
246
247static vm_offset_t buffer_sva, buffer_eva;
248vm_offset_t clean_sva, clean_eva;
249static vm_offset_t pager_sva, pager_eva;
250static struct trapframe proc0_tf;
251
252static void
253cpu_startup(dummy)
254 void *dummy;
255{
256 register unsigned i;
257 register caddr_t v;
258 vm_offset_t maxaddr;
259 vm_size_t size = 0;
260 int firstaddr;
261 vm_offset_t minaddr;
262
263 if (boothowto & RB_VERBOSE)
264 bootverbose++;
265
266 /*
267 * Good {morning,afternoon,evening,night}.
268 */
269 printf("%s", version);
270 startrtclock();
271 printcpuinfo();
272 panicifcpuunsupported();
273#ifdef PERFMON
274 perfmon_init();
275#endif
276 printf("real memory = %u (%uK bytes)\n", ptoa(Maxmem), ptoa(Maxmem) / 1024);
277 /*
278 * Display any holes after the first chunk of extended memory.
279 */
280 if (bootverbose) {
281 int indx;
282
283 printf("Physical memory chunk(s):\n");
284 for (indx = 0; phys_avail[indx + 1] != 0; indx += 2) {
285 unsigned int size1 = phys_avail[indx + 1] - phys_avail[indx];
286
287 printf("0x%08x - 0x%08x, %u bytes (%u pages)\n",
288 phys_avail[indx], phys_avail[indx + 1] - 1, size1,
289 size1 / PAGE_SIZE);
290 }
291 }
292
293 /*
294 * Calculate callout wheel size
295 */
296 for (callwheelsize = 1, callwheelbits = 0;
297 callwheelsize < ncallout;
298 callwheelsize <<= 1, ++callwheelbits)
299 ;
300 callwheelmask = callwheelsize - 1;
301
302 /*
303 * Allocate space for system data structures.
304 * The first available kernel virtual address is in "v".
305 * As pages of kernel virtual memory are allocated, "v" is incremented.
306 * As pages of memory are allocated and cleared,
307 * "firstaddr" is incremented.
308 * An index into the kernel page table corresponding to the
309 * virtual memory address maintained in "v" is kept in "mapaddr".
310 */
311
312 /*
313 * Make two passes. The first pass calculates how much memory is
314 * needed and allocates it. The second pass assigns virtual
315 * addresses to the various data structures.
316 */
317 firstaddr = 0;
318again:
319 v = (caddr_t)firstaddr;
320
321#define valloc(name, type, num) \
322 (name) = (type *)v; v = (caddr_t)((name)+(num))
323#define valloclim(name, type, num, lim) \
324 (name) = (type *)v; v = (caddr_t)((lim) = ((name)+(num)))
325
326 valloc(callout, struct callout, ncallout);
327 valloc(callwheel, struct callout_tailq, callwheelsize);
328
329 /*
330 * The nominal buffer size (and minimum KVA allocation) is BKVASIZE.
331 * For the first 64MB of ram nominally allocate sufficient buffers to
332 * cover 1/4 of our ram. Beyond the first 64MB allocate additional
333 * buffers to cover 1/20 of our ram over 64MB. When auto-sizing
334 * the buffer cache we limit the eventual kva reservation to
335 * maxbcache bytes.
336 *
337 * factor represents the 1/4 x ram conversion.
338 */
339 if (nbuf == 0) {
340 int factor = 4 * BKVASIZE / 1024;
341 int kbytes = physmem * (PAGE_SIZE / 1024);
342
343 nbuf = 50;
344 if (kbytes > 4096)
345 nbuf += min((kbytes - 4096) / factor, 65536 / factor);
346 if (kbytes > 65536)
347 nbuf += (kbytes - 65536) * 2 / (factor * 5);
348 if (maxbcache && nbuf > maxbcache / BKVASIZE)
349 nbuf = maxbcache / BKVASIZE;
350 }
351
352 /*
353 * Do not allow the buffer_map to be more then 1/2 the size of the
354 * kernel_map.
355 */
356 if (nbuf > (kernel_map->max_offset - kernel_map->min_offset) /
357 (BKVASIZE * 2)) {
358 nbuf = (kernel_map->max_offset - kernel_map->min_offset) /
359 (BKVASIZE * 2);
360 printf("Warning: nbufs capped at %d\n", nbuf);
361 }
362
363 nswbuf = max(min(nbuf/4, 256), 16);
364#ifdef NSWBUF_MIN
365 if (nswbuf < NSWBUF_MIN)
366 nswbuf = NSWBUF_MIN;
367#endif
368#ifdef DIRECTIO
369 ffs_rawread_setup();
370#endif
371
372 valloc(swbuf, struct buf, nswbuf);
373 valloc(buf, struct buf, nbuf);
374 v = bufhashinit(v);
375
376 /*
377 * End of first pass, size has been calculated so allocate memory
378 */
379 if (firstaddr == 0) {
380 size = (vm_size_t)(v - firstaddr);
381 firstaddr = (int)kmem_alloc(kernel_map, round_page(size));
382 if (firstaddr == 0)
383 panic("startup: no room for tables");
384 goto again;
385 }
386
387 /*
388 * End of second pass, addresses have been assigned
389 */
390 if ((vm_size_t)(v - firstaddr) != size)
391 panic("startup: table size inconsistency");
392
393 clean_map = kmem_suballoc(kernel_map, &clean_sva, &clean_eva,
394 (nbuf*BKVASIZE) + (nswbuf*MAXPHYS) + pager_map_size);
395 buffer_map = kmem_suballoc(clean_map, &buffer_sva, &buffer_eva,
396 (nbuf*BKVASIZE));
397 buffer_map->system_map = 1;
398 pager_map = kmem_suballoc(clean_map, &pager_sva, &pager_eva,
399 (nswbuf*MAXPHYS) + pager_map_size);
400 pager_map->system_map = 1;
401 exec_map = kmem_suballoc(kernel_map, &minaddr, &maxaddr,
402 (16*(ARG_MAX+(PAGE_SIZE*3))));
403
404 /*
405 * Finally, allocate mbuf pool. Since mclrefcnt is an off-size
406 * we use the more space efficient malloc in place of kmem_alloc.
407 */
408 {
409 vm_offset_t mb_map_size;
410
411 mb_map_size = nmbufs * MSIZE + nmbclusters * MCLBYTES;
412 mb_map_size = roundup2(mb_map_size, max(MCLBYTES, PAGE_SIZE));
413 mclrefcnt = malloc(mb_map_size / MCLBYTES, M_MBUF, M_NOWAIT);
414 bzero(mclrefcnt, mb_map_size / MCLBYTES);
415 mb_map = kmem_suballoc(kmem_map, (vm_offset_t *)&mbutl, &maxaddr,
416 mb_map_size);
417 mb_map->system_map = 1;
418 }
419
420 /*
421 * Initialize callouts
422 */
423 SLIST_INIT(&callfree);
424 for (i = 0; i < ncallout; i++) {
425 callout_init(&callout[i]);
426 callout[i].c_flags = CALLOUT_LOCAL_ALLOC;
427 SLIST_INSERT_HEAD(&callfree, &callout[i], c_links.sle);
428 }
429
430 for (i = 0; i < callwheelsize; i++) {
431 TAILQ_INIT(&callwheel[i]);
432 }
433
434#if defined(USERCONFIG)
435 userconfig();
436 cninit(); /* the preferred console may have changed */
437#endif
438
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439 printf("avail memory = %u (%uK bytes)\n", ptoa(vmstats.v_free_count),
440 ptoa(vmstats.v_free_count) / 1024);
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441
442 /*
443 * Set up buffers, so they can be used to read disk labels.
444 */
445 bufinit();
446 vm_pager_bufferinit();
447
448#ifdef SMP
449 /*
450 * OK, enough kmem_alloc/malloc state should be up, lets get on with it!
451 */
452 mp_start(); /* fire up the APs and APICs */
453 mp_announce();
454#endif /* SMP */
455 cpu_setregs();
456}
457
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458/*
459 * Send an interrupt to process.
460 *
461 * Stack is set up to allow sigcode stored
462 * at top to call routine, followed by kcall
463 * to sigreturn routine below. After sigreturn
464 * resets the signal mask, the stack, and the
465 * frame pointer, it returns to the user
466 * specified pc, psl.
467 */
468static void
469osendsig(sig_t catcher, int sig, sigset_t *mask, u_long code)
470{
471 register struct proc *p = curproc;
472 register struct trapframe *regs;
473 register struct osigframe *fp;
474 struct osigframe sf;
475 struct sigacts *psp = p->p_sigacts;
476 int oonstack;
477
478 regs = p->p_md.md_regs;
479 oonstack = (p->p_sigstk.ss_flags & SS_ONSTACK) ? 1 : 0;
480
481 /* Allocate and validate space for the signal handler context. */
482 if ((p->p_flag & P_ALTSTACK) && !oonstack &&
483 SIGISMEMBER(psp->ps_sigonstack, sig)) {
484 fp = (struct osigframe *)(p->p_sigstk.ss_sp +
485 p->p_sigstk.ss_size - sizeof(struct osigframe));
486 p->p_sigstk.ss_flags |= SS_ONSTACK;
487 }
488 else
489 fp = (struct osigframe *)regs->tf_esp - 1;
490
491 /* Translate the signal if appropriate */
492 if (p->p_sysent->sv_sigtbl) {
493 if (sig <= p->p_sysent->sv_sigsize)
494 sig = p->p_sysent->sv_sigtbl[_SIG_IDX(sig)];
495 }
496
497 /* Build the argument list for the signal handler. */
498 sf.sf_signum = sig;
499 sf.sf_scp = (register_t)&fp->sf_siginfo.si_sc;
500 if (SIGISMEMBER(p->p_sigacts->ps_siginfo, sig)) {
501 /* Signal handler installed with SA_SIGINFO. */
502 sf.sf_arg2 = (register_t)&fp->sf_siginfo;
503 sf.sf_siginfo.si_signo = sig;
504 sf.sf_siginfo.si_code = code;
505 sf.sf_ahu.sf_action = (__osiginfohandler_t *)catcher;
506 }
507 else {
508 /* Old FreeBSD-style arguments. */
509 sf.sf_arg2 = code;
510 sf.sf_addr = regs->tf_err;
511 sf.sf_ahu.sf_handler = catcher;
512 }
513
514 /* save scratch registers */
515 sf.sf_siginfo.si_sc.sc_eax = regs->tf_eax;
516 sf.sf_siginfo.si_sc.sc_ebx = regs->tf_ebx;
517 sf.sf_siginfo.si_sc.sc_ecx = regs->tf_ecx;
518 sf.sf_siginfo.si_sc.sc_edx = regs->tf_edx;
519 sf.sf_siginfo.si_sc.sc_esi = regs->tf_esi;
520 sf.sf_siginfo.si_sc.sc_edi = regs->tf_edi;
521 sf.sf_siginfo.si_sc.sc_cs = regs->tf_cs;
522 sf.sf_siginfo.si_sc.sc_ds = regs->tf_ds;
523 sf.sf_siginfo.si_sc.sc_ss = regs->tf_ss;
524 sf.sf_siginfo.si_sc.sc_es = regs->tf_es;
525 sf.sf_siginfo.si_sc.sc_fs = regs->tf_fs;
526 sf.sf_siginfo.si_sc.sc_gs = rgs();
527 sf.sf_siginfo.si_sc.sc_isp = regs->tf_isp;
528
529 /* Build the signal context to be used by sigreturn. */
530 sf.sf_siginfo.si_sc.sc_onstack = oonstack;
531 SIG2OSIG(*mask, sf.sf_siginfo.si_sc.sc_mask);
532 sf.sf_siginfo.si_sc.sc_sp = regs->tf_esp;
533 sf.sf_siginfo.si_sc.sc_fp = regs->tf_ebp;
534 sf.sf_siginfo.si_sc.sc_pc = regs->tf_eip;
535 sf.sf_siginfo.si_sc.sc_ps = regs->tf_eflags;
536 sf.sf_siginfo.si_sc.sc_trapno = regs->tf_trapno;
537 sf.sf_siginfo.si_sc.sc_err = regs->tf_err;
538
539 /*
540 * If we're a vm86 process, we want to save the segment registers.
541 * We also change eflags to be our emulated eflags, not the actual
542 * eflags.
543 */
544 if (regs->tf_eflags & PSL_VM) {
545 struct trapframe_vm86 *tf = (struct trapframe_vm86 *)regs;
b7c628e4 546 struct vm86_kernel *vm86 = &p->p_thread->td_pcb->pcb_ext->ext_vm86;
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547
548 sf.sf_siginfo.si_sc.sc_gs = tf->tf_vm86_gs;
549 sf.sf_siginfo.si_sc.sc_fs = tf->tf_vm86_fs;
550 sf.sf_siginfo.si_sc.sc_es = tf->tf_vm86_es;
551 sf.sf_siginfo.si_sc.sc_ds = tf->tf_vm86_ds;
552
553 if (vm86->vm86_has_vme == 0)
554 sf.sf_siginfo.si_sc.sc_ps =
555 (tf->tf_eflags & ~(PSL_VIF | PSL_VIP))
556 | (vm86->vm86_eflags & (PSL_VIF | PSL_VIP));
557 /* see sendsig for comment */
558 tf->tf_eflags &= ~(PSL_VM | PSL_NT | PSL_VIF | PSL_VIP);
559 }
560
561 /* Copy the sigframe out to the user's stack. */
562 if (copyout(&sf, fp, sizeof(struct osigframe)) != 0) {
563 /*
564 * Something is wrong with the stack pointer.
565 * ...Kill the process.
566 */
567 sigexit(p, SIGILL);
568 }
569
570 regs->tf_esp = (int)fp;
571 regs->tf_eip = PS_STRINGS - szosigcode;
572 regs->tf_eflags &= ~PSL_T;
573 regs->tf_cs = _ucodesel;
574 regs->tf_ds = _udatasel;
575 regs->tf_es = _udatasel;
576 regs->tf_fs = _udatasel;
577 load_gs(_udatasel);
578 regs->tf_ss = _udatasel;
579}
580
581void
582sendsig(catcher, sig, mask, code)
583 sig_t catcher;
584 int sig;
585 sigset_t *mask;
586 u_long code;
587{
588 struct proc *p = curproc;
589 struct trapframe *regs;
590 struct sigacts *psp = p->p_sigacts;
591 struct sigframe sf, *sfp;
592 int oonstack;
593
594 if (SIGISMEMBER(psp->ps_osigset, sig)) {
595 osendsig(catcher, sig, mask, code);
596 return;
597 }
598
599 regs = p->p_md.md_regs;
600 oonstack = (p->p_sigstk.ss_flags & SS_ONSTACK) ? 1 : 0;
601
602 /* save user context */
603 bzero(&sf, sizeof(struct sigframe));
604 sf.sf_uc.uc_sigmask = *mask;
605 sf.sf_uc.uc_stack = p->p_sigstk;
606 sf.sf_uc.uc_mcontext.mc_onstack = oonstack;
607 sf.sf_uc.uc_mcontext.mc_gs = rgs();
608 bcopy(regs, &sf.sf_uc.uc_mcontext.mc_fs, sizeof(struct trapframe));
609
610 /* Allocate and validate space for the signal handler context. */
611 if ((p->p_flag & P_ALTSTACK) != 0 && !oonstack &&
612 SIGISMEMBER(psp->ps_sigonstack, sig)) {
613 sfp = (struct sigframe *)(p->p_sigstk.ss_sp +
614 p->p_sigstk.ss_size - sizeof(struct sigframe));
615 p->p_sigstk.ss_flags |= SS_ONSTACK;
616 }
617 else
618 sfp = (struct sigframe *)regs->tf_esp - 1;
619
620 /* Translate the signal is appropriate */
621 if (p->p_sysent->sv_sigtbl) {
622 if (sig <= p->p_sysent->sv_sigsize)
623 sig = p->p_sysent->sv_sigtbl[_SIG_IDX(sig)];
624 }
625
626 /* Build the argument list for the signal handler. */
627 sf.sf_signum = sig;
628 sf.sf_ucontext = (register_t)&sfp->sf_uc;
629 if (SIGISMEMBER(p->p_sigacts->ps_siginfo, sig)) {
630 /* Signal handler installed with SA_SIGINFO. */
631 sf.sf_siginfo = (register_t)&sfp->sf_si;
632 sf.sf_ahu.sf_action = (__siginfohandler_t *)catcher;
633
634 /* fill siginfo structure */
635 sf.sf_si.si_signo = sig;
636 sf.sf_si.si_code = code;
637 sf.sf_si.si_addr = (void*)regs->tf_err;
638 }
639 else {
640 /* Old FreeBSD-style arguments. */
641 sf.sf_siginfo = code;
642 sf.sf_addr = regs->tf_err;
643 sf.sf_ahu.sf_handler = catcher;
644 }
645
646 /*
647 * If we're a vm86 process, we want to save the segment registers.
648 * We also change eflags to be our emulated eflags, not the actual
649 * eflags.
650 */
651 if (regs->tf_eflags & PSL_VM) {
652 struct trapframe_vm86 *tf = (struct trapframe_vm86 *)regs;
b7c628e4 653 struct vm86_kernel *vm86 = &p->p_thread->td_pcb->pcb_ext->ext_vm86;
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654
655 sf.sf_uc.uc_mcontext.mc_gs = tf->tf_vm86_gs;
656 sf.sf_uc.uc_mcontext.mc_fs = tf->tf_vm86_fs;
657 sf.sf_uc.uc_mcontext.mc_es = tf->tf_vm86_es;
658 sf.sf_uc.uc_mcontext.mc_ds = tf->tf_vm86_ds;
659
660 if (vm86->vm86_has_vme == 0)
661 sf.sf_uc.uc_mcontext.mc_eflags =
662 (tf->tf_eflags & ~(PSL_VIF | PSL_VIP)) |
663 (vm86->vm86_eflags & (PSL_VIF | PSL_VIP));
664
665 /*
666 * Clear PSL_NT to inhibit T_TSSFLT faults on return from
667 * syscalls made by the signal handler. This just avoids
668 * wasting time for our lazy fixup of such faults. PSL_NT
669 * does nothing in vm86 mode, but vm86 programs can set it
670 * almost legitimately in probes for old cpu types.
671 */
672 tf->tf_eflags &= ~(PSL_VM | PSL_NT | PSL_VIF | PSL_VIP);
673 }
674
675 /*
676 * Copy the sigframe out to the user's stack.
677 */
678 if (copyout(&sf, sfp, sizeof(struct sigframe)) != 0) {
679 /*
680 * Something is wrong with the stack pointer.
681 * ...Kill the process.
682 */
683 sigexit(p, SIGILL);
684 }
685
686 regs->tf_esp = (int)sfp;
687 regs->tf_eip = PS_STRINGS - *(p->p_sysent->sv_szsigcode);
688 regs->tf_eflags &= ~PSL_T;
689 regs->tf_cs = _ucodesel;
690 regs->tf_ds = _udatasel;
691 regs->tf_es = _udatasel;
692 regs->tf_fs = _udatasel;
693 load_gs(_udatasel);
694 regs->tf_ss = _udatasel;
695}
696
697/*
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698 * osigreturn_args(struct osigcontext *sigcntxp)
699 *
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700 * System call to cleanup state after a signal
701 * has been taken. Reset signal mask and
702 * stack state from context left by sendsig (above).
703 * Return to previous pc and psl as specified by
704 * context left by sendsig. Check carefully to
705 * make sure that the user has not modified the
706 * state to gain improper privileges.
707 */
708#define EFL_SECURE(ef, oef) ((((ef) ^ (oef)) & ~PSL_USERCHANGE) == 0)
709#define CS_SECURE(cs) (ISPL(cs) == SEL_UPL)
710
711int
41c20dac 712osigreturn(struct osigreturn_args *uap)
984263bc 713{
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714 struct proc *p = curproc;
715 struct osigcontext *scp;
716 struct trapframe *regs = p->p_md.md_regs;
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717 int eflags;
718
719 scp = uap->sigcntxp;
720
721 if (!useracc((caddr_t)scp, sizeof (struct osigcontext), VM_PROT_READ))
722 return(EFAULT);
723
724 eflags = scp->sc_ps;
725 if (eflags & PSL_VM) {
726 struct trapframe_vm86 *tf = (struct trapframe_vm86 *)regs;
727 struct vm86_kernel *vm86;
728
729 /*
730 * if pcb_ext == 0 or vm86_inited == 0, the user hasn't
731 * set up the vm86 area, and we can't enter vm86 mode.
732 */
b7c628e4 733 if (p->p_thread->td_pcb->pcb_ext == 0)
984263bc 734 return (EINVAL);
b7c628e4 735 vm86 = &p->p_thread->td_pcb->pcb_ext->ext_vm86;
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736 if (vm86->vm86_inited == 0)
737 return (EINVAL);
738
739 /* go back to user mode if both flags are set */
740 if ((eflags & PSL_VIP) && (eflags & PSL_VIF))
741 trapsignal(p, SIGBUS, 0);
742
743 if (vm86->vm86_has_vme) {
744 eflags = (tf->tf_eflags & ~VME_USERCHANGE) |
745 (eflags & VME_USERCHANGE) | PSL_VM;
746 } else {
747 vm86->vm86_eflags = eflags; /* save VIF, VIP */
748 eflags = (tf->tf_eflags & ~VM_USERCHANGE) | (eflags & VM_USERCHANGE) | PSL_VM;
749 }
750 tf->tf_vm86_ds = scp->sc_ds;
751 tf->tf_vm86_es = scp->sc_es;
752 tf->tf_vm86_fs = scp->sc_fs;
753 tf->tf_vm86_gs = scp->sc_gs;
754 tf->tf_ds = _udatasel;
755 tf->tf_es = _udatasel;
756 tf->tf_fs = _udatasel;
757 } else {
758 /*
759 * Don't allow users to change privileged or reserved flags.
760 */
761 /*
762 * XXX do allow users to change the privileged flag PSL_RF.
763 * The cpu sets PSL_RF in tf_eflags for faults. Debuggers
764 * should sometimes set it there too. tf_eflags is kept in
765 * the signal context during signal handling and there is no
766 * other place to remember it, so the PSL_RF bit may be
767 * corrupted by the signal handler without us knowing.
768 * Corruption of the PSL_RF bit at worst causes one more or
769 * one less debugger trap, so allowing it is fairly harmless.
770 */
771 if (!EFL_SECURE(eflags & ~PSL_RF, regs->tf_eflags & ~PSL_RF)) {
772 return(EINVAL);
773 }
774
775 /*
776 * Don't allow users to load a valid privileged %cs. Let the
777 * hardware check for invalid selectors, excess privilege in
778 * other selectors, invalid %eip's and invalid %esp's.
779 */
780 if (!CS_SECURE(scp->sc_cs)) {
781 trapsignal(p, SIGBUS, T_PROTFLT);
782 return(EINVAL);
783 }
784 regs->tf_ds = scp->sc_ds;
785 regs->tf_es = scp->sc_es;
786 regs->tf_fs = scp->sc_fs;
787 }
788
789 /* restore scratch registers */
790 regs->tf_eax = scp->sc_eax;
791 regs->tf_ebx = scp->sc_ebx;
792 regs->tf_ecx = scp->sc_ecx;
793 regs->tf_edx = scp->sc_edx;
794 regs->tf_esi = scp->sc_esi;
795 regs->tf_edi = scp->sc_edi;
796 regs->tf_cs = scp->sc_cs;
797 regs->tf_ss = scp->sc_ss;
798 regs->tf_isp = scp->sc_isp;
799
800 if (scp->sc_onstack & 01)
801 p->p_sigstk.ss_flags |= SS_ONSTACK;
802 else
803 p->p_sigstk.ss_flags &= ~SS_ONSTACK;
804
805 SIGSETOLD(p->p_sigmask, scp->sc_mask);
806 SIG_CANTMASK(p->p_sigmask);
807 regs->tf_ebp = scp->sc_fp;
808 regs->tf_esp = scp->sc_sp;
809 regs->tf_eip = scp->sc_pc;
810 regs->tf_eflags = eflags;
811 return(EJUSTRETURN);
812}
813
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814/*
815 * sigreturn(ucontext_t *sigcntxp)
816 */
984263bc 817int
41c20dac 818sigreturn(struct sigreturn_args *uap)
984263bc 819{
41c20dac 820 struct proc *p = curproc;
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821 struct trapframe *regs;
822 ucontext_t *ucp;
823 int cs, eflags;
824
825 ucp = uap->sigcntxp;
826
827 if (!useracc((caddr_t)ucp, sizeof(struct osigcontext), VM_PROT_READ))
828 return (EFAULT);
829 if (((struct osigcontext *)ucp)->sc_trapno == 0x01d516)
41c20dac 830 return (osigreturn((struct osigreturn_args *)uap));
984263bc
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831
832 /*
833 * Since ucp is not an osigcontext but a ucontext_t, we have to
834 * check again if all of it is accessible. A ucontext_t is
835 * much larger, so instead of just checking for the pointer
836 * being valid for the size of an osigcontext, now check for
837 * it being valid for a whole, new-style ucontext_t.
838 */
839 if (!useracc((caddr_t)ucp, sizeof(ucontext_t), VM_PROT_READ))
840 return (EFAULT);
841
842 regs = p->p_md.md_regs;
843 eflags = ucp->uc_mcontext.mc_eflags;
844
845 if (eflags & PSL_VM) {
846 struct trapframe_vm86 *tf = (struct trapframe_vm86 *)regs;
847 struct vm86_kernel *vm86;
848
849 /*
850 * if pcb_ext == 0 or vm86_inited == 0, the user hasn't
851 * set up the vm86 area, and we can't enter vm86 mode.
852 */
b7c628e4 853 if (p->p_thread->td_pcb->pcb_ext == 0)
984263bc 854 return (EINVAL);
b7c628e4 855 vm86 = &p->p_thread->td_pcb->pcb_ext->ext_vm86;
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MD
856 if (vm86->vm86_inited == 0)
857 return (EINVAL);
858
859 /* go back to user mode if both flags are set */
860 if ((eflags & PSL_VIP) && (eflags & PSL_VIF))
861 trapsignal(p, SIGBUS, 0);
862
863 if (vm86->vm86_has_vme) {
864 eflags = (tf->tf_eflags & ~VME_USERCHANGE) |
865 (eflags & VME_USERCHANGE) | PSL_VM;
866 } else {
867 vm86->vm86_eflags = eflags; /* save VIF, VIP */
868 eflags = (tf->tf_eflags & ~VM_USERCHANGE) | (eflags & VM_USERCHANGE) | PSL_VM;
869 }
870 bcopy(&ucp->uc_mcontext.mc_fs, tf, sizeof(struct trapframe));
871 tf->tf_eflags = eflags;
872 tf->tf_vm86_ds = tf->tf_ds;
873 tf->tf_vm86_es = tf->tf_es;
874 tf->tf_vm86_fs = tf->tf_fs;
875 tf->tf_vm86_gs = ucp->uc_mcontext.mc_gs;
876 tf->tf_ds = _udatasel;
877 tf->tf_es = _udatasel;
878 tf->tf_fs = _udatasel;
879 } else {
880 /*
881 * Don't allow users to change privileged or reserved flags.
882 */
883 /*
884 * XXX do allow users to change the privileged flag PSL_RF.
885 * The cpu sets PSL_RF in tf_eflags for faults. Debuggers
886 * should sometimes set it there too. tf_eflags is kept in
887 * the signal context during signal handling and there is no
888 * other place to remember it, so the PSL_RF bit may be
889 * corrupted by the signal handler without us knowing.
890 * Corruption of the PSL_RF bit at worst causes one more or
891 * one less debugger trap, so allowing it is fairly harmless.
892 */
893 if (!EFL_SECURE(eflags & ~PSL_RF, regs->tf_eflags & ~PSL_RF)) {
894 printf("sigreturn: eflags = 0x%x\n", eflags);
895 return(EINVAL);
896 }
897
898 /*
899 * Don't allow users to load a valid privileged %cs. Let the
900 * hardware check for invalid selectors, excess privilege in
901 * other selectors, invalid %eip's and invalid %esp's.
902 */
903 cs = ucp->uc_mcontext.mc_cs;
904 if (!CS_SECURE(cs)) {
905 printf("sigreturn: cs = 0x%x\n", cs);
906 trapsignal(p, SIGBUS, T_PROTFLT);
907 return(EINVAL);
908 }
909 bcopy(&ucp->uc_mcontext.mc_fs, regs, sizeof(struct trapframe));
910 }
911
912 if (ucp->uc_mcontext.mc_onstack & 1)
913 p->p_sigstk.ss_flags |= SS_ONSTACK;
914 else
915 p->p_sigstk.ss_flags &= ~SS_ONSTACK;
916
917 p->p_sigmask = ucp->uc_sigmask;
918 SIG_CANTMASK(p->p_sigmask);
919 return(EJUSTRETURN);
920}
921
922/*
923 * Machine dependent boot() routine
924 *
925 * I haven't seen anything to put here yet
926 * Possibly some stuff might be grafted back here from boot()
927 */
928void
929cpu_boot(int howto)
930{
931}
932
933/*
934 * Shutdown the CPU as much as possible
935 */
936void
937cpu_halt(void)
938{
939 for (;;)
940 __asm__ ("hlt");
941}
942
943/*
8ad65e08
MD
944 * cpu_idle() represents the idle LWKT. You cannot return from this function
945 * (unless you want to blow things up!). Instead we look for runnable threads
946 * and loop or halt as appropriate. Giant is not held on entry to the thread.
984263bc 947 *
26a0694b 948 * The main loop is entered with a critical section held, we must release
a2a5ad0d
MD
949 * the critical section before doing anything else. lwkt_switch() will
950 * check for pending interrupts due to entering and exiting its own
951 * critical section.
26a0694b 952 *
a2a5ad0d
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953 * Note on cpu_idle_hlt: On an SMP system we rely on a scheduler IPI
954 * to wake a HLTed cpu up. However, there are cases where the idlethread
955 * will be entered with the possibility that no IPI will occur and in such
956 * cases lwkt_switch() sets TDF_IDLE_NOHLT.
984263bc 957 */
96728c05 958static int cpu_idle_hlt = 1;
984263bc
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959SYSCTL_INT(_machdep, OID_AUTO, cpu_idle_hlt, CTLFLAG_RW,
960 &cpu_idle_hlt, 0, "Idle loop HLT enable");
961
962void
963cpu_idle(void)
964{
a2a5ad0d
MD
965 struct thread *td = curthread;
966
26a0694b 967 crit_exit();
a2a5ad0d 968 KKASSERT(td->td_pri < TDPRI_CRIT);
8ad65e08 969 for (;;) {
a2a5ad0d
MD
970 /*
971 * See if there are any LWKTs ready to go.
972 */
8ad65e08 973 lwkt_switch();
a2a5ad0d
MD
974
975 /*
976 * If we are going to halt call splz unconditionally after
977 * CLIing to catch any interrupt races. Note that we are
978 * at SPL0 and interrupts are enabled.
979 */
980 if (cpu_idle_hlt && !lwkt_runnable() &&
981 (td->td_flags & TDF_IDLE_NOHLT) == 0) {
8ad65e08
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982 /*
983 * We must guarentee that hlt is exactly the instruction
984 * following the sti.
985 */
a2a5ad0d
MD
986 __asm __volatile("cli");
987 splz();
8ad65e08
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988 __asm __volatile("sti; hlt");
989 } else {
a2a5ad0d 990 td->td_flags &= ~TDF_IDLE_NOHLT;
8ad65e08
MD
991 __asm __volatile("sti");
992 }
984263bc
MD
993 }
994}
995
996/*
997 * Clear registers on exec
998 */
999void
1000setregs(p, entry, stack, ps_strings)
1001 struct proc *p;
1002 u_long entry;
1003 u_long stack;
1004 u_long ps_strings;
1005{
1006 struct trapframe *regs = p->p_md.md_regs;
b7c628e4 1007 struct pcb *pcb = p->p_thread->td_pcb;
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1008
1009 /* Reset pc->pcb_gs and %gs before possibly invalidating it. */
1010 pcb->pcb_gs = _udatasel;
1011 load_gs(_udatasel);
1012
1013#ifdef USER_LDT
1014 /* was i386_user_cleanup() in NetBSD */
1015 user_ldt_free(pcb);
1016#endif
1017
1018 bzero((char *)regs, sizeof(struct trapframe));
1019 regs->tf_eip = entry;
1020 regs->tf_esp = stack;
1021 regs->tf_eflags = PSL_USER | (regs->tf_eflags & PSL_T);
1022 regs->tf_ss = _udatasel;
1023 regs->tf_ds = _udatasel;
1024 regs->tf_es = _udatasel;
1025 regs->tf_fs = _udatasel;
1026 regs->tf_cs = _ucodesel;
1027
1028 /* PS_STRINGS value for BSD/OS binaries. It is 0 for non-BSD/OS. */
1029 regs->tf_ebx = ps_strings;
1030
1031 /*
1032 * Reset the hardware debug registers if they were in use.
1033 * They won't have any meaning for the newly exec'd process.
1034 */
1035 if (pcb->pcb_flags & PCB_DBREGS) {
1036 pcb->pcb_dr0 = 0;
1037 pcb->pcb_dr1 = 0;
1038 pcb->pcb_dr2 = 0;
1039 pcb->pcb_dr3 = 0;
1040 pcb->pcb_dr6 = 0;
1041 pcb->pcb_dr7 = 0;
b7c628e4 1042 if (pcb == curthread->td_pcb) {
984263bc
MD
1043 /*
1044 * Clear the debug registers on the running
1045 * CPU, otherwise they will end up affecting
1046 * the next process we switch to.
1047 */
1048 reset_dbregs();
1049 }
1050 pcb->pcb_flags &= ~PCB_DBREGS;
1051 }
1052
1053 /*
1054 * Initialize the math emulator (if any) for the current process.
1055 * Actually, just clear the bit that says that the emulator has
1056 * been initialized. Initialization is delayed until the process
1057 * traps to the emulator (if it is done at all) mainly because
1058 * emulators don't provide an entry point for initialization.
1059 */
b7c628e4 1060 p->p_thread->td_pcb->pcb_flags &= ~FP_SOFTFP;
984263bc
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1061
1062 /*
1063 * Arrange to trap the next npx or `fwait' instruction (see npx.c
1064 * for why fwait must be trapped at least if there is an npx or an
1065 * emulator). This is mainly to handle the case where npx0 is not
1066 * configured, since the npx routines normally set up the trap
1067 * otherwise. It should be done only at boot time, but doing it
1068 * here allows modifying `npx_exists' for testing the emulator on
1069 * systems with an npx.
1070 */
1071 load_cr0(rcr0() | CR0_MP | CR0_TS);
1072
1073#if NNPX > 0
1074 /* Initialize the npx (if any) for the current process. */
1075 npxinit(__INITIAL_NPXCW__);
1076#endif
1077
90b9818c
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1078 /*
1079 * note: linux emulator needs edx to be 0x0 on entry, which is
1080 * handled in execve simply by leaving the return value(s) 0.
1081 */
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1082}
1083
1084void
1085cpu_setregs(void)
1086{
1087 unsigned int cr0;
1088
1089 cr0 = rcr0();
1090 cr0 |= CR0_NE; /* Done by npxinit() */
1091 cr0 |= CR0_MP | CR0_TS; /* Done at every execve() too. */
1092#ifdef I386_CPU
1093 if (cpu_class != CPUCLASS_386)
1094#endif
1095 cr0 |= CR0_WP | CR0_AM;
1096 load_cr0(cr0);
1097 load_gs(_udatasel);
1098}
1099
1100static int
1101sysctl_machdep_adjkerntz(SYSCTL_HANDLER_ARGS)
1102{
1103 int error;
1104 error = sysctl_handle_int(oidp, oidp->oid_arg1, oidp->oid_arg2,
1105 req);
1106 if (!error && req->newptr)
1107 resettodr();
1108 return (error);
1109}
1110
1111SYSCTL_PROC(_machdep, CPU_ADJKERNTZ, adjkerntz, CTLTYPE_INT|CTLFLAG_RW,
1112 &adjkerntz, 0, sysctl_machdep_adjkerntz, "I", "");
1113
1114SYSCTL_INT(_machdep, CPU_DISRTCSET, disable_rtc_set,
1115 CTLFLAG_RW, &disable_rtc_set, 0, "");
1116
1117SYSCTL_STRUCT(_machdep, CPU_BOOTINFO, bootinfo,
1118 CTLFLAG_RD, &bootinfo, bootinfo, "");
1119
1120SYSCTL_INT(_machdep, CPU_WALLCLOCK, wall_cmos_clock,
1121 CTLFLAG_RW, &wall_cmos_clock, 0, "");
1122
1123extern u_long bootdev; /* not a dev_t - encoding is different */
1124SYSCTL_ULONG(_machdep, OID_AUTO, guessed_bootdev,
1125 CTLFLAG_RD, &bootdev, 0, "Boot device (not in dev_t format)");
1126
1127/*
1128 * Initialize 386 and configure to run kernel
1129 */
1130
1131/*
1132 * Initialize segments & interrupt table
1133 */
1134
1135int _default_ldt;
1136union descriptor gdt[NGDT * MAXCPU]; /* global descriptor table */
1137static struct gate_descriptor idt0[NIDT];
1138struct gate_descriptor *idt = &idt0[0]; /* interrupt descriptor table */
1139union descriptor ldt[NLDT]; /* local descriptor table */
17a9f566
MD
1140
1141/* table descriptors - used to load tables by cpu */
984263bc 1142struct region_descriptor r_gdt, r_idt;
984263bc 1143
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MD
1144#if defined(I586_CPU) && !defined(NO_F00F_HACK)
1145extern int has_f00f_bug;
1146#endif
1147
1148static struct i386tss dblfault_tss;
1149static char dblfault_stack[PAGE_SIZE];
1150
1151extern struct user *proc0paddr;
1152
1153
1154/* software prototypes -- in more palatable form */
1155struct soft_segment_descriptor gdt_segs[] = {
1156/* GNULL_SEL 0 Null Descriptor */
1157{ 0x0, /* segment base address */
1158 0x0, /* length */
1159 0, /* segment type */
1160 0, /* segment descriptor priority level */
1161 0, /* segment descriptor present */
1162 0, 0,
1163 0, /* default 32 vs 16 bit size */
1164 0 /* limit granularity (byte/page units)*/ },
1165/* GCODE_SEL 1 Code Descriptor for kernel */
1166{ 0x0, /* segment base address */
1167 0xfffff, /* length - all address space */
1168 SDT_MEMERA, /* segment type */
1169 0, /* segment descriptor priority level */
1170 1, /* segment descriptor present */
1171 0, 0,
1172 1, /* default 32 vs 16 bit size */
1173 1 /* limit granularity (byte/page units)*/ },
1174/* GDATA_SEL 2 Data Descriptor for kernel */
1175{ 0x0, /* segment base address */
1176 0xfffff, /* length - all address space */
1177 SDT_MEMRWA, /* segment type */
1178 0, /* segment descriptor priority level */
1179 1, /* segment descriptor present */
1180 0, 0,
1181 1, /* default 32 vs 16 bit size */
1182 1 /* limit granularity (byte/page units)*/ },
1183/* GPRIV_SEL 3 SMP Per-Processor Private Data Descriptor */
1184{ 0x0, /* segment base address */
1185 0xfffff, /* length - all address space */
1186 SDT_MEMRWA, /* segment type */
1187 0, /* segment descriptor priority level */
1188 1, /* segment descriptor present */
1189 0, 0,
1190 1, /* default 32 vs 16 bit size */
1191 1 /* limit granularity (byte/page units)*/ },
1192/* GPROC0_SEL 4 Proc 0 Tss Descriptor */
1193{
1194 0x0, /* segment base address */
1195 sizeof(struct i386tss)-1,/* length - all address space */
1196 SDT_SYS386TSS, /* segment type */
1197 0, /* segment descriptor priority level */
1198 1, /* segment descriptor present */
1199 0, 0,
1200 0, /* unused - default 32 vs 16 bit size */
1201 0 /* limit granularity (byte/page units)*/ },
1202/* GLDT_SEL 5 LDT Descriptor */
1203{ (int) ldt, /* segment base address */
1204 sizeof(ldt)-1, /* length - all address space */
1205 SDT_SYSLDT, /* segment type */
1206 SEL_UPL, /* segment descriptor priority level */
1207 1, /* segment descriptor present */
1208 0, 0,
1209 0, /* unused - default 32 vs 16 bit size */
1210 0 /* limit granularity (byte/page units)*/ },
1211/* GUSERLDT_SEL 6 User LDT Descriptor per process */
1212{ (int) ldt, /* segment base address */
1213 (512 * sizeof(union descriptor)-1), /* length */
1214 SDT_SYSLDT, /* segment type */
1215 0, /* segment descriptor priority level */
1216 1, /* segment descriptor present */
1217 0, 0,
1218 0, /* unused - default 32 vs 16 bit size */
1219 0 /* limit granularity (byte/page units)*/ },
1220/* GTGATE_SEL 7 Null Descriptor - Placeholder */
1221{ 0x0, /* segment base address */
1222 0x0, /* length - all address space */
1223 0, /* segment type */
1224 0, /* segment descriptor priority level */
1225 0, /* segment descriptor present */
1226 0, 0,
1227 0, /* default 32 vs 16 bit size */
1228 0 /* limit granularity (byte/page units)*/ },
1229/* GBIOSLOWMEM_SEL 8 BIOS access to realmode segment 0x40, must be #8 in GDT */
1230{ 0x400, /* segment base address */
1231 0xfffff, /* length */
1232 SDT_MEMRWA, /* segment type */
1233 0, /* segment descriptor priority level */
1234 1, /* segment descriptor present */
1235 0, 0,
1236 1, /* default 32 vs 16 bit size */
1237 1 /* limit granularity (byte/page units)*/ },
1238/* GPANIC_SEL 9 Panic Tss Descriptor */
1239{ (int) &dblfault_tss, /* segment base address */
1240 sizeof(struct i386tss)-1,/* length - all address space */
1241 SDT_SYS386TSS, /* segment type */
1242 0, /* segment descriptor priority level */
1243 1, /* segment descriptor present */
1244 0, 0,
1245 0, /* unused - default 32 vs 16 bit size */
1246 0 /* limit granularity (byte/page units)*/ },
1247/* GBIOSCODE32_SEL 10 BIOS 32-bit interface (32bit Code) */
1248{ 0, /* segment base address (overwritten) */
1249 0xfffff, /* length */
1250 SDT_MEMERA, /* segment type */
1251 0, /* segment descriptor priority level */
1252 1, /* segment descriptor present */
1253 0, 0,
1254 0, /* default 32 vs 16 bit size */
1255 1 /* limit granularity (byte/page units)*/ },
1256/* GBIOSCODE16_SEL 11 BIOS 32-bit interface (16bit Code) */
1257{ 0, /* segment base address (overwritten) */
1258 0xfffff, /* length */
1259 SDT_MEMERA, /* segment type */
1260 0, /* segment descriptor priority level */
1261 1, /* segment descriptor present */
1262 0, 0,
1263 0, /* default 32 vs 16 bit size */
1264 1 /* limit granularity (byte/page units)*/ },
1265/* GBIOSDATA_SEL 12 BIOS 32-bit interface (Data) */
1266{ 0, /* segment base address (overwritten) */
1267 0xfffff, /* length */
1268 SDT_MEMRWA, /* segment type */
1269 0, /* segment descriptor priority level */
1270 1, /* segment descriptor present */
1271 0, 0,
1272 1, /* default 32 vs 16 bit size */
1273 1 /* limit granularity (byte/page units)*/ },
1274/* GBIOSUTIL_SEL 13 BIOS 16-bit interface (Utility) */
1275{ 0, /* segment base address (overwritten) */
1276 0xfffff, /* length */
1277 SDT_MEMRWA, /* segment type */
1278 0, /* segment descriptor priority level */
1279 1, /* segment descriptor present */
1280 0, 0,
1281 0, /* default 32 vs 16 bit size */
1282 1 /* limit granularity (byte/page units)*/ },
1283/* GBIOSARGS_SEL 14 BIOS 16-bit interface (Arguments) */
1284{ 0, /* segment base address (overwritten) */
1285 0xfffff, /* length */
1286 SDT_MEMRWA, /* segment type */
1287 0, /* segment descriptor priority level */
1288 1, /* segment descriptor present */
1289 0, 0,
1290 0, /* default 32 vs 16 bit size */
1291 1 /* limit granularity (byte/page units)*/ },
1292};
1293
1294static struct soft_segment_descriptor ldt_segs[] = {
1295 /* Null Descriptor - overwritten by call gate */
1296{ 0x0, /* segment base address */
1297 0x0, /* length - all address space */
1298 0, /* segment type */
1299 0, /* segment descriptor priority level */
1300 0, /* segment descriptor present */
1301 0, 0,
1302 0, /* default 32 vs 16 bit size */
1303 0 /* limit granularity (byte/page units)*/ },
1304 /* Null Descriptor - overwritten by call gate */
1305{ 0x0, /* segment base address */
1306 0x0, /* length - all address space */
1307 0, /* segment type */
1308 0, /* segment descriptor priority level */
1309 0, /* segment descriptor present */
1310 0, 0,
1311 0, /* default 32 vs 16 bit size */
1312 0 /* limit granularity (byte/page units)*/ },
1313 /* Null Descriptor - overwritten by call gate */
1314{ 0x0, /* segment base address */
1315 0x0, /* length - all address space */
1316 0, /* segment type */
1317 0, /* segment descriptor priority level */
1318 0, /* segment descriptor present */
1319 0, 0,
1320 0, /* default 32 vs 16 bit size */
1321 0 /* limit granularity (byte/page units)*/ },
1322 /* Code Descriptor for user */
1323{ 0x0, /* segment base address */
1324 0xfffff, /* length - all address space */
1325 SDT_MEMERA, /* segment type */
1326 SEL_UPL, /* segment descriptor priority level */
1327 1, /* segment descriptor present */
1328 0, 0,
1329 1, /* default 32 vs 16 bit size */
1330 1 /* limit granularity (byte/page units)*/ },
1331 /* Null Descriptor - overwritten by call gate */
1332{ 0x0, /* segment base address */
1333 0x0, /* length - all address space */
1334 0, /* segment type */
1335 0, /* segment descriptor priority level */
1336 0, /* segment descriptor present */
1337 0, 0,
1338 0, /* default 32 vs 16 bit size */
1339 0 /* limit granularity (byte/page units)*/ },
1340 /* Data Descriptor for user */
1341{ 0x0, /* segment base address */
1342 0xfffff, /* length - all address space */
1343 SDT_MEMRWA, /* segment type */
1344 SEL_UPL, /* segment descriptor priority level */
1345 1, /* segment descriptor present */
1346 0, 0,
1347 1, /* default 32 vs 16 bit size */
1348 1 /* limit granularity (byte/page units)*/ },
1349};
1350
1351void
1352setidt(idx, func, typ, dpl, selec)
1353 int idx;
1354 inthand_t *func;
1355 int typ;
1356 int dpl;
1357 int selec;
1358{
1359 struct gate_descriptor *ip;
1360
1361 ip = idt + idx;
1362 ip->gd_looffset = (int)func;
1363 ip->gd_selector = selec;
1364 ip->gd_stkcpy = 0;
1365 ip->gd_xx = 0;
1366 ip->gd_type = typ;
1367 ip->gd_dpl = dpl;
1368 ip->gd_p = 1;
1369 ip->gd_hioffset = ((int)func)>>16 ;
1370}
1371
1372#define IDTVEC(name) __CONCAT(X,name)
1373
1374extern inthand_t
1375 IDTVEC(div), IDTVEC(dbg), IDTVEC(nmi), IDTVEC(bpt), IDTVEC(ofl),
1376 IDTVEC(bnd), IDTVEC(ill), IDTVEC(dna), IDTVEC(fpusegm),
1377 IDTVEC(tss), IDTVEC(missing), IDTVEC(stk), IDTVEC(prot),
1378 IDTVEC(page), IDTVEC(mchk), IDTVEC(rsvd), IDTVEC(fpu), IDTVEC(align),
a64ba182
MD
1379 IDTVEC(xmm), IDTVEC(syscall);
1380extern inthand_t
1381 IDTVEC(int0x80_syscall), IDTVEC(int0x81_syscall);
984263bc
MD
1382
1383void
1384sdtossd(sd, ssd)
1385 struct segment_descriptor *sd;
1386 struct soft_segment_descriptor *ssd;
1387{
1388 ssd->ssd_base = (sd->sd_hibase << 24) | sd->sd_lobase;
1389 ssd->ssd_limit = (sd->sd_hilimit << 16) | sd->sd_lolimit;
1390 ssd->ssd_type = sd->sd_type;
1391 ssd->ssd_dpl = sd->sd_dpl;
1392 ssd->ssd_p = sd->sd_p;
1393 ssd->ssd_def32 = sd->sd_def32;
1394 ssd->ssd_gran = sd->sd_gran;
1395}
1396
1397#define PHYSMAP_SIZE (2 * 8)
1398
1399/*
1400 * Populate the (physmap) array with base/bound pairs describing the
1401 * available physical memory in the system, then test this memory and
1402 * build the phys_avail array describing the actually-available memory.
1403 *
1404 * If we cannot accurately determine the physical memory map, then use
1405 * value from the 0xE801 call, and failing that, the RTC.
1406 *
1407 * Total memory size may be set by the kernel environment variable
1408 * hw.physmem or the compile-time define MAXMEM.
1409 */
1410static void
1411getmemsize(int first)
1412{
1413 int i, physmap_idx, pa_indx;
1414 int hasbrokenint12;
1415 u_int basemem, extmem;
1416 struct vm86frame vmf;
1417 struct vm86context vmc;
1418 vm_offset_t pa, physmap[PHYSMAP_SIZE];
1419 pt_entry_t pte;
1420 const char *cp;
1421 struct {
1422 u_int64_t base;
1423 u_int64_t length;
1424 u_int32_t type;
1425 } *smap;
1426
1427 hasbrokenint12 = 0;
1428 TUNABLE_INT_FETCH("hw.hasbrokenint12", &hasbrokenint12);
1429 bzero(&vmf, sizeof(struct vm86frame));
1430 bzero(physmap, sizeof(physmap));
1431 basemem = 0;
1432
1433 /*
1434 * Some newer BIOSes has broken INT 12H implementation which cause
1435 * kernel panic immediately. In this case, we need to scan SMAP
1436 * with INT 15:E820 first, then determine base memory size.
1437 */
1438 if (hasbrokenint12) {
1439 goto int15e820;
1440 }
1441
1442 /*
1443 * Perform "base memory" related probes & setup
1444 */
1445 vm86_intcall(0x12, &vmf);
1446 basemem = vmf.vmf_ax;
1447 if (basemem > 640) {
1448 printf("Preposterous BIOS basemem of %uK, truncating to 640K\n",
1449 basemem);
1450 basemem = 640;
1451 }
1452
1453 /*
1454 * XXX if biosbasemem is now < 640, there is a `hole'
1455 * between the end of base memory and the start of
1456 * ISA memory. The hole may be empty or it may
1457 * contain BIOS code or data. Map it read/write so
1458 * that the BIOS can write to it. (Memory from 0 to
1459 * the physical end of the kernel is mapped read-only
1460 * to begin with and then parts of it are remapped.
1461 * The parts that aren't remapped form holes that
1462 * remain read-only and are unused by the kernel.
1463 * The base memory area is below the physical end of
1464 * the kernel and right now forms a read-only hole.
1465 * The part of it from PAGE_SIZE to
1466 * (trunc_page(biosbasemem * 1024) - 1) will be
1467 * remapped and used by the kernel later.)
1468 *
1469 * This code is similar to the code used in
1470 * pmap_mapdev, but since no memory needs to be
1471 * allocated we simply change the mapping.
1472 */
1473 for (pa = trunc_page(basemem * 1024);
1474 pa < ISA_HOLE_START; pa += PAGE_SIZE) {
1475 pte = (pt_entry_t)vtopte(pa + KERNBASE);
1476 *pte = pa | PG_RW | PG_V;
1477 }
1478
1479 /*
1480 * if basemem != 640, map pages r/w into vm86 page table so
1481 * that the bios can scribble on it.
1482 */
1483 pte = (pt_entry_t)vm86paddr;
1484 for (i = basemem / 4; i < 160; i++)
1485 pte[i] = (i << PAGE_SHIFT) | PG_V | PG_RW | PG_U;
1486
1487int15e820:
1488 /*
1489 * map page 1 R/W into the kernel page table so we can use it
1490 * as a buffer. The kernel will unmap this page later.
1491 */
1492 pte = (pt_entry_t)vtopte(KERNBASE + (1 << PAGE_SHIFT));
1493 *pte = (1 << PAGE_SHIFT) | PG_RW | PG_V;
1494
1495 /*
1496 * get memory map with INT 15:E820
1497 */
1498#define SMAPSIZ sizeof(*smap)
1499#define SMAP_SIG 0x534D4150 /* 'SMAP' */
1500
1501 vmc.npages = 0;
1502 smap = (void *)vm86_addpage(&vmc, 1, KERNBASE + (1 << PAGE_SHIFT));
1503 vm86_getptr(&vmc, (vm_offset_t)smap, &vmf.vmf_es, &vmf.vmf_di);
1504
1505 physmap_idx = 0;
1506 vmf.vmf_ebx = 0;
1507 do {
1508 vmf.vmf_eax = 0xE820;
1509 vmf.vmf_edx = SMAP_SIG;
1510 vmf.vmf_ecx = SMAPSIZ;
1511 i = vm86_datacall(0x15, &vmf, &vmc);
1512 if (i || vmf.vmf_eax != SMAP_SIG)
1513 break;
1514 if (boothowto & RB_VERBOSE)
1515 printf("SMAP type=%02x base=%08x %08x len=%08x %08x\n",
1516 smap->type,
1517 *(u_int32_t *)((char *)&smap->base + 4),
1518 (u_int32_t)smap->base,
1519 *(u_int32_t *)((char *)&smap->length + 4),
1520 (u_int32_t)smap->length);
1521
1522 if (smap->type != 0x01)
1523 goto next_run;
1524
1525 if (smap->length == 0)
1526 goto next_run;
1527
1528 if (smap->base >= 0xffffffff) {
1529 printf("%uK of memory above 4GB ignored\n",
1530 (u_int)(smap->length / 1024));
1531 goto next_run;
1532 }
1533
1534 for (i = 0; i <= physmap_idx; i += 2) {
1535 if (smap->base < physmap[i + 1]) {
1536 if (boothowto & RB_VERBOSE)
1537 printf(
1538 "Overlapping or non-montonic memory region, ignoring second region\n");
1539 goto next_run;
1540 }
1541 }
1542
1543 if (smap->base == physmap[physmap_idx + 1]) {
1544 physmap[physmap_idx + 1] += smap->length;
1545 goto next_run;
1546 }
1547
1548 physmap_idx += 2;
1549 if (physmap_idx == PHYSMAP_SIZE) {
1550 printf(
1551 "Too many segments in the physical address map, giving up\n");
1552 break;
1553 }
1554 physmap[physmap_idx] = smap->base;
1555 physmap[physmap_idx + 1] = smap->base + smap->length;
1556next_run:
1557 } while (vmf.vmf_ebx != 0);
1558
1559 /*
1560 * Perform "base memory" related probes & setup based on SMAP
1561 */
1562 if (basemem == 0) {
1563 for (i = 0; i <= physmap_idx; i += 2) {
1564 if (physmap[i] == 0x00000000) {
1565 basemem = physmap[i + 1] / 1024;
1566 break;
1567 }
1568 }
1569
1570 if (basemem == 0) {
1571 basemem = 640;
1572 }
1573
1574 if (basemem > 640) {
1575 printf("Preposterous BIOS basemem of %uK, truncating to 640K\n",
1576 basemem);
1577 basemem = 640;
1578 }
1579
1580 for (pa = trunc_page(basemem * 1024);
1581 pa < ISA_HOLE_START; pa += PAGE_SIZE) {
1582 pte = (pt_entry_t)vtopte(pa + KERNBASE);
1583 *pte = pa | PG_RW | PG_V;
1584 }
1585
1586 pte = (pt_entry_t)vm86paddr;
1587 for (i = basemem / 4; i < 160; i++)
1588 pte[i] = (i << PAGE_SHIFT) | PG_V | PG_RW | PG_U;
1589 }
1590
1591 if (physmap[1] != 0)
1592 goto physmap_done;
1593
1594 /*
1595 * If we failed above, try memory map with INT 15:E801
1596 */
1597 vmf.vmf_ax = 0xE801;
1598 if (vm86_intcall(0x15, &vmf) == 0) {
1599 extmem = vmf.vmf_cx + vmf.vmf_dx * 64;
1600 } else {
1601#if 0
1602 vmf.vmf_ah = 0x88;
1603 vm86_intcall(0x15, &vmf);
1604 extmem = vmf.vmf_ax;
1605#else
1606 /*
1607 * Prefer the RTC value for extended memory.
1608 */
1609 extmem = rtcin(RTC_EXTLO) + (rtcin(RTC_EXTHI) << 8);
1610#endif
1611 }
1612
1613 /*
1614 * Special hack for chipsets that still remap the 384k hole when
1615 * there's 16MB of memory - this really confuses people that
1616 * are trying to use bus mastering ISA controllers with the
1617 * "16MB limit"; they only have 16MB, but the remapping puts
1618 * them beyond the limit.
1619 *
1620 * If extended memory is between 15-16MB (16-17MB phys address range),
1621 * chop it to 15MB.
1622 */
1623 if ((extmem > 15 * 1024) && (extmem < 16 * 1024))
1624 extmem = 15 * 1024;
1625
1626 physmap[0] = 0;
1627 physmap[1] = basemem * 1024;
1628 physmap_idx = 2;
1629 physmap[physmap_idx] = 0x100000;
1630 physmap[physmap_idx + 1] = physmap[physmap_idx] + extmem * 1024;
1631
1632physmap_done:
1633 /*
1634 * Now, physmap contains a map of physical memory.
1635 */
1636
1637#ifdef SMP
17a9f566 1638 /* make hole for AP bootstrap code YYY */
984263bc
MD
1639 physmap[1] = mp_bootaddress(physmap[1] / 1024);
1640
1641 /* look for the MP hardware - needed for apic addresses */
1642 mp_probe();
1643#endif
1644
1645 /*
1646 * Maxmem isn't the "maximum memory", it's one larger than the
1647 * highest page of the physical address space. It should be
1648 * called something like "Maxphyspage". We may adjust this
1649 * based on ``hw.physmem'' and the results of the memory test.
1650 */
1651 Maxmem = atop(physmap[physmap_idx + 1]);
1652
1653#ifdef MAXMEM
1654 Maxmem = MAXMEM / 4;
1655#endif
1656
1657 /*
1658 * hw.maxmem is a size in bytes; we also allow k, m, and g suffixes
1659 * for the appropriate modifiers. This overrides MAXMEM.
1660 */
1661 if ((cp = getenv("hw.physmem")) != NULL) {
1662 u_int64_t AllowMem, sanity;
1663 char *ep;
1664
1665 sanity = AllowMem = strtouq(cp, &ep, 0);
1666 if ((ep != cp) && (*ep != 0)) {
1667 switch(*ep) {
1668 case 'g':
1669 case 'G':
1670 AllowMem <<= 10;
1671 case 'm':
1672 case 'M':
1673 AllowMem <<= 10;
1674 case 'k':
1675 case 'K':
1676 AllowMem <<= 10;
1677 break;
1678 default:
1679 AllowMem = sanity = 0;
1680 }
1681 if (AllowMem < sanity)
1682 AllowMem = 0;
1683 }
1684 if (AllowMem == 0)
1685 printf("Ignoring invalid memory size of '%s'\n", cp);
1686 else
1687 Maxmem = atop(AllowMem);
1688 }
1689
1690 if (atop(physmap[physmap_idx + 1]) != Maxmem &&
1691 (boothowto & RB_VERBOSE))
1692 printf("Physical memory use set to %uK\n", Maxmem * 4);
1693
1694 /*
1695 * If Maxmem has been increased beyond what the system has detected,
1696 * extend the last memory segment to the new limit.
1697 */
1698 if (atop(physmap[physmap_idx + 1]) < Maxmem)
1699 physmap[physmap_idx + 1] = ptoa(Maxmem);
1700
1701 /* call pmap initialization to make new kernel address space */
1702 pmap_bootstrap(first, 0);
1703
1704 /*
1705 * Size up each available chunk of physical memory.
1706 */
1707 physmap[0] = PAGE_SIZE; /* mask off page 0 */
1708 pa_indx = 0;
1709 phys_avail[pa_indx++] = physmap[0];
1710 phys_avail[pa_indx] = physmap[0];
1711#if 0
1712 pte = (pt_entry_t)vtopte(KERNBASE);
1713#else
1714 pte = (pt_entry_t)CMAP1;
1715#endif
1716
1717 /*
1718 * physmap is in bytes, so when converting to page boundaries,
1719 * round up the start address and round down the end address.
1720 */
1721 for (i = 0; i <= physmap_idx; i += 2) {
1722 vm_offset_t end;
1723
1724 end = ptoa(Maxmem);
1725 if (physmap[i + 1] < end)
1726 end = trunc_page(physmap[i + 1]);
1727 for (pa = round_page(physmap[i]); pa < end; pa += PAGE_SIZE) {
1728 int tmp, page_bad;
1729#if 0
1730 int *ptr = 0;
1731#else
1732 int *ptr = (int *)CADDR1;
1733#endif
1734
1735 /*
1736 * block out kernel memory as not available.
1737 */
1738 if (pa >= 0x100000 && pa < first)
1739 continue;
1740
1741 page_bad = FALSE;
1742
1743 /*
1744 * map page into kernel: valid, read/write,non-cacheable
1745 */
1746 *pte = pa | PG_V | PG_RW | PG_N;
1747 invltlb();
1748
1749 tmp = *(int *)ptr;
1750 /*
1751 * Test for alternating 1's and 0's
1752 */
1753 *(volatile int *)ptr = 0xaaaaaaaa;
1754 if (*(volatile int *)ptr != 0xaaaaaaaa) {
1755 page_bad = TRUE;
1756 }
1757 /*
1758 * Test for alternating 0's and 1's
1759 */
1760 *(volatile int *)ptr = 0x55555555;
1761 if (*(volatile int *)ptr != 0x55555555) {
1762 page_bad = TRUE;
1763 }
1764 /*
1765 * Test for all 1's
1766 */
1767 *(volatile int *)ptr = 0xffffffff;
1768 if (*(volatile int *)ptr != 0xffffffff) {
1769 page_bad = TRUE;
1770 }
1771 /*
1772 * Test for all 0's
1773 */
1774 *(volatile int *)ptr = 0x0;
1775 if (*(volatile int *)ptr != 0x0) {
1776 page_bad = TRUE;
1777 }
1778 /*
1779 * Restore original value.
1780 */
1781 *(int *)ptr = tmp;
1782
1783 /*
1784 * Adjust array of valid/good pages.
1785 */
1786 if (page_bad == TRUE) {
1787 continue;
1788 }
1789 /*
1790 * If this good page is a continuation of the
1791 * previous set of good pages, then just increase
1792 * the end pointer. Otherwise start a new chunk.
1793 * Note that "end" points one higher than end,
1794 * making the range >= start and < end.
1795 * If we're also doing a speculative memory
1796 * test and we at or past the end, bump up Maxmem
1797 * so that we keep going. The first bad page
1798 * will terminate the loop.
1799 */
1800 if (phys_avail[pa_indx] == pa) {
1801 phys_avail[pa_indx] += PAGE_SIZE;
1802 } else {
1803 pa_indx++;
1804 if (pa_indx == PHYS_AVAIL_ARRAY_END) {
1805 printf("Too many holes in the physical address space, giving up\n");
1806 pa_indx--;
1807 break;
1808 }
1809 phys_avail[pa_indx++] = pa; /* start */
1810 phys_avail[pa_indx] = pa + PAGE_SIZE; /* end */
1811 }
1812 physmem++;
1813 }
1814 }
1815 *pte = 0;
1816 invltlb();
1817
1818 /*
1819 * XXX
1820 * The last chunk must contain at least one page plus the message
1821 * buffer to avoid complicating other code (message buffer address
1822 * calculation, etc.).
1823 */
1824 while (phys_avail[pa_indx - 1] + PAGE_SIZE +
1825 round_page(MSGBUF_SIZE) >= phys_avail[pa_indx]) {
1826 physmem -= atop(phys_avail[pa_indx] - phys_avail[pa_indx - 1]);
1827 phys_avail[pa_indx--] = 0;
1828 phys_avail[pa_indx--] = 0;
1829 }
1830
1831 Maxmem = atop(phys_avail[pa_indx]);
1832
1833 /* Trim off space for the message buffer. */
1834 phys_avail[pa_indx] -= round_page(MSGBUF_SIZE);
1835
1836 avail_end = phys_avail[pa_indx];
1837}
1838
1839void
17a9f566 1840init386(int first)
984263bc
MD
1841{
1842 struct gate_descriptor *gdp;
1843 int gsel_tss, metadata_missing, off, x;
85100692 1844 struct mdglobaldata *gd;
984263bc
MD
1845
1846 /*
1847 * Prevent lowering of the ipl if we call tsleep() early.
1848 */
85100692 1849 gd = &CPU_prvspace[0].mdglobaldata;
8a8d5d85 1850 bzero(gd, sizeof(*gd));
984263bc 1851
85100692 1852 gd->mi.gd_curthread = &thread0;
984263bc
MD
1853
1854 atdevbase = ISA_HOLE_START + KERNBASE;
1855
1856 metadata_missing = 0;
1857 if (bootinfo.bi_modulep) {
1858 preload_metadata = (caddr_t)bootinfo.bi_modulep + KERNBASE;
1859 preload_bootstrap_relocate(KERNBASE);
1860 } else {
1861 metadata_missing = 1;
1862 }
1863 if (bootinfo.bi_envp)
1864 kern_envp = (caddr_t)bootinfo.bi_envp + KERNBASE;
1865
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1866 /* start with one cpu */
1867 ncpus = 1;
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1868 /* Init basic tunables, hz etc */
1869 init_param1();
1870
1871 /*
1872 * make gdt memory segments, the code segment goes up to end of the
1873 * page with etext in it, the data segment goes to the end of
1874 * the address space
1875 */
1876 /*
1877 * XXX text protection is temporarily (?) disabled. The limit was
1878 * i386_btop(round_page(etext)) - 1.
1879 */
1880 gdt_segs[GCODE_SEL].ssd_limit = atop(0 - 1);
1881 gdt_segs[GDATA_SEL].ssd_limit = atop(0 - 1);
17a9f566 1882
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1883 gdt_segs[GPRIV_SEL].ssd_limit =
1884 atop(sizeof(struct privatespace) - 1);
8ad65e08 1885 gdt_segs[GPRIV_SEL].ssd_base = (int) &CPU_prvspace[0];
984263bc 1886 gdt_segs[GPROC0_SEL].ssd_base =
85100692 1887 (int) &CPU_prvspace[0].mdglobaldata.gd_common_tss;
17a9f566 1888
85100692 1889 gd->mi.gd_prvspace = &CPU_prvspace[0];
17a9f566 1890
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1891 /*
1892 * Note: on both UP and SMP curthread must be set non-NULL
1893 * early in the boot sequence because the system assumes
1894 * that 'curthread' is never NULL.
1895 */
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1896
1897 for (x = 0; x < NGDT; x++) {
1898#ifdef BDE_DEBUGGER
1899 /* avoid overwriting db entries with APM ones */
1900 if (x >= GAPMCODE32_SEL && x <= GAPMDATA_SEL)
1901 continue;
1902#endif
1903 ssdtosd(&gdt_segs[x], &gdt[x].sd);
1904 }
1905
1906 r_gdt.rd_limit = NGDT * sizeof(gdt[0]) - 1;
1907 r_gdt.rd_base = (int) gdt;
1908 lgdt(&r_gdt);
1909
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1910 mi_gdinit(&gd->mi, 0);
1911 cpu_gdinit(gd, 0);
1912 lwkt_init_thread(&thread0, proc0paddr, 0, &gd->mi);
1913 lwkt_set_comm(&thread0, "thread0");
1914 proc0.p_addr = (void *)thread0.td_kstack;
1915 proc0.p_thread = &thread0;
a2a5ad0d 1916 proc0.p_flag |= P_CP_RELEASED; /* early set. See also init_main.c */
d9eea1a5 1917 thread0.td_flags |= TDF_RUNNING;
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1918 thread0.td_proc = &proc0;
1919 thread0.td_switch = cpu_heavy_switch; /* YYY eventually LWKT */
1920 safepri = thread0.td_cpl = SWI_MASK | HWI_MASK;
1921
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1922 /* make ldt memory segments */
1923 /*
1924 * XXX - VM_MAXUSER_ADDRESS is an end address, not a max. And it
1925 * should be spelled ...MAX_USER...
1926 */
1927 ldt_segs[LUCODE_SEL].ssd_limit = atop(VM_MAXUSER_ADDRESS - 1);
1928 ldt_segs[LUDATA_SEL].ssd_limit = atop(VM_MAXUSER_ADDRESS - 1);
1929 for (x = 0; x < sizeof ldt_segs / sizeof ldt_segs[0]; x++)
1930 ssdtosd(&ldt_segs[x], &ldt[x].sd);
1931
1932 _default_ldt = GSEL(GLDT_SEL, SEL_KPL);
1933 lldt(_default_ldt);
1934#ifdef USER_LDT
17a9f566 1935 gd->gd_currentldt = _default_ldt;
984263bc 1936#endif
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MD
1937 /* spinlocks and the BGL */
1938 init_locks();
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1939
1940 /* exceptions */
1941 for (x = 0; x < NIDT; x++)
1942 setidt(x, &IDTVEC(rsvd), SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL));
1943 setidt(0, &IDTVEC(div), SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL));
1944 setidt(1, &IDTVEC(dbg), SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL));
1945 setidt(2, &IDTVEC(nmi), SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL));
1946 setidt(3, &IDTVEC(bpt), SDT_SYS386TGT, SEL_UPL, GSEL(GCODE_SEL, SEL_KPL));
1947 setidt(4, &IDTVEC(ofl), SDT_SYS386TGT, SEL_UPL, GSEL(GCODE_SEL, SEL_KPL));
1948 setidt(5, &IDTVEC(bnd), SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL));
1949 setidt(6, &IDTVEC(ill), SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL));
1950 setidt(7, &IDTVEC(dna), SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL));
1951 setidt(8, 0, SDT_SYSTASKGT, SEL_KPL, GSEL(GPANIC_SEL, SEL_KPL));
1952 setidt(9, &IDTVEC(fpusegm), SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL));
1953 setidt(10, &IDTVEC(tss), SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL));
1954 setidt(11, &IDTVEC(missing), SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL));
1955 setidt(12, &IDTVEC(stk), SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL));
1956 setidt(13, &IDTVEC(prot), SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL));
1957 setidt(14, &IDTVEC(page), SDT_SYS386IGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL));
1958 setidt(15, &IDTVEC(rsvd), SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL));
1959 setidt(16, &IDTVEC(fpu), SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL));
1960 setidt(17, &IDTVEC(align), SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL));
1961 setidt(18, &IDTVEC(mchk), SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL));
1962 setidt(19, &IDTVEC(xmm), SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL));
1963 setidt(0x80, &IDTVEC(int0x80_syscall),
1964 SDT_SYS386TGT, SEL_UPL, GSEL(GCODE_SEL, SEL_KPL));
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1965 setidt(0x81, &IDTVEC(int0x81_syscall),
1966 SDT_SYS386TGT, SEL_UPL, GSEL(GCODE_SEL, SEL_KPL));
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1967
1968 r_idt.rd_limit = sizeof(idt0) - 1;
1969 r_idt.rd_base = (int) idt;
1970 lidt(&r_idt);
1971
1972 /*
1973 * Initialize the console before we print anything out.
1974 */
1975 cninit();
1976
1977 if (metadata_missing)
1978 printf("WARNING: loader(8) metadata is missing!\n");
1979
1980#include "isa.h"
1981#if NISA >0
1982 isa_defaultirq();
1983#endif
1984 rand_initialize();
1985
1986#ifdef DDB
1987 kdb_init();
1988 if (boothowto & RB_KDB)
1989 Debugger("Boot flags requested debugger");
1990#endif
1991
1992 finishidentcpu(); /* Final stage of CPU initialization */
1993 setidt(6, &IDTVEC(ill), SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL));
1994 setidt(13, &IDTVEC(prot), SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL));
1995 initializecpu(); /* Initialize CPU registers */
1996
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1997 /*
1998 * make an initial tss so cpu can get interrupt stack on syscall!
1999 * The 16 bytes is to save room for a VM86 context.
2000 */
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MD
2001 gd->gd_common_tss.tss_esp0 = (int) thread0.td_pcb - 16;
2002 gd->gd_common_tss.tss_ss0 = GSEL(GDATA_SEL, SEL_KPL) ;
984263bc 2003 gsel_tss = GSEL(GPROC0_SEL, SEL_KPL);
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MD
2004 gd->gd_tss_gdt = &gdt[GPROC0_SEL].sd;
2005 gd->gd_common_tssd = *gd->gd_tss_gdt;
85100692 2006 gd->gd_common_tss.tss_ioopt = (sizeof gd->gd_common_tss) << 16;
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MD
2007 ltr(gsel_tss);
2008
2009 dblfault_tss.tss_esp = dblfault_tss.tss_esp0 = dblfault_tss.tss_esp1 =
2010 dblfault_tss.tss_esp2 = (int) &dblfault_stack[sizeof(dblfault_stack)];
2011 dblfault_tss.tss_ss = dblfault_tss.tss_ss0 = dblfault_tss.tss_ss1 =
2012 dblfault_tss.tss_ss2 = GSEL(GDATA_SEL, SEL_KPL);
2013 dblfault_tss.tss_cr3 = (int)IdlePTD;
2014 dblfault_tss.tss_eip = (int) dblfault_handler;
2015 dblfault_tss.tss_eflags = PSL_KERNEL;
2016 dblfault_tss.tss_ds = dblfault_tss.tss_es =
2017 dblfault_tss.tss_gs = GSEL(GDATA_SEL, SEL_KPL);
2018 dblfault_tss.tss_fs = GSEL(GPRIV_SEL, SEL_KPL);
2019 dblfault_tss.tss_cs = GSEL(GCODE_SEL, SEL_KPL);
2020 dblfault_tss.tss_ldt = GSEL(GLDT_SEL, SEL_KPL);
2021
2022 vm86_initialize();
2023 getmemsize(first);
2024 init_param2(physmem);
2025
2026 /* now running on new page tables, configured,and u/iom is accessible */
2027
2028 /* Map the message buffer. */
2029 for (off = 0; off < round_page(MSGBUF_SIZE); off += PAGE_SIZE)
2030 pmap_kenter((vm_offset_t)msgbufp + off, avail_end + off);
2031
2032 msgbufinit(msgbufp, MSGBUF_SIZE);
2033
2034 /* make a call gate to reenter kernel with */
2035 gdp = &ldt[LSYS5CALLS_SEL].gd;
2036
2037 x = (int) &IDTVEC(syscall);
2038 gdp->gd_looffset = x++;
2039 gdp->gd_selector = GSEL(GCODE_SEL,SEL_KPL);
2040 gdp->gd_stkcpy = 1;
2041 gdp->gd_type = SDT_SYS386CGT;
2042 gdp->gd_dpl = SEL_UPL;
2043 gdp->gd_p = 1;
2044 gdp->gd_hioffset = ((int) &IDTVEC(syscall)) >>16;
2045
2046 /* XXX does this work? */
2047 ldt[LBSDICALLS_SEL] = ldt[LSYS5CALLS_SEL];
2048 ldt[LSOL26CALLS_SEL] = ldt[LSYS5CALLS_SEL];
2049
2050 /* transfer to user mode */
2051
2052 _ucodesel = LSEL(LUCODE_SEL, SEL_UPL);
2053 _udatasel = LSEL(LUDATA_SEL, SEL_UPL);
2054
2055 /* setup proc 0's pcb */
b7c628e4
MD
2056 thread0.td_pcb->pcb_flags = 0;
2057 thread0.td_pcb->pcb_cr3 = (int)IdlePTD; /* should already be setup */
b7c628e4 2058 thread0.td_pcb->pcb_ext = 0;
984263bc
MD
2059 proc0.p_md.md_regs = &proc0_tf;
2060}
2061
8ad65e08 2062/*
17a9f566
MD
2063 * Initialize machine-dependant portions of the global data structure.
2064 * Note that the global data area and cpu0's idlestack in the private
2065 * data space were allocated in locore.
ef0fdad1
MD
2066 *
2067 * Note: the idlethread's cpl is 0
73e4f7b9
MD
2068 *
2069 * WARNING! Called from early boot, 'mycpu' may not work yet.
8ad65e08
MD
2070 */
2071void
85100692 2072cpu_gdinit(struct mdglobaldata *gd, int cpu)
8ad65e08
MD
2073{
2074 char *sp;
8ad65e08 2075
7d0bac62 2076 if (cpu)
a2a5ad0d 2077 gd->mi.gd_curthread = &gd->mi.gd_idlethread;
17a9f566 2078
85100692 2079 sp = gd->mi.gd_prvspace->idlestack;
a2a5ad0d
MD
2080 lwkt_init_thread(&gd->mi.gd_idlethread, sp, 0, &gd->mi);
2081 lwkt_set_comm(&gd->mi.gd_idlethread, "idle_%d", cpu);
2082 gd->mi.gd_idlethread.td_switch = cpu_lwkt_switch;
2083 gd->mi.gd_idlethread.td_sp -= sizeof(void *);
2084 *(void **)gd->mi.gd_idlethread.td_sp = cpu_idle_restore;
8ad65e08
MD
2085}
2086
12e4aaff
MD
2087struct globaldata *
2088globaldata_find(int cpu)
2089{
2090 KKASSERT(cpu >= 0 && cpu < ncpus);
2091 return(&CPU_prvspace[cpu].mdglobaldata.mi);
2092}
2093
984263bc
MD
2094#if defined(I586_CPU) && !defined(NO_F00F_HACK)
2095static void f00f_hack(void *unused);
2096SYSINIT(f00f_hack, SI_SUB_INTRINSIC, SI_ORDER_FIRST, f00f_hack, NULL);
2097
2098static void
17a9f566
MD
2099f00f_hack(void *unused)
2100{
984263bc 2101 struct gate_descriptor *new_idt;
984263bc
MD
2102 vm_offset_t tmp;
2103
2104 if (!has_f00f_bug)
2105 return;
2106
2107 printf("Intel Pentium detected, installing workaround for F00F bug\n");
2108
2109 r_idt.rd_limit = sizeof(idt0) - 1;
2110
2111 tmp = kmem_alloc(kernel_map, PAGE_SIZE * 2);
2112 if (tmp == 0)
2113 panic("kmem_alloc returned 0");
2114 if (((unsigned int)tmp & (PAGE_SIZE-1)) != 0)
2115 panic("kmem_alloc returned non-page-aligned memory");
2116 /* Put the first seven entries in the lower page */
2117 new_idt = (struct gate_descriptor*)(tmp + PAGE_SIZE - (7*8));
2118 bcopy(idt, new_idt, sizeof(idt0));
2119 r_idt.rd_base = (int)new_idt;
2120 lidt(&r_idt);
2121 idt = new_idt;
2122 if (vm_map_protect(kernel_map, tmp, tmp + PAGE_SIZE,
2123 VM_PROT_READ, FALSE) != KERN_SUCCESS)
2124 panic("vm_map_protect failed");
2125 return;
2126}
2127#endif /* defined(I586_CPU) && !NO_F00F_HACK */
2128
2129int
2130ptrace_set_pc(p, addr)
2131 struct proc *p;
2132 unsigned long addr;
2133{
2134 p->p_md.md_regs->tf_eip = addr;
2135 return (0);
2136}
2137
2138int
2139ptrace_single_step(p)
2140 struct proc *p;
2141{
2142 p->p_md.md_regs->tf_eflags |= PSL_T;
2143 return (0);
2144}
2145
2146int ptrace_read_u_check(p, addr, len)
2147 struct proc *p;
2148 vm_offset_t addr;
2149 size_t len;
2150{
2151 vm_offset_t gap;
2152
2153 if ((vm_offset_t) (addr + len) < addr)
2154 return EPERM;
2155 if ((vm_offset_t) (addr + len) <= sizeof(struct user))
2156 return 0;
2157
2158 gap = (char *) p->p_md.md_regs - (char *) p->p_addr;
2159
2160 if ((vm_offset_t) addr < gap)
2161 return EPERM;
2162 if ((vm_offset_t) (addr + len) <=
2163 (vm_offset_t) (gap + sizeof(struct trapframe)))
2164 return 0;
2165 return EPERM;
2166}
2167
2168int ptrace_write_u(p, off, data)
2169 struct proc *p;
2170 vm_offset_t off;
2171 long data;
2172{
2173 struct trapframe frame_copy;
2174 vm_offset_t min;
2175 struct trapframe *tp;
2176
2177 /*
2178 * Privileged kernel state is scattered all over the user area.
2179 * Only allow write access to parts of regs and to fpregs.
2180 */
2181 min = (char *)p->p_md.md_regs - (char *)p->p_addr;
2182 if (off >= min && off <= min + sizeof(struct trapframe) - sizeof(int)) {
2183 tp = p->p_md.md_regs;
2184 frame_copy = *tp;
2185 *(int *)((char *)&frame_copy + (off - min)) = data;
2186 if (!EFL_SECURE(frame_copy.tf_eflags, tp->tf_eflags) ||
2187 !CS_SECURE(frame_copy.tf_cs))
2188 return (EINVAL);
2189 *(int*)((char *)p->p_addr + off) = data;
2190 return (0);
2191 }
b7c628e4
MD
2192
2193 /*
2194 * The PCB is at the end of the user area YYY
2195 */
2196 min = (char *)p->p_thread->td_pcb - (char *)p->p_addr;
2197 min += offsetof(struct pcb, pcb_save);
984263bc
MD
2198 if (off >= min && off <= min + sizeof(union savefpu) - sizeof(int)) {
2199 *(int*)((char *)p->p_addr + off) = data;
2200 return (0);
2201 }
2202 return (EFAULT);
2203}
2204
2205int
2206fill_regs(p, regs)
2207 struct proc *p;
2208 struct reg *regs;
2209{
2210 struct pcb *pcb;
2211 struct trapframe *tp;
2212
2213 tp = p->p_md.md_regs;
2214 regs->r_fs = tp->tf_fs;
2215 regs->r_es = tp->tf_es;
2216 regs->r_ds = tp->tf_ds;
2217 regs->r_edi = tp->tf_edi;
2218 regs->r_esi = tp->tf_esi;
2219 regs->r_ebp = tp->tf_ebp;
2220 regs->r_ebx = tp->tf_ebx;
2221 regs->r_edx = tp->tf_edx;
2222 regs->r_ecx = tp->tf_ecx;
2223 regs->r_eax = tp->tf_eax;
2224 regs->r_eip = tp->tf_eip;
2225 regs->r_cs = tp->tf_cs;
2226 regs->r_eflags = tp->tf_eflags;
2227 regs->r_esp = tp->tf_esp;
2228 regs->r_ss = tp->tf_ss;
b7c628e4 2229 pcb = p->p_thread->td_pcb;
984263bc
MD
2230 regs->r_gs = pcb->pcb_gs;
2231 return (0);
2232}
2233
2234int
2235set_regs(p, regs)
2236 struct proc *p;
2237 struct reg *regs;
2238{
2239 struct pcb *pcb;
2240 struct trapframe *tp;
2241
2242 tp = p->p_md.md_regs;
2243 if (!EFL_SECURE(regs->r_eflags, tp->tf_eflags) ||
2244 !CS_SECURE(regs->r_cs))
2245 return (EINVAL);
2246 tp->tf_fs = regs->r_fs;
2247 tp->tf_es = regs->r_es;
2248 tp->tf_ds = regs->r_ds;
2249 tp->tf_edi = regs->r_edi;
2250 tp->tf_esi = regs->r_esi;
2251 tp->tf_ebp = regs->r_ebp;
2252 tp->tf_ebx = regs->r_ebx;
2253 tp->tf_edx = regs->r_edx;
2254 tp->tf_ecx = regs->r_ecx;
2255 tp->tf_eax = regs->r_eax;
2256 tp->tf_eip = regs->r_eip;
2257 tp->tf_cs = regs->r_cs;
2258 tp->tf_eflags = regs->r_eflags;
2259 tp->tf_esp = regs->r_esp;
2260 tp->tf_ss = regs->r_ss;
b7c628e4 2261 pcb = p->p_thread->td_pcb;
984263bc
MD
2262 pcb->pcb_gs = regs->r_gs;
2263 return (0);
2264}
2265
2266#ifdef CPU_ENABLE_SSE
2267static void
2268fill_fpregs_xmm(sv_xmm, sv_87)
2269 struct savexmm *sv_xmm;
2270 struct save87 *sv_87;
2271{
2272 register struct env87 *penv_87 = &sv_87->sv_env;
2273 register struct envxmm *penv_xmm = &sv_xmm->sv_env;
2274 int i;
2275
2276 /* FPU control/status */
2277 penv_87->en_cw = penv_xmm->en_cw;
2278 penv_87->en_sw = penv_xmm->en_sw;
2279 penv_87->en_tw = penv_xmm->en_tw;
2280 penv_87->en_fip = penv_xmm->en_fip;
2281 penv_87->en_fcs = penv_xmm->en_fcs;
2282 penv_87->en_opcode = penv_xmm->en_opcode;
2283 penv_87->en_foo = penv_xmm->en_foo;
2284 penv_87->en_fos = penv_xmm->en_fos;
2285
2286 /* FPU registers */
2287 for (i = 0; i < 8; ++i)
2288 sv_87->sv_ac[i] = sv_xmm->sv_fp[i].fp_acc;
2289
2290 sv_87->sv_ex_sw = sv_xmm->sv_ex_sw;
2291}
2292
2293static void
2294set_fpregs_xmm(sv_87, sv_xmm)
2295 struct save87 *sv_87;
2296 struct savexmm *sv_xmm;
2297{
2298 register struct env87 *penv_87 = &sv_87->sv_env;
2299 register struct envxmm *penv_xmm = &sv_xmm->sv_env;
2300 int i;
2301
2302 /* FPU control/status */
2303 penv_xmm->en_cw = penv_87->en_cw;
2304 penv_xmm->en_sw = penv_87->en_sw;
2305 penv_xmm->en_tw = penv_87->en_tw;
2306 penv_xmm->en_fip = penv_87->en_fip;
2307 penv_xmm->en_fcs = penv_87->en_fcs;
2308 penv_xmm->en_opcode = penv_87->en_opcode;
2309 penv_xmm->en_foo = penv_87->en_foo;
2310 penv_xmm->en_fos = penv_87->en_fos;
2311
2312 /* FPU registers */
2313 for (i = 0; i < 8; ++i)
2314 sv_xmm->sv_fp[i].fp_acc = sv_87->sv_ac[i];
2315
2316 sv_xmm->sv_ex_sw = sv_87->sv_ex_sw;
2317}
2318#endif /* CPU_ENABLE_SSE */
2319
2320int
2321fill_fpregs(p, fpregs)
2322 struct proc *p;
2323 struct fpreg *fpregs;
2324{
2325#ifdef CPU_ENABLE_SSE
2326 if (cpu_fxsr) {
b7c628e4 2327 fill_fpregs_xmm(&p->p_thread->td_pcb->pcb_save.sv_xmm,
984263bc
MD
2328 (struct save87 *)fpregs);
2329 return (0);
2330 }
2331#endif /* CPU_ENABLE_SSE */
b7c628e4 2332 bcopy(&p->p_thread->td_pcb->pcb_save.sv_87, fpregs, sizeof *fpregs);
984263bc
MD
2333 return (0);
2334}
2335
2336int
2337set_fpregs(p, fpregs)
2338 struct proc *p;
2339 struct fpreg *fpregs;
2340{
2341#ifdef CPU_ENABLE_SSE
2342 if (cpu_fxsr) {
2343 set_fpregs_xmm((struct save87 *)fpregs,
b7c628e4 2344 &p->p_thread->td_pcb->pcb_save.sv_xmm);
984263bc
MD
2345 return (0);
2346 }
2347#endif /* CPU_ENABLE_SSE */
b7c628e4 2348 bcopy(fpregs, &p->p_thread->td_pcb->pcb_save.sv_87, sizeof *fpregs);
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2349 return (0);
2350}
2351
2352int
2353fill_dbregs(p, dbregs)
2354 struct proc *p;
2355 struct dbreg *dbregs;
2356{
2357 struct pcb *pcb;
2358
2359 if (p == NULL) {
2360 dbregs->dr0 = rdr0();
2361 dbregs->dr1 = rdr1();
2362 dbregs->dr2 = rdr2();
2363 dbregs->dr3 = rdr3();
2364 dbregs->dr4 = rdr4();
2365 dbregs->dr5 = rdr5();
2366 dbregs->dr6 = rdr6();
2367 dbregs->dr7 = rdr7();
2368 }
2369 else {
b7c628e4 2370 pcb = p->p_thread->td_pcb;
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2371 dbregs->dr0 = pcb->pcb_dr0;
2372 dbregs->dr1 = pcb->pcb_dr1;
2373 dbregs->dr2 = pcb->pcb_dr2;
2374 dbregs->dr3 = pcb->pcb_dr3;
2375 dbregs->dr4 = 0;
2376 dbregs->dr5 = 0;
2377 dbregs->dr6 = pcb->pcb_dr6;
2378 dbregs->dr7 = pcb->pcb_dr7;
2379 }
2380 return (0);
2381}
2382
2383int
2384set_dbregs(p, dbregs)
2385 struct proc *p;
2386 struct dbreg *dbregs;
2387{
2388 struct pcb *pcb;
2389 int i;
2390 u_int32_t mask1, mask2;
2391
2392 if (p == NULL) {
2393 load_dr0(dbregs->dr0);
2394 load_dr1(dbregs->dr1);
2395 load_dr2(dbregs->dr2);
2396 load_dr3(dbregs->dr3);
2397 load_dr4(dbregs->dr4);
2398 load_dr5(dbregs->dr5);
2399 load_dr6(dbregs->dr6);
2400 load_dr7(dbregs->dr7);
2401 }
2402 else {
2403 /*
2404 * Don't let an illegal value for dr7 get set. Specifically,
2405 * check for undefined settings. Setting these bit patterns
2406 * result in undefined behaviour and can lead to an unexpected
2407 * TRCTRAP.
2408 */
2409 for (i = 0, mask1 = 0x3<<16, mask2 = 0x2<<16; i < 8;
2410 i++, mask1 <<= 2, mask2 <<= 2)
2411 if ((dbregs->dr7 & mask1) == mask2)
2412 return (EINVAL);
2413
b7c628e4 2414 pcb = p->p_thread->td_pcb;
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MD
2415
2416 /*
2417 * Don't let a process set a breakpoint that is not within the
2418 * process's address space. If a process could do this, it
2419 * could halt the system by setting a breakpoint in the kernel
2420 * (if ddb was enabled). Thus, we need to check to make sure
2421 * that no breakpoints are being enabled for addresses outside
2422 * process's address space, unless, perhaps, we were called by
2423 * uid 0.
2424 *
2425 * XXX - what about when the watched area of the user's
2426 * address space is written into from within the kernel
2427 * ... wouldn't that still cause a breakpoint to be generated
2428 * from within kernel mode?
2429 */
2430
dadab5e9 2431 if (suser_cred(p->p_ucred, 0) != 0) {
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MD
2432 if (dbregs->dr7 & 0x3) {
2433 /* dr0 is enabled */
2434 if (dbregs->dr0 >= VM_MAXUSER_ADDRESS)
2435 return (EINVAL);
2436 }
2437
2438 if (dbregs->dr7 & (0x3<<2)) {
2439 /* dr1 is enabled */
2440 if (dbregs->dr1 >= VM_MAXUSER_ADDRESS)
2441 return (EINVAL);
2442 }
2443
2444 if (dbregs->dr7 & (0x3<<4)) {
2445 /* dr2 is enabled */
2446 if (dbregs->dr2 >= VM_MAXUSER_ADDRESS)
2447 return (EINVAL);
2448 }
2449
2450 if (dbregs->dr7 & (0x3<<6)) {
2451 /* dr3 is enabled */
2452 if (dbregs->dr3 >= VM_MAXUSER_ADDRESS)
2453 return (EINVAL);
2454 }
2455 }
2456
2457 pcb->pcb_dr0 = dbregs->dr0;
2458 pcb->pcb_dr1 = dbregs->dr1;
2459 pcb->pcb_dr2 = dbregs->dr2;
2460 pcb->pcb_dr3 = dbregs->dr3;
2461 pcb->pcb_dr6 = dbregs->dr6;
2462 pcb->pcb_dr7 = dbregs->dr7;
2463
2464 pcb->pcb_flags |= PCB_DBREGS;
2465 }
2466
2467 return (0);
2468}
2469
2470/*
2471 * Return > 0 if a hardware breakpoint has been hit, and the
2472 * breakpoint was in user space. Return 0, otherwise.
2473 */
2474int
2475user_dbreg_trap(void)
2476{
2477 u_int32_t dr7, dr6; /* debug registers dr6 and dr7 */
2478 u_int32_t bp; /* breakpoint bits extracted from dr6 */
2479 int nbp; /* number of breakpoints that triggered */
2480 caddr_t addr[4]; /* breakpoint addresses */
2481 int i;
2482
2483 dr7 = rdr7();
2484 if ((dr7 & 0x000000ff) == 0) {
2485 /*
2486 * all GE and LE bits in the dr7 register are zero,
2487 * thus the trap couldn't have been caused by the
2488 * hardware debug registers
2489 */
2490 return 0;
2491 }
2492
2493 nbp = 0;
2494 dr6 = rdr6();
2495 bp = dr6 & 0x0000000f;
2496
2497 if (!bp) {
2498 /*
2499 * None of the breakpoint bits are set meaning this
2500 * trap was not caused by any of the debug registers
2501 */
2502 return 0;
2503 }
2504
2505 /*
2506 * at least one of the breakpoints were hit, check to see
2507 * which ones and if any of them are user space addresses
2508 */
2509
2510 if (bp & 0x01) {
2511 addr[nbp++] = (caddr_t)rdr0();
2512 }
2513 if (bp & 0x02) {
2514 addr[nbp++] = (caddr_t)rdr1();
2515 }
2516 if (bp & 0x04) {
2517 addr[nbp++] = (caddr_t)rdr2();
2518 }
2519 if (bp & 0x08) {
2520 addr[nbp++] = (caddr_t)rdr3();
2521 }
2522
2523 for (i=0; i<nbp; i++) {
2524 if (addr[i] <
2525 (caddr_t)VM_MAXUSER_ADDRESS) {
2526 /*
2527 * addr[i] is in user space
2528 */
2529 return nbp;
2530 }
2531 }
2532
2533 /*
2534 * None of the breakpoints are in user space.
2535 */
2536 return 0;
2537}
2538
2539
2540#ifndef DDB
2541void
2542Debugger(const char *msg)
2543{
2544 printf("Debugger(\"%s\") called.\n", msg);
2545}
2546#endif /* no DDB */
2547
2548#include <sys/disklabel.h>
2549
2550/*
2551 * Determine the size of the transfer, and make sure it is
2552 * within the boundaries of the partition. Adjust transfer
2553 * if needed, and signal errors or early completion.
2554 */
2555int
2556bounds_check_with_label(struct buf *bp, struct disklabel *lp, int wlabel)
2557{
2558 struct partition *p = lp->d_partitions + dkpart(bp->b_dev);
2559 int labelsect = lp->d_partitions[0].p_offset;
2560 int maxsz = p->p_size,
2561 sz = (bp->b_bcount + DEV_BSIZE - 1) >> DEV_BSHIFT;
2562
2563 /* overwriting disk label ? */
2564 /* XXX should also protect bootstrap in first 8K */
2565 if (bp->b_blkno + p->p_offset <= LABELSECTOR + labelsect &&
2566#if LABELSECTOR != 0
2567 bp->b_blkno + p->p_offset + sz > LABELSECTOR + labelsect &&
2568#endif
2569 (bp->b_flags & B_READ) == 0 && wlabel == 0) {
2570 bp->b_error = EROFS;
2571 goto bad;
2572 }
2573
2574#if defined(DOSBBSECTOR) && defined(notyet)
2575 /* overwriting master boot record? */
2576 if (bp->b_blkno + p->p_offset <= DOSBBSECTOR &&
2577 (bp->b_flags & B_READ) == 0 && wlabel == 0) {
2578 bp->b_error = EROFS;
2579 goto bad;
2580 }
2581#endif
2582
2583 /* beyond partition? */
2584 if (bp->b_blkno < 0 || bp->b_blkno + sz > maxsz) {
2585 /* if exactly at end of disk, return an EOF */
2586 if (bp->b_blkno == maxsz) {
2587 bp->b_resid = bp->b_bcount;
2588 return(0);
2589 }
2590 /* or truncate if part of it fits */
2591 sz = maxsz - bp->b_blkno;
2592 if (sz <= 0) {
2593 bp->b_error = EINVAL;
2594 goto bad;
2595 }
2596 bp->b_bcount = sz << DEV_BSHIFT;
2597 }
2598
2599 bp->b_pblkno = bp->b_blkno + p->p_offset;
2600 return(1);
2601
2602bad:
2603 bp->b_flags |= B_ERROR;
2604 return(-1);
2605}
2606
2607#ifdef DDB
2608
2609/*
2610 * Provide inb() and outb() as functions. They are normally only
2611 * available as macros calling inlined functions, thus cannot be
2612 * called inside DDB.
2613 *
2614 * The actual code is stolen from <machine/cpufunc.h>, and de-inlined.
2615 */
2616
2617#undef inb
2618#undef outb
2619
2620/* silence compiler warnings */
2621u_char inb(u_int);
2622void outb(u_int, u_char);
2623
2624u_char
2625inb(u_int port)
2626{
2627 u_char data;
2628 /*
2629 * We use %%dx and not %1 here because i/o is done at %dx and not at
2630 * %edx, while gcc generates inferior code (movw instead of movl)
2631 * if we tell it to load (u_short) port.
2632 */
2633 __asm __volatile("inb %%dx,%0" : "=a" (data) : "d" (port));
2634 return (data);
2635}
2636
2637void
2638outb(u_int port, u_char data)
2639{
2640 u_char al;
2641 /*
2642 * Use an unnecessary assignment to help gcc's register allocator.
2643 * This make a large difference for gcc-1.40 and a tiny difference
2644 * for gcc-2.6.0. For gcc-1.40, al had to be ``asm("ax")'' for
2645 * best results. gcc-2.6.0 can't handle this.
2646 */
2647 al = data;
2648 __asm __volatile("outb %0,%%dx" : : "a" (al), "d" (port));
2649}
2650
2651#endif /* DDB */
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MD
2652
2653
2654
2655#include "opt_cpu.h"
2656#include "opt_htt.h"
2657#include "opt_user_ldt.h"
2658
2659
2660/*
2661 * initialize all the SMP locks
2662 */
2663
2664/* critical region around IO APIC, apic_imen */
2665struct spinlock imen_spinlock;
2666
2667/* Make FAST_INTR() routines sequential */
2668struct spinlock fast_intr_spinlock;
2669
2670/* critical region for old style disable_intr/enable_intr */
2671struct spinlock mpintr_spinlock;
2672
2673/* critical region around INTR() routines */
2674struct spinlock intr_spinlock;
2675
2676/* lock region used by kernel profiling */
2677struct spinlock mcount_spinlock;
2678
2679/* locks com (tty) data/hardware accesses: a FASTINTR() */
2680struct spinlock com_spinlock;
2681
2682/* locks kernel printfs */
2683struct spinlock cons_spinlock;
2684
2685/* lock regions around the clock hardware */
2686struct spinlock clock_spinlock;
2687
2688/* lock around the MP rendezvous */
2689struct spinlock smp_rv_spinlock;
2690
2691static void
2692init_locks(void)
2693{
2694 /*
2695 * mp_lock = 0; BSP already owns the MP lock
2696 */
2697 /*
2698 * Get the initial mp_lock with a count of 1 for the BSP.
2699 * This uses a LOGICAL cpu ID, ie BSP == 0.
2700 */
2701#ifdef SMP
2702 cpu_get_initial_mplock();
2703#endif
2704 spin_lock_init(&mcount_spinlock);
2705 spin_lock_init(&fast_intr_spinlock);
2706 spin_lock_init(&intr_spinlock);
2707 spin_lock_init(&mpintr_spinlock);
2708 spin_lock_init(&imen_spinlock);
2709 spin_lock_init(&smp_rv_spinlock);
2710 spin_lock_init(&com_spinlock);
2711 spin_lock_init(&clock_spinlock);
2712 spin_lock_init(&cons_spinlock);
2713}
2714