Bring in YONETANI Tomokazu's acpi-update-2.patch (27-May-2004), a major
[dragonfly.git] / sys / i386 / i386 / machdep.c
CommitLineData
984263bc
MD
1/*-
2 * Copyright (c) 1992 Terrence R. Lambert.
3 * Copyright (c) 1982, 1987, 1990 The Regents of the University of California.
4 * All rights reserved.
5 *
6 * This code is derived from software contributed to Berkeley by
7 * William Jolitz.
8 *
9 * Redistribution and use in source and binary forms, with or without
10 * modification, are permitted provided that the following conditions
11 * are met:
12 * 1. Redistributions of source code must retain the above copyright
13 * notice, this list of conditions and the following disclaimer.
14 * 2. Redistributions in binary form must reproduce the above copyright
15 * notice, this list of conditions and the following disclaimer in the
16 * documentation and/or other materials provided with the distribution.
17 * 3. All advertising materials mentioning features or use of this software
18 * must display the following acknowledgement:
19 * This product includes software developed by the University of
20 * California, Berkeley and its contributors.
21 * 4. Neither the name of the University nor the names of its contributors
22 * may be used to endorse or promote products derived from this software
23 * without specific prior written permission.
24 *
25 * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
26 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
27 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
28 * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
29 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
30 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
31 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
32 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
33 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
34 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
35 * SUCH DAMAGE.
36 *
37 * from: @(#)machdep.c 7.4 (Berkeley) 6/3/91
38 * $FreeBSD: src/sys/i386/i386/machdep.c,v 1.385.2.30 2003/05/31 08:48:05 alc Exp $
f9d8cd12 39 * $DragonFly: src/sys/i386/i386/Attic/machdep.c,v 1.60 2004/06/27 08:52:36 dillon Exp $
984263bc
MD
40 */
41
1f2de5d4
MD
42#include "use_apm.h"
43#include "use_ether.h"
44#include "use_npx.h"
45#include "use_isa.h"
984263bc
MD
46#include "opt_atalk.h"
47#include "opt_compat.h"
48#include "opt_cpu.h"
49#include "opt_ddb.h"
50#include "opt_directio.h"
51#include "opt_inet.h"
52#include "opt_ipx.h"
53#include "opt_maxmem.h"
54#include "opt_msgbuf.h"
55#include "opt_perfmon.h"
56#include "opt_swap.h"
984263bc
MD
57#include "opt_userconfig.h"
58
59#include <sys/param.h>
60#include <sys/systm.h>
61#include <sys/sysproto.h>
62#include <sys/signalvar.h>
63#include <sys/kernel.h>
64#include <sys/linker.h>
65#include <sys/malloc.h>
66#include <sys/proc.h>
67#include <sys/buf.h>
68#include <sys/reboot.h>
69#include <sys/callout.h>
70#include <sys/mbuf.h>
71#include <sys/msgbuf.h>
72#include <sys/sysent.h>
73#include <sys/sysctl.h>
74#include <sys/vmmeter.h>
75#include <sys/bus.h>
a722be49 76#include <sys/upcall.h>
984263bc
MD
77
78#include <vm/vm.h>
79#include <vm/vm_param.h>
80#include <sys/lock.h>
81#include <vm/vm_kern.h>
82#include <vm/vm_object.h>
83#include <vm/vm_page.h>
84#include <vm/vm_map.h>
85#include <vm/vm_pager.h>
86#include <vm/vm_extern.h>
87
4b5f931b
MD
88#include <sys/thread2.h>
89
984263bc
MD
90#include <sys/user.h>
91#include <sys/exec.h>
92#include <sys/cons.h>
93
94#include <ddb/ddb.h>
95
984263bc
MD
96#include <machine/cpu.h>
97#include <machine/reg.h>
98#include <machine/clock.h>
99#include <machine/specialreg.h>
100#include <machine/bootinfo.h>
101#include <machine/ipl.h>
102#include <machine/md_var.h>
103#include <machine/pcb_ext.h> /* pcb.h included via sys/user.h */
85100692 104#include <machine/globaldata.h> /* CPU_prvspace */
984263bc
MD
105#ifdef SMP
106#include <machine/smp.h>
984263bc
MD
107#endif
108#ifdef PERFMON
109#include <machine/perfmon.h>
110#endif
111#include <machine/cputypes.h>
112
113#ifdef OLD_BUS_ARCH
1f2de5d4 114#include <bus/isa/i386/isa_device.h>
984263bc
MD
115#endif
116#include <i386/isa/intr_machdep.h>
1f2de5d4 117#include <bus/isa/rtc.h>
984263bc
MD
118#include <machine/vm86.h>
119#include <sys/random.h>
120#include <sys/ptrace.h>
121#include <machine/sigframe.h>
122
3ae0cd58
RG
123extern void init386 (int first);
124extern void dblfault_handler (void);
984263bc
MD
125
126extern void printcpuinfo(void); /* XXX header file */
127extern void finishidentcpu(void);
128extern void panicifcpuunsupported(void);
129extern void initializecpu(void);
130
3ae0cd58 131static void cpu_startup (void *);
642a6e88 132#ifndef CPU_DISABLE_SSE
3ae0cd58
RG
133static void set_fpregs_xmm (struct save87 *, struct savexmm *);
134static void fill_fpregs_xmm (struct savexmm *, struct save87 *);
642a6e88 135#endif /* CPU_DISABLE_SSE */
984263bc
MD
136#ifdef DIRECTIO
137extern void ffs_rawread_setup(void);
138#endif /* DIRECTIO */
8a8d5d85 139static void init_locks(void);
984263bc
MD
140
141SYSINIT(cpu, SI_SUB_CPU, SI_ORDER_FIRST, cpu_startup, NULL)
142
143static MALLOC_DEFINE(M_MBUF, "mbuf", "mbuf");
144
145int _udatasel, _ucodesel;
146u_int atdevbase;
147
148#if defined(SWTCH_OPTIM_STATS)
149extern int swtch_optim_stats;
150SYSCTL_INT(_debug, OID_AUTO, swtch_optim_stats,
151 CTLFLAG_RD, &swtch_optim_stats, 0, "");
152SYSCTL_INT(_debug, OID_AUTO, tlb_flush_count,
153 CTLFLAG_RD, &tlb_flush_count, 0, "");
154#endif
155
156#ifdef PC98
157static int ispc98 = 1;
158#else
159static int ispc98 = 0;
160#endif
161SYSCTL_INT(_machdep, OID_AUTO, ispc98, CTLFLAG_RD, &ispc98, 0, "");
162
163int physmem = 0;
164int cold = 1;
165
166static int
167sysctl_hw_physmem(SYSCTL_HANDLER_ARGS)
168{
169 int error = sysctl_handle_int(oidp, 0, ctob(physmem), req);
170 return (error);
171}
172
173SYSCTL_PROC(_hw, HW_PHYSMEM, physmem, CTLTYPE_INT|CTLFLAG_RD,
174 0, 0, sysctl_hw_physmem, "IU", "");
175
176static int
177sysctl_hw_usermem(SYSCTL_HANDLER_ARGS)
178{
179 int error = sysctl_handle_int(oidp, 0,
12e4aaff 180 ctob(physmem - vmstats.v_wire_count), req);
984263bc
MD
181 return (error);
182}
183
184SYSCTL_PROC(_hw, HW_USERMEM, usermem, CTLTYPE_INT|CTLFLAG_RD,
185 0, 0, sysctl_hw_usermem, "IU", "");
186
187static int
188sysctl_hw_availpages(SYSCTL_HANDLER_ARGS)
189{
190 int error = sysctl_handle_int(oidp, 0,
191 i386_btop(avail_end - avail_start), req);
192 return (error);
193}
194
195SYSCTL_PROC(_hw, OID_AUTO, availpages, CTLTYPE_INT|CTLFLAG_RD,
196 0, 0, sysctl_hw_availpages, "I", "");
197
198static int
199sysctl_machdep_msgbuf(SYSCTL_HANDLER_ARGS)
200{
201 int error;
202
203 /* Unwind the buffer, so that it's linear (possibly starting with
204 * some initial nulls).
205 */
206 error=sysctl_handle_opaque(oidp,msgbufp->msg_ptr+msgbufp->msg_bufr,
207 msgbufp->msg_size-msgbufp->msg_bufr,req);
208 if(error) return(error);
209 if(msgbufp->msg_bufr>0) {
210 error=sysctl_handle_opaque(oidp,msgbufp->msg_ptr,
211 msgbufp->msg_bufr,req);
212 }
213 return(error);
214}
215
216SYSCTL_PROC(_machdep, OID_AUTO, msgbuf, CTLTYPE_STRING|CTLFLAG_RD,
217 0, 0, sysctl_machdep_msgbuf, "A","Contents of kernel message buffer");
218
219static int msgbuf_clear;
220
221static int
222sysctl_machdep_msgbuf_clear(SYSCTL_HANDLER_ARGS)
223{
224 int error;
225 error = sysctl_handle_int(oidp, oidp->oid_arg1, oidp->oid_arg2,
226 req);
227 if (!error && req->newptr) {
228 /* Clear the buffer and reset write pointer */
229 bzero(msgbufp->msg_ptr,msgbufp->msg_size);
230 msgbufp->msg_bufr=msgbufp->msg_bufx=0;
231 msgbuf_clear=0;
232 }
233 return (error);
234}
235
236SYSCTL_PROC(_machdep, OID_AUTO, msgbuf_clear, CTLTYPE_INT|CTLFLAG_RW,
237 &msgbuf_clear, 0, sysctl_machdep_msgbuf_clear, "I",
238 "Clear kernel message buffer");
239
6ef943a3
MD
240int bootverbose = 0;
241vm_paddr_t Maxmem = 0;
984263bc
MD
242long dumplo;
243
6ef943a3 244vm_paddr_t phys_avail[10];
984263bc
MD
245
246/* must be 2 less so 0 0 can signal end of chunks */
247#define PHYS_AVAIL_ARRAY_END ((sizeof(phys_avail) / sizeof(vm_offset_t)) - 2)
248
249static vm_offset_t buffer_sva, buffer_eva;
250vm_offset_t clean_sva, clean_eva;
251static vm_offset_t pager_sva, pager_eva;
252static struct trapframe proc0_tf;
253
254static void
255cpu_startup(dummy)
256 void *dummy;
257{
c9faf524
RG
258 unsigned i;
259 caddr_t v;
cb840899 260 vm_offset_t minaddr;
984263bc
MD
261 vm_offset_t maxaddr;
262 vm_size_t size = 0;
263 int firstaddr;
984263bc
MD
264
265 if (boothowto & RB_VERBOSE)
266 bootverbose++;
267
268 /*
269 * Good {morning,afternoon,evening,night}.
270 */
271 printf("%s", version);
272 startrtclock();
273 printcpuinfo();
274 panicifcpuunsupported();
275#ifdef PERFMON
276 perfmon_init();
277#endif
6ef943a3 278 printf("real memory = %llu (%lluK bytes)\n", ptoa(Maxmem), ptoa(Maxmem) / 1024);
984263bc
MD
279 /*
280 * Display any holes after the first chunk of extended memory.
281 */
282 if (bootverbose) {
283 int indx;
284
285 printf("Physical memory chunk(s):\n");
286 for (indx = 0; phys_avail[indx + 1] != 0; indx += 2) {
6ef943a3 287 vm_paddr_t size1 = phys_avail[indx + 1] - phys_avail[indx];
984263bc 288
6ef943a3 289 printf("0x%08llx - 0x%08llx, %llu bytes (%llu pages)\n",
984263bc
MD
290 phys_avail[indx], phys_avail[indx + 1] - 1, size1,
291 size1 / PAGE_SIZE);
292 }
293 }
294
295 /*
296 * Calculate callout wheel size
297 */
298 for (callwheelsize = 1, callwheelbits = 0;
299 callwheelsize < ncallout;
300 callwheelsize <<= 1, ++callwheelbits)
301 ;
302 callwheelmask = callwheelsize - 1;
303
304 /*
305 * Allocate space for system data structures.
306 * The first available kernel virtual address is in "v".
307 * As pages of kernel virtual memory are allocated, "v" is incremented.
308 * As pages of memory are allocated and cleared,
309 * "firstaddr" is incremented.
310 * An index into the kernel page table corresponding to the
311 * virtual memory address maintained in "v" is kept in "mapaddr".
312 */
313
314 /*
315 * Make two passes. The first pass calculates how much memory is
316 * needed and allocates it. The second pass assigns virtual
317 * addresses to the various data structures.
318 */
319 firstaddr = 0;
320again:
321 v = (caddr_t)firstaddr;
322
323#define valloc(name, type, num) \
324 (name) = (type *)v; v = (caddr_t)((name)+(num))
325#define valloclim(name, type, num, lim) \
326 (name) = (type *)v; v = (caddr_t)((lim) = ((name)+(num)))
327
328 valloc(callout, struct callout, ncallout);
329 valloc(callwheel, struct callout_tailq, callwheelsize);
330
331 /*
332 * The nominal buffer size (and minimum KVA allocation) is BKVASIZE.
333 * For the first 64MB of ram nominally allocate sufficient buffers to
334 * cover 1/4 of our ram. Beyond the first 64MB allocate additional
335 * buffers to cover 1/20 of our ram over 64MB. When auto-sizing
336 * the buffer cache we limit the eventual kva reservation to
337 * maxbcache bytes.
338 *
339 * factor represents the 1/4 x ram conversion.
340 */
341 if (nbuf == 0) {
342 int factor = 4 * BKVASIZE / 1024;
343 int kbytes = physmem * (PAGE_SIZE / 1024);
344
345 nbuf = 50;
346 if (kbytes > 4096)
347 nbuf += min((kbytes - 4096) / factor, 65536 / factor);
348 if (kbytes > 65536)
349 nbuf += (kbytes - 65536) * 2 / (factor * 5);
350 if (maxbcache && nbuf > maxbcache / BKVASIZE)
351 nbuf = maxbcache / BKVASIZE;
352 }
353
354 /*
355 * Do not allow the buffer_map to be more then 1/2 the size of the
356 * kernel_map.
357 */
358 if (nbuf > (kernel_map->max_offset - kernel_map->min_offset) /
359 (BKVASIZE * 2)) {
360 nbuf = (kernel_map->max_offset - kernel_map->min_offset) /
361 (BKVASIZE * 2);
362 printf("Warning: nbufs capped at %d\n", nbuf);
363 }
364
365 nswbuf = max(min(nbuf/4, 256), 16);
366#ifdef NSWBUF_MIN
367 if (nswbuf < NSWBUF_MIN)
368 nswbuf = NSWBUF_MIN;
369#endif
370#ifdef DIRECTIO
371 ffs_rawread_setup();
372#endif
373
374 valloc(swbuf, struct buf, nswbuf);
375 valloc(buf, struct buf, nbuf);
376 v = bufhashinit(v);
377
378 /*
379 * End of first pass, size has been calculated so allocate memory
380 */
381 if (firstaddr == 0) {
382 size = (vm_size_t)(v - firstaddr);
383 firstaddr = (int)kmem_alloc(kernel_map, round_page(size));
384 if (firstaddr == 0)
385 panic("startup: no room for tables");
386 goto again;
387 }
388
389 /*
390 * End of second pass, addresses have been assigned
391 */
392 if ((vm_size_t)(v - firstaddr) != size)
393 panic("startup: table size inconsistency");
394
395 clean_map = kmem_suballoc(kernel_map, &clean_sva, &clean_eva,
396 (nbuf*BKVASIZE) + (nswbuf*MAXPHYS) + pager_map_size);
397 buffer_map = kmem_suballoc(clean_map, &buffer_sva, &buffer_eva,
398 (nbuf*BKVASIZE));
399 buffer_map->system_map = 1;
400 pager_map = kmem_suballoc(clean_map, &pager_sva, &pager_eva,
401 (nswbuf*MAXPHYS) + pager_map_size);
402 pager_map->system_map = 1;
403 exec_map = kmem_suballoc(kernel_map, &minaddr, &maxaddr,
404 (16*(ARG_MAX+(PAGE_SIZE*3))));
405
406 /*
407 * Finally, allocate mbuf pool. Since mclrefcnt is an off-size
408 * we use the more space efficient malloc in place of kmem_alloc.
409 */
410 {
411 vm_offset_t mb_map_size;
412
413 mb_map_size = nmbufs * MSIZE + nmbclusters * MCLBYTES;
414 mb_map_size = roundup2(mb_map_size, max(MCLBYTES, PAGE_SIZE));
1870e334 415 mclrefcnt = malloc(mb_map_size / MCLBYTES, M_MBUF, M_WAITOK);
984263bc 416 bzero(mclrefcnt, mb_map_size / MCLBYTES);
cb840899
MD
417 mb_map = kmem_suballoc(kernel_map, &minaddr, &maxaddr,
418 mb_map_size);
984263bc 419 mb_map->system_map = 1;
cb840899
MD
420 mbutl = (void *)mb_map->header.start;
421 mbute = (void *)mb_map->header.end;
984263bc
MD
422 }
423
424 /*
425 * Initialize callouts
426 */
427 SLIST_INIT(&callfree);
428 for (i = 0; i < ncallout; i++) {
429 callout_init(&callout[i]);
430 callout[i].c_flags = CALLOUT_LOCAL_ALLOC;
431 SLIST_INSERT_HEAD(&callfree, &callout[i], c_links.sle);
432 }
433
434 for (i = 0; i < callwheelsize; i++) {
435 TAILQ_INIT(&callwheel[i]);
436 }
437
438#if defined(USERCONFIG)
439 userconfig();
440 cninit(); /* the preferred console may have changed */
441#endif
442
12e4aaff
MD
443 printf("avail memory = %u (%uK bytes)\n", ptoa(vmstats.v_free_count),
444 ptoa(vmstats.v_free_count) / 1024);
984263bc
MD
445
446 /*
447 * Set up buffers, so they can be used to read disk labels.
448 */
449 bufinit();
450 vm_pager_bufferinit();
451
452#ifdef SMP
453 /*
454 * OK, enough kmem_alloc/malloc state should be up, lets get on with it!
455 */
456 mp_start(); /* fire up the APs and APICs */
457 mp_announce();
458#endif /* SMP */
459 cpu_setregs();
460}
461
984263bc
MD
462/*
463 * Send an interrupt to process.
464 *
465 * Stack is set up to allow sigcode stored
466 * at top to call routine, followed by kcall
467 * to sigreturn routine below. After sigreturn
468 * resets the signal mask, the stack, and the
469 * frame pointer, it returns to the user
470 * specified pc, psl.
471 */
984263bc
MD
472void
473sendsig(catcher, sig, mask, code)
474 sig_t catcher;
475 int sig;
476 sigset_t *mask;
477 u_long code;
478{
479 struct proc *p = curproc;
480 struct trapframe *regs;
481 struct sigacts *psp = p->p_sigacts;
482 struct sigframe sf, *sfp;
483 int oonstack;
484
984263bc
MD
485 regs = p->p_md.md_regs;
486 oonstack = (p->p_sigstk.ss_flags & SS_ONSTACK) ? 1 : 0;
487
488 /* save user context */
489 bzero(&sf, sizeof(struct sigframe));
490 sf.sf_uc.uc_sigmask = *mask;
491 sf.sf_uc.uc_stack = p->p_sigstk;
492 sf.sf_uc.uc_mcontext.mc_onstack = oonstack;
493 sf.sf_uc.uc_mcontext.mc_gs = rgs();
494 bcopy(regs, &sf.sf_uc.uc_mcontext.mc_fs, sizeof(struct trapframe));
495
496 /* Allocate and validate space for the signal handler context. */
497 if ((p->p_flag & P_ALTSTACK) != 0 && !oonstack &&
498 SIGISMEMBER(psp->ps_sigonstack, sig)) {
499 sfp = (struct sigframe *)(p->p_sigstk.ss_sp +
500 p->p_sigstk.ss_size - sizeof(struct sigframe));
501 p->p_sigstk.ss_flags |= SS_ONSTACK;
502 }
503 else
504 sfp = (struct sigframe *)regs->tf_esp - 1;
505
506 /* Translate the signal is appropriate */
507 if (p->p_sysent->sv_sigtbl) {
508 if (sig <= p->p_sysent->sv_sigsize)
509 sig = p->p_sysent->sv_sigtbl[_SIG_IDX(sig)];
510 }
511
512 /* Build the argument list for the signal handler. */
513 sf.sf_signum = sig;
514 sf.sf_ucontext = (register_t)&sfp->sf_uc;
515 if (SIGISMEMBER(p->p_sigacts->ps_siginfo, sig)) {
516 /* Signal handler installed with SA_SIGINFO. */
517 sf.sf_siginfo = (register_t)&sfp->sf_si;
518 sf.sf_ahu.sf_action = (__siginfohandler_t *)catcher;
519
520 /* fill siginfo structure */
521 sf.sf_si.si_signo = sig;
522 sf.sf_si.si_code = code;
523 sf.sf_si.si_addr = (void*)regs->tf_err;
524 }
525 else {
526 /* Old FreeBSD-style arguments. */
527 sf.sf_siginfo = code;
528 sf.sf_addr = regs->tf_err;
529 sf.sf_ahu.sf_handler = catcher;
530 }
531
532 /*
533 * If we're a vm86 process, we want to save the segment registers.
534 * We also change eflags to be our emulated eflags, not the actual
535 * eflags.
536 */
537 if (regs->tf_eflags & PSL_VM) {
538 struct trapframe_vm86 *tf = (struct trapframe_vm86 *)regs;
b7c628e4 539 struct vm86_kernel *vm86 = &p->p_thread->td_pcb->pcb_ext->ext_vm86;
984263bc
MD
540
541 sf.sf_uc.uc_mcontext.mc_gs = tf->tf_vm86_gs;
542 sf.sf_uc.uc_mcontext.mc_fs = tf->tf_vm86_fs;
543 sf.sf_uc.uc_mcontext.mc_es = tf->tf_vm86_es;
544 sf.sf_uc.uc_mcontext.mc_ds = tf->tf_vm86_ds;
545
546 if (vm86->vm86_has_vme == 0)
547 sf.sf_uc.uc_mcontext.mc_eflags =
548 (tf->tf_eflags & ~(PSL_VIF | PSL_VIP)) |
549 (vm86->vm86_eflags & (PSL_VIF | PSL_VIP));
550
551 /*
552 * Clear PSL_NT to inhibit T_TSSFLT faults on return from
553 * syscalls made by the signal handler. This just avoids
554 * wasting time for our lazy fixup of such faults. PSL_NT
555 * does nothing in vm86 mode, but vm86 programs can set it
556 * almost legitimately in probes for old cpu types.
557 */
558 tf->tf_eflags &= ~(PSL_VM | PSL_NT | PSL_VIF | PSL_VIP);
559 }
560
561 /*
562 * Copy the sigframe out to the user's stack.
563 */
564 if (copyout(&sf, sfp, sizeof(struct sigframe)) != 0) {
565 /*
566 * Something is wrong with the stack pointer.
567 * ...Kill the process.
568 */
569 sigexit(p, SIGILL);
570 }
571
572 regs->tf_esp = (int)sfp;
573 regs->tf_eip = PS_STRINGS - *(p->p_sysent->sv_szsigcode);
574 regs->tf_eflags &= ~PSL_T;
575 regs->tf_cs = _ucodesel;
576 regs->tf_ds = _udatasel;
577 regs->tf_es = _udatasel;
578 regs->tf_fs = _udatasel;
984263bc
MD
579 regs->tf_ss = _udatasel;
580}
581
582/*
65957d54 583 * sigreturn(ucontext_t *sigcntxp)
41c20dac 584 *
984263bc
MD
585 * System call to cleanup state after a signal
586 * has been taken. Reset signal mask and
587 * stack state from context left by sendsig (above).
588 * Return to previous pc and psl as specified by
589 * context left by sendsig. Check carefully to
590 * make sure that the user has not modified the
591 * state to gain improper privileges.
592 */
593#define EFL_SECURE(ef, oef) ((((ef) ^ (oef)) & ~PSL_USERCHANGE) == 0)
594#define CS_SECURE(cs) (ISPL(cs) == SEL_UPL)
595
984263bc 596int
41c20dac 597sigreturn(struct sigreturn_args *uap)
984263bc 598{
41c20dac 599 struct proc *p = curproc;
984263bc
MD
600 struct trapframe *regs;
601 ucontext_t *ucp;
602 int cs, eflags;
603
604 ucp = uap->sigcntxp;
605
984263bc
MD
606 if (!useracc((caddr_t)ucp, sizeof(ucontext_t), VM_PROT_READ))
607 return (EFAULT);
608
609 regs = p->p_md.md_regs;
610 eflags = ucp->uc_mcontext.mc_eflags;
611
612 if (eflags & PSL_VM) {
613 struct trapframe_vm86 *tf = (struct trapframe_vm86 *)regs;
614 struct vm86_kernel *vm86;
615
616 /*
617 * if pcb_ext == 0 or vm86_inited == 0, the user hasn't
618 * set up the vm86 area, and we can't enter vm86 mode.
619 */
b7c628e4 620 if (p->p_thread->td_pcb->pcb_ext == 0)
984263bc 621 return (EINVAL);
b7c628e4 622 vm86 = &p->p_thread->td_pcb->pcb_ext->ext_vm86;
984263bc
MD
623 if (vm86->vm86_inited == 0)
624 return (EINVAL);
625
626 /* go back to user mode if both flags are set */
627 if ((eflags & PSL_VIP) && (eflags & PSL_VIF))
628 trapsignal(p, SIGBUS, 0);
629
630 if (vm86->vm86_has_vme) {
631 eflags = (tf->tf_eflags & ~VME_USERCHANGE) |
632 (eflags & VME_USERCHANGE) | PSL_VM;
633 } else {
634 vm86->vm86_eflags = eflags; /* save VIF, VIP */
635 eflags = (tf->tf_eflags & ~VM_USERCHANGE) | (eflags & VM_USERCHANGE) | PSL_VM;
636 }
637 bcopy(&ucp->uc_mcontext.mc_fs, tf, sizeof(struct trapframe));
638 tf->tf_eflags = eflags;
639 tf->tf_vm86_ds = tf->tf_ds;
640 tf->tf_vm86_es = tf->tf_es;
641 tf->tf_vm86_fs = tf->tf_fs;
642 tf->tf_vm86_gs = ucp->uc_mcontext.mc_gs;
643 tf->tf_ds = _udatasel;
644 tf->tf_es = _udatasel;
645 tf->tf_fs = _udatasel;
646 } else {
647 /*
648 * Don't allow users to change privileged or reserved flags.
649 */
650 /*
651 * XXX do allow users to change the privileged flag PSL_RF.
652 * The cpu sets PSL_RF in tf_eflags for faults. Debuggers
653 * should sometimes set it there too. tf_eflags is kept in
654 * the signal context during signal handling and there is no
655 * other place to remember it, so the PSL_RF bit may be
656 * corrupted by the signal handler without us knowing.
657 * Corruption of the PSL_RF bit at worst causes one more or
658 * one less debugger trap, so allowing it is fairly harmless.
659 */
660 if (!EFL_SECURE(eflags & ~PSL_RF, regs->tf_eflags & ~PSL_RF)) {
661 printf("sigreturn: eflags = 0x%x\n", eflags);
662 return(EINVAL);
663 }
664
665 /*
666 * Don't allow users to load a valid privileged %cs. Let the
667 * hardware check for invalid selectors, excess privilege in
668 * other selectors, invalid %eip's and invalid %esp's.
669 */
670 cs = ucp->uc_mcontext.mc_cs;
671 if (!CS_SECURE(cs)) {
672 printf("sigreturn: cs = 0x%x\n", cs);
673 trapsignal(p, SIGBUS, T_PROTFLT);
674 return(EINVAL);
675 }
676 bcopy(&ucp->uc_mcontext.mc_fs, regs, sizeof(struct trapframe));
677 }
678
679 if (ucp->uc_mcontext.mc_onstack & 1)
680 p->p_sigstk.ss_flags |= SS_ONSTACK;
681 else
682 p->p_sigstk.ss_flags &= ~SS_ONSTACK;
683
684 p->p_sigmask = ucp->uc_sigmask;
685 SIG_CANTMASK(p->p_sigmask);
686 return(EJUSTRETURN);
687}
688
a722be49
MD
689/*
690 * Stack frame on entry to function. %eax will contain the function vector,
691 * %ecx will contain the function data. flags, ecx, and eax will have
692 * already been pushed on the stack.
693 */
694struct upc_frame {
695 register_t eax;
696 register_t ecx;
0a455ac5 697 register_t edx;
a722be49
MD
698 register_t flags;
699 register_t oldip;
700};
701
702void
703sendupcall(struct vmupcall *vu, int morepending)
704{
705 struct proc *p = curproc;
706 struct trapframe *regs;
707 struct upcall upcall;
708 struct upc_frame upc_frame;
6e58b5df 709 int crit_count = 0;
a722be49
MD
710
711 /*
712 * Get the upcall data structure
713 */
6e58b5df
MD
714 if (copyin(p->p_upcall, &upcall, sizeof(upcall)) ||
715 copyin((char *)upcall.upc_uthread + upcall.upc_critoff, &crit_count, sizeof(int))
716 ) {
a722be49
MD
717 vu->vu_pending = 0;
718 printf("bad upcall address\n");
719 return;
720 }
721
722 /*
723 * If the data structure is already marked pending or has a critical
724 * section count, mark the data structure as pending and return
725 * without doing an upcall. vu_pending is left set.
726 */
6e58b5df
MD
727 if (upcall.upc_pending || crit_count >= vu->vu_pending) {
728 if (upcall.upc_pending < vu->vu_pending) {
729 upcall.upc_pending = vu->vu_pending;
730 copyout(&upcall.upc_pending, &p->p_upcall->upc_pending,
731 sizeof(upcall.upc_pending));
a722be49
MD
732 }
733 return;
734 }
735
736 /*
737 * We can run this upcall now, clear vu_pending.
738 *
739 * Bump our critical section count and set or clear the
740 * user pending flag depending on whether more upcalls are
741 * pending. The user will be responsible for calling
742 * upc_dispatch(-1) to process remaining upcalls.
743 */
744 vu->vu_pending = 0;
6e58b5df
MD
745 upcall.upc_pending = morepending;
746 crit_count += TDPRI_CRIT;
747 copyout(&upcall.upc_pending, &p->p_upcall->upc_pending,
748 sizeof(upcall.upc_pending));
749 copyout(&crit_count, (char *)upcall.upc_uthread + upcall.upc_critoff,
750 sizeof(int));
a722be49
MD
751
752 /*
753 * Construct a stack frame and issue the upcall
754 */
755 regs = p->p_md.md_regs;
756 upc_frame.eax = regs->tf_eax;
757 upc_frame.ecx = regs->tf_ecx;
0a455ac5 758 upc_frame.edx = regs->tf_edx;
a722be49
MD
759 upc_frame.flags = regs->tf_eflags;
760 upc_frame.oldip = regs->tf_eip;
761 if (copyout(&upc_frame, (void *)(regs->tf_esp - sizeof(upc_frame)),
762 sizeof(upc_frame)) != 0) {
763 printf("bad stack on upcall\n");
764 } else {
765 regs->tf_eax = (register_t)vu->vu_func;
766 regs->tf_ecx = (register_t)vu->vu_data;
0a455ac5 767 regs->tf_edx = (register_t)p->p_upcall;
a722be49
MD
768 regs->tf_eip = (register_t)vu->vu_ctx;
769 regs->tf_esp -= sizeof(upc_frame);
770 }
771}
772
773/*
774 * fetchupcall occurs in the context of a system call, which means that
0a455ac5
MD
775 * we have to return EJUSTRETURN in order to prevent eax and edx from
776 * being overwritten by the syscall return value.
a722be49
MD
777 *
778 * if vu is not NULL we return the new context in %edx, the new data in %ecx,
779 * and the function pointer in %eax.
780 */
781int
0a455ac5 782fetchupcall (struct vmupcall *vu, int morepending, void *rsp)
a722be49
MD
783{
784 struct upc_frame upc_frame;
785 struct proc *p;
786 struct trapframe *regs;
787 int error;
6e58b5df
MD
788 struct upcall upcall;
789 int crit_count;
a722be49
MD
790
791 p = curproc;
792 regs = p->p_md.md_regs;
793
6e58b5df 794 error = copyout(&morepending, &p->p_upcall->upc_pending, sizeof(int));
a722be49
MD
795 if (error == 0) {
796 if (vu) {
797 /*
798 * This jumps us to the next ready context.
799 */
800 vu->vu_pending = 0;
6e58b5df
MD
801 error = copyin(p->p_upcall, &upcall, sizeof(upcall));
802 crit_count = 0;
803 if (error == 0)
804 error = copyin((char *)upcall.upc_uthread + upcall.upc_critoff, &crit_count, sizeof(int));
805 crit_count += TDPRI_CRIT;
a722be49 806 if (error == 0)
6e58b5df 807 error = copyout(&crit_count, (char *)upcall.upc_uthread + upcall.upc_critoff, sizeof(int));
a722be49
MD
808 regs->tf_eax = (register_t)vu->vu_func;
809 regs->tf_ecx = (register_t)vu->vu_data;
0a455ac5 810 regs->tf_edx = (register_t)p->p_upcall;
a722be49
MD
811 regs->tf_eip = (register_t)vu->vu_ctx;
812 regs->tf_esp = (register_t)rsp;
813 } else {
814 /*
815 * This returns us to the originally interrupted code.
816 */
817 error = copyin(rsp, &upc_frame, sizeof(upc_frame));
818 regs->tf_eax = upc_frame.eax;
819 regs->tf_ecx = upc_frame.ecx;
0a455ac5 820 regs->tf_edx = upc_frame.edx;
6e58b5df
MD
821 regs->tf_eflags = (regs->tf_eflags & ~PSL_USERCHANGE) |
822 (upc_frame.flags & PSL_USERCHANGE);
a722be49
MD
823 regs->tf_eip = upc_frame.oldip;
824 regs->tf_esp = (register_t)((char *)rsp + sizeof(upc_frame));
825 }
826 }
827 if (error == 0)
828 error = EJUSTRETURN;
829 return(error);
830}
831
984263bc
MD
832/*
833 * Machine dependent boot() routine
834 *
835 * I haven't seen anything to put here yet
836 * Possibly some stuff might be grafted back here from boot()
837 */
838void
839cpu_boot(int howto)
840{
841}
842
843/*
844 * Shutdown the CPU as much as possible
845 */
846void
847cpu_halt(void)
848{
849 for (;;)
850 __asm__ ("hlt");
851}
852
853/*
8ad65e08
MD
854 * cpu_idle() represents the idle LWKT. You cannot return from this function
855 * (unless you want to blow things up!). Instead we look for runnable threads
856 * and loop or halt as appropriate. Giant is not held on entry to the thread.
984263bc 857 *
26a0694b 858 * The main loop is entered with a critical section held, we must release
a2a5ad0d
MD
859 * the critical section before doing anything else. lwkt_switch() will
860 * check for pending interrupts due to entering and exiting its own
861 * critical section.
26a0694b 862 *
a2a5ad0d
MD
863 * Note on cpu_idle_hlt: On an SMP system we rely on a scheduler IPI
864 * to wake a HLTed cpu up. However, there are cases where the idlethread
865 * will be entered with the possibility that no IPI will occur and in such
866 * cases lwkt_switch() sets TDF_IDLE_NOHLT.
984263bc 867 */
96728c05 868static int cpu_idle_hlt = 1;
60f945af
MD
869static int cpu_idle_hltcnt;
870static int cpu_idle_spincnt;
984263bc
MD
871SYSCTL_INT(_machdep, OID_AUTO, cpu_idle_hlt, CTLFLAG_RW,
872 &cpu_idle_hlt, 0, "Idle loop HLT enable");
60f945af
MD
873SYSCTL_INT(_machdep, OID_AUTO, cpu_idle_hltcnt, CTLFLAG_RW,
874 &cpu_idle_hltcnt, 0, "Idle loop entry halts");
875SYSCTL_INT(_machdep, OID_AUTO, cpu_idle_spincnt, CTLFLAG_RW,
876 &cpu_idle_spincnt, 0, "Idle loop entry spins");
984263bc 877
f9d8cd12
MD
878static void
879cpu_idle_default_hook(void)
880{
881 /*
882 * We must guarentee that hlt is exactly the instruction
883 * following the sti.
884 */
885 __asm __volatile("sti; hlt");
886}
887
888/* Other subsystems (e.g., ACPI) can hook this later. */
889void (*cpu_idle_hook)(void) = cpu_idle_default_hook;
890
984263bc
MD
891void
892cpu_idle(void)
893{
a2a5ad0d
MD
894 struct thread *td = curthread;
895
26a0694b 896 crit_exit();
a2a5ad0d 897 KKASSERT(td->td_pri < TDPRI_CRIT);
8ad65e08 898 for (;;) {
a2a5ad0d
MD
899 /*
900 * See if there are any LWKTs ready to go.
901 */
8ad65e08 902 lwkt_switch();
a2a5ad0d
MD
903
904 /*
905 * If we are going to halt call splz unconditionally after
906 * CLIing to catch any interrupt races. Note that we are
907 * at SPL0 and interrupts are enabled.
908 */
909 if (cpu_idle_hlt && !lwkt_runnable() &&
910 (td->td_flags & TDF_IDLE_NOHLT) == 0) {
a2a5ad0d
MD
911 __asm __volatile("cli");
912 splz();
f9d8cd12 913 cpu_idle_hook();
60f945af 914 ++cpu_idle_hltcnt;
8ad65e08 915 } else {
a2a5ad0d 916 td->td_flags &= ~TDF_IDLE_NOHLT;
60f945af 917 splz();
8ad65e08 918 __asm __volatile("sti");
60f945af 919 ++cpu_idle_spincnt;
8ad65e08 920 }
984263bc
MD
921 }
922}
923
924/*
925 * Clear registers on exec
926 */
927void
928setregs(p, entry, stack, ps_strings)
929 struct proc *p;
930 u_long entry;
931 u_long stack;
932 u_long ps_strings;
933{
934 struct trapframe *regs = p->p_md.md_regs;
b7c628e4 935 struct pcb *pcb = p->p_thread->td_pcb;
984263bc
MD
936
937 /* Reset pc->pcb_gs and %gs before possibly invalidating it. */
938 pcb->pcb_gs = _udatasel;
939 load_gs(_udatasel);
940
984263bc
MD
941 /* was i386_user_cleanup() in NetBSD */
942 user_ldt_free(pcb);
984263bc
MD
943
944 bzero((char *)regs, sizeof(struct trapframe));
945 regs->tf_eip = entry;
946 regs->tf_esp = stack;
947 regs->tf_eflags = PSL_USER | (regs->tf_eflags & PSL_T);
948 regs->tf_ss = _udatasel;
949 regs->tf_ds = _udatasel;
950 regs->tf_es = _udatasel;
951 regs->tf_fs = _udatasel;
952 regs->tf_cs = _ucodesel;
953
954 /* PS_STRINGS value for BSD/OS binaries. It is 0 for non-BSD/OS. */
955 regs->tf_ebx = ps_strings;
956
957 /*
958 * Reset the hardware debug registers if they were in use.
959 * They won't have any meaning for the newly exec'd process.
960 */
961 if (pcb->pcb_flags & PCB_DBREGS) {
962 pcb->pcb_dr0 = 0;
963 pcb->pcb_dr1 = 0;
964 pcb->pcb_dr2 = 0;
965 pcb->pcb_dr3 = 0;
966 pcb->pcb_dr6 = 0;
967 pcb->pcb_dr7 = 0;
b7c628e4 968 if (pcb == curthread->td_pcb) {
984263bc
MD
969 /*
970 * Clear the debug registers on the running
971 * CPU, otherwise they will end up affecting
972 * the next process we switch to.
973 */
974 reset_dbregs();
975 }
976 pcb->pcb_flags &= ~PCB_DBREGS;
977 }
978
979 /*
980 * Initialize the math emulator (if any) for the current process.
981 * Actually, just clear the bit that says that the emulator has
982 * been initialized. Initialization is delayed until the process
983 * traps to the emulator (if it is done at all) mainly because
984 * emulators don't provide an entry point for initialization.
985 */
b7c628e4 986 p->p_thread->td_pcb->pcb_flags &= ~FP_SOFTFP;
984263bc
MD
987
988 /*
a02705a9
MD
989 * note: do not set CR0_TS here. npxinit() must do it after clearing
990 * gd_npxthread. Otherwise a preemptive interrupt thread may panic
991 * in npxdna().
984263bc 992 */
a02705a9
MD
993 crit_enter();
994 load_cr0(rcr0() | CR0_MP);
984263bc
MD
995
996#if NNPX > 0
997 /* Initialize the npx (if any) for the current process. */
998 npxinit(__INITIAL_NPXCW__);
999#endif
a02705a9 1000 crit_exit();
984263bc 1001
90b9818c
MD
1002 /*
1003 * note: linux emulator needs edx to be 0x0 on entry, which is
c0510e9a
MD
1004 * handled in execve simply by setting the 64 bit syscall
1005 * return value to 0.
90b9818c 1006 */
984263bc
MD
1007}
1008
1009void
1010cpu_setregs(void)
1011{
1012 unsigned int cr0;
1013
1014 cr0 = rcr0();
1015 cr0 |= CR0_NE; /* Done by npxinit() */
1016 cr0 |= CR0_MP | CR0_TS; /* Done at every execve() too. */
1017#ifdef I386_CPU
1018 if (cpu_class != CPUCLASS_386)
1019#endif
1020 cr0 |= CR0_WP | CR0_AM;
1021 load_cr0(cr0);
1022 load_gs(_udatasel);
1023}
1024
1025static int
1026sysctl_machdep_adjkerntz(SYSCTL_HANDLER_ARGS)
1027{
1028 int error;
1029 error = sysctl_handle_int(oidp, oidp->oid_arg1, oidp->oid_arg2,
1030 req);
1031 if (!error && req->newptr)
1032 resettodr();
1033 return (error);
1034}
1035
1036SYSCTL_PROC(_machdep, CPU_ADJKERNTZ, adjkerntz, CTLTYPE_INT|CTLFLAG_RW,
1037 &adjkerntz, 0, sysctl_machdep_adjkerntz, "I", "");
1038
1039SYSCTL_INT(_machdep, CPU_DISRTCSET, disable_rtc_set,
1040 CTLFLAG_RW, &disable_rtc_set, 0, "");
1041
1042SYSCTL_STRUCT(_machdep, CPU_BOOTINFO, bootinfo,
1043 CTLFLAG_RD, &bootinfo, bootinfo, "");
1044
1045SYSCTL_INT(_machdep, CPU_WALLCLOCK, wall_cmos_clock,
1046 CTLFLAG_RW, &wall_cmos_clock, 0, "");
1047
1048extern u_long bootdev; /* not a dev_t - encoding is different */
1049SYSCTL_ULONG(_machdep, OID_AUTO, guessed_bootdev,
1050 CTLFLAG_RD, &bootdev, 0, "Boot device (not in dev_t format)");
1051
1052/*
1053 * Initialize 386 and configure to run kernel
1054 */
1055
1056/*
1057 * Initialize segments & interrupt table
1058 */
1059
1060int _default_ldt;
1061union descriptor gdt[NGDT * MAXCPU]; /* global descriptor table */
1062static struct gate_descriptor idt0[NIDT];
1063struct gate_descriptor *idt = &idt0[0]; /* interrupt descriptor table */
1064union descriptor ldt[NLDT]; /* local descriptor table */
17a9f566
MD
1065
1066/* table descriptors - used to load tables by cpu */
984263bc 1067struct region_descriptor r_gdt, r_idt;
984263bc 1068
984263bc
MD
1069#if defined(I586_CPU) && !defined(NO_F00F_HACK)
1070extern int has_f00f_bug;
1071#endif
1072
1073static struct i386tss dblfault_tss;
1074static char dblfault_stack[PAGE_SIZE];
1075
1076extern struct user *proc0paddr;
1077
1078
1079/* software prototypes -- in more palatable form */
1080struct soft_segment_descriptor gdt_segs[] = {
1081/* GNULL_SEL 0 Null Descriptor */
1082{ 0x0, /* segment base address */
1083 0x0, /* length */
1084 0, /* segment type */
1085 0, /* segment descriptor priority level */
1086 0, /* segment descriptor present */
1087 0, 0,
1088 0, /* default 32 vs 16 bit size */
1089 0 /* limit granularity (byte/page units)*/ },
1090/* GCODE_SEL 1 Code Descriptor for kernel */
1091{ 0x0, /* segment base address */
1092 0xfffff, /* length - all address space */
1093 SDT_MEMERA, /* segment type */
1094 0, /* segment descriptor priority level */
1095 1, /* segment descriptor present */
1096 0, 0,
1097 1, /* default 32 vs 16 bit size */
1098 1 /* limit granularity (byte/page units)*/ },
1099/* GDATA_SEL 2 Data Descriptor for kernel */
1100{ 0x0, /* segment base address */
1101 0xfffff, /* length - all address space */
1102 SDT_MEMRWA, /* segment type */
1103 0, /* segment descriptor priority level */
1104 1, /* segment descriptor present */
1105 0, 0,
1106 1, /* default 32 vs 16 bit size */
1107 1 /* limit granularity (byte/page units)*/ },
1108/* GPRIV_SEL 3 SMP Per-Processor Private Data Descriptor */
1109{ 0x0, /* segment base address */
1110 0xfffff, /* length - all address space */
1111 SDT_MEMRWA, /* segment type */
1112 0, /* segment descriptor priority level */
1113 1, /* segment descriptor present */
1114 0, 0,
1115 1, /* default 32 vs 16 bit size */
1116 1 /* limit granularity (byte/page units)*/ },
1117/* GPROC0_SEL 4 Proc 0 Tss Descriptor */
1118{
1119 0x0, /* segment base address */
1120 sizeof(struct i386tss)-1,/* length - all address space */
1121 SDT_SYS386TSS, /* segment type */
1122 0, /* segment descriptor priority level */
1123 1, /* segment descriptor present */
1124 0, 0,
1125 0, /* unused - default 32 vs 16 bit size */
1126 0 /* limit granularity (byte/page units)*/ },
1127/* GLDT_SEL 5 LDT Descriptor */
1128{ (int) ldt, /* segment base address */
1129 sizeof(ldt)-1, /* length - all address space */
1130 SDT_SYSLDT, /* segment type */
1131 SEL_UPL, /* segment descriptor priority level */
1132 1, /* segment descriptor present */
1133 0, 0,
1134 0, /* unused - default 32 vs 16 bit size */
1135 0 /* limit granularity (byte/page units)*/ },
1136/* GUSERLDT_SEL 6 User LDT Descriptor per process */
1137{ (int) ldt, /* segment base address */
1138 (512 * sizeof(union descriptor)-1), /* length */
1139 SDT_SYSLDT, /* segment type */
1140 0, /* segment descriptor priority level */
1141 1, /* segment descriptor present */
1142 0, 0,
1143 0, /* unused - default 32 vs 16 bit size */
1144 0 /* limit granularity (byte/page units)*/ },
1145/* GTGATE_SEL 7 Null Descriptor - Placeholder */
1146{ 0x0, /* segment base address */
1147 0x0, /* length - all address space */
1148 0, /* segment type */
1149 0, /* segment descriptor priority level */
1150 0, /* segment descriptor present */
1151 0, 0,
1152 0, /* default 32 vs 16 bit size */
1153 0 /* limit granularity (byte/page units)*/ },
1154/* GBIOSLOWMEM_SEL 8 BIOS access to realmode segment 0x40, must be #8 in GDT */
1155{ 0x400, /* segment base address */
1156 0xfffff, /* length */
1157 SDT_MEMRWA, /* segment type */
1158 0, /* segment descriptor priority level */
1159 1, /* segment descriptor present */
1160 0, 0,
1161 1, /* default 32 vs 16 bit size */
1162 1 /* limit granularity (byte/page units)*/ },
1163/* GPANIC_SEL 9 Panic Tss Descriptor */
1164{ (int) &dblfault_tss, /* segment base address */
1165 sizeof(struct i386tss)-1,/* length - all address space */
1166 SDT_SYS386TSS, /* segment type */
1167 0, /* segment descriptor priority level */
1168 1, /* segment descriptor present */
1169 0, 0,
1170 0, /* unused - default 32 vs 16 bit size */
1171 0 /* limit granularity (byte/page units)*/ },
1172/* GBIOSCODE32_SEL 10 BIOS 32-bit interface (32bit Code) */
1173{ 0, /* segment base address (overwritten) */
1174 0xfffff, /* length */
1175 SDT_MEMERA, /* segment type */
1176 0, /* segment descriptor priority level */
1177 1, /* segment descriptor present */
1178 0, 0,
1179 0, /* default 32 vs 16 bit size */
1180 1 /* limit granularity (byte/page units)*/ },
1181/* GBIOSCODE16_SEL 11 BIOS 32-bit interface (16bit Code) */
1182{ 0, /* segment base address (overwritten) */
1183 0xfffff, /* length */
1184 SDT_MEMERA, /* segment type */
1185 0, /* segment descriptor priority level */
1186 1, /* segment descriptor present */
1187 0, 0,
1188 0, /* default 32 vs 16 bit size */
1189 1 /* limit granularity (byte/page units)*/ },
1190/* GBIOSDATA_SEL 12 BIOS 32-bit interface (Data) */
1191{ 0, /* segment base address (overwritten) */
1192 0xfffff, /* length */
1193 SDT_MEMRWA, /* segment type */
1194 0, /* segment descriptor priority level */
1195 1, /* segment descriptor present */
1196 0, 0,
1197 1, /* default 32 vs 16 bit size */
1198 1 /* limit granularity (byte/page units)*/ },
1199/* GBIOSUTIL_SEL 13 BIOS 16-bit interface (Utility) */
1200{ 0, /* segment base address (overwritten) */
1201 0xfffff, /* length */
1202 SDT_MEMRWA, /* segment type */
1203 0, /* segment descriptor priority level */
1204 1, /* segment descriptor present */
1205 0, 0,
1206 0, /* default 32 vs 16 bit size */
1207 1 /* limit granularity (byte/page units)*/ },
1208/* GBIOSARGS_SEL 14 BIOS 16-bit interface (Arguments) */
1209{ 0, /* segment base address (overwritten) */
1210 0xfffff, /* length */
1211 SDT_MEMRWA, /* segment type */
1212 0, /* segment descriptor priority level */
1213 1, /* segment descriptor present */
1214 0, 0,
1215 0, /* default 32 vs 16 bit size */
1216 1 /* limit granularity (byte/page units)*/ },
1217};
1218
1219static struct soft_segment_descriptor ldt_segs[] = {
1220 /* Null Descriptor - overwritten by call gate */
1221{ 0x0, /* segment base address */
1222 0x0, /* length - all address space */
1223 0, /* segment type */
1224 0, /* segment descriptor priority level */
1225 0, /* segment descriptor present */
1226 0, 0,
1227 0, /* default 32 vs 16 bit size */
1228 0 /* limit granularity (byte/page units)*/ },
1229 /* Null Descriptor - overwritten by call gate */
1230{ 0x0, /* segment base address */
1231 0x0, /* length - all address space */
1232 0, /* segment type */
1233 0, /* segment descriptor priority level */
1234 0, /* segment descriptor present */
1235 0, 0,
1236 0, /* default 32 vs 16 bit size */
1237 0 /* limit granularity (byte/page units)*/ },
1238 /* Null Descriptor - overwritten by call gate */
1239{ 0x0, /* segment base address */
1240 0x0, /* length - all address space */
1241 0, /* segment type */
1242 0, /* segment descriptor priority level */
1243 0, /* segment descriptor present */
1244 0, 0,
1245 0, /* default 32 vs 16 bit size */
1246 0 /* limit granularity (byte/page units)*/ },
1247 /* Code Descriptor for user */
1248{ 0x0, /* segment base address */
1249 0xfffff, /* length - all address space */
1250 SDT_MEMERA, /* segment type */
1251 SEL_UPL, /* segment descriptor priority level */
1252 1, /* segment descriptor present */
1253 0, 0,
1254 1, /* default 32 vs 16 bit size */
1255 1 /* limit granularity (byte/page units)*/ },
1256 /* Null Descriptor - overwritten by call gate */
1257{ 0x0, /* segment base address */
1258 0x0, /* length - all address space */
1259 0, /* segment type */
1260 0, /* segment descriptor priority level */
1261 0, /* segment descriptor present */
1262 0, 0,
1263 0, /* default 32 vs 16 bit size */
1264 0 /* limit granularity (byte/page units)*/ },
1265 /* Data Descriptor for user */
1266{ 0x0, /* segment base address */
1267 0xfffff, /* length - all address space */
1268 SDT_MEMRWA, /* segment type */
1269 SEL_UPL, /* segment descriptor priority level */
1270 1, /* segment descriptor present */
1271 0, 0,
1272 1, /* default 32 vs 16 bit size */
1273 1 /* limit granularity (byte/page units)*/ },
1274};
1275
1276void
1277setidt(idx, func, typ, dpl, selec)
1278 int idx;
1279 inthand_t *func;
1280 int typ;
1281 int dpl;
1282 int selec;
1283{
1284 struct gate_descriptor *ip;
1285
1286 ip = idt + idx;
1287 ip->gd_looffset = (int)func;
1288 ip->gd_selector = selec;
1289 ip->gd_stkcpy = 0;
1290 ip->gd_xx = 0;
1291 ip->gd_type = typ;
1292 ip->gd_dpl = dpl;
1293 ip->gd_p = 1;
1294 ip->gd_hioffset = ((int)func)>>16 ;
1295}
1296
1297#define IDTVEC(name) __CONCAT(X,name)
1298
1299extern inthand_t
1300 IDTVEC(div), IDTVEC(dbg), IDTVEC(nmi), IDTVEC(bpt), IDTVEC(ofl),
1301 IDTVEC(bnd), IDTVEC(ill), IDTVEC(dna), IDTVEC(fpusegm),
1302 IDTVEC(tss), IDTVEC(missing), IDTVEC(stk), IDTVEC(prot),
f7bc9806
MD
1303 IDTVEC(page), IDTVEC(mchk), IDTVEC(fpu), IDTVEC(align),
1304 IDTVEC(xmm), IDTVEC(syscall),
1305 IDTVEC(rsvd0);
a64ba182
MD
1306extern inthand_t
1307 IDTVEC(int0x80_syscall), IDTVEC(int0x81_syscall);
984263bc 1308
f7bc9806
MD
1309#ifdef DEBUG_INTERRUPTS
1310extern inthand_t *Xrsvdary[256];
1311#endif
1312
984263bc
MD
1313void
1314sdtossd(sd, ssd)
1315 struct segment_descriptor *sd;
1316 struct soft_segment_descriptor *ssd;
1317{
1318 ssd->ssd_base = (sd->sd_hibase << 24) | sd->sd_lobase;
1319 ssd->ssd_limit = (sd->sd_hilimit << 16) | sd->sd_lolimit;
1320 ssd->ssd_type = sd->sd_type;
1321 ssd->ssd_dpl = sd->sd_dpl;
1322 ssd->ssd_p = sd->sd_p;
1323 ssd->ssd_def32 = sd->sd_def32;
1324 ssd->ssd_gran = sd->sd_gran;
1325}
1326
1327#define PHYSMAP_SIZE (2 * 8)
1328
1329/*
1330 * Populate the (physmap) array with base/bound pairs describing the
1331 * available physical memory in the system, then test this memory and
1332 * build the phys_avail array describing the actually-available memory.
1333 *
1334 * If we cannot accurately determine the physical memory map, then use
1335 * value from the 0xE801 call, and failing that, the RTC.
1336 *
1337 * Total memory size may be set by the kernel environment variable
1338 * hw.physmem or the compile-time define MAXMEM.
1339 */
1340static void
1341getmemsize(int first)
1342{
1343 int i, physmap_idx, pa_indx;
1344 int hasbrokenint12;
1345 u_int basemem, extmem;
1346 struct vm86frame vmf;
1347 struct vm86context vmc;
1348 vm_offset_t pa, physmap[PHYSMAP_SIZE];
b5b32410 1349 pt_entry_t *pte;
984263bc
MD
1350 const char *cp;
1351 struct {
1352 u_int64_t base;
1353 u_int64_t length;
1354 u_int32_t type;
1355 } *smap;
1356
1357 hasbrokenint12 = 0;
1358 TUNABLE_INT_FETCH("hw.hasbrokenint12", &hasbrokenint12);
1359 bzero(&vmf, sizeof(struct vm86frame));
1360 bzero(physmap, sizeof(physmap));
1361 basemem = 0;
1362
1363 /*
1364 * Some newer BIOSes has broken INT 12H implementation which cause
1365 * kernel panic immediately. In this case, we need to scan SMAP
1366 * with INT 15:E820 first, then determine base memory size.
1367 */
1368 if (hasbrokenint12) {
1369 goto int15e820;
1370 }
1371
1372 /*
7febcc6e
MD
1373 * Perform "base memory" related probes & setup. If we get a crazy
1374 * value give the bios some scribble space just in case.
984263bc
MD
1375 */
1376 vm86_intcall(0x12, &vmf);
1377 basemem = vmf.vmf_ax;
1378 if (basemem > 640) {
7febcc6e
MD
1379 printf("Preposterous BIOS basemem of %uK, "
1380 "truncating to < 640K\n", basemem);
1381 basemem = 636;
984263bc
MD
1382 }
1383
1384 /*
1385 * XXX if biosbasemem is now < 640, there is a `hole'
1386 * between the end of base memory and the start of
1387 * ISA memory. The hole may be empty or it may
1388 * contain BIOS code or data. Map it read/write so
1389 * that the BIOS can write to it. (Memory from 0 to
1390 * the physical end of the kernel is mapped read-only
1391 * to begin with and then parts of it are remapped.
1392 * The parts that aren't remapped form holes that
1393 * remain read-only and are unused by the kernel.
1394 * The base memory area is below the physical end of
1395 * the kernel and right now forms a read-only hole.
1396 * The part of it from PAGE_SIZE to
1397 * (trunc_page(biosbasemem * 1024) - 1) will be
1398 * remapped and used by the kernel later.)
1399 *
1400 * This code is similar to the code used in
1401 * pmap_mapdev, but since no memory needs to be
1402 * allocated we simply change the mapping.
1403 */
1404 for (pa = trunc_page(basemem * 1024);
1405 pa < ISA_HOLE_START; pa += PAGE_SIZE) {
b5b32410 1406 pte = vtopte(pa + KERNBASE);
984263bc
MD
1407 *pte = pa | PG_RW | PG_V;
1408 }
1409
1410 /*
1411 * if basemem != 640, map pages r/w into vm86 page table so
1412 * that the bios can scribble on it.
1413 */
b5b32410 1414 pte = vm86paddr;
984263bc
MD
1415 for (i = basemem / 4; i < 160; i++)
1416 pte[i] = (i << PAGE_SHIFT) | PG_V | PG_RW | PG_U;
1417
1418int15e820:
1419 /*
1420 * map page 1 R/W into the kernel page table so we can use it
1421 * as a buffer. The kernel will unmap this page later.
1422 */
b5b32410 1423 pte = vtopte(KERNBASE + (1 << PAGE_SHIFT));
984263bc
MD
1424 *pte = (1 << PAGE_SHIFT) | PG_RW | PG_V;
1425
1426 /*
1427 * get memory map with INT 15:E820
1428 */
1429#define SMAPSIZ sizeof(*smap)
1430#define SMAP_SIG 0x534D4150 /* 'SMAP' */
1431
1432 vmc.npages = 0;
1433 smap = (void *)vm86_addpage(&vmc, 1, KERNBASE + (1 << PAGE_SHIFT));
1434 vm86_getptr(&vmc, (vm_offset_t)smap, &vmf.vmf_es, &vmf.vmf_di);
1435
1436 physmap_idx = 0;
1437 vmf.vmf_ebx = 0;
1438 do {
1439 vmf.vmf_eax = 0xE820;
1440 vmf.vmf_edx = SMAP_SIG;
1441 vmf.vmf_ecx = SMAPSIZ;
1442 i = vm86_datacall(0x15, &vmf, &vmc);
1443 if (i || vmf.vmf_eax != SMAP_SIG)
1444 break;
1445 if (boothowto & RB_VERBOSE)
1446 printf("SMAP type=%02x base=%08x %08x len=%08x %08x\n",
1447 smap->type,
1448 *(u_int32_t *)((char *)&smap->base + 4),
1449 (u_int32_t)smap->base,
1450 *(u_int32_t *)((char *)&smap->length + 4),
1451 (u_int32_t)smap->length);
1452
1453 if (smap->type != 0x01)
1454 goto next_run;
1455
1456 if (smap->length == 0)
1457 goto next_run;
1458
1459 if (smap->base >= 0xffffffff) {
1460 printf("%uK of memory above 4GB ignored\n",
1461 (u_int)(smap->length / 1024));
1462 goto next_run;
1463 }
1464
1465 for (i = 0; i <= physmap_idx; i += 2) {
1466 if (smap->base < physmap[i + 1]) {
1467 if (boothowto & RB_VERBOSE)
1468 printf(
1469 "Overlapping or non-montonic memory region, ignoring second region\n");
1470 goto next_run;
1471 }
1472 }
1473
1474 if (smap->base == physmap[physmap_idx + 1]) {
1475 physmap[physmap_idx + 1] += smap->length;
1476 goto next_run;
1477 }
1478
1479 physmap_idx += 2;
1480 if (physmap_idx == PHYSMAP_SIZE) {
1481 printf(
1482 "Too many segments in the physical address map, giving up\n");
1483 break;
1484 }
1485 physmap[physmap_idx] = smap->base;
1486 physmap[physmap_idx + 1] = smap->base + smap->length;
1487next_run:
6b08710e 1488 ; /* fix GCC3.x warning */
984263bc
MD
1489 } while (vmf.vmf_ebx != 0);
1490
1491 /*
1492 * Perform "base memory" related probes & setup based on SMAP
1493 */
1494 if (basemem == 0) {
1495 for (i = 0; i <= physmap_idx; i += 2) {
1496 if (physmap[i] == 0x00000000) {
1497 basemem = physmap[i + 1] / 1024;
1498 break;
1499 }
1500 }
1501
1502 if (basemem == 0) {
1503 basemem = 640;
1504 }
1505
1506 if (basemem > 640) {
1507 printf("Preposterous BIOS basemem of %uK, truncating to 640K\n",
1508 basemem);
1509 basemem = 640;
1510 }
1511
1512 for (pa = trunc_page(basemem * 1024);
1513 pa < ISA_HOLE_START; pa += PAGE_SIZE) {
b5b32410 1514 pte = vtopte(pa + KERNBASE);
984263bc
MD
1515 *pte = pa | PG_RW | PG_V;
1516 }
1517
b5b32410 1518 pte = vm86paddr;
984263bc
MD
1519 for (i = basemem / 4; i < 160; i++)
1520 pte[i] = (i << PAGE_SHIFT) | PG_V | PG_RW | PG_U;
1521 }
1522
1523 if (physmap[1] != 0)
1524 goto physmap_done;
1525
1526 /*
1527 * If we failed above, try memory map with INT 15:E801
1528 */
1529 vmf.vmf_ax = 0xE801;
1530 if (vm86_intcall(0x15, &vmf) == 0) {
1531 extmem = vmf.vmf_cx + vmf.vmf_dx * 64;
1532 } else {
1533#if 0
1534 vmf.vmf_ah = 0x88;
1535 vm86_intcall(0x15, &vmf);
1536 extmem = vmf.vmf_ax;
1537#else
1538 /*
1539 * Prefer the RTC value for extended memory.
1540 */
1541 extmem = rtcin(RTC_EXTLO) + (rtcin(RTC_EXTHI) << 8);
1542#endif
1543 }
1544
1545 /*
1546 * Special hack for chipsets that still remap the 384k hole when
1547 * there's 16MB of memory - this really confuses people that
1548 * are trying to use bus mastering ISA controllers with the
1549 * "16MB limit"; they only have 16MB, but the remapping puts
1550 * them beyond the limit.
1551 *
1552 * If extended memory is between 15-16MB (16-17MB phys address range),
1553 * chop it to 15MB.
1554 */
1555 if ((extmem > 15 * 1024) && (extmem < 16 * 1024))
1556 extmem = 15 * 1024;
1557
1558 physmap[0] = 0;
1559 physmap[1] = basemem * 1024;
1560 physmap_idx = 2;
1561 physmap[physmap_idx] = 0x100000;
1562 physmap[physmap_idx + 1] = physmap[physmap_idx] + extmem * 1024;
1563
1564physmap_done:
1565 /*
1566 * Now, physmap contains a map of physical memory.
1567 */
1568
1569#ifdef SMP
17a9f566 1570 /* make hole for AP bootstrap code YYY */
984263bc
MD
1571 physmap[1] = mp_bootaddress(physmap[1] / 1024);
1572
1573 /* look for the MP hardware - needed for apic addresses */
1574 mp_probe();
1575#endif
1576
1577 /*
1578 * Maxmem isn't the "maximum memory", it's one larger than the
1579 * highest page of the physical address space. It should be
1580 * called something like "Maxphyspage". We may adjust this
1581 * based on ``hw.physmem'' and the results of the memory test.
1582 */
1583 Maxmem = atop(physmap[physmap_idx + 1]);
1584
1585#ifdef MAXMEM
1586 Maxmem = MAXMEM / 4;
1587#endif
1588
1589 /*
eb7d35b8 1590 * hw.physmem is a size in bytes; we also allow k, m, and g suffixes
984263bc
MD
1591 * for the appropriate modifiers. This overrides MAXMEM.
1592 */
1593 if ((cp = getenv("hw.physmem")) != NULL) {
1594 u_int64_t AllowMem, sanity;
1595 char *ep;
1596
1597 sanity = AllowMem = strtouq(cp, &ep, 0);
1598 if ((ep != cp) && (*ep != 0)) {
1599 switch(*ep) {
1600 case 'g':
1601 case 'G':
1602 AllowMem <<= 10;
1603 case 'm':
1604 case 'M':
1605 AllowMem <<= 10;
1606 case 'k':
1607 case 'K':
1608 AllowMem <<= 10;
1609 break;
1610 default:
1611 AllowMem = sanity = 0;
1612 }
1613 if (AllowMem < sanity)
1614 AllowMem = 0;
1615 }
1616 if (AllowMem == 0)
1617 printf("Ignoring invalid memory size of '%s'\n", cp);
1618 else
1619 Maxmem = atop(AllowMem);
1620 }
1621
1622 if (atop(physmap[physmap_idx + 1]) != Maxmem &&
1623 (boothowto & RB_VERBOSE))
6ef943a3 1624 printf("Physical memory use set to %lluK\n", Maxmem * 4);
984263bc
MD
1625
1626 /*
1627 * If Maxmem has been increased beyond what the system has detected,
1628 * extend the last memory segment to the new limit.
1629 */
1630 if (atop(physmap[physmap_idx + 1]) < Maxmem)
1631 physmap[physmap_idx + 1] = ptoa(Maxmem);
1632
1633 /* call pmap initialization to make new kernel address space */
1634 pmap_bootstrap(first, 0);
1635
1636 /*
1637 * Size up each available chunk of physical memory.
1638 */
1639 physmap[0] = PAGE_SIZE; /* mask off page 0 */
1640 pa_indx = 0;
1641 phys_avail[pa_indx++] = physmap[0];
1642 phys_avail[pa_indx] = physmap[0];
b5b32410 1643 pte = CMAP1;
984263bc
MD
1644
1645 /*
1646 * physmap is in bytes, so when converting to page boundaries,
1647 * round up the start address and round down the end address.
1648 */
1649 for (i = 0; i <= physmap_idx; i += 2) {
1650 vm_offset_t end;
1651
1652 end = ptoa(Maxmem);
1653 if (physmap[i + 1] < end)
1654 end = trunc_page(physmap[i + 1]);
1655 for (pa = round_page(physmap[i]); pa < end; pa += PAGE_SIZE) {
1656 int tmp, page_bad;
1657#if 0
1658 int *ptr = 0;
1659#else
1660 int *ptr = (int *)CADDR1;
1661#endif
1662
1663 /*
1664 * block out kernel memory as not available.
1665 */
1666 if (pa >= 0x100000 && pa < first)
1667 continue;
1668
1669 page_bad = FALSE;
1670
1671 /*
1672 * map page into kernel: valid, read/write,non-cacheable
1673 */
1674 *pte = pa | PG_V | PG_RW | PG_N;
0f7a3396 1675 cpu_invltlb();
984263bc
MD
1676
1677 tmp = *(int *)ptr;
1678 /*
1679 * Test for alternating 1's and 0's
1680 */
1681 *(volatile int *)ptr = 0xaaaaaaaa;
1682 if (*(volatile int *)ptr != 0xaaaaaaaa) {
1683 page_bad = TRUE;
1684 }
1685 /*
1686 * Test for alternating 0's and 1's
1687 */
1688 *(volatile int *)ptr = 0x55555555;
1689 if (*(volatile int *)ptr != 0x55555555) {
1690 page_bad = TRUE;
1691 }
1692 /*
1693 * Test for all 1's
1694 */
1695 *(volatile int *)ptr = 0xffffffff;
1696 if (*(volatile int *)ptr != 0xffffffff) {
1697 page_bad = TRUE;
1698 }
1699 /*
1700 * Test for all 0's
1701 */
1702 *(volatile int *)ptr = 0x0;
1703 if (*(volatile int *)ptr != 0x0) {
1704 page_bad = TRUE;
1705 }
1706 /*
1707 * Restore original value.
1708 */
1709 *(int *)ptr = tmp;
1710
1711 /*
1712 * Adjust array of valid/good pages.
1713 */
1714 if (page_bad == TRUE) {
1715 continue;
1716 }
1717 /*
1718 * If this good page is a continuation of the
1719 * previous set of good pages, then just increase
1720 * the end pointer. Otherwise start a new chunk.
1721 * Note that "end" points one higher than end,
1722 * making the range >= start and < end.
1723 * If we're also doing a speculative memory
1724 * test and we at or past the end, bump up Maxmem
1725 * so that we keep going. The first bad page
1726 * will terminate the loop.
1727 */
1728 if (phys_avail[pa_indx] == pa) {
1729 phys_avail[pa_indx] += PAGE_SIZE;
1730 } else {
1731 pa_indx++;
1732 if (pa_indx == PHYS_AVAIL_ARRAY_END) {
1733 printf("Too many holes in the physical address space, giving up\n");
1734 pa_indx--;
1735 break;
1736 }
1737 phys_avail[pa_indx++] = pa; /* start */
1738 phys_avail[pa_indx] = pa + PAGE_SIZE; /* end */
1739 }
1740 physmem++;
1741 }
1742 }
1743 *pte = 0;
0f7a3396 1744 cpu_invltlb();
984263bc
MD
1745
1746 /*
1747 * XXX
1748 * The last chunk must contain at least one page plus the message
1749 * buffer to avoid complicating other code (message buffer address
1750 * calculation, etc.).
1751 */
1752 while (phys_avail[pa_indx - 1] + PAGE_SIZE +
1753 round_page(MSGBUF_SIZE) >= phys_avail[pa_indx]) {
1754 physmem -= atop(phys_avail[pa_indx] - phys_avail[pa_indx - 1]);
1755 phys_avail[pa_indx--] = 0;
1756 phys_avail[pa_indx--] = 0;
1757 }
1758
1759 Maxmem = atop(phys_avail[pa_indx]);
1760
1761 /* Trim off space for the message buffer. */
1762 phys_avail[pa_indx] -= round_page(MSGBUF_SIZE);
1763
1764 avail_end = phys_avail[pa_indx];
1765}
1766
f7bc9806
MD
1767/*
1768 * IDT VECTORS:
1769 * 0 Divide by zero
1770 * 1 Debug
1771 * 2 NMI
1772 * 3 BreakPoint
1773 * 4 OverFlow
1774 * 5 Bound-Range
1775 * 6 Invalid OpCode
1776 * 7 Device Not Available (x87)
1777 * 8 Double-Fault
1778 * 9 Coprocessor Segment overrun (unsupported, reserved)
1779 * 10 Invalid-TSS
1780 * 11 Segment not present
1781 * 12 Stack
1782 * 13 General Protection
1783 * 14 Page Fault
1784 * 15 Reserved
1785 * 16 x87 FP Exception pending
1786 * 17 Alignment Check
1787 * 18 Machine Check
1788 * 19 SIMD floating point
1789 * 20-31 reserved
1790 * 32-255 INTn/external sources
1791 */
984263bc 1792void
17a9f566 1793init386(int first)
984263bc
MD
1794{
1795 struct gate_descriptor *gdp;
1796 int gsel_tss, metadata_missing, off, x;
85100692 1797 struct mdglobaldata *gd;
984263bc
MD
1798
1799 /*
1800 * Prevent lowering of the ipl if we call tsleep() early.
1801 */
85100692 1802 gd = &CPU_prvspace[0].mdglobaldata;
8a8d5d85 1803 bzero(gd, sizeof(*gd));
984263bc 1804
85100692 1805 gd->mi.gd_curthread = &thread0;
984263bc
MD
1806
1807 atdevbase = ISA_HOLE_START + KERNBASE;
1808
1809 metadata_missing = 0;
1810 if (bootinfo.bi_modulep) {
1811 preload_metadata = (caddr_t)bootinfo.bi_modulep + KERNBASE;
1812 preload_bootstrap_relocate(KERNBASE);
1813 } else {
1814 metadata_missing = 1;
1815 }
1816 if (bootinfo.bi_envp)
1817 kern_envp = (caddr_t)bootinfo.bi_envp + KERNBASE;
1818
c5cc06e3
MD
1819 /*
1820 * start with one cpu. Note: ncpus2_shift and ncpus2_mask are left
1821 * at 0.
1822 */
4e8e646b 1823 ncpus = 1;
c5cc06e3 1824 ncpus2 = 1;
984263bc
MD
1825 /* Init basic tunables, hz etc */
1826 init_param1();
1827
1828 /*
1829 * make gdt memory segments, the code segment goes up to end of the
1830 * page with etext in it, the data segment goes to the end of
1831 * the address space
1832 */
1833 /*
1834 * XXX text protection is temporarily (?) disabled. The limit was
1835 * i386_btop(round_page(etext)) - 1.
1836 */
1837 gdt_segs[GCODE_SEL].ssd_limit = atop(0 - 1);
1838 gdt_segs[GDATA_SEL].ssd_limit = atop(0 - 1);
17a9f566 1839
984263bc
MD
1840 gdt_segs[GPRIV_SEL].ssd_limit =
1841 atop(sizeof(struct privatespace) - 1);
8ad65e08 1842 gdt_segs[GPRIV_SEL].ssd_base = (int) &CPU_prvspace[0];
984263bc 1843 gdt_segs[GPROC0_SEL].ssd_base =
85100692 1844 (int) &CPU_prvspace[0].mdglobaldata.gd_common_tss;
17a9f566 1845
85100692 1846 gd->mi.gd_prvspace = &CPU_prvspace[0];
17a9f566 1847
84b592ba
MD
1848 /*
1849 * Note: on both UP and SMP curthread must be set non-NULL
1850 * early in the boot sequence because the system assumes
1851 * that 'curthread' is never NULL.
1852 */
984263bc
MD
1853
1854 for (x = 0; x < NGDT; x++) {
1855#ifdef BDE_DEBUGGER
1856 /* avoid overwriting db entries with APM ones */
1857 if (x >= GAPMCODE32_SEL && x <= GAPMDATA_SEL)
1858 continue;
1859#endif
1860 ssdtosd(&gdt_segs[x], &gdt[x].sd);
1861 }
1862
1863 r_gdt.rd_limit = NGDT * sizeof(gdt[0]) - 1;
1864 r_gdt.rd_base = (int) gdt;
1865 lgdt(&r_gdt);
1866
73e4f7b9
MD
1867 mi_gdinit(&gd->mi, 0);
1868 cpu_gdinit(gd, 0);
1869 lwkt_init_thread(&thread0, proc0paddr, 0, &gd->mi);
1870 lwkt_set_comm(&thread0, "thread0");
1871 proc0.p_addr = (void *)thread0.td_kstack;
1872 proc0.p_thread = &thread0;
a2a5ad0d 1873 proc0.p_flag |= P_CP_RELEASED; /* early set. See also init_main.c */
98a7f915 1874 varsymset_init(&proc0.p_varsymset, NULL);
d9eea1a5 1875 thread0.td_flags |= TDF_RUNNING;
73e4f7b9
MD
1876 thread0.td_proc = &proc0;
1877 thread0.td_switch = cpu_heavy_switch; /* YYY eventually LWKT */
1878 safepri = thread0.td_cpl = SWI_MASK | HWI_MASK;
1879
984263bc
MD
1880 /* make ldt memory segments */
1881 /*
1882 * XXX - VM_MAXUSER_ADDRESS is an end address, not a max. And it
1883 * should be spelled ...MAX_USER...
1884 */
1885 ldt_segs[LUCODE_SEL].ssd_limit = atop(VM_MAXUSER_ADDRESS - 1);
1886 ldt_segs[LUDATA_SEL].ssd_limit = atop(VM_MAXUSER_ADDRESS - 1);
1887 for (x = 0; x < sizeof ldt_segs / sizeof ldt_segs[0]; x++)
1888 ssdtosd(&ldt_segs[x], &ldt[x].sd);
1889
1890 _default_ldt = GSEL(GLDT_SEL, SEL_KPL);
1891 lldt(_default_ldt);
17a9f566 1892 gd->gd_currentldt = _default_ldt;
8a8d5d85
MD
1893 /* spinlocks and the BGL */
1894 init_locks();
984263bc
MD
1895
1896 /* exceptions */
f7bc9806
MD
1897 for (x = 0; x < NIDT; x++) {
1898#ifdef DEBUG_INTERRUPTS
1899 setidt(x, Xrsvdary[x], SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL));
1900#else
1901 setidt(x, &IDTVEC(rsvd0), SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL));
1902#endif
1903 }
984263bc
MD
1904 setidt(0, &IDTVEC(div), SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL));
1905 setidt(1, &IDTVEC(dbg), SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL));
1906 setidt(2, &IDTVEC(nmi), SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL));
1907 setidt(3, &IDTVEC(bpt), SDT_SYS386TGT, SEL_UPL, GSEL(GCODE_SEL, SEL_KPL));
1908 setidt(4, &IDTVEC(ofl), SDT_SYS386TGT, SEL_UPL, GSEL(GCODE_SEL, SEL_KPL));
1909 setidt(5, &IDTVEC(bnd), SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL));
1910 setidt(6, &IDTVEC(ill), SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL));
1911 setidt(7, &IDTVEC(dna), SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL));
1912 setidt(8, 0, SDT_SYSTASKGT, SEL_KPL, GSEL(GPANIC_SEL, SEL_KPL));
1913 setidt(9, &IDTVEC(fpusegm), SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL));
1914 setidt(10, &IDTVEC(tss), SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL));
1915 setidt(11, &IDTVEC(missing), SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL));
1916 setidt(12, &IDTVEC(stk), SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL));
1917 setidt(13, &IDTVEC(prot), SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL));
1918 setidt(14, &IDTVEC(page), SDT_SYS386IGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL));
f7bc9806 1919 setidt(15, &IDTVEC(rsvd0), SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL));
984263bc
MD
1920 setidt(16, &IDTVEC(fpu), SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL));
1921 setidt(17, &IDTVEC(align), SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL));
1922 setidt(18, &IDTVEC(mchk), SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL));
1923 setidt(19, &IDTVEC(xmm), SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL));
1924 setidt(0x80, &IDTVEC(int0x80_syscall),
1925 SDT_SYS386TGT, SEL_UPL, GSEL(GCODE_SEL, SEL_KPL));
a64ba182
MD
1926 setidt(0x81, &IDTVEC(int0x81_syscall),
1927 SDT_SYS386TGT, SEL_UPL, GSEL(GCODE_SEL, SEL_KPL));
984263bc
MD
1928
1929 r_idt.rd_limit = sizeof(idt0) - 1;
1930 r_idt.rd_base = (int) idt;
1931 lidt(&r_idt);
1932
1933 /*
1934 * Initialize the console before we print anything out.
1935 */
1936 cninit();
1937
1938 if (metadata_missing)
1939 printf("WARNING: loader(8) metadata is missing!\n");
1940
984263bc
MD
1941#if NISA >0
1942 isa_defaultirq();
1943#endif
1944 rand_initialize();
1945
1946#ifdef DDB
1947 kdb_init();
1948 if (boothowto & RB_KDB)
1949 Debugger("Boot flags requested debugger");
1950#endif
1951
1952 finishidentcpu(); /* Final stage of CPU initialization */
1953 setidt(6, &IDTVEC(ill), SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL));
1954 setidt(13, &IDTVEC(prot), SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL));
1955 initializecpu(); /* Initialize CPU registers */
1956
b7c628e4
MD
1957 /*
1958 * make an initial tss so cpu can get interrupt stack on syscall!
1959 * The 16 bytes is to save room for a VM86 context.
1960 */
17a9f566
MD
1961 gd->gd_common_tss.tss_esp0 = (int) thread0.td_pcb - 16;
1962 gd->gd_common_tss.tss_ss0 = GSEL(GDATA_SEL, SEL_KPL) ;
984263bc 1963 gsel_tss = GSEL(GPROC0_SEL, SEL_KPL);
17a9f566
MD
1964 gd->gd_tss_gdt = &gdt[GPROC0_SEL].sd;
1965 gd->gd_common_tssd = *gd->gd_tss_gdt;
85100692 1966 gd->gd_common_tss.tss_ioopt = (sizeof gd->gd_common_tss) << 16;
984263bc
MD
1967 ltr(gsel_tss);
1968
1969 dblfault_tss.tss_esp = dblfault_tss.tss_esp0 = dblfault_tss.tss_esp1 =
1970 dblfault_tss.tss_esp2 = (int) &dblfault_stack[sizeof(dblfault_stack)];
1971 dblfault_tss.tss_ss = dblfault_tss.tss_ss0 = dblfault_tss.tss_ss1 =
1972 dblfault_tss.tss_ss2 = GSEL(GDATA_SEL, SEL_KPL);
1973 dblfault_tss.tss_cr3 = (int)IdlePTD;
1974 dblfault_tss.tss_eip = (int) dblfault_handler;
1975 dblfault_tss.tss_eflags = PSL_KERNEL;
1976 dblfault_tss.tss_ds = dblfault_tss.tss_es =
1977 dblfault_tss.tss_gs = GSEL(GDATA_SEL, SEL_KPL);
1978 dblfault_tss.tss_fs = GSEL(GPRIV_SEL, SEL_KPL);
1979 dblfault_tss.tss_cs = GSEL(GCODE_SEL, SEL_KPL);
1980 dblfault_tss.tss_ldt = GSEL(GLDT_SEL, SEL_KPL);
1981
1982 vm86_initialize();
1983 getmemsize(first);
1984 init_param2(physmem);
1985
1986 /* now running on new page tables, configured,and u/iom is accessible */
1987
1988 /* Map the message buffer. */
1989 for (off = 0; off < round_page(MSGBUF_SIZE); off += PAGE_SIZE)
1990 pmap_kenter((vm_offset_t)msgbufp + off, avail_end + off);
1991
1992 msgbufinit(msgbufp, MSGBUF_SIZE);
1993
1994 /* make a call gate to reenter kernel with */
1995 gdp = &ldt[LSYS5CALLS_SEL].gd;
1996
1997 x = (int) &IDTVEC(syscall);
1998 gdp->gd_looffset = x++;
1999 gdp->gd_selector = GSEL(GCODE_SEL,SEL_KPL);
2000 gdp->gd_stkcpy = 1;
2001 gdp->gd_type = SDT_SYS386CGT;
2002 gdp->gd_dpl = SEL_UPL;
2003 gdp->gd_p = 1;
2004 gdp->gd_hioffset = ((int) &IDTVEC(syscall)) >>16;
2005
2006 /* XXX does this work? */
2007 ldt[LBSDICALLS_SEL] = ldt[LSYS5CALLS_SEL];
2008 ldt[LSOL26CALLS_SEL] = ldt[LSYS5CALLS_SEL];
2009
2010 /* transfer to user mode */
2011
2012 _ucodesel = LSEL(LUCODE_SEL, SEL_UPL);
2013 _udatasel = LSEL(LUDATA_SEL, SEL_UPL);
2014
2015 /* setup proc 0's pcb */
b7c628e4
MD
2016 thread0.td_pcb->pcb_flags = 0;
2017 thread0.td_pcb->pcb_cr3 = (int)IdlePTD; /* should already be setup */
b7c628e4 2018 thread0.td_pcb->pcb_ext = 0;
984263bc
MD
2019 proc0.p_md.md_regs = &proc0_tf;
2020}
2021
8ad65e08 2022/*
17a9f566
MD
2023 * Initialize machine-dependant portions of the global data structure.
2024 * Note that the global data area and cpu0's idlestack in the private
2025 * data space were allocated in locore.
ef0fdad1
MD
2026 *
2027 * Note: the idlethread's cpl is 0
73e4f7b9
MD
2028 *
2029 * WARNING! Called from early boot, 'mycpu' may not work yet.
8ad65e08
MD
2030 */
2031void
85100692 2032cpu_gdinit(struct mdglobaldata *gd, int cpu)
8ad65e08
MD
2033{
2034 char *sp;
8ad65e08 2035
7d0bac62 2036 if (cpu)
a2a5ad0d 2037 gd->mi.gd_curthread = &gd->mi.gd_idlethread;
17a9f566 2038
85100692 2039 sp = gd->mi.gd_prvspace->idlestack;
a2a5ad0d
MD
2040 lwkt_init_thread(&gd->mi.gd_idlethread, sp, 0, &gd->mi);
2041 lwkt_set_comm(&gd->mi.gd_idlethread, "idle_%d", cpu);
2042 gd->mi.gd_idlethread.td_switch = cpu_lwkt_switch;
2043 gd->mi.gd_idlethread.td_sp -= sizeof(void *);
2044 *(void **)gd->mi.gd_idlethread.td_sp = cpu_idle_restore;
8ad65e08
MD
2045}
2046
12e4aaff
MD
2047struct globaldata *
2048globaldata_find(int cpu)
2049{
2050 KKASSERT(cpu >= 0 && cpu < ncpus);
2051 return(&CPU_prvspace[cpu].mdglobaldata.mi);
2052}
2053
984263bc
MD
2054#if defined(I586_CPU) && !defined(NO_F00F_HACK)
2055static void f00f_hack(void *unused);
2056SYSINIT(f00f_hack, SI_SUB_INTRINSIC, SI_ORDER_FIRST, f00f_hack, NULL);
2057
2058static void
17a9f566
MD
2059f00f_hack(void *unused)
2060{
984263bc 2061 struct gate_descriptor *new_idt;
984263bc
MD
2062 vm_offset_t tmp;
2063
2064 if (!has_f00f_bug)
2065 return;
2066
2067 printf("Intel Pentium detected, installing workaround for F00F bug\n");
2068
2069 r_idt.rd_limit = sizeof(idt0) - 1;
2070
2071 tmp = kmem_alloc(kernel_map, PAGE_SIZE * 2);
2072 if (tmp == 0)
2073 panic("kmem_alloc returned 0");
2074 if (((unsigned int)tmp & (PAGE_SIZE-1)) != 0)
2075 panic("kmem_alloc returned non-page-aligned memory");
2076 /* Put the first seven entries in the lower page */
2077 new_idt = (struct gate_descriptor*)(tmp + PAGE_SIZE - (7*8));
2078 bcopy(idt, new_idt, sizeof(idt0));
2079 r_idt.rd_base = (int)new_idt;
2080 lidt(&r_idt);
2081 idt = new_idt;
2082 if (vm_map_protect(kernel_map, tmp, tmp + PAGE_SIZE,
2083 VM_PROT_READ, FALSE) != KERN_SUCCESS)
2084 panic("vm_map_protect failed");
2085 return;
2086}
2087#endif /* defined(I586_CPU) && !NO_F00F_HACK */
2088
2089int
2090ptrace_set_pc(p, addr)
2091 struct proc *p;
2092 unsigned long addr;
2093{
2094 p->p_md.md_regs->tf_eip = addr;
2095 return (0);
2096}
2097
2098int
2099ptrace_single_step(p)
2100 struct proc *p;
2101{
2102 p->p_md.md_regs->tf_eflags |= PSL_T;
2103 return (0);
2104}
2105
2106int ptrace_read_u_check(p, addr, len)
2107 struct proc *p;
2108 vm_offset_t addr;
2109 size_t len;
2110{
2111 vm_offset_t gap;
2112
2113 if ((vm_offset_t) (addr + len) < addr)
2114 return EPERM;
2115 if ((vm_offset_t) (addr + len) <= sizeof(struct user))
2116 return 0;
2117
2118 gap = (char *) p->p_md.md_regs - (char *) p->p_addr;
2119
2120 if ((vm_offset_t) addr < gap)
2121 return EPERM;
2122 if ((vm_offset_t) (addr + len) <=
2123 (vm_offset_t) (gap + sizeof(struct trapframe)))
2124 return 0;
2125 return EPERM;
2126}
2127
2128int ptrace_write_u(p, off, data)
2129 struct proc *p;
2130 vm_offset_t off;
2131 long data;
2132{
2133 struct trapframe frame_copy;
2134 vm_offset_t min;
2135 struct trapframe *tp;
2136
2137 /*
2138 * Privileged kernel state is scattered all over the user area.
2139 * Only allow write access to parts of regs and to fpregs.
2140 */
2141 min = (char *)p->p_md.md_regs - (char *)p->p_addr;
2142 if (off >= min && off <= min + sizeof(struct trapframe) - sizeof(int)) {
2143 tp = p->p_md.md_regs;
2144 frame_copy = *tp;
2145 *(int *)((char *)&frame_copy + (off - min)) = data;
2146 if (!EFL_SECURE(frame_copy.tf_eflags, tp->tf_eflags) ||
2147 !CS_SECURE(frame_copy.tf_cs))
2148 return (EINVAL);
2149 *(int*)((char *)p->p_addr + off) = data;
2150 return (0);
2151 }
b7c628e4
MD
2152
2153 /*
2154 * The PCB is at the end of the user area YYY
2155 */
2156 min = (char *)p->p_thread->td_pcb - (char *)p->p_addr;
2157 min += offsetof(struct pcb, pcb_save);
984263bc
MD
2158 if (off >= min && off <= min + sizeof(union savefpu) - sizeof(int)) {
2159 *(int*)((char *)p->p_addr + off) = data;
2160 return (0);
2161 }
2162 return (EFAULT);
2163}
2164
2165int
2166fill_regs(p, regs)
2167 struct proc *p;
2168 struct reg *regs;
2169{
2170 struct pcb *pcb;
2171 struct trapframe *tp;
2172
2173 tp = p->p_md.md_regs;
2174 regs->r_fs = tp->tf_fs;
2175 regs->r_es = tp->tf_es;
2176 regs->r_ds = tp->tf_ds;
2177 regs->r_edi = tp->tf_edi;
2178 regs->r_esi = tp->tf_esi;
2179 regs->r_ebp = tp->tf_ebp;
2180 regs->r_ebx = tp->tf_ebx;
2181 regs->r_edx = tp->tf_edx;
2182 regs->r_ecx = tp->tf_ecx;
2183 regs->r_eax = tp->tf_eax;
2184 regs->r_eip = tp->tf_eip;
2185 regs->r_cs = tp->tf_cs;
2186 regs->r_eflags = tp->tf_eflags;
2187 regs->r_esp = tp->tf_esp;
2188 regs->r_ss = tp->tf_ss;
b7c628e4 2189 pcb = p->p_thread->td_pcb;
984263bc
MD
2190 regs->r_gs = pcb->pcb_gs;
2191 return (0);
2192}
2193
2194int
2195set_regs(p, regs)
2196 struct proc *p;
2197 struct reg *regs;
2198{
2199 struct pcb *pcb;
2200 struct trapframe *tp;
2201
2202 tp = p->p_md.md_regs;
2203 if (!EFL_SECURE(regs->r_eflags, tp->tf_eflags) ||
2204 !CS_SECURE(regs->r_cs))
2205 return (EINVAL);
2206 tp->tf_fs = regs->r_fs;
2207 tp->tf_es = regs->r_es;
2208 tp->tf_ds = regs->r_ds;
2209 tp->tf_edi = regs->r_edi;
2210 tp->tf_esi = regs->r_esi;
2211 tp->tf_ebp = regs->r_ebp;
2212 tp->tf_ebx = regs->r_ebx;
2213 tp->tf_edx = regs->r_edx;
2214 tp->tf_ecx = regs->r_ecx;
2215 tp->tf_eax = regs->r_eax;
2216 tp->tf_eip = regs->r_eip;
2217 tp->tf_cs = regs->r_cs;
2218 tp->tf_eflags = regs->r_eflags;
2219 tp->tf_esp = regs->r_esp;
2220 tp->tf_ss = regs->r_ss;
b7c628e4 2221 pcb = p->p_thread->td_pcb;
984263bc
MD
2222 pcb->pcb_gs = regs->r_gs;
2223 return (0);
2224}
2225
642a6e88 2226#ifndef CPU_DISABLE_SSE
984263bc
MD
2227static void
2228fill_fpregs_xmm(sv_xmm, sv_87)
2229 struct savexmm *sv_xmm;
2230 struct save87 *sv_87;
2231{
c9faf524
RG
2232 struct env87 *penv_87 = &sv_87->sv_env;
2233 struct envxmm *penv_xmm = &sv_xmm->sv_env;
984263bc
MD
2234 int i;
2235
2236 /* FPU control/status */
2237 penv_87->en_cw = penv_xmm->en_cw;
2238 penv_87->en_sw = penv_xmm->en_sw;
2239 penv_87->en_tw = penv_xmm->en_tw;
2240 penv_87->en_fip = penv_xmm->en_fip;
2241 penv_87->en_fcs = penv_xmm->en_fcs;
2242 penv_87->en_opcode = penv_xmm->en_opcode;
2243 penv_87->en_foo = penv_xmm->en_foo;
2244 penv_87->en_fos = penv_xmm->en_fos;
2245
2246 /* FPU registers */
2247 for (i = 0; i < 8; ++i)
2248 sv_87->sv_ac[i] = sv_xmm->sv_fp[i].fp_acc;
2249
2250 sv_87->sv_ex_sw = sv_xmm->sv_ex_sw;
2251}
2252
2253static void
2254set_fpregs_xmm(sv_87, sv_xmm)
2255 struct save87 *sv_87;
2256 struct savexmm *sv_xmm;
2257{
c9faf524
RG
2258 struct env87 *penv_87 = &sv_87->sv_env;
2259 struct envxmm *penv_xmm = &sv_xmm->sv_env;
984263bc
MD
2260 int i;
2261
2262 /* FPU control/status */
2263 penv_xmm->en_cw = penv_87->en_cw;
2264 penv_xmm->en_sw = penv_87->en_sw;
2265 penv_xmm->en_tw = penv_87->en_tw;
2266 penv_xmm->en_fip = penv_87->en_fip;
2267 penv_xmm->en_fcs = penv_87->en_fcs;
2268 penv_xmm->en_opcode = penv_87->en_opcode;
2269 penv_xmm->en_foo = penv_87->en_foo;
2270 penv_xmm->en_fos = penv_87->en_fos;
2271
2272 /* FPU registers */
2273 for (i = 0; i < 8; ++i)
2274 sv_xmm->sv_fp[i].fp_acc = sv_87->sv_ac[i];
2275
2276 sv_xmm->sv_ex_sw = sv_87->sv_ex_sw;
2277}
642a6e88 2278#endif /* CPU_DISABLE_SSE */
984263bc
MD
2279
2280int
2281fill_fpregs(p, fpregs)
2282 struct proc *p;
2283 struct fpreg *fpregs;
2284{
642a6e88 2285#ifndef CPU_DISABLE_SSE
984263bc 2286 if (cpu_fxsr) {
b7c628e4 2287 fill_fpregs_xmm(&p->p_thread->td_pcb->pcb_save.sv_xmm,
984263bc
MD
2288 (struct save87 *)fpregs);
2289 return (0);
2290 }
642a6e88 2291#endif /* CPU_DISABLE_SSE */
b7c628e4 2292 bcopy(&p->p_thread->td_pcb->pcb_save.sv_87, fpregs, sizeof *fpregs);
984263bc
MD
2293 return (0);
2294}
2295
2296int
2297set_fpregs(p, fpregs)
2298 struct proc *p;
2299 struct fpreg *fpregs;
2300{
642a6e88 2301#ifndef CPU_DISABLE_SSE
984263bc
MD
2302 if (cpu_fxsr) {
2303 set_fpregs_xmm((struct save87 *)fpregs,
b7c628e4 2304 &p->p_thread->td_pcb->pcb_save.sv_xmm);
984263bc
MD
2305 return (0);
2306 }
642a6e88 2307#endif /* CPU_DISABLE_SSE */
b7c628e4 2308 bcopy(fpregs, &p->p_thread->td_pcb->pcb_save.sv_87, sizeof *fpregs);
984263bc
MD
2309 return (0);
2310}
2311
2312int
2313fill_dbregs(p, dbregs)
2314 struct proc *p;
2315 struct dbreg *dbregs;
2316{
2317 struct pcb *pcb;
2318
2319 if (p == NULL) {
2320 dbregs->dr0 = rdr0();
2321 dbregs->dr1 = rdr1();
2322 dbregs->dr2 = rdr2();
2323 dbregs->dr3 = rdr3();
2324 dbregs->dr4 = rdr4();
2325 dbregs->dr5 = rdr5();
2326 dbregs->dr6 = rdr6();
2327 dbregs->dr7 = rdr7();
2328 }
2329 else {
b7c628e4 2330 pcb = p->p_thread->td_pcb;
984263bc
MD
2331 dbregs->dr0 = pcb->pcb_dr0;
2332 dbregs->dr1 = pcb->pcb_dr1;
2333 dbregs->dr2 = pcb->pcb_dr2;
2334 dbregs->dr3 = pcb->pcb_dr3;
2335 dbregs->dr4 = 0;
2336 dbregs->dr5 = 0;
2337 dbregs->dr6 = pcb->pcb_dr6;
2338 dbregs->dr7 = pcb->pcb_dr7;
2339 }
2340 return (0);
2341}
2342
2343int
2344set_dbregs(p, dbregs)
2345 struct proc *p;
2346 struct dbreg *dbregs;
2347{
2348 struct pcb *pcb;
2349 int i;
2350 u_int32_t mask1, mask2;
2351
2352 if (p == NULL) {
2353 load_dr0(dbregs->dr0);
2354 load_dr1(dbregs->dr1);
2355 load_dr2(dbregs->dr2);
2356 load_dr3(dbregs->dr3);
2357 load_dr4(dbregs->dr4);
2358 load_dr5(dbregs->dr5);
2359 load_dr6(dbregs->dr6);
2360 load_dr7(dbregs->dr7);
2361 }
2362 else {
2363 /*
2364 * Don't let an illegal value for dr7 get set. Specifically,
2365 * check for undefined settings. Setting these bit patterns
2366 * result in undefined behaviour and can lead to an unexpected
2367 * TRCTRAP.
2368 */
2369 for (i = 0, mask1 = 0x3<<16, mask2 = 0x2<<16; i < 8;
2370 i++, mask1 <<= 2, mask2 <<= 2)
2371 if ((dbregs->dr7 & mask1) == mask2)
2372 return (EINVAL);
2373
b7c628e4 2374 pcb = p->p_thread->td_pcb;
984263bc
MD
2375
2376 /*
2377 * Don't let a process set a breakpoint that is not within the
2378 * process's address space. If a process could do this, it
2379 * could halt the system by setting a breakpoint in the kernel
2380 * (if ddb was enabled). Thus, we need to check to make sure
2381 * that no breakpoints are being enabled for addresses outside
2382 * process's address space, unless, perhaps, we were called by
2383 * uid 0.
2384 *
2385 * XXX - what about when the watched area of the user's
2386 * address space is written into from within the kernel
2387 * ... wouldn't that still cause a breakpoint to be generated
2388 * from within kernel mode?
2389 */
2390
dadab5e9 2391 if (suser_cred(p->p_ucred, 0) != 0) {
984263bc
MD
2392 if (dbregs->dr7 & 0x3) {
2393 /* dr0 is enabled */
2394 if (dbregs->dr0 >= VM_MAXUSER_ADDRESS)
2395 return (EINVAL);
2396 }
2397
2398 if (dbregs->dr7 & (0x3<<2)) {
2399 /* dr1 is enabled */
2400 if (dbregs->dr1 >= VM_MAXUSER_ADDRESS)
2401 return (EINVAL);
2402 }
2403
2404 if (dbregs->dr7 & (0x3<<4)) {
2405 /* dr2 is enabled */
2406 if (dbregs->dr2 >= VM_MAXUSER_ADDRESS)
2407 return (EINVAL);
2408 }
2409
2410 if (dbregs->dr7 & (0x3<<6)) {
2411 /* dr3 is enabled */
2412 if (dbregs->dr3 >= VM_MAXUSER_ADDRESS)
2413 return (EINVAL);
2414 }
2415 }
2416
2417 pcb->pcb_dr0 = dbregs->dr0;
2418 pcb->pcb_dr1 = dbregs->dr1;
2419 pcb->pcb_dr2 = dbregs->dr2;
2420 pcb->pcb_dr3 = dbregs->dr3;
2421 pcb->pcb_dr6 = dbregs->dr6;
2422 pcb->pcb_dr7 = dbregs->dr7;
2423
2424 pcb->pcb_flags |= PCB_DBREGS;
2425 }
2426
2427 return (0);
2428}
2429
2430/*
2431 * Return > 0 if a hardware breakpoint has been hit, and the
2432 * breakpoint was in user space. Return 0, otherwise.
2433 */
2434int
2435user_dbreg_trap(void)
2436{
2437 u_int32_t dr7, dr6; /* debug registers dr6 and dr7 */
2438 u_int32_t bp; /* breakpoint bits extracted from dr6 */
2439 int nbp; /* number of breakpoints that triggered */
2440 caddr_t addr[4]; /* breakpoint addresses */
2441 int i;
2442
2443 dr7 = rdr7();
2444 if ((dr7 & 0x000000ff) == 0) {
2445 /*
2446 * all GE and LE bits in the dr7 register are zero,
2447 * thus the trap couldn't have been caused by the
2448 * hardware debug registers
2449 */
2450 return 0;
2451 }
2452
2453 nbp = 0;
2454 dr6 = rdr6();
2455 bp = dr6 & 0x0000000f;
2456
2457 if (!bp) {
2458 /*
2459 * None of the breakpoint bits are set meaning this
2460 * trap was not caused by any of the debug registers
2461 */
2462 return 0;
2463 }
2464
2465 /*
2466 * at least one of the breakpoints were hit, check to see
2467 * which ones and if any of them are user space addresses
2468 */
2469
2470 if (bp & 0x01) {
2471 addr[nbp++] = (caddr_t)rdr0();
2472 }
2473 if (bp & 0x02) {
2474 addr[nbp++] = (caddr_t)rdr1();
2475 }
2476 if (bp & 0x04) {
2477 addr[nbp++] = (caddr_t)rdr2();
2478 }
2479 if (bp & 0x08) {
2480 addr[nbp++] = (caddr_t)rdr3();
2481 }
2482
2483 for (i=0; i<nbp; i++) {
2484 if (addr[i] <
2485 (caddr_t)VM_MAXUSER_ADDRESS) {
2486 /*
2487 * addr[i] is in user space
2488 */
2489 return nbp;
2490 }
2491 }
2492
2493 /*
2494 * None of the breakpoints are in user space.
2495 */
2496 return 0;
2497}
2498
2499
2500#ifndef DDB
2501void
2502Debugger(const char *msg)
2503{
2504 printf("Debugger(\"%s\") called.\n", msg);
2505}
2506#endif /* no DDB */
2507
f9d8cd12
MD
2508#ifndef APIC_IO
2509#include <machine/apicvar.h>
2510
2511/*
2512 * Provide stub functions so that the MADT APIC enumerator in the acpi
2513 * kernel module will link against a kernel without 'option APIC_IO'.
2514 *
2515 * XXX - This is a gross hack.
2516 */
2517void
2518apic_register_enumerator(struct apic_enumerator *enumerator)
2519{
2520}
2521
2522void *
2523ioapic_create(uintptr_t addr, int32_t id, int intbase)
2524{
2525 return (NULL);
2526}
2527
2528int
2529ioapic_disable_pin(void *cookie, u_int pin)
2530{
2531 return (ENXIO);
2532}
2533
2534void
2535ioapic_enable_mixed_mode(void)
2536{
2537}
2538
2539int
2540ioapic_get_vector(void *cookie, u_int pin)
2541{
2542 return (-1);
2543}
2544
2545void
2546ioapic_register(void *cookie)
2547{
2548}
2549
2550int
2551ioapic_remap_vector(void *cookie, u_int pin, int vector)
2552{
2553 return (ENXIO);
2554}
2555
2556int
2557ioapic_set_extint(void *cookie, u_int pin)
2558{
2559 return (ENXIO);
2560}
2561
2562int
2563ioapic_set_nmi(void *cookie, u_int pin)
2564{
2565 return (ENXIO);
2566}
2567
2568int
2569ioapic_set_polarity(void *cookie, u_int pin, char activehi)
2570{
2571 return (ENXIO);
2572}
2573
2574int
2575ioapic_set_triggermode(void *cookie, u_int pin, char edgetrigger)
2576{
2577 return (ENXIO);
2578}
2579
2580void
2581lapic_create(u_int apic_id, int boot_cpu)
2582{
2583}
2584
2585void
2586lapic_init(uintptr_t addr)
2587{
2588}
2589
2590int
2591lapic_set_lvt_mode(u_int apic_id, u_int lvt, u_int32_t mode)
2592{
2593 return (ENXIO);
2594}
2595
2596int
2597lapic_set_lvt_polarity(u_int apic_id, u_int lvt, u_char activehi)
2598{
2599 return (ENXIO);
2600}
2601
2602int
2603lapic_set_lvt_triggermode(u_int apic_id, u_int lvt, u_char edgetrigger)
2604{
2605 return (ENXIO);
2606}
2607#endif
2608
984263bc
MD
2609#include <sys/disklabel.h>
2610
2611/*
2612 * Determine the size of the transfer, and make sure it is
2613 * within the boundaries of the partition. Adjust transfer
2614 * if needed, and signal errors or early completion.
2615 */
2616int
2617bounds_check_with_label(struct buf *bp, struct disklabel *lp, int wlabel)
2618{
2619 struct partition *p = lp->d_partitions + dkpart(bp->b_dev);
2620 int labelsect = lp->d_partitions[0].p_offset;
2621 int maxsz = p->p_size,
2622 sz = (bp->b_bcount + DEV_BSIZE - 1) >> DEV_BSHIFT;
2623
2624 /* overwriting disk label ? */
2625 /* XXX should also protect bootstrap in first 8K */
2626 if (bp->b_blkno + p->p_offset <= LABELSECTOR + labelsect &&
2627#if LABELSECTOR != 0
2628 bp->b_blkno + p->p_offset + sz > LABELSECTOR + labelsect &&
2629#endif
2630 (bp->b_flags & B_READ) == 0 && wlabel == 0) {
2631 bp->b_error = EROFS;
2632 goto bad;
2633 }
2634
2635#if defined(DOSBBSECTOR) && defined(notyet)
2636 /* overwriting master boot record? */
2637 if (bp->b_blkno + p->p_offset <= DOSBBSECTOR &&
2638 (bp->b_flags & B_READ) == 0 && wlabel == 0) {
2639 bp->b_error = EROFS;
2640 goto bad;
2641 }
2642#endif
2643
2644 /* beyond partition? */
2645 if (bp->b_blkno < 0 || bp->b_blkno + sz > maxsz) {
2646 /* if exactly at end of disk, return an EOF */
2647 if (bp->b_blkno == maxsz) {
2648 bp->b_resid = bp->b_bcount;
2649 return(0);
2650 }
2651 /* or truncate if part of it fits */
2652 sz = maxsz - bp->b_blkno;
2653 if (sz <= 0) {
2654 bp->b_error = EINVAL;
2655 goto bad;
2656 }
2657 bp->b_bcount = sz << DEV_BSHIFT;
2658 }
2659
2660 bp->b_pblkno = bp->b_blkno + p->p_offset;
2661 return(1);
2662
2663bad:
2664 bp->b_flags |= B_ERROR;
2665 return(-1);
2666}
2667
2668#ifdef DDB
2669
2670/*
2671 * Provide inb() and outb() as functions. They are normally only
2672 * available as macros calling inlined functions, thus cannot be
2673 * called inside DDB.
2674 *
2675 * The actual code is stolen from <machine/cpufunc.h>, and de-inlined.
2676 */
2677
2678#undef inb
2679#undef outb
2680
2681/* silence compiler warnings */
2682u_char inb(u_int);
2683void outb(u_int, u_char);
2684
2685u_char
2686inb(u_int port)
2687{
2688 u_char data;
2689 /*
2690 * We use %%dx and not %1 here because i/o is done at %dx and not at
2691 * %edx, while gcc generates inferior code (movw instead of movl)
2692 * if we tell it to load (u_short) port.
2693 */
2694 __asm __volatile("inb %%dx,%0" : "=a" (data) : "d" (port));
2695 return (data);
2696}
2697
2698void
2699outb(u_int port, u_char data)
2700{
2701 u_char al;
2702 /*
2703 * Use an unnecessary assignment to help gcc's register allocator.
2704 * This make a large difference for gcc-1.40 and a tiny difference
2705 * for gcc-2.6.0. For gcc-1.40, al had to be ``asm("ax")'' for
2706 * best results. gcc-2.6.0 can't handle this.
2707 */
2708 al = data;
2709 __asm __volatile("outb %0,%%dx" : : "a" (al), "d" (port));
2710}
2711
2712#endif /* DDB */
8a8d5d85
MD
2713
2714
2715
2716#include "opt_cpu.h"
8a8d5d85
MD
2717
2718
2719/*
2720 * initialize all the SMP locks
2721 */
2722
2723/* critical region around IO APIC, apic_imen */
2724struct spinlock imen_spinlock;
2725
2726/* Make FAST_INTR() routines sequential */
2727struct spinlock fast_intr_spinlock;
2728
2729/* critical region for old style disable_intr/enable_intr */
2730struct spinlock mpintr_spinlock;
2731
2732/* critical region around INTR() routines */
2733struct spinlock intr_spinlock;
2734
2735/* lock region used by kernel profiling */
2736struct spinlock mcount_spinlock;
2737
2738/* locks com (tty) data/hardware accesses: a FASTINTR() */
2739struct spinlock com_spinlock;
2740
2741/* locks kernel printfs */
2742struct spinlock cons_spinlock;
2743
2744/* lock regions around the clock hardware */
2745struct spinlock clock_spinlock;
2746
2747/* lock around the MP rendezvous */
2748struct spinlock smp_rv_spinlock;
2749
2750static void
2751init_locks(void)
2752{
2753 /*
2754 * mp_lock = 0; BSP already owns the MP lock
2755 */
2756 /*
2757 * Get the initial mp_lock with a count of 1 for the BSP.
2758 * This uses a LOGICAL cpu ID, ie BSP == 0.
2759 */
2760#ifdef SMP
2761 cpu_get_initial_mplock();
2762#endif
41a01a4d 2763 /* DEPRECATED */
8a8d5d85
MD
2764 spin_lock_init(&mcount_spinlock);
2765 spin_lock_init(&fast_intr_spinlock);
2766 spin_lock_init(&intr_spinlock);
2767 spin_lock_init(&mpintr_spinlock);
2768 spin_lock_init(&imen_spinlock);
2769 spin_lock_init(&smp_rv_spinlock);
2770 spin_lock_init(&com_spinlock);
2771 spin_lock_init(&clock_spinlock);
2772 spin_lock_init(&cons_spinlock);
41a01a4d
MD
2773
2774 /* our token pool needs to work early */
2775 lwkt_token_pool_init();
8a8d5d85
MD
2776}
2777