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984263bc MD |
1 | /*- |
2 | * Copyright (c) 1996-1999 | |
3 | * Kazutaka YOKOTA (yokota@zodiac.mech.utsunomiya-u.ac.jp) | |
4 | * All rights reserved. | |
5 | * | |
6 | * Redistribution and use in source and binary forms, with or without | |
7 | * modification, are permitted provided that the following conditions | |
8 | * are met: | |
9 | * 1. Redistributions of source code must retain the above copyright | |
10 | * notice, this list of conditions and the following disclaimer. | |
11 | * 2. Redistributions in binary form must reproduce the above copyright | |
12 | * notice, this list of conditions and the following disclaimer in the | |
13 | * documentation and/or other materials provided with the distribution. | |
14 | * 3. The name of the author may not be used to endorse or promote | |
15 | * products derived from this software without specific prior written | |
16 | * permission. | |
17 | * | |
18 | * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND | |
19 | * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE | |
20 | * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE | |
21 | * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE | |
22 | * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL | |
23 | * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS | |
24 | * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) | |
25 | * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT | |
26 | * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY | |
27 | * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF | |
28 | * SUCH DAMAGE. | |
29 | * | |
30 | * $FreeBSD: src/sys/dev/kbd/atkbdcreg.h,v 1.4.2.2 2000/03/31 12:51:57 yokota Exp $ | |
5c4d4c9d | 31 | * $DragonFly: src/sys/dev/misc/kbd/atkbdcreg.h,v 1.3 2007/01/15 00:11:36 dillon Exp $ |
984263bc MD |
32 | * from kbdio.h,v 1.8 1998/09/25 11:55:46 yokota Exp |
33 | */ | |
34 | ||
35 | #ifndef _DEV_KBD_ATKBDCREG_H_ | |
36 | #define _DEV_KBD_ATKBDCREG_H_ | |
37 | ||
38 | /* constants */ | |
39 | ||
40 | /* I/O ports */ | |
41 | #define KBD_STATUS_PORT 4 /* status port, read */ | |
42 | #define KBD_COMMAND_PORT 4 /* controller command port, write */ | |
43 | #define KBD_DATA_PORT 0 /* data port, read/write | |
44 | * also used as keyboard command | |
45 | * and mouse command port | |
46 | */ | |
47 | ||
ad8b9749 MD |
48 | /* misc */ |
49 | #define KBD_NUM_MUX_PORTS 4 | |
50 | ||
984263bc MD |
51 | /* controller commands (sent to KBD_COMMAND_PORT) */ |
52 | #define KBDC_SET_COMMAND_BYTE 0x0060 | |
53 | #define KBDC_GET_COMMAND_BYTE 0x0020 | |
a162a738 MN |
54 | #define KBDC_WRITE_TO_AUX_MUX 0x0090 |
55 | #define KBDC_FORCE_AUX_OUTPUT 0x00d3 | |
984263bc MD |
56 | #define KBDC_WRITE_TO_AUX 0x00d4 |
57 | #define KBDC_DISABLE_AUX_PORT 0x00a7 | |
58 | #define KBDC_ENABLE_AUX_PORT 0x00a8 | |
59 | #define KBDC_TEST_AUX_PORT 0x00a9 | |
60 | #define KBDC_DIAGNOSE 0x00aa | |
61 | #define KBDC_TEST_KBD_PORT 0x00ab | |
62 | #define KBDC_DISABLE_KBD_PORT 0x00ad | |
63 | #define KBDC_ENABLE_KBD_PORT 0x00ae | |
ad8b9749 MD |
64 | #define KBDC_AUX_LOOP 0x00d3 /* mux test w+1, r+1 */ |
65 | #define KBDC_MUX_PFX 0x0090 | |
66 | #define KBDC_MUX_SEND 0x0090 | |
984263bc MD |
67 | |
68 | /* controller command byte (set by KBDC_SET_COMMAND_BYTE) */ | |
69 | #define KBD_TRANSLATION 0x0040 | |
70 | #define KBD_RESERVED_BITS 0x0004 | |
71 | #define KBD_OVERRIDE_KBD_LOCK 0x0008 | |
72 | #define KBD_ENABLE_KBD_PORT 0x0000 | |
73 | #define KBD_DISABLE_KBD_PORT 0x0010 | |
74 | #define KBD_ENABLE_AUX_PORT 0x0000 | |
75 | #define KBD_DISABLE_AUX_PORT 0x0020 | |
76 | #define KBD_ENABLE_AUX_INT 0x0002 | |
77 | #define KBD_DISABLE_AUX_INT 0x0000 | |
78 | #define KBD_ENABLE_KBD_INT 0x0001 | |
79 | #define KBD_DISABLE_KBD_INT 0x0000 | |
80 | #define KBD_KBD_CONTROL_BITS (KBD_DISABLE_KBD_PORT | KBD_ENABLE_KBD_INT) | |
81 | #define KBD_AUX_CONTROL_BITS (KBD_DISABLE_AUX_PORT | KBD_ENABLE_AUX_INT) | |
82 | ||
83 | /* keyboard device commands (sent to KBD_DATA_PORT) */ | |
84 | #define KBDC_RESET_KBD 0x00ff | |
85 | #define KBDC_ENABLE_KBD 0x00f4 | |
86 | #define KBDC_DISABLE_KBD 0x00f5 | |
87 | #define KBDC_SET_DEFAULTS 0x00f6 | |
88 | #define KBDC_SEND_DEV_ID 0x00f2 | |
89 | #define KBDC_SET_LEDS 0x00ed | |
90 | #define KBDC_ECHO 0x00ee | |
91 | #define KBDC_SET_SCANCODE_SET 0x00f0 | |
92 | #define KBDC_SET_TYPEMATIC 0x00f3 | |
93 | ||
ad8b9749 MD |
94 | #define ATKBD_CMD_SETLEDS 0x10ed |
95 | #define ATKBD_CMD_GSCANSET 0x11f0 | |
96 | #define ATKBD_CMD_SSCANSET 0x10f0 | |
97 | #define ATKBD_CMD_GETID 0x02f2 | |
98 | #define ATKBD_CMD_SETREP 0x10f3 | |
99 | #define ATKBD_CMD_ENABLE 0x00f4 | |
100 | #define ATKBD_CMD_RESET_DIS 0x00f5 /* Reset to defaults and disable */ | |
101 | #define ATKBD_CMD_RESET_DEF 0x00f6 /* Reset to defaults */ | |
102 | #define ATKBD_CMD_SETALL_MB 0x00f8 /* Set all keys to give break codes */ | |
103 | #define ATKBD_CMD_SETALL_MBR 0x00fa /* ... and repeat */ | |
104 | #define ATKBD_CMD_RESET_BAT 0x02ff | |
105 | #define ATKBD_CMD_RESEND 0x00fe | |
106 | #define ATKBD_CMD_EX_ENABLE 0x10ea | |
107 | #define ATKBD_CMD_EX_SETLEDS 0x20eb | |
108 | #define ATKBD_CMD_OK_GETID 0x02e8 | |
109 | ||
984263bc MD |
110 | /* aux device commands (sent to KBD_DATA_PORT) */ |
111 | #define PSMC_RESET_DEV 0x00ff | |
112 | #define PSMC_ENABLE_DEV 0x00f4 | |
113 | #define PSMC_DISABLE_DEV 0x00f5 | |
114 | #define PSMC_SET_DEFAULTS 0x00f6 | |
115 | #define PSMC_SEND_DEV_ID 0x00f2 | |
116 | #define PSMC_SEND_DEV_STATUS 0x00e9 | |
117 | #define PSMC_SEND_DEV_DATA 0x00eb | |
118 | #define PSMC_SET_SCALING11 0x00e6 | |
119 | #define PSMC_SET_SCALING21 0x00e7 | |
120 | #define PSMC_SET_RESOLUTION 0x00e8 | |
121 | #define PSMC_SET_STREAM_MODE 0x00ea | |
122 | #define PSMC_SET_REMOTE_MODE 0x00f0 | |
123 | #define PSMC_SET_SAMPLING_RATE 0x00f3 | |
124 | ||
125 | /* PSMC_SET_RESOLUTION argument */ | |
126 | #define PSMD_RES_LOW 0 /* typically 25ppi */ | |
127 | #define PSMD_RES_MEDIUM_LOW 1 /* typically 50ppi */ | |
128 | #define PSMD_RES_MEDIUM_HIGH 2 /* typically 100ppi (default) */ | |
129 | #define PSMD_RES_HIGH 3 /* typically 200ppi */ | |
130 | #define PSMD_MAX_RESOLUTION PSMD_RES_HIGH | |
131 | ||
132 | /* PSMC_SET_SAMPLING_RATE */ | |
133 | #define PSMD_MAX_RATE 255 /* FIXME: not sure if it's possible */ | |
134 | ||
135 | /* status bits (KBD_STATUS_PORT) */ | |
136 | #define KBDS_BUFFER_FULL 0x0021 | |
ad8b9749 MD |
137 | #define KBDS_ANY_BUFFER_FULL 0x0001 /* (data from controller pending) */ |
138 | #define KBDS_KBD_BUFFER_FULL 0x0001 /* mask/match KBDS_BUFFER_FULL */ | |
139 | #define KBDS_AUX_BUFFER_FULL 0x0021 /* mask/match KBDS_BUFFER_FULL */ | |
140 | #define KBDS_INPUT_BUFFER_FULL 0x0002 /* (cmd/data to controller pending) */ | |
141 | ||
142 | #define I8042_STR_PARITY 0x80 /* Also MUX data address bit */ | |
143 | #define I8042_STR_TIMEOUT 0x40 /* Also MUX data address bit */ | |
144 | #define I8042_STR_AUXDATA 0x20 | |
145 | #define I8042_STR_KEYLOCK 0x10 | |
146 | #define I8042_STR_CMDDAT 0x08 | |
147 | #define I8042_STR_MUXERR 0x04 | |
148 | #define I8042_STR_IBF 0x02 /* write pending (outgoing) */ | |
149 | #define I8042_STR_OBF 0x01 /* read pending (incoming) */ | |
150 | ||
151 | #define I8042_STR_MUX_SHIFT 6 | |
152 | #define I8042_STR_MUX_MASK 3 | |
984263bc MD |
153 | |
154 | /* return code */ | |
155 | #define KBD_ACK 0x00fa | |
156 | #define KBD_RESEND 0x00fe | |
157 | #define KBD_RESET_DONE 0x00aa | |
158 | #define KBD_RESET_FAIL 0x00fc | |
159 | #define KBD_DIAG_DONE 0x0055 | |
160 | #define KBD_DIAG_FAIL 0x00fd | |
161 | #define KBD_ECHO 0x00ee | |
162 | ||
163 | #define PSM_ACK 0x00fa | |
164 | #define PSM_RESEND 0x00fe | |
165 | #define PSM_RESET_DONE 0x00aa | |
166 | #define PSM_RESET_FAIL 0x00fc | |
167 | ||
168 | /* aux device ID */ | |
169 | #define PSM_MOUSE_ID 0 | |
170 | #define PSM_BALLPOINT_ID 2 | |
171 | #define PSM_INTELLI_ID 3 | |
172 | #define PSM_EXPLORER_ID 4 | |
173 | #define PSM_4DMOUSE_ID 6 | |
174 | #define PSM_4DPLUS_ID 8 | |
91be4d71 | 175 | #define PSM_4DPLUS_RFSW35_ID 24 |
984263bc MD |
176 | |
177 | #ifdef _KERNEL | |
178 | ||
179 | #define ATKBDC_DRIVER_NAME "atkbdc" | |
180 | ||
181 | /* | |
182 | * driver specific options: the following options may be set by | |
183 | * `options' statements in the kernel configuration file. | |
184 | */ | |
185 | ||
186 | /* retry count */ | |
187 | #ifndef KBD_MAXRETRY | |
188 | #define KBD_MAXRETRY 3 | |
189 | #endif | |
190 | ||
191 | /* timing parameters */ | |
192 | #ifndef KBD_RESETDELAY | |
193 | #define KBD_RESETDELAY 200 /* wait 200msec after kbd/mouse reset */ | |
194 | #endif | |
195 | #ifndef KBD_MAXWAIT | |
196 | #define KBD_MAXWAIT 5 /* wait 5 times at most after reset */ | |
197 | #endif | |
198 | ||
199 | /* I/O recovery time */ | |
200 | #define KBDC_DELAYTIME 20 | |
201 | #define KBDD_DELAYTIME 7 | |
202 | ||
203 | /* debug option */ | |
204 | #ifndef KBDIO_DEBUG | |
205 | #define KBDIO_DEBUG 0 | |
206 | #endif | |
207 | ||
208 | /* end of driver specific options */ | |
209 | ||
210 | /* types/structures */ | |
211 | ||
212 | #define KBDQ_BUFSIZE 32 | |
213 | ||
5c4d4c9d | 214 | typedef struct _kbdkqueue { |
984263bc MD |
215 | int head; |
216 | int tail; | |
217 | unsigned char q[KBDQ_BUFSIZE]; | |
218 | #if KBDIO_DEBUG >= 2 | |
219 | int call_count; | |
220 | int qcount; | |
221 | int max_qcount; | |
222 | #endif | |
5c4d4c9d | 223 | } kbdkqueue; |
984263bc MD |
224 | |
225 | struct resource; | |
226 | ||
227 | typedef struct atkbdc_softc { | |
228 | struct resource *port0; /* data port */ | |
229 | struct resource *port1; /* status port */ | |
230 | bus_space_tag_t iot; | |
231 | bus_space_handle_t ioh0; | |
232 | bus_space_handle_t ioh1; | |
233 | int command_byte; /* current command byte value */ | |
234 | int command_mask; /* command byte mask bits for kbd/aux devices */ | |
235 | int lock; /* FIXME: XXX not quite a semaphore... */ | |
5c4d4c9d MD |
236 | kbdkqueue kbd; /* keyboard data queue */ |
237 | kbdkqueue aux; /* auxiliary data queue */ | |
a162a738 MN |
238 | int retry; |
239 | int quirks; /* controller doesn't like deactivate */ | |
240 | #define KBDC_QUIRK_KEEP_ACTIVATED (1 << 0) | |
241 | #define KBDC_QUIRK_IGNORE_PROBE_RESULT (1 << 1) | |
242 | #define KBDC_QUIRK_RESET_AFTER_PROBE (1 << 2) | |
243 | #define KBDC_QUIRK_SETLEDS_ON_INIT (1 << 3) | |
244 | #define KBDC_QUIRK_DISABLE_MUX_PROBE (1 << 4) | |
245 | int aux_mux_enabled; /* active PS/2 multiplexing is enabled */ | |
246 | int aux_mux_port; /* current aux mux port */ | |
984263bc MD |
247 | } atkbdc_softc_t; |
248 | ||
249 | enum kbdc_device_ivar { | |
250 | KBDC_IVAR_IRQ, | |
251 | KBDC_IVAR_FLAGS, | |
252 | KBDC_IVAR_VENDORID, | |
253 | KBDC_IVAR_SERIAL, | |
254 | KBDC_IVAR_LOGICALID, | |
255 | KBDC_IVAR_COMPATID, | |
256 | }; | |
257 | ||
ad8b9749 | 258 | typedef struct atkbdc_softc *KBDC; |
984263bc | 259 | |
91be4d71 AHJ |
260 | #define KBDC_RID_KBD 0 |
261 | #define KBDC_RID_AUX 1 | |
262 | ||
a162a738 MN |
263 | #define KBDC_AUX_MUX_NUM_PORTS 4 |
264 | ||
984263bc MD |
265 | /* function prototypes */ |
266 | ||
267 | atkbdc_softc_t *atkbdc_get_softc(int unit); | |
268 | int atkbdc_probe_unit(int unit, struct resource *port0, struct resource *port1); | |
269 | int atkbdc_attach_unit(int unit, atkbdc_softc_t *sc, struct resource *port0, | |
270 | struct resource *port1); | |
271 | int atkbdc_configure(void); | |
272 | ||
273 | KBDC atkbdc_open(int unit); | |
274 | int kbdc_lock(KBDC kbdc, int lock); | |
275 | int kbdc_data_ready(KBDC kbdc); | |
276 | ||
277 | int write_controller_command(KBDC kbdc,int c); | |
ad8b9749 MD |
278 | int write_controller_data(KBDC kbdc, int c); |
279 | int write_controller_w1r1(KBDC kbdc, int c, int d); | |
984263bc MD |
280 | |
281 | int write_kbd_command(KBDC kbdc,int c); | |
282 | int write_aux_command(KBDC kbdc,int c); | |
283 | int send_kbd_command(KBDC kbdc,int c); | |
284 | int send_aux_command(KBDC kbdc,int c); | |
285 | int send_kbd_command_and_data(KBDC kbdc,int c,int d); | |
286 | int send_aux_command_and_data(KBDC kbdc,int c,int d); | |
287 | ||
288 | int read_controller_data(KBDC kbdc); | |
289 | int read_kbd_data(KBDC kbdc); | |
290 | int read_kbd_data_no_wait(KBDC kbdc); | |
291 | int read_aux_data(KBDC kbdc); | |
292 | int read_aux_data_no_wait(KBDC kbdc); | |
293 | ||
294 | void empty_kbd_buffer(KBDC kbdc, int t); | |
295 | void empty_aux_buffer(KBDC kbdc, int t); | |
296 | void empty_both_buffers(KBDC kbdc, int t); | |
297 | ||
298 | int reset_kbd(KBDC kbdc); | |
299 | int reset_aux_dev(KBDC kbdc); | |
300 | ||
301 | int test_controller(KBDC kbdc); | |
302 | int test_kbd_port(KBDC kbdc); | |
303 | int test_aux_port(KBDC kbdc); | |
304 | ||
a162a738 MN |
305 | int kbdc_get_device_mask(KBDC kbdc); |
306 | void kbdc_set_device_mask(KBDC kbdc, int mask); | |
307 | ||
984263bc | 308 | int get_controller_command_byte(KBDC kbdc); |
8ea60713 | 309 | int set_controller_command_byte(KBDC kbdc, int mask, int command); |
984263bc | 310 | |
a162a738 MN |
311 | int set_active_aux_mux_port(KBDC p, int port); |
312 | int enable_aux_mux(KBDC p); | |
313 | int disable_aux_mux(KBDC p); | |
314 | int aux_mux_is_enabled(KBDC p); | |
315 | ||
984263bc MD |
316 | #endif /* _KERNEL */ |
317 | ||
318 | #endif /* !_DEV_KBD_ATKBDCREG_H_ */ |