kernel - Fix SMAP/SMEP caught user mode access part 2/2.
[dragonfly.git] / sys / kern / lwkt_ipiq.c
CommitLineData
3b6b7bd1 1/*
ddec9f48 2 * Copyright (c) 2003-2016 The DragonFly Project. All rights reserved.
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3 *
4 * This code is derived from software contributed to The DragonFly Project
5 * by Matthew Dillon <dillon@backplane.com>
6 *
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7 * Redistribution and use in source and binary forms, with or without
8 * modification, are permitted provided that the following conditions
9 * are met:
8c10bfcf 10 *
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11 * 1. Redistributions of source code must retain the above copyright
12 * notice, this list of conditions and the following disclaimer.
13 * 2. Redistributions in binary form must reproduce the above copyright
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14 * notice, this list of conditions and the following disclaimer in
15 * the documentation and/or other materials provided with the
16 * distribution.
17 * 3. Neither the name of The DragonFly Project nor the names of its
18 * contributors may be used to endorse or promote products derived
19 * from this software without specific, prior written permission.
20 *
21 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
22 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
23 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
24 * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
25 * COPYRIGHT HOLDERS OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
26 * INCIDENTAL, SPECIAL, EXEMPLARY OR CONSEQUENTIAL DAMAGES (INCLUDING,
27 * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
28 * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
29 * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
30 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT
31 * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
3b6b7bd1 32 * SUCH DAMAGE.
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33 */
34
35/*
36 * This module implements IPI message queueing and the MI portion of IPI
37 * message processing.
38 */
39
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40#include "opt_ddb.h"
41
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42#include <sys/param.h>
43#include <sys/systm.h>
44#include <sys/kernel.h>
45#include <sys/proc.h>
46#include <sys/rtprio.h>
47#include <sys/queue.h>
48#include <sys/thread2.h>
49#include <sys/sysctl.h>
ac72c7f4 50#include <sys/ktr.h>
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51#include <sys/kthread.h>
52#include <machine/cpu.h>
53#include <sys/lock.h>
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54
55#include <vm/vm.h>
56#include <vm/vm_param.h>
57#include <vm/vm_kern.h>
58#include <vm/vm_object.h>
59#include <vm/vm_page.h>
60#include <vm/vm_map.h>
61#include <vm/vm_pager.h>
62#include <vm/vm_extern.h>
63#include <vm/vm_zone.h>
64
65#include <machine/stdarg.h>
3b6b7bd1 66#include <machine/smp.h>
2c08e360 67#include <machine/clock.h>
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68#include <machine/atomic.h>
69
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70#ifdef _KERNEL_VIRTUAL
71#include <pthread.h>
72#endif
73
b6b1cc0f 74struct ipiq_stats {
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75 int64_t ipiq_count; /* total calls to lwkt_send_ipiq*() */
76 int64_t ipiq_fifofull; /* number of fifo full conditions detected */
77 int64_t ipiq_avoided; /* interlock with target avoids cpu ipi */
78 int64_t ipiq_passive; /* passive IPI messages */
79 int64_t ipiq_cscount; /* number of cpu synchronizations */
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80} __cachealign;
81
82static struct ipiq_stats ipiq_stats_percpu[MAXCPU];
c8cd4196 83#define ipiq_stat(gd) ipiq_stats_percpu[(gd)->gd_cpuid]
b6b1cc0f 84
d5b2d319 85static int ipiq_debug; /* set to 1 for debug */
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86#ifdef PANIC_DEBUG
87static int panic_ipiq_cpu = -1;
88static int panic_ipiq_count = 100;
89#endif
3b6b7bd1 90
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91SYSCTL_INT(_lwkt, OID_AUTO, ipiq_debug, CTLFLAG_RW, &ipiq_debug, 0,
92 "");
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93#ifdef PANIC_DEBUG
94SYSCTL_INT(_lwkt, OID_AUTO, panic_ipiq_cpu, CTLFLAG_RW, &panic_ipiq_cpu, 0, "");
95SYSCTL_INT(_lwkt, OID_AUTO, panic_ipiq_count, CTLFLAG_RW, &panic_ipiq_count, 0, "");
96#endif
3b6b7bd1 97
a7adb95a 98#define IPIQ_STRING "func=%p arg1=%p arg2=%d scpu=%d dcpu=%d"
5bf48697 99#define IPIQ_ARGS void *func, void *arg1, int arg2, int scpu, int dcpu
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100
101#if !defined(KTR_IPIQ)
102#define KTR_IPIQ KTR_ALL
3b6b7bd1 103#endif
ac72c7f4 104KTR_INFO_MASTER(ipiq);
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105KTR_INFO(KTR_IPIQ, ipiq, send_norm, 0, IPIQ_STRING, IPIQ_ARGS);
106KTR_INFO(KTR_IPIQ, ipiq, send_pasv, 1, IPIQ_STRING, IPIQ_ARGS);
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107KTR_INFO(KTR_IPIQ, ipiq, receive, 4, IPIQ_STRING, IPIQ_ARGS);
108KTR_INFO(KTR_IPIQ, ipiq, sync_start, 5, "cpumask=%08lx", unsigned long mask);
109KTR_INFO(KTR_IPIQ, ipiq, sync_end, 6, "cpumask=%08lx", unsigned long mask);
110KTR_INFO(KTR_IPIQ, ipiq, cpu_send, 7, IPIQ_STRING, IPIQ_ARGS);
111KTR_INFO(KTR_IPIQ, ipiq, send_end, 8, IPIQ_STRING, IPIQ_ARGS);
3a24972f 112KTR_INFO(KTR_IPIQ, ipiq, sync_quick, 9, "cpumask=%08lx", unsigned long mask);
ac72c7f4 113
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114#define logipiq(name, func, arg1, arg2, sgd, dgd) \
115 KTR_LOG(ipiq_ ## name, func, arg1, arg2, sgd->gd_cpuid, dgd->gd_cpuid)
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116#define logipiq2(name, arg) \
117 KTR_LOG(ipiq_ ## name, arg)
ac72c7f4 118
5d920ec6 119static void lwkt_process_ipiq_nested(void);
b8a98473 120static int lwkt_process_ipiq_core(globaldata_t sgd, lwkt_ipiq_t ip,
5d920ec6 121 struct intrframe *frame, int limit);
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122static void lwkt_cpusync_remote1(lwkt_cpusync_t cs);
123static void lwkt_cpusync_remote2(lwkt_cpusync_t cs);
3b6b7bd1 124
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125#define IPIQ_SYSCTL(name) \
126static int \
127sysctl_##name(SYSCTL_HANDLER_ARGS) \
128{ \
129 int64_t val = 0; \
130 int cpu, error; \
131 \
132 for (cpu = 0; cpu < ncpus; ++cpu) \
133 val += ipiq_stats_percpu[cpu].name; \
134 \
135 error = sysctl_handle_quad(oidp, &val, 0, req); \
136 if (error || req->newptr == NULL) \
137 return error; \
138 \
139 for (cpu = 0; cpu < ncpus; ++cpu) \
140 ipiq_stats_percpu[cpu].name = val; \
141 \
142 return 0; \
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143}
144
145IPIQ_SYSCTL(ipiq_count);
146IPIQ_SYSCTL(ipiq_fifofull);
147IPIQ_SYSCTL(ipiq_avoided);
148IPIQ_SYSCTL(ipiq_passive);
149IPIQ_SYSCTL(ipiq_cscount);
150
151SYSCTL_PROC(_lwkt, OID_AUTO, ipiq_count, (CTLTYPE_QUAD | CTLFLAG_RW),
152 0, 0, sysctl_ipiq_count, "Q", "Number of IPI's sent");
153SYSCTL_PROC(_lwkt, OID_AUTO, ipiq_fifofull, (CTLTYPE_QUAD | CTLFLAG_RW),
154 0, 0, sysctl_ipiq_fifofull, "Q",
155 "Number of fifo full conditions detected");
156SYSCTL_PROC(_lwkt, OID_AUTO, ipiq_avoided, (CTLTYPE_QUAD | CTLFLAG_RW),
157 0, 0, sysctl_ipiq_avoided, "Q",
158 "Number of IPI's avoided by interlock with target cpu");
159SYSCTL_PROC(_lwkt, OID_AUTO, ipiq_passive, (CTLTYPE_QUAD | CTLFLAG_RW),
160 0, 0, sysctl_ipiq_passive, "Q",
161 "Number of passive IPI messages sent");
162SYSCTL_PROC(_lwkt, OID_AUTO, ipiq_cscount, (CTLTYPE_QUAD | CTLFLAG_RW),
163 0, 0, sysctl_ipiq_cscount, "Q",
164 "Number of cpu synchronizations");
165
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166/*
167 * Send a function execution request to another cpu. The request is queued
168 * on the cpu<->cpu ipiq matrix. Each cpu owns a unique ipiq FIFO for every
169 * possible target cpu. The FIFO can be written.
170 *
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171 * If the FIFO fills up we have to enable interrupts to avoid an APIC
172 * deadlock and process pending IPIQs while waiting for it to empty.
173 * Otherwise we may soft-deadlock with another cpu whos FIFO is also full.
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174 *
175 * We can safely bump gd_intr_nesting_level because our crit_exit() at the
176 * end will take care of any pending interrupts.
177 *
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178 * The actual hardware IPI is avoided if the target cpu is already processing
179 * the queue from a prior IPI. It is possible to pipeline IPI messages
180 * very quickly between cpus due to the FIFO hysteresis.
181 *
182 * Need not be called from a critical section.
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183 */
184int
b8a98473 185lwkt_send_ipiq3(globaldata_t target, ipifunc3_t func, void *arg1, int arg2)
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186{
187 lwkt_ipiq_t ip;
188 int windex;
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189 int level1;
190 int level2;
e47e3dba 191 long rflags;
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192 struct globaldata *gd = mycpu;
193
a7adb95a 194 logipiq(send_norm, func, arg1, arg2, gd, target);
ac72c7f4 195
3b6b7bd1 196 if (target == gd) {
b8a98473 197 func(arg1, arg2, NULL);
c92e86f1 198 logipiq(send_end, func, arg1, arg2, gd, target);
3b6b7bd1 199 return(0);
4dd1b994 200 }
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201 crit_enter();
202 ++gd->gd_intr_nesting_level;
203#ifdef INVARIANTS
204 if (gd->gd_intr_nesting_level > 20)
205 panic("lwkt_send_ipiq: TOO HEAVILY NESTED!");
206#endif
f9235b6d 207 KKASSERT(curthread->td_critcount);
c8cd4196 208 ++ipiq_stat(gd).ipiq_count;
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209 ip = &gd->gd_ipiq[target->gd_cpuid];
210
211 /*
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212 * Do not allow the FIFO to become full. Interrupts must be physically
213 * enabled while we liveloop to avoid deadlocking the APIC.
1b1e83e2 214 *
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215 * When we are not nested inside a processing loop we allow the FIFO
216 * to get 1/2 full. Once it exceeds 1/2 full we must wait for it to
217 * drain, executing any incoming IPIs while we wait.
218 *
219 * When we are nested we allow the FIFO to get almost completely full.
220 * This allows us to queue IPIs sent from IPI callbacks. The processing
221 * code will only process incoming FIFOs that are trying to drain while
222 * we wait, and only to the only-slightly-less-full point, to avoid a
223 * deadlock.
224 *
225 * We are guaranteed
4c9f5a7f 226 */
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227
228 if (gd->gd_processing_ipiq == 0) {
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229 level1 = MAXCPUFIFO / 2;
230 level2 = MAXCPUFIFO / 4;
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231 } else {
232 level1 = MAXCPUFIFO - 3;
233 level2 = MAXCPUFIFO - 5;
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234 }
235
236 if (ip->ip_windex - ip->ip_rindex > level1) {
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237#ifndef _KERNEL_VIRTUAL
238 uint64_t tsc_base = rdtsc();
239#endif
240 int repeating = 0;
5d920ec6 241 int olimit;
4c9f5a7f 242
e47e3dba 243 rflags = read_rflags();
4c9f5a7f 244 cpu_enable_intr();
c8cd4196 245 ++ipiq_stat(gd).ipiq_fifofull;
cfaeae2a 246 DEBUG_PUSH_INFO("send_ipiq3");
5d920ec6 247 olimit = atomic_swap_int(&ip->ip_drain, level2);
ddec9f48 248 while (ip->ip_windex - ip->ip_rindex > level2) {
4c9f5a7f 249 KKASSERT(ip->ip_windex - ip->ip_rindex != MAXCPUFIFO - 1);
5d920ec6 250 lwkt_process_ipiq_nested();
da0b0e8b 251 cpu_pause();
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252
253 /*
254 * Check for target not draining issue. This should be fixed but
255 * leave the code in-place anyway as it can recover an otherwise
256 * dead system.
257 */
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258#ifdef _KERNEL_VIRTUAL
259 if (repeating++ > 10)
260 pthread_yield();
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261#else
262 if (rdtsc() - tsc_base > tsc_frequency) {
263 ++repeating;
264 if (repeating > 10) {
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265 kprintf("send_ipiq %d->%d tgt not draining (%d) sniff=%p,%p\n",
266 gd->gd_cpuid, target->gd_cpuid, repeating,
267 target->gd_sample_pc, target->gd_sample_sp);
e32d3244 268 smp_sniff();
67534613 269 cpu_disable_intr();
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270 ATOMIC_CPUMASK_ORBIT(target->gd_ipimask, gd->gd_cpuid);
271 cpu_send_ipiq(target->gd_cpuid);
67534613 272 cpu_enable_intr();
e47e3dba 273 } else {
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274 kprintf("send_ipiq %d->%d tgt not draining (%d)\n",
275 gd->gd_cpuid, target->gd_cpuid, repeating);
e47e3dba 276 smp_sniff();
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277 }
278 tsc_base = rdtsc();
279 }
a86ce0cd 280#endif
4c9f5a7f 281 }
5d920ec6 282 atomic_swap_int(&ip->ip_drain, olimit);
cfaeae2a 283 DEBUG_POP_INFO();
ac8ea0ad 284#if defined(__x86_64__)
46d4e165 285 write_rflags(rflags);
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286#else
287#error "no write_*flags"
46d4e165 288#endif
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289 }
290
291 /*
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292 * Queue the new message and signal the target cpu. For now we need to
293 * physically disable interrupts because the target will not get signalled
294 * by other cpus once we set target->gd_npoll and we don't want to get
295 * interrupted.
296 *
297 * XXX not sure why this is a problem, the critical section should prevent
298 * any stalls (incoming interrupts except Xinvltlb and Xsnoop will
299 * just be made pending).
3b6b7bd1 300 */
e47e3dba 301 rflags = read_rflags();
4dd1b994 302#ifndef _KERNEL_VIRTUAL
e47e3dba 303 cpu_disable_intr();
4dd1b994 304#endif
e47e3dba 305
3b6b7bd1 306 windex = ip->ip_windex & MAXCPUFIFO_MASK;
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307 ip->ip_info[windex].func = func;
308 ip->ip_info[windex].arg1 = arg1;
309 ip->ip_info[windex].arg2 = arg2;
35238fa5 310 cpu_sfence();
3b6b7bd1 311 ++ip->ip_windex;
c07315c4 312 ATOMIC_CPUMASK_ORBIT(target->gd_ipimask, gd->gd_cpuid);
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313
314 /*
315 * signal the target cpu that there is work pending.
316 */
e32d3244 317 if (atomic_swap_int(&target->gd_npoll, 1) == 0) {
866b61fb 318 logipiq(cpu_send, func, arg1, arg2, gd, target);
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319 cpu_send_ipiq(target->gd_cpuid);
320 } else {
c8cd4196 321 ++ipiq_stat(gd).ipiq_avoided;
4c9f5a7f 322 }
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323 write_rflags(rflags);
324
da0b0e8b 325 --gd->gd_intr_nesting_level;
4c9f5a7f 326 crit_exit();
c92e86f1 327 logipiq(send_end, func, arg1, arg2, gd, target);
da0b0e8b 328
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329 return(ip->ip_windex);
330}
331
332/*
333 * Similar to lwkt_send_ipiq() but this function does not actually initiate
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334 * the IPI to the target cpu unless the FIFO is greater than 1/4 full.
335 * This function is usually very fast.
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336 *
337 * This function is used for non-critical IPI messages, such as memory
338 * deallocations. The queue will typically be flushed by the target cpu at
339 * the next clock interrupt.
340 *
341 * Need not be called from a critical section.
342 */
343int
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344lwkt_send_ipiq3_passive(globaldata_t target, ipifunc3_t func,
345 void *arg1, int arg2)
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346{
347 lwkt_ipiq_t ip;
348 int windex;
349 struct globaldata *gd = mycpu;
350
351 KKASSERT(target != gd);
5d920ec6 352 crit_enter_gd(gd);
4c9f5a7f 353 ++gd->gd_intr_nesting_level;
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354 ip = &gd->gd_ipiq[target->gd_cpuid];
355
356 /*
5d920ec6 357 * If the FIFO is too full send the IPI actively.
ddec9f48 358 *
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359 * WARNING! This level must be low enough not to trigger a wait loop
360 * in the active sending code since we are not signalling the
361 * target cpu.
4c9f5a7f 362 */
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363 if (ip->ip_windex - ip->ip_rindex >= MAXCPUFIFO / 4) {
364 --gd->gd_intr_nesting_level;
365 crit_exit_gd(gd);
366 return lwkt_send_ipiq3(target, func, arg1, arg2);
ddec9f48 367 }
4c9f5a7f 368
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369 /*
370 * Else we can do it passively.
371 */
372 logipiq(send_pasv, func, arg1, arg2, gd, target);
373 ++ipiq_stat(gd).ipiq_count;
374 ++ipiq_stat(gd).ipiq_passive;
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375
376 /*
377 * Queue the new message
378 */
379 windex = ip->ip_windex & MAXCPUFIFO_MASK;
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380 ip->ip_info[windex].func = func;
381 ip->ip_info[windex].arg1 = arg1;
382 ip->ip_info[windex].arg2 = arg2;
35238fa5 383 cpu_sfence();
4c9f5a7f 384 ++ip->ip_windex;
c07315c4 385 ATOMIC_CPUMASK_ORBIT(target->gd_ipimask, gd->gd_cpuid);
5d920ec6 386 --gd->gd_intr_nesting_level;
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387
388 /*
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389 * Do not signal the target cpu, it will pick up the IPI when it next
390 * polls (typically on the next tick).
4c9f5a7f 391 */
3b6b7bd1 392 crit_exit();
c92e86f1 393 logipiq(send_end, func, arg1, arg2, gd, target);
da0b0e8b 394
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395 return(ip->ip_windex);
396}
397
398/*
399 * deprecated, used only by fast int forwarding.
400 */
401int
b8a98473 402lwkt_send_ipiq3_bycpu(int dcpu, ipifunc3_t func, void *arg1, int arg2)
3b6b7bd1 403{
b8a98473 404 return(lwkt_send_ipiq3(globaldata_find(dcpu), func, arg1, arg2));
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405}
406
407/*
408 * Send a message to several target cpus. Typically used for scheduling.
409 * The message will not be sent to stopped cpus.
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410 *
411 * To prevent treating low-numbered cpus as favored sons, the IPIs are
412 * issued in order starting at mycpu upward, then from 0 through mycpu.
413 * This is particularly important to prevent random scheduler pickups
414 * from favoring cpu 0.
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415 */
416int
da23a592 417lwkt_send_ipiq3_mask(cpumask_t mask, ipifunc3_t func, void *arg1, int arg2)
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418{
419 int cpuid;
420 int count = 0;
dbe02471 421 cpumask_t amask;
3b6b7bd1 422
c07315c4 423 CPUMASK_NANDMASK(mask, stopped_cpus);
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424
425 /*
426 * All cpus in mask which are >= mycpu
427 */
428 CPUMASK_ASSBMASK(amask, mycpu->gd_cpuid);
429 CPUMASK_INVMASK(amask);
430 CPUMASK_ANDMASK(amask, mask);
431 while (CPUMASK_TESTNZERO(amask)) {
432 cpuid = BSFCPUMASK(amask);
433 lwkt_send_ipiq3(globaldata_find(cpuid), func, arg1, arg2);
434 CPUMASK_NANDBIT(amask, cpuid);
435 ++count;
436 }
437
438 /*
439 * All cpus in mask which are < mycpu
440 */
441 CPUMASK_ASSBMASK(amask, mycpu->gd_cpuid);
442 CPUMASK_ANDMASK(amask, mask);
443 while (CPUMASK_TESTNZERO(amask)) {
444 cpuid = BSFCPUMASK(amask);
b8a98473 445 lwkt_send_ipiq3(globaldata_find(cpuid), func, arg1, arg2);
dbe02471 446 CPUMASK_NANDBIT(amask, cpuid);
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447 ++count;
448 }
449 return(count);
450}
451
452/*
453 * Wait for the remote cpu to finish processing a function.
454 *
455 * YYY we have to enable interrupts and process the IPIQ while waiting
456 * for it to empty or we may deadlock with another cpu. Create a CPU_*()
457 * function to do this! YYY we really should 'block' here.
458 *
459 * MUST be called from a critical section. This routine may be called
460 * from an interrupt (for example, if an interrupt wakes a foreign thread
461 * up).
462 */
463void
464lwkt_wait_ipiq(globaldata_t target, int seq)
465{
466 lwkt_ipiq_t ip;
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467
468 if (target != mycpu) {
469 ip = &mycpu->gd_ipiq[target->gd_cpuid];
470 if ((int)(ip->ip_xindex - seq) < 0) {
ac8ea0ad 471#if defined(__x86_64__)
46d4e165 472 unsigned long rflags = read_rflags();
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473#else
474#error "no read_*flags"
46d4e165 475#endif
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476 int64_t time_tgt = tsc_get_target(1000000000LL);
477 int time_loops = 10;
478 int benice = 0;
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479#ifdef _KERNEL_VIRTUAL
480 int repeating = 0;
481#endif
3ec72a55 482
3b6b7bd1 483 cpu_enable_intr();
cfaeae2a 484 DEBUG_PUSH_INFO("wait_ipiq");
3b6b7bd1 485 while ((int)(ip->ip_xindex - seq) < 0) {
41a01a4d 486 crit_enter();
3b6b7bd1 487 lwkt_process_ipiq();
41a01a4d 488 crit_exit();
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489#ifdef _KERNEL_VIRTUAL
490 if (repeating++ > 10)
491 pthread_yield();
492#endif
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493
494 /*
495 * IPIQs must be handled within 10 seconds and this code
496 * will warn after one second.
497 */
498 if ((benice & 255) == 0 && tsc_test_target(time_tgt) > 0) {
499 kprintf("LWKT_WAIT_IPIQ WARNING! %d wait %d (%d)\n",
500 mycpu->gd_cpuid, target->gd_cpuid,
501 ip->ip_xindex - seq);
502 if (--time_loops == 0)
503 panic("LWKT_WAIT_IPIQ");
504 time_tgt = tsc_get_target(1000000000LL);
505 }
506 ++benice;
507
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508 /*
509 * xindex may be modified by another cpu, use a load fence
510 * to ensure that the loop does not use a speculative value
511 * (which may improve performance).
512 */
06c66eb2 513 cpu_pause();
35238fa5 514 cpu_lfence();
3b6b7bd1 515 }
cfaeae2a 516 DEBUG_POP_INFO();
ac8ea0ad 517#if defined(__x86_64__)
46d4e165 518 write_rflags(rflags);
ac8ea0ad
SW
519#else
520#error "no write_*flags"
46d4e165 521#endif
3b6b7bd1
MD
522 }
523 }
524}
525
526/*
56a6a688
MD
527 * Called from IPI interrupt (like a fast interrupt), and numerous
528 * other locations, and might also be called recursively. Caller must
529 * hold a critical section across this call.
530 *
531 * When called from doreti, splz, or an IPI interrupt, npoll is cleared
532 * by the caller using an atomic xchgl, thus synchronizing the incoming
533 * ipimask against npoll. A new IPI will be received if new traffic
534 * occurs verses the windex we read.
535 *
536 * However, ipimask might not be synchronized when called from other
537 * locations. Our processing will be more heuristic.
3b6b7bd1
MD
538 *
539 * There are two versions, one where no interrupt frame is available (when
540 * called from the send code and from splz, and one where an interrupt
541 * frame is available.
d5b2d319
MD
542 *
543 * When the current cpu is mastering a cpusync we do NOT internally loop
544 * on the cpusyncq poll. We also do not re-flag a pending ipi due to
545 * the cpusyncq poll because this can cause doreti/splz to loop internally.
546 * The cpusync master's own loop must be allowed to run to avoid a deadlock.
3b6b7bd1
MD
547 */
548void
549lwkt_process_ipiq(void)
550{
551 globaldata_t gd = mycpu;
ac72c7f4 552 globaldata_t sgd;
3b6b7bd1 553 lwkt_ipiq_t ip;
b12defdc 554 cpumask_t mask;
3b6b7bd1
MD
555 int n;
556
5d920ec6 557 ++gd->gd_processing_ipiq;
3b6b7bd1 558again:
b12defdc 559 mask = gd->gd_ipimask;
e32d3244 560 cpu_ccfence();
c07315c4 561 while (CPUMASK_TESTNZERO(mask)) {
b12defdc 562 n = BSFCPUMASK(mask);
3b6b7bd1 563 if (n != gd->gd_cpuid) {
ac72c7f4
MD
564 sgd = globaldata_find(n);
565 ip = sgd->gd_ipiq;
3b6b7bd1 566 if (ip != NULL) {
5d920ec6
MD
567 ip += gd->gd_cpuid;
568 while (lwkt_process_ipiq_core(sgd, ip, NULL, 0))
3b6b7bd1 569 ;
56a6a688
MD
570 /*
571 * Can't NAND before-hand as it will prevent recursive
572 * processing. Sender will adjust windex before adjusting
573 * ipimask.
574 */
5d920ec6
MD
575 ATOMIC_CPUMASK_NANDBIT(gd->gd_ipimask, n);
576 if (ip->ip_rindex != ip->ip_windex)
577 ATOMIC_CPUMASK_ORBIT(gd->gd_ipimask, n);
3b6b7bd1
MD
578 }
579 }
c07315c4 580 CPUMASK_NANDBIT(mask, n);
3b6b7bd1 581 }
c17a6852
MD
582
583 /*
584 * Process pending cpusyncs. If the current thread has a cpusync
585 * active cpusync we only run the list once and do not re-flag
586 * as the thread itself is processing its interlock.
587 */
5d920ec6 588 if (lwkt_process_ipiq_core(gd, &gd->gd_cpusyncq, NULL, 0)) {
da0b0e8b
MD
589 if (gd->gd_curthread->td_cscount == 0)
590 goto again;
591 /* need_ipiq(); do not reflag */
3b6b7bd1 592 }
b12defdc
MD
593
594 /*
e47e3dba 595 * Interlock to allow more IPI interrupts.
b12defdc 596 */
da0b0e8b 597 --gd->gd_processing_ipiq;
3b6b7bd1
MD
598}
599
3b6b7bd1 600void
c7eb0589 601lwkt_process_ipiq_frame(struct intrframe *frame)
3b6b7bd1
MD
602{
603 globaldata_t gd = mycpu;
ac72c7f4 604 globaldata_t sgd;
3b6b7bd1 605 lwkt_ipiq_t ip;
b12defdc 606 cpumask_t mask;
3b6b7bd1
MD
607 int n;
608
5d920ec6 609 ++gd->gd_processing_ipiq;
3b6b7bd1 610again:
b12defdc 611 mask = gd->gd_ipimask;
e32d3244 612 cpu_ccfence();
c07315c4 613 while (CPUMASK_TESTNZERO(mask)) {
b12defdc 614 n = BSFCPUMASK(mask);
3b6b7bd1 615 if (n != gd->gd_cpuid) {
ac72c7f4
MD
616 sgd = globaldata_find(n);
617 ip = sgd->gd_ipiq;
3b6b7bd1 618 if (ip != NULL) {
5d920ec6
MD
619 ip += gd->gd_cpuid;
620 while (lwkt_process_ipiq_core(sgd, ip, frame, 0))
3b6b7bd1 621 ;
56a6a688
MD
622 /*
623 * Can't NAND before-hand as it will prevent recursive
624 * processing. Sender will adjust windex before adjusting
625 * ipimask.
626 */
5d920ec6
MD
627 ATOMIC_CPUMASK_NANDBIT(gd->gd_ipimask, n);
628 if (ip->ip_rindex != ip->ip_windex)
629 ATOMIC_CPUMASK_ORBIT(gd->gd_ipimask, n);
3b6b7bd1
MD
630 }
631 }
c07315c4 632 CPUMASK_NANDBIT(mask, n);
3b6b7bd1
MD
633 }
634 if (gd->gd_cpusyncq.ip_rindex != gd->gd_cpusyncq.ip_windex) {
5d920ec6 635 if (lwkt_process_ipiq_core(gd, &gd->gd_cpusyncq, frame, 0)) {
0f7a3396
MD
636 if (gd->gd_curthread->td_cscount == 0)
637 goto again;
da0b0e8b 638 /* need_ipiq(); do not reflag */
0f7a3396 639 }
3b6b7bd1 640 }
e32d3244 641 --gd->gd_processing_ipiq;
3b6b7bd1 642}
3b6b7bd1 643
5d920ec6
MD
644/*
645 * Only process incoming IPIQs from draining senders and only process them
646 * to the point where the draining sender is able to continue. This is
647 * necessary to avoid deadlocking the IPI subsystem because we are acting on
648 * incoming messages and the callback may queue additional messages.
649 *
650 * We only want to have to act on senders that are blocked to limit the
651 * number of additional messages sent. At the same time, recipients are
652 * trying to drain our own queue. Theoretically this create a pipeline that
653 * cannot deadlock.
654 */
655static void
656lwkt_process_ipiq_nested(void)
657{
658 globaldata_t gd = mycpu;
659 globaldata_t sgd;
660 lwkt_ipiq_t ip;
661 cpumask_t mask;
662 int n;
663 int limit;
cfaeae2a 664
5d920ec6
MD
665 ++gd->gd_processing_ipiq;
666again:
667 mask = gd->gd_ipimask;
668 cpu_ccfence();
669 while (CPUMASK_TESTNZERO(mask)) {
670 n = BSFCPUMASK(mask);
671 if (n != gd->gd_cpuid) {
672 sgd = globaldata_find(n);
673 ip = sgd->gd_ipiq;
674
675 /*
676 * NOTE: We do not mess with the cpumask at all, instead we allow
677 * the top-level ipiq processor deal with it.
678 */
679 if (ip != NULL) {
680 ip += gd->gd_cpuid;
681 if ((limit = ip->ip_drain) != 0) {
682 lwkt_process_ipiq_core(sgd, ip, NULL, limit);
e47e3dba 683 /* no gd_ipimask when doing limited processing */
5d920ec6
MD
684 }
685 }
686 }
687 CPUMASK_NANDBIT(mask, n);
688 }
689
690 /*
691 * Process pending cpusyncs. If the current thread has a cpusync
692 * active cpusync we only run the list once and do not re-flag
693 * as the thread itself is processing its interlock.
694 */
695 if (lwkt_process_ipiq_core(gd, &gd->gd_cpusyncq, NULL, 0)) {
696 if (gd->gd_curthread->td_cscount == 0)
697 goto again;
698 /* need_ipiq(); do not reflag */
699 }
700 --gd->gd_processing_ipiq;
701}
702
703/*
e47e3dba
MD
704 * Process incoming IPI requests until only <limit> are left (0 to exhaust
705 * all incoming IPI requests).
5d920ec6 706 */
3b6b7bd1 707static int
b8a98473 708lwkt_process_ipiq_core(globaldata_t sgd, lwkt_ipiq_t ip,
5d920ec6 709 struct intrframe *frame, int limit)
3b6b7bd1 710{
2de4f77e 711 globaldata_t mygd = mycpu;
3b6b7bd1 712 int ri;
35238fa5 713 int wi;
b8a98473
MD
714 ipifunc3_t copy_func;
715 void *copy_arg1;
716 int copy_arg2;
35238fa5
MD
717
718 /*
b12defdc
MD
719 * Clear the originating core from our ipimask, we will process all
720 * incoming messages.
721 *
35238fa5
MD
722 * Obtain the current write index, which is modified by a remote cpu.
723 * Issue a load fence to prevent speculative reads of e.g. data written
56a6a688 724 * by the other cpu prior to them updating the windex.
35238fa5 725 */
f9235b6d 726 KKASSERT(curthread->td_critcount);
35238fa5
MD
727 wi = ip->ip_windex;
728 cpu_lfence();
2de4f77e 729 ++mygd->gd_intr_nesting_level;
35238fa5 730
3b6b7bd1 731 /*
562273ea
MD
732 * NOTE: xindex is only updated after we are sure the function has
733 * finished execution. Beware lwkt_process_ipiq() reentrancy!
734 * The function may send an IPI which may block/drain.
d64a7617 735 *
562273ea
MD
736 * NOTE: Due to additional IPI operations that the callback function
737 * may make, it is possible for both rindex and windex to advance and
738 * thus for rindex to advance passed our cached windex.
739 *
56a6a688
MD
740 * We must process only through our cached (wi) to ensure that
741 * speculative reads of ip_info[] content do not occur without
742 * a memory barrier.
c17a6852
MD
743 *
744 * NOTE: Single pass only. Returns non-zero if the queue is not empty
745 * on return.
56a6a688
MD
746 *
747 * NOTE: Our 'wi' guarantees that memory loads will not be out of order.
748 * Do NOT reload wi with windex in the below loop unless you also
749 * issue another lfence after reloading it.
3b6b7bd1 750 */
5d920ec6 751 while (wi - (ri = ip->ip_rindex) > limit) {
3b6b7bd1 752 ri &= MAXCPUFIFO_MASK;
b12defdc
MD
753 copy_func = ip->ip_info[ri].func;
754 copy_arg1 = ip->ip_info[ri].arg1;
755 copy_arg2 = ip->ip_info[ri].arg2;
56a6a688 756 cpu_ccfence();
728f6208 757 ++ip->ip_rindex;
a7adb95a 758 logipiq(receive, copy_func, copy_arg1, copy_arg2, sgd, mycpu);
d5b2d319
MD
759#ifdef INVARIANTS
760 if (ipiq_debug && (ip->ip_rindex & 0xFFFFFF) == 0) {
761 kprintf("cpu %d ipifunc %p %p %d (frame %p)\n",
762 mycpu->gd_cpuid,
763 copy_func, copy_arg1, copy_arg2,
ac8ea0ad 764#if defined(__x86_64__)
d5b2d319
MD
765 (frame ? (void *)frame->if_rip : NULL));
766#else
767 NULL);
768#endif
769 }
770#endif
b8a98473 771 copy_func(copy_arg1, copy_arg2, frame);
35238fa5 772 cpu_sfence();
3b6b7bd1 773 ip->ip_xindex = ip->ip_rindex;
e8f15168
MD
774
775#ifdef PANIC_DEBUG
776 /*
777 * Simulate panics during the processing of an IPI
778 */
779 if (mycpu->gd_cpuid == panic_ipiq_cpu && panic_ipiq_count) {
780 if (--panic_ipiq_count == 0) {
781#ifdef DDB
782 Debugger("PANIC_DEBUG");
783#else
784 panic("PANIC_DEBUG");
785#endif
786 }
787 }
788#endif
3b6b7bd1 789 }
2de4f77e 790 --mygd->gd_intr_nesting_level;
4c9f5a7f
MD
791
792 /*
5d920ec6
MD
793 * Return non-zero if there is still more in the queue. Don't worry
794 * about fencing, we will get another interrupt if necessary.
4c9f5a7f 795 */
da0b0e8b 796 return (ip->ip_rindex != ip->ip_windex);
3b6b7bd1
MD
797}
798
6c92c1f2
SZ
799static void
800lwkt_sync_ipiq(void *arg)
801{
5a1a2253 802 volatile cpumask_t *cpumask = arg;
6c92c1f2 803
c07315c4
MD
804 ATOMIC_CPUMASK_NANDBIT(*cpumask, mycpu->gd_cpuid);
805 if (CPUMASK_TESTZERO(*cpumask))
6c92c1f2
SZ
806 wakeup(cpumask);
807}
808
809void
810lwkt_synchronize_ipiqs(const char *wmesg)
811{
5a1a2253 812 volatile cpumask_t other_cpumask;
6c92c1f2 813
c07315c4
MD
814 other_cpumask = smp_active_mask;
815 CPUMASK_ANDMASK(other_cpumask, mycpu->gd_other_cpus);
5a1a2253 816 lwkt_send_ipiq_mask(other_cpumask, lwkt_sync_ipiq,
c07315c4 817 __DEVOLATILE(void *, &other_cpumask));
6c92c1f2 818
c07315c4 819 while (CPUMASK_TESTNZERO(other_cpumask)) {
ae8e83e6 820 tsleep_interlock(&other_cpumask, 0);
c07315c4 821 if (CPUMASK_TESTNZERO(other_cpumask))
d9345d3a 822 tsleep(&other_cpumask, PINTERLOCKED, wmesg, 0);
6c92c1f2 823 }
6c92c1f2
SZ
824}
825
3b6b7bd1
MD
826/*
827 * CPU Synchronization Support
5c71a36a 828 *
d5b2d319
MD
829 * lwkt_cpusync_interlock() - Place specified cpus in a quiescent state.
830 * The current cpu is placed in a hard critical
831 * section.
5c71a36a 832 *
d5b2d319
MD
833 * lwkt_cpusync_deinterlock() - Execute cs_func on specified cpus, including
834 * current cpu if specified, then return.
3b6b7bd1 835 */
3b6b7bd1 836void
d5b2d319 837lwkt_cpusync_simple(cpumask_t mask, cpusync_func_t func, void *arg)
5c71a36a 838{
d5b2d319 839 struct lwkt_cpusync cs;
5c71a36a 840
d5b2d319
MD
841 lwkt_cpusync_init(&cs, mask, func, arg);
842 lwkt_cpusync_interlock(&cs);
843 lwkt_cpusync_deinterlock(&cs);
3b6b7bd1
MD
844}
845
d5b2d319 846
5c71a36a 847void
d5b2d319 848lwkt_cpusync_interlock(lwkt_cpusync_t cs)
3b6b7bd1 849{
0f7a3396 850 globaldata_t gd = mycpu;
d5b2d319 851 cpumask_t mask;
0f7a3396 852
d5b2d319
MD
853 /*
854 * mask acknowledge (cs_mack): 0->mask for stage 1
855 *
856 * mack does not include the current cpu.
857 */
c07315c4
MD
858 mask = cs->cs_mask;
859 CPUMASK_ANDMASK(mask, gd->gd_other_cpus);
860 CPUMASK_ANDMASK(mask, smp_active_mask);
861 CPUMASK_ASSZERO(cs->cs_mack);
862
d5b2d319 863 crit_enter_id("cpusync");
c07315c4 864 if (CPUMASK_TESTNZERO(mask)) {
cfaeae2a 865 DEBUG_PUSH_INFO("cpusync_interlock");
c8cd4196 866 ++ipiq_stat(gd).ipiq_cscount;
0f7a3396 867 ++gd->gd_curthread->td_cscount;
d5b2d319 868 lwkt_send_ipiq_mask(mask, (ipifunc1_t)lwkt_cpusync_remote1, cs);
c07315c4 869 logipiq2(sync_start, (long)CPUMASK_LOWMASK(mask));
c07315c4 870 while (CPUMASK_CMPMASKNEQ(cs->cs_mack, mask)) {
0f7a3396 871 lwkt_process_ipiq();
d5b2d319 872 cpu_pause();
8cee56f4
MD
873#ifdef _KERNEL_VIRTUAL
874 pthread_yield();
875#endif
0f7a3396 876 }
cfaeae2a 877 DEBUG_POP_INFO();
3b6b7bd1 878 }
3b6b7bd1
MD
879}
880
881/*
d5b2d319
MD
882 * Interlocked cpus have executed remote1 and are polling in remote2.
883 * To deinterlock we clear cs_mack and wait for the cpus to execute
884 * the func and set their bit in cs_mack again.
0f7a3396 885 *
3b6b7bd1
MD
886 */
887void
d5b2d319 888lwkt_cpusync_deinterlock(lwkt_cpusync_t cs)
3b6b7bd1 889{
0f7a3396 890 globaldata_t gd = mycpu;
d5b2d319
MD
891 cpumask_t mask;
892
893 /*
894 * mask acknowledge (cs_mack): mack->0->mack for stage 2
895 *
896 * Clearing cpu bits for polling cpus in cs_mack will cause them to
897 * execute stage 2, which executes the cs_func(cs_data) and then sets
898 * their bit in cs_mack again.
899 *
900 * mack does not include the current cpu.
901 */
902 mask = cs->cs_mack;
903 cpu_ccfence();
c07315c4 904 CPUMASK_ASSZERO(cs->cs_mack);
cb31dff3 905 cpu_ccfence();
c07315c4 906 if (cs->cs_func && CPUMASK_TESTBIT(cs->cs_mask, gd->gd_cpuid))
d5b2d319 907 cs->cs_func(cs->cs_data);
c07315c4 908 if (CPUMASK_TESTNZERO(mask)) {
cfaeae2a 909 DEBUG_PUSH_INFO("cpusync_deinterlock");
c07315c4 910 while (CPUMASK_CMPMASKNEQ(cs->cs_mack, mask)) {
0f7a3396 911 lwkt_process_ipiq();
d5b2d319 912 cpu_pause();
8cee56f4
MD
913#ifdef _KERNEL_VIRTUAL
914 pthread_yield();
915#endif
0f7a3396 916 }
cfaeae2a
MD
917 DEBUG_POP_INFO();
918 /*
919 * cpusyncq ipis may be left queued without the RQF flag set due to
920 * a non-zero td_cscount, so be sure to process any laggards after
921 * decrementing td_cscount.
922 */
0f7a3396 923 --gd->gd_curthread->td_cscount;
d5b2d319 924 lwkt_process_ipiq();
c07315c4 925 logipiq2(sync_end, (long)CPUMASK_LOWMASK(mask));
3b6b7bd1 926 }
d5b2d319 927 crit_exit_id("cpusync");
3b6b7bd1
MD
928}
929
3a24972f
MD
930/*
931 * The quick version does not quiesce the target cpu(s) but instead executes
932 * the function on the target cpu(s) and waits for all to acknowledge. This
933 * avoids spinning on the target cpus.
934 *
935 * This function is typically only used for kernel_pmap updates. User pmaps
936 * have to be quiesced.
937 */
938void
939lwkt_cpusync_quick(lwkt_cpusync_t cs)
940{
941 globaldata_t gd = mycpu;
942 cpumask_t mask;
943
944 /*
945 * stage-2 cs_mack only.
946 */
947 mask = cs->cs_mask;
948 CPUMASK_ANDMASK(mask, gd->gd_other_cpus);
949 CPUMASK_ANDMASK(mask, smp_active_mask);
950 CPUMASK_ASSZERO(cs->cs_mack);
951
952 crit_enter_id("cpusync");
953 if (CPUMASK_TESTNZERO(mask)) {
954 DEBUG_PUSH_INFO("cpusync_interlock");
955 ++ipiq_stat(gd).ipiq_cscount;
956 ++gd->gd_curthread->td_cscount;
957 lwkt_send_ipiq_mask(mask, (ipifunc1_t)lwkt_cpusync_remote2, cs);
958 logipiq2(sync_quick, (long)CPUMASK_LOWMASK(mask));
959 while (CPUMASK_CMPMASKNEQ(cs->cs_mack, mask)) {
960 lwkt_process_ipiq();
961 cpu_pause();
962#ifdef _KERNEL_VIRTUAL
963 pthread_yield();
964#endif
965 }
966
967 /*
968 * cpusyncq ipis may be left queued without the RQF flag set due to
969 * a non-zero td_cscount, so be sure to process any laggards after
970 * decrementing td_cscount.
971 */
972 DEBUG_POP_INFO();
973 --gd->gd_curthread->td_cscount;
974 lwkt_process_ipiq();
975 }
976 if (cs->cs_func && CPUMASK_TESTBIT(cs->cs_mask, gd->gd_cpuid))
977 cs->cs_func(cs->cs_data);
978 crit_exit_id("cpusync");
979}
980
3b6b7bd1
MD
981/*
982 * helper IPI remote messaging function.
983 *
984 * Called on remote cpu when a new cpu synchronization request has been
985 * sent to us. Execute the run function and adjust cs_count, then requeue
986 * the request so we spin on it.
987 */
988static void
d5b2d319 989lwkt_cpusync_remote1(lwkt_cpusync_t cs)
3b6b7bd1 990{
d5b2d319
MD
991 globaldata_t gd = mycpu;
992
c07315c4 993 ATOMIC_CPUMASK_ORBIT(cs->cs_mack, gd->gd_cpuid);
d5b2d319 994 lwkt_cpusync_remote2(cs);
3b6b7bd1
MD
995}
996
997/*
998 * helper IPI remote messaging function.
999 *
1000 * Poll for the originator telling us to finish. If it hasn't, requeue
d5b2d319 1001 * our request so we spin on it.
3b6b7bd1
MD
1002 */
1003static void
d5b2d319 1004lwkt_cpusync_remote2(lwkt_cpusync_t cs)
3b6b7bd1 1005{
d5b2d319
MD
1006 globaldata_t gd = mycpu;
1007
c07315c4 1008 if (CPUMASK_TESTMASK(cs->cs_mack, gd->gd_cpumask) == 0) {
d5b2d319
MD
1009 if (cs->cs_func)
1010 cs->cs_func(cs->cs_data);
c07315c4 1011 ATOMIC_CPUMASK_ORBIT(cs->cs_mack, gd->gd_cpuid);
93ad6da2 1012 /* cs can be ripped out at this point */
3b6b7bd1 1013 } else {
3b6b7bd1
MD
1014 lwkt_ipiq_t ip;
1015 int wi;
1016
06c66eb2 1017 cpu_pause();
8cee56f4
MD
1018#ifdef _KERNEL_VIRTUAL
1019 pthread_yield();
1020#endif
06c66eb2
MD
1021 cpu_lfence();
1022
1023 /*
1024 * Requeue our IPI to avoid a deep stack recursion. If no other
1025 * IPIs are pending we can just loop up, which should help VMs
1026 * better-detect spin loops.
1027 */
3b6b7bd1 1028 ip = &gd->gd_cpusyncq;
06c66eb2 1029
3b6b7bd1 1030 wi = ip->ip_windex & MAXCPUFIFO_MASK;
b12defdc
MD
1031 ip->ip_info[wi].func = (ipifunc3_t)(ipifunc1_t)lwkt_cpusync_remote2;
1032 ip->ip_info[wi].arg1 = cs;
1033 ip->ip_info[wi].arg2 = 0;
35238fa5 1034 cpu_sfence();
c17a6852 1035 KKASSERT(ip->ip_windex - ip->ip_rindex < MAXCPUFIFO);
3b6b7bd1 1036 ++ip->ip_windex;
37494a7a 1037 if (ipiq_debug && (ip->ip_windex & 0xFFFFFF) == 0) {
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1038 kprintf("cpu %d cm=%016jx %016jx f=%p\n",
1039 gd->gd_cpuid,
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1040 (intmax_t)CPUMASK_LOWMASK(cs->cs_mask),
1041 (intmax_t)CPUMASK_LOWMASK(cs->cs_mack),
cfaeae2a 1042 cs->cs_func);
37494a7a 1043 }
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1044 }
1045}
ceb6fcad 1046
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1047#define LWKT_IPIQ_NLATENCY 8
1048#define LWKT_IPIQ_NLATENCY_MASK (LWKT_IPIQ_NLATENCY - 1)
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1049
1050struct lwkt_ipiq_latency_log {
2c08e360 1051 int idx; /* unmasked index */
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1052 int pad;
1053 uint64_t latency[LWKT_IPIQ_NLATENCY];
1054};
1055
1056static struct lwkt_ipiq_latency_log lwkt_ipiq_latency_logs[MAXCPU];
2c08e360 1057static uint64_t save_tsc;
ceb6fcad 1058
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1059/*
1060 * IPI callback (already in a critical section)
1061 */
ceb6fcad 1062static void
2c08e360 1063lwkt_ipiq_latency_testfunc(void *arg __unused)
ceb6fcad 1064{
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1065 uint64_t delta_tsc;
1066 struct globaldata *gd;
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1067 struct lwkt_ipiq_latency_log *lat;
1068
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1069 /*
1070 * Get delta TSC (assume TSCs are synchronized) as quickly as
1071 * possible and then convert to nanoseconds.
1072 */
1073 delta_tsc = rdtsc_ordered() - save_tsc;
1074 delta_tsc = delta_tsc * 1000000000LU / tsc_frequency;
ceb6fcad 1075
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1076 /*
1077 * Record in our save array.
1078 */
1079 gd = mycpu;
1080 lat = &lwkt_ipiq_latency_logs[gd->gd_cpuid];
1081 lat->latency[lat->idx & LWKT_IPIQ_NLATENCY_MASK] = delta_tsc;
1082 ++lat->idx;
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1083}
1084
1085/*
1086 * Send IPI from cpu0 to other cpus
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1087 *
1088 * NOTE: Machine must be idle for test to run dependably, and also probably
1089 * a good idea not to be running powerd.
1090 *
1091 * NOTE: Caller should use 'usched :1 <command>' to lock itself to cpu 0.
1092 * See 'ipitest' script in /usr/src/test/sysperf/ipitest
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1093 */
1094static int
1095lwkt_ipiq_latency_test(SYSCTL_HANDLER_ARGS)
1096{
1097 struct globaldata *gd;
1098 int cpu = 0, orig_cpu, error;
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1099
1100 error = sysctl_handle_int(oidp, &cpu, arg2, req);
1101 if (error || req->newptr == NULL)
1102 return error;
1103
1104 if (cpu == 0)
1105 return 0;
1106 else if (cpu >= ncpus || cpu < 0)
1107 return EINVAL;
1108
1109 orig_cpu = mycpuid;
1110 lwkt_migratecpu(0);
1111
1112 gd = globaldata_find(cpu);
1113
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1114 save_tsc = rdtsc_ordered();
1115 lwkt_send_ipiq(gd, lwkt_ipiq_latency_testfunc, NULL);
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1116
1117 lwkt_migratecpu(orig_cpu);
1118 return 0;
1119}
1120
1121SYSCTL_NODE(_debug, OID_AUTO, ipiq, CTLFLAG_RW, 0, "");
1122SYSCTL_PROC(_debug_ipiq, OID_AUTO, latency_test, CTLTYPE_INT | CTLFLAG_RW,
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1123 NULL, 0, lwkt_ipiq_latency_test, "I",
1124 "ipi latency test, arg: remote cpuid");
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1125
1126static int
1127lwkt_ipiq_latency(SYSCTL_HANDLER_ARGS)
1128{
1129 struct lwkt_ipiq_latency_log *latency = arg1;
1130 uint64_t lat[LWKT_IPIQ_NLATENCY];
1131 int i;
1132
1133 for (i = 0; i < LWKT_IPIQ_NLATENCY; ++i)
1134 lat[i] = latency->latency[i];
1135
1136 return sysctl_handle_opaque(oidp, lat, sizeof(lat), req);
1137}
1138
1139static void
1140lwkt_ipiq_latency_init(void *dummy __unused)
1141{
1142 int cpu;
1143
1144 for (cpu = 0; cpu < ncpus; ++cpu) {
1145 char name[32];
1146
1147 ksnprintf(name, sizeof(name), "latency%d", cpu);
1148 SYSCTL_ADD_PROC(NULL, SYSCTL_STATIC_CHILDREN(_debug_ipiq),
1149 OID_AUTO, name, CTLTYPE_OPAQUE | CTLFLAG_RD,
1150 &lwkt_ipiq_latency_logs[cpu], 0, lwkt_ipiq_latency,
82ce5490 1151 "LU", "7 latest ipi latency measurement results");
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1152 }
1153}
1154SYSINIT(lwkt_ipiq_latency, SI_SUB_CONFIGURE, SI_ORDER_ANY,
1155 lwkt_ipiq_latency_init, NULL);