| 1 | /* |
| 2 | * Copyright (c) 2003,2004 The DragonFly Project. All rights reserved. |
| 3 | * |
| 4 | * This code is derived from software contributed to The DragonFly Project |
| 5 | * by Matthew Dillon <dillon@backplane.com> |
| 6 | * |
| 7 | * Redistribution and use in source and binary forms, with or without |
| 8 | * modification, are permitted provided that the following conditions |
| 9 | * are met: |
| 10 | * |
| 11 | * 1. Redistributions of source code must retain the above copyright |
| 12 | * notice, this list of conditions and the following disclaimer. |
| 13 | * 2. Redistributions in binary form must reproduce the above copyright |
| 14 | * notice, this list of conditions and the following disclaimer in |
| 15 | * the documentation and/or other materials provided with the |
| 16 | * distribution. |
| 17 | * 3. Neither the name of The DragonFly Project nor the names of its |
| 18 | * contributors may be used to endorse or promote products derived |
| 19 | * from this software without specific, prior written permission. |
| 20 | * |
| 21 | * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS |
| 22 | * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT |
| 23 | * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS |
| 24 | * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE |
| 25 | * COPYRIGHT HOLDERS OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, |
| 26 | * INCIDENTAL, SPECIAL, EXEMPLARY OR CONSEQUENTIAL DAMAGES (INCLUDING, |
| 27 | * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; |
| 28 | * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED |
| 29 | * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, |
| 30 | * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT |
| 31 | * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF |
| 32 | * SUCH DAMAGE. |
| 33 | * |
| 34 | * Copyright (c) 1990 The Regents of the University of California. |
| 35 | * All rights reserved. |
| 36 | * |
| 37 | * This code is derived from software contributed to Berkeley by |
| 38 | * William Jolitz. |
| 39 | * |
| 40 | * Redistribution and use in source and binary forms, with or without |
| 41 | * modification, are permitted provided that the following conditions |
| 42 | * are met: |
| 43 | * 1. Redistributions of source code must retain the above copyright |
| 44 | * notice, this list of conditions and the following disclaimer. |
| 45 | * 2. Redistributions in binary form must reproduce the above copyright |
| 46 | * notice, this list of conditions and the following disclaimer in the |
| 47 | * documentation and/or other materials provided with the distribution. |
| 48 | * 3. All advertising materials mentioning features or use of this software |
| 49 | * must display the following acknowledgement: |
| 50 | * This product includes software developed by the University of |
| 51 | * California, Berkeley and its contributors. |
| 52 | * 4. Neither the name of the University nor the names of its contributors |
| 53 | * may be used to endorse or promote products derived from this software |
| 54 | * without specific prior written permission. |
| 55 | * |
| 56 | * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND |
| 57 | * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE |
| 58 | * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE |
| 59 | * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE |
| 60 | * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL |
| 61 | * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS |
| 62 | * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) |
| 63 | * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT |
| 64 | * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY |
| 65 | * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF |
| 66 | * SUCH DAMAGE. |
| 67 | * |
| 68 | * $FreeBSD: src/sys/i386/i386/swtch.s,v 1.89.2.10 2003/01/23 03:36:24 ps Exp $ |
| 69 | * $DragonFly: src/sys/platform/vkernel/i386/swtch.s,v 1.8 2007/07/01 02:51:43 dillon Exp $ |
| 70 | */ |
| 71 | |
| 72 | #include "use_npx.h" |
| 73 | |
| 74 | #include <sys/rtprio.h> |
| 75 | |
| 76 | #include <machine/asmacros.h> |
| 77 | #include <machine/segments.h> |
| 78 | |
| 79 | #include <machine/pmap.h> |
| 80 | #include <machine/lock.h> |
| 81 | |
| 82 | #include "assym.s" |
| 83 | |
| 84 | #if defined(SMP) |
| 85 | #define MPLOCKED lock ; |
| 86 | #else |
| 87 | #define MPLOCKED |
| 88 | #endif |
| 89 | |
| 90 | .data |
| 91 | |
| 92 | .globl panic |
| 93 | .globl lwkt_switch_return |
| 94 | |
| 95 | #if defined(SWTCH_OPTIM_STATS) |
| 96 | .globl swtch_optim_stats, tlb_flush_count |
| 97 | swtch_optim_stats: .long 0 /* number of _swtch_optims */ |
| 98 | tlb_flush_count: .long 0 |
| 99 | #endif |
| 100 | |
| 101 | .text |
| 102 | |
| 103 | |
| 104 | /* |
| 105 | * cpu_heavy_switch(next_thread) |
| 106 | * |
| 107 | * Switch from the current thread to a new thread. This entry |
| 108 | * is normally called via the thread->td_switch function, and will |
| 109 | * only be called when the current thread is a heavy weight process. |
| 110 | * |
| 111 | * Some instructions have been reordered to reduce pipeline stalls. |
| 112 | * |
| 113 | * YYY disable interrupts once giant is removed. |
| 114 | */ |
| 115 | ENTRY(cpu_heavy_switch) |
| 116 | /* |
| 117 | * Save general regs |
| 118 | */ |
| 119 | movl PCPU(curthread),%ecx |
| 120 | movl (%esp),%eax /* (reorder optimization) */ |
| 121 | movl TD_PCB(%ecx),%edx /* EDX = PCB */ |
| 122 | movl %eax,PCB_EIP(%edx) /* return PC may be modified */ |
| 123 | movl %ebx,PCB_EBX(%edx) |
| 124 | movl %esp,PCB_ESP(%edx) |
| 125 | movl %ebp,PCB_EBP(%edx) |
| 126 | movl %esi,PCB_ESI(%edx) |
| 127 | movl %edi,PCB_EDI(%edx) |
| 128 | |
| 129 | movl %ecx,%ebx /* EBX = curthread */ |
| 130 | movl TD_LWP(%ecx),%ecx |
| 131 | movl PCPU(cpuid), %eax |
| 132 | movl LWP_VMSPACE(%ecx), %ecx /* ECX = vmspace */ |
| 133 | MPLOCKED btrl %eax, VM_PMAP+PM_ACTIVE(%ecx) |
| 134 | |
| 135 | /* |
| 136 | * Push the LWKT switch restore function, which resumes a heavy |
| 137 | * weight process. Note that the LWKT switcher is based on |
| 138 | * TD_SP, while the heavy weight process switcher is based on |
| 139 | * PCB_ESP. TD_SP is usually two ints pushed relative to |
| 140 | * PCB_ESP. We push the flags for later restore by cpu_heavy_restore. |
| 141 | */ |
| 142 | pushfl |
| 143 | pushl $cpu_heavy_restore |
| 144 | movl %esp,TD_SP(%ebx) |
| 145 | |
| 146 | /* |
| 147 | * Save debug regs if necessary |
| 148 | */ |
| 149 | movb PCB_FLAGS(%edx),%al |
| 150 | andb $PCB_DBREGS,%al |
| 151 | jz 1f /* no, skip over */ |
| 152 | movl %dr7,%eax /* yes, do the save */ |
| 153 | movl %eax,PCB_DR7(%edx) |
| 154 | andl $0x0000fc00, %eax /* disable all watchpoints */ |
| 155 | movl %eax,%dr7 |
| 156 | movl %dr6,%eax |
| 157 | movl %eax,PCB_DR6(%edx) |
| 158 | movl %dr3,%eax |
| 159 | movl %eax,PCB_DR3(%edx) |
| 160 | movl %dr2,%eax |
| 161 | movl %eax,PCB_DR2(%edx) |
| 162 | movl %dr1,%eax |
| 163 | movl %eax,PCB_DR1(%edx) |
| 164 | movl %dr0,%eax |
| 165 | movl %eax,PCB_DR0(%edx) |
| 166 | 1: |
| 167 | |
| 168 | #if NNPX > 0 |
| 169 | /* |
| 170 | * Save the FP state if we have used the FP. Note that calling |
| 171 | * npxsave will NULL out PCPU(npxthread). |
| 172 | */ |
| 173 | cmpl %ebx,PCPU(npxthread) |
| 174 | jne 1f |
| 175 | pushl TD_SAVEFPU(%ebx) |
| 176 | call npxsave /* do it in a big C function */ |
| 177 | addl $4,%esp /* EAX, ECX, EDX trashed */ |
| 178 | 1: |
| 179 | #endif /* NNPX > 0 */ |
| 180 | |
| 181 | /* |
| 182 | * Switch to the next thread, which was passed as an argument |
| 183 | * to cpu_heavy_switch(). Due to the eflags and switch-restore |
| 184 | * function we pushed, the argument is at 12(%esp). Set the current |
| 185 | * thread, load the stack pointer, and 'ret' into the switch-restore |
| 186 | * function. |
| 187 | * |
| 188 | * The switch restore function expects the new thread to be in %eax |
| 189 | * and the old one to be in %ebx. |
| 190 | * |
| 191 | * There is a one-instruction window where curthread is the new |
| 192 | * thread but %esp still points to the old thread's stack, but |
| 193 | * we are protected by a critical section so it is ok. |
| 194 | */ |
| 195 | movl 12(%esp),%eax /* EAX = newtd, EBX = oldtd */ |
| 196 | movl %eax,PCPU(curthread) |
| 197 | movl TD_SP(%eax),%esp |
| 198 | ret |
| 199 | |
| 200 | /* |
| 201 | * cpu_exit_switch() |
| 202 | * |
| 203 | * The switch function is changed to this when a thread is going away |
| 204 | * for good. We have to ensure that the MMU state is not cached, and |
| 205 | * we don't bother saving the existing thread state before switching. |
| 206 | * |
| 207 | * At this point we are in a critical section and this cpu owns the |
| 208 | * thread's token, which serves as an interlock until the switchout is |
| 209 | * complete. |
| 210 | */ |
| 211 | ENTRY(cpu_exit_switch) |
| 212 | /* |
| 213 | * Get us out of the vmspace |
| 214 | */ |
| 215 | #if 0 |
| 216 | movl IdlePTD,%ecx |
| 217 | movl %cr3,%eax |
| 218 | cmpl %ecx,%eax |
| 219 | je 1f |
| 220 | movl %ecx,%cr3 |
| 221 | 1: |
| 222 | #endif |
| 223 | movl PCPU(curthread),%ebx |
| 224 | |
| 225 | /* |
| 226 | * If this is a process/lwp, deactivate the pmap after we've |
| 227 | * switched it out. |
| 228 | */ |
| 229 | movl TD_LWP(%ebx),%ecx |
| 230 | testl %ecx,%ecx |
| 231 | jz 2f |
| 232 | movl PCPU(cpuid), %eax |
| 233 | movl LWP_VMSPACE(%ecx), %ecx /* ECX = vmspace */ |
| 234 | MPLOCKED btrl %eax, VM_PMAP+PM_ACTIVE(%ecx) |
| 235 | 2: |
| 236 | /* |
| 237 | * Switch to the next thread. RET into the restore function, which |
| 238 | * expects the new thread in EAX and the old in EBX. |
| 239 | * |
| 240 | * There is a one-instruction window where curthread is the new |
| 241 | * thread but %esp still points to the old thread's stack, but |
| 242 | * we are protected by a critical section so it is ok. |
| 243 | */ |
| 244 | movl 4(%esp),%eax |
| 245 | movl %eax,PCPU(curthread) |
| 246 | movl TD_SP(%eax),%esp |
| 247 | ret |
| 248 | |
| 249 | /* |
| 250 | * cpu_heavy_restore() (current thread in %eax on entry) |
| 251 | * |
| 252 | * Restore the thread after an LWKT switch. This entry is normally |
| 253 | * called via the LWKT switch restore function, which was pulled |
| 254 | * off the thread stack and jumped to. |
| 255 | * |
| 256 | * This entry is only called if the thread was previously saved |
| 257 | * using cpu_heavy_switch() (the heavy weight process thread switcher), |
| 258 | * or when a new process is initially scheduled. |
| 259 | * |
| 260 | * NOTE: The lwp may be in any state, not necessarily LSRUN, because |
| 261 | * a preemption switch may interrupt the process and then return via |
| 262 | * cpu_heavy_restore. |
| 263 | * |
| 264 | * YYY theoretically we do not have to restore everything here, a lot |
| 265 | * of this junk can wait until we return to usermode. But for now |
| 266 | * we restore everything. |
| 267 | * |
| 268 | * YYY the PCB crap is really crap, it makes startup a bitch because |
| 269 | * we can't switch away. |
| 270 | * |
| 271 | * YYY note: spl check is done in mi_switch when it splx()'s. |
| 272 | */ |
| 273 | |
| 274 | ENTRY(cpu_heavy_restore) |
| 275 | popfl |
| 276 | movl TD_PCB(%eax),%edx /* EDX = PCB */ |
| 277 | movl TD_LWP(%eax),%ecx |
| 278 | |
| 279 | #if defined(SWTCH_OPTIM_STATS) |
| 280 | incl _swtch_optim_stats |
| 281 | #endif |
| 282 | /* |
| 283 | * Tell the pmap that our cpu is using the VMSPACE now. We cannot |
| 284 | * safely test/reload %cr3 until after we have set the bit in the |
| 285 | * pmap (remember, we do not hold the MP lock in the switch code). |
| 286 | */ |
| 287 | movl LWP_VMSPACE(%ecx), %ecx /* ECX = vmspace */ |
| 288 | movl PCPU(cpuid), %esi |
| 289 | MPLOCKED btsl %esi, VM_PMAP+PM_ACTIVE(%ecx) |
| 290 | |
| 291 | /* |
| 292 | * Restore the MMU address space. If it is the same as the last |
| 293 | * thread we don't have to invalidate the tlb (i.e. reload cr3). |
| 294 | * YYY which naturally also means that the PM_ACTIVE bit had better |
| 295 | * already have been set before we set it above, check? YYY |
| 296 | */ |
| 297 | #if 0 |
| 298 | movl %cr3,%esi |
| 299 | movl PCB_CR3(%edx),%ecx |
| 300 | cmpl %esi,%ecx |
| 301 | je 4f |
| 302 | #if defined(SWTCH_OPTIM_STATS) |
| 303 | decl _swtch_optim_stats |
| 304 | incl _tlb_flush_count |
| 305 | #endif |
| 306 | movl %ecx,%cr3 |
| 307 | 4: |
| 308 | #endif |
| 309 | /* |
| 310 | * NOTE: %ebx is the previous thread and %eax is the new thread. |
| 311 | * %ebx is retained throughout so we can return it. |
| 312 | * |
| 313 | * lwkt_switch[_return] is responsible for handling TDF_RUNNING. |
| 314 | */ |
| 315 | #if 0 |
| 316 | /* |
| 317 | * Deal with the PCB extension, restore the private tss |
| 318 | */ |
| 319 | movl PCB_EXT(%edx),%edi /* check for a PCB extension */ |
| 320 | movl $1,%ecx /* maybe mark use of a private tss */ |
| 321 | testl %edi,%edi |
| 322 | jnz 2f |
| 323 | |
| 324 | /* |
| 325 | * Going back to the common_tss. We may need to update TSS_ESP0 |
| 326 | * which sets the top of the supervisor stack when entering from |
| 327 | * usermode. The PCB is at the top of the stack but we need another |
| 328 | * 16 bytes to take vm86 into account. |
| 329 | */ |
| 330 | leal -16(%edx),%ecx |
| 331 | movl %ecx, PCPU(common_tss) + TSS_ESP0 |
| 332 | |
| 333 | cmpl $0,PCPU(private_tss) /* don't have to reload if */ |
| 334 | je 3f /* already using the common TSS */ |
| 335 | |
| 336 | subl %ecx,%ecx /* unmark use of private tss */ |
| 337 | |
| 338 | /* |
| 339 | * Get the address of the common TSS descriptor for the ltr. |
| 340 | * There is no way to get the address of a segment-accessed variable |
| 341 | * so we store a self-referential pointer at the base of the per-cpu |
| 342 | * data area and add the appropriate offset. |
| 343 | */ |
| 344 | movl $gd_common_tssd, %edi |
| 345 | addl %fs:0, %edi |
| 346 | |
| 347 | /* |
| 348 | * Move the correct TSS descriptor into the GDT slot, then reload |
| 349 | * ltr. |
| 350 | */ |
| 351 | 2: |
| 352 | movl %ecx,PCPU(private_tss) /* mark/unmark private tss */ |
| 353 | movl PCPU(tss_gdt), %ecx /* entry in GDT */ |
| 354 | movl 0(%edi), %eax |
| 355 | movl %eax, 0(%ecx) |
| 356 | movl 4(%edi), %eax |
| 357 | movl %eax, 4(%ecx) |
| 358 | movl $GPROC0_SEL*8, %esi /* GSEL(entry, SEL_KPL) */ |
| 359 | ltr %si |
| 360 | 3: |
| 361 | #endif |
| 362 | /* |
| 363 | * Restore general registers. %ebx is restored later. |
| 364 | */ |
| 365 | movl PCB_ESP(%edx),%esp |
| 366 | movl PCB_EBP(%edx),%ebp |
| 367 | movl PCB_ESI(%edx),%esi |
| 368 | movl PCB_EDI(%edx),%edi |
| 369 | movl PCB_EIP(%edx),%eax |
| 370 | movl %eax,(%esp) |
| 371 | |
| 372 | #if 0 |
| 373 | /* |
| 374 | * Restore the user LDT if we have one |
| 375 | */ |
| 376 | cmpl $0, PCB_USERLDT(%edx) |
| 377 | jnz 1f |
| 378 | movl _default_ldt,%eax |
| 379 | cmpl PCPU(currentldt),%eax |
| 380 | je 2f |
| 381 | lldt _default_ldt |
| 382 | movl %eax,PCPU(currentldt) |
| 383 | jmp 2f |
| 384 | 1: pushl %edx |
| 385 | call set_user_ldt |
| 386 | popl %edx |
| 387 | 2: |
| 388 | #endif |
| 389 | #if 0 |
| 390 | /* |
| 391 | * Restore the user TLS if we have one |
| 392 | */ |
| 393 | pushl %edx |
| 394 | call set_user_TLS |
| 395 | popl %edx |
| 396 | #endif |
| 397 | |
| 398 | /* |
| 399 | * Restore the DEBUG register state if necessary. |
| 400 | */ |
| 401 | movb PCB_FLAGS(%edx),%al |
| 402 | andb $PCB_DBREGS,%al |
| 403 | jz 1f /* no, skip over */ |
| 404 | movl PCB_DR6(%edx),%eax /* yes, do the restore */ |
| 405 | movl %eax,%dr6 |
| 406 | movl PCB_DR3(%edx),%eax |
| 407 | movl %eax,%dr3 |
| 408 | movl PCB_DR2(%edx),%eax |
| 409 | movl %eax,%dr2 |
| 410 | movl PCB_DR1(%edx),%eax |
| 411 | movl %eax,%dr1 |
| 412 | movl PCB_DR0(%edx),%eax |
| 413 | movl %eax,%dr0 |
| 414 | movl %dr7,%eax /* load dr7 so as not to disturb */ |
| 415 | andl $0x0000fc00,%eax /* reserved bits */ |
| 416 | movl PCB_DR7(%edx),%ecx |
| 417 | andl $~0x0000fc00,%ecx |
| 418 | orl %ecx,%eax |
| 419 | movl %eax,%dr7 |
| 420 | 1: |
| 421 | movl %ebx,%eax /* return previous thread */ |
| 422 | movl PCB_EBX(%edx),%ebx |
| 423 | ret |
| 424 | |
| 425 | /* |
| 426 | * savectx(pcb) |
| 427 | * |
| 428 | * Update pcb, saving current processor state. |
| 429 | */ |
| 430 | ENTRY(savectx) |
| 431 | /* fetch PCB */ |
| 432 | movl 4(%esp),%ecx |
| 433 | |
| 434 | /* caller's return address - child won't execute this routine */ |
| 435 | movl (%esp),%eax |
| 436 | movl %eax,PCB_EIP(%ecx) |
| 437 | movl %ebx,PCB_EBX(%ecx) |
| 438 | movl %esp,PCB_ESP(%ecx) |
| 439 | movl %ebp,PCB_EBP(%ecx) |
| 440 | movl %esi,PCB_ESI(%ecx) |
| 441 | movl %edi,PCB_EDI(%ecx) |
| 442 | |
| 443 | #if NNPX > 0 |
| 444 | /* |
| 445 | * If npxthread == NULL, then the npx h/w state is irrelevant and the |
| 446 | * state had better already be in the pcb. This is true for forks |
| 447 | * but not for dumps (the old book-keeping with FP flags in the pcb |
| 448 | * always lost for dumps because the dump pcb has 0 flags). |
| 449 | * |
| 450 | * If npxthread != NULL, then we have to save the npx h/w state to |
| 451 | * npxthread's pcb and copy it to the requested pcb, or save to the |
| 452 | * requested pcb and reload. Copying is easier because we would |
| 453 | * have to handle h/w bugs for reloading. We used to lose the |
| 454 | * parent's npx state for forks by forgetting to reload. |
| 455 | */ |
| 456 | movl PCPU(npxthread),%eax |
| 457 | testl %eax,%eax |
| 458 | je 1f |
| 459 | |
| 460 | pushl %ecx /* target pcb */ |
| 461 | movl TD_SAVEFPU(%eax),%eax /* originating savefpu area */ |
| 462 | pushl %eax |
| 463 | |
| 464 | pushl %eax |
| 465 | call npxsave |
| 466 | addl $4,%esp |
| 467 | |
| 468 | popl %eax |
| 469 | popl %ecx |
| 470 | |
| 471 | pushl $PCB_SAVEFPU_SIZE |
| 472 | leal PCB_SAVEFPU(%ecx),%ecx |
| 473 | pushl %ecx |
| 474 | pushl %eax |
| 475 | call bcopy |
| 476 | addl $12,%esp |
| 477 | #endif /* NNPX > 0 */ |
| 478 | |
| 479 | 1: |
| 480 | ret |
| 481 | |
| 482 | /* |
| 483 | * cpu_idle_restore() (current thread in %eax on entry) (one-time execution) |
| 484 | * |
| 485 | * Don't bother setting up any regs other then %ebp so backtraces |
| 486 | * don't die. This restore function is used to bootstrap into the |
| 487 | * cpu_idle() LWKT only, after that cpu_lwkt_*() will be used for |
| 488 | * switching. |
| 489 | * |
| 490 | * Clear TDF_RUNNING in old thread only after we've cleaned up %cr3. |
| 491 | * This only occurs during system boot so no special handling is |
| 492 | * required for migration. |
| 493 | * |
| 494 | * If we are an AP we have to call ap_init() before jumping to |
| 495 | * cpu_idle(). ap_init() will synchronize with the BP and finish |
| 496 | * setting up various ncpu-dependant globaldata fields. This may |
| 497 | * happen on UP as well as SMP if we happen to be simulating multiple |
| 498 | * cpus. |
| 499 | */ |
| 500 | ENTRY(cpu_idle_restore) |
| 501 | /* cli */ |
| 502 | movl $0,%ebp |
| 503 | pushl $0 |
| 504 | andl $~TDF_RUNNING,TD_FLAGS(%ebx) |
| 505 | orl $TDF_RUNNING,TD_FLAGS(%eax) /* manual, no switch_return */ |
| 506 | #ifdef SMP |
| 507 | cmpl $0,PCPU(cpuid) |
| 508 | je 1f |
| 509 | call ap_init |
| 510 | 1: |
| 511 | #endif |
| 512 | /* sti */ |
| 513 | jmp cpu_idle |
| 514 | |
| 515 | /* |
| 516 | * cpu_kthread_restore() (current thread is %eax on entry) (one-time execution) |
| 517 | * |
| 518 | * Don't bother setting up any regs other then %ebp so backtraces |
| 519 | * don't die. This restore function is used to bootstrap into an |
| 520 | * LWKT based kernel thread only. cpu_lwkt_switch() will be used |
| 521 | * after this. |
| 522 | * |
| 523 | * Since all of our context is on the stack we are reentrant and |
| 524 | * we can release our critical section and enable interrupts early. |
| 525 | * |
| 526 | * Because this switch target does not 'return' to lwkt_switch() |
| 527 | * we have to call lwkt_switch_return(otd) to clean up otd. |
| 528 | * otd is in %ebx. |
| 529 | */ |
| 530 | ENTRY(cpu_kthread_restore) |
| 531 | /*sti*/ |
| 532 | movl TD_PCB(%eax),%esi |
| 533 | movl $0,%ebp |
| 534 | |
| 535 | pushl %eax |
| 536 | pushl %ebx /* argument to lwkt_switch_return */ |
| 537 | call lwkt_switch_return |
| 538 | addl $4,%esp |
| 539 | popl %eax |
| 540 | decl TD_CRITCOUNT(%eax) |
| 541 | popl %eax /* kthread exit function */ |
| 542 | pushl PCB_EBX(%esi) /* argument to ESI function */ |
| 543 | pushl %eax /* set exit func as return address */ |
| 544 | movl PCB_ESI(%esi),%eax |
| 545 | jmp *%eax |
| 546 | |
| 547 | /* |
| 548 | * cpu_lwkt_switch() |
| 549 | * |
| 550 | * Standard LWKT switching function. Only non-scratch registers are |
| 551 | * saved and we don't bother with the MMU state or anything else. |
| 552 | * |
| 553 | * This function is always called while in a critical section. |
| 554 | * |
| 555 | * There is a one-instruction window where curthread is the new |
| 556 | * thread but %esp still points to the old thread's stack, but |
| 557 | * we are protected by a critical section so it is ok. |
| 558 | * |
| 559 | * YYY BGL, SPL |
| 560 | */ |
| 561 | ENTRY(cpu_lwkt_switch) |
| 562 | pushl %ebp /* note: GDB hacked to locate ebp relative to td_sp */ |
| 563 | pushl %ebx |
| 564 | movl PCPU(curthread),%ebx |
| 565 | pushl %esi |
| 566 | pushl %edi |
| 567 | pushfl |
| 568 | /* warning: adjust movl into %eax below if you change the pushes */ |
| 569 | |
| 570 | #if NNPX > 0 |
| 571 | /* |
| 572 | * Save the FP state if we have used the FP. Note that calling |
| 573 | * npxsave will NULL out PCPU(npxthread). |
| 574 | * |
| 575 | * We have to deal with the FP state for LWKT threads in case they |
| 576 | * happen to get preempted or block while doing an optimized |
| 577 | * bzero/bcopy/memcpy. |
| 578 | */ |
| 579 | cmpl %ebx,PCPU(npxthread) |
| 580 | jne 1f |
| 581 | pushl TD_SAVEFPU(%ebx) |
| 582 | call npxsave /* do it in a big C function */ |
| 583 | addl $4,%esp /* EAX, ECX, EDX trashed */ |
| 584 | 1: |
| 585 | #endif /* NNPX > 0 */ |
| 586 | |
| 587 | movl 4+20(%esp),%eax /* switch to this thread */ |
| 588 | pushl $cpu_lwkt_restore |
| 589 | movl %esp,TD_SP(%ebx) |
| 590 | movl %eax,PCPU(curthread) |
| 591 | movl TD_SP(%eax),%esp |
| 592 | |
| 593 | /* |
| 594 | * eax contains new thread, ebx contains old thread. |
| 595 | */ |
| 596 | ret |
| 597 | |
| 598 | /* |
| 599 | * cpu_lwkt_restore() (current thread in %eax on entry) |
| 600 | * |
| 601 | * Standard LWKT restore function. This function is always called |
| 602 | * while in a critical section. |
| 603 | * |
| 604 | * Warning: due to preemption the restore function can be used to |
| 605 | * 'return' to the original thread. Interrupt disablement must be |
| 606 | * protected through the switch so we cannot run splz here. |
| 607 | */ |
| 608 | ENTRY(cpu_lwkt_restore) |
| 609 | /* |
| 610 | * NOTE: %ebx is the previous thread and %eax is the new thread. |
| 611 | * %ebx is retained throughout so we can return it. |
| 612 | * |
| 613 | * lwkt_switch[_return] is responsible for handling TDF_RUNNING. |
| 614 | */ |
| 615 | movl %ebx,%eax |
| 616 | popfl |
| 617 | popl %edi |
| 618 | popl %esi |
| 619 | popl %ebx |
| 620 | popl %ebp |
| 621 | ret |
| 622 | |
| 623 | /* |
| 624 | * bootstrap_idle() |
| 625 | * |
| 626 | * Make AP become the idle loop. |
| 627 | */ |
| 628 | ENTRY(bootstrap_idle) |
| 629 | movl PCPU(curthread),%eax |
| 630 | movl %eax,%ebx |
| 631 | movl TD_SP(%eax),%esp |
| 632 | ret |