| 1 | /*- |
| 2 | * Copyright (c) 2009 Yahoo! Inc. |
| 3 | * All rights reserved. |
| 4 | * |
| 5 | * Redistribution and use in source and binary forms, with or without |
| 6 | * modification, are permitted provided that the following conditions |
| 7 | * are met: |
| 8 | * 1. Redistributions of source code must retain the above copyright |
| 9 | * notice, this list of conditions and the following disclaimer. |
| 10 | * 2. Redistributions in binary form must reproduce the above copyright |
| 11 | * notice, this list of conditions and the following disclaimer in the |
| 12 | * documentation and/or other materials provided with the distribution. |
| 13 | * |
| 14 | * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND |
| 15 | * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE |
| 16 | * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE |
| 17 | * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE |
| 18 | * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL |
| 19 | * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS |
| 20 | * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) |
| 21 | * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT |
| 22 | * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY |
| 23 | * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF |
| 24 | * SUCH DAMAGE. |
| 25 | * |
| 26 | */ |
| 27 | /*- |
| 28 | * Copyright (c) 2011 LSI Corp. |
| 29 | * All rights reserved. |
| 30 | * |
| 31 | * Redistribution and use in source and binary forms, with or without |
| 32 | * modification, are permitted provided that the following conditions |
| 33 | * are met: |
| 34 | * 1. Redistributions of source code must retain the above copyright |
| 35 | * notice, this list of conditions and the following disclaimer. |
| 36 | * 2. Redistributions in binary form must reproduce the above copyright |
| 37 | * notice, this list of conditions and the following disclaimer in the |
| 38 | * documentation and/or other materials provided with the distribution. |
| 39 | * |
| 40 | * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND |
| 41 | * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE |
| 42 | * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE |
| 43 | * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE |
| 44 | * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL |
| 45 | * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS |
| 46 | * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) |
| 47 | * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT |
| 48 | * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY |
| 49 | * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF |
| 50 | * SUCH DAMAGE. |
| 51 | * |
| 52 | * LSI MPT-Fusion Host Adapter FreeBSD |
| 53 | * |
| 54 | * $FreeBSD: src/sys/dev/mps/mps.c,v 1.14 2012/01/26 18:17:21 ken Exp $ |
| 55 | */ |
| 56 | |
| 57 | /* Communications core for LSI MPT2 */ |
| 58 | |
| 59 | /* TODO Move headers to mpsvar */ |
| 60 | #include <sys/types.h> |
| 61 | #include <sys/param.h> |
| 62 | #include <sys/systm.h> |
| 63 | #include <sys/kernel.h> |
| 64 | #include <sys/lock.h> |
| 65 | #include <sys/globaldata.h> |
| 66 | #include <sys/module.h> |
| 67 | #include <sys/bus.h> |
| 68 | #include <sys/conf.h> |
| 69 | #include <sys/bio.h> |
| 70 | #include <sys/malloc.h> |
| 71 | #include <sys/uio.h> |
| 72 | #include <sys/sysctl.h> |
| 73 | #include <sys/queue.h> |
| 74 | #include <sys/kthread.h> |
| 75 | #include <sys/endian.h> |
| 76 | #include <sys/eventhandler.h> |
| 77 | |
| 78 | #include <sys/rman.h> |
| 79 | |
| 80 | #include <bus/pci/pcivar.h> |
| 81 | |
| 82 | #include <bus/cam/scsi/scsi_all.h> |
| 83 | |
| 84 | #include <dev/raid/mps/mpi/mpi2_type.h> |
| 85 | #include <dev/raid/mps/mpi/mpi2.h> |
| 86 | #include <dev/raid/mps/mpi/mpi2_ioc.h> |
| 87 | #include <dev/raid/mps/mpi/mpi2_sas.h> |
| 88 | #include <dev/raid/mps/mpi/mpi2_cnfg.h> |
| 89 | #include <dev/raid/mps/mpi/mpi2_init.h> |
| 90 | #include <dev/raid/mps/mpi/mpi2_tool.h> |
| 91 | #include <dev/raid/mps/mps_ioctl.h> |
| 92 | #include <dev/raid/mps/mpsvar.h> |
| 93 | #include <dev/raid/mps/mps_table.h> |
| 94 | |
| 95 | static int mps_diag_reset(struct mps_softc *sc); |
| 96 | static int mps_init_queues(struct mps_softc *sc); |
| 97 | static int mps_message_unit_reset(struct mps_softc *sc); |
| 98 | static int mps_transition_operational(struct mps_softc *sc); |
| 99 | static void mps_startup(void *arg); |
| 100 | static int mps_send_iocinit(struct mps_softc *sc); |
| 101 | static int mps_attach_log(struct mps_softc *sc); |
| 102 | static __inline void mps_complete_command(struct mps_command *cm); |
| 103 | static void mps_dispatch_event(struct mps_softc *sc, uintptr_t data, |
| 104 | MPI2_EVENT_NOTIFICATION_REPLY *reply); |
| 105 | static void mps_config_complete(struct mps_softc *sc, struct mps_command *cm); |
| 106 | static void mps_periodic(void *); |
| 107 | static int mps_reregister_events(struct mps_softc *sc); |
| 108 | static void mps_enqueue_request(struct mps_softc *sc, struct mps_command *cm); |
| 109 | |
| 110 | SYSCTL_NODE(_hw, OID_AUTO, mps, CTLFLAG_RD, 0, "MPS Driver Parameters"); |
| 111 | |
| 112 | MALLOC_DEFINE(M_MPT2, "mps", "mpt2 driver memory"); |
| 113 | |
| 114 | /* |
| 115 | * Do a "Diagnostic Reset" aka a hard reset. This should get the chip out of |
| 116 | * any state and back to its initialization state machine. |
| 117 | */ |
| 118 | static char mpt2_reset_magic[] = { 0x00, 0x0f, 0x04, 0x0b, 0x02, 0x07, 0x0d }; |
| 119 | |
| 120 | static int |
| 121 | mps_diag_reset(struct mps_softc *sc) |
| 122 | { |
| 123 | uint32_t reg; |
| 124 | int i, error, tries = 0; |
| 125 | |
| 126 | mps_dprint(sc, MPS_TRACE, "%s\n", __func__); |
| 127 | |
| 128 | /* Clear any pending interrupts */ |
| 129 | mps_regwrite(sc, MPI2_HOST_INTERRUPT_STATUS_OFFSET, 0x0); |
| 130 | |
| 131 | /* Push the magic sequence */ |
| 132 | error = ETIMEDOUT; |
| 133 | while (tries++ < 20) { |
| 134 | for (i = 0; i < sizeof(mpt2_reset_magic); i++) |
| 135 | mps_regwrite(sc, MPI2_WRITE_SEQUENCE_OFFSET, |
| 136 | mpt2_reset_magic[i]); |
| 137 | |
| 138 | DELAY(100 * 1000); |
| 139 | |
| 140 | reg = mps_regread(sc, MPI2_HOST_DIAGNOSTIC_OFFSET); |
| 141 | if (reg & MPI2_DIAG_DIAG_WRITE_ENABLE) { |
| 142 | error = 0; |
| 143 | break; |
| 144 | } |
| 145 | } |
| 146 | if (error) |
| 147 | return (error); |
| 148 | |
| 149 | /* Send the actual reset. XXX need to refresh the reg? */ |
| 150 | mps_regwrite(sc, MPI2_HOST_DIAGNOSTIC_OFFSET, |
| 151 | reg | MPI2_DIAG_RESET_ADAPTER); |
| 152 | |
| 153 | /* Wait up to 300 seconds in 50ms intervals */ |
| 154 | error = ETIMEDOUT; |
| 155 | for (i = 0; i < 60000; i++) { |
| 156 | DELAY(50000); |
| 157 | reg = mps_regread(sc, MPI2_DOORBELL_OFFSET); |
| 158 | if ((reg & MPI2_IOC_STATE_MASK) != MPI2_IOC_STATE_RESET) { |
| 159 | error = 0; |
| 160 | break; |
| 161 | } |
| 162 | } |
| 163 | if (error) |
| 164 | return (error); |
| 165 | |
| 166 | mps_regwrite(sc, MPI2_WRITE_SEQUENCE_OFFSET, 0x0); |
| 167 | |
| 168 | return (0); |
| 169 | } |
| 170 | |
| 171 | static int |
| 172 | mps_message_unit_reset(struct mps_softc *sc) |
| 173 | { |
| 174 | |
| 175 | mps_dprint(sc, MPS_TRACE, "%s\n", __func__); |
| 176 | |
| 177 | mps_regwrite(sc, MPI2_DOORBELL_OFFSET, |
| 178 | MPI2_FUNCTION_IOC_MESSAGE_UNIT_RESET << |
| 179 | MPI2_DOORBELL_FUNCTION_SHIFT); |
| 180 | DELAY(50000); |
| 181 | |
| 182 | return (0); |
| 183 | } |
| 184 | |
| 185 | static int |
| 186 | mps_transition_ready(struct mps_softc *sc) |
| 187 | { |
| 188 | uint32_t reg, state; |
| 189 | int error, tries = 0; |
| 190 | |
| 191 | mps_dprint(sc, MPS_TRACE, "%s\n", __func__); |
| 192 | |
| 193 | error = 0; |
| 194 | while (tries++ < 5) { |
| 195 | reg = mps_regread(sc, MPI2_DOORBELL_OFFSET); |
| 196 | mps_dprint(sc, MPS_INFO, "Doorbell= 0x%x\n", reg); |
| 197 | |
| 198 | /* |
| 199 | * Ensure the IOC is ready to talk. If it's not, try |
| 200 | * resetting it. |
| 201 | */ |
| 202 | if (reg & MPI2_DOORBELL_USED) { |
| 203 | mps_diag_reset(sc); |
| 204 | DELAY(50000); |
| 205 | continue; |
| 206 | } |
| 207 | |
| 208 | /* Is the adapter owned by another peer? */ |
| 209 | if ((reg & MPI2_DOORBELL_WHO_INIT_MASK) == |
| 210 | (MPI2_WHOINIT_PCI_PEER << MPI2_DOORBELL_WHO_INIT_SHIFT)) { |
| 211 | device_printf(sc->mps_dev, "IOC is under the control " |
| 212 | "of another peer host, aborting initialization.\n"); |
| 213 | return (ENXIO); |
| 214 | } |
| 215 | |
| 216 | state = reg & MPI2_IOC_STATE_MASK; |
| 217 | if (state == MPI2_IOC_STATE_READY) { |
| 218 | /* Ready to go! */ |
| 219 | error = 0; |
| 220 | break; |
| 221 | } else if (state == MPI2_IOC_STATE_FAULT) { |
| 222 | mps_dprint(sc, MPS_INFO, "IOC in fault state 0x%x\n", |
| 223 | state & MPI2_DOORBELL_FAULT_CODE_MASK); |
| 224 | mps_diag_reset(sc); |
| 225 | } else if (state == MPI2_IOC_STATE_OPERATIONAL) { |
| 226 | /* Need to take ownership */ |
| 227 | mps_message_unit_reset(sc); |
| 228 | } else if (state == MPI2_IOC_STATE_RESET) { |
| 229 | /* Wait a bit, IOC might be in transition */ |
| 230 | mps_dprint(sc, MPS_FAULT, |
| 231 | "IOC in unexpected reset state\n"); |
| 232 | } else { |
| 233 | mps_dprint(sc, MPS_FAULT, |
| 234 | "IOC in unknown state 0x%x\n", state); |
| 235 | error = EINVAL; |
| 236 | break; |
| 237 | } |
| 238 | |
| 239 | /* Wait 50ms for things to settle down. */ |
| 240 | DELAY(50000); |
| 241 | } |
| 242 | |
| 243 | if (error) |
| 244 | device_printf(sc->mps_dev, "Cannot transition IOC to ready\n"); |
| 245 | |
| 246 | return (error); |
| 247 | } |
| 248 | |
| 249 | static int |
| 250 | mps_transition_operational(struct mps_softc *sc) |
| 251 | { |
| 252 | uint32_t reg, state; |
| 253 | int error; |
| 254 | |
| 255 | mps_dprint(sc, MPS_TRACE, "%s\n", __func__); |
| 256 | |
| 257 | error = 0; |
| 258 | reg = mps_regread(sc, MPI2_DOORBELL_OFFSET); |
| 259 | mps_dprint(sc, MPS_INFO, "Doorbell= 0x%x\n", reg); |
| 260 | |
| 261 | state = reg & MPI2_IOC_STATE_MASK; |
| 262 | if (state != MPI2_IOC_STATE_READY) { |
| 263 | if ((error = mps_transition_ready(sc)) != 0) { |
| 264 | mps_dprint(sc, MPS_FAULT, |
| 265 | "%s failed to transition ready\n", __func__); |
| 266 | return (error); |
| 267 | } |
| 268 | } |
| 269 | |
| 270 | error = mps_send_iocinit(sc); |
| 271 | return (error); |
| 272 | } |
| 273 | |
| 274 | /* |
| 275 | * XXX Some of this should probably move to mps.c |
| 276 | * |
| 277 | * The terms diag reset and hard reset are used interchangeably in the MPI |
| 278 | * docs to mean resetting the controller chip. In this code diag reset |
| 279 | * cleans everything up, and the hard reset function just sends the reset |
| 280 | * sequence to the chip. This should probably be refactored so that every |
| 281 | * subsystem gets a reset notification of some sort, and can clean up |
| 282 | * appropriately. |
| 283 | */ |
| 284 | int |
| 285 | mps_reinit(struct mps_softc *sc) |
| 286 | { |
| 287 | int error; |
| 288 | uint32_t db; |
| 289 | |
| 290 | mps_printf(sc, "%s sc %p\n", __func__, sc); |
| 291 | |
| 292 | KKASSERT(lockstatus(&sc->mps_lock, curthread) != 0); |
| 293 | |
| 294 | if (sc->mps_flags & MPS_FLAGS_DIAGRESET) { |
| 295 | mps_printf(sc, "%s reset already in progress\n", __func__); |
| 296 | return 0; |
| 297 | } |
| 298 | |
| 299 | /* make sure the completion callbacks can recognize they're getting |
| 300 | * a NULL cm_reply due to a reset. |
| 301 | */ |
| 302 | sc->mps_flags |= MPS_FLAGS_DIAGRESET; |
| 303 | |
| 304 | mps_printf(sc, "%s mask interrupts\n", __func__); |
| 305 | mps_mask_intr(sc); |
| 306 | |
| 307 | error = mps_diag_reset(sc); |
| 308 | if (error != 0) { |
| 309 | panic("%s hard reset failed with error %d\n", |
| 310 | __func__, error); |
| 311 | } |
| 312 | |
| 313 | /* Restore the PCI state, including the MSI-X registers */ |
| 314 | mps_pci_restore(sc); |
| 315 | |
| 316 | /* Give the I/O subsystem special priority to get itself prepared */ |
| 317 | mpssas_handle_reinit(sc); |
| 318 | |
| 319 | /* reinitialize queues after the reset */ |
| 320 | bzero(sc->free_queue, sc->fqdepth * 4); |
| 321 | mps_init_queues(sc); |
| 322 | |
| 323 | /* get the chip out of the reset state */ |
| 324 | error = mps_transition_operational(sc); |
| 325 | if (error != 0) |
| 326 | panic("%s transition operational failed with error %d\n", |
| 327 | __func__, error); |
| 328 | |
| 329 | /* Reinitialize the reply queue. This is delicate because this |
| 330 | * function is typically invoked by task mgmt completion callbacks, |
| 331 | * which are called by the interrupt thread. We need to make sure |
| 332 | * the interrupt handler loop will exit when we return to it, and |
| 333 | * that it will recognize the indexes we've changed. |
| 334 | */ |
| 335 | sc->replypostindex = 0; |
| 336 | mps_regwrite(sc, MPI2_REPLY_FREE_HOST_INDEX_OFFSET, sc->replyfreeindex); |
| 337 | mps_regwrite(sc, MPI2_REPLY_POST_HOST_INDEX_OFFSET, sc->replypostindex); |
| 338 | |
| 339 | db = mps_regread(sc, MPI2_DOORBELL_OFFSET); |
| 340 | mps_printf(sc, "%s doorbell 0x%08x\n", __func__, db); |
| 341 | |
| 342 | mps_printf(sc, "%s unmask interrupts post %u free %u\n", __func__, |
| 343 | sc->replypostindex, sc->replyfreeindex); |
| 344 | |
| 345 | mps_unmask_intr(sc); |
| 346 | |
| 347 | mps_printf(sc, "%s restarting post %u free %u\n", __func__, |
| 348 | sc->replypostindex, sc->replyfreeindex); |
| 349 | |
| 350 | /* restart will reload the event masks clobbered by the reset, and |
| 351 | * then enable the port. |
| 352 | */ |
| 353 | mps_reregister_events(sc); |
| 354 | |
| 355 | /* the end of discovery will release the simq, so we're done. */ |
| 356 | mps_printf(sc, "%s finished sc %p post %u free %u\n", |
| 357 | __func__, sc, |
| 358 | sc->replypostindex, sc->replyfreeindex); |
| 359 | |
| 360 | sc->mps_flags &= ~MPS_FLAGS_DIAGRESET; |
| 361 | |
| 362 | return 0; |
| 363 | } |
| 364 | |
| 365 | /* Wait for the chip to ACK a word that we've put into its FIFO */ |
| 366 | static int |
| 367 | mps_wait_db_ack(struct mps_softc *sc) |
| 368 | { |
| 369 | int retry; |
| 370 | |
| 371 | for (retry = 0; retry < MPS_DB_MAX_WAIT; retry++) { |
| 372 | if ((mps_regread(sc, MPI2_HOST_INTERRUPT_STATUS_OFFSET) & |
| 373 | MPI2_HIS_SYS2IOC_DB_STATUS) == 0) |
| 374 | return (0); |
| 375 | DELAY(2000); |
| 376 | } |
| 377 | return (ETIMEDOUT); |
| 378 | } |
| 379 | |
| 380 | /* Wait for the chip to signal that the next word in its FIFO can be fetched */ |
| 381 | static int |
| 382 | mps_wait_db_int(struct mps_softc *sc) |
| 383 | { |
| 384 | int retry; |
| 385 | |
| 386 | for (retry = 0; retry < MPS_DB_MAX_WAIT; retry++) { |
| 387 | if ((mps_regread(sc, MPI2_HOST_INTERRUPT_STATUS_OFFSET) & |
| 388 | MPI2_HIS_IOC2SYS_DB_STATUS) != 0) |
| 389 | return (0); |
| 390 | DELAY(2000); |
| 391 | } |
| 392 | return (ETIMEDOUT); |
| 393 | } |
| 394 | |
| 395 | /* Step through the synchronous command state machine, i.e. "Doorbell mode" */ |
| 396 | static int |
| 397 | mps_request_sync(struct mps_softc *sc, void *req, MPI2_DEFAULT_REPLY *reply, |
| 398 | int req_sz, int reply_sz, int timeout) |
| 399 | { |
| 400 | uint32_t *data32; |
| 401 | uint16_t *data16; |
| 402 | int i, count, ioc_sz, residual; |
| 403 | |
| 404 | /* Step 1 */ |
| 405 | mps_regwrite(sc, MPI2_HOST_INTERRUPT_STATUS_OFFSET, 0x0); |
| 406 | |
| 407 | /* Step 2 */ |
| 408 | if (mps_regread(sc, MPI2_DOORBELL_OFFSET) & MPI2_DOORBELL_USED) |
| 409 | return (EBUSY); |
| 410 | |
| 411 | /* Step 3 |
| 412 | * Announce that a message is coming through the doorbell. Messages |
| 413 | * are pushed at 32bit words, so round up if needed. |
| 414 | */ |
| 415 | count = (req_sz + 3) / 4; |
| 416 | mps_regwrite(sc, MPI2_DOORBELL_OFFSET, |
| 417 | (MPI2_FUNCTION_HANDSHAKE << MPI2_DOORBELL_FUNCTION_SHIFT) | |
| 418 | (count << MPI2_DOORBELL_ADD_DWORDS_SHIFT)); |
| 419 | |
| 420 | /* Step 4 */ |
| 421 | if (mps_wait_db_int(sc) || |
| 422 | (mps_regread(sc, MPI2_DOORBELL_OFFSET) & MPI2_DOORBELL_USED) == 0) { |
| 423 | mps_dprint(sc, MPS_FAULT, "Doorbell failed to activate\n"); |
| 424 | return (ENXIO); |
| 425 | } |
| 426 | mps_regwrite(sc, MPI2_HOST_INTERRUPT_STATUS_OFFSET, 0x0); |
| 427 | if (mps_wait_db_ack(sc) != 0) { |
| 428 | mps_dprint(sc, MPS_FAULT, "Doorbell handshake failed\n"); |
| 429 | return (ENXIO); |
| 430 | } |
| 431 | |
| 432 | /* Step 5 */ |
| 433 | /* Clock out the message data synchronously in 32-bit dwords*/ |
| 434 | data32 = (uint32_t *)req; |
| 435 | for (i = 0; i < count; i++) { |
| 436 | mps_regwrite(sc, MPI2_DOORBELL_OFFSET, data32[i]); |
| 437 | if (mps_wait_db_ack(sc) != 0) { |
| 438 | mps_dprint(sc, MPS_FAULT, |
| 439 | "Timeout while writing doorbell\n"); |
| 440 | return (ENXIO); |
| 441 | } |
| 442 | } |
| 443 | |
| 444 | /* Step 6 */ |
| 445 | /* Clock in the reply in 16-bit words. The total length of the |
| 446 | * message is always in the 4th byte, so clock out the first 2 words |
| 447 | * manually, then loop the rest. |
| 448 | */ |
| 449 | data16 = (uint16_t *)reply; |
| 450 | if (mps_wait_db_int(sc) != 0) { |
| 451 | mps_dprint(sc, MPS_FAULT, "Timeout reading doorbell 0\n"); |
| 452 | return (ENXIO); |
| 453 | } |
| 454 | data16[0] = |
| 455 | mps_regread(sc, MPI2_DOORBELL_OFFSET) & MPI2_DOORBELL_DATA_MASK; |
| 456 | mps_regwrite(sc, MPI2_HOST_INTERRUPT_STATUS_OFFSET, 0x0); |
| 457 | if (mps_wait_db_int(sc) != 0) { |
| 458 | mps_dprint(sc, MPS_FAULT, "Timeout reading doorbell 1\n"); |
| 459 | return (ENXIO); |
| 460 | } |
| 461 | data16[1] = |
| 462 | mps_regread(sc, MPI2_DOORBELL_OFFSET) & MPI2_DOORBELL_DATA_MASK; |
| 463 | mps_regwrite(sc, MPI2_HOST_INTERRUPT_STATUS_OFFSET, 0x0); |
| 464 | |
| 465 | /* Number of 32bit words in the message */ |
| 466 | ioc_sz = reply->MsgLength; |
| 467 | |
| 468 | /* |
| 469 | * Figure out how many 16bit words to clock in without overrunning. |
| 470 | * The precision loss with dividing reply_sz can safely be |
| 471 | * ignored because the messages can only be multiples of 32bits. |
| 472 | */ |
| 473 | residual = 0; |
| 474 | count = MIN((reply_sz / 4), ioc_sz) * 2; |
| 475 | if (count < ioc_sz * 2) { |
| 476 | residual = ioc_sz * 2 - count; |
| 477 | mps_dprint(sc, MPS_FAULT, "Driver error, throwing away %d " |
| 478 | "residual message words\n", residual); |
| 479 | } |
| 480 | |
| 481 | for (i = 2; i < count; i++) { |
| 482 | if (mps_wait_db_int(sc) != 0) { |
| 483 | mps_dprint(sc, MPS_FAULT, |
| 484 | "Timeout reading doorbell %d\n", i); |
| 485 | return (ENXIO); |
| 486 | } |
| 487 | data16[i] = mps_regread(sc, MPI2_DOORBELL_OFFSET) & |
| 488 | MPI2_DOORBELL_DATA_MASK; |
| 489 | mps_regwrite(sc, MPI2_HOST_INTERRUPT_STATUS_OFFSET, 0x0); |
| 490 | } |
| 491 | |
| 492 | /* |
| 493 | * Pull out residual words that won't fit into the provided buffer. |
| 494 | * This keeps the chip from hanging due to a driver programming |
| 495 | * error. |
| 496 | */ |
| 497 | while (residual--) { |
| 498 | if (mps_wait_db_int(sc) != 0) { |
| 499 | mps_dprint(sc, MPS_FAULT, |
| 500 | "Timeout reading doorbell\n"); |
| 501 | return (ENXIO); |
| 502 | } |
| 503 | (void)mps_regread(sc, MPI2_DOORBELL_OFFSET); |
| 504 | mps_regwrite(sc, MPI2_HOST_INTERRUPT_STATUS_OFFSET, 0x0); |
| 505 | } |
| 506 | |
| 507 | /* Step 7 */ |
| 508 | if (mps_wait_db_int(sc) != 0) { |
| 509 | mps_dprint(sc, MPS_FAULT, "Timeout waiting to exit doorbell\n"); |
| 510 | return (ENXIO); |
| 511 | } |
| 512 | if (mps_regread(sc, MPI2_DOORBELL_OFFSET) & MPI2_DOORBELL_USED) |
| 513 | mps_dprint(sc, MPS_FAULT, "Warning, doorbell still active\n"); |
| 514 | mps_regwrite(sc, MPI2_HOST_INTERRUPT_STATUS_OFFSET, 0x0); |
| 515 | |
| 516 | return (0); |
| 517 | } |
| 518 | |
| 519 | static void |
| 520 | mps_enqueue_request(struct mps_softc *sc, struct mps_command *cm) |
| 521 | { |
| 522 | |
| 523 | mps_dprint(sc, MPS_TRACE, "%s SMID %u cm %p ccb %p\n", __func__, |
| 524 | cm->cm_desc.Default.SMID, cm, cm->cm_ccb); |
| 525 | |
| 526 | if (sc->mps_flags & MPS_FLAGS_ATTACH_DONE) |
| 527 | KKASSERT(lockstatus(&sc->mps_lock, curthread) != 0); |
| 528 | |
| 529 | if (++sc->io_cmds_active > sc->io_cmds_highwater) |
| 530 | sc->io_cmds_highwater++; |
| 531 | |
| 532 | mps_regwrite(sc, MPI2_REQUEST_DESCRIPTOR_POST_LOW_OFFSET, |
| 533 | cm->cm_desc.Words.Low); |
| 534 | mps_regwrite(sc, MPI2_REQUEST_DESCRIPTOR_POST_HIGH_OFFSET, |
| 535 | cm->cm_desc.Words.High); |
| 536 | } |
| 537 | |
| 538 | /* |
| 539 | * Just the FACTS, ma'am. |
| 540 | */ |
| 541 | static int |
| 542 | mps_get_iocfacts(struct mps_softc *sc, MPI2_IOC_FACTS_REPLY *facts) |
| 543 | { |
| 544 | MPI2_DEFAULT_REPLY *reply; |
| 545 | MPI2_IOC_FACTS_REQUEST request; |
| 546 | int error, req_sz, reply_sz; |
| 547 | |
| 548 | mps_dprint(sc, MPS_TRACE, "%s\n", __func__); |
| 549 | |
| 550 | req_sz = sizeof(MPI2_IOC_FACTS_REQUEST); |
| 551 | reply_sz = sizeof(MPI2_IOC_FACTS_REPLY); |
| 552 | reply = (MPI2_DEFAULT_REPLY *)facts; |
| 553 | |
| 554 | bzero(&request, req_sz); |
| 555 | request.Function = MPI2_FUNCTION_IOC_FACTS; |
| 556 | error = mps_request_sync(sc, &request, reply, req_sz, reply_sz, 5); |
| 557 | |
| 558 | return (error); |
| 559 | } |
| 560 | |
| 561 | static int |
| 562 | mps_get_portfacts(struct mps_softc *sc, MPI2_PORT_FACTS_REPLY *facts, int port) |
| 563 | { |
| 564 | MPI2_PORT_FACTS_REQUEST *request; |
| 565 | MPI2_PORT_FACTS_REPLY *reply; |
| 566 | struct mps_command *cm; |
| 567 | int error; |
| 568 | |
| 569 | mps_dprint(sc, MPS_TRACE, "%s\n", __func__); |
| 570 | |
| 571 | if ((cm = mps_alloc_command(sc)) == NULL) |
| 572 | return (EBUSY); |
| 573 | request = (MPI2_PORT_FACTS_REQUEST *)cm->cm_req; |
| 574 | request->Function = MPI2_FUNCTION_PORT_FACTS; |
| 575 | request->PortNumber = port; |
| 576 | cm->cm_desc.Default.RequestFlags = MPI2_REQ_DESCRIPT_FLAGS_DEFAULT_TYPE; |
| 577 | cm->cm_data = NULL; |
| 578 | error = mps_request_polled(sc, cm); |
| 579 | reply = (MPI2_PORT_FACTS_REPLY *)cm->cm_reply; |
| 580 | if (reply == NULL) { |
| 581 | mps_printf(sc, "%s NULL reply\n", __func__); |
| 582 | goto done; |
| 583 | } |
| 584 | if ((reply->IOCStatus & MPI2_IOCSTATUS_MASK) != MPI2_IOCSTATUS_SUCCESS) { |
| 585 | mps_printf(sc, |
| 586 | "%s error %d iocstatus 0x%x iocloginfo 0x%x type 0x%x\n", |
| 587 | __func__, error, reply->IOCStatus, (u_int)reply->IOCLogInfo, |
| 588 | reply->PortType); |
| 589 | error = ENXIO; |
| 590 | } |
| 591 | bcopy(reply, facts, sizeof(MPI2_PORT_FACTS_REPLY)); |
| 592 | done: |
| 593 | mps_free_command(sc, cm); |
| 594 | |
| 595 | return (error); |
| 596 | } |
| 597 | |
| 598 | static int |
| 599 | mps_send_iocinit(struct mps_softc *sc) |
| 600 | { |
| 601 | MPI2_IOC_INIT_REQUEST init; |
| 602 | MPI2_DEFAULT_REPLY reply; |
| 603 | int req_sz, reply_sz, error; |
| 604 | |
| 605 | mps_dprint(sc, MPS_TRACE, "%s\n", __func__); |
| 606 | |
| 607 | req_sz = sizeof(MPI2_IOC_INIT_REQUEST); |
| 608 | reply_sz = sizeof(MPI2_IOC_INIT_REPLY); |
| 609 | bzero(&init, req_sz); |
| 610 | bzero(&reply, reply_sz); |
| 611 | |
| 612 | /* |
| 613 | * Fill in the init block. Note that most addresses are |
| 614 | * deliberately in the lower 32bits of memory. This is a micro- |
| 615 | * optimzation for PCI/PCIX, though it's not clear if it helps PCIe. |
| 616 | */ |
| 617 | init.Function = MPI2_FUNCTION_IOC_INIT; |
| 618 | init.WhoInit = MPI2_WHOINIT_HOST_DRIVER; |
| 619 | init.MsgVersion = MPI2_VERSION; |
| 620 | init.HeaderVersion = MPI2_HEADER_VERSION; |
| 621 | init.SystemRequestFrameSize = sc->facts->IOCRequestFrameSize; |
| 622 | init.ReplyDescriptorPostQueueDepth = sc->pqdepth; |
| 623 | init.ReplyFreeQueueDepth = sc->fqdepth; |
| 624 | init.SenseBufferAddressHigh = 0; |
| 625 | init.SystemReplyAddressHigh = 0; |
| 626 | init.SystemRequestFrameBaseAddress.High = 0; |
| 627 | init.SystemRequestFrameBaseAddress.Low = (uint32_t)sc->req_busaddr; |
| 628 | init.ReplyDescriptorPostQueueAddress.High = 0; |
| 629 | init.ReplyDescriptorPostQueueAddress.Low = (uint32_t)sc->post_busaddr; |
| 630 | init.ReplyFreeQueueAddress.High = 0; |
| 631 | init.ReplyFreeQueueAddress.Low = (uint32_t)sc->free_busaddr; |
| 632 | init.TimeStamp.High = 0; |
| 633 | init.TimeStamp.Low = (uint32_t)time_second; |
| 634 | |
| 635 | error = mps_request_sync(sc, &init, &reply, req_sz, reply_sz, 5); |
| 636 | if ((reply.IOCStatus & MPI2_IOCSTATUS_MASK) != MPI2_IOCSTATUS_SUCCESS) |
| 637 | error = ENXIO; |
| 638 | |
| 639 | mps_dprint(sc, MPS_INFO, "IOCInit status= 0x%x\n", reply.IOCStatus); |
| 640 | return (error); |
| 641 | } |
| 642 | |
| 643 | void |
| 644 | mps_memaddr_cb(void *arg, bus_dma_segment_t *segs, int nsegs, int error) |
| 645 | { |
| 646 | bus_addr_t *addr; |
| 647 | |
| 648 | addr = arg; |
| 649 | *addr = segs[0].ds_addr; |
| 650 | } |
| 651 | |
| 652 | static int |
| 653 | mps_alloc_queues(struct mps_softc *sc) |
| 654 | { |
| 655 | bus_addr_t queues_busaddr; |
| 656 | uint8_t *queues; |
| 657 | int qsize, fqsize, pqsize; |
| 658 | |
| 659 | /* |
| 660 | * The reply free queue contains 4 byte entries in multiples of 16 and |
| 661 | * aligned on a 16 byte boundary. There must always be an unused entry. |
| 662 | * This queue supplies fresh reply frames for the firmware to use. |
| 663 | * |
| 664 | * The reply descriptor post queue contains 8 byte entries in |
| 665 | * multiples of 16 and aligned on a 16 byte boundary. This queue |
| 666 | * contains filled-in reply frames sent from the firmware to the host. |
| 667 | * |
| 668 | * These two queues are allocated together for simplicity. |
| 669 | */ |
| 670 | sc->fqdepth = roundup2((sc->num_replies + 1), 16); |
| 671 | sc->pqdepth = roundup2((sc->num_replies + 1), 16); |
| 672 | fqsize= sc->fqdepth * 4; |
| 673 | pqsize = sc->pqdepth * 8; |
| 674 | qsize = fqsize + pqsize; |
| 675 | |
| 676 | if (bus_dma_tag_create( sc->mps_parent_dmat, /* parent */ |
| 677 | 16, 0, /* algnmnt, boundary */ |
| 678 | BUS_SPACE_MAXADDR_32BIT,/* lowaddr */ |
| 679 | BUS_SPACE_MAXADDR, /* highaddr */ |
| 680 | NULL, NULL, /* filter, filterarg */ |
| 681 | qsize, /* maxsize */ |
| 682 | 1, /* nsegments */ |
| 683 | qsize, /* maxsegsize */ |
| 684 | 0, /* flags */ |
| 685 | &sc->queues_dmat)) { |
| 686 | device_printf(sc->mps_dev, "Cannot allocate queues DMA tag\n"); |
| 687 | return (ENOMEM); |
| 688 | } |
| 689 | if (bus_dmamem_alloc(sc->queues_dmat, (void **)&queues, BUS_DMA_NOWAIT, |
| 690 | &sc->queues_map)) { |
| 691 | device_printf(sc->mps_dev, "Cannot allocate queues memory\n"); |
| 692 | return (ENOMEM); |
| 693 | } |
| 694 | bzero(queues, qsize); |
| 695 | bus_dmamap_load(sc->queues_dmat, sc->queues_map, queues, qsize, |
| 696 | mps_memaddr_cb, &queues_busaddr, 0); |
| 697 | |
| 698 | sc->free_queue = (uint32_t *)queues; |
| 699 | sc->free_busaddr = queues_busaddr; |
| 700 | sc->post_queue = (MPI2_REPLY_DESCRIPTORS_UNION *)(queues + fqsize); |
| 701 | sc->post_busaddr = queues_busaddr + fqsize; |
| 702 | |
| 703 | return (0); |
| 704 | } |
| 705 | |
| 706 | static int |
| 707 | mps_alloc_replies(struct mps_softc *sc) |
| 708 | { |
| 709 | int rsize, num_replies; |
| 710 | |
| 711 | /* |
| 712 | * sc->num_replies should be one less than sc->fqdepth. We need to |
| 713 | * allocate space for sc->fqdepth replies, but only sc->num_replies |
| 714 | * replies can be used at once. |
| 715 | */ |
| 716 | num_replies = max(sc->fqdepth, sc->num_replies); |
| 717 | |
| 718 | rsize = sc->facts->ReplyFrameSize * num_replies * 4; |
| 719 | if (bus_dma_tag_create( sc->mps_parent_dmat, /* parent */ |
| 720 | 4, 0, /* algnmnt, boundary */ |
| 721 | BUS_SPACE_MAXADDR_32BIT,/* lowaddr */ |
| 722 | BUS_SPACE_MAXADDR, /* highaddr */ |
| 723 | NULL, NULL, /* filter, filterarg */ |
| 724 | rsize, /* maxsize */ |
| 725 | 1, /* nsegments */ |
| 726 | rsize, /* maxsegsize */ |
| 727 | 0, /* flags */ |
| 728 | &sc->reply_dmat)) { |
| 729 | device_printf(sc->mps_dev, "Cannot allocate replies DMA tag\n"); |
| 730 | return (ENOMEM); |
| 731 | } |
| 732 | if (bus_dmamem_alloc(sc->reply_dmat, (void **)&sc->reply_frames, |
| 733 | BUS_DMA_NOWAIT, &sc->reply_map)) { |
| 734 | device_printf(sc->mps_dev, "Cannot allocate replies memory\n"); |
| 735 | return (ENOMEM); |
| 736 | } |
| 737 | bzero(sc->reply_frames, rsize); |
| 738 | bus_dmamap_load(sc->reply_dmat, sc->reply_map, sc->reply_frames, rsize, |
| 739 | mps_memaddr_cb, &sc->reply_busaddr, 0); |
| 740 | |
| 741 | return (0); |
| 742 | } |
| 743 | |
| 744 | static int |
| 745 | mps_alloc_requests(struct mps_softc *sc) |
| 746 | { |
| 747 | struct mps_command *cm; |
| 748 | struct mps_chain *chain; |
| 749 | int i, rsize, nsegs; |
| 750 | |
| 751 | rsize = sc->facts->IOCRequestFrameSize * sc->num_reqs * 4; |
| 752 | if (bus_dma_tag_create( sc->mps_parent_dmat, /* parent */ |
| 753 | 16, 0, /* algnmnt, boundary */ |
| 754 | BUS_SPACE_MAXADDR_32BIT,/* lowaddr */ |
| 755 | BUS_SPACE_MAXADDR, /* highaddr */ |
| 756 | NULL, NULL, /* filter, filterarg */ |
| 757 | rsize, /* maxsize */ |
| 758 | 1, /* nsegments */ |
| 759 | rsize, /* maxsegsize */ |
| 760 | 0, /* flags */ |
| 761 | &sc->req_dmat)) { |
| 762 | device_printf(sc->mps_dev, "Cannot allocate request DMA tag\n"); |
| 763 | return (ENOMEM); |
| 764 | } |
| 765 | if (bus_dmamem_alloc(sc->req_dmat, (void **)&sc->req_frames, |
| 766 | BUS_DMA_NOWAIT, &sc->req_map)) { |
| 767 | device_printf(sc->mps_dev, "Cannot allocate request memory\n"); |
| 768 | return (ENOMEM); |
| 769 | } |
| 770 | bzero(sc->req_frames, rsize); |
| 771 | bus_dmamap_load(sc->req_dmat, sc->req_map, sc->req_frames, rsize, |
| 772 | mps_memaddr_cb, &sc->req_busaddr, 0); |
| 773 | |
| 774 | rsize = sc->facts->IOCRequestFrameSize * sc->max_chains * 4; |
| 775 | if (bus_dma_tag_create( sc->mps_parent_dmat, /* parent */ |
| 776 | 16, 0, /* algnmnt, boundary */ |
| 777 | BUS_SPACE_MAXADDR_32BIT,/* lowaddr */ |
| 778 | BUS_SPACE_MAXADDR, /* highaddr */ |
| 779 | NULL, NULL, /* filter, filterarg */ |
| 780 | rsize, /* maxsize */ |
| 781 | 1, /* nsegments */ |
| 782 | rsize, /* maxsegsize */ |
| 783 | 0, /* flags */ |
| 784 | &sc->chain_dmat)) { |
| 785 | device_printf(sc->mps_dev, "Cannot allocate chain DMA tag\n"); |
| 786 | return (ENOMEM); |
| 787 | } |
| 788 | if (bus_dmamem_alloc(sc->chain_dmat, (void **)&sc->chain_frames, |
| 789 | BUS_DMA_NOWAIT, &sc->chain_map)) { |
| 790 | device_printf(sc->mps_dev, "Cannot allocate chain memory\n"); |
| 791 | return (ENOMEM); |
| 792 | } |
| 793 | bzero(sc->chain_frames, rsize); |
| 794 | bus_dmamap_load(sc->chain_dmat, sc->chain_map, sc->chain_frames, rsize, |
| 795 | mps_memaddr_cb, &sc->chain_busaddr, 0); |
| 796 | |
| 797 | rsize = MPS_SENSE_LEN * sc->num_reqs; |
| 798 | if (bus_dma_tag_create( sc->mps_parent_dmat, /* parent */ |
| 799 | 1, 0, /* algnmnt, boundary */ |
| 800 | BUS_SPACE_MAXADDR_32BIT,/* lowaddr */ |
| 801 | BUS_SPACE_MAXADDR, /* highaddr */ |
| 802 | NULL, NULL, /* filter, filterarg */ |
| 803 | rsize, /* maxsize */ |
| 804 | 1, /* nsegments */ |
| 805 | rsize, /* maxsegsize */ |
| 806 | 0, /* flags */ |
| 807 | &sc->sense_dmat)) { |
| 808 | device_printf(sc->mps_dev, "Cannot allocate sense DMA tag\n"); |
| 809 | return (ENOMEM); |
| 810 | } |
| 811 | if (bus_dmamem_alloc(sc->sense_dmat, (void **)&sc->sense_frames, |
| 812 | BUS_DMA_NOWAIT, &sc->sense_map)) { |
| 813 | device_printf(sc->mps_dev, "Cannot allocate sense memory\n"); |
| 814 | return (ENOMEM); |
| 815 | } |
| 816 | bzero(sc->sense_frames, rsize); |
| 817 | bus_dmamap_load(sc->sense_dmat, sc->sense_map, sc->sense_frames, rsize, |
| 818 | mps_memaddr_cb, &sc->sense_busaddr, 0); |
| 819 | |
| 820 | sc->chains = kmalloc(sizeof(struct mps_chain) * sc->max_chains, M_MPT2, |
| 821 | M_WAITOK | M_ZERO); |
| 822 | for (i = 0; i < sc->max_chains; i++) { |
| 823 | chain = &sc->chains[i]; |
| 824 | chain->chain = (MPI2_SGE_IO_UNION *)(sc->chain_frames + |
| 825 | i * sc->facts->IOCRequestFrameSize * 4); |
| 826 | chain->chain_busaddr = sc->chain_busaddr + |
| 827 | i * sc->facts->IOCRequestFrameSize * 4; |
| 828 | mps_free_chain(sc, chain); |
| 829 | sc->chain_free_lowwater++; |
| 830 | } |
| 831 | |
| 832 | /* XXX Need to pick a more precise value */ |
| 833 | nsegs = (MAXPHYS / PAGE_SIZE) + 1; |
| 834 | if (bus_dma_tag_create( sc->mps_parent_dmat, /* parent */ |
| 835 | 1, 0, /* algnmnt, boundary */ |
| 836 | BUS_SPACE_MAXADDR, /* lowaddr */ |
| 837 | BUS_SPACE_MAXADDR, /* highaddr */ |
| 838 | NULL, NULL, /* filter, filterarg */ |
| 839 | BUS_SPACE_MAXSIZE_32BIT,/* maxsize */ |
| 840 | nsegs, /* nsegments */ |
| 841 | BUS_SPACE_MAXSIZE_32BIT,/* maxsegsize */ |
| 842 | BUS_DMA_ALLOCNOW, /* flags */ |
| 843 | &sc->buffer_dmat)) { |
| 844 | device_printf(sc->mps_dev, "Cannot allocate buffer DMA tag\n"); |
| 845 | return (ENOMEM); |
| 846 | } |
| 847 | |
| 848 | /* |
| 849 | * SMID 0 cannot be used as a free command per the firmware spec. |
| 850 | * Just drop that command instead of risking accounting bugs. |
| 851 | */ |
| 852 | sc->commands = kmalloc(sizeof(struct mps_command) * sc->num_reqs, |
| 853 | M_MPT2, M_WAITOK | M_ZERO); |
| 854 | for (i = 1; i < sc->num_reqs; i++) { |
| 855 | cm = &sc->commands[i]; |
| 856 | cm->cm_req = sc->req_frames + |
| 857 | i * sc->facts->IOCRequestFrameSize * 4; |
| 858 | cm->cm_req_busaddr = sc->req_busaddr + |
| 859 | i * sc->facts->IOCRequestFrameSize * 4; |
| 860 | cm->cm_sense = &sc->sense_frames[i]; |
| 861 | cm->cm_sense_busaddr = sc->sense_busaddr + i * MPS_SENSE_LEN; |
| 862 | cm->cm_desc.Default.SMID = i; |
| 863 | cm->cm_sc = sc; |
| 864 | TAILQ_INIT(&cm->cm_chain_list); |
| 865 | callout_init(&cm->cm_callout); |
| 866 | |
| 867 | /* XXX Is a failure here a critical problem? */ |
| 868 | if (bus_dmamap_create(sc->buffer_dmat, 0, &cm->cm_dmamap) == 0) |
| 869 | if (i <= sc->facts->HighPriorityCredit) |
| 870 | mps_free_high_priority_command(sc, cm); |
| 871 | else |
| 872 | mps_free_command(sc, cm); |
| 873 | else { |
| 874 | panic("failed to allocate command %d\n", i); |
| 875 | sc->num_reqs = i; |
| 876 | break; |
| 877 | } |
| 878 | } |
| 879 | |
| 880 | return (0); |
| 881 | } |
| 882 | |
| 883 | static int |
| 884 | mps_init_queues(struct mps_softc *sc) |
| 885 | { |
| 886 | int i; |
| 887 | |
| 888 | memset((uint8_t *)sc->post_queue, 0xff, sc->pqdepth * 8); |
| 889 | |
| 890 | /* |
| 891 | * According to the spec, we need to use one less reply than we |
| 892 | * have space for on the queue. So sc->num_replies (the number we |
| 893 | * use) should be less than sc->fqdepth (allocated size). |
| 894 | */ |
| 895 | if (sc->num_replies >= sc->fqdepth) |
| 896 | return (EINVAL); |
| 897 | |
| 898 | /* |
| 899 | * Initialize all of the free queue entries. |
| 900 | */ |
| 901 | for (i = 0; i < sc->fqdepth; i++) |
| 902 | sc->free_queue[i] = sc->reply_busaddr + (i * sc->facts->ReplyFrameSize * 4); |
| 903 | sc->replyfreeindex = sc->num_replies; |
| 904 | |
| 905 | return (0); |
| 906 | } |
| 907 | |
| 908 | /* Get the driver parameter tunables. Lowest priority are the driver defaults. |
| 909 | * Next are the global settings, if they exist. Highest are the per-unit |
| 910 | * settings, if they exist. |
| 911 | */ |
| 912 | static void |
| 913 | mps_get_tunables(struct mps_softc *sc) |
| 914 | { |
| 915 | char tmpstr[80]; |
| 916 | |
| 917 | /* XXX default to some debugging for now */ |
| 918 | sc->mps_debug = MPS_FAULT; |
| 919 | #if 0 /* XXX swildner */ |
| 920 | sc->disable_msix = 0; |
| 921 | #endif |
| 922 | sc->enable_msi = 1; |
| 923 | sc->max_chains = MPS_CHAIN_FRAMES; |
| 924 | |
| 925 | /* |
| 926 | * Grab the global variables. |
| 927 | */ |
| 928 | TUNABLE_INT_FETCH("hw.mps.debug_level", &sc->mps_debug); |
| 929 | #if 0 /* XXX swildner */ |
| 930 | TUNABLE_INT_FETCH("hw.mps.disable_msix", &sc->disable_msix); |
| 931 | #endif |
| 932 | TUNABLE_INT_FETCH("hw.mps.msi.enable", &sc->enable_msi); |
| 933 | TUNABLE_INT_FETCH("hw.mps.max_chains", &sc->max_chains); |
| 934 | |
| 935 | /* Grab the unit-instance variables */ |
| 936 | ksnprintf(tmpstr, sizeof(tmpstr), "dev.mps.%d.debug_level", |
| 937 | device_get_unit(sc->mps_dev)); |
| 938 | TUNABLE_INT_FETCH(tmpstr, &sc->mps_debug); |
| 939 | |
| 940 | #if 0 /* XXX swildner */ |
| 941 | ksnprintf(tmpstr, sizeof(tmpstr), "dev.mps.%d.disable_msix", |
| 942 | device_get_unit(sc->mps_dev)); |
| 943 | TUNABLE_INT_FETCH(tmpstr, &sc->disable_msix); |
| 944 | #endif |
| 945 | |
| 946 | ksnprintf(tmpstr, sizeof(tmpstr), "dev.mps.%d.enable_msi", |
| 947 | device_get_unit(sc->mps_dev)); |
| 948 | TUNABLE_INT_FETCH(tmpstr, &sc->enable_msi); |
| 949 | |
| 950 | ksnprintf(tmpstr, sizeof(tmpstr), "dev.mps.%d.max_chains", |
| 951 | device_get_unit(sc->mps_dev)); |
| 952 | TUNABLE_INT_FETCH(tmpstr, &sc->max_chains); |
| 953 | } |
| 954 | |
| 955 | static void |
| 956 | mps_setup_sysctl(struct mps_softc *sc) |
| 957 | { |
| 958 | struct sysctl_ctx_list *sysctl_ctx = NULL; |
| 959 | struct sysctl_oid *sysctl_tree = NULL; |
| 960 | char tmpstr[80], tmpstr2[80]; |
| 961 | |
| 962 | /* |
| 963 | * Setup the sysctl variable so the user can change the debug level |
| 964 | * on the fly. |
| 965 | */ |
| 966 | ksnprintf(tmpstr, sizeof(tmpstr), "MPS controller %d", |
| 967 | device_get_unit(sc->mps_dev)); |
| 968 | ksnprintf(tmpstr2, sizeof(tmpstr2), "%d", device_get_unit(sc->mps_dev)); |
| 969 | |
| 970 | sysctl_ctx_init(&sc->sysctl_ctx); |
| 971 | sc->sysctl_tree = SYSCTL_ADD_NODE(&sc->sysctl_ctx, |
| 972 | SYSCTL_STATIC_CHILDREN(_hw_mps), OID_AUTO, tmpstr2, |
| 973 | CTLFLAG_RD, 0, tmpstr); |
| 974 | if (sc->sysctl_tree == NULL) |
| 975 | return; |
| 976 | sysctl_ctx = &sc->sysctl_ctx; |
| 977 | sysctl_tree = sc->sysctl_tree; |
| 978 | |
| 979 | SYSCTL_ADD_INT(sysctl_ctx, SYSCTL_CHILDREN(sysctl_tree), |
| 980 | OID_AUTO, "debug_level", CTLFLAG_RW, &sc->mps_debug, 0, |
| 981 | "mps debug level"); |
| 982 | |
| 983 | #if 0 /* XXX swildner */ |
| 984 | SYSCTL_ADD_INT(sysctl_ctx, SYSCTL_CHILDREN(sysctl_tree), |
| 985 | OID_AUTO, "disable_msix", CTLFLAG_RD, &sc->disable_msix, 0, |
| 986 | "Disable the use of MSI-X interrupts"); |
| 987 | #endif |
| 988 | |
| 989 | SYSCTL_ADD_INT(sysctl_ctx, SYSCTL_CHILDREN(sysctl_tree), |
| 990 | OID_AUTO, "enable_msi", CTLFLAG_RD, &sc->enable_msi, 0, |
| 991 | "Enable the use of MSI interrupts"); |
| 992 | |
| 993 | SYSCTL_ADD_STRING(sysctl_ctx, SYSCTL_CHILDREN(sysctl_tree), |
| 994 | OID_AUTO, "firmware_version", CTLFLAG_RW, &sc->fw_version, |
| 995 | strlen(sc->fw_version), "firmware version"); |
| 996 | |
| 997 | SYSCTL_ADD_STRING(sysctl_ctx, SYSCTL_CHILDREN(sysctl_tree), |
| 998 | OID_AUTO, "driver_version", CTLFLAG_RW, MPS_DRIVER_VERSION, |
| 999 | strlen(MPS_DRIVER_VERSION), "driver version"); |
| 1000 | |
| 1001 | SYSCTL_ADD_INT(sysctl_ctx, SYSCTL_CHILDREN(sysctl_tree), |
| 1002 | OID_AUTO, "io_cmds_active", CTLFLAG_RD, |
| 1003 | &sc->io_cmds_active, 0, "number of currently active commands"); |
| 1004 | |
| 1005 | SYSCTL_ADD_INT(sysctl_ctx, SYSCTL_CHILDREN(sysctl_tree), |
| 1006 | OID_AUTO, "io_cmds_highwater", CTLFLAG_RD, |
| 1007 | &sc->io_cmds_highwater, 0, "maximum active commands seen"); |
| 1008 | |
| 1009 | SYSCTL_ADD_INT(sysctl_ctx, SYSCTL_CHILDREN(sysctl_tree), |
| 1010 | OID_AUTO, "chain_free", CTLFLAG_RD, |
| 1011 | &sc->chain_free, 0, "number of free chain elements"); |
| 1012 | |
| 1013 | SYSCTL_ADD_INT(sysctl_ctx, SYSCTL_CHILDREN(sysctl_tree), |
| 1014 | OID_AUTO, "chain_free_lowwater", CTLFLAG_RD, |
| 1015 | &sc->chain_free_lowwater, 0,"lowest number of free chain elements"); |
| 1016 | |
| 1017 | SYSCTL_ADD_INT(sysctl_ctx, SYSCTL_CHILDREN(sysctl_tree), |
| 1018 | OID_AUTO, "max_chains", CTLFLAG_RD, |
| 1019 | &sc->max_chains, 0,"maximum chain frames that will be allocated"); |
| 1020 | |
| 1021 | #if __FreeBSD_version >= 900030 |
| 1022 | SYSCTL_ADD_UQUAD(sysctl_ctx, SYSCTL_CHILDREN(sysctl_tree), |
| 1023 | OID_AUTO, "chain_alloc_fail", CTLFLAG_RD, |
| 1024 | &sc->chain_alloc_fail, "chain allocation failures"); |
| 1025 | #endif //FreeBSD_version >= 900030 |
| 1026 | } |
| 1027 | |
| 1028 | int |
| 1029 | mps_attach(struct mps_softc *sc) |
| 1030 | { |
| 1031 | int i, error; |
| 1032 | |
| 1033 | mps_get_tunables(sc); |
| 1034 | |
| 1035 | mps_dprint(sc, MPS_TRACE, "%s\n", __func__); |
| 1036 | |
| 1037 | lockinit(&sc->mps_lock, "MPT2SAS lock", 0, LK_CANRECURSE); |
| 1038 | callout_init(&sc->periodic); |
| 1039 | TAILQ_INIT(&sc->event_list); |
| 1040 | |
| 1041 | if ((error = mps_transition_ready(sc)) != 0) { |
| 1042 | mps_printf(sc, "%s failed to transition ready\n", __func__); |
| 1043 | return (error); |
| 1044 | } |
| 1045 | |
| 1046 | sc->facts = kmalloc(sizeof(MPI2_IOC_FACTS_REPLY), M_MPT2, |
| 1047 | M_ZERO|M_WAITOK); |
| 1048 | if ((error = mps_get_iocfacts(sc, sc->facts)) != 0) |
| 1049 | return (error); |
| 1050 | |
| 1051 | mps_print_iocfacts(sc, sc->facts); |
| 1052 | |
| 1053 | ksnprintf(sc->fw_version, sizeof(sc->fw_version), |
| 1054 | "%02d.%02d.%02d.%02d", |
| 1055 | sc->facts->FWVersion.Struct.Major, |
| 1056 | sc->facts->FWVersion.Struct.Minor, |
| 1057 | sc->facts->FWVersion.Struct.Unit, |
| 1058 | sc->facts->FWVersion.Struct.Dev); |
| 1059 | |
| 1060 | mps_printf(sc, "Firmware: %s, Driver: %s\n", sc->fw_version, |
| 1061 | MPS_DRIVER_VERSION); |
| 1062 | mps_printf(sc, "IOCCapabilities: %b\n", (int)sc->facts->IOCCapabilities, |
| 1063 | "\20" "\3ScsiTaskFull" "\4DiagTrace" "\5SnapBuf" "\6ExtBuf" |
| 1064 | "\7EEDP" "\10BiDirTarg" "\11Multicast" "\14TransRetry" "\15IR" |
| 1065 | "\16EventReplay" "\17RaidAccel" "\20MSIXIndex" "\21HostDisc"); |
| 1066 | |
| 1067 | /* |
| 1068 | * If the chip doesn't support event replay then a hard reset will be |
| 1069 | * required to trigger a full discovery. Do the reset here then |
| 1070 | * retransition to Ready. A hard reset might have already been done, |
| 1071 | * but it doesn't hurt to do it again. |
| 1072 | */ |
| 1073 | if ((sc->facts->IOCCapabilities & |
| 1074 | MPI2_IOCFACTS_CAPABILITY_EVENT_REPLAY) == 0) { |
| 1075 | mps_diag_reset(sc); |
| 1076 | if ((error = mps_transition_ready(sc)) != 0) |
| 1077 | return (error); |
| 1078 | } |
| 1079 | |
| 1080 | /* |
| 1081 | * Set flag if IR Firmware is loaded. |
| 1082 | */ |
| 1083 | if (sc->facts->IOCCapabilities & |
| 1084 | MPI2_IOCFACTS_CAPABILITY_INTEGRATED_RAID) |
| 1085 | sc->ir_firmware = 1; |
| 1086 | |
| 1087 | /* |
| 1088 | * Check if controller supports FW diag buffers and set flag to enable |
| 1089 | * each type. |
| 1090 | */ |
| 1091 | if (sc->facts->IOCCapabilities & |
| 1092 | MPI2_IOCFACTS_CAPABILITY_DIAG_TRACE_BUFFER) |
| 1093 | sc->fw_diag_buffer_list[MPI2_DIAG_BUF_TYPE_TRACE].enabled = |
| 1094 | TRUE; |
| 1095 | if (sc->facts->IOCCapabilities & |
| 1096 | MPI2_IOCFACTS_CAPABILITY_SNAPSHOT_BUFFER) |
| 1097 | sc->fw_diag_buffer_list[MPI2_DIAG_BUF_TYPE_SNAPSHOT].enabled = |
| 1098 | TRUE; |
| 1099 | if (sc->facts->IOCCapabilities & |
| 1100 | MPI2_IOCFACTS_CAPABILITY_EXTENDED_BUFFER) |
| 1101 | sc->fw_diag_buffer_list[MPI2_DIAG_BUF_TYPE_EXTENDED].enabled = |
| 1102 | TRUE; |
| 1103 | |
| 1104 | /* |
| 1105 | * Set flag if EEDP is supported and if TLR is supported. |
| 1106 | */ |
| 1107 | if (sc->facts->IOCCapabilities & MPI2_IOCFACTS_CAPABILITY_EEDP) |
| 1108 | sc->eedp_enabled = TRUE; |
| 1109 | if (sc->facts->IOCCapabilities & MPI2_IOCFACTS_CAPABILITY_TLR) |
| 1110 | sc->control_TLR = TRUE; |
| 1111 | |
| 1112 | /* |
| 1113 | * Size the queues. Since the reply queues always need one free entry, |
| 1114 | * we'll just deduct one reply message here. |
| 1115 | */ |
| 1116 | sc->num_reqs = MIN(MPS_REQ_FRAMES, sc->facts->RequestCredit); |
| 1117 | sc->num_replies = MIN(MPS_REPLY_FRAMES + MPS_EVT_REPLY_FRAMES, |
| 1118 | sc->facts->MaxReplyDescriptorPostQueueDepth) - 1; |
| 1119 | TAILQ_INIT(&sc->req_list); |
| 1120 | TAILQ_INIT(&sc->high_priority_req_list); |
| 1121 | TAILQ_INIT(&sc->chain_list); |
| 1122 | TAILQ_INIT(&sc->tm_list); |
| 1123 | |
| 1124 | if (((error = mps_alloc_queues(sc)) != 0) || |
| 1125 | ((error = mps_alloc_replies(sc)) != 0) || |
| 1126 | ((error = mps_alloc_requests(sc)) != 0)) { |
| 1127 | mps_printf(sc, "%s failed to alloc\n", __func__); |
| 1128 | mps_free(sc); |
| 1129 | return (error); |
| 1130 | } |
| 1131 | |
| 1132 | if (((error = mps_init_queues(sc)) != 0) || |
| 1133 | ((error = mps_transition_operational(sc)) != 0)) { |
| 1134 | mps_printf(sc, "%s failed to transition operational\n", __func__); |
| 1135 | mps_free(sc); |
| 1136 | return (error); |
| 1137 | } |
| 1138 | |
| 1139 | /* |
| 1140 | * Finish the queue initialization. |
| 1141 | * These are set here instead of in mps_init_queues() because the |
| 1142 | * IOC resets these values during the state transition in |
| 1143 | * mps_transition_operational(). The free index is set to 1 |
| 1144 | * because the corresponding index in the IOC is set to 0, and the |
| 1145 | * IOC treats the queues as full if both are set to the same value. |
| 1146 | * Hence the reason that the queue can't hold all of the possible |
| 1147 | * replies. |
| 1148 | */ |
| 1149 | sc->replypostindex = 0; |
| 1150 | mps_regwrite(sc, MPI2_REPLY_FREE_HOST_INDEX_OFFSET, sc->replyfreeindex); |
| 1151 | mps_regwrite(sc, MPI2_REPLY_POST_HOST_INDEX_OFFSET, 0); |
| 1152 | |
| 1153 | sc->pfacts = kmalloc(sizeof(MPI2_PORT_FACTS_REPLY) * |
| 1154 | sc->facts->NumberOfPorts, M_MPT2, M_ZERO|M_WAITOK); |
| 1155 | for (i = 0; i < sc->facts->NumberOfPorts; i++) { |
| 1156 | if ((error = mps_get_portfacts(sc, &sc->pfacts[i], i)) != 0) { |
| 1157 | mps_printf(sc, "%s failed to get portfacts for port %d\n", |
| 1158 | __func__, i); |
| 1159 | mps_free(sc); |
| 1160 | return (error); |
| 1161 | } |
| 1162 | mps_print_portfacts(sc, &sc->pfacts[i]); |
| 1163 | } |
| 1164 | |
| 1165 | /* Attach the subsystems so they can prepare their event masks. */ |
| 1166 | /* XXX Should be dynamic so that IM/IR and user modules can attach */ |
| 1167 | if (((error = mps_attach_log(sc)) != 0) || |
| 1168 | ((error = mps_attach_sas(sc)) != 0) || |
| 1169 | ((error = mps_attach_user(sc)) != 0)) { |
| 1170 | mps_printf(sc, "%s failed to attach all subsystems: error %d\n", |
| 1171 | __func__, error); |
| 1172 | mps_free(sc); |
| 1173 | return (error); |
| 1174 | } |
| 1175 | |
| 1176 | if ((error = mps_pci_setup_interrupts(sc)) != 0) { |
| 1177 | mps_printf(sc, "%s failed to setup interrupts\n", __func__); |
| 1178 | mps_free(sc); |
| 1179 | return (error); |
| 1180 | } |
| 1181 | |
| 1182 | /* |
| 1183 | * The static page function currently read is ioc page8. Others can be |
| 1184 | * added in future. |
| 1185 | */ |
| 1186 | mps_base_static_config_pages(sc); |
| 1187 | |
| 1188 | /* Start the periodic watchdog check on the IOC Doorbell */ |
| 1189 | mps_periodic(sc); |
| 1190 | |
| 1191 | /* |
| 1192 | * The portenable will kick off discovery events that will drive the |
| 1193 | * rest of the initialization process. The CAM/SAS module will |
| 1194 | * hold up the boot sequence until discovery is complete. |
| 1195 | */ |
| 1196 | sc->mps_ich.ich_func = mps_startup; |
| 1197 | sc->mps_ich.ich_arg = sc; |
| 1198 | if (config_intrhook_establish(&sc->mps_ich) != 0) { |
| 1199 | mps_dprint(sc, MPS_FAULT, "Cannot establish MPS config hook\n"); |
| 1200 | error = EINVAL; |
| 1201 | } |
| 1202 | |
| 1203 | /* |
| 1204 | * Allow IR to shutdown gracefully when shutdown occurs. |
| 1205 | */ |
| 1206 | sc->shutdown_eh = EVENTHANDLER_REGISTER(shutdown_final, |
| 1207 | mpssas_ir_shutdown, sc, SHUTDOWN_PRI_DEFAULT); |
| 1208 | |
| 1209 | if (sc->shutdown_eh == NULL) |
| 1210 | mps_dprint(sc, MPS_FAULT, "shutdown event registration " |
| 1211 | "failed\n"); |
| 1212 | |
| 1213 | mps_setup_sysctl(sc); |
| 1214 | |
| 1215 | sc->mps_flags |= MPS_FLAGS_ATTACH_DONE; |
| 1216 | |
| 1217 | return (error); |
| 1218 | } |
| 1219 | |
| 1220 | /* Run through any late-start handlers. */ |
| 1221 | static void |
| 1222 | mps_startup(void *arg) |
| 1223 | { |
| 1224 | struct mps_softc *sc; |
| 1225 | |
| 1226 | sc = (struct mps_softc *)arg; |
| 1227 | |
| 1228 | mps_lock(sc); |
| 1229 | mps_unmask_intr(sc); |
| 1230 | /* initialize device mapping tables */ |
| 1231 | mps_mapping_initialize(sc); |
| 1232 | mpssas_startup(sc); |
| 1233 | mps_unlock(sc); |
| 1234 | } |
| 1235 | |
| 1236 | /* Periodic watchdog. Is called with the driver lock already held. */ |
| 1237 | static void |
| 1238 | mps_periodic(void *arg) |
| 1239 | { |
| 1240 | struct mps_softc *sc; |
| 1241 | uint32_t db; |
| 1242 | |
| 1243 | sc = (struct mps_softc *)arg; |
| 1244 | mps_lock(sc); |
| 1245 | if (sc->mps_flags & MPS_FLAGS_SHUTDOWN) { |
| 1246 | mps_unlock(sc); |
| 1247 | return; |
| 1248 | } |
| 1249 | |
| 1250 | db = mps_regread(sc, MPI2_DOORBELL_OFFSET); |
| 1251 | if ((db & MPI2_IOC_STATE_MASK) == MPI2_IOC_STATE_FAULT) { |
| 1252 | device_printf(sc->mps_dev, "IOC Fault 0x%08x, Resetting\n", db); |
| 1253 | |
| 1254 | mps_reinit(sc); |
| 1255 | } |
| 1256 | |
| 1257 | callout_reset(&sc->periodic, MPS_PERIODIC_DELAY * hz, mps_periodic, sc); |
| 1258 | mps_unlock(sc); |
| 1259 | } |
| 1260 | |
| 1261 | static void |
| 1262 | mps_log_evt_handler(struct mps_softc *sc, uintptr_t data, |
| 1263 | MPI2_EVENT_NOTIFICATION_REPLY *event) |
| 1264 | { |
| 1265 | MPI2_EVENT_DATA_LOG_ENTRY_ADDED *entry; |
| 1266 | |
| 1267 | mps_print_event(sc, event); |
| 1268 | |
| 1269 | switch (event->Event) { |
| 1270 | case MPI2_EVENT_LOG_DATA: |
| 1271 | device_printf(sc->mps_dev, "MPI2_EVENT_LOG_DATA:\n"); |
| 1272 | hexdump(event->EventData, event->EventDataLength, NULL, 0); |
| 1273 | break; |
| 1274 | case MPI2_EVENT_LOG_ENTRY_ADDED: |
| 1275 | entry = (MPI2_EVENT_DATA_LOG_ENTRY_ADDED *)event->EventData; |
| 1276 | mps_dprint(sc, MPS_INFO, "MPI2_EVENT_LOG_ENTRY_ADDED event " |
| 1277 | "0x%x Sequence %d:\n", entry->LogEntryQualifier, |
| 1278 | entry->LogSequence); |
| 1279 | break; |
| 1280 | default: |
| 1281 | break; |
| 1282 | } |
| 1283 | return; |
| 1284 | } |
| 1285 | |
| 1286 | static int |
| 1287 | mps_attach_log(struct mps_softc *sc) |
| 1288 | { |
| 1289 | uint8_t events[16]; |
| 1290 | |
| 1291 | bzero(events, 16); |
| 1292 | setbit(events, MPI2_EVENT_LOG_DATA); |
| 1293 | setbit(events, MPI2_EVENT_LOG_ENTRY_ADDED); |
| 1294 | |
| 1295 | mps_register_events(sc, events, mps_log_evt_handler, NULL, |
| 1296 | &sc->mps_log_eh); |
| 1297 | |
| 1298 | return (0); |
| 1299 | } |
| 1300 | |
| 1301 | static int |
| 1302 | mps_detach_log(struct mps_softc *sc) |
| 1303 | { |
| 1304 | |
| 1305 | if (sc->mps_log_eh != NULL) |
| 1306 | mps_deregister_events(sc, sc->mps_log_eh); |
| 1307 | return (0); |
| 1308 | } |
| 1309 | |
| 1310 | /* |
| 1311 | * Free all of the driver resources and detach submodules. Should be called |
| 1312 | * without the lock held. |
| 1313 | */ |
| 1314 | int |
| 1315 | mps_free(struct mps_softc *sc) |
| 1316 | { |
| 1317 | struct mps_command *cm; |
| 1318 | int i, error; |
| 1319 | |
| 1320 | /* Turn off the watchdog */ |
| 1321 | mps_lock(sc); |
| 1322 | sc->mps_flags |= MPS_FLAGS_SHUTDOWN; |
| 1323 | mps_unlock(sc); |
| 1324 | #if 0 /* XXX swildner */ |
| 1325 | /* Lock must not be held for this */ |
| 1326 | callout_drain(&sc->periodic); |
| 1327 | #else |
| 1328 | callout_stop(&sc->periodic); |
| 1329 | #endif |
| 1330 | |
| 1331 | if (((error = mps_detach_log(sc)) != 0) || |
| 1332 | ((error = mps_detach_sas(sc)) != 0)) |
| 1333 | return (error); |
| 1334 | |
| 1335 | /* Put the IOC back in the READY state. */ |
| 1336 | mps_lock(sc); |
| 1337 | if ((error = mps_transition_ready(sc)) != 0) { |
| 1338 | mps_unlock(sc); |
| 1339 | return (error); |
| 1340 | } |
| 1341 | mps_unlock(sc); |
| 1342 | |
| 1343 | if (sc->facts != NULL) |
| 1344 | kfree(sc->facts, M_MPT2); |
| 1345 | |
| 1346 | if (sc->pfacts != NULL) |
| 1347 | kfree(sc->pfacts, M_MPT2); |
| 1348 | |
| 1349 | if (sc->post_busaddr != 0) |
| 1350 | bus_dmamap_unload(sc->queues_dmat, sc->queues_map); |
| 1351 | if (sc->post_queue != NULL) |
| 1352 | bus_dmamem_free(sc->queues_dmat, sc->post_queue, |
| 1353 | sc->queues_map); |
| 1354 | if (sc->queues_dmat != NULL) |
| 1355 | bus_dma_tag_destroy(sc->queues_dmat); |
| 1356 | |
| 1357 | if (sc->chain_busaddr != 0) |
| 1358 | bus_dmamap_unload(sc->chain_dmat, sc->chain_map); |
| 1359 | if (sc->chain_frames != NULL) |
| 1360 | bus_dmamem_free(sc->chain_dmat, sc->chain_frames,sc->chain_map); |
| 1361 | if (sc->chain_dmat != NULL) |
| 1362 | bus_dma_tag_destroy(sc->chain_dmat); |
| 1363 | |
| 1364 | if (sc->sense_busaddr != 0) |
| 1365 | bus_dmamap_unload(sc->sense_dmat, sc->sense_map); |
| 1366 | if (sc->sense_frames != NULL) |
| 1367 | bus_dmamem_free(sc->sense_dmat, sc->sense_frames,sc->sense_map); |
| 1368 | if (sc->sense_dmat != NULL) |
| 1369 | bus_dma_tag_destroy(sc->sense_dmat); |
| 1370 | |
| 1371 | if (sc->reply_busaddr != 0) |
| 1372 | bus_dmamap_unload(sc->reply_dmat, sc->reply_map); |
| 1373 | if (sc->reply_frames != NULL) |
| 1374 | bus_dmamem_free(sc->reply_dmat, sc->reply_frames,sc->reply_map); |
| 1375 | if (sc->reply_dmat != NULL) |
| 1376 | bus_dma_tag_destroy(sc->reply_dmat); |
| 1377 | |
| 1378 | if (sc->req_busaddr != 0) |
| 1379 | bus_dmamap_unload(sc->req_dmat, sc->req_map); |
| 1380 | if (sc->req_frames != NULL) |
| 1381 | bus_dmamem_free(sc->req_dmat, sc->req_frames, sc->req_map); |
| 1382 | if (sc->req_dmat != NULL) |
| 1383 | bus_dma_tag_destroy(sc->req_dmat); |
| 1384 | |
| 1385 | if (sc->chains != NULL) |
| 1386 | kfree(sc->chains, M_MPT2); |
| 1387 | if (sc->commands != NULL) { |
| 1388 | for (i = 1; i < sc->num_reqs; i++) { |
| 1389 | cm = &sc->commands[i]; |
| 1390 | bus_dmamap_destroy(sc->buffer_dmat, cm->cm_dmamap); |
| 1391 | } |
| 1392 | kfree(sc->commands, M_MPT2); |
| 1393 | } |
| 1394 | if (sc->buffer_dmat != NULL) |
| 1395 | bus_dma_tag_destroy(sc->buffer_dmat); |
| 1396 | |
| 1397 | if (sc->sysctl_tree != NULL) |
| 1398 | sysctl_ctx_free(&sc->sysctl_ctx); |
| 1399 | |
| 1400 | mps_mapping_free_memory(sc); |
| 1401 | |
| 1402 | /* Deregister the shutdown function */ |
| 1403 | if (sc->shutdown_eh != NULL) |
| 1404 | EVENTHANDLER_DEREGISTER(shutdown_final, sc->shutdown_eh); |
| 1405 | |
| 1406 | lockuninit(&sc->mps_lock); |
| 1407 | |
| 1408 | return (0); |
| 1409 | } |
| 1410 | |
| 1411 | static __inline void |
| 1412 | mps_complete_command(struct mps_command *cm) |
| 1413 | { |
| 1414 | if (cm->cm_flags & MPS_CM_FLAGS_POLLED) |
| 1415 | cm->cm_flags |= MPS_CM_FLAGS_COMPLETE; |
| 1416 | |
| 1417 | if (cm->cm_complete != NULL) { |
| 1418 | mps_dprint(cm->cm_sc, MPS_TRACE, |
| 1419 | "%s cm %p calling cm_complete %p data %p reply %p\n", |
| 1420 | __func__, cm, cm->cm_complete, cm->cm_complete_data, |
| 1421 | cm->cm_reply); |
| 1422 | cm->cm_complete(cm->cm_sc, cm); |
| 1423 | } |
| 1424 | |
| 1425 | if (cm->cm_flags & MPS_CM_FLAGS_WAKEUP) { |
| 1426 | mps_dprint(cm->cm_sc, MPS_TRACE, "%s: waking up %p\n", |
| 1427 | __func__, cm); |
| 1428 | wakeup(cm); |
| 1429 | } |
| 1430 | |
| 1431 | if (cm->cm_sc->io_cmds_active != 0) { |
| 1432 | cm->cm_sc->io_cmds_active--; |
| 1433 | } else { |
| 1434 | mps_dprint(cm->cm_sc, MPS_INFO, "Warning: io_cmds_active is " |
| 1435 | "out of sync - resynching to 0\n"); |
| 1436 | } |
| 1437 | } |
| 1438 | |
| 1439 | void |
| 1440 | mps_intr(void *data) |
| 1441 | { |
| 1442 | struct mps_softc *sc; |
| 1443 | uint32_t status; |
| 1444 | |
| 1445 | sc = (struct mps_softc *)data; |
| 1446 | mps_dprint(sc, MPS_TRACE, "%s\n", __func__); |
| 1447 | |
| 1448 | /* |
| 1449 | * Check interrupt status register to flush the bus. This is |
| 1450 | * needed for both INTx interrupts and driver-driven polling |
| 1451 | */ |
| 1452 | status = mps_regread(sc, MPI2_HOST_INTERRUPT_STATUS_OFFSET); |
| 1453 | if ((status & MPI2_HIS_REPLY_DESCRIPTOR_INTERRUPT) == 0) |
| 1454 | return; |
| 1455 | |
| 1456 | mps_lock(sc); |
| 1457 | mps_intr_locked(data); |
| 1458 | mps_unlock(sc); |
| 1459 | return; |
| 1460 | } |
| 1461 | |
| 1462 | /* |
| 1463 | * In theory, MSI/MSIX interrupts shouldn't need to read any registers on the |
| 1464 | * chip. Hopefully this theory is correct. |
| 1465 | */ |
| 1466 | void |
| 1467 | mps_intr_msi(void *data) |
| 1468 | { |
| 1469 | struct mps_softc *sc; |
| 1470 | |
| 1471 | sc = (struct mps_softc *)data; |
| 1472 | mps_dprint(sc, MPS_TRACE, "%s\n", __func__); |
| 1473 | mps_lock(sc); |
| 1474 | mps_intr_locked(data); |
| 1475 | mps_unlock(sc); |
| 1476 | return; |
| 1477 | } |
| 1478 | |
| 1479 | /* |
| 1480 | * The locking is overly broad and simplistic, but easy to deal with for now. |
| 1481 | */ |
| 1482 | void |
| 1483 | mps_intr_locked(void *data) |
| 1484 | { |
| 1485 | MPI2_REPLY_DESCRIPTORS_UNION *desc; |
| 1486 | struct mps_softc *sc; |
| 1487 | struct mps_command *cm = NULL; |
| 1488 | uint8_t flags; |
| 1489 | u_int pq; |
| 1490 | MPI2_DIAG_RELEASE_REPLY *rel_rep; |
| 1491 | mps_fw_diagnostic_buffer_t *pBuffer; |
| 1492 | |
| 1493 | sc = (struct mps_softc *)data; |
| 1494 | |
| 1495 | pq = sc->replypostindex; |
| 1496 | mps_dprint(sc, MPS_TRACE, |
| 1497 | "%s sc %p starting with replypostindex %u\n", |
| 1498 | __func__, sc, sc->replypostindex); |
| 1499 | |
| 1500 | for ( ;; ) { |
| 1501 | cm = NULL; |
| 1502 | desc = &sc->post_queue[sc->replypostindex]; |
| 1503 | flags = desc->Default.ReplyFlags & |
| 1504 | MPI2_RPY_DESCRIPT_FLAGS_TYPE_MASK; |
| 1505 | if ((flags == MPI2_RPY_DESCRIPT_FLAGS_UNUSED) |
| 1506 | || (desc->Words.High == 0xffffffff)) |
| 1507 | break; |
| 1508 | |
| 1509 | /* increment the replypostindex now, so that event handlers |
| 1510 | * and cm completion handlers which decide to do a diag |
| 1511 | * reset can zero it without it getting incremented again |
| 1512 | * afterwards, and we break out of this loop on the next |
| 1513 | * iteration since the reply post queue has been cleared to |
| 1514 | * 0xFF and all descriptors look unused (which they are). |
| 1515 | */ |
| 1516 | if (++sc->replypostindex >= sc->pqdepth) |
| 1517 | sc->replypostindex = 0; |
| 1518 | |
| 1519 | switch (flags) { |
| 1520 | case MPI2_RPY_DESCRIPT_FLAGS_SCSI_IO_SUCCESS: |
| 1521 | cm = &sc->commands[desc->SCSIIOSuccess.SMID]; |
| 1522 | cm->cm_reply = NULL; |
| 1523 | break; |
| 1524 | case MPI2_RPY_DESCRIPT_FLAGS_ADDRESS_REPLY: |
| 1525 | { |
| 1526 | uint32_t baddr; |
| 1527 | uint8_t *reply; |
| 1528 | |
| 1529 | /* |
| 1530 | * Re-compose the reply address from the address |
| 1531 | * sent back from the chip. The ReplyFrameAddress |
| 1532 | * is the lower 32 bits of the physical address of |
| 1533 | * particular reply frame. Convert that address to |
| 1534 | * host format, and then use that to provide the |
| 1535 | * offset against the virtual address base |
| 1536 | * (sc->reply_frames). |
| 1537 | */ |
| 1538 | baddr = le32toh(desc->AddressReply.ReplyFrameAddress); |
| 1539 | reply = sc->reply_frames + |
| 1540 | (baddr - ((uint32_t)sc->reply_busaddr)); |
| 1541 | /* |
| 1542 | * Make sure the reply we got back is in a valid |
| 1543 | * range. If not, go ahead and panic here, since |
| 1544 | * we'll probably panic as soon as we deference the |
| 1545 | * reply pointer anyway. |
| 1546 | */ |
| 1547 | if ((reply < sc->reply_frames) |
| 1548 | || (reply > (sc->reply_frames + |
| 1549 | (sc->fqdepth * sc->facts->ReplyFrameSize * 4)))) { |
| 1550 | kprintf("%s: WARNING: reply %p out of range!\n", |
| 1551 | __func__, reply); |
| 1552 | kprintf("%s: reply_frames %p, fqdepth %d, " |
| 1553 | "frame size %d\n", __func__, |
| 1554 | sc->reply_frames, sc->fqdepth, |
| 1555 | sc->facts->ReplyFrameSize * 4); |
| 1556 | kprintf("%s: baddr %#x,\n", __func__, baddr); |
| 1557 | panic("Reply address out of range"); |
| 1558 | } |
| 1559 | if (desc->AddressReply.SMID == 0) { |
| 1560 | if (((MPI2_DEFAULT_REPLY *)reply)->Function == |
| 1561 | MPI2_FUNCTION_DIAG_BUFFER_POST) { |
| 1562 | /* |
| 1563 | * If SMID is 0 for Diag Buffer Post, |
| 1564 | * this implies that the reply is due to |
| 1565 | * a release function with a status that |
| 1566 | * the buffer has been released. Set |
| 1567 | * the buffer flags accordingly. |
| 1568 | */ |
| 1569 | rel_rep = |
| 1570 | (MPI2_DIAG_RELEASE_REPLY *)reply; |
| 1571 | if (rel_rep->IOCStatus == |
| 1572 | MPI2_IOCSTATUS_DIAGNOSTIC_RELEASED) |
| 1573 | { |
| 1574 | pBuffer = |
| 1575 | &sc->fw_diag_buffer_list[ |
| 1576 | rel_rep->BufferType]; |
| 1577 | pBuffer->valid_data = TRUE; |
| 1578 | pBuffer->owned_by_firmware = |
| 1579 | FALSE; |
| 1580 | pBuffer->immediate = FALSE; |
| 1581 | } |
| 1582 | } else |
| 1583 | mps_dispatch_event(sc, baddr, |
| 1584 | (MPI2_EVENT_NOTIFICATION_REPLY *) |
| 1585 | reply); |
| 1586 | } else { |
| 1587 | cm = &sc->commands[desc->AddressReply.SMID]; |
| 1588 | cm->cm_reply = reply; |
| 1589 | cm->cm_reply_data = |
| 1590 | desc->AddressReply.ReplyFrameAddress; |
| 1591 | } |
| 1592 | break; |
| 1593 | } |
| 1594 | case MPI2_RPY_DESCRIPT_FLAGS_TARGETASSIST_SUCCESS: |
| 1595 | case MPI2_RPY_DESCRIPT_FLAGS_TARGET_COMMAND_BUFFER: |
| 1596 | case MPI2_RPY_DESCRIPT_FLAGS_RAID_ACCELERATOR_SUCCESS: |
| 1597 | default: |
| 1598 | /* Unhandled */ |
| 1599 | device_printf(sc->mps_dev, "Unhandled reply 0x%x\n", |
| 1600 | desc->Default.ReplyFlags); |
| 1601 | cm = NULL; |
| 1602 | break; |
| 1603 | } |
| 1604 | |
| 1605 | if (cm != NULL) |
| 1606 | mps_complete_command(cm); |
| 1607 | |
| 1608 | desc->Words.Low = 0xffffffff; |
| 1609 | desc->Words.High = 0xffffffff; |
| 1610 | } |
| 1611 | |
| 1612 | if (pq != sc->replypostindex) { |
| 1613 | mps_dprint(sc, MPS_TRACE, |
| 1614 | "%s sc %p writing postindex %d\n", |
| 1615 | __func__, sc, sc->replypostindex); |
| 1616 | mps_regwrite(sc, MPI2_REPLY_POST_HOST_INDEX_OFFSET, sc->replypostindex); |
| 1617 | } |
| 1618 | |
| 1619 | return; |
| 1620 | } |
| 1621 | |
| 1622 | static void |
| 1623 | mps_dispatch_event(struct mps_softc *sc, uintptr_t data, |
| 1624 | MPI2_EVENT_NOTIFICATION_REPLY *reply) |
| 1625 | { |
| 1626 | struct mps_event_handle *eh; |
| 1627 | int event, handled = 0; |
| 1628 | |
| 1629 | event = reply->Event; |
| 1630 | TAILQ_FOREACH(eh, &sc->event_list, eh_list) { |
| 1631 | if (isset(eh->mask, event)) { |
| 1632 | eh->callback(sc, data, reply); |
| 1633 | handled++; |
| 1634 | } |
| 1635 | } |
| 1636 | |
| 1637 | if (handled == 0) |
| 1638 | device_printf(sc->mps_dev, "Unhandled event 0x%x\n", event); |
| 1639 | |
| 1640 | /* |
| 1641 | * This is the only place that the event/reply should be freed. |
| 1642 | * Anything wanting to hold onto the event data should have |
| 1643 | * already copied it into their own storage. |
| 1644 | */ |
| 1645 | mps_free_reply(sc, data); |
| 1646 | } |
| 1647 | |
| 1648 | static void |
| 1649 | mps_reregister_events_complete(struct mps_softc *sc, struct mps_command *cm) |
| 1650 | { |
| 1651 | mps_dprint(sc, MPS_TRACE, "%s\n", __func__); |
| 1652 | |
| 1653 | if (cm->cm_reply) |
| 1654 | mps_print_event(sc, |
| 1655 | (MPI2_EVENT_NOTIFICATION_REPLY *)cm->cm_reply); |
| 1656 | |
| 1657 | mps_free_command(sc, cm); |
| 1658 | |
| 1659 | /* next, send a port enable */ |
| 1660 | mpssas_startup(sc); |
| 1661 | } |
| 1662 | |
| 1663 | /* |
| 1664 | * For both register_events and update_events, the caller supplies a bitmap |
| 1665 | * of events that it _wants_. These functions then turn that into a bitmask |
| 1666 | * suitable for the controller. |
| 1667 | */ |
| 1668 | int |
| 1669 | mps_register_events(struct mps_softc *sc, uint8_t *mask, |
| 1670 | mps_evt_callback_t *cb, void *data, struct mps_event_handle **handle) |
| 1671 | { |
| 1672 | struct mps_event_handle *eh; |
| 1673 | int error = 0; |
| 1674 | |
| 1675 | eh = kmalloc(sizeof(struct mps_event_handle), M_MPT2, M_WAITOK|M_ZERO); |
| 1676 | eh->callback = cb; |
| 1677 | eh->data = data; |
| 1678 | TAILQ_INSERT_TAIL(&sc->event_list, eh, eh_list); |
| 1679 | if (mask != NULL) |
| 1680 | error = mps_update_events(sc, eh, mask); |
| 1681 | *handle = eh; |
| 1682 | |
| 1683 | return (error); |
| 1684 | } |
| 1685 | |
| 1686 | int |
| 1687 | mps_update_events(struct mps_softc *sc, struct mps_event_handle *handle, |
| 1688 | uint8_t *mask) |
| 1689 | { |
| 1690 | MPI2_EVENT_NOTIFICATION_REQUEST *evtreq; |
| 1691 | MPI2_EVENT_NOTIFICATION_REPLY *reply; |
| 1692 | struct mps_command *cm; |
| 1693 | struct mps_event_handle *eh; |
| 1694 | int error, i; |
| 1695 | |
| 1696 | mps_dprint(sc, MPS_TRACE, "%s\n", __func__); |
| 1697 | |
| 1698 | if ((mask != NULL) && (handle != NULL)) |
| 1699 | bcopy(mask, &handle->mask[0], 16); |
| 1700 | memset(sc->event_mask, 0xff, 16); |
| 1701 | |
| 1702 | TAILQ_FOREACH(eh, &sc->event_list, eh_list) { |
| 1703 | for (i = 0; i < 16; i++) |
| 1704 | sc->event_mask[i] &= ~eh->mask[i]; |
| 1705 | } |
| 1706 | |
| 1707 | if ((cm = mps_alloc_command(sc)) == NULL) |
| 1708 | return (EBUSY); |
| 1709 | evtreq = (MPI2_EVENT_NOTIFICATION_REQUEST *)cm->cm_req; |
| 1710 | evtreq->Function = MPI2_FUNCTION_EVENT_NOTIFICATION; |
| 1711 | evtreq->MsgFlags = 0; |
| 1712 | evtreq->SASBroadcastPrimitiveMasks = 0; |
| 1713 | #ifdef MPS_DEBUG_ALL_EVENTS |
| 1714 | { |
| 1715 | u_char fullmask[16]; |
| 1716 | memset(fullmask, 0x00, 16); |
| 1717 | bcopy(fullmask, (uint8_t *)&evtreq->EventMasks, 16); |
| 1718 | } |
| 1719 | #else |
| 1720 | bcopy(sc->event_mask, (uint8_t *)&evtreq->EventMasks, 16); |
| 1721 | #endif |
| 1722 | cm->cm_desc.Default.RequestFlags = MPI2_REQ_DESCRIPT_FLAGS_DEFAULT_TYPE; |
| 1723 | cm->cm_data = NULL; |
| 1724 | |
| 1725 | error = mps_request_polled(sc, cm); |
| 1726 | reply = (MPI2_EVENT_NOTIFICATION_REPLY *)cm->cm_reply; |
| 1727 | if ((reply == NULL) || |
| 1728 | (reply->IOCStatus & MPI2_IOCSTATUS_MASK) != MPI2_IOCSTATUS_SUCCESS) |
| 1729 | error = ENXIO; |
| 1730 | mps_print_event(sc, reply); |
| 1731 | mps_dprint(sc, MPS_TRACE, "%s finished error %d\n", __func__, error); |
| 1732 | |
| 1733 | mps_free_command(sc, cm); |
| 1734 | return (error); |
| 1735 | } |
| 1736 | |
| 1737 | static int |
| 1738 | mps_reregister_events(struct mps_softc *sc) |
| 1739 | { |
| 1740 | MPI2_EVENT_NOTIFICATION_REQUEST *evtreq; |
| 1741 | struct mps_command *cm; |
| 1742 | struct mps_event_handle *eh; |
| 1743 | int error, i; |
| 1744 | |
| 1745 | mps_dprint(sc, MPS_TRACE, "%s\n", __func__); |
| 1746 | |
| 1747 | /* first, reregister events */ |
| 1748 | |
| 1749 | memset(sc->event_mask, 0xff, 16); |
| 1750 | |
| 1751 | TAILQ_FOREACH(eh, &sc->event_list, eh_list) { |
| 1752 | for (i = 0; i < 16; i++) |
| 1753 | sc->event_mask[i] &= ~eh->mask[i]; |
| 1754 | } |
| 1755 | |
| 1756 | if ((cm = mps_alloc_command(sc)) == NULL) |
| 1757 | return (EBUSY); |
| 1758 | evtreq = (MPI2_EVENT_NOTIFICATION_REQUEST *)cm->cm_req; |
| 1759 | evtreq->Function = MPI2_FUNCTION_EVENT_NOTIFICATION; |
| 1760 | evtreq->MsgFlags = 0; |
| 1761 | evtreq->SASBroadcastPrimitiveMasks = 0; |
| 1762 | #ifdef MPS_DEBUG_ALL_EVENTS |
| 1763 | { |
| 1764 | u_char fullmask[16]; |
| 1765 | memset(fullmask, 0x00, 16); |
| 1766 | bcopy(fullmask, (uint8_t *)&evtreq->EventMasks, 16); |
| 1767 | } |
| 1768 | #else |
| 1769 | bcopy(sc->event_mask, (uint8_t *)&evtreq->EventMasks, 16); |
| 1770 | #endif |
| 1771 | cm->cm_desc.Default.RequestFlags = MPI2_REQ_DESCRIPT_FLAGS_DEFAULT_TYPE; |
| 1772 | cm->cm_data = NULL; |
| 1773 | cm->cm_complete = mps_reregister_events_complete; |
| 1774 | |
| 1775 | error = mps_map_command(sc, cm); |
| 1776 | |
| 1777 | mps_dprint(sc, MPS_TRACE, "%s finished with error %d\n", __func__, error); |
| 1778 | return (error); |
| 1779 | } |
| 1780 | |
| 1781 | int |
| 1782 | mps_deregister_events(struct mps_softc *sc, struct mps_event_handle *handle) |
| 1783 | { |
| 1784 | |
| 1785 | TAILQ_REMOVE(&sc->event_list, handle, eh_list); |
| 1786 | kfree(handle, M_MPT2); |
| 1787 | return (mps_update_events(sc, NULL, NULL)); |
| 1788 | } |
| 1789 | |
| 1790 | /* |
| 1791 | * Add a chain element as the next SGE for the specified command. |
| 1792 | * Reset cm_sge and cm_sgesize to indicate all the available space. |
| 1793 | */ |
| 1794 | static int |
| 1795 | mps_add_chain(struct mps_command *cm) |
| 1796 | { |
| 1797 | MPI2_SGE_CHAIN32 *sgc; |
| 1798 | struct mps_chain *chain; |
| 1799 | int space; |
| 1800 | |
| 1801 | if (cm->cm_sglsize < MPS_SGC_SIZE) |
| 1802 | panic("MPS: Need SGE Error Code\n"); |
| 1803 | |
| 1804 | chain = mps_alloc_chain(cm->cm_sc); |
| 1805 | if (chain == NULL) |
| 1806 | return (ENOBUFS); |
| 1807 | |
| 1808 | space = (int)cm->cm_sc->facts->IOCRequestFrameSize * 4; |
| 1809 | |
| 1810 | /* |
| 1811 | * Note: a double-linked list is used to make it easier to |
| 1812 | * walk for debugging. |
| 1813 | */ |
| 1814 | TAILQ_INSERT_TAIL(&cm->cm_chain_list, chain, chain_link); |
| 1815 | |
| 1816 | sgc = (MPI2_SGE_CHAIN32 *)&cm->cm_sge->MpiChain; |
| 1817 | sgc->Length = space; |
| 1818 | sgc->NextChainOffset = 0; |
| 1819 | sgc->Flags = MPI2_SGE_FLAGS_CHAIN_ELEMENT; |
| 1820 | sgc->Address = chain->chain_busaddr; |
| 1821 | |
| 1822 | cm->cm_sge = (MPI2_SGE_IO_UNION *)&chain->chain->MpiSimple; |
| 1823 | cm->cm_sglsize = space; |
| 1824 | return (0); |
| 1825 | } |
| 1826 | |
| 1827 | /* |
| 1828 | * Add one scatter-gather element (chain, simple, transaction context) |
| 1829 | * to the scatter-gather list for a command. Maintain cm_sglsize and |
| 1830 | * cm_sge as the remaining size and pointer to the next SGE to fill |
| 1831 | * in, respectively. |
| 1832 | */ |
| 1833 | int |
| 1834 | mps_push_sge(struct mps_command *cm, void *sgep, size_t len, int segsleft) |
| 1835 | { |
| 1836 | MPI2_SGE_TRANSACTION_UNION *tc = sgep; |
| 1837 | MPI2_SGE_SIMPLE64 *sge = sgep; |
| 1838 | int error, type; |
| 1839 | uint32_t saved_buf_len, saved_address_low, saved_address_high; |
| 1840 | |
| 1841 | type = (tc->Flags & MPI2_SGE_FLAGS_ELEMENT_MASK); |
| 1842 | |
| 1843 | #ifdef INVARIANTS |
| 1844 | switch (type) { |
| 1845 | case MPI2_SGE_FLAGS_TRANSACTION_ELEMENT: { |
| 1846 | if (len != tc->DetailsLength + 4) |
| 1847 | panic("TC %p length %u or %zu?", tc, |
| 1848 | tc->DetailsLength + 4, len); |
| 1849 | } |
| 1850 | break; |
| 1851 | case MPI2_SGE_FLAGS_CHAIN_ELEMENT: |
| 1852 | /* Driver only uses 32-bit chain elements */ |
| 1853 | if (len != MPS_SGC_SIZE) |
| 1854 | panic("CHAIN %p length %u or %zu?", sgep, |
| 1855 | MPS_SGC_SIZE, len); |
| 1856 | break; |
| 1857 | case MPI2_SGE_FLAGS_SIMPLE_ELEMENT: |
| 1858 | /* Driver only uses 64-bit SGE simple elements */ |
| 1859 | sge = sgep; |
| 1860 | if (len != MPS_SGE64_SIZE) |
| 1861 | panic("SGE simple %p length %u or %zu?", sge, |
| 1862 | MPS_SGE64_SIZE, len); |
| 1863 | if (((sge->FlagsLength >> MPI2_SGE_FLAGS_SHIFT) & |
| 1864 | MPI2_SGE_FLAGS_ADDRESS_SIZE) == 0) |
| 1865 | panic("SGE simple %p flags %02x not marked 64-bit?", |
| 1866 | sge, (u_int)(sge->FlagsLength >> MPI2_SGE_FLAGS_SHIFT)); |
| 1867 | |
| 1868 | break; |
| 1869 | default: |
| 1870 | panic("Unexpected SGE %p, flags %02x", tc, tc->Flags); |
| 1871 | } |
| 1872 | #endif |
| 1873 | |
| 1874 | /* |
| 1875 | * case 1: 1 more segment, enough room for it |
| 1876 | * case 2: 2 more segments, enough room for both |
| 1877 | * case 3: >=2 more segments, only enough room for 1 and a chain |
| 1878 | * case 4: >=1 more segment, enough room for only a chain |
| 1879 | * case 5: >=1 more segment, no room for anything (error) |
| 1880 | */ |
| 1881 | |
| 1882 | /* |
| 1883 | * There should be room for at least a chain element, or this |
| 1884 | * code is buggy. Case (5). |
| 1885 | */ |
| 1886 | if (cm->cm_sglsize < MPS_SGC_SIZE) |
| 1887 | panic("MPS: Need SGE Error Code\n"); |
| 1888 | |
| 1889 | if (segsleft >= 2 && |
| 1890 | cm->cm_sglsize < len + MPS_SGC_SIZE + MPS_SGE64_SIZE) { |
| 1891 | /* |
| 1892 | * There are 2 or more segments left to add, and only |
| 1893 | * enough room for 1 and a chain. Case (3). |
| 1894 | * |
| 1895 | * Mark as last element in this chain if necessary. |
| 1896 | */ |
| 1897 | if (type == MPI2_SGE_FLAGS_SIMPLE_ELEMENT) { |
| 1898 | sge->FlagsLength |= |
| 1899 | (MPI2_SGE_FLAGS_LAST_ELEMENT << MPI2_SGE_FLAGS_SHIFT); |
| 1900 | } |
| 1901 | |
| 1902 | /* |
| 1903 | * Add the item then a chain. Do the chain now, |
| 1904 | * rather than on the next iteration, to simplify |
| 1905 | * understanding the code. |
| 1906 | */ |
| 1907 | cm->cm_sglsize -= len; |
| 1908 | bcopy(sgep, cm->cm_sge, len); |
| 1909 | cm->cm_sge = (MPI2_SGE_IO_UNION *)((uintptr_t)cm->cm_sge + len); |
| 1910 | return (mps_add_chain(cm)); |
| 1911 | } |
| 1912 | |
| 1913 | if (segsleft >= 1 && cm->cm_sglsize < len + MPS_SGC_SIZE) { |
| 1914 | /* |
| 1915 | * 1 or more segment, enough room for only a chain. |
| 1916 | * Hope the previous element wasn't a Simple entry |
| 1917 | * that needed to be marked with |
| 1918 | * MPI2_SGE_FLAGS_LAST_ELEMENT. Case (4). |
| 1919 | */ |
| 1920 | if ((error = mps_add_chain(cm)) != 0) |
| 1921 | return (error); |
| 1922 | } |
| 1923 | |
| 1924 | #ifdef INVARIANTS |
| 1925 | /* Case 1: 1 more segment, enough room for it. */ |
| 1926 | if (segsleft == 1 && cm->cm_sglsize < len) |
| 1927 | panic("1 seg left and no room? %u versus %zu", |
| 1928 | cm->cm_sglsize, len); |
| 1929 | |
| 1930 | /* Case 2: 2 more segments, enough room for both */ |
| 1931 | if (segsleft == 2 && cm->cm_sglsize < len + MPS_SGE64_SIZE) |
| 1932 | panic("2 segs left and no room? %u versus %zu", |
| 1933 | cm->cm_sglsize, len); |
| 1934 | #endif |
| 1935 | |
| 1936 | if (segsleft == 1 && type == MPI2_SGE_FLAGS_SIMPLE_ELEMENT) { |
| 1937 | /* |
| 1938 | * If this is a bi-directional request, need to account for that |
| 1939 | * here. Save the pre-filled sge values. These will be used |
| 1940 | * either for the 2nd SGL or for a single direction SGL. If |
| 1941 | * cm_out_len is non-zero, this is a bi-directional request, so |
| 1942 | * fill in the OUT SGL first, then the IN SGL, otherwise just |
| 1943 | * fill in the IN SGL. Note that at this time, when filling in |
| 1944 | * 2 SGL's for a bi-directional request, they both use the same |
| 1945 | * DMA buffer (same cm command). |
| 1946 | */ |
| 1947 | saved_buf_len = sge->FlagsLength & 0x00FFFFFF; |
| 1948 | saved_address_low = sge->Address.Low; |
| 1949 | saved_address_high = sge->Address.High; |
| 1950 | if (cm->cm_out_len) { |
| 1951 | sge->FlagsLength = cm->cm_out_len | |
| 1952 | ((uint32_t)(MPI2_SGE_FLAGS_SIMPLE_ELEMENT | |
| 1953 | MPI2_SGE_FLAGS_END_OF_BUFFER | |
| 1954 | MPI2_SGE_FLAGS_HOST_TO_IOC | |
| 1955 | MPI2_SGE_FLAGS_64_BIT_ADDRESSING) << |
| 1956 | MPI2_SGE_FLAGS_SHIFT); |
| 1957 | cm->cm_sglsize -= len; |
| 1958 | bcopy(sgep, cm->cm_sge, len); |
| 1959 | cm->cm_sge = (MPI2_SGE_IO_UNION *)((uintptr_t)cm->cm_sge |
| 1960 | + len); |
| 1961 | } |
| 1962 | sge->FlagsLength = saved_buf_len | |
| 1963 | ((uint32_t)(MPI2_SGE_FLAGS_SIMPLE_ELEMENT | |
| 1964 | MPI2_SGE_FLAGS_END_OF_BUFFER | |
| 1965 | MPI2_SGE_FLAGS_LAST_ELEMENT | |
| 1966 | MPI2_SGE_FLAGS_END_OF_LIST | |
| 1967 | MPI2_SGE_FLAGS_64_BIT_ADDRESSING) << |
| 1968 | MPI2_SGE_FLAGS_SHIFT); |
| 1969 | if (cm->cm_flags & MPS_CM_FLAGS_DATAIN) { |
| 1970 | sge->FlagsLength |= |
| 1971 | ((uint32_t)(MPI2_SGE_FLAGS_IOC_TO_HOST) << |
| 1972 | MPI2_SGE_FLAGS_SHIFT); |
| 1973 | } else { |
| 1974 | sge->FlagsLength |= |
| 1975 | ((uint32_t)(MPI2_SGE_FLAGS_HOST_TO_IOC) << |
| 1976 | MPI2_SGE_FLAGS_SHIFT); |
| 1977 | } |
| 1978 | sge->Address.Low = saved_address_low; |
| 1979 | sge->Address.High = saved_address_high; |
| 1980 | } |
| 1981 | |
| 1982 | cm->cm_sglsize -= len; |
| 1983 | bcopy(sgep, cm->cm_sge, len); |
| 1984 | cm->cm_sge = (MPI2_SGE_IO_UNION *)((uintptr_t)cm->cm_sge + len); |
| 1985 | return (0); |
| 1986 | } |
| 1987 | |
| 1988 | /* |
| 1989 | * Add one dma segment to the scatter-gather list for a command. |
| 1990 | */ |
| 1991 | int |
| 1992 | mps_add_dmaseg(struct mps_command *cm, vm_paddr_t pa, size_t len, u_int flags, |
| 1993 | int segsleft) |
| 1994 | { |
| 1995 | MPI2_SGE_SIMPLE64 sge; |
| 1996 | |
| 1997 | /* |
| 1998 | * This driver always uses 64-bit address elements for simplicity. |
| 1999 | */ |
| 2000 | flags |= MPI2_SGE_FLAGS_SIMPLE_ELEMENT | |
| 2001 | MPI2_SGE_FLAGS_64_BIT_ADDRESSING; |
| 2002 | sge.FlagsLength = len | (flags << MPI2_SGE_FLAGS_SHIFT); |
| 2003 | mps_from_u64(pa, &sge.Address); |
| 2004 | |
| 2005 | return (mps_push_sge(cm, &sge, sizeof sge, segsleft)); |
| 2006 | } |
| 2007 | |
| 2008 | static void |
| 2009 | mps_data_cb(void *arg, bus_dma_segment_t *segs, int nsegs, int error) |
| 2010 | { |
| 2011 | struct mps_softc *sc; |
| 2012 | struct mps_command *cm; |
| 2013 | u_int i, dir, sflags; |
| 2014 | |
| 2015 | cm = (struct mps_command *)arg; |
| 2016 | sc = cm->cm_sc; |
| 2017 | |
| 2018 | /* |
| 2019 | * In this case, just print out a warning and let the chip tell the |
| 2020 | * user they did the wrong thing. |
| 2021 | */ |
| 2022 | if ((cm->cm_max_segs != 0) && (nsegs > cm->cm_max_segs)) { |
| 2023 | mps_printf(sc, "%s: warning: busdma returned %d segments, " |
| 2024 | "more than the %d allowed\n", __func__, nsegs, |
| 2025 | cm->cm_max_segs); |
| 2026 | } |
| 2027 | |
| 2028 | /* |
| 2029 | * Set up DMA direction flags. Bi-directional requests are also handled |
| 2030 | * here. In that case, both direction flags will be set. |
| 2031 | */ |
| 2032 | sflags = 0; |
| 2033 | if (cm->cm_flags & MPS_CM_FLAGS_SMP_PASS) { |
| 2034 | /* |
| 2035 | * We have to add a special case for SMP passthrough, there |
| 2036 | * is no easy way to generically handle it. The first |
| 2037 | * S/G element is used for the command (therefore the |
| 2038 | * direction bit needs to be set). The second one is used |
| 2039 | * for the reply. We'll leave it to the caller to make |
| 2040 | * sure we only have two buffers. |
| 2041 | */ |
| 2042 | /* |
| 2043 | * Even though the busdma man page says it doesn't make |
| 2044 | * sense to have both direction flags, it does in this case. |
| 2045 | * We have one s/g element being accessed in each direction. |
| 2046 | */ |
| 2047 | dir = BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD; |
| 2048 | |
| 2049 | /* |
| 2050 | * Set the direction flag on the first buffer in the SMP |
| 2051 | * passthrough request. We'll clear it for the second one. |
| 2052 | */ |
| 2053 | sflags |= MPI2_SGE_FLAGS_DIRECTION | |
| 2054 | MPI2_SGE_FLAGS_END_OF_BUFFER; |
| 2055 | } else if (cm->cm_flags & MPS_CM_FLAGS_DATAOUT) { |
| 2056 | sflags |= MPI2_SGE_FLAGS_HOST_TO_IOC; |
| 2057 | dir = BUS_DMASYNC_PREWRITE; |
| 2058 | } else |
| 2059 | dir = BUS_DMASYNC_PREREAD; |
| 2060 | |
| 2061 | for (i = 0; i < nsegs; i++) { |
| 2062 | if ((cm->cm_flags & MPS_CM_FLAGS_SMP_PASS) && (i != 0)) { |
| 2063 | sflags &= ~MPI2_SGE_FLAGS_DIRECTION; |
| 2064 | } |
| 2065 | error = mps_add_dmaseg(cm, segs[i].ds_addr, segs[i].ds_len, |
| 2066 | sflags, nsegs - i); |
| 2067 | if (error != 0) { |
| 2068 | /* Resource shortage, roll back! */ |
| 2069 | mps_dprint(sc, MPS_INFO, "out of chain frames\n"); |
| 2070 | cm->cm_flags |= MPS_CM_FLAGS_CHAIN_FAILED; |
| 2071 | mps_complete_command(cm); |
| 2072 | return; |
| 2073 | } |
| 2074 | } |
| 2075 | |
| 2076 | bus_dmamap_sync(sc->buffer_dmat, cm->cm_dmamap, dir); |
| 2077 | mps_enqueue_request(sc, cm); |
| 2078 | |
| 2079 | return; |
| 2080 | } |
| 2081 | |
| 2082 | static void |
| 2083 | mps_data_cb2(void *arg, bus_dma_segment_t *segs, int nsegs, bus_size_t mapsize, |
| 2084 | int error) |
| 2085 | { |
| 2086 | mps_data_cb(arg, segs, nsegs, error); |
| 2087 | } |
| 2088 | |
| 2089 | /* |
| 2090 | * This is the routine to enqueue commands ansynchronously. |
| 2091 | * Note that the only error path here is from bus_dmamap_load(), which can |
| 2092 | * return EINPROGRESS if it is waiting for resources. Other than this, it's |
| 2093 | * assumed that if you have a command in-hand, then you have enough credits |
| 2094 | * to use it. |
| 2095 | */ |
| 2096 | int |
| 2097 | mps_map_command(struct mps_softc *sc, struct mps_command *cm) |
| 2098 | { |
| 2099 | MPI2_SGE_SIMPLE32 *sge; |
| 2100 | int error = 0; |
| 2101 | |
| 2102 | if (cm->cm_flags & MPS_CM_FLAGS_USE_UIO) { |
| 2103 | error = bus_dmamap_load_uio(sc->buffer_dmat, cm->cm_dmamap, |
| 2104 | &cm->cm_uio, mps_data_cb2, cm, 0); |
| 2105 | } else if ((cm->cm_data != NULL) && (cm->cm_length != 0)) { |
| 2106 | error = bus_dmamap_load(sc->buffer_dmat, cm->cm_dmamap, |
| 2107 | cm->cm_data, cm->cm_length, mps_data_cb, cm, 0); |
| 2108 | } else { |
| 2109 | /* Add a zero-length element as needed */ |
| 2110 | if (cm->cm_sge != NULL) { |
| 2111 | sge = (MPI2_SGE_SIMPLE32 *)cm->cm_sge; |
| 2112 | sge->FlagsLength = (MPI2_SGE_FLAGS_LAST_ELEMENT | |
| 2113 | MPI2_SGE_FLAGS_END_OF_BUFFER | |
| 2114 | MPI2_SGE_FLAGS_END_OF_LIST | |
| 2115 | MPI2_SGE_FLAGS_SIMPLE_ELEMENT) << |
| 2116 | MPI2_SGE_FLAGS_SHIFT; |
| 2117 | sge->Address = 0; |
| 2118 | } |
| 2119 | mps_enqueue_request(sc, cm); |
| 2120 | } |
| 2121 | |
| 2122 | return (error); |
| 2123 | } |
| 2124 | |
| 2125 | /* |
| 2126 | * This is the routine to enqueue commands synchronously. An error of |
| 2127 | * EINPROGRESS from mps_map_command() is ignored since the command will |
| 2128 | * be executed and enqueued automatically. Other errors come from msleep(). |
| 2129 | */ |
| 2130 | int |
| 2131 | mps_wait_command(struct mps_softc *sc, struct mps_command *cm, int timeout) |
| 2132 | { |
| 2133 | int error; |
| 2134 | |
| 2135 | KKASSERT(lockstatus(&sc->mps_lock, curthread) != 0); |
| 2136 | |
| 2137 | cm->cm_complete = NULL; |
| 2138 | cm->cm_flags |= MPS_CM_FLAGS_WAKEUP; |
| 2139 | error = mps_map_command(sc, cm); |
| 2140 | if ((error != 0) && (error != EINPROGRESS)) |
| 2141 | return (error); |
| 2142 | error = lksleep(cm, &sc->mps_lock, 0, "mpswait", timeout); |
| 2143 | if (error == EWOULDBLOCK) |
| 2144 | error = ETIMEDOUT; |
| 2145 | return (error); |
| 2146 | } |
| 2147 | |
| 2148 | /* |
| 2149 | * This is the routine to enqueue a command synchonously and poll for |
| 2150 | * completion. Its use should be rare. |
| 2151 | */ |
| 2152 | int |
| 2153 | mps_request_polled(struct mps_softc *sc, struct mps_command *cm) |
| 2154 | { |
| 2155 | int error, timeout = 0; |
| 2156 | |
| 2157 | error = 0; |
| 2158 | |
| 2159 | cm->cm_flags |= MPS_CM_FLAGS_POLLED; |
| 2160 | cm->cm_complete = NULL; |
| 2161 | mps_map_command(sc, cm); |
| 2162 | |
| 2163 | while ((cm->cm_flags & MPS_CM_FLAGS_COMPLETE) == 0) { |
| 2164 | mps_intr_locked(sc); |
| 2165 | DELAY(50 * 1000); |
| 2166 | if (timeout++ > 1000) { |
| 2167 | mps_dprint(sc, MPS_FAULT, "polling failed\n"); |
| 2168 | error = ETIMEDOUT; |
| 2169 | break; |
| 2170 | } |
| 2171 | } |
| 2172 | |
| 2173 | return (error); |
| 2174 | } |
| 2175 | |
| 2176 | /* |
| 2177 | * The MPT driver had a verbose interface for config pages. In this driver, |
| 2178 | * reduce it to much simplier terms, similar to the Linux driver. |
| 2179 | */ |
| 2180 | int |
| 2181 | mps_read_config_page(struct mps_softc *sc, struct mps_config_params *params) |
| 2182 | { |
| 2183 | MPI2_CONFIG_REQUEST *req; |
| 2184 | struct mps_command *cm; |
| 2185 | int error; |
| 2186 | |
| 2187 | if (sc->mps_flags & MPS_FLAGS_BUSY) { |
| 2188 | return (EBUSY); |
| 2189 | } |
| 2190 | |
| 2191 | cm = mps_alloc_command(sc); |
| 2192 | if (cm == NULL) { |
| 2193 | return (EBUSY); |
| 2194 | } |
| 2195 | |
| 2196 | req = (MPI2_CONFIG_REQUEST *)cm->cm_req; |
| 2197 | req->Function = MPI2_FUNCTION_CONFIG; |
| 2198 | req->Action = params->action; |
| 2199 | req->SGLFlags = 0; |
| 2200 | req->ChainOffset = 0; |
| 2201 | req->PageAddress = params->page_address; |
| 2202 | if (params->hdr.Ext.ExtPageType != 0) { |
| 2203 | MPI2_CONFIG_EXTENDED_PAGE_HEADER *hdr; |
| 2204 | |
| 2205 | hdr = ¶ms->hdr.Ext; |
| 2206 | req->ExtPageType = hdr->ExtPageType; |
| 2207 | req->ExtPageLength = hdr->ExtPageLength; |
| 2208 | req->Header.PageType = MPI2_CONFIG_PAGETYPE_EXTENDED; |
| 2209 | req->Header.PageLength = 0; /* Must be set to zero */ |
| 2210 | req->Header.PageNumber = hdr->PageNumber; |
| 2211 | req->Header.PageVersion = hdr->PageVersion; |
| 2212 | } else { |
| 2213 | MPI2_CONFIG_PAGE_HEADER *hdr; |
| 2214 | |
| 2215 | hdr = ¶ms->hdr.Struct; |
| 2216 | req->Header.PageType = hdr->PageType; |
| 2217 | req->Header.PageNumber = hdr->PageNumber; |
| 2218 | req->Header.PageLength = hdr->PageLength; |
| 2219 | req->Header.PageVersion = hdr->PageVersion; |
| 2220 | } |
| 2221 | |
| 2222 | cm->cm_data = params->buffer; |
| 2223 | cm->cm_length = params->length; |
| 2224 | cm->cm_sge = &req->PageBufferSGE; |
| 2225 | cm->cm_sglsize = sizeof(MPI2_SGE_IO_UNION); |
| 2226 | cm->cm_flags = MPS_CM_FLAGS_SGE_SIMPLE | MPS_CM_FLAGS_DATAIN; |
| 2227 | cm->cm_desc.Default.RequestFlags = MPI2_REQ_DESCRIPT_FLAGS_DEFAULT_TYPE; |
| 2228 | |
| 2229 | cm->cm_complete_data = params; |
| 2230 | if (params->callback != NULL) { |
| 2231 | cm->cm_complete = mps_config_complete; |
| 2232 | return (mps_map_command(sc, cm)); |
| 2233 | } else { |
| 2234 | error = mps_wait_command(sc, cm, 0); |
| 2235 | if (error) { |
| 2236 | mps_dprint(sc, MPS_FAULT, |
| 2237 | "Error %d reading config page\n", error); |
| 2238 | mps_free_command(sc, cm); |
| 2239 | return (error); |
| 2240 | } |
| 2241 | mps_config_complete(sc, cm); |
| 2242 | } |
| 2243 | |
| 2244 | return (0); |
| 2245 | } |
| 2246 | |
| 2247 | int |
| 2248 | mps_write_config_page(struct mps_softc *sc, struct mps_config_params *params) |
| 2249 | { |
| 2250 | return (EINVAL); |
| 2251 | } |
| 2252 | |
| 2253 | static void |
| 2254 | mps_config_complete(struct mps_softc *sc, struct mps_command *cm) |
| 2255 | { |
| 2256 | MPI2_CONFIG_REPLY *reply; |
| 2257 | struct mps_config_params *params; |
| 2258 | |
| 2259 | params = cm->cm_complete_data; |
| 2260 | |
| 2261 | if (cm->cm_data != NULL) { |
| 2262 | bus_dmamap_sync(sc->buffer_dmat, cm->cm_dmamap, |
| 2263 | BUS_DMASYNC_POSTREAD); |
| 2264 | bus_dmamap_unload(sc->buffer_dmat, cm->cm_dmamap); |
| 2265 | } |
| 2266 | |
| 2267 | /* |
| 2268 | * XXX KDM need to do more error recovery? This results in the |
| 2269 | * device in question not getting probed. |
| 2270 | */ |
| 2271 | if ((cm->cm_flags & MPS_CM_FLAGS_ERROR_MASK) != 0) { |
| 2272 | params->status = MPI2_IOCSTATUS_BUSY; |
| 2273 | goto done; |
| 2274 | } |
| 2275 | |
| 2276 | reply = (MPI2_CONFIG_REPLY *)cm->cm_reply; |
| 2277 | if (reply == NULL) { |
| 2278 | params->status = MPI2_IOCSTATUS_BUSY; |
| 2279 | goto done; |
| 2280 | } |
| 2281 | params->status = reply->IOCStatus; |
| 2282 | if (params->hdr.Ext.ExtPageType != 0) { |
| 2283 | params->hdr.Ext.ExtPageType = reply->ExtPageType; |
| 2284 | params->hdr.Ext.ExtPageLength = reply->ExtPageLength; |
| 2285 | } else { |
| 2286 | params->hdr.Struct.PageType = reply->Header.PageType; |
| 2287 | params->hdr.Struct.PageNumber = reply->Header.PageNumber; |
| 2288 | params->hdr.Struct.PageLength = reply->Header.PageLength; |
| 2289 | params->hdr.Struct.PageVersion = reply->Header.PageVersion; |
| 2290 | } |
| 2291 | |
| 2292 | done: |
| 2293 | mps_free_command(sc, cm); |
| 2294 | if (params->callback != NULL) |
| 2295 | params->callback(sc, params); |
| 2296 | |
| 2297 | return; |
| 2298 | } |