| 1 | /*- |
| 2 | * Copyright (c) 1995, 1996 Matt Thomas <matt@3am-software.com> |
| 3 | * All rights reserved. |
| 4 | * |
| 5 | * Redistribution and use in source and binary forms, with or without |
| 6 | * modification, are permitted provided that the following conditions |
| 7 | * are met: |
| 8 | * 1. Redistributions of source code must retain the above copyright |
| 9 | * notice, this list of conditions and the following disclaimer. |
| 10 | * 2. The name of the author may not be used to endorse or promote products |
| 11 | * derived from this software withough specific prior written permission |
| 12 | * |
| 13 | * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR |
| 14 | * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES |
| 15 | * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. |
| 16 | * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, |
| 17 | * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT |
| 18 | * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, |
| 19 | * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY |
| 20 | * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT |
| 21 | * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF |
| 22 | * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
| 23 | * |
| 24 | * $FreeBSD: src/sys/dev/pdq/if_fea.c,v 1.19 2000/01/14 07:14:03 peter Exp $ |
| 25 | * $DragonFly: src/sys/dev/netif/fea/Attic/if_fea.c,v 1.10 2005/11/28 17:13:42 dillon Exp $ |
| 26 | */ |
| 27 | |
| 28 | /* |
| 29 | * DEC PDQ FDDI Controller |
| 30 | * |
| 31 | * This module support the DEFEA EISA FDDI Controller. |
| 32 | */ |
| 33 | |
| 34 | #include <sys/param.h> |
| 35 | #include <sys/systm.h> |
| 36 | #include <sys/kernel.h> |
| 37 | #include <sys/socket.h> |
| 38 | #include <sys/serialize.h> |
| 39 | |
| 40 | #include <net/if.h> |
| 41 | #include <net/if_arp.h> |
| 42 | |
| 43 | #include <sys/module.h> |
| 44 | #include <sys/bus.h> |
| 45 | #include <machine/bus.h> |
| 46 | #include <machine/resource.h> |
| 47 | #include <sys/rman.h> |
| 48 | #include <bus/eisa/eisaconf.h> |
| 49 | #include <dev/netif/pdq_layer/pdqvar.h> |
| 50 | #include <dev/netif/pdq_layer/pdqreg.h> |
| 51 | |
| 52 | static void pdq_eisa_subprobe (pdq_bus_t, u_int32_t, u_int32_t *, u_int32_t *, u_int32_t *); |
| 53 | static void pdq_eisa_devinit (pdq_softc_t *); |
| 54 | static const char * pdq_eisa_match (eisa_id_t); |
| 55 | static int pdq_eisa_probe (device_t); |
| 56 | static int pdq_eisa_attach (device_t); |
| 57 | void pdq_eisa_intr (void *); |
| 58 | static int pdq_eisa_shutdown (device_t); |
| 59 | |
| 60 | #define DEFEA_IRQS 0x0000FBA9U |
| 61 | |
| 62 | #define DEFEA_INTRENABLE 0x8 /* level interrupt */ |
| 63 | #define DEFEA_DECODE_IRQ(n) ((DEFEA_IRQS >> ((n) << 2)) & 0x0f) |
| 64 | |
| 65 | #define EISA_DEVICE_ID_DEC_DEC3001 0x10a33001 |
| 66 | #define EISA_DEVICE_ID_DEC_DEC3002 0x10a33002 |
| 67 | #define EISA_DEVICE_ID_DEC_DEC3003 0x10a33003 |
| 68 | #define EISA_DEVICE_ID_DEC_DEC3004 0x10a33004 |
| 69 | |
| 70 | static void |
| 71 | pdq_eisa_subprobe(bc, iobase, maddr, msize, irq) |
| 72 | pdq_bus_t bc; |
| 73 | u_int32_t iobase; |
| 74 | u_int32_t *maddr; |
| 75 | u_int32_t *msize; |
| 76 | u_int32_t *irq; |
| 77 | { |
| 78 | if (irq != NULL) |
| 79 | *irq = DEFEA_DECODE_IRQ(PDQ_OS_IORD_8(bc, iobase, PDQ_EISA_IO_CONFIG_STAT_0) & 3); |
| 80 | *maddr = (PDQ_OS_IORD_8(bc, iobase, PDQ_EISA_MEM_ADD_CMP_0) << 8) |
| 81 | | (PDQ_OS_IORD_8(bc, iobase, PDQ_EISA_MEM_ADD_CMP_1) << 16); |
| 82 | *msize = (PDQ_OS_IORD_8(bc, iobase, PDQ_EISA_MEM_ADD_MASK_0) + 4) << 8; |
| 83 | |
| 84 | return; |
| 85 | } |
| 86 | |
| 87 | static void |
| 88 | pdq_eisa_devinit (sc) |
| 89 | pdq_softc_t *sc; |
| 90 | { |
| 91 | pdq_uint8_t data; |
| 92 | |
| 93 | /* |
| 94 | * Do the standard initialization for the DEFEA registers. |
| 95 | */ |
| 96 | PDQ_OS_IOWR_8(sc->sc_bc, sc->sc_iobase, PDQ_EISA_FUNCTION_CTRL, 0x23); |
| 97 | PDQ_OS_IOWR_8(sc->sc_bc, sc->sc_iobase, PDQ_EISA_IO_CMP_1_1, (sc->sc_iobase >> 8) & 0xF0); |
| 98 | PDQ_OS_IOWR_8(sc->sc_bc, sc->sc_iobase, PDQ_EISA_IO_CMP_0_1, (sc->sc_iobase >> 8) & 0xF0); |
| 99 | PDQ_OS_IOWR_8(sc->sc_bc, sc->sc_iobase, PDQ_EISA_SLOT_CTRL, 0x01); |
| 100 | data = PDQ_OS_IORD_8(sc->sc_bc, sc->sc_iobase, PDQ_EISA_BURST_HOLDOFF); |
| 101 | #if defined(PDQ_IOMAPPED) |
| 102 | PDQ_OS_IOWR_8(sc->sc_bc, sc->sc_iobase, PDQ_EISA_BURST_HOLDOFF, data & ~1); |
| 103 | #else |
| 104 | PDQ_OS_IOWR_8(sc->sc_bc, sc->sc_iobase, PDQ_EISA_BURST_HOLDOFF, data | 1); |
| 105 | #endif |
| 106 | data = PDQ_OS_IORD_8(sc->sc_bc, sc->sc_iobase, PDQ_EISA_IO_CONFIG_STAT_0); |
| 107 | PDQ_OS_IOWR_8(sc->sc_bc, sc->sc_iobase, PDQ_EISA_IO_CONFIG_STAT_0, data | DEFEA_INTRENABLE); |
| 108 | |
| 109 | return; |
| 110 | } |
| 111 | |
| 112 | static const char * |
| 113 | pdq_eisa_match (type) |
| 114 | eisa_id_t type; |
| 115 | { |
| 116 | switch (type) { |
| 117 | case EISA_DEVICE_ID_DEC_DEC3001: |
| 118 | case EISA_DEVICE_ID_DEC_DEC3002: |
| 119 | case EISA_DEVICE_ID_DEC_DEC3003: |
| 120 | case EISA_DEVICE_ID_DEC_DEC3004: |
| 121 | return ("DEC FDDIcontroller/EISA Adapter"); |
| 122 | break; |
| 123 | default: |
| 124 | break; |
| 125 | } |
| 126 | return (NULL); |
| 127 | } |
| 128 | |
| 129 | static int |
| 130 | pdq_eisa_probe (dev) |
| 131 | device_t dev; |
| 132 | { |
| 133 | const char *desc; |
| 134 | u_int32_t iobase; |
| 135 | u_int32_t irq; |
| 136 | u_int32_t maddr; |
| 137 | u_int32_t msize; |
| 138 | |
| 139 | u_int32_t eisa_id = eisa_get_id(dev);; |
| 140 | |
| 141 | desc = pdq_eisa_match(eisa_id); |
| 142 | if (!desc) { |
| 143 | return (ENXIO); |
| 144 | } |
| 145 | |
| 146 | device_set_desc(dev, desc); |
| 147 | |
| 148 | iobase = eisa_get_slot(dev) * EISA_SLOT_SIZE; |
| 149 | pdq_eisa_subprobe(PDQ_BUS_EISA, iobase, &maddr, &msize, &irq); |
| 150 | |
| 151 | eisa_add_iospace(dev, iobase, 0x200, RESVADDR_NONE); |
| 152 | eisa_add_mspace(dev, maddr, msize, RESVADDR_NONE); |
| 153 | eisa_add_intr(dev, irq, EISA_TRIGGER_LEVEL); |
| 154 | |
| 155 | return (0); |
| 156 | } |
| 157 | |
| 158 | void |
| 159 | pdq_eisa_intr(xdev) |
| 160 | void *xdev; |
| 161 | { |
| 162 | device_t dev = (device_t) xdev; |
| 163 | pdq_softc_t *sc = device_get_softc(dev); |
| 164 | (void) pdq_interrupt(sc->sc_pdq); |
| 165 | |
| 166 | return; |
| 167 | } |
| 168 | |
| 169 | static int |
| 170 | pdq_eisa_attach (dev) |
| 171 | device_t dev; |
| 172 | { |
| 173 | pdq_softc_t *sc = device_get_softc(dev); |
| 174 | struct resource *io = 0; |
| 175 | struct resource *irq = 0; |
| 176 | struct resource *mspace = 0; |
| 177 | int rid; |
| 178 | void *ih; |
| 179 | u_int32_t m_addr, m_size; |
| 180 | |
| 181 | rid = 0; |
| 182 | io = bus_alloc_resource_any(dev, SYS_RES_IOPORT, &rid, RF_ACTIVE); |
| 183 | |
| 184 | if (!io) { |
| 185 | device_printf(dev, "No I/O space?!\n"); |
| 186 | goto bad; |
| 187 | } |
| 188 | |
| 189 | rid = 0; |
| 190 | mspace = bus_alloc_resource_any(dev, SYS_RES_MEMORY, &rid, RF_ACTIVE); |
| 191 | |
| 192 | if (!mspace) { |
| 193 | device_printf(dev, "No memory space?!\n"); |
| 194 | goto bad; |
| 195 | } |
| 196 | |
| 197 | rid = 0; |
| 198 | irq = bus_alloc_resource_any(dev, SYS_RES_IRQ, &rid, RF_ACTIVE); |
| 199 | |
| 200 | if (!irq) { |
| 201 | device_printf(dev, "No, irq?!\n"); |
| 202 | goto bad; |
| 203 | } |
| 204 | |
| 205 | m_addr = rman_get_start(mspace); |
| 206 | m_size = (rman_get_end(mspace) - rman_get_start(mspace)) + 1; |
| 207 | |
| 208 | sc->sc_iobase = (pdq_bus_ioport_t) rman_get_start(io); |
| 209 | sc->sc_membase = (pdq_bus_memaddr_t) pmap_mapdev(m_addr, m_size); |
| 210 | if_initname(&(sc->sc_if), "fea", device_get_unit(dev)); |
| 211 | |
| 212 | pdq_eisa_devinit(sc); |
| 213 | sc->sc_pdq = pdq_initialize(PDQ_BUS_EISA, sc->sc_membase, |
| 214 | sc->sc_if.if_dname, sc->sc_if.if_dunit, |
| 215 | (void *) sc, PDQ_DEFEA); |
| 216 | if (sc->sc_pdq == NULL) { |
| 217 | device_printf(dev, "initialization failed\n"); |
| 218 | goto bad; |
| 219 | } |
| 220 | |
| 221 | pdq_ifattach(sc, NULL); |
| 222 | |
| 223 | if (bus_setup_intr(dev, irq, INTR_NETSAFE, |
| 224 | pdq_eisa_intr, dev, &ih, |
| 225 | sc->sc_if.if_serializer) |
| 226 | ) { |
| 227 | goto bad; |
| 228 | } |
| 229 | |
| 230 | bcopy((caddr_t) sc->sc_pdq->pdq_hwaddr.lanaddr_bytes, sc->sc_ac.ac_enaddr, 6); |
| 231 | |
| 232 | return (0); |
| 233 | |
| 234 | bad: |
| 235 | if (io) |
| 236 | bus_release_resource(dev, SYS_RES_IOPORT, 0, io); |
| 237 | if (irq) |
| 238 | bus_release_resource(dev, SYS_RES_IRQ, 0, irq); |
| 239 | if (mspace) |
| 240 | bus_release_resource(dev, SYS_RES_MEMORY, 0, mspace); |
| 241 | |
| 242 | return (-1); |
| 243 | } |
| 244 | |
| 245 | static int |
| 246 | pdq_eisa_shutdown(dev) |
| 247 | device_t dev; |
| 248 | { |
| 249 | pdq_softc_t *sc = device_get_softc(dev); |
| 250 | |
| 251 | lwkt_serialize_enter(sc->sc_if.if_serializer); |
| 252 | pdq_hwreset(sc->sc_pdq); |
| 253 | lwkt_serialize_exit(sc->sc_if.if_serializer); |
| 254 | |
| 255 | return (0); |
| 256 | } |
| 257 | |
| 258 | static device_method_t pdq_eisa_methods[] = { |
| 259 | DEVMETHOD(device_probe, pdq_eisa_probe), |
| 260 | DEVMETHOD(device_attach, pdq_eisa_attach), |
| 261 | DEVMETHOD(device_shutdown, pdq_eisa_shutdown), |
| 262 | |
| 263 | { 0, 0 } |
| 264 | }; |
| 265 | |
| 266 | static driver_t pdq_eisa_driver = { |
| 267 | "fea", |
| 268 | pdq_eisa_methods, |
| 269 | sizeof(pdq_softc_t), |
| 270 | }; |
| 271 | |
| 272 | static devclass_t pdq_devclass; |
| 273 | |
| 274 | DECLARE_DUMMY_MODULE(if_fea); |
| 275 | DRIVER_MODULE(if_pdq, eisa, pdq_eisa_driver, pdq_devclass, 0, 0); |
| 276 | |