| | 1 | /* |
| | 2 | * |
| | 3 | * =================================== |
| | 4 | * HARP | Host ATM Research Platform |
| | 5 | * =================================== |
| | 6 | * |
| | 7 | * |
| | 8 | * This Host ATM Research Platform ("HARP") file (the "Software") is |
| | 9 | * made available by Network Computing Services, Inc. ("NetworkCS") |
| | 10 | * "AS IS". NetworkCS does not provide maintenance, improvements or |
| | 11 | * support of any kind. |
| | 12 | * |
| | 13 | * NETWORKCS MAKES NO WARRANTIES OR REPRESENTATIONS, EXPRESS OR IMPLIED, |
| | 14 | * INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF MERCHANTABILITY |
| | 15 | * AND FITNESS FOR A PARTICULAR PURPOSE, AS TO ANY ELEMENT OF THE |
| | 16 | * SOFTWARE OR ANY SUPPORT PROVIDED IN CONNECTION WITH THIS SOFTWARE. |
| | 17 | * In no event shall NetworkCS be responsible for any damages, including |
| | 18 | * but not limited to consequential damages, arising from or relating to |
| | 19 | * any use of the Software or related support. |
| | 20 | * |
| | 21 | * Copyright 1994-1998 Network Computing Services, Inc. |
| | 22 | * |
| | 23 | * Copies of this Software may be made, however, the above copyright |
| | 24 | * notice must be reproduced on all copies. |
| | 25 | * |
| | 26 | * @(#) $FreeBSD: src/sys/dev/hea/eni_init.c,v 1.3 1999/08/28 00:41:44 peter Exp $ |
| | 27 | * @(#) $DragonFly: src/sys/dev/atm/hea/eni_init.c,v 1.4 2003/08/07 21:54:28 dillon Exp $ |
| | 28 | */ |
| | 29 | |
| | 30 | /* |
| | 31 | * Efficient ENI Adapter Support |
| | 32 | * ----------------------------- |
| | 33 | * |
| | 34 | * Driver initialization support |
| | 35 | * |
| | 36 | */ |
| | 37 | |
| | 38 | #include <netproto/atm/kern_include.h> |
| | 39 | |
| | 40 | #include "eni_stats.h" |
| | 41 | #include "eni.h" |
| | 42 | #include "eni_var.h" |
| | 43 | |
| | 44 | /* |
| | 45 | * Initialize adapter for PDU processing |
| | 46 | * |
| | 47 | * Enable interrupts, set master control, initialize TX buffer, |
| | 48 | * set initial pointers, etc. |
| | 49 | * |
| | 50 | * Arguments: |
| | 51 | * eup pointer to device unit structure |
| | 52 | * |
| | 53 | * Returns: |
| | 54 | * 0 successful |
| | 55 | * error error condition |
| | 56 | */ |
| | 57 | int |
| | 58 | eni_init ( eup ) |
| | 59 | Eni_unit *eup; |
| | 60 | { |
| | 61 | u_long words, order; |
| | 62 | |
| | 63 | /* |
| | 64 | * Allocate one large TX buffer. Currently we use only one |
| | 65 | * channel with full cell rate which all VCs will use. |
| | 66 | * This will (probably) have to change (alot) when we |
| | 67 | * implement QoS. |
| | 68 | */ |
| | 69 | /* |
| | 70 | * Server cards, which have more then 512KB of RAM, will |
| | 71 | * allocate a 128KB TX buffer, while client cards, with |
| | 72 | * 512KB or less will allocate a 32KB TX buffer. |
| | 73 | */ |
| | 74 | words = ( eup->eu_ramsize > MAX_CLIENT_RAM * ENI_BUF_PGSZ ? |
| | 75 | TX_LARGE_BSIZE : TX_SMALL_BSIZE ) * ENI_BUF_PGSZ; |
| | 76 | if ( ( eup->eu_txbuf = eni_allocate_buffer ( eup, &words ) ) == |
| | 77 | (caddr_t)NULL ) { |
| | 78 | return ENOMEM; |
| | 79 | } |
| | 80 | eup->eu_txsize = words >> 2; /* Bytes to words */ |
| | 81 | words >>= ENI_LOC_PREDIV; /* Predivide by 256 words */ |
| | 82 | for ( order = -1; words; order++ ) |
| | 83 | words >>= 1; |
| | 84 | eup->eu_midway[MIDWAY_TXPLACE] = |
| | 85 | (order << TXSIZE_SHIFT) | ((int)eup->eu_txbuf >> ENI_LOC_PREDIV); |
| | 86 | eup->eu_txpos = eup->eu_midway[MIDWAY_DESCR] & 0x7FFF; |
| | 87 | /* |
| | 88 | * Set first word of unack'ed data to start |
| | 89 | */ |
| | 90 | eup->eu_txfirst = eup->eu_txpos; |
| | 91 | |
| | 92 | /* |
| | 93 | * Set initial values of local DMA pointer used to prevent wraps |
| | 94 | */ |
| | 95 | eup->eu_txdmawr = 0; |
| | 96 | eup->eu_rxdmawr = 0; |
| | 97 | |
| | 98 | /* |
| | 99 | * Initialize queue's for receive/transmit pdus |
| | 100 | */ |
| | 101 | eup->eu_txqueue.ifq_maxlen = ENI_IFQ_MAXLEN; |
| | 102 | eup->eu_rxqueue.ifq_maxlen = ENI_IFQ_MAXLEN; |
| | 103 | |
| | 104 | /* |
| | 105 | * Acknowledge any interrupts |
| | 106 | */ |
| | 107 | (void) eup->eu_midway[MIDWAY_ISA]; |
| | 108 | |
| | 109 | /* |
| | 110 | * "Zero" Sonet error counters |
| | 111 | */ |
| | 112 | eni_zero_stats ( eup ); |
| | 113 | |
| | 114 | /* |
| | 115 | * Set master control register |
| | 116 | * |
| | 117 | * IntSel1 | LOCK_MODE | DMA_ENABLE | TX_ENABLE | RX_ENABLE |
| | 118 | * |
| | 119 | */ |
| | 120 | eup->eu_midway[MIDWAY_MASTER] = 1 << ENI_ISEL_SHIFT | |
| | 121 | ENI_M_DMAENABLE | ENI_M_TXENABLE | ENI_M_RXENABLE; |
| | 122 | |
| | 123 | /* |
| | 124 | * Enable interrupts |
| | 125 | */ |
| | 126 | eup->eu_midway[MIDWAY_IE] = ENI_INT_SERVICE | ENI_INT_RX_DMA | |
| | 127 | ENI_INT_TX_DMA | ENI_INT_DMA_ERR | ENI_INT_DMA_LERR | |
| | 128 | ENI_INT_IDEN | ENI_INT_DMA_OVFL; |
| | 129 | |
| | 130 | /* |
| | 131 | * Last thing to do is to indicate that we've finished initializing |
| | 132 | * this unit. |
| | 133 | */ |
| | 134 | eup->eu_flags |= CUF_INITED; |
| | 135 | |
| | 136 | return 0; |
| | 137 | } |
| | 138 | |
projects / dragonfly.git / blame_incremental