2 Copyright (C) 1988-2015 Free Software Foundation, Inc.
4 This file is part of GCC.
6 GCC is free software; you can redistribute it and/or modify
7 it under the terms of the GNU General Public License as published by
8 the Free Software Foundation; either version 3, or (at your option)
11 GCC is distributed in the hope that it will be useful,
12 but WITHOUT ANY WARRANTY; without even the implied warranty of
13 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 GNU General Public License for more details.
16 You should have received a copy of the GNU General Public License
17 along with GCC; see the file COPYING3. If not see
18 <http://www.gnu.org/licenses/>. */
22 #include "coretypes.h"
23 #include "diagnostic-core.h"
26 #include "common/common-target.h"
27 #include "common/common-target-def.h"
31 /* Define a set of ISAs which are available when a given ISA is
32 enabled. MMX and SSE ISAs are handled separately. */
34 #define OPTION_MASK_ISA_MMX_SET OPTION_MASK_ISA_MMX
35 #define OPTION_MASK_ISA_3DNOW_SET \
36 (OPTION_MASK_ISA_3DNOW | OPTION_MASK_ISA_MMX_SET)
38 #define OPTION_MASK_ISA_SSE_SET OPTION_MASK_ISA_SSE
39 #define OPTION_MASK_ISA_SSE2_SET \
40 (OPTION_MASK_ISA_SSE2 | OPTION_MASK_ISA_SSE_SET)
41 #define OPTION_MASK_ISA_SSE3_SET \
42 (OPTION_MASK_ISA_SSE3 | OPTION_MASK_ISA_SSE2_SET)
43 #define OPTION_MASK_ISA_SSSE3_SET \
44 (OPTION_MASK_ISA_SSSE3 | OPTION_MASK_ISA_SSE3_SET)
45 #define OPTION_MASK_ISA_SSE4_1_SET \
46 (OPTION_MASK_ISA_SSE4_1 | OPTION_MASK_ISA_SSSE3_SET)
47 #define OPTION_MASK_ISA_SSE4_2_SET \
48 (OPTION_MASK_ISA_SSE4_2 | OPTION_MASK_ISA_SSE4_1_SET)
49 #define OPTION_MASK_ISA_AVX_SET \
50 (OPTION_MASK_ISA_AVX | OPTION_MASK_ISA_SSE4_2_SET \
51 | OPTION_MASK_ISA_XSAVE_SET)
52 #define OPTION_MASK_ISA_FMA_SET \
53 (OPTION_MASK_ISA_FMA | OPTION_MASK_ISA_AVX_SET)
54 #define OPTION_MASK_ISA_AVX2_SET \
55 (OPTION_MASK_ISA_AVX2 | OPTION_MASK_ISA_AVX_SET)
56 #define OPTION_MASK_ISA_FXSR_SET OPTION_MASK_ISA_FXSR
57 #define OPTION_MASK_ISA_XSAVE_SET OPTION_MASK_ISA_XSAVE
58 #define OPTION_MASK_ISA_XSAVEOPT_SET \
59 (OPTION_MASK_ISA_XSAVEOPT | OPTION_MASK_ISA_XSAVE)
60 #define OPTION_MASK_ISA_AVX512F_SET \
61 (OPTION_MASK_ISA_AVX512F | OPTION_MASK_ISA_AVX2_SET)
62 #define OPTION_MASK_ISA_AVX512CD_SET \
63 (OPTION_MASK_ISA_AVX512CD | OPTION_MASK_ISA_AVX512F_SET)
64 #define OPTION_MASK_ISA_AVX512PF_SET \
65 (OPTION_MASK_ISA_AVX512PF | OPTION_MASK_ISA_AVX512F_SET)
66 #define OPTION_MASK_ISA_AVX512ER_SET \
67 (OPTION_MASK_ISA_AVX512ER | OPTION_MASK_ISA_AVX512F_SET)
68 #define OPTION_MASK_ISA_AVX512DQ_SET \
69 (OPTION_MASK_ISA_AVX512DQ | OPTION_MASK_ISA_AVX512F_SET)
70 #define OPTION_MASK_ISA_AVX512BW_SET \
71 (OPTION_MASK_ISA_AVX512BW | OPTION_MASK_ISA_AVX512F_SET)
72 #define OPTION_MASK_ISA_AVX512VL_SET \
73 (OPTION_MASK_ISA_AVX512VL | OPTION_MASK_ISA_AVX512F_SET)
74 #define OPTION_MASK_ISA_AVX512IFMA_SET \
75 (OPTION_MASK_ISA_AVX512IFMA | OPTION_MASK_ISA_AVX512F_SET)
76 #define OPTION_MASK_ISA_AVX512VBMI_SET \
77 (OPTION_MASK_ISA_AVX512VBMI | OPTION_MASK_ISA_AVX512BW_SET)
78 #define OPTION_MASK_ISA_RTM_SET OPTION_MASK_ISA_RTM
79 #define OPTION_MASK_ISA_PRFCHW_SET OPTION_MASK_ISA_PRFCHW
80 #define OPTION_MASK_ISA_RDSEED_SET OPTION_MASK_ISA_RDSEED
81 #define OPTION_MASK_ISA_ADX_SET OPTION_MASK_ISA_ADX
82 #define OPTION_MASK_ISA_PREFETCHWT1_SET OPTION_MASK_ISA_PREFETCHWT1
83 #define OPTION_MASK_ISA_CLFLUSHOPT_SET OPTION_MASK_ISA_CLFLUSHOPT
84 #define OPTION_MASK_ISA_XSAVES_SET \
85 (OPTION_MASK_ISA_XSAVES | OPTION_MASK_ISA_XSAVE)
86 #define OPTION_MASK_ISA_XSAVEC_SET \
87 (OPTION_MASK_ISA_XSAVEC | OPTION_MASK_ISA_XSAVE)
88 #define OPTION_MASK_ISA_CLWB_SET OPTION_MASK_ISA_CLWB
89 #define OPTION_MASK_ISA_PCOMMIT_SET OPTION_MASK_ISA_PCOMMIT
91 /* SSE4 includes both SSE4.1 and SSE4.2. -msse4 should be the same
93 #define OPTION_MASK_ISA_SSE4_SET OPTION_MASK_ISA_SSE4_2_SET
95 #define OPTION_MASK_ISA_SSE4A_SET \
96 (OPTION_MASK_ISA_SSE4A | OPTION_MASK_ISA_SSE3_SET)
97 #define OPTION_MASK_ISA_FMA4_SET \
98 (OPTION_MASK_ISA_FMA4 | OPTION_MASK_ISA_SSE4A_SET \
99 | OPTION_MASK_ISA_AVX_SET)
100 #define OPTION_MASK_ISA_XOP_SET \
101 (OPTION_MASK_ISA_XOP | OPTION_MASK_ISA_FMA4_SET)
102 #define OPTION_MASK_ISA_LWP_SET \
105 /* AES, SHA and PCLMUL need SSE2 because they use xmm registers. */
106 #define OPTION_MASK_ISA_AES_SET \
107 (OPTION_MASK_ISA_AES | OPTION_MASK_ISA_SSE2_SET)
108 #define OPTION_MASK_ISA_SHA_SET \
109 (OPTION_MASK_ISA_SHA | OPTION_MASK_ISA_SSE2_SET)
110 #define OPTION_MASK_ISA_PCLMUL_SET \
111 (OPTION_MASK_ISA_PCLMUL | OPTION_MASK_ISA_SSE2_SET)
113 #define OPTION_MASK_ISA_ABM_SET \
114 (OPTION_MASK_ISA_ABM | OPTION_MASK_ISA_POPCNT)
116 #define OPTION_MASK_ISA_BMI_SET OPTION_MASK_ISA_BMI
117 #define OPTION_MASK_ISA_BMI2_SET OPTION_MASK_ISA_BMI2
118 #define OPTION_MASK_ISA_LZCNT_SET OPTION_MASK_ISA_LZCNT
119 #define OPTION_MASK_ISA_TBM_SET OPTION_MASK_ISA_TBM
120 #define OPTION_MASK_ISA_POPCNT_SET OPTION_MASK_ISA_POPCNT
121 #define OPTION_MASK_ISA_CX16_SET OPTION_MASK_ISA_CX16
122 #define OPTION_MASK_ISA_SAHF_SET OPTION_MASK_ISA_SAHF
123 #define OPTION_MASK_ISA_MOVBE_SET OPTION_MASK_ISA_MOVBE
124 #define OPTION_MASK_ISA_CRC32_SET OPTION_MASK_ISA_CRC32
126 #define OPTION_MASK_ISA_FSGSBASE_SET OPTION_MASK_ISA_FSGSBASE
127 #define OPTION_MASK_ISA_RDRND_SET OPTION_MASK_ISA_RDRND
128 #define OPTION_MASK_ISA_F16C_SET \
129 (OPTION_MASK_ISA_F16C | OPTION_MASK_ISA_AVX_SET)
130 #define OPTION_MASK_ISA_MWAITX_SET OPTION_MASK_ISA_MWAITX
132 /* Define a set of ISAs which aren't available when a given ISA is
133 disabled. MMX and SSE ISAs are handled separately. */
135 #define OPTION_MASK_ISA_MMX_UNSET \
136 (OPTION_MASK_ISA_MMX | OPTION_MASK_ISA_3DNOW_UNSET)
137 #define OPTION_MASK_ISA_3DNOW_UNSET \
138 (OPTION_MASK_ISA_3DNOW | OPTION_MASK_ISA_3DNOW_A_UNSET)
139 #define OPTION_MASK_ISA_3DNOW_A_UNSET OPTION_MASK_ISA_3DNOW_A
141 #define OPTION_MASK_ISA_SSE_UNSET \
142 (OPTION_MASK_ISA_SSE | OPTION_MASK_ISA_SSE2_UNSET)
143 #define OPTION_MASK_ISA_SSE2_UNSET \
144 (OPTION_MASK_ISA_SSE2 | OPTION_MASK_ISA_SSE3_UNSET)
145 #define OPTION_MASK_ISA_SSE3_UNSET \
146 (OPTION_MASK_ISA_SSE3 \
147 | OPTION_MASK_ISA_SSSE3_UNSET \
148 | OPTION_MASK_ISA_SSE4A_UNSET )
149 #define OPTION_MASK_ISA_SSSE3_UNSET \
150 (OPTION_MASK_ISA_SSSE3 | OPTION_MASK_ISA_SSE4_1_UNSET)
151 #define OPTION_MASK_ISA_SSE4_1_UNSET \
152 (OPTION_MASK_ISA_SSE4_1 | OPTION_MASK_ISA_SSE4_2_UNSET)
153 #define OPTION_MASK_ISA_SSE4_2_UNSET \
154 (OPTION_MASK_ISA_SSE4_2 | OPTION_MASK_ISA_AVX_UNSET )
155 #define OPTION_MASK_ISA_AVX_UNSET \
156 (OPTION_MASK_ISA_AVX | OPTION_MASK_ISA_FMA_UNSET \
157 | OPTION_MASK_ISA_FMA4_UNSET | OPTION_MASK_ISA_F16C_UNSET \
158 | OPTION_MASK_ISA_AVX2_UNSET | OPTION_MASK_ISA_XSAVE_UNSET)
159 #define OPTION_MASK_ISA_FMA_UNSET OPTION_MASK_ISA_FMA
160 #define OPTION_MASK_ISA_FXSR_UNSET OPTION_MASK_ISA_FXSR
161 #define OPTION_MASK_ISA_XSAVE_UNSET \
162 (OPTION_MASK_ISA_XSAVE | OPTION_MASK_ISA_XSAVEOPT_UNSET)
163 #define OPTION_MASK_ISA_XSAVEOPT_UNSET OPTION_MASK_ISA_XSAVEOPT
164 #define OPTION_MASK_ISA_AVX2_UNSET \
165 (OPTION_MASK_ISA_AVX2 | OPTION_MASK_ISA_AVX512F_UNSET)
166 #define OPTION_MASK_ISA_AVX512F_UNSET \
167 (OPTION_MASK_ISA_AVX512F | OPTION_MASK_ISA_AVX512CD_UNSET \
168 | OPTION_MASK_ISA_AVX512PF_UNSET | OPTION_MASK_ISA_AVX512ER_UNSET \
169 | OPTION_MASK_ISA_AVX512DQ_UNSET | OPTION_MASK_ISA_AVX512BW_UNSET \
170 | OPTION_MASK_ISA_AVX512VL_UNSET)
171 #define OPTION_MASK_ISA_AVX512CD_UNSET OPTION_MASK_ISA_AVX512CD
172 #define OPTION_MASK_ISA_AVX512PF_UNSET OPTION_MASK_ISA_AVX512PF
173 #define OPTION_MASK_ISA_AVX512ER_UNSET OPTION_MASK_ISA_AVX512ER
174 #define OPTION_MASK_ISA_AVX512DQ_UNSET OPTION_MASK_ISA_AVX512DQ
175 #define OPTION_MASK_ISA_AVX512BW_UNSET \
176 (OPTION_MASK_ISA_AVX512BW | OPTION_MASK_ISA_AVX512VBMI_UNSET)
177 #define OPTION_MASK_ISA_AVX512VL_UNSET OPTION_MASK_ISA_AVX512VL
178 #define OPTION_MASK_ISA_AVX512IFMA_UNSET OPTION_MASK_ISA_AVX512IFMA
179 #define OPTION_MASK_ISA_AVX512VBMI_UNSET OPTION_MASK_ISA_AVX512VBMI
180 #define OPTION_MASK_ISA_RTM_UNSET OPTION_MASK_ISA_RTM
181 #define OPTION_MASK_ISA_PRFCHW_UNSET OPTION_MASK_ISA_PRFCHW
182 #define OPTION_MASK_ISA_RDSEED_UNSET OPTION_MASK_ISA_RDSEED
183 #define OPTION_MASK_ISA_ADX_UNSET OPTION_MASK_ISA_ADX
184 #define OPTION_MASK_ISA_PREFETCHWT1_UNSET OPTION_MASK_ISA_PREFETCHWT1
185 #define OPTION_MASK_ISA_CLFLUSHOPT_UNSET OPTION_MASK_ISA_CLFLUSHOPT
186 #define OPTION_MASK_ISA_XSAVEC_UNSET OPTION_MASK_ISA_XSAVEC
187 #define OPTION_MASK_ISA_XSAVES_UNSET OPTION_MASK_ISA_XSAVES
188 #define OPTION_MASK_ISA_PCOMMIT_UNSET OPTION_MASK_ISA_PCOMMIT
189 #define OPTION_MASK_ISA_CLWB_UNSET OPTION_MASK_ISA_CLWB
190 #define OPTION_MASK_ISA_MWAITX_UNSET OPTION_MASK_ISA_MWAITX
192 /* SSE4 includes both SSE4.1 and SSE4.2. -mno-sse4 should the same
194 #define OPTION_MASK_ISA_SSE4_UNSET OPTION_MASK_ISA_SSE4_1_UNSET
196 #define OPTION_MASK_ISA_SSE4A_UNSET \
197 (OPTION_MASK_ISA_SSE4A | OPTION_MASK_ISA_FMA4_UNSET)
199 #define OPTION_MASK_ISA_FMA4_UNSET \
200 (OPTION_MASK_ISA_FMA4 | OPTION_MASK_ISA_XOP_UNSET)
201 #define OPTION_MASK_ISA_XOP_UNSET OPTION_MASK_ISA_XOP
202 #define OPTION_MASK_ISA_LWP_UNSET OPTION_MASK_ISA_LWP
204 #define OPTION_MASK_ISA_AES_UNSET OPTION_MASK_ISA_AES
205 #define OPTION_MASK_ISA_SHA_UNSET OPTION_MASK_ISA_SHA
206 #define OPTION_MASK_ISA_PCLMUL_UNSET OPTION_MASK_ISA_PCLMUL
207 #define OPTION_MASK_ISA_ABM_UNSET OPTION_MASK_ISA_ABM
208 #define OPTION_MASK_ISA_BMI_UNSET OPTION_MASK_ISA_BMI
209 #define OPTION_MASK_ISA_BMI2_UNSET OPTION_MASK_ISA_BMI2
210 #define OPTION_MASK_ISA_LZCNT_UNSET OPTION_MASK_ISA_LZCNT
211 #define OPTION_MASK_ISA_TBM_UNSET OPTION_MASK_ISA_TBM
212 #define OPTION_MASK_ISA_POPCNT_UNSET OPTION_MASK_ISA_POPCNT
213 #define OPTION_MASK_ISA_CX16_UNSET OPTION_MASK_ISA_CX16
214 #define OPTION_MASK_ISA_SAHF_UNSET OPTION_MASK_ISA_SAHF
215 #define OPTION_MASK_ISA_MOVBE_UNSET OPTION_MASK_ISA_MOVBE
216 #define OPTION_MASK_ISA_CRC32_UNSET OPTION_MASK_ISA_CRC32
218 #define OPTION_MASK_ISA_FSGSBASE_UNSET OPTION_MASK_ISA_FSGSBASE
219 #define OPTION_MASK_ISA_RDRND_UNSET OPTION_MASK_ISA_RDRND
220 #define OPTION_MASK_ISA_F16C_UNSET OPTION_MASK_ISA_F16C
222 /* Implement TARGET_HANDLE_OPTION. */
225 ix86_handle_option (struct gcc_options *opts,
226 struct gcc_options *opts_set ATTRIBUTE_UNUSED,
227 const struct cl_decoded_option *decoded,
230 size_t code = decoded->opt_index;
231 int value = decoded->value;
238 opts->x_ix86_isa_flags |= OPTION_MASK_ISA_MMX_SET;
239 opts->x_ix86_isa_flags_explicit |= OPTION_MASK_ISA_MMX_SET;
243 opts->x_ix86_isa_flags &= ~OPTION_MASK_ISA_MMX_UNSET;
244 opts->x_ix86_isa_flags_explicit |= OPTION_MASK_ISA_MMX_UNSET;
251 opts->x_ix86_isa_flags |= OPTION_MASK_ISA_3DNOW_SET;
252 opts->x_ix86_isa_flags_explicit |= OPTION_MASK_ISA_3DNOW_SET;
256 opts->x_ix86_isa_flags &= ~OPTION_MASK_ISA_3DNOW_UNSET;
257 opts->x_ix86_isa_flags_explicit |= OPTION_MASK_ISA_3DNOW_UNSET;
267 opts->x_ix86_isa_flags |= OPTION_MASK_ISA_SSE_SET;
268 opts->x_ix86_isa_flags_explicit |= OPTION_MASK_ISA_SSE_SET;
272 opts->x_ix86_isa_flags &= ~OPTION_MASK_ISA_SSE_UNSET;
273 opts->x_ix86_isa_flags_explicit |= OPTION_MASK_ISA_SSE_UNSET;
280 opts->x_ix86_isa_flags |= OPTION_MASK_ISA_SSE2_SET;
281 opts->x_ix86_isa_flags_explicit |= OPTION_MASK_ISA_SSE2_SET;
285 opts->x_ix86_isa_flags &= ~OPTION_MASK_ISA_SSE2_UNSET;
286 opts->x_ix86_isa_flags_explicit |= OPTION_MASK_ISA_SSE2_UNSET;
293 opts->x_ix86_isa_flags |= OPTION_MASK_ISA_SSE3_SET;
294 opts->x_ix86_isa_flags_explicit |= OPTION_MASK_ISA_SSE3_SET;
298 opts->x_ix86_isa_flags &= ~OPTION_MASK_ISA_SSE3_UNSET;
299 opts->x_ix86_isa_flags_explicit |= OPTION_MASK_ISA_SSE3_UNSET;
306 opts->x_ix86_isa_flags |= OPTION_MASK_ISA_SSSE3_SET;
307 opts->x_ix86_isa_flags_explicit |= OPTION_MASK_ISA_SSSE3_SET;
311 opts->x_ix86_isa_flags &= ~OPTION_MASK_ISA_SSSE3_UNSET;
312 opts->x_ix86_isa_flags_explicit |= OPTION_MASK_ISA_SSSE3_UNSET;
319 opts->x_ix86_isa_flags |= OPTION_MASK_ISA_SSE4_1_SET;
320 opts->x_ix86_isa_flags_explicit |= OPTION_MASK_ISA_SSE4_1_SET;
324 opts->x_ix86_isa_flags &= ~OPTION_MASK_ISA_SSE4_1_UNSET;
325 opts->x_ix86_isa_flags_explicit |= OPTION_MASK_ISA_SSE4_1_UNSET;
332 opts->x_ix86_isa_flags |= OPTION_MASK_ISA_SSE4_2_SET;
333 opts->x_ix86_isa_flags_explicit |= OPTION_MASK_ISA_SSE4_2_SET;
337 opts->x_ix86_isa_flags &= ~OPTION_MASK_ISA_SSE4_2_UNSET;
338 opts->x_ix86_isa_flags_explicit |= OPTION_MASK_ISA_SSE4_2_UNSET;
345 opts->x_ix86_isa_flags |= OPTION_MASK_ISA_AVX_SET;
346 opts->x_ix86_isa_flags_explicit |= OPTION_MASK_ISA_AVX_SET;
350 opts->x_ix86_isa_flags &= ~OPTION_MASK_ISA_AVX_UNSET;
351 opts->x_ix86_isa_flags_explicit |= OPTION_MASK_ISA_AVX_UNSET;
358 opts->x_ix86_isa_flags |= OPTION_MASK_ISA_AVX2_SET;
359 opts->x_ix86_isa_flags_explicit |= OPTION_MASK_ISA_AVX2_SET;
363 opts->x_ix86_isa_flags &= ~OPTION_MASK_ISA_AVX2_UNSET;
364 opts->x_ix86_isa_flags_explicit |= OPTION_MASK_ISA_AVX2_UNSET;
371 opts->x_ix86_isa_flags |= OPTION_MASK_ISA_AVX512F_SET;
372 opts->x_ix86_isa_flags_explicit |= OPTION_MASK_ISA_AVX512F_SET;
376 opts->x_ix86_isa_flags &= ~OPTION_MASK_ISA_AVX512F_UNSET;
377 opts->x_ix86_isa_flags_explicit |= OPTION_MASK_ISA_AVX512F_UNSET;
384 opts->x_ix86_isa_flags |= OPTION_MASK_ISA_AVX512CD_SET;
385 opts->x_ix86_isa_flags_explicit |= OPTION_MASK_ISA_AVX512CD_SET;
389 opts->x_ix86_isa_flags &= ~OPTION_MASK_ISA_AVX512CD_UNSET;
390 opts->x_ix86_isa_flags_explicit |= OPTION_MASK_ISA_AVX512CD_UNSET;
397 opts->x_ix86_isa_flags |= OPTION_MASK_ISA_AVX512PF_SET;
398 opts->x_ix86_isa_flags_explicit |= OPTION_MASK_ISA_AVX512PF_SET;
402 opts->x_ix86_isa_flags &= ~OPTION_MASK_ISA_AVX512PF_UNSET;
403 opts->x_ix86_isa_flags_explicit |= OPTION_MASK_ISA_AVX512PF_UNSET;
410 opts->x_ix86_isa_flags |= OPTION_MASK_ISA_AVX512ER_SET;
411 opts->x_ix86_isa_flags_explicit |= OPTION_MASK_ISA_AVX512ER_SET;
415 opts->x_ix86_isa_flags &= ~OPTION_MASK_ISA_AVX512ER_UNSET;
416 opts->x_ix86_isa_flags_explicit |= OPTION_MASK_ISA_AVX512ER_UNSET;
423 opts->x_ix86_isa_flags |= OPTION_MASK_ISA_AVX512DQ_SET;
424 opts->x_ix86_isa_flags_explicit |= OPTION_MASK_ISA_AVX512DQ_SET;
428 opts->x_ix86_isa_flags &= ~OPTION_MASK_ISA_AVX512DQ_UNSET;
429 opts->x_ix86_isa_flags_explicit |= OPTION_MASK_ISA_AVX512DQ_UNSET;
436 opts->x_ix86_isa_flags |= OPTION_MASK_ISA_AVX512BW_SET;
437 opts->x_ix86_isa_flags_explicit |= OPTION_MASK_ISA_AVX512BW_SET;
441 opts->x_ix86_isa_flags &= ~OPTION_MASK_ISA_AVX512BW_UNSET;
442 opts->x_ix86_isa_flags_explicit |= OPTION_MASK_ISA_AVX512BW_UNSET;
449 opts->x_ix86_isa_flags |= OPTION_MASK_ISA_AVX512VL_SET;
450 opts->x_ix86_isa_flags_explicit |= OPTION_MASK_ISA_AVX512VL_SET;
454 opts->x_ix86_isa_flags &= ~OPTION_MASK_ISA_AVX512VL_UNSET;
455 opts->x_ix86_isa_flags_explicit |= OPTION_MASK_ISA_AVX512VL_UNSET;
459 case OPT_mavx512ifma:
462 opts->x_ix86_isa_flags |= OPTION_MASK_ISA_AVX512IFMA_SET;
463 opts->x_ix86_isa_flags_explicit |= OPTION_MASK_ISA_AVX512IFMA_SET;
467 opts->x_ix86_isa_flags &= ~OPTION_MASK_ISA_AVX512IFMA_UNSET;
468 opts->x_ix86_isa_flags_explicit |= OPTION_MASK_ISA_AVX512IFMA_UNSET;
472 case OPT_mavx512vbmi:
475 opts->x_ix86_isa_flags |= OPTION_MASK_ISA_AVX512VBMI_SET;
476 opts->x_ix86_isa_flags_explicit |= OPTION_MASK_ISA_AVX512VBMI_SET;
480 opts->x_ix86_isa_flags &= ~OPTION_MASK_ISA_AVX512VBMI_UNSET;
481 opts->x_ix86_isa_flags_explicit |= OPTION_MASK_ISA_AVX512VBMI_UNSET;
488 opts->x_ix86_isa_flags |= OPTION_MASK_ISA_FMA_SET;
489 opts->x_ix86_isa_flags_explicit |= OPTION_MASK_ISA_FMA_SET;
493 opts->x_ix86_isa_flags &= ~OPTION_MASK_ISA_FMA_UNSET;
494 opts->x_ix86_isa_flags_explicit |= OPTION_MASK_ISA_FMA_UNSET;
501 opts->x_ix86_isa_flags |= OPTION_MASK_ISA_RTM_SET;
502 opts->x_ix86_isa_flags_explicit |= OPTION_MASK_ISA_RTM_SET;
506 opts->x_ix86_isa_flags &= ~OPTION_MASK_ISA_RTM_UNSET;
507 opts->x_ix86_isa_flags_explicit |= OPTION_MASK_ISA_RTM_UNSET;
512 opts->x_ix86_isa_flags |= OPTION_MASK_ISA_SSE4_SET;
513 opts->x_ix86_isa_flags_explicit |= OPTION_MASK_ISA_SSE4_SET;
517 opts->x_ix86_isa_flags &= ~OPTION_MASK_ISA_SSE4_UNSET;
518 opts->x_ix86_isa_flags_explicit |= OPTION_MASK_ISA_SSE4_UNSET;
524 opts->x_ix86_isa_flags |= OPTION_MASK_ISA_SSE4A_SET;
525 opts->x_ix86_isa_flags_explicit |= OPTION_MASK_ISA_SSE4A_SET;
529 opts->x_ix86_isa_flags &= ~OPTION_MASK_ISA_SSE4A_UNSET;
530 opts->x_ix86_isa_flags_explicit |= OPTION_MASK_ISA_SSE4A_UNSET;
537 opts->x_ix86_isa_flags |= OPTION_MASK_ISA_FMA4_SET;
538 opts->x_ix86_isa_flags_explicit |= OPTION_MASK_ISA_FMA4_SET;
542 opts->x_ix86_isa_flags &= ~OPTION_MASK_ISA_FMA4_UNSET;
543 opts->x_ix86_isa_flags_explicit |= OPTION_MASK_ISA_FMA4_UNSET;
550 opts->x_ix86_isa_flags |= OPTION_MASK_ISA_XOP_SET;
551 opts->x_ix86_isa_flags_explicit |= OPTION_MASK_ISA_XOP_SET;
555 opts->x_ix86_isa_flags &= ~OPTION_MASK_ISA_XOP_UNSET;
556 opts->x_ix86_isa_flags_explicit |= OPTION_MASK_ISA_XOP_UNSET;
563 opts->x_ix86_isa_flags |= OPTION_MASK_ISA_LWP_SET;
564 opts->x_ix86_isa_flags_explicit |= OPTION_MASK_ISA_LWP_SET;
568 opts->x_ix86_isa_flags &= ~OPTION_MASK_ISA_LWP_UNSET;
569 opts->x_ix86_isa_flags_explicit |= OPTION_MASK_ISA_LWP_UNSET;
576 opts->x_ix86_isa_flags |= OPTION_MASK_ISA_ABM_SET;
577 opts->x_ix86_isa_flags_explicit |= OPTION_MASK_ISA_ABM_SET;
581 opts->x_ix86_isa_flags &= ~OPTION_MASK_ISA_ABM_UNSET;
582 opts->x_ix86_isa_flags_explicit |= OPTION_MASK_ISA_ABM_UNSET;
589 opts->x_ix86_isa_flags |= OPTION_MASK_ISA_BMI_SET;
590 opts->x_ix86_isa_flags_explicit |= OPTION_MASK_ISA_BMI_SET;
594 opts->x_ix86_isa_flags &= ~OPTION_MASK_ISA_BMI_UNSET;
595 opts->x_ix86_isa_flags_explicit |= OPTION_MASK_ISA_BMI_UNSET;
602 opts->x_ix86_isa_flags |= OPTION_MASK_ISA_BMI2_SET;
603 opts->x_ix86_isa_flags_explicit |= OPTION_MASK_ISA_BMI2_SET;
607 opts->x_ix86_isa_flags &= ~OPTION_MASK_ISA_BMI2_UNSET;
608 opts->x_ix86_isa_flags_explicit |= OPTION_MASK_ISA_BMI2_UNSET;
615 opts->x_ix86_isa_flags |= OPTION_MASK_ISA_LZCNT_SET;
616 opts->x_ix86_isa_flags_explicit |= OPTION_MASK_ISA_LZCNT_SET;
620 opts->x_ix86_isa_flags &= ~OPTION_MASK_ISA_LZCNT_UNSET;
621 opts->x_ix86_isa_flags_explicit |= OPTION_MASK_ISA_LZCNT_UNSET;
628 opts->x_ix86_isa_flags |= OPTION_MASK_ISA_TBM_SET;
629 opts->x_ix86_isa_flags_explicit |= OPTION_MASK_ISA_TBM_SET;
633 opts->x_ix86_isa_flags &= ~OPTION_MASK_ISA_TBM_UNSET;
634 opts->x_ix86_isa_flags_explicit |= OPTION_MASK_ISA_TBM_UNSET;
641 opts->x_ix86_isa_flags |= OPTION_MASK_ISA_POPCNT_SET;
642 opts->x_ix86_isa_flags_explicit |= OPTION_MASK_ISA_POPCNT_SET;
646 opts->x_ix86_isa_flags &= ~OPTION_MASK_ISA_POPCNT_UNSET;
647 opts->x_ix86_isa_flags_explicit |= OPTION_MASK_ISA_POPCNT_UNSET;
654 opts->x_ix86_isa_flags |= OPTION_MASK_ISA_SAHF_SET;
655 opts->x_ix86_isa_flags_explicit |= OPTION_MASK_ISA_SAHF_SET;
659 opts->x_ix86_isa_flags &= ~OPTION_MASK_ISA_SAHF_UNSET;
660 opts->x_ix86_isa_flags_explicit |= OPTION_MASK_ISA_SAHF_UNSET;
667 opts->x_ix86_isa_flags |= OPTION_MASK_ISA_CX16_SET;
668 opts->x_ix86_isa_flags_explicit |= OPTION_MASK_ISA_CX16_SET;
672 opts->x_ix86_isa_flags &= ~OPTION_MASK_ISA_CX16_UNSET;
673 opts->x_ix86_isa_flags_explicit |= OPTION_MASK_ISA_CX16_UNSET;
680 opts->x_ix86_isa_flags |= OPTION_MASK_ISA_MOVBE_SET;
681 opts->x_ix86_isa_flags_explicit |= OPTION_MASK_ISA_MOVBE_SET;
685 opts->x_ix86_isa_flags &= ~OPTION_MASK_ISA_MOVBE_UNSET;
686 opts->x_ix86_isa_flags_explicit |= OPTION_MASK_ISA_MOVBE_UNSET;
693 opts->x_ix86_isa_flags |= OPTION_MASK_ISA_CRC32_SET;
694 opts->x_ix86_isa_flags_explicit |= OPTION_MASK_ISA_CRC32_SET;
698 opts->x_ix86_isa_flags &= ~OPTION_MASK_ISA_CRC32_UNSET;
699 opts->x_ix86_isa_flags_explicit |= OPTION_MASK_ISA_CRC32_UNSET;
706 opts->x_ix86_isa_flags |= OPTION_MASK_ISA_AES_SET;
707 opts->x_ix86_isa_flags_explicit |= OPTION_MASK_ISA_AES_SET;
711 opts->x_ix86_isa_flags &= ~OPTION_MASK_ISA_AES_UNSET;
712 opts->x_ix86_isa_flags_explicit |= OPTION_MASK_ISA_AES_UNSET;
719 opts->x_ix86_isa_flags |= OPTION_MASK_ISA_SHA_SET;
720 opts->x_ix86_isa_flags_explicit |= OPTION_MASK_ISA_SHA_SET;
724 opts->x_ix86_isa_flags &= ~OPTION_MASK_ISA_SHA_UNSET;
725 opts->x_ix86_isa_flags_explicit |= OPTION_MASK_ISA_SHA_UNSET;
732 opts->x_ix86_isa_flags |= OPTION_MASK_ISA_PCLMUL_SET;
733 opts->x_ix86_isa_flags_explicit |= OPTION_MASK_ISA_PCLMUL_SET;
737 opts->x_ix86_isa_flags &= ~OPTION_MASK_ISA_PCLMUL_UNSET;
738 opts->x_ix86_isa_flags_explicit |= OPTION_MASK_ISA_PCLMUL_UNSET;
745 opts->x_ix86_isa_flags |= OPTION_MASK_ISA_FSGSBASE_SET;
746 opts->x_ix86_isa_flags_explicit |= OPTION_MASK_ISA_FSGSBASE_SET;
750 opts->x_ix86_isa_flags &= ~OPTION_MASK_ISA_FSGSBASE_UNSET;
751 opts->x_ix86_isa_flags_explicit |= OPTION_MASK_ISA_FSGSBASE_UNSET;
758 opts->x_ix86_isa_flags |= OPTION_MASK_ISA_RDRND_SET;
759 opts->x_ix86_isa_flags_explicit |= OPTION_MASK_ISA_RDRND_SET;
763 opts->x_ix86_isa_flags &= ~OPTION_MASK_ISA_RDRND_UNSET;
764 opts->x_ix86_isa_flags_explicit |= OPTION_MASK_ISA_RDRND_UNSET;
771 opts->x_ix86_isa_flags |= OPTION_MASK_ISA_F16C_SET;
772 opts->x_ix86_isa_flags_explicit |= OPTION_MASK_ISA_F16C_SET;
776 opts->x_ix86_isa_flags &= ~OPTION_MASK_ISA_F16C_UNSET;
777 opts->x_ix86_isa_flags_explicit |= OPTION_MASK_ISA_F16C_UNSET;
784 opts->x_ix86_isa_flags |= OPTION_MASK_ISA_FXSR_SET;
785 opts->x_ix86_isa_flags_explicit |= OPTION_MASK_ISA_FXSR_SET;
789 opts->x_ix86_isa_flags &= ~OPTION_MASK_ISA_FXSR_UNSET;
790 opts->x_ix86_isa_flags_explicit |= OPTION_MASK_ISA_FXSR_UNSET;
797 opts->x_ix86_isa_flags |= OPTION_MASK_ISA_XSAVE_SET;
798 opts->x_ix86_isa_flags_explicit |= OPTION_MASK_ISA_XSAVE_SET;
802 opts->x_ix86_isa_flags &= ~OPTION_MASK_ISA_XSAVE_UNSET;
803 opts->x_ix86_isa_flags_explicit |= OPTION_MASK_ISA_XSAVE_UNSET;
810 opts->x_ix86_isa_flags |= OPTION_MASK_ISA_XSAVEOPT_SET;
811 opts->x_ix86_isa_flags_explicit |= OPTION_MASK_ISA_XSAVEOPT_SET;
815 opts->x_ix86_isa_flags &= ~OPTION_MASK_ISA_XSAVEOPT_UNSET;
816 opts->x_ix86_isa_flags_explicit |= OPTION_MASK_ISA_XSAVEOPT_UNSET;
823 opts->x_ix86_isa_flags |= OPTION_MASK_ISA_XSAVEC_SET;
824 opts->x_ix86_isa_flags_explicit |= OPTION_MASK_ISA_XSAVEC_SET;
828 opts->x_ix86_isa_flags &= ~OPTION_MASK_ISA_XSAVEC_UNSET;
829 opts->x_ix86_isa_flags_explicit |= OPTION_MASK_ISA_XSAVEC_UNSET;
836 opts->x_ix86_isa_flags |= OPTION_MASK_ISA_XSAVES_SET;
837 opts->x_ix86_isa_flags_explicit |= OPTION_MASK_ISA_XSAVES_SET;
841 opts->x_ix86_isa_flags &= ~OPTION_MASK_ISA_XSAVES_UNSET;
842 opts->x_ix86_isa_flags_explicit |= OPTION_MASK_ISA_XSAVES_UNSET;
849 opts->x_ix86_isa_flags |= OPTION_MASK_ISA_RDSEED_SET;
850 opts->x_ix86_isa_flags_explicit |= OPTION_MASK_ISA_RDSEED_SET;
854 opts->x_ix86_isa_flags &= ~OPTION_MASK_ISA_RDSEED_UNSET;
855 opts->x_ix86_isa_flags_explicit |= OPTION_MASK_ISA_RDSEED_UNSET;
862 opts->x_ix86_isa_flags |= OPTION_MASK_ISA_PRFCHW_SET;
863 opts->x_ix86_isa_flags_explicit |= OPTION_MASK_ISA_PRFCHW_SET;
867 opts->x_ix86_isa_flags &= ~OPTION_MASK_ISA_PRFCHW_UNSET;
868 opts->x_ix86_isa_flags_explicit |= OPTION_MASK_ISA_PRFCHW_UNSET;
875 opts->x_ix86_isa_flags |= OPTION_MASK_ISA_ADX_SET;
876 opts->x_ix86_isa_flags_explicit |= OPTION_MASK_ISA_ADX_SET;
880 opts->x_ix86_isa_flags &= ~OPTION_MASK_ISA_ADX_UNSET;
881 opts->x_ix86_isa_flags_explicit |= OPTION_MASK_ISA_ADX_UNSET;
885 case OPT_mprefetchwt1:
888 opts->x_ix86_isa_flags |= OPTION_MASK_ISA_PREFETCHWT1_SET;
889 opts->x_ix86_isa_flags_explicit |= OPTION_MASK_ISA_PREFETCHWT1_SET;
893 opts->x_ix86_isa_flags &= ~OPTION_MASK_ISA_PREFETCHWT1_UNSET;
894 opts->x_ix86_isa_flags_explicit |= OPTION_MASK_ISA_PREFETCHWT1_UNSET;
898 case OPT_mclflushopt:
901 opts->x_ix86_isa_flags |= OPTION_MASK_ISA_CLFLUSHOPT_SET;
902 opts->x_ix86_isa_flags_explicit |= OPTION_MASK_ISA_CLFLUSHOPT_SET;
906 opts->x_ix86_isa_flags &= ~OPTION_MASK_ISA_CLFLUSHOPT_UNSET;
907 opts->x_ix86_isa_flags_explicit |= OPTION_MASK_ISA_CLFLUSHOPT_UNSET;
914 opts->x_ix86_isa_flags |= OPTION_MASK_ISA_PCOMMIT_SET;
915 opts->x_ix86_isa_flags_explicit |= OPTION_MASK_ISA_PCOMMIT_SET;
919 opts->x_ix86_isa_flags &= ~OPTION_MASK_ISA_PCOMMIT_UNSET;
920 opts->x_ix86_isa_flags_explicit |= OPTION_MASK_ISA_PCOMMIT_UNSET;
927 opts->x_ix86_isa_flags |= OPTION_MASK_ISA_CLWB_SET;
928 opts->x_ix86_isa_flags_explicit |= OPTION_MASK_ISA_CLWB_SET;
932 opts->x_ix86_isa_flags &= ~OPTION_MASK_ISA_CLWB_UNSET;
933 opts->x_ix86_isa_flags_explicit |= OPTION_MASK_ISA_CLWB_UNSET;
940 opts->x_ix86_isa_flags |= OPTION_MASK_ISA_MWAITX_SET;
941 opts->x_ix86_isa_flags_explicit |= OPTION_MASK_ISA_MWAITX_SET;
945 opts->x_ix86_isa_flags &= ~OPTION_MASK_ISA_MWAITX_UNSET;
946 opts->x_ix86_isa_flags_explicit |= OPTION_MASK_ISA_MWAITX_UNSET;
950 /* Comes from final.c -- no real reason to change it. */
951 #define MAX_CODE_ALIGN 16
953 case OPT_malign_loops_:
954 warning_at (loc, 0, "-malign-loops is obsolete, use -falign-loops");
955 if (value > MAX_CODE_ALIGN)
956 error_at (loc, "-malign-loops=%d is not between 0 and %d",
957 value, MAX_CODE_ALIGN);
959 opts->x_align_loops = 1 << value;
962 case OPT_malign_jumps_:
963 warning_at (loc, 0, "-malign-jumps is obsolete, use -falign-jumps");
964 if (value > MAX_CODE_ALIGN)
965 error_at (loc, "-malign-jumps=%d is not between 0 and %d",
966 value, MAX_CODE_ALIGN);
968 opts->x_align_jumps = 1 << value;
971 case OPT_malign_functions_:
973 "-malign-functions is obsolete, use -falign-functions");
974 if (value > MAX_CODE_ALIGN)
975 error_at (loc, "-malign-functions=%d is not between 0 and %d",
976 value, MAX_CODE_ALIGN);
978 opts->x_align_functions = 1 << value;
981 case OPT_mbranch_cost_:
984 error_at (loc, "-mbranch-cost=%d is not between 0 and 5", value);
985 opts->x_ix86_branch_cost = 5;
994 static const struct default_options ix86_option_optimization_table[] =
996 /* Enable redundant extension instructions removal at -O2 and higher. */
997 { OPT_LEVELS_2_PLUS, OPT_free, NULL, 1 },
998 /* Enable function splitting at -O2 and higher. */
999 { OPT_LEVELS_2_PLUS, OPT_freorder_blocks_and_partition, NULL, 1 },
1000 /* Turn off -fschedule-insns by default. It tends to make the
1001 problem with not enough registers even worse. */
1002 { OPT_LEVELS_ALL, OPT_fschedule_insns, NULL, 0 },
1004 #ifdef SUBTARGET_OPTIMIZATION_OPTIONS
1005 SUBTARGET_OPTIMIZATION_OPTIONS,
1007 { OPT_LEVELS_NONE, 0, NULL, 0 }
1010 /* Implement TARGET_OPTION_INIT_STRUCT. */
1013 ix86_option_init_struct (struct gcc_options *opts)
1016 /* The Darwin libraries never set errno, so we might as well
1017 avoid calling them when that's the only reason we would. */
1018 opts->x_flag_errno_math = 0;
1020 opts->x_flag_pcc_struct_return = 2;
1021 opts->x_flag_asynchronous_unwind_tables = 2;
1024 /* On the x86 -fsplit-stack and -fstack-protector both use the same
1025 field in the TCB, so they can not be used together. */
1028 ix86_supports_split_stack (bool report ATTRIBUTE_UNUSED,
1029 struct gcc_options *opts ATTRIBUTE_UNUSED)
1033 #ifndef TARGET_THREAD_SPLIT_STACK_OFFSET
1035 error ("%<-fsplit-stack%> currently only supported on GNU/Linux");
1038 if (!HAVE_GAS_CFI_PERSONALITY_DIRECTIVE)
1041 error ("%<-fsplit-stack%> requires "
1042 "assembler support for CFI directives");
1050 /* Implement TARGET_EXCEPT_UNWIND_INFO. */
1052 static enum unwind_info_type
1053 i386_except_unwind_info (struct gcc_options *opts)
1055 /* Honor the --enable-sjlj-exceptions configure switch. */
1056 #ifdef CONFIG_SJLJ_EXCEPTIONS
1057 if (CONFIG_SJLJ_EXCEPTIONS)
1061 /* On windows 64, prefer SEH exceptions over anything else. */
1062 if (TARGET_64BIT && DEFAULT_ABI == MS_ABI && opts->x_flag_unwind_tables)
1065 if (DWARF2_UNWIND_INFO)
1071 #undef TARGET_EXCEPT_UNWIND_INFO
1072 #define TARGET_EXCEPT_UNWIND_INFO i386_except_unwind_info
1074 #undef TARGET_DEFAULT_TARGET_FLAGS
1075 #define TARGET_DEFAULT_TARGET_FLAGS \
1077 | TARGET_SUBTARGET_DEFAULT \
1078 | TARGET_TLS_DIRECT_SEG_REFS_DEFAULT)
1080 #undef TARGET_HANDLE_OPTION
1081 #define TARGET_HANDLE_OPTION ix86_handle_option
1083 #undef TARGET_OPTION_OPTIMIZATION_TABLE
1084 #define TARGET_OPTION_OPTIMIZATION_TABLE ix86_option_optimization_table
1085 #undef TARGET_OPTION_INIT_STRUCT
1086 #define TARGET_OPTION_INIT_STRUCT ix86_option_init_struct
1088 #undef TARGET_SUPPORTS_SPLIT_STACK
1089 #define TARGET_SUPPORTS_SPLIT_STACK ix86_supports_split_stack
1091 struct gcc_targetm_common targetm_common = TARGETM_COMMON_INITIALIZER;