2 * Copyright (c) 2003-2005 Nate Lawson (SDG)
3 * Copyright (c) 2001 Michael Smith
6 * Redistribution and use in source and binary forms, with or without
7 * modification, are permitted provided that the following conditions
9 * 1. Redistributions of source code must retain the above copyright
10 * notice, this list of conditions and the following disclaimer.
11 * 2. Redistributions in binary form must reproduce the above copyright
12 * notice, this list of conditions and the following disclaimer in the
13 * documentation and/or other materials provided with the distribution.
15 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
16 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
17 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
18 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
19 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
20 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
21 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
22 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
23 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
24 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
27 * $FreeBSD: src/sys/dev/acpica/acpi_cpu.c,v 1.72 2008/04/12 12:06:00 rpaulo Exp $
28 * $DragonFly: src/sys/dev/acpica5/acpi_cpu.c,v 1.21 2008/09/05 10:28:35 hasso Exp $
32 #include <sys/param.h>
34 #include <sys/kernel.h>
35 #include <sys/malloc.h>
36 #include <sys/globaldata.h>
37 #include <sys/power.h>
40 #include <sys/thread2.h>
42 #include <bus/pci/pcivar.h>
43 #include <machine/atomic.h>
44 #include <machine/globaldata.h>
45 #include <machine/md_var.h>
46 #include <machine/smp.h>
53 * Support for ACPI Processor devices, including C[1-3] sleep states.
56 /* Hooks for the ACPI CA debugging infrastructure */
57 #define _COMPONENT ACPI_PROCESSOR
58 ACPI_MODULE_NAME("PROCESSOR")
61 struct resource *p_lvlx; /* Register to read to enter state. */
62 uint32_t type; /* C1-3 (C4 and up treated as C3). */
63 uint32_t trans_lat; /* Transition latency (usec). */
64 uint32_t power; /* Power consumed (mW). */
65 int res_type; /* Resource type for p_lvlx. */
67 #define MAX_CX_STATES 8
69 struct acpi_cpu_softc {
71 ACPI_HANDLE cpu_handle;
72 struct mdglobaldata *md;
73 uint32_t cpu_acpi_id; /* ACPI processor id */
74 uint32_t cpu_p_blk; /* ACPI P_BLK location */
75 uint32_t cpu_p_blk_len; /* P_BLK length (must be 6). */
76 struct acpi_cx cpu_cx_states[MAX_CX_STATES];
77 int cpu_cx_count; /* Number of valid Cx states. */
78 int cpu_prev_sleep;/* Last idle sleep duration. */
79 int cpu_features; /* Child driver supported features. */
81 int cpu_non_c3; /* Index of lowest non-C3 state. */
82 int cpu_short_slp; /* Count of < 1us sleeps. */
83 u_int cpu_cx_stats[MAX_CX_STATES];/* Cx usage history. */
84 /* Values for sysctl. */
85 struct sysctl_ctx_list cpu_sysctl_ctx;
86 struct sysctl_oid *cpu_sysctl_tree;
88 char cpu_cx_supported[64];
92 struct acpi_cpu_device {
93 struct resource_list ad_rl;
96 #define CPU_GET_REG(reg, width) \
97 (bus_space_read_ ## width(rman_get_bustag((reg)), \
98 rman_get_bushandle((reg)), 0))
99 #define CPU_SET_REG(reg, width, val) \
100 (bus_space_write_ ## width(rman_get_bustag((reg)), \
101 rman_get_bushandle((reg)), 0, (val)))
103 #define PM_USEC(x) ((x) >> 2) /* ~4 clocks per usec (3.57955 Mhz) */
105 #define ACPI_NOTIFY_CX_STATES 0x81 /* _CST changed. */
107 #define CPU_QUIRK_NO_C3 (1<<0) /* C3-type states are not usable. */
108 #define CPU_QUIRK_NO_BM_CTRL (1<<2) /* No bus mastering control. */
110 #define PCI_VENDOR_INTEL 0x8086
111 #define PCI_DEVICE_82371AB_3 0x7113 /* PIIX4 chipset for quirks. */
112 #define PCI_REVISION_A_STEP 0
113 #define PCI_REVISION_B_STEP 1
114 #define PCI_REVISION_4E 2
115 #define PCI_REVISION_4M 3
116 #define PIIX4_DEVACTB_REG 0x58
117 #define PIIX4_BRLD_EN_IRQ0 (1<<0)
118 #define PIIX4_BRLD_EN_IRQ (1<<1)
119 #define PIIX4_BRLD_EN_IRQ8 (1<<5)
120 #define PIIX4_STOP_BREAK_MASK (PIIX4_BRLD_EN_IRQ0 | PIIX4_BRLD_EN_IRQ | PIIX4_BRLD_EN_IRQ8)
121 #define PIIX4_PCNTRL_BST_EN (1<<10)
123 /* Platform hardware resource information. */
124 static uint32_t cpu_smi_cmd; /* Value to write to SMI_CMD. */
125 static uint8_t cpu_cst_cnt; /* Indicate we are _CST aware. */
126 static int cpu_quirks; /* Indicate any hardware bugs. */
129 static int cpu_disable_idle; /* Disable entry to idle function */
130 static int cpu_cx_count; /* Number of valid Cx states */
132 /* Values for sysctl. */
133 static struct sysctl_ctx_list cpu_sysctl_ctx;
134 static struct sysctl_oid *cpu_sysctl_tree;
135 static int cpu_cx_generic;
136 static int cpu_cx_lowest;
138 static device_t *cpu_devices;
139 static int cpu_ndevices;
140 static struct acpi_cpu_softc **cpu_softc;
142 static int acpi_cpu_probe(device_t dev);
143 static int acpi_cpu_attach(device_t dev);
144 static int acpi_cpu_suspend(device_t dev);
145 static int acpi_cpu_resume(device_t dev);
146 static int acpi_pcpu_get_id(uint32_t idx, uint32_t *acpi_id,
148 static struct resource_list *acpi_cpu_get_rlist(device_t dev, device_t child);
149 static device_t acpi_cpu_add_child(device_t bus, device_t parent, int order,
150 const char *name, int unit);
151 static int acpi_cpu_read_ivar(device_t dev, device_t child, int index,
153 static int acpi_cpu_shutdown(device_t dev);
154 static void acpi_cpu_cx_probe(struct acpi_cpu_softc *sc);
155 static void acpi_cpu_generic_cx_probe(struct acpi_cpu_softc *sc);
156 static int acpi_cpu_cx_cst(struct acpi_cpu_softc *sc);
157 static void acpi_cpu_startup(void *arg);
158 static void acpi_cpu_startup_cx(struct acpi_cpu_softc *sc);
159 static void acpi_cpu_cx_list(struct acpi_cpu_softc *sc);
160 static void acpi_cpu_idle(void);
161 static void acpi_cpu_notify(ACPI_HANDLE h, UINT32 notify, void *context);
162 static int acpi_cpu_quirks(void);
163 static int acpi_cpu_usage_sysctl(SYSCTL_HANDLER_ARGS);
164 static int acpi_cpu_set_cx_lowest(struct acpi_cpu_softc *sc, int val);
165 static int acpi_cpu_cx_lowest_sysctl(SYSCTL_HANDLER_ARGS);
166 static int acpi_cpu_global_cx_lowest_sysctl(SYSCTL_HANDLER_ARGS);
168 static void acpi_cpu_c1(void); /* XXX */
170 static device_method_t acpi_cpu_methods[] = {
171 /* Device interface */
172 DEVMETHOD(device_probe, acpi_cpu_probe),
173 DEVMETHOD(device_attach, acpi_cpu_attach),
174 DEVMETHOD(device_detach, bus_generic_detach),
175 DEVMETHOD(device_shutdown, acpi_cpu_shutdown),
176 DEVMETHOD(device_suspend, acpi_cpu_suspend),
177 DEVMETHOD(device_resume, acpi_cpu_resume),
180 DEVMETHOD(bus_add_child, acpi_cpu_add_child),
181 DEVMETHOD(bus_read_ivar, acpi_cpu_read_ivar),
182 DEVMETHOD(bus_get_resource_list, acpi_cpu_get_rlist),
183 DEVMETHOD(bus_get_resource, bus_generic_rl_get_resource),
184 DEVMETHOD(bus_set_resource, bus_generic_rl_set_resource),
185 DEVMETHOD(bus_alloc_resource, bus_generic_rl_alloc_resource),
186 DEVMETHOD(bus_release_resource, bus_generic_rl_release_resource),
187 DEVMETHOD(bus_driver_added, bus_generic_driver_added),
188 DEVMETHOD(bus_activate_resource, bus_generic_activate_resource),
189 DEVMETHOD(bus_deactivate_resource, bus_generic_deactivate_resource),
190 DEVMETHOD(bus_setup_intr, bus_generic_setup_intr),
191 DEVMETHOD(bus_teardown_intr, bus_generic_teardown_intr),
195 static driver_t acpi_cpu_driver = {
198 sizeof(struct acpi_cpu_softc),
201 static devclass_t acpi_cpu_devclass;
202 DRIVER_MODULE(cpu, acpi, acpi_cpu_driver, acpi_cpu_devclass, 0, 0);
203 MODULE_DEPEND(cpu, acpi, 1, 1, 1);
206 acpi_cpu_probe(device_t dev)
214 if (acpi_disabled("cpu") || acpi_get_type(dev) != ACPI_TYPE_PROCESSOR)
217 handle = acpi_get_handle(dev);
218 if (cpu_softc == NULL)
219 cpu_softc = kmalloc(sizeof(struct acpi_cpu_softc *) *
220 SMP_MAXCPU, M_TEMP /* XXX */, M_INTWAIT | M_ZERO);
222 /* Get our Processor object. */
224 buf.Length = ACPI_ALLOCATE_BUFFER;
225 status = AcpiEvaluateObject(handle, NULL, NULL, &buf);
226 if (ACPI_FAILURE(status)) {
227 device_printf(dev, "probe failed to get Processor obj - %s\n",
228 AcpiFormatException(status));
231 obj = (ACPI_OBJECT *)buf.Pointer;
232 if (obj->Type != ACPI_TYPE_PROCESSOR) {
233 device_printf(dev, "Processor object has bad type %d\n", obj->Type);
239 * Find the processor associated with our unit. We could use the
240 * ProcId as a key, however, some boxes do not have the same values
241 * in their Processor object as the ProcId values in the MADT.
243 acpi_id = obj->Processor.ProcId;
245 if (acpi_pcpu_get_id(device_get_unit(dev), &acpi_id, &cpu_id) != 0)
249 * Check if we already probed this processor. We scan the bus twice
250 * so it's possible we've already seen this one.
252 if (cpu_softc[cpu_id] != NULL)
255 /* Mark this processor as in-use and save our derived id for attach. */
256 cpu_softc[cpu_id] = (void *)1;
257 acpi_set_magic(dev, cpu_id);
258 device_set_desc(dev, "ACPI CPU");
264 acpi_cpu_attach(device_t dev)
267 ACPI_OBJECT arg[4], *obj;
268 ACPI_OBJECT_LIST arglist;
269 struct mdglobaldata *md;
270 struct acpi_cpu_softc *sc;
271 struct acpi_softc *acpi_sc;
274 int cpu_id, drv_count, i;
278 /* UUID needed by _OSC evaluation */
279 static uint8_t cpu_oscuuid[16] = { 0x16, 0xA6, 0x77, 0x40, 0x0C, 0x29,
280 0xBE, 0x47, 0x9E, 0xBD, 0xD8, 0x70,
281 0x58, 0x71, 0x39, 0x53 };
283 ACPI_FUNCTION_TRACE((char *)(uintptr_t)__func__);
285 sc = device_get_softc(dev);
287 sc->cpu_handle = acpi_get_handle(dev);
288 cpu_id = acpi_get_magic(dev);
289 cpu_softc[cpu_id] = sc;
290 md = (struct mdglobaldata *)globaldata_find(device_get_unit(dev));
292 cpu_smi_cmd = AcpiGbl_FADT.SmiCommand;
293 cpu_cst_cnt = AcpiGbl_FADT.CstControl;
296 buf.Length = ACPI_ALLOCATE_BUFFER;
297 status = AcpiEvaluateObject(sc->cpu_handle, NULL, NULL, &buf);
298 if (ACPI_FAILURE(status)) {
299 device_printf(dev, "attach failed to get Processor obj - %s\n",
300 AcpiFormatException(status));
303 obj = (ACPI_OBJECT *)buf.Pointer;
304 sc->cpu_p_blk = obj->Processor.PblkAddress;
305 sc->cpu_p_blk_len = obj->Processor.PblkLength;
306 sc->cpu_acpi_id = obj->Processor.ProcId;
308 ACPI_DEBUG_PRINT((ACPI_DB_INFO, "acpi_cpu%d: P_BLK at %#x/%d\n",
309 device_get_unit(dev), sc->cpu_p_blk, sc->cpu_p_blk_len));
312 * If this is the first cpu we attach, create and initialize the generic
313 * resources that will be used by all acpi cpu devices.
315 if (device_get_unit(dev) == 0) {
316 /* Assume we won't be using generic Cx mode by default */
317 cpu_cx_generic = FALSE;
319 /* Install hw.acpi.cpu sysctl tree */
320 acpi_sc = acpi_device_get_parent_softc(dev);
321 sysctl_ctx_init(&cpu_sysctl_ctx);
322 cpu_sysctl_tree = SYSCTL_ADD_NODE(&cpu_sysctl_ctx,
323 SYSCTL_CHILDREN(acpi_sc->acpi_sysctl_tree), OID_AUTO, "cpu",
324 CTLFLAG_RD, 0, "node for CPU children");
326 /* Queue post cpu-probing task handler */
327 AcpiOsExecute(OSL_NOTIFY_HANDLER, acpi_cpu_startup, NULL);
330 sysctl_ctx_init(&sc->cpu_sysctl_ctx);
331 sc->cpu_sysctl_tree = SYSCTL_ADD_NODE(&sc->cpu_sysctl_ctx,
332 SYSCTL_STATIC_CHILDREN(_hw), OID_AUTO,
333 device_get_nameunit(dev), CTLFLAG_RD,
337 * Before calling any CPU methods, collect child driver feature hints
338 * and notify ACPI of them. We support unified SMP power control
339 * so advertise this ourselves. Note this is not the same as independent
340 * SMP control where each CPU can have different settings.
342 sc->cpu_features = ACPI_CAP_SMP_SAME | ACPI_CAP_SMP_SAME_C3;
343 if (devclass_get_drivers(acpi_cpu_devclass, &drivers, &drv_count) == 0) {
344 for (i = 0; i < drv_count; i++) {
345 if (ACPI_GET_FEATURES(drivers[i], &features) == 0)
346 sc->cpu_features |= features;
348 kfree(drivers, M_TEMP);
352 * CPU capabilities are specified as a buffer of 32-bit integers:
353 * revision, count, and one or more capabilities. The revision of
354 * "1" is not specified anywhere but seems to match Linux.
356 if (sc->cpu_features) {
357 arglist.Pointer = arg;
359 arg[0].Type = ACPI_TYPE_BUFFER;
360 arg[0].Buffer.Length = sizeof(cap_set);
361 arg[0].Buffer.Pointer = (uint8_t *)cap_set;
362 cap_set[0] = 1; /* revision */
363 cap_set[1] = 1; /* number of capabilities integers */
364 cap_set[2] = sc->cpu_features;
365 AcpiEvaluateObject(sc->cpu_handle, "_PDC", &arglist, NULL);
368 * On some systems we need to evaluate _OSC so that the ASL
369 * loads the _PSS and/or _PDC methods at runtime.
371 * TODO: evaluate failure of _OSC.
373 arglist.Pointer = arg;
375 arg[0].Type = ACPI_TYPE_BUFFER;
376 arg[0].Buffer.Length = sizeof(cpu_oscuuid);
377 arg[0].Buffer.Pointer = cpu_oscuuid; /* UUID */
378 arg[1].Type = ACPI_TYPE_INTEGER;
379 arg[1].Integer.Value = 1; /* revision */
380 arg[2].Type = ACPI_TYPE_INTEGER;
381 arg[2].Integer.Value = 1; /* count */
382 arg[3].Type = ACPI_TYPE_BUFFER;
383 arg[3].Buffer.Length = sizeof(cap_set); /* Capabilities buffer */
384 arg[3].Buffer.Pointer = (uint8_t *)cap_set;
386 AcpiEvaluateObject(sc->cpu_handle, "_OSC", &arglist, NULL);
389 /* Probe for Cx state support. */
390 acpi_cpu_cx_probe(sc);
392 /* Finally, call identify and probe/attach for child devices. */
393 bus_generic_probe(dev);
394 bus_generic_attach(dev);
400 * Disable any entry to the idle function during suspend and re-enable it
404 acpi_cpu_suspend(device_t dev)
408 error = bus_generic_suspend(dev);
411 cpu_disable_idle = TRUE;
416 acpi_cpu_resume(device_t dev)
419 cpu_disable_idle = FALSE;
420 return (bus_generic_resume(dev));
424 * Find the nth present CPU and return its pc_cpuid as well as set the
425 * pc_acpi_id from the most reliable source.
428 acpi_pcpu_get_id(uint32_t idx, uint32_t *acpi_id, uint32_t *cpu_id)
430 struct mdglobaldata *md;
433 KASSERT(acpi_id != NULL, ("Null acpi_id"));
434 KASSERT(cpu_id != NULL, ("Null cpu_id"));
435 for (i = 0; i < ncpus; i++) {
436 if ((smp_active_mask & (1 << i)) == 0)
438 md = (struct mdglobaldata *)globaldata_find(i);
439 KASSERT(md != NULL, ("no pcpu data for %d", i));
442 * If pc_acpi_id was not initialized (e.g., a non-APIC UP box)
443 * override it with the value from the ASL. Otherwise, if the
444 * two don't match, prefer the MADT-derived value. Finally,
445 * return the pc_cpuid to reference this processor.
447 if (md->gd_acpi_id == 0xffffffff)
448 md->gd_acpi_id = *acpi_id;
449 else if (md->gd_acpi_id != *acpi_id)
450 *acpi_id = md->gd_acpi_id;
451 *cpu_id = md->mi.gd_cpuid;
459 static struct resource_list *
460 acpi_cpu_get_rlist(device_t dev, device_t child)
462 struct acpi_cpu_device *ad;
464 ad = device_get_ivars(child);
471 acpi_cpu_add_child(device_t bus, device_t parent, int order,
472 const char *name, int unit)
474 struct acpi_cpu_device *ad;
477 if ((ad = kmalloc(sizeof(*ad), M_TEMP, M_NOWAIT | M_ZERO)) == NULL)
480 resource_list_init(&ad->ad_rl);
482 child = device_add_child_ordered(parent, order, name, unit);
484 device_set_ivars(child, ad);
491 acpi_cpu_read_ivar(device_t dev, device_t child, int index, uintptr_t *result)
493 struct acpi_cpu_softc *sc;
495 sc = device_get_softc(dev);
497 case ACPI_IVAR_HANDLE:
498 *result = (uintptr_t)sc->cpu_handle;
502 *result = (uintptr_t)sc->cpu_pcpu;
512 acpi_cpu_shutdown(device_t dev)
514 ACPI_FUNCTION_TRACE((char *)(uintptr_t)__func__);
516 /* Allow children to shutdown first. */
517 bus_generic_shutdown(dev);
520 * Disable any entry to the idle function. There is a small race where
521 * an idle thread have passed this check but not gone to sleep. This
522 * is ok since device_shutdown() does not free the softc, otherwise
523 * we'd have to be sure all threads were evicted before returning.
525 cpu_disable_idle = TRUE;
531 acpi_cpu_cx_probe(struct acpi_cpu_softc *sc)
533 ACPI_FUNCTION_TRACE((char *)(uintptr_t)__func__);
535 /* Use initial sleep value of 1 sec. to start with lowest idle state. */
536 sc->cpu_prev_sleep = 1000000;
537 sc->cpu_cx_lowest = 0;
540 * Check for the ACPI 2.0 _CST sleep states object. If we can't find
541 * any, we'll revert to generic FADT/P_BLK Cx control method which will
542 * be handled by acpi_cpu_startup. We need to defer to after having
543 * probed all the cpus in the system before probing for generic Cx
544 * states as we may already have found cpus with valid _CST packages
546 if (!cpu_cx_generic && acpi_cpu_cx_cst(sc) != 0) {
548 * We were unable to find a _CST package for this cpu or there
549 * was an error parsing it. Switch back to generic mode.
551 cpu_cx_generic = TRUE;
553 device_printf(sc->cpu_dev, "switching to generic Cx mode\n");
557 * TODO: _CSD Package should be checked here.
562 acpi_cpu_generic_cx_probe(struct acpi_cpu_softc *sc)
564 ACPI_GENERIC_ADDRESS gas;
565 struct acpi_cx *cx_ptr;
567 sc->cpu_cx_count = 0;
568 cx_ptr = sc->cpu_cx_states;
570 /* Use initial sleep value of 1 sec. to start with lowest idle state. */
571 sc->cpu_prev_sleep = 1000000;
573 /* C1 has been required since just after ACPI 1.0 */
574 cx_ptr->type = ACPI_STATE_C1;
575 cx_ptr->trans_lat = 0;
580 * The spec says P_BLK must be 6 bytes long. However, some systems
581 * use it to indicate a fractional set of features present so we
582 * take 5 as C2. Some may also have a value of 7 to indicate
583 * another C3 but most use _CST for this (as required) and having
584 * "only" C1-C3 is not a hardship.
586 if (sc->cpu_p_blk_len < 5)
589 /* Validate and allocate resources for C2 (P_LVL2). */
590 gas.SpaceId = ACPI_ADR_SPACE_SYSTEM_IO;
592 if (AcpiGbl_FADT.C2Latency <= 100) {
593 gas.Address = sc->cpu_p_blk + 4;
594 cx_ptr->p_lvlx = acpi_bus_alloc_gas(sc->cpu_dev, &sc->cpu_rid, &gas,
596 if (cx_ptr->p_lvlx != NULL) {
598 cx_ptr->type = ACPI_STATE_C2;
599 cx_ptr->trans_lat = AcpiGbl_FADT.C2Latency;
604 if (sc->cpu_p_blk_len < 6)
607 /* Validate and allocate resources for C3 (P_LVL3). */
608 if (AcpiGbl_FADT.C3Latency <= 1000 && !(cpu_quirks & CPU_QUIRK_NO_C3)) {
609 gas.Address = sc->cpu_p_blk + 5;
610 cx_ptr->p_lvlx = acpi_bus_alloc_gas(sc->cpu_dev, &sc->cpu_rid, &gas,
612 if (cx_ptr->p_lvlx != NULL) {
614 cx_ptr->type = ACPI_STATE_C3;
615 cx_ptr->trans_lat = AcpiGbl_FADT.C3Latency;
621 /* Update the largest cx_count seen so far */
622 if (sc->cpu_cx_count > cpu_cx_count)
623 cpu_cx_count = sc->cpu_cx_count;
627 * Parse a _CST package and set up its Cx states. Since the _CST object
628 * can change dynamically, our notify handler may call this function
629 * to clean up and probe the new _CST package.
632 acpi_cpu_cx_cst(struct acpi_cpu_softc *sc)
634 struct acpi_cx *cx_ptr;
642 ACPI_FUNCTION_TRACE((char *)(uintptr_t)__func__);
645 buf.Length = ACPI_ALLOCATE_BUFFER;
646 status = AcpiEvaluateObject(sc->cpu_handle, "_CST", NULL, &buf);
647 if (ACPI_FAILURE(status))
650 /* _CST is a package with a count and at least one Cx package. */
651 top = (ACPI_OBJECT *)buf.Pointer;
652 if (!ACPI_PKG_VALID(top, 2) || acpi_PkgInt32(top, 0, &count) != 0) {
653 device_printf(sc->cpu_dev, "invalid _CST package\n");
654 AcpiOsFree(buf.Pointer);
657 if (count != top->Package.Count - 1) {
658 device_printf(sc->cpu_dev, "invalid _CST state count (%d != %d)\n",
659 count, top->Package.Count - 1);
660 count = top->Package.Count - 1;
662 if (count > MAX_CX_STATES) {
663 device_printf(sc->cpu_dev, "_CST has too many states (%d)\n", count);
664 count = MAX_CX_STATES;
667 /* Set up all valid states. */
668 sc->cpu_cx_count = 0;
669 cx_ptr = sc->cpu_cx_states;
670 for (i = 0; i < count; i++) {
671 pkg = &top->Package.Elements[i + 1];
672 if (!ACPI_PKG_VALID(pkg, 4) ||
673 acpi_PkgInt32(pkg, 1, &cx_ptr->type) != 0 ||
674 acpi_PkgInt32(pkg, 2, &cx_ptr->trans_lat) != 0 ||
675 acpi_PkgInt32(pkg, 3, &cx_ptr->power) != 0) {
677 device_printf(sc->cpu_dev, "skipping invalid Cx state package\n");
681 /* Validate the state to see if we should use it. */
682 switch (cx_ptr->type) {
689 if (cx_ptr->trans_lat > 100) {
690 ACPI_DEBUG_PRINT((ACPI_DB_INFO,
691 "acpi_cpu%d: C2[%d] not available.\n",
692 device_get_unit(sc->cpu_dev), i));
699 if (cx_ptr->trans_lat > 1000 ||
700 (cpu_quirks & CPU_QUIRK_NO_C3) != 0) {
702 ACPI_DEBUG_PRINT((ACPI_DB_INFO,
703 "acpi_cpu%d: C3[%d] not available.\n",
704 device_get_unit(sc->cpu_dev), i));
711 /* Free up any previous register. */
712 if (cx_ptr->p_lvlx != NULL) {
713 bus_release_resource(sc->cpu_dev, 0, 0, cx_ptr->p_lvlx);
714 cx_ptr->p_lvlx = NULL;
718 /* Allocate the control register for C2 or C3. */
719 acpi_PkgGas(sc->cpu_dev, pkg, 0, &sc->cpu_rid, &cx_ptr->p_lvlx,
721 if (cx_ptr->p_lvlx) {
723 ACPI_DEBUG_PRINT((ACPI_DB_INFO,
724 "acpi_cpu%d: Got C%d - %d latency\n",
725 device_get_unit(sc->cpu_dev), cx_ptr->type,
731 AcpiOsFree(buf.Pointer);
737 * Call this *after* all CPUs have been attached.
740 acpi_cpu_startup(void *arg)
742 struct acpi_cpu_softc *sc;
745 /* Get set of CPU devices */
746 devclass_get_devices(acpi_cpu_devclass, &cpu_devices, &cpu_ndevices);
749 * Setup any quirks that might necessary now that we have probed
755 if (cpu_cx_generic) {
757 * We are using generic Cx mode, probe for available Cx states
758 * for all processors.
760 for (i = 0; i < cpu_ndevices; i++) {
761 sc = device_get_softc(cpu_devices[i]);
762 acpi_cpu_generic_cx_probe(sc);
766 * Find the highest Cx state common to all CPUs
767 * in the system, taking quirks into account.
769 for (i = 0; i < cpu_ndevices; i++) {
770 sc = device_get_softc(cpu_devices[i]);
771 if (sc->cpu_cx_count < cpu_cx_count)
772 cpu_cx_count = sc->cpu_cx_count;
776 * We are using _CST mode, remove C3 state if necessary.
777 * Update the largest Cx state supported in the global cpu_cx_count.
778 * It will be used in the global Cx sysctl handler.
779 * As we now know for sure that we will be using _CST mode
780 * install our notify handler.
782 for (i = 0; i < cpu_ndevices; i++) {
783 sc = device_get_softc(cpu_devices[i]);
784 if (cpu_quirks & CPU_QUIRK_NO_C3) {
785 sc->cpu_cx_count = sc->cpu_non_c3 + 1;
787 if (sc->cpu_cx_count > cpu_cx_count)
788 cpu_cx_count = sc->cpu_cx_count;
789 AcpiInstallNotifyHandler(sc->cpu_handle, ACPI_DEVICE_NOTIFY,
790 acpi_cpu_notify, sc);
794 /* Perform Cx final initialization. */
795 for (i = 0; i < cpu_ndevices; i++) {
796 sc = device_get_softc(cpu_devices[i]);
797 acpi_cpu_startup_cx(sc);
800 /* Add a sysctl handler to handle global Cx lowest setting */
801 SYSCTL_ADD_PROC(&cpu_sysctl_ctx, SYSCTL_CHILDREN(cpu_sysctl_tree),
802 OID_AUTO, "cx_lowest", CTLTYPE_STRING | CTLFLAG_RW,
803 NULL, 0, acpi_cpu_global_cx_lowest_sysctl, "A",
804 "Global lowest Cx sleep state to use");
806 /* Take over idling from cpu_idle_default(). */
808 cpu_disable_idle = FALSE;
809 cpu_idle_hook = acpi_cpu_idle;
813 acpi_cpu_cx_list(struct acpi_cpu_softc *sc)
819 * Set up the list of Cx states
822 sbuf_new(&sb, sc->cpu_cx_supported, sizeof(sc->cpu_cx_supported),
824 for (i = 0; i < sc->cpu_cx_count; i++) {
825 sbuf_printf(&sb, "C%d/%d ", i + 1, sc->cpu_cx_states[i].trans_lat);
826 if (sc->cpu_cx_states[i].type < ACPI_STATE_C3)
834 acpi_cpu_startup_cx(struct acpi_cpu_softc *sc)
836 acpi_cpu_cx_list(sc);
838 SYSCTL_ADD_STRING(&sc->cpu_sysctl_ctx,
839 SYSCTL_CHILDREN(sc->cpu_sysctl_tree),
840 OID_AUTO, "cx_supported", CTLFLAG_RD,
841 sc->cpu_cx_supported, 0,
842 "Cx/microsecond values for supported Cx states");
843 SYSCTL_ADD_PROC(&sc->cpu_sysctl_ctx,
844 SYSCTL_CHILDREN(sc->cpu_sysctl_tree),
845 OID_AUTO, "cx_lowest", CTLTYPE_STRING | CTLFLAG_RW,
846 (void *)sc, 0, acpi_cpu_cx_lowest_sysctl, "A",
847 "lowest Cx sleep state to use");
848 SYSCTL_ADD_PROC(&sc->cpu_sysctl_ctx,
849 SYSCTL_CHILDREN(sc->cpu_sysctl_tree),
850 OID_AUTO, "cx_usage", CTLTYPE_STRING | CTLFLAG_RD,
851 (void *)sc, 0, acpi_cpu_usage_sysctl, "A",
852 "percent usage for each Cx state");
855 /* Signal platform that we can handle _CST notification. */
856 if (!cpu_cx_generic && cpu_cst_cnt != 0) {
858 AcpiOsWritePort(cpu_smi_cmd, cpu_cst_cnt, 8);
865 * Idle the CPU in the lowest state possible. This function is called with
866 * interrupts disabled. Note that once it re-enables interrupts, a task
867 * switch can occur so do not access shared data (i.e. the softc) after
868 * interrupts are re-enabled.
873 struct acpi_cpu_softc *sc;
874 struct acpi_cx *cx_next;
875 uint32_t start_time, end_time;
876 int bm_active, cx_next_idx, i;
878 /* If disabled, return immediately. */
879 if (cpu_disable_idle) {
885 * Look up our CPU id to get our softc. If it's NULL, we'll use C1
886 * since there is no ACPI processor object for this CPU. This occurs
887 * for logical CPUs in the HTT case.
889 sc = cpu_softc[mdcpu->mi.gd_cpuid];
896 * If we slept 100 us or more, use the lowest Cx state. Otherwise,
897 * find the lowest state that has a latency less than or equal to
898 * the length of our last sleep.
900 cx_next_idx = sc->cpu_cx_lowest;
901 if (sc->cpu_prev_sleep < 100) {
903 * If we sleep too short all the time, this system may not implement
904 * C2/3 correctly (i.e. reads return immediately). In this case,
905 * back off and use the next higher level.
906 * It seems that when you have a dual core cpu (like the Intel Core Duo)
907 * that both cores will get out of C3 state as soon as one of them
908 * requires it. This breaks the sleep detection logic as the sleep
909 * counter is local to each cpu. Disable the sleep logic for now as a
910 * workaround if there's more than one CPU. The right fix would probably
911 * be to add quirks for system that don't really support C3 state.
913 if (ncpus < 2 && sc->cpu_prev_sleep <= 1) {
915 if (sc->cpu_short_slp == 1000 && sc->cpu_cx_lowest != 0) {
916 if (sc->cpu_non_c3 == sc->cpu_cx_lowest && sc->cpu_non_c3 != 0)
919 sc->cpu_short_slp = 0;
920 device_printf(sc->cpu_dev,
921 "too many short sleeps, backing off to C%d\n",
922 sc->cpu_cx_lowest + 1);
925 sc->cpu_short_slp = 0;
927 for (i = sc->cpu_cx_lowest; i >= 0; i--)
928 if (sc->cpu_cx_states[i].trans_lat <= sc->cpu_prev_sleep) {
935 * Check for bus master activity. If there was activity, clear
936 * the bit and use the lowest non-C3 state. Note that the USB
937 * driver polling for new devices keeps this bit set all the
938 * time if USB is loaded.
940 if ((cpu_quirks & CPU_QUIRK_NO_BM_CTRL) == 0) {
941 AcpiGetRegister(ACPI_BITREG_BUS_MASTER_STATUS, &bm_active);
942 if (bm_active != 0) {
943 AcpiSetRegister(ACPI_BITREG_BUS_MASTER_STATUS, 1);
944 cx_next_idx = min(cx_next_idx, sc->cpu_non_c3);
948 /* Select the next state and update statistics. */
949 cx_next = &sc->cpu_cx_states[cx_next_idx];
950 sc->cpu_cx_stats[cx_next_idx]++;
951 KASSERT(cx_next->type != ACPI_STATE_C0, ("acpi_cpu_idle: C0 sleep"));
954 * Execute HLT (or equivalent) and wait for an interrupt. We can't
955 * calculate the time spent in C1 since the place we wake up is an
956 * ISR. Assume we slept one quantum and return.
958 if (cx_next->type == ACPI_STATE_C1) {
959 sc->cpu_prev_sleep = 1000000 / hz;
965 * For C3, disable bus master arbitration and enable bus master wake
966 * if BM control is available, otherwise flush the CPU cache.
968 if (cx_next->type == ACPI_STATE_C3) {
969 if ((cpu_quirks & CPU_QUIRK_NO_BM_CTRL) == 0) {
970 AcpiSetRegister(ACPI_BITREG_ARB_DISABLE, 1);
971 AcpiSetRegister(ACPI_BITREG_BUS_MASTER_RLD, 1);
973 ACPI_FLUSH_CPU_CACHE();
977 * Read from P_LVLx to enter C2(+), checking time spent asleep.
978 * Use the ACPI timer for measuring sleep time. Since we need to
979 * get the time very close to the CPU start/stop clock logic, this
980 * is the only reliable time source.
982 AcpiHwLowLevelRead(32, &start_time, &AcpiGbl_FADT.XPmTimerBlock);
983 CPU_GET_REG(cx_next->p_lvlx, 1);
986 * Read the end time twice. Since it may take an arbitrary time
987 * to enter the idle state, the first read may be executed before
988 * the processor has stopped. Doing it again provides enough
989 * margin that we are certain to have a correct value.
991 AcpiHwLowLevelRead(32, &end_time, &AcpiGbl_FADT.XPmTimerBlock);
992 AcpiHwLowLevelRead(32, &end_time, &AcpiGbl_FADT.XPmTimerBlock);
994 /* Enable bus master arbitration and disable bus master wakeup. */
995 if (cx_next->type == ACPI_STATE_C3 &&
996 (cpu_quirks & CPU_QUIRK_NO_BM_CTRL) == 0) {
997 AcpiSetRegister(ACPI_BITREG_ARB_DISABLE, 0);
998 AcpiSetRegister(ACPI_BITREG_BUS_MASTER_RLD, 0);
1002 /* Find the actual time asleep in microseconds, minus overhead. */
1003 end_time = acpi_TimerDelta(end_time, start_time);
1004 sc->cpu_prev_sleep = PM_USEC(end_time) - cx_next->trans_lat;
1008 * Re-evaluate the _CST object when we are notified that it changed.
1010 * XXX Re-evaluation disabled until locking is done.
1013 acpi_cpu_notify(ACPI_HANDLE h, UINT32 notify, void *context)
1015 struct acpi_cpu_softc *sc = (struct acpi_cpu_softc *)context;
1016 struct acpi_cpu_softc *isc;
1019 if (notify != ACPI_NOTIFY_CX_STATES)
1022 /* Update the list of Cx states. */
1023 acpi_cpu_cx_cst(sc);
1024 acpi_cpu_cx_list(sc);
1026 /* Update the new lowest useable Cx state for all CPUs. */
1029 for (i = 0; i < cpu_ndevices; i++) {
1030 isc = device_get_softc(cpu_devices[i]);
1031 if (isc->cpu_cx_count > cpu_cx_count)
1032 cpu_cx_count = isc->cpu_cx_count;
1038 acpi_cpu_quirks(void)
1043 ACPI_FUNCTION_TRACE((char *)(uintptr_t)__func__);
1046 * Bus mastering arbitration control is needed to keep caches coherent
1047 * while sleeping in C3. If it's not present but a working flush cache
1048 * instruction is present, flush the caches before entering C3 instead.
1049 * Otherwise, just disable C3 completely.
1051 if (AcpiGbl_FADT.Pm2ControlBlock == 0 ||
1052 AcpiGbl_FADT.Pm2ControlLength == 0) {
1053 if ((AcpiGbl_FADT.Flags & ACPI_FADT_WBINVD) &&
1054 (AcpiGbl_FADT.Flags & ACPI_FADT_WBINVD_FLUSH) == 0) {
1055 cpu_quirks |= CPU_QUIRK_NO_BM_CTRL;
1056 ACPI_DEBUG_PRINT((ACPI_DB_INFO,
1057 "acpi_cpu: no BM control, using flush cache method\n"));
1059 cpu_quirks |= CPU_QUIRK_NO_C3;
1060 ACPI_DEBUG_PRINT((ACPI_DB_INFO,
1061 "acpi_cpu: no BM control, C3 not available\n"));
1066 * If we are using generic Cx mode, C3 on multiple CPUs requires using
1067 * the expensive flush cache instruction.
1069 if (cpu_cx_generic && ncpus > 1) {
1070 cpu_quirks |= CPU_QUIRK_NO_BM_CTRL;
1071 ACPI_DEBUG_PRINT((ACPI_DB_INFO,
1072 "acpi_cpu: SMP, using flush cache mode for C3\n"));
1075 /* Look for various quirks of the PIIX4 part. */
1076 acpi_dev = pci_find_device(PCI_VENDOR_INTEL, PCI_DEVICE_82371AB_3);
1077 if (acpi_dev != NULL) {
1078 switch (pci_get_revid(acpi_dev)) {
1080 * Disable C3 support for all PIIX4 chipsets. Some of these parts
1081 * do not report the BMIDE status to the BM status register and
1082 * others have a livelock bug if Type-F DMA is enabled. Linux
1083 * works around the BMIDE bug by reading the BM status directly
1084 * but we take the simpler approach of disabling C3 for these
1087 * See erratum #18 ("C3 Power State/BMIDE and Type-F DMA
1088 * Livelock") from the January 2002 PIIX4 specification update.
1089 * Applies to all PIIX4 models.
1091 * Also, make sure that all interrupts cause a "Stop Break"
1092 * event to exit from C2 state.
1094 case PCI_REVISION_A_STEP:
1095 case PCI_REVISION_B_STEP:
1096 case PCI_REVISION_4E:
1097 case PCI_REVISION_4M:
1098 cpu_quirks |= CPU_QUIRK_NO_C3;
1099 ACPI_DEBUG_PRINT((ACPI_DB_INFO,
1100 "acpi_cpu: working around PIIX4 bug, disabling C3\n"));
1102 val = pci_read_config(acpi_dev, PIIX4_DEVACTB_REG, 4);
1103 if ((val & PIIX4_STOP_BREAK_MASK) != PIIX4_STOP_BREAK_MASK) {
1104 ACPI_DEBUG_PRINT((ACPI_DB_INFO,
1105 "PIIX4: enabling IRQs to generate Stop Break\n"));
1106 val |= PIIX4_STOP_BREAK_MASK;
1107 pci_write_config(acpi_dev, PIIX4_DEVACTB_REG, val, 4);
1119 acpi_cpu_usage_sysctl(SYSCTL_HANDLER_ARGS)
1121 struct acpi_cpu_softc *sc;
1125 uintmax_t fract, sum, whole;
1127 sc = (struct acpi_cpu_softc *) arg1;
1129 for (i = 0; i < sc->cpu_cx_count; i++)
1130 sum += sc->cpu_cx_stats[i];
1131 sbuf_new(&sb, buf, sizeof(buf), SBUF_FIXEDLEN);
1132 for (i = 0; i < sc->cpu_cx_count; i++) {
1134 whole = (uintmax_t)sc->cpu_cx_stats[i] * 100;
1135 fract = (whole % sum) * 100;
1136 sbuf_printf(&sb, "%u.%02u%% ", (u_int)(whole / sum),
1137 (u_int)(fract / sum));
1139 sbuf_printf(&sb, "0%% ");
1143 sysctl_handle_string(oidp, sbuf_data(&sb), sbuf_len(&sb), req);
1150 acpi_cpu_set_cx_lowest(struct acpi_cpu_softc *sc, int val)
1154 sc->cpu_cx_lowest = val;
1156 /* If not disabling, cache the new lowest non-C3 state. */
1158 for (i = sc->cpu_cx_lowest; i >= 0; i--) {
1159 if (sc->cpu_cx_states[i].type < ACPI_STATE_C3) {
1165 /* Reset the statistics counters. */
1166 bzero(sc->cpu_cx_stats, sizeof(sc->cpu_cx_stats));
1171 acpi_cpu_cx_lowest_sysctl(SYSCTL_HANDLER_ARGS)
1173 struct acpi_cpu_softc *sc;
1177 sc = (struct acpi_cpu_softc *) arg1;
1178 ksnprintf(state, sizeof(state), "C%d", sc->cpu_cx_lowest + 1);
1179 error = sysctl_handle_string(oidp, state, sizeof(state), req);
1180 if (error != 0 || req->newptr == NULL)
1182 if (strlen(state) < 2 || toupper(state[0]) != 'C')
1184 val = (int) strtol(state + 1, NULL, 10) - 1;
1185 if (val < 0 || val > sc->cpu_cx_count - 1)
1189 acpi_cpu_set_cx_lowest(sc, val);
1196 acpi_cpu_global_cx_lowest_sysctl(SYSCTL_HANDLER_ARGS)
1198 struct acpi_cpu_softc *sc;
1202 ksnprintf(state, sizeof(state), "C%d", cpu_cx_lowest + 1);
1203 error = sysctl_handle_string(oidp, state, sizeof(state), req);
1204 if (error != 0 || req->newptr == NULL)
1206 if (strlen(state) < 2 || toupper(state[0]) != 'C')
1208 val = (int) strtol(state + 1, NULL, 10) - 1;
1209 if (val < 0 || val > cpu_cx_count - 1)
1211 cpu_cx_lowest = val;
1213 /* Update the new lowest useable Cx state for all CPUs. */
1215 for (i = 0; i < cpu_ndevices; i++) {
1216 sc = device_get_softc(cpu_devices[i]);
1217 acpi_cpu_set_cx_lowest(sc, val);
1225 * Put the CPU in C1 in a machine-dependant way.
1226 * XXX: shouldn't be here!
1232 ia64_call_pal_static(PAL_HALT_LIGHT, 0, 0, 0);
1236 if (!lwkt_runnable())
1237 __asm __volatile("sti; hlt");
1239 __asm __volatile("sti; pause");
1241 if (!lwkt_runnable())
1242 __asm __volatile("sti; hlt");
1244 __asm __volatile("sti");
1246 #endif /* !__ia64__ */