sys/contrib/edk2/Include/IndustryStandard/Acpi51.h

   1 /** @file
   2   ACPI 5.1 definitions from the ACPI Specification Revision 5.1 Errata B January, 2016.
   3
   4   Copyright (c) 2014 Hewlett-Packard Development Company, L.P.<BR>
   5   Copyright (c) 2014 - 2018, Intel Corporation. All rights reserved.<BR>
   6   (C) Copyright 2015 Hewlett Packard Enterprise Development LP<BR>
   7   SPDX-License-Identifier: BSD-2-Clause-Patent
   8 **/
   9
  10 #ifndef _ACPI_5_1_H_
  11 #define _ACPI_5_1_H_
  12
  13 #include <IndustryStandard/Acpi50.h>
  14
  15 //
  16 // Ensure proper structure formats
  17 //
  18 #pragma pack(1)
  19
  20 ///
  21 /// ACPI 5.1 Generic Address Space definition
  22 ///
  23 typedef struct {
  24   UINT8   AddressSpaceId;
  25   UINT8   RegisterBitWidth;
  26   UINT8   RegisterBitOffset;
  27   UINT8   AccessSize;
  28   UINT64  Address;
  29 } EFI_ACPI_5_1_GENERIC_ADDRESS_STRUCTURE;
  30
  31 //
  32 // Generic Address Space Address IDs
  33 //
  34 #define EFI_ACPI_5_1_SYSTEM_MEMORY              0
  35 #define EFI_ACPI_5_1_SYSTEM_IO                  1
  36 #define EFI_ACPI_5_1_PCI_CONFIGURATION_SPACE    2
  37 #define EFI_ACPI_5_1_EMBEDDED_CONTROLLER        3
  38 #define EFI_ACPI_5_1_SMBUS                      4
  39 #define EFI_ACPI_5_1_PLATFORM_COMMUNICATION_CHANNEL  0x0A
  40 #define EFI_ACPI_5_1_FUNCTIONAL_FIXED_HARDWARE       0x7F
  41
  42 //
  43 // Generic Address Space Access Sizes
  44 //
  45 #define EFI_ACPI_5_1_UNDEFINED  0
  46 #define EFI_ACPI_5_1_BYTE       1
  47 #define EFI_ACPI_5_1_WORD       2
  48 #define EFI_ACPI_5_1_DWORD      3
  49 #define EFI_ACPI_5_1_QWORD      4
  50
  51 //
  52 // ACPI 5.1 table structures
  53 //
  54
  55 ///
  56 /// Root System Description Pointer Structure
  57 ///
  58 typedef struct {
  59   UINT64  Signature;
  60   UINT8   Checksum;
  61   UINT8   OemId[6];
  62   UINT8   Revision;
  63   UINT32  RsdtAddress;
  64   UINT32  Length;
  65   UINT64  XsdtAddress;
  66   UINT8   ExtendedChecksum;
  67   UINT8   Reserved[3];
  68 } EFI_ACPI_5_1_ROOT_SYSTEM_DESCRIPTION_POINTER;
  69
  70 ///
  71 /// RSD_PTR Revision (as defined in ACPI 5.1 spec.)
  72 ///
  73 #define EFI_ACPI_5_1_ROOT_SYSTEM_DESCRIPTION_POINTER_REVISION 0x02  ///< ACPISpec (Revision 5.1) says current value is 2
  74
  75 ///
  76 /// Common table header, this prefaces all ACPI tables, including FACS, but
  77 /// excluding the RSD PTR structure
  78 ///
  79 typedef struct {
  80   UINT32  Signature;
  81   UINT32  Length;
  82 } EFI_ACPI_5_1_COMMON_HEADER;
  83
  84 //
  85 // Root System Description Table
  86 // No definition needed as it is a common description table header, the same with
  87 // EFI_ACPI_DESCRIPTION_HEADER, followed by a variable number of UINT32 table pointers.
  88 //
  89
  90 ///
  91 /// RSDT Revision (as defined in ACPI 5.1 spec.)
  92 ///
  93 #define EFI_ACPI_5_1_ROOT_SYSTEM_DESCRIPTION_TABLE_REVISION 0x01
  94
  95 //
  96 // Extended System Description Table
  97 // No definition needed as it is a common description table header, the same with
  98 // EFI_ACPI_DESCRIPTION_HEADER, followed by a variable number of UINT64 table pointers.
  99 //
 100
 101 ///
 102 /// XSDT Revision (as defined in ACPI 5.1 spec.)
 103 ///
 104 #define EFI_ACPI_5_1_EXTENDED_SYSTEM_DESCRIPTION_TABLE_REVISION 0x01
 105
 106 ///
 107 /// Fixed ACPI Description Table Structure (FADT)
 108 ///
 109 typedef struct {
 110   EFI_ACPI_DESCRIPTION_HEADER             Header;
 111   UINT32                                  FirmwareCtrl;
 112   UINT32                                  Dsdt;
 113   UINT8                                   Reserved0;
 114   UINT8                                   PreferredPmProfile;
 115   UINT16                                  SciInt;
 116   UINT32                                  SmiCmd;
 117   UINT8                                   AcpiEnable;
 118   UINT8                                   AcpiDisable;
 119   UINT8                                   S4BiosReq;
 120   UINT8                                   PstateCnt;
 121   UINT32                                  Pm1aEvtBlk;
 122   UINT32                                  Pm1bEvtBlk;
 123   UINT32                                  Pm1aCntBlk;
 124   UINT32                                  Pm1bCntBlk;
 125   UINT32                                  Pm2CntBlk;
 126   UINT32                                  PmTmrBlk;
 127   UINT32                                  Gpe0Blk;
 128   UINT32                                  Gpe1Blk;
 129   UINT8                                   Pm1EvtLen;
 130   UINT8                                   Pm1CntLen;
 131   UINT8                                   Pm2CntLen;
 132   UINT8                                   PmTmrLen;
 133   UINT8                                   Gpe0BlkLen;
 134   UINT8                                   Gpe1BlkLen;
 135   UINT8                                   Gpe1Base;
 136   UINT8                                   CstCnt;
 137   UINT16                                  PLvl2Lat;
 138   UINT16                                  PLvl3Lat;
 139   UINT16                                  FlushSize;
 140   UINT16                                  FlushStride;
 141   UINT8                                   DutyOffset;
 142   UINT8                                   DutyWidth;
 143   UINT8                                   DayAlrm;
 144   UINT8                                   MonAlrm;
 145   UINT8                                   Century;
 146   UINT16                                  IaPcBootArch;
 147   UINT8                                   Reserved1;
 148   UINT32                                  Flags;
 149   EFI_ACPI_5_1_GENERIC_ADDRESS_STRUCTURE  ResetReg;
 150   UINT8                                   ResetValue;
 151   UINT16                                  ArmBootArch;
 152   UINT8                                   MinorVersion;
 153   UINT64                                  XFirmwareCtrl;
 154   UINT64                                  XDsdt;
 155   EFI_ACPI_5_1_GENERIC_ADDRESS_STRUCTURE  XPm1aEvtBlk;
 156   EFI_ACPI_5_1_GENERIC_ADDRESS_STRUCTURE  XPm1bEvtBlk;
 157   EFI_ACPI_5_1_GENERIC_ADDRESS_STRUCTURE  XPm1aCntBlk;
 158   EFI_ACPI_5_1_GENERIC_ADDRESS_STRUCTURE  XPm1bCntBlk;
 159   EFI_ACPI_5_1_GENERIC_ADDRESS_STRUCTURE  XPm2CntBlk;
 160   EFI_ACPI_5_1_GENERIC_ADDRESS_STRUCTURE  XPmTmrBlk;
 161   EFI_ACPI_5_1_GENERIC_ADDRESS_STRUCTURE  XGpe0Blk;
 162   EFI_ACPI_5_1_GENERIC_ADDRESS_STRUCTURE  XGpe1Blk;
 163   EFI_ACPI_5_1_GENERIC_ADDRESS_STRUCTURE  SleepControlReg;
 164   EFI_ACPI_5_1_GENERIC_ADDRESS_STRUCTURE  SleepStatusReg;
 165 } EFI_ACPI_5_1_FIXED_ACPI_DESCRIPTION_TABLE;
 166
 167 ///
 168 /// FADT Version (as defined in ACPI 5.1 spec.)
 169 ///
 170 #define EFI_ACPI_5_1_FIXED_ACPI_DESCRIPTION_TABLE_REVISION  0x05
 171 #define EFI_ACPI_5_1_FIXED_ACPI_DESCRIPTION_TABLE_MINOR_REVISION  0x01
 172
 173 //
 174 // Fixed ACPI Description Table Preferred Power Management Profile
 175 //
 176 #define EFI_ACPI_5_1_PM_PROFILE_UNSPECIFIED         0
 177 #define EFI_ACPI_5_1_PM_PROFILE_DESKTOP             1
 178 #define EFI_ACPI_5_1_PM_PROFILE_MOBILE              2
 179 #define EFI_ACPI_5_1_PM_PROFILE_WORKSTATION         3
 180 #define EFI_ACPI_5_1_PM_PROFILE_ENTERPRISE_SERVER   4
 181 #define EFI_ACPI_5_1_PM_PROFILE_SOHO_SERVER         5
 182 #define EFI_ACPI_5_1_PM_PROFILE_APPLIANCE_PC        6
 183 #define EFI_ACPI_5_1_PM_PROFILE_PERFORMANCE_SERVER  7
 184 #define EFI_ACPI_5_1_PM_PROFILE_TABLET              8
 185
 186 //
 187 // Fixed ACPI Description Table Boot Architecture Flags
 188 // All other bits are reserved and must be set to 0.
 189 //
 190 #define EFI_ACPI_5_1_LEGACY_DEVICES              BIT0
 191 #define EFI_ACPI_5_1_8042                        BIT1
 192 #define EFI_ACPI_5_1_VGA_NOT_PRESENT             BIT2
 193 #define EFI_ACPI_5_1_MSI_NOT_SUPPORTED           BIT3
 194 #define EFI_ACPI_5_1_PCIE_ASPM_CONTROLS          BIT4
 195 #define EFI_ACPI_5_1_CMOS_RTC_NOT_PRESENT        BIT5
 196
 197 //
 198 // Fixed ACPI Description Table Arm Boot Architecture Flags
 199 // All other bits are reserved and must be set to 0.
 200 //
 201 #define EFI_ACPI_5_1_ARM_PSCI_COMPLIANT              BIT0
 202 #define EFI_ACPI_5_1_ARM_PSCI_USE_HVC                BIT1
 203
 204 //
 205 // Fixed ACPI Description Table Fixed Feature Flags
 206 // All other bits are reserved and must be set to 0.
 207 //
 208 #define EFI_ACPI_5_1_WBINVD                                 BIT0
 209 #define EFI_ACPI_5_1_WBINVD_FLUSH                           BIT1
 210 #define EFI_ACPI_5_1_PROC_C1                                BIT2
 211 #define EFI_ACPI_5_1_P_LVL2_UP                              BIT3
 212 #define EFI_ACPI_5_1_PWR_BUTTON                             BIT4
 213 #define EFI_ACPI_5_1_SLP_BUTTON                             BIT5
 214 #define EFI_ACPI_5_1_FIX_RTC                                BIT6
 215 #define EFI_ACPI_5_1_RTC_S4                                 BIT7
 216 #define EFI_ACPI_5_1_TMR_VAL_EXT                            BIT8
 217 #define EFI_ACPI_5_1_DCK_CAP                                BIT9
 218 #define EFI_ACPI_5_1_RESET_REG_SUP                          BIT10
 219 #define EFI_ACPI_5_1_SEALED_CASE                            BIT11
 220 #define EFI_ACPI_5_1_HEADLESS                               BIT12
 221 #define EFI_ACPI_5_1_CPU_SW_SLP                             BIT13
 222 #define EFI_ACPI_5_1_PCI_EXP_WAK                            BIT14
 223 #define EFI_ACPI_5_1_USE_PLATFORM_CLOCK                     BIT15
 224 #define EFI_ACPI_5_1_S4_RTC_STS_VALID                       BIT16
 225 #define EFI_ACPI_5_1_REMOTE_POWER_ON_CAPABLE                BIT17
 226 #define EFI_ACPI_5_1_FORCE_APIC_CLUSTER_MODEL               BIT18
 227 #define EFI_ACPI_5_1_FORCE_APIC_PHYSICAL_DESTINATION_MODE   BIT19
 228 #define EFI_ACPI_5_1_HW_REDUCED_ACPI                        BIT20
 229 #define EFI_ACPI_5_1_LOW_POWER_S0_IDLE_CAPABLE              BIT21
 230
 231 ///
 232 /// Firmware ACPI Control Structure
 233 ///
 234 typedef struct {
 235   UINT32  Signature;
 236   UINT32  Length;
 237   UINT32  HardwareSignature;
 238   UINT32  FirmwareWakingVector;
 239   UINT32  GlobalLock;
 240   UINT32  Flags;
 241   UINT64  XFirmwareWakingVector;
 242   UINT8   Version;
 243   UINT8   Reserved0[3];
 244   UINT32  OspmFlags;
 245   UINT8   Reserved1[24];
 246 } EFI_ACPI_5_1_FIRMWARE_ACPI_CONTROL_STRUCTURE;
 247
 248 ///
 249 /// FACS Version (as defined in ACPI 5.1 spec.)
 250 ///
 251 #define EFI_ACPI_5_1_FIRMWARE_ACPI_CONTROL_STRUCTURE_VERSION  0x02
 252
 253 ///
 254 /// Firmware Control Structure Feature Flags
 255 /// All other bits are reserved and must be set to 0.
 256 ///
 257 #define EFI_ACPI_5_1_S4BIOS_F                     BIT0
 258 #define EFI_ACPI_5_1_64BIT_WAKE_SUPPORTED_F       BIT1
 259
 260 ///
 261 /// OSPM Enabled Firmware Control Structure Flags
 262 /// All other bits are reserved and must be set to 0.
 263 ///
 264 #define EFI_ACPI_5_1_OSPM_64BIT_WAKE_F            BIT0
 265
 266 //
 267 // Differentiated System Description Table,
 268 // Secondary System Description Table
 269 // and Persistent System Description Table,
 270 // no definition needed as they are common description table header, the same with
 271 // EFI_ACPI_DESCRIPTION_HEADER, followed by a definition block.
 272 //
 273 #define EFI_ACPI_5_1_DIFFERENTIATED_SYSTEM_DESCRIPTION_TABLE_REVISION   0x02
 274 #define EFI_ACPI_5_1_SECONDARY_SYSTEM_DESCRIPTION_TABLE_REVISION        0x02
 275
 276 ///
 277 /// Multiple APIC Description Table header definition.  The rest of the table
 278 /// must be defined in a platform specific manner.
 279 ///
 280 typedef struct {
 281   EFI_ACPI_DESCRIPTION_HEADER Header;
 282   UINT32                      LocalApicAddress;
 283   UINT32                      Flags;
 284 } EFI_ACPI_5_1_MULTIPLE_APIC_DESCRIPTION_TABLE_HEADER;
 285
 286 ///
 287 /// MADT Revision (as defined in ACPI 5.1 spec.)
 288 ///
 289 #define EFI_ACPI_5_1_MULTIPLE_APIC_DESCRIPTION_TABLE_REVISION 0x03
 290
 291 ///
 292 /// Multiple APIC Flags
 293 /// All other bits are reserved and must be set to 0.
 294 ///
 295 #define EFI_ACPI_5_1_PCAT_COMPAT         BIT0
 296
 297 //
 298 // Multiple APIC Description Table APIC structure types
 299 // All other values between 0x0D and 0x7F are reserved and
 300 // will be ignored by OSPM. 0x80 ~ 0xFF are reserved for OEM.
 301 //
 302 #define EFI_ACPI_5_1_PROCESSOR_LOCAL_APIC           0x00
 303 #define EFI_ACPI_5_1_IO_APIC                        0x01
 304 #define EFI_ACPI_5_1_INTERRUPT_SOURCE_OVERRIDE      0x02
 305 #define EFI_ACPI_5_1_NON_MASKABLE_INTERRUPT_SOURCE  0x03
 306 #define EFI_ACPI_5_1_LOCAL_APIC_NMI                 0x04
 307 #define EFI_ACPI_5_1_LOCAL_APIC_ADDRESS_OVERRIDE    0x05
 308 #define EFI_ACPI_5_1_IO_SAPIC                       0x06
 309 #define EFI_ACPI_5_1_LOCAL_SAPIC                    0x07
 310 #define EFI_ACPI_5_1_PLATFORM_INTERRUPT_SOURCES     0x08
 311 #define EFI_ACPI_5_1_PROCESSOR_LOCAL_X2APIC         0x09
 312 #define EFI_ACPI_5_1_LOCAL_X2APIC_NMI               0x0A
 313 #define EFI_ACPI_5_1_GIC                            0x0B
 314 #define EFI_ACPI_5_1_GICD                           0x0C
 315 #define EFI_ACPI_5_1_GIC_MSI_FRAME                  0x0D
 316 #define EFI_ACPI_5_1_GICR                           0x0E
 317
 318 //
 319 // APIC Structure Definitions
 320 //
 321
 322 ///
 323 /// Processor Local APIC Structure Definition
 324 ///
 325 typedef struct {
 326   UINT8   Type;
 327   UINT8   Length;
 328   UINT8   AcpiProcessorId;
 329   UINT8   ApicId;
 330   UINT32  Flags;
 331 } EFI_ACPI_5_1_PROCESSOR_LOCAL_APIC_STRUCTURE;
 332
 333 ///
 334 /// Local APIC Flags.  All other bits are reserved and must be 0.
 335 ///
 336 #define EFI_ACPI_5_1_LOCAL_APIC_ENABLED        BIT0
 337
 338 ///
 339 /// IO APIC Structure
 340 ///
 341 typedef struct {
 342   UINT8   Type;
 343   UINT8   Length;
 344   UINT8   IoApicId;
 345   UINT8   Reserved;
 346   UINT32  IoApicAddress;
 347   UINT32  GlobalSystemInterruptBase;
 348 } EFI_ACPI_5_1_IO_APIC_STRUCTURE;
 349
 350 ///
 351 /// Interrupt Source Override Structure
 352 ///
 353 typedef struct {
 354   UINT8   Type;
 355   UINT8   Length;
 356   UINT8   Bus;
 357   UINT8   Source;
 358   UINT32  GlobalSystemInterrupt;
 359   UINT16  Flags;
 360 } EFI_ACPI_5_1_INTERRUPT_SOURCE_OVERRIDE_STRUCTURE;
 361
 362 ///
 363 /// Platform Interrupt Sources Structure Definition
 364 ///
 365 typedef struct {
 366   UINT8   Type;
 367   UINT8   Length;
 368   UINT16  Flags;
 369   UINT8   InterruptType;
 370   UINT8   ProcessorId;
 371   UINT8   ProcessorEid;
 372   UINT8   IoSapicVector;
 373   UINT32  GlobalSystemInterrupt;
 374   UINT32  PlatformInterruptSourceFlags;
 375   UINT8   CpeiProcessorOverride;
 376   UINT8   Reserved[31];
 377 } EFI_ACPI_5_1_PLATFORM_INTERRUPT_APIC_STRUCTURE;
 378
 379 //
 380 // MPS INTI flags.
 381 // All other bits are reserved and must be set to 0.
 382 //
 383 #define EFI_ACPI_5_1_POLARITY      (3 << 0)
 384 #define EFI_ACPI_5_1_TRIGGER_MODE  (3 << 2)
 385
 386 ///
 387 /// Non-Maskable Interrupt Source Structure
 388 ///
 389 typedef struct {
 390   UINT8   Type;
 391   UINT8   Length;
 392   UINT16  Flags;
 393   UINT32  GlobalSystemInterrupt;
 394 } EFI_ACPI_5_1_NON_MASKABLE_INTERRUPT_SOURCE_STRUCTURE;
 395
 396 ///
 397 /// Local APIC NMI Structure
 398 ///
 399 typedef struct {
 400   UINT8   Type;
 401   UINT8   Length;
 402   UINT8   AcpiProcessorId;
 403   UINT16  Flags;
 404   UINT8   LocalApicLint;
 405 } EFI_ACPI_5_1_LOCAL_APIC_NMI_STRUCTURE;
 406
 407 ///
 408 /// Local APIC Address Override Structure
 409 ///
 410 typedef struct {
 411   UINT8   Type;
 412   UINT8   Length;
 413   UINT16  Reserved;
 414   UINT64  LocalApicAddress;
 415 } EFI_ACPI_5_1_LOCAL_APIC_ADDRESS_OVERRIDE_STRUCTURE;
 416
 417 ///
 418 /// IO SAPIC Structure
 419 ///
 420 typedef struct {
 421   UINT8   Type;
 422   UINT8   Length;
 423   UINT8   IoApicId;
 424   UINT8   Reserved;
 425   UINT32  GlobalSystemInterruptBase;
 426   UINT64  IoSapicAddress;
 427 } EFI_ACPI_5_1_IO_SAPIC_STRUCTURE;
 428
 429 ///
 430 /// Local SAPIC Structure
 431 /// This struct followed by a null-terminated ASCII string - ACPI Processor UID String
 432 ///
 433 typedef struct {
 434   UINT8   Type;
 435   UINT8   Length;
 436   UINT8   AcpiProcessorId;
 437   UINT8   LocalSapicId;
 438   UINT8   LocalSapicEid;
 439   UINT8   Reserved[3];
 440   UINT32  Flags;
 441   UINT32  ACPIProcessorUIDValue;
 442 } EFI_ACPI_5_1_PROCESSOR_LOCAL_SAPIC_STRUCTURE;
 443
 444 ///
 445 /// Platform Interrupt Sources Structure
 446 ///
 447 typedef struct {
 448   UINT8   Type;
 449   UINT8   Length;
 450   UINT16  Flags;
 451   UINT8   InterruptType;
 452   UINT8   ProcessorId;
 453   UINT8   ProcessorEid;
 454   UINT8   IoSapicVector;
 455   UINT32  GlobalSystemInterrupt;
 456   UINT32  PlatformInterruptSourceFlags;
 457 } EFI_ACPI_5_1_PLATFORM_INTERRUPT_SOURCES_STRUCTURE;
 458
 459 ///
 460 /// Platform Interrupt Source Flags.
 461 /// All other bits are reserved and must be set to 0.
 462 ///
 463 #define EFI_ACPI_5_1_CPEI_PROCESSOR_OVERRIDE          BIT0
 464
 465 ///
 466 /// Processor Local x2APIC Structure Definition
 467 ///
 468 typedef struct {
 469   UINT8   Type;
 470   UINT8   Length;
 471   UINT8   Reserved[2];
 472   UINT32  X2ApicId;
 473   UINT32  Flags;
 474   UINT32  AcpiProcessorUid;
 475 } EFI_ACPI_5_1_PROCESSOR_LOCAL_X2APIC_STRUCTURE;
 476
 477 ///
 478 /// Local x2APIC NMI Structure
 479 ///
 480 typedef struct {
 481   UINT8   Type;
 482   UINT8   Length;
 483   UINT16  Flags;
 484   UINT32  AcpiProcessorUid;
 485   UINT8   LocalX2ApicLint;
 486   UINT8   Reserved[3];
 487 } EFI_ACPI_5_1_LOCAL_X2APIC_NMI_STRUCTURE;
 488
 489 ///
 490 /// GIC Structure
 491 ///
 492 typedef struct {
 493   UINT8   Type;
 494   UINT8   Length;
 495   UINT16  Reserved;
 496   UINT32  CPUInterfaceNumber;
 497   UINT32  AcpiProcessorUid;
 498   UINT32  Flags;
 499   UINT32  ParkingProtocolVersion;
 500   UINT32  PerformanceInterruptGsiv;
 501   UINT64  ParkedAddress;
 502   UINT64  PhysicalBaseAddress;
 503   UINT64  GICV;
 504   UINT64  GICH;
 505   UINT32  VGICMaintenanceInterrupt;
 506   UINT64  GICRBaseAddress;
 507   UINT64  MPIDR;
 508 } EFI_ACPI_5_1_GIC_STRUCTURE;
 509
 510 ///
 511 /// GIC Flags.  All other bits are reserved and must be 0.
 512 ///
 513 #define EFI_ACPI_5_1_GIC_ENABLED                              BIT0
 514 #define EFI_ACPI_5_1_PERFORMANCE_INTERRUPT_MODEL              BIT1
 515 #define EFI_ACPI_5_1_VGIC_MAINTENANCE_INTERRUPT_MODE_FLAGS    BIT2
 516
 517 ///
 518 /// GIC Distributor Structure
 519 ///
 520 typedef struct {
 521   UINT8   Type;
 522   UINT8   Length;
 523   UINT16  Reserved1;
 524   UINT32  GicId;
 525   UINT64  PhysicalBaseAddress;
 526   UINT32  SystemVectorBase;
 527   UINT8   GicVersion;
 528   UINT8   Reserved2[3];
 529 } EFI_ACPI_5_1_GIC_DISTRIBUTOR_STRUCTURE;
 530
 531 ///
 532 /// GIC Version
 533 ///
 534 #define EFI_ACPI_5_1_GIC_V1                                   0x01
 535 #define EFI_ACPI_5_1_GIC_V2                                   0x02
 536 #define EFI_ACPI_5_1_GIC_V3                                   0x03
 537 #define EFI_ACPI_5_1_GIC_V4                                   0x04
 538
 539 ///
 540 /// GIC MSI Frame Structure
 541 ///
 542 typedef struct {
 543   UINT8   Type;
 544   UINT8   Length;
 545   UINT16  Reserved1;
 546   UINT32  GicMsiFrameId;
 547   UINT64  PhysicalBaseAddress;
 548   UINT32  Flags;
 549   UINT16  SPICount;
 550   UINT16  SPIBase;
 551 } EFI_ACPI_5_1_GIC_MSI_FRAME_STRUCTURE;
 552
 553 ///
 554 /// GIC MSI Frame Flags.  All other bits are reserved and must be 0.
 555 ///
 556 #define EFI_ACPI_5_1_SPI_COUNT_BASE_SELECT                    BIT0
 557
 558 ///
 559 /// GICR Structure
 560 ///
 561 typedef struct {
 562   UINT8   Type;
 563   UINT8   Length;
 564   UINT16  Reserved;
 565   UINT64  DiscoveryRangeBaseAddress;
 566   UINT32  DiscoveryRangeLength;
 567 } EFI_ACPI_5_1_GICR_STRUCTURE;
 568
 569 ///
 570 /// Smart Battery Description Table (SBST)
 571 ///
 572 typedef struct {
 573   EFI_ACPI_DESCRIPTION_HEADER Header;
 574   UINT32                      WarningEnergyLevel;
 575   UINT32                      LowEnergyLevel;
 576   UINT32                      CriticalEnergyLevel;
 577 } EFI_ACPI_5_1_SMART_BATTERY_DESCRIPTION_TABLE;
 578
 579 ///
 580 /// SBST Version (as defined in ACPI 5.1 spec.)
 581 ///
 582 #define EFI_ACPI_5_1_SMART_BATTERY_DESCRIPTION_TABLE_REVISION 0x01
 583
 584 ///
 585 /// Embedded Controller Boot Resources Table (ECDT)
 586 /// The table is followed by a null terminated ASCII string that contains
 587 /// a fully qualified reference to the name space object.
 588 ///
 589 typedef struct {
 590   EFI_ACPI_DESCRIPTION_HEADER             Header;
 591   EFI_ACPI_5_1_GENERIC_ADDRESS_STRUCTURE  EcControl;
 592   EFI_ACPI_5_1_GENERIC_ADDRESS_STRUCTURE  EcData;
 593   UINT32                                  Uid;
 594   UINT8                                   GpeBit;
 595 } EFI_ACPI_5_1_EMBEDDED_CONTROLLER_BOOT_RESOURCES_TABLE;
 596
 597 ///
 598 /// ECDT Version (as defined in ACPI 5.1 spec.)
 599 ///
 600 #define EFI_ACPI_5_1_EMBEDDED_CONTROLLER_BOOT_RESOURCES_TABLE_REVISION  0x01
 601
 602 ///
 603 /// System Resource Affinity Table (SRAT).  The rest of the table
 604 /// must be defined in a platform specific manner.
 605 ///
 606 typedef struct {
 607   EFI_ACPI_DESCRIPTION_HEADER Header;
 608   UINT32                      Reserved1;  ///< Must be set to 1
 609   UINT64                      Reserved2;
 610 } EFI_ACPI_5_1_SYSTEM_RESOURCE_AFFINITY_TABLE_HEADER;
 611
 612 ///
 613 /// SRAT Version (as defined in ACPI 5.1 spec.)
 614 ///
 615 #define EFI_ACPI_5_1_SYSTEM_RESOURCE_AFFINITY_TABLE_REVISION  0x03
 616
 617 //
 618 // SRAT structure types.
 619 // All other values between 0x04 an 0xFF are reserved and
 620 // will be ignored by OSPM.
 621 //
 622 #define EFI_ACPI_5_1_PROCESSOR_LOCAL_APIC_SAPIC_AFFINITY  0x00
 623 #define EFI_ACPI_5_1_MEMORY_AFFINITY                      0x01
 624 #define EFI_ACPI_5_1_PROCESSOR_LOCAL_X2APIC_AFFINITY      0x02
 625 #define EFI_ACPI_5_1_GICC_AFFINITY                        0x03
 626
 627 ///
 628 /// Processor Local APIC/SAPIC Affinity Structure Definition
 629 ///
 630 typedef struct {
 631   UINT8   Type;
 632   UINT8   Length;
 633   UINT8   ProximityDomain7To0;
 634   UINT8   ApicId;
 635   UINT32  Flags;
 636   UINT8   LocalSapicEid;
 637   UINT8   ProximityDomain31To8[3];
 638   UINT32  ClockDomain;
 639 } EFI_ACPI_5_1_PROCESSOR_LOCAL_APIC_SAPIC_AFFINITY_STRUCTURE;
 640
 641 ///
 642 /// Local APIC/SAPIC Flags.  All other bits are reserved and must be 0.
 643 ///
 644 #define EFI_ACPI_5_1_PROCESSOR_LOCAL_APIC_SAPIC_ENABLED (1 << 0)
 645
 646 ///
 647 /// Memory Affinity Structure Definition
 648 ///
 649 typedef struct {
 650   UINT8   Type;
 651   UINT8   Length;
 652   UINT32  ProximityDomain;
 653   UINT16  Reserved1;
 654   UINT32  AddressBaseLow;
 655   UINT32  AddressBaseHigh;
 656   UINT32  LengthLow;
 657   UINT32  LengthHigh;
 658   UINT32  Reserved2;
 659   UINT32  Flags;
 660   UINT64  Reserved3;
 661 } EFI_ACPI_5_1_MEMORY_AFFINITY_STRUCTURE;
 662
 663 //
 664 // Memory Flags.  All other bits are reserved and must be 0.
 665 //
 666 #define EFI_ACPI_5_1_MEMORY_ENABLED       (1 << 0)
 667 #define EFI_ACPI_5_1_MEMORY_HOT_PLUGGABLE (1 << 1)
 668 #define EFI_ACPI_5_1_MEMORY_NONVOLATILE   (1 << 2)
 669
 670 ///
 671 /// Processor Local x2APIC Affinity Structure Definition
 672 ///
 673 typedef struct {
 674   UINT8   Type;
 675   UINT8   Length;
 676   UINT8   Reserved1[2];
 677   UINT32  ProximityDomain;
 678   UINT32  X2ApicId;
 679   UINT32  Flags;
 680   UINT32  ClockDomain;
 681   UINT8   Reserved2[4];
 682 } EFI_ACPI_5_1_PROCESSOR_LOCAL_X2APIC_AFFINITY_STRUCTURE;
 683
 684 ///
 685 /// GICC Affinity Structure Definition
 686 ///
 687 typedef struct {
 688   UINT8   Type;
 689   UINT8   Length;
 690   UINT32  ProximityDomain;
 691   UINT32  AcpiProcessorUid;
 692   UINT32  Flags;
 693   UINT32  ClockDomain;
 694 } EFI_ACPI_5_1_GICC_AFFINITY_STRUCTURE;
 695
 696 ///
 697 /// GICC Flags.  All other bits are reserved and must be 0.
 698 ///
 699 #define EFI_ACPI_5_1_GICC_ENABLED (1 << 0)
 700
 701 ///
 702 /// System Locality Distance Information Table (SLIT).
 703 /// The rest of the table is a matrix.
 704 ///
 705 typedef struct {
 706   EFI_ACPI_DESCRIPTION_HEADER Header;
 707   UINT64                      NumberOfSystemLocalities;
 708 } EFI_ACPI_5_1_SYSTEM_LOCALITY_DISTANCE_INFORMATION_TABLE_HEADER;
 709
 710 ///
 711 /// SLIT Version (as defined in ACPI 5.1 spec.)
 712 ///
 713 #define EFI_ACPI_5_1_SYSTEM_LOCALITY_DISTANCE_INFORMATION_TABLE_REVISION  0x01
 714
 715 ///
 716 /// Corrected Platform Error Polling Table (CPEP)
 717 ///
 718 typedef struct {
 719   EFI_ACPI_DESCRIPTION_HEADER Header;
 720   UINT8                       Reserved[8];
 721 } EFI_ACPI_5_1_CORRECTED_PLATFORM_ERROR_POLLING_TABLE_HEADER;
 722
 723 ///
 724 /// CPEP Version (as defined in ACPI 5.1 spec.)
 725 ///
 726 #define EFI_ACPI_5_1_CORRECTED_PLATFORM_ERROR_POLLING_TABLE_REVISION 0x01
 727
 728 //
 729 // CPEP processor structure types.
 730 //
 731 #define EFI_ACPI_5_1_CPEP_PROCESSOR_APIC_SAPIC  0x00
 732
 733 ///
 734 /// Corrected Platform Error Polling Processor Structure Definition
 735 ///
 736 typedef struct {
 737   UINT8   Type;
 738   UINT8   Length;
 739   UINT8   ProcessorId;
 740   UINT8   ProcessorEid;
 741   UINT32  PollingInterval;
 742 } EFI_ACPI_5_1_CPEP_PROCESSOR_APIC_SAPIC_STRUCTURE;
 743
 744 ///
 745 /// Maximum System Characteristics Table (MSCT)
 746 ///
 747 typedef struct {
 748   EFI_ACPI_DESCRIPTION_HEADER Header;
 749   UINT32                      OffsetProxDomInfo;
 750   UINT32                      MaximumNumberOfProximityDomains;
 751   UINT32                      MaximumNumberOfClockDomains;
 752   UINT64                      MaximumPhysicalAddress;
 753 } EFI_ACPI_5_1_MAXIMUM_SYSTEM_CHARACTERISTICS_TABLE_HEADER;
 754
 755 ///
 756 /// MSCT Version (as defined in ACPI 5.1 spec.)
 757 ///
 758 #define EFI_ACPI_5_1_MAXIMUM_SYSTEM_CHARACTERISTICS_TABLE_REVISION 0x01
 759
 760 ///
 761 /// Maximum Proximity Domain Information Structure Definition
 762 ///
 763 typedef struct {
 764   UINT8   Revision;
 765   UINT8   Length;
 766   UINT32  ProximityDomainRangeLow;
 767   UINT32  ProximityDomainRangeHigh;
 768   UINT32  MaximumProcessorCapacity;
 769   UINT64  MaximumMemoryCapacity;
 770 } EFI_ACPI_5_1_MAXIMUM_PROXIMITY_DOMAIN_INFORMATION_STRUCTURE;
 771
 772 ///
 773 /// ACPI RAS Feature Table definition.
 774 ///
 775 typedef struct {
 776   EFI_ACPI_DESCRIPTION_HEADER Header;
 777   UINT8                       PlatformCommunicationChannelIdentifier[12];
 778 } EFI_ACPI_5_1_RAS_FEATURE_TABLE;
 779
 780 ///
 781 /// RASF Version (as defined in ACPI 5.1 spec.)
 782 ///
 783 #define EFI_ACPI_5_1_RAS_FEATURE_TABLE_REVISION 0x01
 784
 785 ///
 786 /// ACPI RASF Platform Communication Channel Shared Memory Region definition.
 787 ///
 788 typedef struct {
 789   UINT32                      Signature;
 790   UINT16                      Command;
 791   UINT16                      Status;
 792   UINT16                      Version;
 793   UINT8                       RASCapabilities[16];
 794   UINT8                       SetRASCapabilities[16];
 795   UINT16                      NumberOfRASFParameterBlocks;
 796   UINT32                      SetRASCapabilitiesStatus;
 797 } EFI_ACPI_5_1_RASF_PLATFORM_COMMUNICATION_CHANNEL_SHARED_MEMORY_REGION;
 798
 799 ///
 800 /// ACPI RASF PCC command code
 801 ///
 802 #define EFI_ACPI_5_1_RASF_PCC_COMMAND_CODE_EXECUTE_RASF_COMMAND  0x01
 803
 804 ///
 805 /// ACPI RASF Platform RAS Capabilities
 806 ///
 807 #define EFI_ACPI_5_1_RASF_PLATFORM_RAS_CAPABILITY_HARDWARE_BASED_PATROL_SCRUB_SUPPOTED                          0x01
 808 #define EFI_ACPI_5_1_RASF_PLATFORM_RAS_CAPABILITY_HARDWARE_BASED_PATROL_SCRUB_SUPPOTED_AND_EXPOSED_TO_SOFTWARE  0x02
 809
 810 ///
 811 /// ACPI RASF Parameter Block structure for PATROL_SCRUB
 812 ///
 813 typedef struct {
 814   UINT16                      Type;
 815   UINT16                      Version;
 816   UINT16                      Length;
 817   UINT16                      PatrolScrubCommand;
 818   UINT64                      RequestedAddressRange[2];
 819   UINT64                      ActualAddressRange[2];
 820   UINT16                      Flags;
 821   UINT8                       RequestedSpeed;
 822 } EFI_ACPI_5_1_RASF_PATROL_SCRUB_PLATFORM_BLOCK_STRUCTURE;
 823
 824 ///
 825 /// ACPI RASF Patrol Scrub command
 826 ///
 827 #define EFI_ACPI_5_1_RASF_PATROL_SCRUB_COMMAND_GET_PATROL_PARAMETERS   0x01
 828 #define EFI_ACPI_5_1_RASF_PATROL_SCRUB_COMMAND_START_PATROL_SCRUBBER   0x02
 829 #define EFI_ACPI_5_1_RASF_PATROL_SCRUB_COMMAND_STOP_PATROL_SCRUBBER    0x03
 830
 831 ///
 832 /// Memory Power State Table definition.
 833 ///
 834 typedef struct {
 835   EFI_ACPI_DESCRIPTION_HEADER Header;
 836   UINT8                       PlatformCommunicationChannelIdentifier;
 837   UINT8                       Reserved[3];
 838 // Memory Power Node Structure
 839 // Memory Power State Characteristics
 840 } EFI_ACPI_5_1_MEMORY_POWER_STATUS_TABLE;
 841
 842 ///
 843 /// MPST Version (as defined in ACPI 5.1 spec.)
 844 ///
 845 #define EFI_ACPI_5_1_MEMORY_POWER_STATE_TABLE_REVISION 0x01
 846
 847 ///
 848 /// MPST Platform Communication Channel Shared Memory Region definition.
 849 ///
 850 typedef struct {
 851   UINT32                      Signature;
 852   UINT16                      Command;
 853   UINT16                      Status;
 854   UINT32                      MemoryPowerCommandRegister;
 855   UINT32                      MemoryPowerStatusRegister;
 856   UINT32                      PowerStateId;
 857   UINT32                      MemoryPowerNodeId;
 858   UINT64                      MemoryEnergyConsumed;
 859   UINT64                      ExpectedAveragePowerComsuned;
 860 } EFI_ACPI_5_1_MPST_PLATFORM_COMMUNICATION_CHANNEL_SHARED_MEMORY_REGION;
 861
 862 ///
 863 /// ACPI MPST PCC command code
 864 ///
 865 #define EFI_ACPI_5_1_MPST_PCC_COMMAND_CODE_EXECUTE_MPST_COMMAND  0x03
 866
 867 ///
 868 /// ACPI MPST Memory Power command
 869 ///
 870 #define EFI_ACPI_5_1_MPST_MEMORY_POWER_COMMAND_GET_MEMORY_POWER_STATE       0x01
 871 #define EFI_ACPI_5_1_MPST_MEMORY_POWER_COMMAND_SET_MEMORY_POWER_STATE       0x02
 872 #define EFI_ACPI_5_1_MPST_MEMORY_POWER_COMMAND_GET_AVERAGE_POWER_CONSUMED   0x03
 873 #define EFI_ACPI_5_1_MPST_MEMORY_POWER_COMMAND_GET_MEMORY_ENERGY_CONSUMED   0x04
 874
 875 ///
 876 /// MPST Memory Power Node Table
 877 ///
 878 typedef struct {
 879   UINT8                                             PowerStateValue;
 880   UINT8                                             PowerStateInformationIndex;
 881 } EFI_ACPI_5_1_MPST_MEMORY_POWER_STATE;
 882
 883 typedef struct {
 884   UINT8                                             Flag;
 885   UINT8                                             Reserved;
 886   UINT16                                            MemoryPowerNodeId;
 887   UINT32                                            Length;
 888   UINT64                                            AddressBase;
 889   UINT64                                            AddressLength;
 890   UINT32                                            NumberOfPowerStates;
 891   UINT32                                            NumberOfPhysicalComponents;
 892 //EFI_ACPI_5_1_MPST_MEMORY_POWER_STATE              MemoryPowerState[NumberOfPowerStates];
 893 //UINT16                                            PhysicalComponentIdentifier[NumberOfPhysicalComponents];
 894 } EFI_ACPI_5_1_MPST_MEMORY_POWER_STRUCTURE;
 895
 896 #define EFI_ACPI_5_1_MPST_MEMORY_POWER_STRUCTURE_FLAG_ENABLE          0x01
 897 #define EFI_ACPI_5_1_MPST_MEMORY_POWER_STRUCTURE_FLAG_POWER_MANAGED   0x02
 898 #define EFI_ACPI_5_1_MPST_MEMORY_POWER_STRUCTURE_FLAG_HOT_PLUGGABLE   0x04
 899
 900 typedef struct {
 901   UINT16                      MemoryPowerNodeCount;
 902   UINT8                       Reserved[2];
 903 } EFI_ACPI_5_1_MPST_MEMORY_POWER_NODE_TABLE;
 904
 905 ///
 906 /// MPST Memory Power State Characteristics Table
 907 ///
 908 typedef struct {
 909   UINT8                                             PowerStateStructureID;
 910   UINT8                                             Flag;
 911   UINT16                                            Reserved;
 912   UINT32                                            AveragePowerConsumedInMPS0;
 913   UINT32                                            RelativePowerSavingToMPS0;
 914   UINT64                                            ExitLatencyToMPS0;
 915 } EFI_ACPI_5_1_MPST_MEMORY_POWER_STATE_CHARACTERISTICS_STRUCTURE;
 916
 917 #define EFI_ACPI_5_1_MPST_MEMORY_POWER_STATE_CHARACTERISTICS_STRUCTURE_FLAG_MEMORY_CONTENT_PRESERVED              0x01
 918 #define EFI_ACPI_5_1_MPST_MEMORY_POWER_STATE_CHARACTERISTICS_STRUCTURE_FLAG_AUTONOMOUS_MEMORY_POWER_STATE_ENTRY   0x02
 919 #define EFI_ACPI_5_1_MPST_MEMORY_POWER_STATE_CHARACTERISTICS_STRUCTURE_FLAG_AUTONOMOUS_MEMORY_POWER_STATE_EXIT    0x04
 920
 921 typedef struct {
 922   UINT16                      MemoryPowerStateCharacteristicsCount;
 923   UINT8                       Reserved[2];
 924 } EFI_ACPI_5_1_MPST_MEMORY_POWER_STATE_CHARACTERISTICS_TABLE;
 925
 926 ///
 927 /// Memory Topology Table definition.
 928 ///
 929 typedef struct {
 930   EFI_ACPI_DESCRIPTION_HEADER Header;
 931   UINT32                      Reserved;
 932 } EFI_ACPI_5_1_MEMORY_TOPOLOGY_TABLE;
 933
 934 ///
 935 /// PMTT Version (as defined in ACPI 5.1 spec.)
 936 ///
 937 #define EFI_ACPI_5_1_MEMORY_TOPOLOGY_TABLE_REVISION 0x01
 938
 939 ///
 940 /// Common Memory Aggregator Device Structure.
 941 ///
 942 typedef struct {
 943   UINT8                       Type;
 944   UINT8                       Reserved;
 945   UINT16                      Length;
 946   UINT16                      Flags;
 947   UINT16                      Reserved1;
 948 } EFI_ACPI_5_1_PMMT_COMMON_MEMORY_AGGREGATOR_DEVICE_STRUCTURE;
 949
 950 ///
 951 /// Memory Aggregator Device Type
 952 ///
 953 #define EFI_ACPI_5_1_PMMT_MEMORY_AGGREGATOR_DEVICE_TYPE_SOCKET            0x1
 954 #define EFI_ACPI_5_1_PMMT_MEMORY_AGGREGATOR_DEVICE_TYPE_MEMORY_CONTROLLER 0x2
 955 #define EFI_ACPI_5_1_PMMT_MEMORY_AGGREGATOR_DEVICE_TYPE_DIMM              0x3
 956
 957 ///
 958 /// Socket Memory Aggregator Device Structure.
 959 ///
 960 typedef struct {
 961   EFI_ACPI_5_1_PMMT_COMMON_MEMORY_AGGREGATOR_DEVICE_STRUCTURE  Header;
 962   UINT16                                                       SocketIdentifier;
 963   UINT16                                                       Reserved;
 964 //EFI_ACPI_5_1_PMMT_MEMORY_CONTROLLER_MEMORY_AGGREGATOR_DEVICE_STRUCTURE  MemoryController[];
 965 } EFI_ACPI_5_1_PMMT_SOCKET_MEMORY_AGGREGATOR_DEVICE_STRUCTURE;
 966
 967 ///
 968 /// MemoryController Memory Aggregator Device Structure.
 969 ///
 970 typedef struct {
 971   EFI_ACPI_5_1_PMMT_COMMON_MEMORY_AGGREGATOR_DEVICE_STRUCTURE  Header;
 972   UINT32                                                       ReadLatency;
 973   UINT32                                                       WriteLatency;
 974   UINT32                                                       ReadBandwidth;
 975   UINT32                                                       WriteBandwidth;
 976   UINT16                                                       OptimalAccessUnit;
 977   UINT16                                                       OptimalAccessAlignment;
 978   UINT16                                                       Reserved;
 979   UINT16                                                       NumberOfProximityDomains;
 980 //UINT32                                                       ProximityDomain[NumberOfProximityDomains];
 981 //EFI_ACPI_5_1_PMMT_DIMM_MEMORY_AGGREGATOR_DEVICE_STRUCTURE    PhysicalComponent[];
 982 } EFI_ACPI_5_1_PMMT_MEMORY_CONTROLLER_MEMORY_AGGREGATOR_DEVICE_STRUCTURE;
 983
 984 ///
 985 /// DIMM Memory Aggregator Device Structure.
 986 ///
 987 typedef struct {
 988   EFI_ACPI_5_1_PMMT_COMMON_MEMORY_AGGREGATOR_DEVICE_STRUCTURE  Header;
 989   UINT16                                                       PhysicalComponentIdentifier;
 990   UINT16                                                       Reserved;
 991   UINT32                                                       SizeOfDimm;
 992   UINT32                                                       SmbiosHandle;
 993 } EFI_ACPI_5_1_PMMT_DIMM_MEMORY_AGGREGATOR_DEVICE_STRUCTURE;
 994
 995 ///
 996 /// Boot Graphics Resource Table definition.
 997 ///
 998 typedef struct {
 999   EFI_ACPI_DESCRIPTION_HEADER Header;
1000   ///
1001   /// 2-bytes (16 bit) version ID. This value must be 1.
1002   ///
1003   UINT16                      Version;
1004   ///
1005   /// 1-byte status field indicating current status about the table.
1006   ///     Bits[7:1] = Reserved (must be zero)
1007   ///     Bit [0] = Valid. A one indicates the boot image graphic is valid.
1008   ///
1009   UINT8                       Status;
1010   ///
1011   /// 1-byte enumerated type field indicating format of the image.
1012   ///     0 = Bitmap
1013   ///     1 - 255  Reserved (for future use)
1014   ///
1015   UINT8                       ImageType;
1016   ///
1017   /// 8-byte (64 bit) physical address pointing to the firmware's in-memory copy
1018   /// of the image bitmap.
1019   ///
1020   UINT64                      ImageAddress;
1021   ///
1022   /// A 4-byte (32-bit) unsigned long describing the display X-offset of the boot image.
1023   /// (X, Y) display offset of the top left corner of the boot image.
1024   /// The top left corner of the display is at offset (0, 0).
1025   ///
1026   UINT32                      ImageOffsetX;
1027   ///
1028   /// A 4-byte (32-bit) unsigned long describing the display Y-offset of the boot image.
1029   /// (X, Y) display offset of the top left corner of the boot image.
1030   /// The top left corner of the display is at offset (0, 0).
1031   ///
1032   UINT32                      ImageOffsetY;
1033 } EFI_ACPI_5_1_BOOT_GRAPHICS_RESOURCE_TABLE;
1034
1035 ///
1036 /// BGRT Revision
1037 ///
1038 #define EFI_ACPI_5_1_BOOT_GRAPHICS_RESOURCE_TABLE_REVISION 1
1039
1040 ///
1041 /// BGRT Version
1042 ///
1043 #define EFI_ACPI_5_1_BGRT_VERSION         0x01
1044
1045 ///
1046 /// BGRT Status
1047 ///
1048 #define EFI_ACPI_5_1_BGRT_STATUS_NOT_DISPLAYED 0x00
1049 #define EFI_ACPI_5_1_BGRT_STATUS_DISPLAYED     0x01
1050
1051 ///
1052 /// BGRT Image Type
1053 ///
1054 #define EFI_ACPI_5_1_BGRT_IMAGE_TYPE_BMP  0x00
1055
1056 ///
1057 /// FPDT Version (as defined in ACPI 5.1 spec.)
1058 ///
1059 #define EFI_ACPI_5_1_FIRMWARE_PERFORMANCE_DATA_TABLE_REVISION 0x01
1060
1061 ///
1062 /// FPDT Performance Record Types
1063 ///
1064 #define EFI_ACPI_5_1_FPDT_RECORD_TYPE_FIRMWARE_BASIC_BOOT_POINTER      0x0000
1065 #define EFI_ACPI_5_1_FPDT_RECORD_TYPE_S3_PERFORMANCE_TABLE_POINTER     0x0001
1066
1067 ///
1068 /// FPDT Performance Record Revision
1069 ///
1070 #define EFI_ACPI_5_1_FPDT_RECORD_REVISION_FIRMWARE_BASIC_BOOT_POINTER  0x01
1071 #define EFI_ACPI_5_1_FPDT_RECORD_REVISION_S3_PERFORMANCE_TABLE_POINTER 0x01
1072
1073 ///
1074 /// FPDT Runtime Performance Record Types
1075 ///
1076 #define EFI_ACPI_5_1_FPDT_RUNTIME_RECORD_TYPE_S3_RESUME                0x0000
1077 #define EFI_ACPI_5_1_FPDT_RUNTIME_RECORD_TYPE_S3_SUSPEND               0x0001
1078 #define EFI_ACPI_5_1_FPDT_RUNTIME_RECORD_TYPE_FIRMWARE_BASIC_BOOT      0x0002
1079
1080 ///
1081 /// FPDT Runtime Performance Record Revision
1082 ///
1083 #define EFI_ACPI_5_1_FPDT_RUNTIME_RECORD_REVISION_S3_RESUME            0x01
1084 #define EFI_ACPI_5_1_FPDT_RUNTIME_RECORD_REVISION_S3_SUSPEND           0x01
1085 #define EFI_ACPI_5_1_FPDT_RUNTIME_RECORD_REVISION_FIRMWARE_BASIC_BOOT  0x02
1086
1087 ///
1088 /// FPDT Performance Record header
1089 ///
1090 typedef struct {
1091   UINT16           Type;
1092   UINT8            Length;
1093   UINT8            Revision;
1094 } EFI_ACPI_5_1_FPDT_PERFORMANCE_RECORD_HEADER;
1095
1096 ///
1097 /// FPDT Performance Table header
1098 ///
1099 typedef struct {
1100   UINT32  Signature;
1101   UINT32  Length;
1102 } EFI_ACPI_5_1_FPDT_PERFORMANCE_TABLE_HEADER;
1103
1104 ///
1105 /// FPDT Firmware Basic Boot Performance Pointer Record Structure
1106 ///
1107 typedef struct {
1108   EFI_ACPI_5_1_FPDT_PERFORMANCE_RECORD_HEADER     Header;
1109   UINT32                                          Reserved;
1110   ///
1111   /// 64-bit processor-relative physical address of the Basic Boot Performance Table.
1112   ///
1113   UINT64                                          BootPerformanceTablePointer;
1114 } EFI_ACPI_5_1_FPDT_BOOT_PERFORMANCE_TABLE_POINTER_RECORD;
1115
1116 ///
1117 /// FPDT S3 Performance Table Pointer Record Structure
1118 ///
1119 typedef struct {
1120   EFI_ACPI_5_1_FPDT_PERFORMANCE_RECORD_HEADER     Header;
1121   UINT32                                          Reserved;
1122   ///
1123   /// 64-bit processor-relative physical address of the S3 Performance Table.
1124   ///
1125   UINT64                                          S3PerformanceTablePointer;
1126 } EFI_ACPI_5_1_FPDT_S3_PERFORMANCE_TABLE_POINTER_RECORD;
1127
1128 ///
1129 /// FPDT Firmware Basic Boot Performance Record Structure
1130 ///
1131 typedef struct {
1132   EFI_ACPI_5_1_FPDT_PERFORMANCE_RECORD_HEADER     Header;
1133   UINT32                                          Reserved;
1134   ///
1135   /// Timer value logged at the beginning of firmware image execution.
1136   /// This may not always be zero or near zero.
1137   ///
1138   UINT64                                          ResetEnd;
1139   ///
1140   /// Timer value logged just prior to loading the OS boot loader into memory.
1141   /// For non-UEFI compatible boots, this field must be zero.
1142   ///
1143   UINT64                                          OsLoaderLoadImageStart;
1144   ///
1145   /// Timer value logged just prior to launching the previously loaded OS boot loader image.
1146   /// For non-UEFI compatible boots, the timer value logged will be just prior
1147   /// to the INT 19h handler invocation.
1148   ///
1149   UINT64                                          OsLoaderStartImageStart;
1150   ///
1151   /// Timer value logged at the point when the OS loader calls the
1152   /// ExitBootServices function for UEFI compatible firmware.
1153   /// For non-UEFI compatible boots, this field must be zero.
1154   ///
1155   UINT64                                          ExitBootServicesEntry;
1156   ///
1157   /// Timer value logged at the point just prior towhen the OS loader gaining
1158   /// control back from calls the ExitBootServices function for UEFI compatible firmware.
1159   /// For non-UEFI compatible boots, this field must be zero.
1160   ///
1161   UINT64                                          ExitBootServicesExit;
1162 } EFI_ACPI_5_1_FPDT_FIRMWARE_BASIC_BOOT_RECORD;
1163
1164 ///
1165 /// FPDT Firmware Basic Boot Performance Table signature
1166 ///
1167 #define EFI_ACPI_5_1_FPDT_BOOT_PERFORMANCE_TABLE_SIGNATURE  SIGNATURE_32('F', 'B', 'P', 'T')
1168
1169 //
1170 // FPDT Firmware Basic Boot Performance Table
1171 //
1172 typedef struct {
1173   EFI_ACPI_5_1_FPDT_PERFORMANCE_TABLE_HEADER      Header;
1174   //
1175   // one or more Performance Records.
1176   //
1177 } EFI_ACPI_5_1_FPDT_FIRMWARE_BASIC_BOOT_TABLE;
1178
1179 ///
1180 /// FPDT "S3PT" S3 Performance Table
1181 ///
1182 #define EFI_ACPI_5_1_FPDT_S3_PERFORMANCE_TABLE_SIGNATURE  SIGNATURE_32('S', '3', 'P', 'T')
1183
1184 //
1185 // FPDT Firmware S3 Boot Performance Table
1186 //
1187 typedef struct {
1188   EFI_ACPI_5_1_FPDT_PERFORMANCE_TABLE_HEADER      Header;
1189   //
1190   // one or more Performance Records.
1191   //
1192 } EFI_ACPI_5_1_FPDT_FIRMWARE_S3_BOOT_TABLE;
1193
1194 ///
1195 /// FPDT Basic S3 Resume Performance Record
1196 ///
1197 typedef struct {
1198   EFI_ACPI_5_1_FPDT_PERFORMANCE_RECORD_HEADER     Header;
1199   ///
1200   /// A count of the number of S3 resume cycles since the last full boot sequence.
1201   ///
1202   UINT32                                          ResumeCount;
1203   ///
1204   /// Timer recorded at the end of BIOS S3 resume, just prior to handoff to the
1205   /// OS waking vector. Only the most recent resume cycle's time is retained.
1206   ///
1207   UINT64                                          FullResume;
1208   ///
1209   /// Average timer value of all resume cycles logged since the last full boot
1210   /// sequence, including the most recent resume.  Note that the entire log of
1211   /// timer values does not need to be retained in order to calculate this average.
1212   ///
1213   UINT64                                          AverageResume;
1214 } EFI_ACPI_5_1_FPDT_S3_RESUME_RECORD;
1215
1216 ///
1217 /// FPDT Basic S3 Suspend Performance Record
1218 ///
1219 typedef struct {
1220   EFI_ACPI_5_1_FPDT_PERFORMANCE_RECORD_HEADER     Header;
1221   ///
1222   /// Timer value recorded at the OS write to SLP_TYP upon entry to S3.
1223   /// Only the most recent suspend cycle's timer value is retained.
1224   ///
1225   UINT64                                          SuspendStart;
1226   ///
1227   /// Timer value recorded at the final firmware write to SLP_TYP (or other
1228   /// mechanism) used to trigger hardware entry to S3.
1229   /// Only the most recent suspend cycle's timer value is retained.
1230   ///
1231   UINT64                                          SuspendEnd;
1232 } EFI_ACPI_5_1_FPDT_S3_SUSPEND_RECORD;
1233
1234 ///
1235 /// Firmware Performance Record Table definition.
1236 ///
1237 typedef struct {
1238   EFI_ACPI_DESCRIPTION_HEADER Header;
1239 } EFI_ACPI_5_1_FIRMWARE_PERFORMANCE_RECORD_TABLE;
1240
1241 ///
1242 /// Generic Timer Description Table definition.
1243 ///
1244 typedef struct {
1245   EFI_ACPI_DESCRIPTION_HEADER Header;
1246   UINT64                      CntControlBasePhysicalAddress;
1247   UINT32                      Reserved;
1248   UINT32                      SecurePL1TimerGSIV;
1249   UINT32                      SecurePL1TimerFlags;
1250   UINT32                      NonSecurePL1TimerGSIV;
1251   UINT32                      NonSecurePL1TimerFlags;
1252   UINT32                      VirtualTimerGSIV;
1253   UINT32                      VirtualTimerFlags;
1254   UINT32                      NonSecurePL2TimerGSIV;
1255   UINT32                      NonSecurePL2TimerFlags;
1256   UINT64                      CntReadBasePhysicalAddress;
1257   UINT32                      PlatformTimerCount;
1258   UINT32                      PlatformTimerOffset;
1259 } EFI_ACPI_5_1_GENERIC_TIMER_DESCRIPTION_TABLE;
1260
1261 ///
1262 /// GTDT Version (as defined in ACPI 5.1 spec.)
1263 ///
1264 #define EFI_ACPI_5_1_GENERIC_TIMER_DESCRIPTION_TABLE_REVISION 0x02
1265
1266 ///
1267 /// Timer Flags.  All other bits are reserved and must be 0.
1268 ///
1269 #define EFI_ACPI_5_1_GTDT_TIMER_FLAG_TIMER_INTERRUPT_MODE          BIT0
1270 #define EFI_ACPI_5_1_GTDT_TIMER_FLAG_TIMER_INTERRUPT_POLARITY      BIT1
1271 #define EFI_ACPI_5_1_GTDT_TIMER_FLAG_ALWAYS_ON_CAPABILITY          BIT2
1272
1273 ///
1274 /// Platform Timer Type
1275 ///
1276 #define EFI_ACPI_5_1_GTDT_GT_BLOCK                       0
1277 #define EFI_ACPI_5_1_GTDT_SBSA_GENERIC_WATCHDOG          1
1278
1279 ///
1280 /// GT Block Structure
1281 ///
1282 typedef struct {
1283   UINT8   Type;
1284   UINT16  Length;
1285   UINT8   Reserved;
1286   UINT64  CntCtlBase;
1287   UINT32  GTBlockTimerCount;
1288   UINT32  GTBlockTimerOffset;
1289 } EFI_ACPI_5_1_GTDT_GT_BLOCK_STRUCTURE;
1290
1291 ///
1292 /// GT Block Timer Structure
1293 ///
1294 typedef struct {
1295   UINT8   GTFrameNumber;
1296   UINT8   Reserved[3];
1297   UINT64  CntBaseX;
1298   UINT64  CntEL0BaseX;
1299   UINT32  GTxPhysicalTimerGSIV;
1300   UINT32  GTxPhysicalTimerFlags;
1301   UINT32  GTxVirtualTimerGSIV;
1302   UINT32  GTxVirtualTimerFlags;
1303   UINT32  GTxCommonFlags;
1304 } EFI_ACPI_5_1_GTDT_GT_BLOCK_TIMER_STRUCTURE;
1305
1306 ///
1307 /// GT Block Physical Timers and Virtual Timers Flags.  All other bits are reserved and must be 0.
1308 ///
1309 #define EFI_ACPI_5_1_GTDT_GT_BLOCK_TIMER_FLAG_TIMER_INTERRUPT_MODE          BIT0
1310 #define EFI_ACPI_5_1_GTDT_GT_BLOCK_TIMER_FLAG_TIMER_INTERRUPT_POLARITY      BIT1
1311
1312 ///
1313 /// Common Flags Flags.  All other bits are reserved and must be 0.
1314 ///
1315 #define EFI_ACPI_5_1_GTDT_GT_BLOCK_COMMON_FLAG_SECURE_TIMER              BIT0
1316 #define EFI_ACPI_5_1_GTDT_GT_BLOCK_COMMON_FLAG_ALWAYS_ON_CAPABILITY      BIT1
1317
1318 ///
1319 /// SBSA Generic Watchdog Structure
1320 ///
1321 typedef struct {
1322   UINT8   Type;
1323   UINT16  Length;
1324   UINT8   Reserved;
1325   UINT64  RefreshFramePhysicalAddress;
1326   UINT64  WatchdogControlFramePhysicalAddress;
1327   UINT32  WatchdogTimerGSIV;
1328   UINT32  WatchdogTimerFlags;
1329 } EFI_ACPI_5_1_GTDT_SBSA_GENERIC_WATCHDOG_STRUCTURE;
1330
1331 ///
1332 /// SBSA Generic Watchdog Timer Flags.  All other bits are reserved and must be 0.
1333 ///
1334 #define EFI_ACPI_5_1_GTDT_SBSA_GENERIC_WATCHDOG_FLAG_TIMER_INTERRUPT_MODE          BIT0
1335 #define EFI_ACPI_5_1_GTDT_SBSA_GENERIC_WATCHDOG_FLAG_TIMER_INTERRUPT_POLARITY      BIT1
1336 #define EFI_ACPI_5_1_GTDT_SBSA_GENERIC_WATCHDOG_FLAG_SECURE_TIMER                  BIT2
1337
1338 ///
1339 /// Boot Error Record Table (BERT)
1340 ///
1341 typedef struct {
1342   EFI_ACPI_DESCRIPTION_HEADER Header;
1343   UINT32                      BootErrorRegionLength;
1344   UINT64                      BootErrorRegion;
1345 } EFI_ACPI_5_1_BOOT_ERROR_RECORD_TABLE_HEADER;
1346
1347 ///
1348 /// BERT Version (as defined in ACPI 5.1 spec.)
1349 ///
1350 #define EFI_ACPI_5_1_BOOT_ERROR_RECORD_TABLE_REVISION 0x01
1351
1352 ///
1353 /// Boot Error Region Block Status Definition
1354 ///
1355 typedef struct {
1356   UINT32       UncorrectableErrorValid:1;
1357   UINT32       CorrectableErrorValid:1;
1358   UINT32       MultipleUncorrectableErrors:1;
1359   UINT32       MultipleCorrectableErrors:1;
1360   UINT32       ErrorDataEntryCount:10;
1361   UINT32       Reserved:18;
1362 } EFI_ACPI_5_1_ERROR_BLOCK_STATUS;
1363
1364 ///
1365 /// Boot Error Region Definition
1366 ///
1367 typedef struct {
1368   EFI_ACPI_5_1_ERROR_BLOCK_STATUS              BlockStatus;
1369   UINT32                                       RawDataOffset;
1370   UINT32                                       RawDataLength;
1371   UINT32                                       DataLength;
1372   UINT32                                       ErrorSeverity;
1373 } EFI_ACPI_5_1_BOOT_ERROR_REGION_STRUCTURE;
1374
1375 //
1376 // Boot Error Severity types
1377 //
1378 #define EFI_ACPI_5_1_ERROR_SEVERITY_CORRECTABLE  0x00
1379 #define EFI_ACPI_5_1_ERROR_SEVERITY_FATAL        0x01
1380 #define EFI_ACPI_5_1_ERROR_SEVERITY_CORRECTED    0x02
1381 #define EFI_ACPI_5_1_ERROR_SEVERITY_NONE         0x03
1382
1383 ///
1384 /// Generic Error Data Entry Definition
1385 ///
1386 typedef struct {
1387   UINT8    SectionType[16];
1388   UINT32   ErrorSeverity;
1389   UINT16   Revision;
1390   UINT8    ValidationBits;
1391   UINT8    Flags;
1392   UINT32   ErrorDataLength;
1393   UINT8    FruId[16];
1394   UINT8    FruText[20];
1395 } EFI_ACPI_5_1_GENERIC_ERROR_DATA_ENTRY_STRUCTURE;
1396
1397 ///
1398 /// Generic Error Data Entry Version (as defined in ACPI 5.1 spec.)
1399 ///
1400 #define EFI_ACPI_5_1_GENERIC_ERROR_DATA_ENTRY_REVISION  0x0201
1401
1402 ///
1403 /// HEST - Hardware Error Source Table
1404 ///
1405 typedef struct {
1406   EFI_ACPI_DESCRIPTION_HEADER Header;
1407   UINT32                      ErrorSourceCount;
1408 } EFI_ACPI_5_1_HARDWARE_ERROR_SOURCE_TABLE_HEADER;
1409
1410 ///
1411 /// HEST Version (as defined in ACPI 5.1 spec.)
1412 ///
1413 #define EFI_ACPI_5_1_HARDWARE_ERROR_SOURCE_TABLE_REVISION 0x01
1414
1415 //
1416 // Error Source structure types.
1417 //
1418 #define EFI_ACPI_5_1_IA32_ARCHITECTURE_MACHINE_CHECK_EXCEPTION  0x00
1419 #define EFI_ACPI_5_1_IA32_ARCHITECTURE_CORRECTED_MACHINE_CHECK  0x01
1420 #define EFI_ACPI_5_1_IA32_ARCHITECTURE_NMI_ERROR                0x02
1421 #define EFI_ACPI_5_1_PCI_EXPRESS_ROOT_PORT_AER                  0x06
1422 #define EFI_ACPI_5_1_PCI_EXPRESS_DEVICE_AER                     0x07
1423 #define EFI_ACPI_5_1_PCI_EXPRESS_BRIDGE_AER                     0x08
1424 #define EFI_ACPI_5_1_GENERIC_HARDWARE_ERROR                     0x09
1425
1426 //
1427 // Error Source structure flags.
1428 //
1429 #define EFI_ACPI_5_1_ERROR_SOURCE_FLAG_FIRMWARE_FIRST       (1 << 0)
1430 #define EFI_ACPI_5_1_ERROR_SOURCE_FLAG_GLOBAL               (1 << 1)
1431
1432 ///
1433 /// IA-32 Architecture Machine Check Exception Structure Definition
1434 ///
1435 typedef struct {
1436   UINT16  Type;
1437   UINT16  SourceId;
1438   UINT8   Reserved0[2];
1439   UINT8   Flags;
1440   UINT8   Enabled;
1441   UINT32  NumberOfRecordsToPreAllocate;
1442   UINT32  MaxSectionsPerRecord;
1443   UINT64  GlobalCapabilityInitData;
1444   UINT64  GlobalControlInitData;
1445   UINT8   NumberOfHardwareBanks;
1446   UINT8   Reserved1[7];
1447 } EFI_ACPI_5_1_IA32_ARCHITECTURE_MACHINE_CHECK_EXCEPTION_STRUCTURE;
1448
1449 ///
1450 /// IA-32 Architecture Machine Check Bank Structure Definition
1451 ///
1452 typedef struct {
1453   UINT8   BankNumber;
1454   UINT8   ClearStatusOnInitialization;
1455   UINT8   StatusDataFormat;
1456   UINT8   Reserved0;
1457   UINT32  ControlRegisterMsrAddress;
1458   UINT64  ControlInitData;
1459   UINT32  StatusRegisterMsrAddress;
1460   UINT32  AddressRegisterMsrAddress;
1461   UINT32  MiscRegisterMsrAddress;
1462 } EFI_ACPI_5_1_IA32_ARCHITECTURE_MACHINE_CHECK_ERROR_BANK_STRUCTURE;
1463
1464 ///
1465 /// IA-32 Architecture Machine Check Bank Structure MCA data format
1466 ///
1467 #define EFI_ACPI_5_1_IA32_ARCHITECTURE_MACHINE_CHECK_ERROR_DATA_FORMAT_IA32      0x00
1468 #define EFI_ACPI_5_1_IA32_ARCHITECTURE_MACHINE_CHECK_ERROR_DATA_FORMAT_INTEL64   0x01
1469 #define EFI_ACPI_5_1_IA32_ARCHITECTURE_MACHINE_CHECK_ERROR_DATA_FORMAT_AMD64     0x02
1470
1471 //
1472 // Hardware Error Notification types. All other values are reserved
1473 //
1474 #define EFI_ACPI_5_1_HARDWARE_ERROR_NOTIFICATION_POLLED                0x00
1475 #define EFI_ACPI_5_1_HARDWARE_ERROR_NOTIFICATION_EXTERNAL_INTERRUPT    0x01
1476 #define EFI_ACPI_5_1_HARDWARE_ERROR_NOTIFICATION_LOCAL_INTERRUPT       0x02
1477 #define EFI_ACPI_5_1_HARDWARE_ERROR_NOTIFICATION_SCI                   0x03
1478 #define EFI_ACPI_5_1_HARDWARE_ERROR_NOTIFICATION_NMI                   0x04
1479
1480 ///
1481 /// Hardware Error Notification Configuration Write Enable Structure Definition
1482 ///
1483 typedef struct {
1484   UINT16    Type:1;
1485   UINT16    PollInterval:1;
1486   UINT16    SwitchToPollingThresholdValue:1;
1487   UINT16    SwitchToPollingThresholdWindow:1;
1488   UINT16    ErrorThresholdValue:1;
1489   UINT16    ErrorThresholdWindow:1;
1490   UINT16    Reserved:10;
1491 } EFI_ACPI_5_1_HARDWARE_ERROR_NOTIFICATION_CONFIGURATION_WRITE_ENABLE_STRUCTURE;
1492
1493 ///
1494 /// Hardware Error Notification Structure Definition
1495 ///
1496 typedef struct {
1497   UINT8                                                                          Type;
1498   UINT8                                                                          Length;
1499   EFI_ACPI_5_1_HARDWARE_ERROR_NOTIFICATION_CONFIGURATION_WRITE_ENABLE_STRUCTURE  ConfigurationWriteEnable;
1500   UINT32                                                                         PollInterval;
1501   UINT32                                                                         Vector;
1502   UINT32                                                                         SwitchToPollingThresholdValue;
1503   UINT32                                                                         SwitchToPollingThresholdWindow;
1504   UINT32                                                                         ErrorThresholdValue;
1505   UINT32                                                                         ErrorThresholdWindow;
1506 } EFI_ACPI_5_1_HARDWARE_ERROR_NOTIFICATION_STRUCTURE;
1507
1508 ///
1509 /// IA-32 Architecture Corrected Machine Check Structure Definition
1510 ///
1511 typedef struct {
1512   UINT16                                                 Type;
1513   UINT16                                                 SourceId;
1514   UINT8                                                  Reserved0[2];
1515   UINT8                                                  Flags;
1516   UINT8                                                  Enabled;
1517   UINT32                                                 NumberOfRecordsToPreAllocate;
1518   UINT32                                                 MaxSectionsPerRecord;
1519   EFI_ACPI_5_1_HARDWARE_ERROR_NOTIFICATION_STRUCTURE     NotificationStructure;
1520   UINT8                                                  NumberOfHardwareBanks;
1521   UINT8                                                  Reserved1[3];
1522 } EFI_ACPI_5_1_IA32_ARCHITECTURE_CORRECTED_MACHINE_CHECK_STRUCTURE;
1523
1524 ///
1525 /// IA-32 Architecture NMI Error Structure Definition
1526 ///
1527 typedef struct {
1528   UINT16  Type;
1529   UINT16  SourceId;
1530   UINT8   Reserved0[2];
1531   UINT32  NumberOfRecordsToPreAllocate;
1532   UINT32  MaxSectionsPerRecord;
1533   UINT32  MaxRawDataLength;
1534 } EFI_ACPI_5_1_IA32_ARCHITECTURE_NMI_ERROR_STRUCTURE;
1535
1536 ///
1537 /// PCI Express Root Port AER Structure Definition
1538 ///
1539 typedef struct {
1540   UINT16  Type;
1541   UINT16  SourceId;
1542   UINT8   Reserved0[2];
1543   UINT8   Flags;
1544   UINT8   Enabled;
1545   UINT32  NumberOfRecordsToPreAllocate;
1546   UINT32  MaxSectionsPerRecord;
1547   UINT32  Bus;
1548   UINT16  Device;
1549   UINT16  Function;
1550   UINT16  DeviceControl;
1551   UINT8   Reserved1[2];
1552   UINT32  UncorrectableErrorMask;
1553   UINT32  UncorrectableErrorSeverity;
1554   UINT32  CorrectableErrorMask;
1555   UINT32  AdvancedErrorCapabilitiesAndControl;
1556   UINT32  RootErrorCommand;
1557 } EFI_ACPI_5_1_PCI_EXPRESS_ROOT_PORT_AER_STRUCTURE;
1558
1559 ///
1560 /// PCI Express Device AER Structure Definition
1561 ///
1562 typedef struct {
1563   UINT16  Type;
1564   UINT16  SourceId;
1565   UINT8   Reserved0[2];
1566   UINT8   Flags;
1567   UINT8   Enabled;
1568   UINT32  NumberOfRecordsToPreAllocate;
1569   UINT32  MaxSectionsPerRecord;
1570   UINT32  Bus;
1571   UINT16  Device;
1572   UINT16  Function;
1573   UINT16  DeviceControl;
1574   UINT8   Reserved1[2];
1575   UINT32  UncorrectableErrorMask;
1576   UINT32  UncorrectableErrorSeverity;
1577   UINT32  CorrectableErrorMask;
1578   UINT32  AdvancedErrorCapabilitiesAndControl;
1579 } EFI_ACPI_5_1_PCI_EXPRESS_DEVICE_AER_STRUCTURE;
1580
1581 ///
1582 /// PCI Express Bridge AER Structure Definition
1583 ///
1584 typedef struct {
1585   UINT16  Type;
1586   UINT16  SourceId;
1587   UINT8   Reserved0[2];
1588   UINT8   Flags;
1589   UINT8   Enabled;
1590   UINT32  NumberOfRecordsToPreAllocate;
1591   UINT32  MaxSectionsPerRecord;
1592   UINT32  Bus;
1593   UINT16  Device;
1594   UINT16  Function;
1595   UINT16  DeviceControl;
1596   UINT8   Reserved1[2];
1597   UINT32  UncorrectableErrorMask;
1598   UINT32  UncorrectableErrorSeverity;
1599   UINT32  CorrectableErrorMask;
1600   UINT32  AdvancedErrorCapabilitiesAndControl;
1601   UINT32  SecondaryUncorrectableErrorMask;
1602   UINT32  SecondaryUncorrectableErrorSeverity;
1603   UINT32  SecondaryAdvancedErrorCapabilitiesAndControl;
1604 } EFI_ACPI_5_1_PCI_EXPRESS_BRIDGE_AER_STRUCTURE;
1605
1606 ///
1607 /// Generic Hardware Error Source Structure Definition
1608 ///
1609 typedef struct {
1610   UINT16                                                 Type;
1611   UINT16                                                 SourceId;
1612   UINT16                                                 RelatedSourceId;
1613   UINT8                                                  Flags;
1614   UINT8                                                  Enabled;
1615   UINT32                                                 NumberOfRecordsToPreAllocate;
1616   UINT32                                                 MaxSectionsPerRecord;
1617   UINT32                                                 MaxRawDataLength;
1618   EFI_ACPI_5_1_GENERIC_ADDRESS_STRUCTURE                 ErrorStatusAddress;
1619   EFI_ACPI_5_1_HARDWARE_ERROR_NOTIFICATION_STRUCTURE     NotificationStructure;
1620   UINT32                                                 ErrorStatusBlockLength;
1621 } EFI_ACPI_5_1_GENERIC_HARDWARE_ERROR_SOURCE_STRUCTURE;
1622
1623 ///
1624 /// Generic Error Status Definition
1625 ///
1626 typedef struct {
1627   EFI_ACPI_5_1_ERROR_BLOCK_STATUS              BlockStatus;
1628   UINT32                                       RawDataOffset;
1629   UINT32                                       RawDataLength;
1630   UINT32                                       DataLength;
1631   UINT32                                       ErrorSeverity;
1632 } EFI_ACPI_5_1_GENERIC_ERROR_STATUS_STRUCTURE;
1633
1634 ///
1635 /// ERST - Error Record Serialization Table
1636 ///
1637 typedef struct {
1638   EFI_ACPI_DESCRIPTION_HEADER Header;
1639   UINT32                      SerializationHeaderSize;
1640   UINT8                       Reserved0[4];
1641   UINT32                      InstructionEntryCount;
1642 } EFI_ACPI_5_1_ERROR_RECORD_SERIALIZATION_TABLE_HEADER;
1643
1644 ///
1645 /// ERST Version (as defined in ACPI 5.1 spec.)
1646 ///
1647 #define EFI_ACPI_5_1_ERROR_RECORD_SERIALIZATION_TABLE_REVISION 0x01
1648
1649 ///
1650 /// ERST Serialization Actions
1651 ///
1652 #define EFI_ACPI_5_1_ERST_BEGIN_WRITE_OPERATION                    0x00
1653 #define EFI_ACPI_5_1_ERST_BEGIN_READ_OPERATION                     0x01
1654 #define EFI_ACPI_5_1_ERST_BEGIN_CLEAR_OPERATION                    0x02
1655 #define EFI_ACPI_5_1_ERST_END_OPERATION                            0x03
1656 #define EFI_ACPI_5_1_ERST_SET_RECORD_OFFSET                        0x04
1657 #define EFI_ACPI_5_1_ERST_EXECUTE_OPERATION                        0x05
1658 #define EFI_ACPI_5_1_ERST_CHECK_BUSY_STATUS                        0x06
1659 #define EFI_ACPI_5_1_ERST_GET_COMMAND_STATUS                       0x07
1660 #define EFI_ACPI_5_1_ERST_GET_RECORD_IDENTIFIER                    0x08
1661 #define EFI_ACPI_5_1_ERST_SET_RECORD_IDENTIFIER                    0x09
1662 #define EFI_ACPI_5_1_ERST_GET_RECORD_COUNT                         0x0A
1663 #define EFI_ACPI_5_1_ERST_BEGIN_DUMMY_WRITE_OPERATION              0x0B
1664 #define EFI_ACPI_5_1_ERST_GET_ERROR_LOG_ADDRESS_RANGE              0x0D
1665 #define EFI_ACPI_5_1_ERST_GET_ERROR_LOG_ADDRESS_RANGE_LENGTH       0x0E
1666 #define EFI_ACPI_5_1_ERST_GET_ERROR_LOG_ADDRESS_RANGE_ATTRIBUTES   0x0F
1667
1668 ///
1669 /// ERST Action Command Status
1670 ///
1671 #define EFI_ACPI_5_1_ERST_STATUS_SUCCESS                           0x00
1672 #define EFI_ACPI_5_1_ERST_STATUS_NOT_ENOUGH_SPACE                  0x01
1673 #define EFI_ACPI_5_1_ERST_STATUS_HARDWARE_NOT_AVAILABLE            0x02
1674 #define EFI_ACPI_5_1_ERST_STATUS_FAILED                            0x03
1675 #define EFI_ACPI_5_1_ERST_STATUS_RECORD_STORE_EMPTY                0x04
1676 #define EFI_ACPI_5_1_ERST_STATUS_RECORD_NOT_FOUND                  0x05
1677
1678 ///
1679 /// ERST Serialization Instructions
1680 ///
1681 #define EFI_ACPI_5_1_ERST_READ_REGISTER                            0x00
1682 #define EFI_ACPI_5_1_ERST_READ_REGISTER_VALUE                      0x01
1683 #define EFI_ACPI_5_1_ERST_WRITE_REGISTER                           0x02
1684 #define EFI_ACPI_5_1_ERST_WRITE_REGISTER_VALUE                     0x03
1685 #define EFI_ACPI_5_1_ERST_NOOP                                     0x04
1686 #define EFI_ACPI_5_1_ERST_LOAD_VAR1                                0x05
1687 #define EFI_ACPI_5_1_ERST_LOAD_VAR2                                0x06
1688 #define EFI_ACPI_5_1_ERST_STORE_VAR1                               0x07
1689 #define EFI_ACPI_5_1_ERST_ADD                                      0x08
1690 #define EFI_ACPI_5_1_ERST_SUBTRACT                                 0x09
1691 #define EFI_ACPI_5_1_ERST_ADD_VALUE                                0x0A
1692 #define EFI_ACPI_5_1_ERST_SUBTRACT_VALUE                           0x0B
1693 #define EFI_ACPI_5_1_ERST_STALL                                    0x0C
1694 #define EFI_ACPI_5_1_ERST_STALL_WHILE_TRUE                         0x0D
1695 #define EFI_ACPI_5_1_ERST_SKIP_NEXT_INSTRUCTION_IF_TRUE            0x0E
1696 #define EFI_ACPI_5_1_ERST_GOTO                                     0x0F
1697 #define EFI_ACPI_5_1_ERST_SET_SRC_ADDRESS_BASE                     0x10
1698 #define EFI_ACPI_5_1_ERST_SET_DST_ADDRESS_BASE                     0x11
1699 #define EFI_ACPI_5_1_ERST_MOVE_DATA                                0x12
1700
1701 ///
1702 /// ERST Instruction Flags
1703 ///
1704 #define EFI_ACPI_5_1_ERST_PRESERVE_REGISTER                        0x01
1705
1706 ///
1707 /// ERST Serialization Instruction Entry
1708 ///
1709 typedef struct {
1710   UINT8                                    SerializationAction;
1711   UINT8                                    Instruction;
1712   UINT8                                    Flags;
1713   UINT8                                    Reserved0;
1714   EFI_ACPI_5_1_GENERIC_ADDRESS_STRUCTURE   RegisterRegion;
1715   UINT64                                   Value;
1716   UINT64                                   Mask;
1717 } EFI_ACPI_5_1_ERST_SERIALIZATION_INSTRUCTION_ENTRY;
1718
1719 ///
1720 /// EINJ - Error Injection Table
1721 ///
1722 typedef struct {
1723   EFI_ACPI_DESCRIPTION_HEADER Header;
1724   UINT32                      InjectionHeaderSize;
1725   UINT8                       InjectionFlags;
1726   UINT8                       Reserved0[3];
1727   UINT32                      InjectionEntryCount;
1728 } EFI_ACPI_5_1_ERROR_INJECTION_TABLE_HEADER;
1729
1730 ///
1731 /// EINJ Version (as defined in ACPI 5.1 spec.)
1732 ///
1733 #define EFI_ACPI_5_1_ERROR_INJECTION_TABLE_REVISION 0x01
1734
1735 ///
1736 /// EINJ Error Injection Actions
1737 ///
1738 #define EFI_ACPI_5_1_EINJ_BEGIN_INJECTION_OPERATION                0x00
1739 #define EFI_ACPI_5_1_EINJ_GET_TRIGGER_ERROR_ACTION_TABLE           0x01
1740 #define EFI_ACPI_5_1_EINJ_SET_ERROR_TYPE                           0x02
1741 #define EFI_ACPI_5_1_EINJ_GET_ERROR_TYPE                           0x03
1742 #define EFI_ACPI_5_1_EINJ_END_OPERATION                            0x04
1743 #define EFI_ACPI_5_1_EINJ_EXECUTE_OPERATION                        0x05
1744 #define EFI_ACPI_5_1_EINJ_CHECK_BUSY_STATUS                        0x06
1745 #define EFI_ACPI_5_1_EINJ_GET_COMMAND_STATUS                       0x07
1746 #define EFI_ACPI_5_1_EINJ_TRIGGER_ERROR                            0xFF
1747
1748 ///
1749 /// EINJ Action Command Status
1750 ///
1751 #define EFI_ACPI_5_1_EINJ_STATUS_SUCCESS                           0x00
1752 #define EFI_ACPI_5_1_EINJ_STATUS_UNKNOWN_FAILURE                   0x01
1753 #define EFI_ACPI_5_1_EINJ_STATUS_INVALID_ACCESS                    0x02
1754
1755 ///
1756 /// EINJ Error Type Definition
1757 ///
1758 #define EFI_ACPI_5_1_EINJ_ERROR_PROCESSOR_CORRECTABLE                 (1 << 0)
1759 #define EFI_ACPI_5_1_EINJ_ERROR_PROCESSOR_UNCORRECTABLE_NONFATAL      (1 << 1)
1760 #define EFI_ACPI_5_1_EINJ_ERROR_PROCESSOR_UNCORRECTABLE_FATAL         (1 << 2)
1761 #define EFI_ACPI_5_1_EINJ_ERROR_MEMORY_CORRECTABLE                    (1 << 3)
1762 #define EFI_ACPI_5_1_EINJ_ERROR_MEMORY_UNCORRECTABLE_NONFATAL         (1 << 4)
1763 #define EFI_ACPI_5_1_EINJ_ERROR_MEMORY_UNCORRECTABLE_FATAL            (1 << 5)
1764 #define EFI_ACPI_5_1_EINJ_ERROR_PCI_EXPRESS_CORRECTABLE               (1 << 6)
1765 #define EFI_ACPI_5_1_EINJ_ERROR_PCI_EXPRESS_UNCORRECTABLE_NONFATAL    (1 << 7)
1766 #define EFI_ACPI_5_1_EINJ_ERROR_PCI_EXPRESS_UNCORRECTABLE_FATAL       (1 << 8)
1767 #define EFI_ACPI_5_1_EINJ_ERROR_PLATFORM_CORRECTABLE                  (1 << 9)
1768 #define EFI_ACPI_5_1_EINJ_ERROR_PLATFORM_UNCORRECTABLE_NONFATAL       (1 << 10)
1769 #define EFI_ACPI_5_1_EINJ_ERROR_PLATFORM_UNCORRECTABLE_FATAL          (1 << 11)
1770
1771 ///
1772 /// EINJ Injection Instructions
1773 ///
1774 #define EFI_ACPI_5_1_EINJ_READ_REGISTER                            0x00
1775 #define EFI_ACPI_5_1_EINJ_READ_REGISTER_VALUE                      0x01
1776 #define EFI_ACPI_5_1_EINJ_WRITE_REGISTER                           0x02
1777 #define EFI_ACPI_5_1_EINJ_WRITE_REGISTER_VALUE                     0x03
1778 #define EFI_ACPI_5_1_EINJ_NOOP                                     0x04
1779
1780 ///
1781 /// EINJ Instruction Flags
1782 ///
1783 #define EFI_ACPI_5_1_EINJ_PRESERVE_REGISTER                        0x01
1784
1785 ///
1786 /// EINJ Injection Instruction Entry
1787 ///
1788 typedef struct {
1789   UINT8                                    InjectionAction;
1790   UINT8                                    Instruction;
1791   UINT8                                    Flags;
1792   UINT8                                    Reserved0;
1793   EFI_ACPI_5_1_GENERIC_ADDRESS_STRUCTURE   RegisterRegion;
1794   UINT64                                   Value;
1795   UINT64                                   Mask;
1796 } EFI_ACPI_5_1_EINJ_INJECTION_INSTRUCTION_ENTRY;
1797
1798 ///
1799 /// EINJ Trigger Action Table
1800 ///
1801 typedef struct {
1802   UINT32  HeaderSize;
1803   UINT32  Revision;
1804   UINT32  TableSize;
1805   UINT32  EntryCount;
1806 } EFI_ACPI_5_1_EINJ_TRIGGER_ACTION_TABLE;
1807
1808 ///
1809 /// Platform Communications Channel Table (PCCT)
1810 ///
1811 typedef struct {
1812   EFI_ACPI_DESCRIPTION_HEADER Header;
1813   UINT32                      Flags;
1814   UINT64                      Reserved;
1815 } EFI_ACPI_5_1_PLATFORM_COMMUNICATION_CHANNEL_TABLE_HEADER;
1816
1817 ///
1818 /// PCCT Version (as defined in ACPI 5.1 spec.)
1819 ///
1820 #define EFI_ACPI_5_1_PLATFORM_COMMUNICATION_CHANNEL_TABLE_REVISION 0x01
1821
1822 ///
1823 /// PCCT Global Flags
1824 ///
1825 #define EFI_ACPI_5_1_PCCT_FLAGS_SCI_DOORBELL                      BIT0
1826
1827 //
1828 // PCCT Subspace type
1829 //
1830 #define EFI_ACPI_5_1_PCCT_SUBSPACE_TYPE_GENERIC  0x00
1831
1832 ///
1833 /// PCC Subspace Structure Header
1834 ///
1835 typedef struct {
1836   UINT8        Type;
1837   UINT8        Length;
1838 } EFI_ACPI_5_1_PCCT_SUBSPACE_HEADER;
1839
1840 ///
1841 /// Generic Communications Subspace Structure
1842 ///
1843 typedef struct {
1844   UINT8                                    Type;
1845   UINT8                                    Length;
1846   UINT8                                    Reserved[6];
1847   UINT64                                   BaseAddress;
1848   UINT64                                   AddressLength;
1849   EFI_ACPI_5_1_GENERIC_ADDRESS_STRUCTURE   DoorbellRegister;
1850   UINT64                                   DoorbellPreserve;
1851   UINT64                                   DoorbellWrite;
1852   UINT32                                   NominalLatency;
1853   UINT32                                   MaximumPeriodicAccessRate;
1854   UINT16                                   MinimumRequestTurnaroundTime;
1855 } EFI_ACPI_5_1_PCCT_SUBSPACE_GENERIC;
1856
1857 ///
1858 /// Generic Communications Channel Shared Memory Region
1859 ///
1860
1861 typedef struct {
1862   UINT8                                    Command;
1863   UINT8                                    Reserved:7;
1864   UINT8                                    GenerateSci:1;
1865 } EFI_ACPI_5_1_PCCT_GENERIC_SHARED_MEMORY_REGION_COMMAND;
1866
1867 typedef struct {
1868   UINT8                                    CommandComplete:1;
1869   UINT8                                    SciDoorbell:1;
1870   UINT8                                    Error:1;
1871   UINT8                                    PlatformNotification:1;
1872   UINT8                                    Reserved:4;
1873   UINT8                                    Reserved1;
1874 } EFI_ACPI_5_1_PCCT_GENERIC_SHARED_MEMORY_REGION_STATUS;
1875
1876 typedef struct {
1877   UINT32                                                    Signature;
1878   EFI_ACPI_5_1_PCCT_GENERIC_SHARED_MEMORY_REGION_COMMAND    Command;
1879   EFI_ACPI_5_1_PCCT_GENERIC_SHARED_MEMORY_REGION_STATUS     Status;
1880 } EFI_ACPI_5_1_PCCT_GENERIC_SHARED_MEMORY_REGION_HEADER;
1881
1882 //
1883 // Known table signatures
1884 //
1885
1886 ///
1887 /// "RSD PTR " Root System Description Pointer
1888 ///
1889 #define EFI_ACPI_5_1_ROOT_SYSTEM_DESCRIPTION_POINTER_SIGNATURE  SIGNATURE_64('R', 'S', 'D', ' ', 'P', 'T', 'R', ' ')
1890
1891 ///
1892 /// "APIC" Multiple APIC Description Table
1893 ///
1894 #define EFI_ACPI_5_1_MULTIPLE_APIC_DESCRIPTION_TABLE_SIGNATURE  SIGNATURE_32('A', 'P', 'I', 'C')
1895
1896 ///
1897 /// "BERT" Boot Error Record Table
1898 ///
1899 #define EFI_ACPI_5_1_BOOT_ERROR_RECORD_TABLE_SIGNATURE  SIGNATURE_32('B', 'E', 'R', 'T')
1900
1901 ///
1902 /// "BGRT" Boot Graphics Resource Table
1903 ///
1904 #define EFI_ACPI_5_1_BOOT_GRAPHICS_RESOURCE_TABLE_SIGNATURE  SIGNATURE_32('B', 'G', 'R', 'T')
1905
1906 ///
1907 /// "CPEP" Corrected Platform Error Polling Table
1908 ///
1909 #define EFI_ACPI_5_1_CORRECTED_PLATFORM_ERROR_POLLING_TABLE_SIGNATURE  SIGNATURE_32('C', 'P', 'E', 'P')
1910
1911 ///
1912 /// "DSDT" Differentiated System Description Table
1913 ///
1914 #define EFI_ACPI_5_1_DIFFERENTIATED_SYSTEM_DESCRIPTION_TABLE_SIGNATURE  SIGNATURE_32('D', 'S', 'D', 'T')
1915
1916 ///
1917 /// "ECDT" Embedded Controller Boot Resources Table
1918 ///
1919 #define EFI_ACPI_5_1_EMBEDDED_CONTROLLER_BOOT_RESOURCES_TABLE_SIGNATURE  SIGNATURE_32('E', 'C', 'D', 'T')
1920
1921 ///
1922 /// "EINJ" Error Injection Table
1923 ///
1924 #define EFI_ACPI_5_1_ERROR_INJECTION_TABLE_SIGNATURE  SIGNATURE_32('E', 'I', 'N', 'J')
1925
1926 ///
1927 /// "ERST" Error Record Serialization Table
1928 ///
1929 #define EFI_ACPI_5_1_ERROR_RECORD_SERIALIZATION_TABLE_SIGNATURE  SIGNATURE_32('E', 'R', 'S', 'T')
1930
1931 ///
1932 /// "FACP" Fixed ACPI Description Table
1933 ///
1934 #define EFI_ACPI_5_1_FIXED_ACPI_DESCRIPTION_TABLE_SIGNATURE  SIGNATURE_32('F', 'A', 'C', 'P')
1935
1936 ///
1937 /// "FACS" Firmware ACPI Control Structure
1938 ///
1939 #define EFI_ACPI_5_1_FIRMWARE_ACPI_CONTROL_STRUCTURE_SIGNATURE  SIGNATURE_32('F', 'A', 'C', 'S')
1940
1941 ///
1942 /// "FPDT" Firmware Performance Data Table
1943 ///
1944 #define EFI_ACPI_5_1_FIRMWARE_PERFORMANCE_DATA_TABLE_SIGNATURE  SIGNATURE_32('F', 'P', 'D', 'T')
1945
1946 ///
1947 /// "GTDT" Generic Timer Description Table
1948 ///
1949 #define EFI_ACPI_5_1_GENERIC_TIMER_DESCRIPTION_TABLE_SIGNATURE  SIGNATURE_32('G', 'T', 'D', 'T')
1950
1951 ///
1952 /// "HEST" Hardware Error Source Table
1953 ///
1954 #define EFI_ACPI_5_1_HARDWARE_ERROR_SOURCE_TABLE_SIGNATURE  SIGNATURE_32('H', 'E', 'S', 'T')
1955
1956 ///
1957 /// "MPST" Memory Power State Table
1958 ///
1959 #define EFI_ACPI_5_1_MEMORY_POWER_STATE_TABLE_SIGNATURE  SIGNATURE_32('M', 'P', 'S', 'T')
1960
1961 ///
1962 /// "MSCT" Maximum System Characteristics Table
1963 ///
1964 #define EFI_ACPI_5_1_MAXIMUM_SYSTEM_CHARACTERISTICS_TABLE_SIGNATURE  SIGNATURE_32('M', 'S', 'C', 'T')
1965
1966 ///
1967 /// "PMTT" Platform Memory Topology Table
1968 ///
1969 #define EFI_ACPI_5_1_PLATFORM_MEMORY_TOPOLOGY_TABLE_SIGNATURE  SIGNATURE_32('P', 'M', 'T', 'T')
1970
1971 ///
1972 /// "PSDT" Persistent System Description Table
1973 ///
1974 #define EFI_ACPI_5_1_PERSISTENT_SYSTEM_DESCRIPTION_TABLE_SIGNATURE  SIGNATURE_32('P', 'S', 'D', 'T')
1975
1976 ///
1977 /// "RASF" ACPI RAS Feature Table
1978 ///
1979 #define EFI_ACPI_5_1_ACPI_RAS_FEATURE_TABLE_SIGNATURE  SIGNATURE_32('R', 'A', 'S', 'F')
1980
1981 ///
1982 /// "RSDT" Root System Description Table
1983 ///
1984 #define EFI_ACPI_5_1_ROOT_SYSTEM_DESCRIPTION_TABLE_SIGNATURE  SIGNATURE_32('R', 'S', 'D', 'T')
1985
1986 ///
1987 /// "SBST" Smart Battery Specification Table
1988 ///
1989 #define EFI_ACPI_5_1_SMART_BATTERY_SPECIFICATION_TABLE_SIGNATURE  SIGNATURE_32('S', 'B', 'S', 'T')
1990
1991 ///
1992 /// "SLIT" System Locality Information Table
1993 ///
1994 #define EFI_ACPI_5_1_SYSTEM_LOCALITY_INFORMATION_TABLE_SIGNATURE  SIGNATURE_32('S', 'L', 'I', 'T')
1995
1996 ///
1997 /// "SRAT" System Resource Affinity Table
1998 ///
1999 #define EFI_ACPI_5_1_SYSTEM_RESOURCE_AFFINITY_TABLE_SIGNATURE  SIGNATURE_32('S', 'R', 'A', 'T')
2000
2001 ///
2002 /// "SSDT" Secondary System Description Table
2003 ///
2004 #define EFI_ACPI_5_1_SECONDARY_SYSTEM_DESCRIPTION_TABLE_SIGNATURE  SIGNATURE_32('S', 'S', 'D', 'T')
2005
2006 ///
2007 /// "XSDT" Extended System Description Table
2008 ///
2009 #define EFI_ACPI_5_1_EXTENDED_SYSTEM_DESCRIPTION_TABLE_SIGNATURE  SIGNATURE_32('X', 'S', 'D', 'T')
2010
2011 ///
2012 /// "BOOT" MS Simple Boot Spec
2013 ///
2014 #define EFI_ACPI_5_1_SIMPLE_BOOT_FLAG_TABLE_SIGNATURE  SIGNATURE_32('B', 'O', 'O', 'T')
2015
2016 ///
2017 /// "CSRT" MS Core System Resource Table
2018 ///
2019 #define EFI_ACPI_5_1_CORE_SYSTEM_RESOURCE_TABLE_SIGNATURE  SIGNATURE_32('C', 'S', 'R', 'T')
2020
2021 ///
2022 /// "DBG2" MS Debug Port 2 Spec
2023 ///
2024 #define EFI_ACPI_5_1_DEBUG_PORT_2_TABLE_SIGNATURE  SIGNATURE_32('D', 'B', 'G', '2')
2025
2026 ///
2027 /// "DBGP" MS Debug Port Spec
2028 ///
2029 #define EFI_ACPI_5_1_DEBUG_PORT_TABLE_SIGNATURE  SIGNATURE_32('D', 'B', 'G', 'P')
2030
2031 ///
2032 /// "DMAR" DMA Remapping Table
2033 ///
2034 #define EFI_ACPI_5_1_DMA_REMAPPING_TABLE_SIGNATURE  SIGNATURE_32('D', 'M', 'A', 'R')
2035
2036 ///
2037 /// "DRTM" Dynamic Root of Trust for Measurement Table
2038 ///
2039 #define EFI_ACPI_5_1_DYNAMIC_ROOT_OF_TRUST_FOR_MEASUREMENT_TABLE_SIGNATURE  SIGNATURE_32('D', 'R', 'T', 'M')
2040
2041 ///
2042 /// "ETDT" Event Timer Description Table
2043 ///
2044 #define EFI_ACPI_5_1_EVENT_TIMER_DESCRIPTION_TABLE_SIGNATURE  SIGNATURE_32('E', 'T', 'D', 'T')
2045
2046 ///
2047 /// "HPET" IA-PC High Precision Event Timer Table
2048 ///
2049 #define EFI_ACPI_5_1_HIGH_PRECISION_EVENT_TIMER_TABLE_SIGNATURE  SIGNATURE_32('H', 'P', 'E', 'T')
2050
2051 ///
2052 /// "iBFT" iSCSI Boot Firmware Table
2053 ///
2054 #define EFI_ACPI_5_1_ISCSI_BOOT_FIRMWARE_TABLE_SIGNATURE  SIGNATURE_32('i', 'B', 'F', 'T')
2055
2056 ///
2057 /// "IVRS" I/O Virtualization Reporting Structure
2058 ///
2059 #define EFI_ACPI_5_1_IO_VIRTUALIZATION_REPORTING_STRUCTURE_SIGNATURE  SIGNATURE_32('I', 'V', 'R', 'S')
2060
2061 ///
2062 /// "LPIT" Low Power Idle Table
2063 ///
2064 #define EFI_ACPI_5_1_IO_LOW_POWER_IDLE_TABLE_STRUCTURE_SIGNATURE  SIGNATURE_32('L', 'P', 'I', 'T')
2065
2066 ///
2067 /// "MCFG" PCI Express Memory Mapped Configuration Space Base Address Description Table
2068 ///
2069 #define EFI_ACPI_5_1_PCI_EXPRESS_MEMORY_MAPPED_CONFIGURATION_SPACE_BASE_ADDRESS_DESCRIPTION_TABLE_SIGNATURE  SIGNATURE_32('M', 'C', 'F', 'G')
2070
2071 ///
2072 /// "MCHI" Management Controller Host Interface Table
2073 ///
2074 #define EFI_ACPI_5_1_MANAGEMENT_CONTROLLER_HOST_INTERFACE_TABLE_SIGNATURE  SIGNATURE_32('M', 'C', 'H', 'I')
2075
2076 ///
2077 /// "MSDM" MS Data Management Table
2078 ///
2079 #define EFI_ACPI_5_1_DATA_MANAGEMENT_TABLE_SIGNATURE  SIGNATURE_32('M', 'S', 'D', 'M')
2080
2081 ///
2082 /// "SLIC" MS Software Licensing Table Specification
2083 ///
2084 #define EFI_ACPI_5_1_SOFTWARE_LICENSING_TABLE_SIGNATURE  SIGNATURE_32('S', 'L', 'I', 'C')
2085
2086 ///
2087 /// "SPCR" Serial Port Concole Redirection Table
2088 ///
2089 #define EFI_ACPI_5_1_SERIAL_PORT_CONSOLE_REDIRECTION_TABLE_SIGNATURE  SIGNATURE_32('S', 'P', 'C', 'R')
2090
2091 ///
2092 /// "SPMI" Server Platform Management Interface Table
2093 ///
2094 #define EFI_ACPI_5_1_SERVER_PLATFORM_MANAGEMENT_INTERFACE_TABLE_SIGNATURE  SIGNATURE_32('S', 'P', 'M', 'I')
2095
2096 ///
2097 /// "TCPA" Trusted Computing Platform Alliance Capabilities Table
2098 ///
2099 #define EFI_ACPI_5_1_TRUSTED_COMPUTING_PLATFORM_ALLIANCE_CAPABILITIES_TABLE_SIGNATURE  SIGNATURE_32('T', 'C', 'P', 'A')
2100
2101 ///
2102 /// "TPM2" Trusted Computing Platform 1 Table
2103 ///
2104 #define EFI_ACPI_5_1_TRUSTED_COMPUTING_PLATFORM_2_TABLE_SIGNATURE  SIGNATURE_32('T', 'P', 'M', '2')
2105
2106 ///
2107 /// "UEFI" UEFI ACPI Data Table
2108 ///
2109 #define EFI_ACPI_5_1_UEFI_ACPI_DATA_TABLE_SIGNATURE  SIGNATURE_32('U', 'E', 'F', 'I')
2110
2111 ///
2112 /// "WAET" Windows ACPI Emulated Devices Table
2113 ///
2114 #define EFI_ACPI_5_1_WINDOWS_ACPI_EMULATED_DEVICES_TABLE_SIGNATURE  SIGNATURE_32('W', 'A', 'E', 'T')
2115
2116 ///
2117 /// "WDAT" Watchdog Action Table
2118 ///
2119 #define EFI_ACPI_5_1_WATCHDOG_ACTION_TABLE_SIGNATURE  SIGNATURE_32('W', 'D', 'A', 'T')
2120
2121 ///
2122 /// "WDRT" Watchdog Resource Table
2123 ///
2124 #define EFI_ACPI_5_1_WATCHDOG_RESOURCE_TABLE_SIGNATURE  SIGNATURE_32('W', 'D', 'R', 'T')
2125
2126 ///
2127 /// "WPBT" MS Platform Binary Table
2128 ///
2129 #define EFI_ACPI_5_1_PLATFORM_BINARY_TABLE_SIGNATURE  SIGNATURE_32('W', 'P', 'B', 'T')
2130
2131 #pragma pack()
2132
2133 #endif