2 * Copyright (c) 2002 M. Warner Losh.
3 * Copyright (c) 2000,2001 Jonathan Chen.
6 * Redistribution and use in source and binary forms, with or without
7 * modification, are permitted provided that the following conditions
9 * 1. Redistributions of source code must retain the above copyright
10 * notice, this list of conditions, and the following disclaimer,
11 * without modification, immediately at the beginning of the file.
12 * 2. Redistributions in binary form must reproduce the above copyright
13 * notice, this list of conditions and the following disclaimer in
14 * the documentation and/or other materials provided with the
17 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
18 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
19 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
20 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE FOR
21 * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
22 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
23 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
24 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
25 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
26 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
29 * $FreeBSD: src/sys/dev/pccbb/pccbb.c,v 1.64 2002/11/23 23:09:45 imp Exp $
30 * $DragonFly: src/sys/dev/pccard/pccbb/pccbb.c,v 1.5 2005/03/31 05:43:34 hsu Exp $
34 * Copyright (c) 1998, 1999 and 2000
35 * HAYAKAWA Koichi. All rights reserved.
37 * Redistribution and use in source and binary forms, with or without
38 * modification, are permitted provided that the following conditions
40 * 1. Redistributions of source code must retain the above copyright
41 * notice, this list of conditions and the following disclaimer.
42 * 2. Redistributions in binary form must reproduce the above copyright
43 * notice, this list of conditions and the following disclaimer in the
44 * documentation and/or other materials provided with the distribution.
45 * 3. All advertising materials mentioning features or use of this software
46 * must display the following acknowledgement:
47 * This product includes software developed by HAYAKAWA Koichi.
48 * 4. The name of the author may not be used to endorse or promote products
49 * derived from this software without specific prior written permission.
51 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
52 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
53 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
54 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
55 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
56 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
57 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
58 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
59 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
60 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
64 * Driver for PCI to CardBus Bridge chips
68 * http://www-s.ti.com/cgi-bin/sc/generic2.cgi?family=PCI+CARDBUS+CONTROLLERS
70 * Written by Jonathan Chen <jon@freebsd.org>
71 * The author would like to acknowledge:
72 * * HAYAKAWA Koichi: Author of the NetBSD code for the same thing
73 * * Warner Losh: Newbus/newcard guru and author of the pccard side of things
74 * * YAMAMOTO Shigeru: Author of another FreeBSD cardbus driver
75 * * David Cross: Author of the initial ugly hack for a specific cardbus card
78 #include <sys/param.h>
79 #include <sys/systm.h>
81 #include <sys/errno.h>
82 #include <sys/kernel.h>
84 #include <sys/malloc.h>
85 #include <sys/sysctl.h>
86 #include <sys/kthread.h>
88 #include <machine/bus.h>
90 #include <machine/resource.h>
92 #include <bus/pci/pcireg.h>
93 #include <bus/pci/pcivar.h>
94 #include <machine/clock.h>
96 #include <bus/pccard/pccardreg.h>
97 #include <bus/pccard/pccardvar.h>
99 #include <dev/pccard/exca/excareg.h>
100 #include <dev/pccard/exca/excavar.h>
102 #include <dev/pccard/pccbb/pccbbreg.h>
103 #include <dev/pccard/pccbb/pccbbvar.h>
105 #include "power_if.h"
109 #define DPRINTF(x) do { if (cbb_debug) printf x; } while (0)
110 #define DEVPRINTF(x) do { if (cbb_debug) device_printf x; } while (0)
112 #define PCI_MASK_CONFIG(DEV,REG,MASK,SIZE) \
113 pci_write_config(DEV, REG, pci_read_config(DEV, REG, SIZE) MASK, SIZE)
114 #define PCI_MASK2_CONFIG(DEV,REG,MASK1,MASK2,SIZE) \
115 pci_write_config(DEV, REG, ( \
116 pci_read_config(DEV, REG, SIZE) MASK1) MASK2, SIZE)
118 #define CBB_START_MEM 0x88000000
119 #define CBB_START_32_IO 0x1000
120 #define CBB_START_16_IO 0x100
122 struct yenta_chipinfo {
127 /* Texas Instruments chips */
128 {PCIC_ID_TI1031, "TI1031 PCI-PC Card Bridge", CB_TI113X},
129 {PCIC_ID_TI1130, "TI1130 PCI-CardBus Bridge", CB_TI113X},
130 {PCIC_ID_TI1131, "TI1131 PCI-CardBus Bridge", CB_TI113X},
132 {PCIC_ID_TI1210, "TI1210 PCI-CardBus Bridge", CB_TI12XX},
133 {PCIC_ID_TI1211, "TI1211 PCI-CardBus Bridge", CB_TI12XX},
134 {PCIC_ID_TI1220, "TI1220 PCI-CardBus Bridge", CB_TI12XX},
135 {PCIC_ID_TI1221, "TI1221 PCI-CardBus Bridge", CB_TI12XX},
136 {PCIC_ID_TI1225, "TI1225 PCI-CardBus Bridge", CB_TI12XX},
137 {PCIC_ID_TI1250, "TI1250 PCI-CardBus Bridge", CB_TI125X},
138 {PCIC_ID_TI1251, "TI1251 PCI-CardBus Bridge", CB_TI125X},
139 {PCIC_ID_TI1251B,"TI1251B PCI-CardBus Bridge",CB_TI125X},
140 {PCIC_ID_TI1260, "TI1260 PCI-CardBus Bridge", CB_TI12XX},
141 {PCIC_ID_TI1260B,"TI1260B PCI-CardBus Bridge",CB_TI12XX},
142 {PCIC_ID_TI1410, "TI1410 PCI-CardBus Bridge", CB_TI12XX},
143 {PCIC_ID_TI1420, "TI1420 PCI-CardBus Bridge", CB_TI12XX},
144 {PCIC_ID_TI1421, "TI1421 PCI-CardBus Bridge", CB_TI12XX},
145 {PCIC_ID_TI1450, "TI1450 PCI-CardBus Bridge", CB_TI125X}, /*SIC!*/
146 {PCIC_ID_TI1451, "TI1451 PCI-CardBus Bridge", CB_TI12XX},
147 {PCIC_ID_TI1510, "TI1510 PCI-CardBus Bridge", CB_TI12XX},
148 {PCIC_ID_TI1520, "TI1520 PCI-CardBus Bridge", CB_TI12XX},
149 {PCIC_ID_TI4410, "TI4410 PCI-CardBus Bridge", CB_TI12XX},
150 {PCIC_ID_TI4450, "TI4450 PCI-CardBus Bridge", CB_TI12XX},
151 {PCIC_ID_TI4451, "TI4451 PCI-CardBus Bridge", CB_TI12XX},
152 {PCIC_ID_TI4510, "TI4510 PCI-CardBus Bridge", CB_TI12XX},
155 {PCIC_ID_RICOH_RL5C465, "RF5C465 PCI-CardBus Bridge", CB_RF5C46X},
156 {PCIC_ID_RICOH_RL5C466, "RF5C466 PCI-CardBus Bridge", CB_RF5C46X},
157 {PCIC_ID_RICOH_RL5C475, "RF5C475 PCI-CardBus Bridge", CB_RF5C47X},
158 {PCIC_ID_RICOH_RL5C476, "RF5C476 PCI-CardBus Bridge", CB_RF5C47X},
159 {PCIC_ID_RICOH_RL5C477, "RF5C477 PCI-CardBus Bridge", CB_RF5C47X},
160 {PCIC_ID_RICOH_RL5C478, "RF5C478 PCI-CardBus Bridge", CB_RF5C47X},
162 /* Toshiba products */
163 {PCIC_ID_TOPIC95, "ToPIC95 PCI-CardBus Bridge", CB_TOPIC95},
164 {PCIC_ID_TOPIC95B, "ToPIC95B PCI-CardBus Bridge", CB_TOPIC95},
165 {PCIC_ID_TOPIC97, "ToPIC97 PCI-CardBus Bridge", CB_TOPIC97},
166 {PCIC_ID_TOPIC100, "ToPIC100 PCI-CardBus Bridge", CB_TOPIC97},
169 {PCIC_ID_CLPD6832, "CLPD6832 PCI-CardBus Bridge", CB_CIRRUS},
170 {PCIC_ID_CLPD6833, "CLPD6833 PCI-CardBus Bridge", CB_CIRRUS},
171 {PCIC_ID_CLPD6834, "CLPD6834 PCI-CardBus Bridge", CB_CIRRUS},
174 {PCIC_ID_OZ6832, "O2Micro OZ6832/6833 PCI-CardBus Bridge", CB_CIRRUS},
175 {PCIC_ID_OZ6860, "O2Micro OZ6836/6860 PCI-CardBus Bridge", CB_CIRRUS},
176 {PCIC_ID_OZ6872, "O2Micro OZ6812/6872 PCI-CardBus Bridge", CB_CIRRUS},
177 {PCIC_ID_OZ6912, "O2Micro OZ6912/6972 PCI-CardBus Bridge", CB_CIRRUS},
178 {PCIC_ID_OZ6922, "O2Micro OZ6822 PCI-CardBus Bridge", CB_CIRRUS},
179 {PCIC_ID_OZ6933, "O2Micro OZ6833 PCI-CardBus Bridge", CB_CIRRUS},
182 {0 /* null id */, "unknown", CB_UNKNOWN},
186 SYSCTL_NODE(_hw, OID_AUTO, cbb, CTLFLAG_RD, 0, "CBB parameters");
188 /* There's no way to say TUNEABLE_LONG to get the right types */
189 u_long cbb_start_mem = CBB_START_MEM;
190 TUNABLE_INT("hw.cbb.start_memory", (int *)&cbb_start_mem);
191 SYSCTL_ULONG(_hw_cbb, OID_AUTO, start_memory, CTLFLAG_RW,
192 &cbb_start_mem, CBB_START_MEM,
193 "Starting address for memory allocations");
195 u_long cbb_start_16_io = CBB_START_16_IO;
196 TUNABLE_INT("hw.cbb.start_16_io", (int *)&cbb_start_16_io);
197 SYSCTL_ULONG(_hw_cbb, OID_AUTO, start_16_io, CTLFLAG_RW,
198 &cbb_start_16_io, CBB_START_16_IO,
199 "Starting ioport for 16-bit cards");
201 u_long cbb_start_32_io = CBB_START_32_IO;
202 TUNABLE_INT("hw.cbb.start_32_io", (int *)&cbb_start_32_io);
203 SYSCTL_ULONG(_hw_cbb, OID_AUTO, start_32_io, CTLFLAG_RW,
204 &cbb_start_32_io, CBB_START_32_IO,
205 "Starting ioport for 32-bit cards");
208 TUNABLE_INT("hw.cbb.debug", &cbb_debug);
209 SYSCTL_ULONG(_hw_cbb, OID_AUTO, debug, CTLFLAG_RW, &cbb_debug, 0,
210 "Verbose cardbus bridge debugging");
212 static int cbb_chipset(uint32_t pci_id, const char **namep);
213 static int cbb_probe(device_t brdev);
214 static void cbb_chipinit(struct cbb_softc *sc);
215 static int cbb_attach(device_t brdev);
216 static void cbb_release_helper(device_t brdev);
217 static int cbb_detach(device_t brdev);
218 static int cbb_shutdown(device_t brdev);
219 static void cbb_driver_added(device_t brdev, driver_t *driver);
220 static void cbb_child_detached(device_t brdev, device_t child);
221 static void cbb_event_thread(void *arg);
222 static void cbb_insert(struct cbb_softc *sc);
223 static void cbb_removal(struct cbb_softc *sc);
224 static void cbb_intr(void *arg);
225 static int cbb_detect_voltage(device_t brdev);
226 static int cbb_power(device_t brdev, int volts);
227 static void cbb_cardbus_reset(device_t brdev);
228 static int cbb_cardbus_power_enable_socket(device_t brdev,
230 static void cbb_cardbus_power_disable_socket(device_t brdev,
232 static int cbb_cardbus_io_open(device_t brdev, int win, uint32_t start,
234 static int cbb_cardbus_mem_open(device_t brdev, int win,
235 uint32_t start, uint32_t end);
236 static void cbb_cardbus_auto_open(struct cbb_softc *sc, int type);
237 static int cbb_cardbus_activate_resource(device_t brdev, device_t child,
238 int type, int rid, struct resource *res);
239 static int cbb_cardbus_deactivate_resource(device_t brdev,
240 device_t child, int type, int rid, struct resource *res);
241 static struct resource *cbb_cardbus_alloc_resource(device_t brdev,
242 device_t child, int type, int *rid, u_long start,
243 u_long end, u_long count, uint flags);
244 static int cbb_cardbus_release_resource(device_t brdev, device_t child,
245 int type, int rid, struct resource *res);
246 static int cbb_power_enable_socket(device_t brdev, device_t child);
247 static void cbb_power_disable_socket(device_t brdev, device_t child);
248 static int cbb_activate_resource(device_t brdev, device_t child,
249 int type, int rid, struct resource *r);
250 static int cbb_deactivate_resource(device_t brdev, device_t child,
251 int type, int rid, struct resource *r);
252 static struct resource *cbb_alloc_resource(device_t brdev, device_t child,
253 int type, int *rid, u_long start, u_long end, u_long count,
255 static int cbb_release_resource(device_t brdev, device_t child,
256 int type, int rid, struct resource *r);
257 static int cbb_read_ivar(device_t brdev, device_t child, int which,
259 static int cbb_write_ivar(device_t brdev, device_t child, int which,
261 static int cbb_maxslots(device_t brdev);
262 static uint32_t cbb_read_config(device_t brdev, int b, int s, int f,
264 static void cbb_write_config(device_t brdev, int b, int s, int f,
265 int reg, uint32_t val, int width);
270 cbb_set(struct cbb_softc *sc, uint32_t reg, uint32_t val)
272 bus_space_write_4(sc->bst, sc->bsh, reg, val);
275 static __inline uint32_t
276 cbb_get(struct cbb_softc *sc, uint32_t reg)
278 return (bus_space_read_4(sc->bst, sc->bsh, reg));
282 cbb_setb(struct cbb_softc *sc, uint32_t reg, uint32_t bits)
284 cbb_set(sc, reg, cbb_get(sc, reg) | bits);
288 cbb_clrb(struct cbb_softc *sc, uint32_t reg, uint32_t bits)
290 cbb_set(sc, reg, cbb_get(sc, reg) & ~bits);
294 cbb_remove_res(struct cbb_softc *sc, struct resource *res)
296 struct cbb_reslist *rle;
298 SLIST_FOREACH(rle, &sc->rl, link) {
299 if (rle->res == res) {
300 SLIST_REMOVE(&sc->rl, rle, cbb_reslist, link);
307 static struct resource *
308 cbb_find_res(struct cbb_softc *sc, int type, int rid)
310 struct cbb_reslist *rle;
312 SLIST_FOREACH(rle, &sc->rl, link)
313 if (SYS_RES_MEMORY == rle->type && rid == rle->rid)
319 cbb_insert_res(struct cbb_softc *sc, struct resource *res, int type,
322 struct cbb_reslist *rle;
325 * Need to record allocated resource so we can iterate through
328 rle = malloc(sizeof(struct cbb_reslist), M_DEVBUF, M_NOWAIT);
330 panic("cbb_cardbus_alloc_resource: can't record entry!");
334 SLIST_INSERT_HEAD(&sc->rl, rle, link);
338 cbb_destroy_res(struct cbb_softc *sc)
340 struct cbb_reslist *rle;
342 while ((rle = SLIST_FIRST(&sc->rl)) != NULL) {
343 device_printf(sc->dev, "Danger Will Robinson: Resource "
344 "left allocated! This is a bug... "
345 "(rid=%x, type=%d, addr=%lx)\n", rle->rid, rle->type,
346 rman_get_start(rle->res));
347 SLIST_REMOVE_HEAD(&sc->rl, link);
352 /************************************************************************/
354 /************************************************************************/
357 cbb_chipset(uint32_t pci_id, const char **namep)
359 struct yenta_chipinfo *ycp;
361 for (ycp = yc_chipsets; ycp->yc_id != 0 && pci_id != ycp->yc_id; ++ycp)
364 *namep = ycp->yc_name;
365 return (ycp->yc_chiptype);
369 cbb_probe(device_t brdev)
376 * Do we know that we support the chipset? If so, then we
379 if (cbb_chipset(pci_get_devid(brdev), &name) != CB_UNKNOWN) {
380 device_set_desc(brdev, name);
385 * We do support generic CardBus bridges. All that we've seen
386 * to date have progif 0 (the Yenta spec, and successors mandate
387 * this). We do not support PCI PCMCIA bridges (with one exception)
388 * with this driver since they generally are I/O mapped. Those
389 * are supported by the pcic driver. This should help us be more
392 subclass = pci_get_subclass(brdev);
393 progif = pci_get_progif(brdev);
394 if (subclass == PCIS_BRIDGE_CARDBUS && progif == 0) {
395 device_set_desc(brdev, "PCI-CardBus Bridge");
403 cbb_chipinit(struct cbb_softc *sc)
405 uint32_t mux, sysctrl;
407 /* Set CardBus latency timer */
408 if (pci_read_config(sc->dev, PCIR_SECLAT_1, 1) < 0x20)
409 pci_write_config(sc->dev, PCIR_SECLAT_1, 0x20, 1);
411 /* Set PCI latency timer */
412 if (pci_read_config(sc->dev, PCIR_LATTIMER, 1) < 0x20)
413 pci_write_config(sc->dev, PCIR_LATTIMER, 0x20, 1);
415 /* Enable memory access */
416 PCI_MASK_CONFIG(sc->dev, PCIR_COMMAND,
419 | PCIM_CMD_BUSMASTEREN, 2);
421 /* disable Legacy IO */
422 switch (sc->chipset) {
424 PCI_MASK_CONFIG(sc->dev, CBBR_BRIDGECTRL,
425 & ~(CBBM_BRIDGECTRL_RL_3E0_EN |
426 CBBM_BRIDGECTRL_RL_3E2_EN), 2);
429 pci_write_config(sc->dev, CBBR_LEGACY, 0x0, 4);
433 /* Use PCI interrupt for interrupt routing */
434 PCI_MASK2_CONFIG(sc->dev, CBBR_BRIDGECTRL,
435 & ~(CBBM_BRIDGECTRL_MASTER_ABORT |
436 CBBM_BRIDGECTRL_INTR_IREQ_EN),
437 | CBBM_BRIDGECTRL_WRITE_POST_EN,
441 * XXX this should be a function table, ala OLDCARD. This means
442 * that we could more easily support ISA interrupts for pccard
443 * cards if we had to.
445 switch (sc->chipset) {
448 * The TI 1031, TI 1130 and TI 1131 all require another bit
449 * be set to enable PCI routing of interrupts, and then
450 * a bit for each of the CSC and Function interrupts we
453 PCI_MASK_CONFIG(sc->dev, CBBR_CBCTRL,
454 | CBBM_CBCTRL_113X_PCI_INTR |
455 CBBM_CBCTRL_113X_PCI_CSC | CBBM_CBCTRL_113X_PCI_IRQ_EN,
457 PCI_MASK_CONFIG(sc->dev, CBBR_DEVCTRL,
458 & ~(CBBM_DEVCTRL_INT_SERIAL |
459 CBBM_DEVCTRL_INT_PCI), 1);
463 * Some TI 12xx (and [14][45]xx) based pci cards
464 * sometimes have issues with the MFUNC register not
465 * being initialized due to a bad EEPROM on board.
466 * Laptops that this matters on have this register
467 * properly initialized.
469 * The TI125X parts have a different register.
471 mux = pci_read_config(sc->dev, CBBR_MFUNC, 4);
472 sysctrl = pci_read_config(sc->dev, CBBR_SYSCTRL, 4);
474 mux = (mux & ~CBBM_MFUNC_PIN0) |
475 CBBM_MFUNC_PIN0_INTA;
476 if ((sysctrl & CBBM_SYSCTRL_INTRTIE) == 0)
477 mux = (mux & ~CBBM_MFUNC_PIN1) |
478 CBBM_MFUNC_PIN1_INTB;
479 pci_write_config(sc->dev, CBBR_MFUNC, mux, 4);
484 * Disable zoom video. Some machines initialize this
485 * improperly and exerpience has shown that this helps
488 pci_write_config(sc->dev, CBBR_MMCTRL, 0, 4);
492 * Disable Zoom Video, ToPIC 97, 100.
494 pci_write_config(sc->dev, CBBR_TOPIC_ZV_CONTROL, 0, 1);
497 * At offset 0xa1: INTERRUPT CONTROL register
498 * 0x1: Turn on INT interrupts.
500 PCI_MASK_CONFIG(sc->dev, CBBR_TOPIC_INTCTRL,
501 | CBBM_TOPIC_INTCTRL_INTIRQSEL, 1);
505 * SOCKETCTRL appears to be TOPIC 95/B specific
507 PCI_MASK_CONFIG(sc->dev, CBBR_TOPIC_SOCKETCTRL,
508 | CBBM_TOPIC_SOCKETCTRL_SCR_IRQSEL, 4);
512 * At offset 0xa0: SLOT CONTROL
513 * 0x80 Enable CardBus Functionality
514 * 0x40 Enable CardBus and PC Card registers
515 * 0x20 Lock ID in exca regs
516 * 0x10 Write protect ID in config regs
517 * Clear the rest of the bits, which defaults the slot
518 * in legacy mode to 0x3e0 and offset 0. (legacy
519 * mode is determined elsewhere)
521 pci_write_config(sc->dev, CBBR_TOPIC_SLOTCTRL,
522 CBBM_TOPIC_SLOTCTRL_SLOTON |
523 CBBM_TOPIC_SLOTCTRL_SLOTEN |
524 CBBM_TOPIC_SLOTCTRL_ID_LOCK |
525 CBBM_TOPIC_SLOTCTRL_ID_WP, 1);
528 * At offset 0xa3 Card Detect Control Register
529 * 0x80 CARDBUS enbale
530 * 0x01 Cleared for hardware change detect
532 PCI_MASK2_CONFIG(sc->dev, CBBR_TOPIC_CDC,
533 | CBBM_TOPIC_CDC_CARDBUS,
534 & ~CBBM_TOPIC_CDC_SWDETECT, 4);
539 * Need to tell ExCA registers to route via PCI interrupts. There
540 * are two ways to do this. Once is to set INTR_ENABLE and the
541 * other is to set CSC to 0. Since both methods are mutually
542 * compatible, we do both.
544 exca_write(&sc->exca, EXCA_INTR, EXCA_INTR_ENABLE);
545 exca_write(&sc->exca, EXCA_CSC_INTR, 0);
547 /* close all memory and io windows */
548 pci_write_config(sc->dev, CBBR_MEMBASE0, 0xffffffff, 4);
549 pci_write_config(sc->dev, CBBR_MEMLIMIT0, 0, 4);
550 pci_write_config(sc->dev, CBBR_MEMBASE1, 0xffffffff, 4);
551 pci_write_config(sc->dev, CBBR_MEMLIMIT1, 0, 4);
552 pci_write_config(sc->dev, CBBR_IOBASE0, 0xffffffff, 4);
553 pci_write_config(sc->dev, CBBR_IOLIMIT0, 0, 4);
554 pci_write_config(sc->dev, CBBR_IOBASE1, 0xffffffff, 4);
555 pci_write_config(sc->dev, CBBR_IOLIMIT1, 0, 4);
559 cbb_attach(device_t brdev)
561 struct cbb_softc *sc = (struct cbb_softc *)device_get_softc(brdev);
564 lockinit(&sc->lock, 0, "cbb", 0, 0);
565 sc->chipset = cbb_chipset(pci_get_devid(brdev), NULL);
568 sc->pccarddev = NULL;
569 sc->secbus = pci_read_config(brdev, PCIR_SECBUS_2, 1);
570 sc->subbus = pci_read_config(brdev, PCIR_SUBBUS_2, 1);
572 STAILQ_INIT(&sc->intr_handlers);
574 #ifndef BURN_THE_BOATS
576 * The PCI bus code should assign us memory in the absense
577 * of the BIOS doing so. However, 'should' isn't 'is,' so we kludge
578 * up something here until the PCI/acpi code properly assigns the
583 sc->base_res = bus_alloc_resource(brdev, SYS_RES_MEMORY, &rid,
584 0, ~0, 1, RF_ACTIVE);
586 #ifdef BURN_THE_BOATS
587 device_printf(brdev, "Could not map register memory\n");
593 * Generally, the BIOS will assign this memory for us.
594 * However, newer BIOSes do not because the MS design
595 * documents have mandated that this is for the OS
596 * to assign rather than the BIOS. This driver shouldn't
597 * be doing this, but until the pci bus code (or acpi)
598 * does this, we allow CardBus bridges to work on more
601 pci_write_config(brdev, rid, 0xffffffff, 4);
602 sockbase = pci_read_config(brdev, rid, 4);
603 sockbase = (sockbase & 0xfffffff0) & -(sockbase & 0xfffffff0);
604 sc->base_res = bus_generic_alloc_resource(
605 device_get_parent(brdev), brdev, SYS_RES_MEMORY,
606 &rid, cbb_start_mem, ~0, sockbase,
607 RF_ACTIVE|rman_make_alignment_flags(sockbase));
610 "Could not grab register memory\n");
613 sc->flags |= CBB_KLUDGE_ALLOC;
614 pci_write_config(brdev, CBBR_SOCKBASE,
615 rman_get_start(sc->base_res), 4);
618 DEVPRINTF((brdev, "PCI Memory allocated: %08lx\n",
619 rman_get_start(sc->base_res)));
621 sc->bst = rman_get_bustag(sc->base_res);
622 sc->bsh = rman_get_bushandle(sc->base_res);
623 exca_init(&sc->exca, brdev, sc->bst, sc->bsh, CBB_EXCA_OFFSET);
624 sc->exca.flags |= EXCA_HAS_MEMREG_WIN;
627 /* attach children */
628 sc->cbdev = device_add_child(brdev, "cardbus", -1);
629 if (sc->cbdev == NULL)
630 DEVPRINTF((brdev, "WARNING: cannot add cardbus bus.\n"));
631 else if (device_probe_and_attach(sc->cbdev) != 0) {
632 DEVPRINTF((brdev, "WARNING: cannot attach cardbus bus!\n"));
636 sc->pccarddev = device_add_child(brdev, "pccard", -1);
637 if (sc->pccarddev == NULL)
638 DEVPRINTF((brdev, "WARNING: cannot add pccard bus.\n"));
639 else if (device_probe_and_attach(sc->pccarddev) != 0) {
640 DEVPRINTF((brdev, "WARNING: cannot attach pccard bus.\n"));
641 sc->pccarddev = NULL;
644 /* Map and establish the interrupt. */
646 sc->irq_res = bus_alloc_resource(brdev, SYS_RES_IRQ, &rid, 0, ~0, 1,
647 RF_SHAREABLE | RF_ACTIVE);
648 if (sc->irq_res == NULL) {
649 printf("cbb: Unable to map IRQ...\n");
654 if (bus_setup_intr(brdev, sc->irq_res, INTR_TYPE_NET, cbb_intr, sc,
656 device_printf(brdev, "couldn't establish interrupt");
660 /* reset 16-bit pcmcia bus */
661 exca_clrb(&sc->exca, EXCA_INTR, EXCA_INTR_RESET);
664 cbb_power(brdev, CARD_VCC_0V | CARD_VPP_0V);
666 /* CSC Interrupt: Card detect interrupt on */
667 cbb_setb(sc, CBB_SOCKET_MASK, CBB_SOCKET_MASK_CD);
669 /* reset interrupt */
670 cbb_set(sc, CBB_SOCKET_EVENT, cbb_get(sc, CBB_SOCKET_EVENT));
672 /* Start the thread */
673 if (kthread_create(cbb_event_thread, sc, &sc->event_thread,
674 "%s%d", device_get_name(sc->dev), device_get_unit(sc->dev))) {
675 device_printf (sc->dev, "unable to create event thread.\n");
676 panic ("cbb_create_event_thread");
682 bus_release_resource(brdev, SYS_RES_IRQ, 0, sc->irq_res);
684 if (sc->flags & CBB_KLUDGE_ALLOC)
685 bus_generic_release_resource(device_get_parent(brdev),
686 brdev, SYS_RES_MEMORY, CBBR_SOCKBASE,
689 bus_release_resource(brdev, SYS_RES_MEMORY,
690 CBBR_SOCKBASE, sc->base_res);
696 * shutdown and detach both call the release helper to disable the interrupt
697 * and cleanup the resources.
701 cbb_release_helper(device_t brdev)
703 struct cbb_softc *sc = device_get_softc(brdev);
705 lockmgr(&sc->lock, LK_EXCLUSIVE, NULL, curthread);
706 sc->flags |= CBB_KTHREAD_DONE;
707 lockmgr(&sc->lock, LK_RELEASE, NULL, curthread);
708 if (sc->flags & CBB_KTHREAD_RUNNING) {
710 tsleep(cbb_detach, 0, "pccbb", 2);
714 * Reset the bridge controller and reset the interrupt, then tear
715 * it down (which disables the interrupt) and de-power.
717 PCI_MASK_CONFIG(brdev, CBBR_BRIDGECTRL, |CBBM_BRIDGECTRL_RESET, 2);
718 exca_clrb(&sc->exca, EXCA_INTR, EXCA_INTR_RESET);
720 bus_teardown_intr(brdev, sc->irq_res, sc->intrhand);
721 cbb_power(brdev, CARD_VCC_0V | CARD_VPP_0V);
724 * Release interrupt and memory-mapped resources. Device memory
725 * cannot be safely accessed after we do this.
727 bus_release_resource(brdev, SYS_RES_IRQ, 0, sc->irq_res);
728 if (sc->flags & CBB_KLUDGE_ALLOC) {
729 bus_generic_release_resource(device_get_parent(brdev),
730 brdev, SYS_RES_MEMORY, CBBR_SOCKBASE,
733 bus_release_resource(brdev, SYS_RES_MEMORY,
734 CBBR_SOCKBASE, sc->base_res);
739 cbb_detach(device_t brdev)
746 device_get_children(brdev, &devlist, &numdevs);
749 for (i = 0; i < numdevs; i++) {
750 if (device_detach(devlist[i]) == 0)
751 device_delete_child(brdev, devlist[i]);
755 free (devlist, M_TEMP);
757 cbb_release_helper(brdev);
764 cbb_shutdown(device_t brdev)
770 device_get_children(brdev, &devlist, &numdevs);
772 for (i = 0; i < numdevs; i++) {
773 if (device_shutdown(devlist[i]) == 0)
774 ; /* XXX delete the child without detach? */
776 free (devlist, M_TEMP);
777 cbb_release_helper(brdev);
780 * This may prevent bios confusion on reboot for some bioses
782 pci_write_config(brdev, PCIR_COMMAND, 0, 2);
787 cbb_setup_intr(device_t dev, device_t child, struct resource *irq,
788 int flags, driver_intr_t *intr, void *arg, void **cookiep)
790 struct cbb_intrhand *ih;
791 struct cbb_softc *sc = device_get_softc(dev);
794 * You aren't allowed to have fast interrupts for pccard/cardbus
795 * things since those interrupts are PCI and shared. Since we use
796 * the PCI interrupt for the status change interrupts, it can't be
797 * free for use by the driver. Fast interrupts must not be shared.
799 ih = malloc(sizeof(struct cbb_intrhand), M_DEVBUF, M_NOWAIT);
805 STAILQ_INSERT_TAIL(&sc->intr_handlers, ih, entries);
807 * XXX we should do what old card does to ensure that we don't
808 * XXX call the function's interrupt routine(s).
811 * XXX need to turn on ISA interrupts, if we ever support them, but
812 * XXX for now that's all we need to do.
818 cbb_teardown_intr(device_t dev, device_t child, struct resource *irq,
821 struct cbb_intrhand *ih;
822 struct cbb_softc *sc = device_get_softc(dev);
824 cbb_setb(sc, CBB_SOCKET_MASK, 0); /* Quiet hardware */
825 /* XXX Need to do different things for ISA interrupts. */
826 ih = (struct cbb_intrhand *) cookie;
827 STAILQ_REMOVE(&sc->intr_handlers, ih, cbb_intrhand, entries);
834 cbb_driver_added(device_t brdev, driver_t *driver)
836 struct cbb_softc *sc = device_get_softc(brdev);
843 DEVICE_IDENTIFY(driver, brdev);
844 device_get_children(brdev, &devlist, &numdevs);
846 sockstate = cbb_get(sc, CBB_SOCKET_STATE);
847 for (tmp = 0; tmp < numdevs; tmp++) {
848 if (device_get_state(devlist[tmp]) == DS_NOTPRESENT &&
849 device_probe_and_attach(devlist[tmp]) == 0) {
850 if (devlist[tmp] == NULL)
852 else if (strcmp(driver->name, "cardbus") == 0) {
853 sc->cbdev = devlist[tmp];
854 if (((sockstate & CBB_SOCKET_STAT_CD) == 0) &&
855 (sockstate & CBB_SOCKET_STAT_CB))
857 } else if (strcmp(driver->name, "pccard") == 0) {
858 sc->pccarddev = devlist[tmp];
859 if (((sockstate & CBB_SOCKET_STAT_CD) == 0) &&
860 (sockstate & CBB_SOCKET_STAT_16BIT))
864 "Unsupported child bus: %s\n",
868 free(devlist, M_TEMP);
871 if ((cbb_get(sc, CBB_SOCKET_STATE) & CBB_SOCKET_STAT_CD)
879 cbb_child_detached(device_t brdev, device_t child)
881 struct cbb_softc *sc = device_get_softc(brdev);
883 if (child == sc->cbdev)
885 else if (child == sc->pccarddev)
886 sc->pccarddev = NULL;
888 device_printf(brdev, "Unknown child detached: %s %p/%p\n",
889 device_get_nameunit(child), sc->cbdev, sc->pccarddev);
892 /************************************************************************/
894 /************************************************************************/
897 cbb_event_thread(void *arg)
899 struct cbb_softc *sc = arg;
904 * We take out Giant here because we need it deep, down in
905 * the bowels of the vm system for mapping the memory we need
906 * to read the CIS. We also need it for kthread_exit, which
909 sc->flags |= CBB_KTHREAD_RUNNING;
912 * Check to see if we have anything first so that
913 * if there's a card already inserted, we do the
916 lockmgr(&sc->lock, LK_EXCLUSIVE, NULL, curthread);
917 if (sc->flags & CBB_KTHREAD_DONE)
920 status = cbb_get(sc, CBB_SOCKET_STATE);
921 /* mtx_lock(&Giant); */
922 if ((status & CBB_SOCKET_STAT_CD) == 0)
926 lockmgr(&sc->lock, LK_RELEASE, NULL, curthread);
927 /* mtx_unlock(&Giant); */
930 * Wait until it has been 1s since the last time we
931 * get an interrupt. We handle the rest of the interrupt
932 * at the top of the loop.
934 err = tsleep(sc, 0, "pccbb", 0);
935 while (err != EWOULDBLOCK &&
936 (sc->flags & CBB_KTHREAD_DONE) == 0)
937 err = tsleep(sc, 0, "pccbb", 1 * hz);
939 sc->flags &= ~CBB_KTHREAD_RUNNING;
940 lockmgr(&sc->lock, LK_RELEASE, NULL, curthread);
941 /* mtx_lock(&Giant); */
945 /************************************************************************/
947 /************************************************************************/
950 cbb_insert(struct cbb_softc *sc)
952 uint32_t sockevent, sockstate;
954 sockevent = cbb_get(sc, CBB_SOCKET_EVENT);
955 sockstate = cbb_get(sc, CBB_SOCKET_STATE);
957 DEVPRINTF((sc->dev, "card inserted: event=0x%08x, state=%08x\n",
958 sockevent, sockstate));
960 if (sockstate & CBB_SOCKET_STAT_16BIT) {
961 if (sc->pccarddev != NULL) {
962 sc->flags |= CBB_16BIT_CARD;
963 sc->flags |= CBB_CARD_OK;
964 if (CARD_ATTACH_CARD(sc->pccarddev) != 0) {
965 device_printf(sc->dev,
966 "PC Card card activation failed\n");
967 sc->flags &= ~CBB_CARD_OK;
970 device_printf(sc->dev,
971 "PC Card inserted, but no pccard bus.\n");
973 } else if (sockstate & CBB_SOCKET_STAT_CB) {
974 if (sc->cbdev != NULL) {
975 sc->flags &= ~CBB_16BIT_CARD;
976 sc->flags |= CBB_CARD_OK;
977 if (CARD_ATTACH_CARD(sc->cbdev) != 0) {
978 device_printf(sc->dev,
979 "CardBus card activation failed\n");
980 sc->flags &= ~CBB_CARD_OK;
983 device_printf(sc->dev,
984 "CardBus card inserted, but no cardbus bus.\n");
988 * We should power the card down, and try again a couple of
989 * times if this happens. XXX
991 device_printf (sc->dev, "Unsupported card type detected\n");
996 cbb_removal(struct cbb_softc *sc)
998 if (sc->flags & CBB_16BIT_CARD) {
999 if (sc->pccarddev != NULL)
1000 CARD_DETACH_CARD(sc->pccarddev);
1002 if (sc->cbdev != NULL)
1003 CARD_DETACH_CARD(sc->cbdev);
1005 cbb_destroy_res(sc);
1008 /************************************************************************/
1009 /* Interrupt Handler */
1010 /************************************************************************/
1015 struct cbb_softc *sc = arg;
1017 struct cbb_intrhand *ih;
1020 * This ISR needs work XXX
1022 sockevent = cbb_get(sc, CBB_SOCKET_EVENT);
1024 /* ack the interrupt */
1025 cbb_setb(sc, CBB_SOCKET_EVENT, sockevent);
1028 * If anything has happened to the socket, we assume that
1029 * the card is no longer OK, and we shouldn't call its
1030 * ISR. We set CARD_OK as soon as we've attached the
1031 * card. This helps in a noisy eject, which happens
1032 * all too often when users are ejecting their PC Cards.
1034 * We use this method in preference to checking to see if
1035 * the card is still there because the check suffers from
1036 * a race condition in the bouncing case. Prior versions
1037 * of the pccard software used a similar trick and achieved
1038 * excellent results.
1040 if (sockevent & CBB_SOCKET_EVENT_CD) {
1041 lockmgr(&sc->lock, LK_EXCLUSIVE, NULL, curthread);
1042 sc->flags &= ~CBB_CARD_OK;
1043 lockmgr(&sc->lock, LK_RELEASE, NULL, curthread);
1046 if (sockevent & CBB_SOCKET_EVENT_CSTS) {
1047 DPRINTF((" cstsevent occured: 0x%08x\n",
1048 cbb_get(sc, CBB_SOCKET_STATE)));
1050 if (sockevent & CBB_SOCKET_EVENT_POWER) {
1051 DPRINTF((" pwrevent occured: 0x%08x\n",
1052 cbb_get(sc, CBB_SOCKET_STATE)));
1056 if (sc->flags & CBB_CARD_OK) {
1057 STAILQ_FOREACH(ih, &sc->intr_handlers, entries) {
1058 (*ih->intr)(ih->arg);
1064 /************************************************************************/
1065 /* Generic Power functions */
1066 /************************************************************************/
1069 cbb_detect_voltage(device_t brdev)
1071 struct cbb_softc *sc = device_get_softc(brdev);
1073 int vol = CARD_UKN_CARD;
1075 psr = cbb_get(sc, CBB_SOCKET_STATE);
1077 if (psr & CBB_SOCKET_STAT_5VCARD)
1078 vol |= CARD_5V_CARD;
1079 if (psr & CBB_SOCKET_STAT_3VCARD)
1080 vol |= CARD_3V_CARD;
1081 if (psr & CBB_SOCKET_STAT_XVCARD)
1082 vol |= CARD_XV_CARD;
1083 if (psr & CBB_SOCKET_STAT_YVCARD)
1084 vol |= CARD_YV_CARD;
1090 cbb_power(device_t brdev, int volts)
1092 uint32_t status, sock_ctrl;
1093 struct cbb_softc *sc = device_get_softc(brdev);
1097 DEVPRINTF((sc->dev, "cbb_power: %s and %s [%x]\n",
1098 (volts & CARD_VCCMASK) == CARD_VCC_UC ? "CARD_VCC_UC" :
1099 (volts & CARD_VCCMASK) == CARD_VCC_5V ? "CARD_VCC_5V" :
1100 (volts & CARD_VCCMASK) == CARD_VCC_3V ? "CARD_VCC_3V" :
1101 (volts & CARD_VCCMASK) == CARD_VCC_XV ? "CARD_VCC_XV" :
1102 (volts & CARD_VCCMASK) == CARD_VCC_YV ? "CARD_VCC_YV" :
1103 (volts & CARD_VCCMASK) == CARD_VCC_0V ? "CARD_VCC_0V" :
1105 (volts & CARD_VPPMASK) == CARD_VPP_UC ? "CARD_VPP_UC" :
1106 (volts & CARD_VPPMASK) == CARD_VPP_12V ? "CARD_VPP_12V" :
1107 (volts & CARD_VPPMASK) == CARD_VPP_VCC ? "CARD_VPP_VCC" :
1108 (volts & CARD_VPPMASK) == CARD_VPP_0V ? "CARD_VPP_0V" :
1112 status = cbb_get(sc, CBB_SOCKET_STATE);
1113 sock_ctrl = cbb_get(sc, CBB_SOCKET_CONTROL);
1115 switch (volts & CARD_VCCMASK) {
1119 if (CBB_SOCKET_STAT_5VCARD & status) { /* check 5 V card */
1120 sock_ctrl &= ~CBB_SOCKET_CTRL_VCCMASK;
1121 sock_ctrl |= CBB_SOCKET_CTRL_VCC_5V;
1123 device_printf(sc->dev,
1124 "BAD voltage request: no 5 V card\n");
1128 if (CBB_SOCKET_STAT_3VCARD & status) {
1129 sock_ctrl &= ~CBB_SOCKET_CTRL_VCCMASK;
1130 sock_ctrl |= CBB_SOCKET_CTRL_VCC_3V;
1132 device_printf(sc->dev,
1133 "BAD voltage request: no 3.3 V card\n");
1137 sock_ctrl &= ~CBB_SOCKET_CTRL_VCCMASK;
1140 return (0); /* power NEVER changed */
1144 switch (volts & CARD_VPPMASK) {
1148 sock_ctrl &= ~CBB_SOCKET_CTRL_VPPMASK;
1151 sock_ctrl &= ~CBB_SOCKET_CTRL_VPPMASK;
1152 sock_ctrl |= ((sock_ctrl >> 4) & 0x07);
1155 sock_ctrl &= ~CBB_SOCKET_CTRL_VPPMASK;
1156 sock_ctrl |= CBB_SOCKET_CTRL_VPP_12V;
1160 if (cbb_get(sc, CBB_SOCKET_CONTROL) == sock_ctrl)
1161 return (1); /* no change necessary */
1163 cbb_set(sc, CBB_SOCKET_CONTROL, sock_ctrl);
1164 status = cbb_get(sc, CBB_SOCKET_STATE);
1167 * XXX This busy wait is bogus. We should wait for a power
1168 * interrupt and then whine if the status is bad. If we're
1169 * worried about the card not coming up, then we should also
1170 * schedule a timeout which we can cacel in the power interrupt.
1175 sockevent = cbb_get(sc, CBB_SOCKET_EVENT);
1176 } while (!(sockevent & CBB_SOCKET_EVENT_POWER) && --timeout > 0);
1177 /* reset event status */
1178 /* XXX should only reset EVENT_POWER */
1179 cbb_set(sc, CBB_SOCKET_EVENT, sockevent);
1181 printf ("VCC supply failed.\n");
1186 * delay 400 ms: thgough the standard defines that the Vcc set-up time
1187 * is 20 ms, some PC-Card bridge requires longer duration.
1188 * XXX Note: We should check the stutus AFTER the delay to give time
1189 * for things to stabilize.
1193 if (status & CBB_SOCKET_STAT_BADVCC) {
1194 device_printf(sc->dev,
1195 "bad Vcc request. ctrl=0x%x, status=0x%x\n",
1197 printf("cbb_power: %s and %s [%x]\n",
1198 (volts & CARD_VCCMASK) == CARD_VCC_UC ? "CARD_VCC_UC" :
1199 (volts & CARD_VCCMASK) == CARD_VCC_5V ? "CARD_VCC_5V" :
1200 (volts & CARD_VCCMASK) == CARD_VCC_3V ? "CARD_VCC_3V" :
1201 (volts & CARD_VCCMASK) == CARD_VCC_XV ? "CARD_VCC_XV" :
1202 (volts & CARD_VCCMASK) == CARD_VCC_YV ? "CARD_VCC_YV" :
1203 (volts & CARD_VCCMASK) == CARD_VCC_0V ? "CARD_VCC_0V" :
1205 (volts & CARD_VPPMASK) == CARD_VPP_UC ? "CARD_VPP_UC" :
1206 (volts & CARD_VPPMASK) == CARD_VPP_12V ? "CARD_VPP_12V":
1207 (volts & CARD_VPPMASK) == CARD_VPP_VCC ? "CARD_VPP_VCC":
1208 (volts & CARD_VPPMASK) == CARD_VPP_0V ? "CARD_VPP_0V" :
1213 return (1); /* power changed correctly */
1217 * detect the voltage for the card, and set it. Since the power
1218 * used is the square of the voltage, lower voltages is a big win
1219 * and what Windows does (and what Microsoft prefers). The MS paper
1220 * also talks about preferring the CIS entry as well.
1223 cbb_do_power(device_t brdev)
1227 /* Prefer lowest voltage supported */
1228 voltage = cbb_detect_voltage(brdev);
1229 cbb_power(brdev, CARD_VCC_0V | CARD_VPP_0V);
1230 if (voltage & CARD_YV_CARD)
1231 cbb_power(brdev, CARD_VCC_YV | CARD_VPP_VCC);
1232 else if (voltage & CARD_XV_CARD)
1233 cbb_power(brdev, CARD_VCC_XV | CARD_VPP_VCC);
1234 else if (voltage & CARD_3V_CARD)
1235 cbb_power(brdev, CARD_VCC_3V | CARD_VPP_VCC);
1236 else if (voltage & CARD_5V_CARD)
1237 cbb_power(brdev, CARD_VCC_5V | CARD_VPP_VCC);
1239 device_printf(brdev, "Unknown card voltage\n");
1245 /************************************************************************/
1246 /* CardBus power functions */
1247 /************************************************************************/
1250 cbb_cardbus_reset(device_t brdev)
1252 struct cbb_softc *sc = device_get_softc(brdev);
1255 delay_us = sc->chipset == CB_RF5C47X ? 400*1000 : 20*1000;
1257 PCI_MASK_CONFIG(brdev, CBBR_BRIDGECTRL, |CBBM_BRIDGECTRL_RESET, 2);
1261 /* If a card exists, unreset it! */
1262 if ((cbb_get(sc, CBB_SOCKET_STATE) & CBB_SOCKET_STAT_CD) == 0) {
1263 PCI_MASK_CONFIG(brdev, CBBR_BRIDGECTRL,
1264 &~CBBM_BRIDGECTRL_RESET, 2);
1270 cbb_cardbus_power_enable_socket(device_t brdev, device_t child)
1272 struct cbb_softc *sc = device_get_softc(brdev);
1275 if ((cbb_get(sc, CBB_SOCKET_STATE) & CBB_SOCKET_STAT_CD) ==
1279 err = cbb_do_power(brdev);
1282 cbb_cardbus_reset(brdev);
1287 cbb_cardbus_power_disable_socket(device_t brdev, device_t child)
1289 cbb_power(brdev, CARD_VCC_0V | CARD_VPP_0V);
1290 cbb_cardbus_reset(brdev);
1293 /************************************************************************/
1294 /* CardBus Resource */
1295 /************************************************************************/
1298 cbb_cardbus_io_open(device_t brdev, int win, uint32_t start, uint32_t end)
1303 if ((win < 0) || (win > 1)) {
1305 "cbb_cardbus_io_open: window out of range %d\n", win));
1309 basereg = win * 8 + CBBR_IOBASE0;
1310 limitreg = win * 8 + CBBR_IOLIMIT0;
1312 pci_write_config(brdev, basereg, start, 4);
1313 pci_write_config(brdev, limitreg, end, 4);
1318 cbb_cardbus_mem_open(device_t brdev, int win, uint32_t start, uint32_t end)
1323 if ((win < 0) || (win > 1)) {
1325 "cbb_cardbus_mem_open: window out of range %d\n", win));
1329 basereg = win*8 + CBBR_MEMBASE0;
1330 limitreg = win*8 + CBBR_MEMLIMIT0;
1332 pci_write_config(brdev, basereg, start, 4);
1333 pci_write_config(brdev, limitreg, end, 4);
1338 * XXX The following function belongs in the pci bus layer.
1341 cbb_cardbus_auto_open(struct cbb_softc *sc, int type)
1345 struct cbb_reslist *rle;
1347 int prefetchable[2];
1350 starts[0] = starts[1] = 0xffffffff;
1351 ends[0] = ends[1] = 0;
1353 if (type == SYS_RES_MEMORY)
1354 align = CBB_MEMALIGN;
1355 else if (type == SYS_RES_IOPORT)
1356 align = CBB_IOALIGN;
1360 SLIST_FOREACH(rle, &sc->rl, link) {
1361 if (rle->type != type)
1363 else if (rle->res == NULL) {
1364 device_printf(sc->dev, "WARNING: Resource not reserved? "
1365 "(type=%d, addr=%lx)\n",
1366 rle->type, rman_get_start(rle->res));
1367 } else if (!(rman_get_flags(rle->res) & RF_ACTIVE)) {
1369 } else if (starts[0] == 0xffffffff) {
1370 starts[0] = rman_get_start(rle->res);
1371 ends[0] = rman_get_end(rle->res);
1373 rman_get_flags(rle->res) & RF_PREFETCHABLE;
1374 } else if (rman_get_end(rle->res) > ends[0] &&
1375 rman_get_start(rle->res) - ends[0] <
1376 CBB_AUTO_OPEN_SMALLHOLE && prefetchable[0] ==
1377 (rman_get_flags(rle->res) & RF_PREFETCHABLE)) {
1378 ends[0] = rman_get_end(rle->res);
1379 } else if (rman_get_start(rle->res) < starts[0] &&
1380 starts[0] - rman_get_end(rle->res) <
1381 CBB_AUTO_OPEN_SMALLHOLE && prefetchable[0] ==
1382 (rman_get_flags(rle->res) & RF_PREFETCHABLE)) {
1383 starts[0] = rman_get_start(rle->res);
1384 } else if (starts[1] == 0xffffffff) {
1385 starts[1] = rman_get_start(rle->res);
1386 ends[1] = rman_get_end(rle->res);
1388 rman_get_flags(rle->res) & RF_PREFETCHABLE;
1389 } else if (rman_get_end(rle->res) > ends[1] &&
1390 rman_get_start(rle->res) - ends[1] <
1391 CBB_AUTO_OPEN_SMALLHOLE && prefetchable[1] ==
1392 (rman_get_flags(rle->res) & RF_PREFETCHABLE)) {
1393 ends[1] = rman_get_end(rle->res);
1394 } else if (rman_get_start(rle->res) < starts[1] &&
1395 starts[1] - rman_get_end(rle->res) <
1396 CBB_AUTO_OPEN_SMALLHOLE && prefetchable[1] ==
1397 (rman_get_flags(rle->res) & RF_PREFETCHABLE)) {
1398 starts[1] = rman_get_start(rle->res);
1403 diffs[0] = diffs[1] = 0xffffffff;
1404 if (rman_get_start(rle->res) > ends[0])
1405 diffs[0] = rman_get_start(rle->res) - ends[0];
1406 else if (rman_get_end(rle->res) < starts[0])
1407 diffs[0] = starts[0] - rman_get_end(rle->res);
1408 if (rman_get_start(rle->res) > ends[1])
1409 diffs[1] = rman_get_start(rle->res) - ends[1];
1410 else if (rman_get_end(rle->res) < starts[1])
1411 diffs[1] = starts[1] - rman_get_end(rle->res);
1413 win = (diffs[0] <= diffs[1])?0:1;
1414 if (rman_get_start(rle->res) > ends[win])
1415 ends[win] = rman_get_end(rle->res);
1416 else if (rman_get_end(rle->res) < starts[win])
1417 starts[win] = rman_get_start(rle->res);
1418 if (!(rman_get_flags(rle->res) & RF_PREFETCHABLE))
1419 prefetchable[win] = 0;
1422 if (starts[0] != 0xffffffff)
1423 starts[0] -= starts[0] % align;
1424 if (starts[1] != 0xffffffff)
1425 starts[1] -= starts[1] % align;
1426 if (ends[0] % align != 0)
1427 ends[0] += align - ends[0]%align - 1;
1428 if (ends[1] % align != 0)
1429 ends[1] += align - ends[1]%align - 1;
1432 if (type == SYS_RES_MEMORY) {
1433 cbb_cardbus_mem_open(sc->dev, 0, starts[0], ends[0]);
1434 cbb_cardbus_mem_open(sc->dev, 1, starts[1], ends[1]);
1435 reg = pci_read_config(sc->dev, CBBR_BRIDGECTRL, 2);
1436 reg &= ~(CBBM_BRIDGECTRL_PREFETCH_0|
1437 CBBM_BRIDGECTRL_PREFETCH_1);
1438 reg |= (prefetchable[0]?CBBM_BRIDGECTRL_PREFETCH_0:0)|
1439 (prefetchable[1]?CBBM_BRIDGECTRL_PREFETCH_1:0);
1440 pci_write_config(sc->dev, CBBR_BRIDGECTRL, reg, 2);
1441 } else if (type == SYS_RES_IOPORT) {
1442 cbb_cardbus_io_open(sc->dev, 0, starts[0], ends[0]);
1443 cbb_cardbus_io_open(sc->dev, 1, starts[1], ends[1]);
1448 cbb_cardbus_activate_resource(device_t brdev, device_t child, int type,
1449 int rid, struct resource *res)
1453 ret = BUS_ACTIVATE_RESOURCE(device_get_parent(brdev), child,
1457 cbb_cardbus_auto_open(device_get_softc(brdev), type);
1462 cbb_cardbus_deactivate_resource(device_t brdev, device_t child, int type,
1463 int rid, struct resource *res)
1467 ret = BUS_DEACTIVATE_RESOURCE(device_get_parent(brdev), child,
1471 cbb_cardbus_auto_open(device_get_softc(brdev), type);
1475 static struct resource *
1476 cbb_cardbus_alloc_resource(device_t brdev, device_t child, int type,
1477 int *rid, u_long start, u_long end, u_long count, uint flags)
1479 struct cbb_softc *sc = device_get_softc(brdev);
1481 struct resource *res;
1485 tmp = rman_get_start(sc->irq_res);
1486 if (start > tmp || end < tmp || count != 1) {
1487 device_printf(child, "requested interrupt %ld-%ld,"
1488 "count = %ld not supported by cbb\n",
1494 case SYS_RES_IOPORT:
1495 if (start <= cbb_start_32_io)
1496 start = cbb_start_32_io;
1500 case SYS_RES_MEMORY:
1501 if (start <= cbb_start_mem)
1502 start = cbb_start_mem;
1508 res = BUS_ALLOC_RESOURCE(device_get_parent(brdev), child, type, rid,
1509 start, end, count, flags & ~RF_ACTIVE);
1511 printf("cbb alloc res fail\n");
1514 cbb_insert_res(sc, res, type, *rid);
1515 if (flags & RF_ACTIVE)
1516 if (bus_activate_resource(child, type, *rid, res) != 0) {
1517 bus_release_resource(child, type, *rid, res);
1525 cbb_cardbus_release_resource(device_t brdev, device_t child, int type,
1526 int rid, struct resource *res)
1528 struct cbb_softc *sc = device_get_softc(brdev);
1531 if (rman_get_flags(res) & RF_ACTIVE) {
1532 error = bus_deactivate_resource(child, type, rid, res);
1536 cbb_remove_res(sc, res);
1537 return (BUS_RELEASE_RESOURCE(device_get_parent(brdev), child,
1541 /************************************************************************/
1542 /* PC Card Power Functions */
1543 /************************************************************************/
1546 cbb_pcic_power_enable_socket(device_t brdev, device_t child)
1548 struct cbb_softc *sc = device_get_softc(brdev);
1551 DPRINTF(("cbb_pcic_socket_enable:\n"));
1553 /* power down/up the socket to reset */
1554 err = cbb_do_power(brdev);
1557 exca_reset(&sc->exca, child);
1563 cbb_pcic_power_disable_socket(device_t brdev, device_t child)
1565 struct cbb_softc *sc = device_get_softc(brdev);
1567 DPRINTF(("cbb_pcic_socket_disable\n"));
1569 /* reset signal asserting... */
1570 exca_clrb(&sc->exca, EXCA_INTR, EXCA_INTR_RESET);
1573 /* power down the socket */
1574 cbb_power(brdev, CARD_VCC_0V | CARD_VPP_0V);
1575 exca_clrb(&sc->exca, EXCA_PWRCTL, EXCA_PWRCTL_OE);
1577 /* wait 300ms until power fails (Tpf). */
1581 /************************************************************************/
1583 /************************************************************************/
1586 cbb_power_enable_socket(device_t brdev, device_t child)
1588 struct cbb_softc *sc = device_get_softc(brdev);
1590 if (sc->flags & CBB_16BIT_CARD)
1591 return (cbb_pcic_power_enable_socket(brdev, child));
1593 return (cbb_cardbus_power_enable_socket(brdev, child));
1597 cbb_power_disable_socket(device_t brdev, device_t child)
1599 struct cbb_softc *sc = device_get_softc(brdev);
1600 if (sc->flags & CBB_16BIT_CARD)
1601 cbb_pcic_power_disable_socket(brdev, child);
1603 cbb_cardbus_power_disable_socket(brdev, child);
1606 cbb_pcic_activate_resource(device_t brdev, device_t child, int type, int rid,
1607 struct resource *res)
1610 struct cbb_softc *sc = device_get_softc(brdev);
1611 if (!(rman_get_flags(res) & RF_ACTIVE)) { /* not already activated */
1613 case SYS_RES_IOPORT:
1614 err = exca_io_map(&sc->exca, 0, res);
1616 case SYS_RES_MEMORY:
1617 err = exca_mem_map(&sc->exca, 0, res);
1627 return (BUS_ACTIVATE_RESOURCE(device_get_parent(brdev), child,
1632 cbb_pcic_deactivate_resource(device_t brdev, device_t child, int type,
1633 int rid, struct resource *res)
1635 struct cbb_softc *sc = device_get_softc(brdev);
1637 if (rman_get_flags(res) & RF_ACTIVE) { /* if activated */
1639 case SYS_RES_IOPORT:
1640 if (exca_io_unmap_res(&sc->exca, res))
1643 case SYS_RES_MEMORY:
1644 if (exca_mem_unmap_res(&sc->exca, res))
1649 return (BUS_DEACTIVATE_RESOURCE(device_get_parent(brdev), child,
1653 static struct resource *
1654 cbb_pcic_alloc_resource(device_t brdev, device_t child, int type, int *rid,
1655 u_long start, u_long end, u_long count, uint flags)
1657 struct resource *res = NULL;
1658 struct cbb_softc *sc = device_get_softc(brdev);
1662 case SYS_RES_MEMORY:
1663 if (start < cbb_start_mem)
1664 start = cbb_start_mem;
1667 flags = (flags & ~RF_ALIGNMENT_MASK) |
1668 rman_make_alignment_flags(CBB_MEMALIGN);
1670 case SYS_RES_IOPORT:
1671 if (start < cbb_start_16_io)
1672 start = cbb_start_16_io;
1677 tmp = rman_get_start(sc->irq_res);
1678 if (start > tmp || end < tmp || count != 1) {
1679 device_printf(child, "requested interrupt %ld-%ld,"
1680 "count = %ld not supported by cbb\n",
1684 flags |= RF_SHAREABLE;
1685 start = end = rman_get_start(sc->irq_res);
1688 res = BUS_ALLOC_RESOURCE(device_get_parent(brdev), child, type, rid,
1689 start, end, count, flags & ~RF_ACTIVE);
1692 cbb_insert_res(sc, res, type, *rid);
1693 if (flags & RF_ACTIVE) {
1694 if (bus_activate_resource(child, type, *rid, res) != 0) {
1695 bus_release_resource(child, type, *rid, res);
1704 cbb_pcic_release_resource(device_t brdev, device_t child, int type,
1705 int rid, struct resource *res)
1707 struct cbb_softc *sc = device_get_softc(brdev);
1710 if (rman_get_flags(res) & RF_ACTIVE) {
1711 error = bus_deactivate_resource(child, type, rid, res);
1715 cbb_remove_res(sc, res);
1716 return (BUS_RELEASE_RESOURCE(device_get_parent(brdev), child,
1720 /************************************************************************/
1721 /* PC Card methods */
1722 /************************************************************************/
1725 cbb_pcic_set_res_flags(device_t brdev, device_t child, int type, int rid,
1728 struct cbb_softc *sc = device_get_softc(brdev);
1729 struct resource *res;
1731 if (type != SYS_RES_MEMORY)
1733 res = cbb_find_res(sc, type, rid);
1735 device_printf(brdev,
1736 "set_res_flags: specified rid not found\n");
1739 return (exca_mem_set_flags(&sc->exca, res, flags));
1743 cbb_pcic_set_memory_offset(device_t brdev, device_t child, int rid,
1744 uint32_t cardaddr, uint32_t *deltap)
1746 struct cbb_softc *sc = device_get_softc(brdev);
1747 struct resource *res;
1749 res = cbb_find_res(sc, SYS_RES_MEMORY, rid);
1751 device_printf(brdev,
1752 "set_memory_offset: specified rid not found\n");
1755 return (exca_mem_set_offset(&sc->exca, res, cardaddr, deltap));
1758 /************************************************************************/
1760 /************************************************************************/
1764 cbb_activate_resource(device_t brdev, device_t child, int type, int rid,
1767 struct cbb_softc *sc = device_get_softc(brdev);
1769 if (sc->flags & CBB_16BIT_CARD)
1770 return (cbb_pcic_activate_resource(brdev, child, type, rid, r));
1772 return (cbb_cardbus_activate_resource(brdev, child, type, rid,
1777 cbb_deactivate_resource(device_t brdev, device_t child, int type,
1778 int rid, struct resource *r)
1780 struct cbb_softc *sc = device_get_softc(brdev);
1782 if (sc->flags & CBB_16BIT_CARD)
1783 return (cbb_pcic_deactivate_resource(brdev, child, type,
1786 return (cbb_cardbus_deactivate_resource(brdev, child, type,
1790 static struct resource *
1791 cbb_alloc_resource(device_t brdev, device_t child, int type, int *rid,
1792 u_long start, u_long end, u_long count, uint flags)
1794 struct cbb_softc *sc = device_get_softc(brdev);
1796 if (sc->flags & CBB_16BIT_CARD)
1797 return (cbb_pcic_alloc_resource(brdev, child, type, rid,
1798 start, end, count, flags));
1800 return (cbb_cardbus_alloc_resource(brdev, child, type, rid,
1801 start, end, count, flags));
1805 cbb_release_resource(device_t brdev, device_t child, int type, int rid,
1808 struct cbb_softc *sc = device_get_softc(brdev);
1810 if (sc->flags & CBB_16BIT_CARD)
1811 return (cbb_pcic_release_resource(brdev, child, type,
1814 return (cbb_cardbus_release_resource(brdev, child, type,
1819 cbb_read_ivar(device_t brdev, device_t child, int which, uintptr_t *result)
1821 struct cbb_softc *sc = device_get_softc(brdev);
1825 *result = sc->secbus;
1832 cbb_write_ivar(device_t brdev, device_t child, int which, uintptr_t value)
1834 struct cbb_softc *sc = device_get_softc(brdev);
1844 /************************************************************************/
1845 /* PCI compat methods */
1846 /************************************************************************/
1849 cbb_maxslots(device_t brdev)
1855 cbb_read_config(device_t brdev, int b, int s, int f, int reg, int width)
1858 * Pass through to the next ppb up the chain (i.e. our grandparent).
1860 return (PCIB_READ_CONFIG(device_get_parent(device_get_parent(brdev)),
1861 b, s, f, reg, width));
1865 cbb_write_config(device_t brdev, int b, int s, int f, int reg, uint32_t val,
1869 * Pass through to the next ppb up the chain (i.e. our grandparent).
1871 PCIB_WRITE_CONFIG(device_get_parent(device_get_parent(brdev)),
1872 b, s, f, reg, val, width);
1876 cbb_suspend(device_t self)
1879 struct cbb_softc *sc = device_get_softc(self);
1881 bus_teardown_intr(self, sc->irq_res, sc->intrhand);
1882 sc->flags &= ~CBB_CARD_OK; /* Card is bogus now */
1883 error = bus_generic_suspend(self);
1888 cbb_resume(device_t self)
1891 struct cbb_softc *sc = (struct cbb_softc *)device_get_softc(self);
1895 * Some BIOSes will not save the BARs for the pci chips, so we
1896 * must do it ourselves. If the BAR is reset to 0 for an I/O
1897 * device, it will read back as 0x1, so no explicit test for
1898 * memory devices are needed.
1900 * Note: The PCI bus code should do this automatically for us on
1901 * suspend/resume, but until it does, we have to cope.
1903 pci_write_config(self, CBBR_SOCKBASE, rman_get_start(sc->base_res), 4);
1904 DEVPRINTF((self, "PCI Memory allocated: %08lx\n",
1905 rman_get_start(sc->base_res)));
1909 /* reset interrupt -- Do we really need to do this? */
1910 tmp = cbb_get(sc, CBB_SOCKET_EVENT);
1911 cbb_set(sc, CBB_SOCKET_EVENT, tmp);
1913 /* re-establish the interrupt. */
1914 if (bus_setup_intr(self, sc->irq_res, INTR_TYPE_NET, cbb_intr, sc,
1916 device_printf(self, "couldn't re-establish interrupt");
1917 bus_release_resource(self, SYS_RES_IRQ, 0, sc->irq_res);
1918 bus_release_resource(self, SYS_RES_MEMORY, CBBR_SOCKBASE,
1921 sc->base_res = NULL;
1925 /* CSC Interrupt: Card detect interrupt on */
1926 cbb_setb(sc, CBB_SOCKET_MASK, CBB_SOCKET_MASK_CD);
1928 /* Signal the thread to wakeup. */
1931 error = bus_generic_resume(self);
1937 cbb_child_present(device_t self)
1939 struct cbb_softc *sc = (struct cbb_softc *)device_get_softc(self);
1942 sockstate = cbb_get(sc, CBB_SOCKET_STATE);
1943 return ((sockstate & CBB_SOCKET_STAT_CD) != 0 &&
1944 (sc->flags & CBB_CARD_OK) != 0);
1947 static device_method_t cbb_methods[] = {
1948 /* Device interface */
1949 DEVMETHOD(device_probe, cbb_probe),
1950 DEVMETHOD(device_attach, cbb_attach),
1951 DEVMETHOD(device_detach, cbb_detach),
1952 DEVMETHOD(device_shutdown, cbb_shutdown),
1953 DEVMETHOD(device_suspend, cbb_suspend),
1954 DEVMETHOD(device_resume, cbb_resume),
1957 DEVMETHOD(bus_print_child, bus_generic_print_child),
1958 DEVMETHOD(bus_read_ivar, cbb_read_ivar),
1959 DEVMETHOD(bus_write_ivar, cbb_write_ivar),
1960 DEVMETHOD(bus_alloc_resource, cbb_alloc_resource),
1961 DEVMETHOD(bus_release_resource, cbb_release_resource),
1962 DEVMETHOD(bus_activate_resource, cbb_activate_resource),
1963 DEVMETHOD(bus_deactivate_resource, cbb_deactivate_resource),
1964 DEVMETHOD(bus_driver_added, cbb_driver_added),
1965 DEVMETHOD(bus_child_detached, cbb_child_detached),
1966 DEVMETHOD(bus_setup_intr, cbb_setup_intr),
1967 DEVMETHOD(bus_teardown_intr, cbb_teardown_intr),
1968 DEVMETHOD(bus_child_present, cbb_child_present),
1970 /* 16-bit card interface */
1971 DEVMETHOD(card_set_res_flags, cbb_pcic_set_res_flags),
1972 DEVMETHOD(card_set_memory_offset, cbb_pcic_set_memory_offset),
1974 /* power interface */
1975 DEVMETHOD(power_enable_socket, cbb_power_enable_socket),
1976 DEVMETHOD(power_disable_socket, cbb_power_disable_socket),
1978 /* pcib compatibility interface */
1979 DEVMETHOD(pcib_maxslots, cbb_maxslots),
1980 DEVMETHOD(pcib_read_config, cbb_read_config),
1981 DEVMETHOD(pcib_write_config, cbb_write_config),
1985 static driver_t cbb_driver = {
1988 sizeof(struct cbb_softc)
1991 static devclass_t cbb_devclass;
1993 DRIVER_MODULE(cbb, pci, cbb_driver, cbb_devclass, 0, 0);
1994 MODULE_VERSION(cbb, 1);
1995 MODULE_DEPEND(cbb, exca, 1, 1, 1);