2 * Copyright (c) 1999 Cameron Grant <cg@freebsd.org>
3 * Copyright (c) 2003-2007 Yuriy Tsibizov <yuriy.tsibizov@gfk.ru>
6 * Redistribution and use in source and binary forms, with or without
7 * modification, are permitted provided that the following conditions
9 * 1. Redistributions of source code must retain the above copyright
10 * notice, this list of conditions and the following disclaimer.
11 * 2. Redistributions in binary form must reproduce the above copyright
12 * notice, this list of conditions and the following disclaimer in the
13 * documentation and/or other materials provided with the distribution.
15 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
16 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
17 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
18 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
19 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
20 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
21 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
22 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHERIN CONTRACT, STRICT
23 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
24 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
27 * $FreeBSD: head/sys/dev/sound/pci/emu10kx.c 274035 2014-11-03 11:11:45Z bapt $
30 #include <sys/param.h>
31 #include <sys/types.h>
34 #include <sys/systm.h>
36 #include <sys/queue.h>
38 #include <sys/mutex.h>
39 #include <sys/sysctl.h>
41 #include <bus/pci/pcireg.h>
42 #include <bus/pci/pcivar.h>
44 #include <machine/clock.h> /* for DELAY */
46 #ifdef HAVE_KERNEL_OPTION_HEADERS
50 #include <dev/sound/chip.h>
51 #include <dev/sound/pcm/sound.h>
52 #include <dev/sound/pcm/ac97.h>
54 #include <dev/sound/pci/emuxkireg.h>
55 #include <dev/sound/pci/emu10kx.h>
60 #define HAS_AC97 0x0004
62 #define IS_EMU10K1 0x0008
63 #define IS_EMU10K2 0x0010
64 #define IS_CA0102 0x0020
65 #define IS_CA0108 0x0040
66 #define IS_UNKNOWN 0x0080
68 #define BROKEN_DIGITAL 0x0100
69 #define DIGITAL_ONLY 0x0200
71 #define IS_CARDBUS 0x0400
74 #define MODE_DIGITAL 2
75 #define SPDIF_MODE_PCM 1
76 #define SPDIF_MODE_AC3 2
95 #define GPR(i) (sc->gpr_base+(i))
96 #define INP(i) (sc->input_base+(i))
97 #define OUTP(i) (sc->output_base+(i))
99 #define FX2(i) (sc->efxc_base+(i))
100 #define DSP_CONST(i) (sc->dsp_zero+(i))
102 #define COND_NORMALIZED DSP_CONST(0x1)
103 #define COND_BORROW DSP_CONST(0x2)
104 #define COND_MINUS DSP_CONST(0x3)
105 #define COND_LESS_ZERO DSP_CONST(0x4)
106 #define COND_EQ_ZERO DSP_CONST(0x5)
107 #define COND_SATURATION DSP_CONST(0x6)
108 #define COND_NEQ_ZERO DSP_CONST(0x8)
110 #define DSP_ACCUM DSP_CONST(0x16)
111 #define DSP_CCR DSP_CONST(0x17)
114 #define IN_AC97_L 0x00
115 #define IN_AC97_R 0x01
116 #define IN_AC97 IN_AC97_L
117 #define IN_SPDIF_CD_L 0x02
118 #define IN_SPDIF_CD_R 0x03
119 #define IN_SPDIF_CD IN_SPDIF_CD_L
120 #define IN_ZOOM_L 0x04
121 #define IN_ZOOM_R 0x05
122 #define IN_ZOOM IN_ZOOM_L
123 #define IN_TOSLINK_L 0x06
124 #define IN_TOSLINK_R 0x07
125 #define IN_TOSLINK IN_TOSLINK_L
126 #define IN_LINE1_L 0x08
127 #define IN_LINE1_R 0x09
128 #define IN_LINE1 IN_LINE1_L
129 #define IN_COAX_SPDIF_L 0x0a
130 #define IN_COAX_SPDIF_R 0x0b
131 #define IN_COAX_SPDIF IN_COAX_SPDIF_L
132 #define IN_LINE2_L 0x0c
133 #define IN_LINE2_R 0x0d
134 #define IN_LINE2 IN_LINE2_L
139 #define OUT_AC97_L 0x00
140 #define OUT_AC97_R 0x01
141 #define OUT_AC97 OUT_AC97_L
142 #define OUT_A_FRONT OUT_AC97
143 #define OUT_TOSLINK_L 0x02
144 #define OUT_TOSLINK_R 0x03
145 #define OUT_TOSLINK OUT_TOSLINK_L
146 #define OUT_D_CENTER 0x04
147 #define OUT_D_SUB 0x05
148 #define OUT_HEADPHONE_L 0x06
149 #define OUT_HEADPHONE_R 0x07
150 #define OUT_HEADPHONE OUT_HEADPHONE_L
151 #define OUT_REAR_L 0x08
152 #define OUT_REAR_R 0x09
153 #define OUT_REAR OUT_REAR_L
154 #define OUT_ADC_REC_L 0x0a
155 #define OUT_ADC_REC_R 0x0b
156 #define OUT_ADC_REC OUT_ADC_REC_L
157 #define OUT_MIC_CAP 0x0c
159 /* Live! 5.1 Digital, non-standard 5.1 (center & sub) outputs */
160 #define OUT_A_CENTER 0x11
161 #define OUT_A_SUB 0x12
164 #define A_IN_AC97_L 0x00
165 #define A_IN_AC97_R 0x01
166 #define A_IN_AC97 A_IN_AC97_L
167 #define A_IN_SPDIF_CD_L 0x02
168 #define A_IN_SPDIF_CD_R 0x03
169 #define A_IN_SPDIF_CD A_IN_SPDIF_CD_L
170 #define A_IN_O_SPDIF_L 0x04
171 #define A_IN_O_SPDIF_R 0x05
172 #define A_IN_O_SPDIF A_IN_O_SPDIF_L
173 #define A_IN_LINE2_L 0x08
174 #define A_IN_LINE2_R 0x09
175 #define A_IN_LINE2 A_IN_LINE2_L
176 #define A_IN_R_SPDIF_L 0x0a
177 #define A_IN_R_SPDIF_R 0x0b
178 #define A_IN_R_SPDIF A_IN_R_SPDIF_L
179 #define A_IN_AUX2_L 0x0c
180 #define A_IN_AUX2_R 0x0d
181 #define A_IN_AUX2 A_IN_AUX2_L
184 #define A_OUT_D_FRONT_L 0x00
185 #define A_OUT_D_FRONT_R 0x01
186 #define A_OUT_D_FRONT A_OUT_D_FRONT_L
187 #define A_OUT_D_CENTER 0x02
188 #define A_OUT_D_SUB 0x03
189 #define A_OUT_D_SIDE_L 0x04
190 #define A_OUT_D_SIDE_R 0x05
191 #define A_OUT_D_SIDE A_OUT_D_SIDE_L
192 #define A_OUT_D_REAR_L 0x06
193 #define A_OUT_D_REAR_R 0x07
194 #define A_OUT_D_REAR A_OUT_D_REAR_L
196 /* on Audigy Platinum only */
197 #define A_OUT_HPHONE_L 0x04
198 #define A_OUT_HPHONE_R 0x05
199 #define A_OUT_HPHONE A_OUT_HPHONE_L
201 #define A_OUT_A_FRONT_L 0x08
202 #define A_OUT_A_FRONT_R 0x09
203 #define A_OUT_A_FRONT A_OUT_A_FRONT_L
204 #define A_OUT_A_CENTER 0x0a
205 #define A_OUT_A_SUB 0x0b
206 #define A_OUT_A_SIDE_L 0x0c
207 #define A_OUT_A_SIDE_R 0x0d
208 #define A_OUT_A_SIDE A_OUT_A_SIDE_L
209 #define A_OUT_A_REAR_L 0x0e
210 #define A_OUT_A_REAR_R 0x0f
211 #define A_OUT_A_REAR A_OUT_A_REAR_L
212 #define A_OUT_AC97_L 0x10
213 #define A_OUT_AC97_R 0x11
214 #define A_OUT_AC97 A_OUT_AC97_L
215 #define A_OUT_ADC_REC_L 0x16
216 #define A_OUT_ADC_REC_R 0x17
217 #define A_OUT_ADC_REC A_OUT_ADC_REC_L
219 #define EMU_DATA2 0x24
220 #define EMU_IPR2 0x28
221 #define EMU_INTE2 0x2c
222 #define EMU_IPR3 0x38
223 #define EMU_INTE3 0x3c
225 #define EMU_A2_SRCSel 0x60
226 #define EMU_A2_SRCMULTI_ENABLE 0x6e
228 #define EMU_A_I2S_CAPTURE_96000 0x00000400
230 #define EMU_A2_MIXER_I2S_ENABLE 0x7B
231 #define EMU_A2_MIXER_SPDIF_ENABLE 0x7A
243 #define NUM_CACHES 10
245 #define CDSPDIFMUTE 0
249 #define EMU_MAX_GPR 512
250 #define EMU_MAX_IRQ_CONSUMERS 32
254 unsigned int b16:1, stereo:1, busy:1, running:1, ismaster:1;
261 struct emu_voice *slave;
269 SLIST_ENTRY(emu_memblk) link;
273 uint32_t pte_start, pte_size;
274 bus_dmamap_t buf_map;
278 uint8_t bmap[EMU_MAXPAGES / 8];
281 bus_addr_t ptb_pages_addr;
282 bus_addr_t silent_page_addr;
283 bus_dmamap_t ptb_map;
284 bus_dmamap_t silent_map;
286 struct emu_sc_info *card;
287 SLIST_HEAD(, emu_memblk) blocks;
292 struct emu_sc_info *card;
293 struct lock gpr_lock;
294 signed int allocmap[EMU_MAX_GPR];
300 struct emu_intr_handler {
304 uint32_t(*irq_func) (void *softc, uint32_t irq);
309 struct lock rw; /* Hardware exclusive access lock */
311 /* Hardware and subdevices */
313 device_t pcm[RT_COUNT];
319 bus_space_handle_t sh;
321 struct cdev *cdev; /* /dev/emu10k character device */
322 struct lock emu10kx_lock;
324 struct sbuf emu10kx_sbuf;
329 struct resource *reg;
330 struct resource *irq;
334 struct emu_intr_handler ihandler[EMU_MAX_IRQ_CONSUMERS];
336 /* Card HW configuration */
337 unsigned int mode; /* analog / digital */
338 unsigned int mchannel_fx;
339 unsigned int dsp_zero;
340 unsigned int code_base;
341 unsigned int code_size;
342 unsigned int gpr_base;
343 unsigned int num_gprs;
344 unsigned int input_base;
345 unsigned int output_base;
346 unsigned int efxc_base;
347 unsigned int opcode_shift;
348 unsigned int high_operand_shift;
349 unsigned int address_mask;
350 uint32_t is_emu10k1:1, is_emu10k2, is_ca0102, is_ca0108:1,
351 has_ac97:1, has_51:1, has_71:1,
353 broken_digital:1, is_cardbus:1;
355 signed int mch_disabled, mch_rec, dbg_level;
356 signed int num_inputs;
357 unsigned int num_outputs;
358 unsigned int num_fxbuses;
359 unsigned int routing_code_start;
360 unsigned int routing_code_end;
363 struct emu_voice voice[NUM_G]; /* Hardware voices */
364 uint32_t irq_mask[EMU_MAX_IRQ_CONSUMERS]; /* IRQ manager data */
365 int timer[EMU_MAX_IRQ_CONSUMERS]; /* timer */
368 struct emu_mem mem; /* memory */
371 int mixer_gpr[NUM_MIXERS];
372 int mixer_volcache[NUM_MIXERS];
373 int cache_gpr[NUM_CACHES];
375 int mute_gpr[NUM_MUTE];
376 struct sysctl_ctx_list *ctx;
377 struct sysctl_oid *root;
380 static void emu_setmap(void *arg, bus_dma_segment_t * segs, int nseg, int error);
381 static void* emu_malloc(struct emu_mem *mem, uint32_t sz, bus_addr_t * addr, bus_dmamap_t *map);
382 static void emu_free(struct emu_mem *mem, void *dmabuf, bus_dmamap_t map);
383 static void* emu_memalloc(struct emu_mem *mem, uint32_t sz, bus_addr_t * addr, const char * owner);
384 static int emu_memfree(struct emu_mem *mem, void *membuf);
385 static int emu_memstart(struct emu_mem *mem, void *membuf);
388 static int emu10kx_dev_init(struct emu_sc_info *sc);
389 static int emu10kx_dev_uninit(struct emu_sc_info *sc);
390 static int emu10kx_prepare(struct emu_sc_info *sc, struct sbuf *s);
392 static void emumix_set_mode(struct emu_sc_info *sc, int mode);
393 static void emumix_set_spdif_mode(struct emu_sc_info *sc, int mode);
394 static void emumix_set_fxvol(struct emu_sc_info *sc, unsigned gpr, int32_t vol);
395 static void emumix_set_gpr(struct emu_sc_info *sc, unsigned gpr, int32_t val);
396 static int sysctl_emu_mixer_control(SYSCTL_HANDLER_ARGS);
398 static int emu_rm_init(struct emu_sc_info *sc);
399 static int emu_rm_uninit(struct emu_sc_info *sc);
400 static int emu_rm_gpr_alloc(struct emu_rm *rm, int count);
402 static unsigned int emu_getcard(device_t dev);
403 static uint32_t emu_rd_nolock(struct emu_sc_info *sc, unsigned int regno, unsigned int size);
404 static void emu_wr_nolock(struct emu_sc_info *sc, unsigned int regno, uint32_t data, unsigned int size);
405 static void emu_wr_cbptr(struct emu_sc_info *sc, uint32_t data);
407 static void emu_vstop(struct emu_sc_info *sc, char channel, int enable);
409 static void emu_intr(void *p);
410 static void emu_wrefx(struct emu_sc_info *sc, unsigned int pc, unsigned int data);
411 static void emu_addefxop(struct emu_sc_info *sc, unsigned int op, unsigned int z, unsigned int w, unsigned int x, unsigned int y, uint32_t * pc);
412 static void emu_initefx(struct emu_sc_info *sc);
414 static int emu_cardbus_init(struct emu_sc_info *sc);
415 static int emu_init(struct emu_sc_info *sc);
416 static int emu_uninit(struct emu_sc_info *sc);
418 static int emu_read_ivar(device_t bus __unused, device_t dev, int ivar_index, uintptr_t * result);
419 static int emu_write_ivar(device_t bus __unused, device_t dev __unused,
420 int ivar_index, uintptr_t value __unused);
422 static int emu_pci_probe(device_t dev);
423 static int emu_pci_attach(device_t dev);
424 static int emu_pci_detach(device_t dev);
425 static int emu_modevent(module_t mod __unused, int cmd, void *data __unused);
427 #ifdef SND_EMU10KX_DEBUG
429 #define EMU_MTX_DEBUG() do { \
430 if (mtx_owned(&sc->rw)) { \
431 printf("RW owned in %s line %d for %s\n", __func__, \
432 __LINE__ , device_get_nameunit(sc->dev)); \
433 printf("rw lock owned: %d\n", mtx_owned(&sc->rw)); \
434 printf("rw lock: value %x thread %x\n", \
435 ((&sc->rw)->mtx_lock & ~MTX_FLAGMASK), \
436 (uintptr_t)curthread); \
437 printf("rw lock: recursed %d\n", mtx_recursed(&sc->rw));\
438 db_show_mtx(&sc->rw); \
442 #define EMU_MTX_DEBUG() do { \
446 #define EMU_RWLOCK() do { \
448 lockmgr(&(sc->rw), LK_EXCLUSIVE); \
451 #define EMU_RWUNLOCK() do { \
452 lockmgr(&(sc->rw), LK_RELEASE); \
456 /* Supported cards */
467 static struct emu_hwinfo emu_cards[] = {
468 {0xffff, 0xffff, 0xffff, 0xffff, "BADCRD", "Not a compatible card", 0},
469 /* 0x0020..0x002f 4.0 EMU10K1 cards */
470 {0x1102, 0x0002, 0x1102, 0x0020, "CT4850", "SBLive! Value", HAS_AC97 | IS_EMU10K1},
471 {0x1102, 0x0002, 0x1102, 0x0021, "CT4620", "SBLive!", HAS_AC97 | IS_EMU10K1},
472 {0x1102, 0x0002, 0x1102, 0x002f, "CT????", "SBLive! mainboard implementation", HAS_AC97 | IS_EMU10K1},
474 /* (range unknown) 5.1 EMU10K1 cards */
475 {0x1102, 0x0002, 0x1102, 0x100a, "CT????", "SBLive! 5.1", HAS_AC97 | HAS_51 | IS_EMU10K1},
477 /* 0x80??..0x805? 4.0 EMU10K1 cards */
478 {0x1102, 0x0002, 0x1102, 0x8022, "CT4780", "SBLive! Value", HAS_AC97 | IS_EMU10K1},
479 {0x1102, 0x0002, 0x1102, 0x8023, "CT4790", "SB PCI512", HAS_AC97 | IS_EMU10K1},
480 {0x1102, 0x0002, 0x1102, 0x8024, "CT4760", "SBLive!", HAS_AC97 | IS_EMU10K1},
481 {0x1102, 0x0002, 0x1102, 0x8025, "CT????", "SBLive! Mainboard Implementation", HAS_AC97 | IS_EMU10K1},
482 {0x1102, 0x0002, 0x1102, 0x8026, "CT4830", "SBLive! Value", HAS_AC97 | IS_EMU10K1},
483 {0x1102, 0x0002, 0x1102, 0x8027, "CT4832", "SBLive! Value", HAS_AC97 | IS_EMU10K1},
484 {0x1102, 0x0002, 0x1102, 0x8028, "CT4760", "SBLive! OEM version", HAS_AC97 | IS_EMU10K1},
485 {0x1102, 0x0002, 0x1102, 0x8031, "CT4831", "SBLive! Value", HAS_AC97 | IS_EMU10K1},
486 {0x1102, 0x0002, 0x1102, 0x8040, "CT4760", "SBLive!", HAS_AC97 | IS_EMU10K1},
487 {0x1102, 0x0002, 0x1102, 0x8051, "CT4850", "SBLive! Value", HAS_AC97 | IS_EMU10K1},
489 /* 0x8061..0x???? 5.1 EMU10K1 cards */
490 {0x1102, 0x0002, 0x1102, 0x8061, "SB????", "SBLive! Player 5.1", HAS_AC97 | HAS_51 | IS_EMU10K1},
491 {0x1102, 0x0002, 0x1102, 0x8062, "CT4830", "SBLive! 1024", HAS_AC97 | HAS_51 | IS_EMU10K1},
492 {0x1102, 0x0002, 0x1102, 0x8064, "SB????", "SBLive! 5.1", HAS_AC97 | HAS_51 | IS_EMU10K1},
493 {0x1102, 0x0002, 0x1102, 0x8065, "SB0220", "SBLive! 5.1 Digital", HAS_AC97 | HAS_51 | IS_EMU10K1},
494 {0x1102, 0x0002, 0x1102, 0x8066, "CT4780", "SBLive! 5.1 Digital", HAS_AC97 | HAS_51 | IS_EMU10K1},
495 {0x1102, 0x0002, 0x1102, 0x8067, "SB????", "SBLive!", HAS_AC97 | HAS_51 | IS_EMU10K1},
497 /* Generic SB Live! */
498 {0x1102, 0x0002, 0x1102, 0x0000, "SB????", "SBLive! (Unknown model)", HAS_AC97 | IS_EMU10K1},
500 /* 0x0041..0x0043 EMU10K2 (some kind of Audigy) cards */
502 /* 0x0051..0x0051 5.1 CA0100-IAF cards */
503 {0x1102, 0x0004, 0x1102, 0x0051, "SB0090", "Audigy", HAS_AC97 | HAS_51 | IS_EMU10K2},
504 /* ES is CA0100-IDF chip that don't work in digital mode */
505 {0x1102, 0x0004, 0x1102, 0x0052, "SB0160", "Audigy ES", HAS_AC97 | HAS_71 | IS_EMU10K2 | BROKEN_DIGITAL},
506 /* 0x0053..0x005C 5.1 CA0101-NAF cards */
507 {0x1102, 0x0004, 0x1102, 0x0053, "SB0090", "Audigy Player/OEM", HAS_AC97 | HAS_51 | IS_EMU10K2},
508 {0x1102, 0x0004, 0x1102, 0x0058, "SB0090", "Audigy Player/OEM", HAS_AC97 | HAS_51 | IS_EMU10K2},
510 /* 0x1002..0x1009 5.1 CA0102-IAT cards */
511 {0x1102, 0x0004, 0x1102, 0x1002, "SB????", "Audigy 2 Platinum", HAS_51 | IS_CA0102},
512 {0x1102, 0x0004, 0x1102, 0x1005, "SB????", "Audigy 2 Platinum EX", HAS_51 | IS_CA0102},
513 {0x1102, 0x0004, 0x1102, 0x1007, "SB0240", "Audigy 2", HAS_AC97 | HAS_51 | IS_CA0102},
515 /* 0x2001..0x2003 7.1 CA0102-ICT cards */
516 {0x1102, 0x0004, 0x1102, 0x2001, "SB0350", "Audigy 2 ZS", HAS_AC97 | HAS_71 | IS_CA0102},
517 {0x1102, 0x0004, 0x1102, 0x2002, "SB0350", "Audigy 2 ZS", HAS_AC97 | HAS_71 | IS_CA0102},
518 /* XXX No reports about 0x2003 & 0x2004 cards */
519 {0x1102, 0x0004, 0x1102, 0x2003, "SB0350", "Audigy 2 ZS", HAS_AC97 | HAS_71 | IS_CA0102},
520 {0x1102, 0x0004, 0x1102, 0x2004, "SB0350", "Audigy 2 ZS", HAS_AC97 | HAS_71 | IS_CA0102},
521 {0x1102, 0x0004, 0x1102, 0x2005, "SB0350", "Audigy 2 ZS", HAS_AC97 | HAS_71 | IS_CA0102},
523 /* (range unknown) 7.1 CA0102-xxx Audigy 4 cards */
524 {0x1102, 0x0004, 0x1102, 0x2007, "SB0380", "Audigy 4 Pro", HAS_AC97 | HAS_71 | IS_CA0102},
526 /* Generic Audigy or Audigy 2 */
527 {0x1102, 0x0004, 0x1102, 0x0000, "SB????", "Audigy (Unknown model)", HAS_AC97 | HAS_51 | IS_EMU10K2},
529 /* We don't support CA0103-DAT (Audigy LS) cards */
530 /* There is NO CA0104-xxx cards */
531 /* There is NO CA0105-xxx cards */
532 /* We don't support CA0106-DAT (SB Live! 24 bit) cards */
533 /* There is NO CA0107-xxx cards */
535 /* 0x1000..0x1001 7.1 CA0108-IAT cards */
536 {0x1102, 0x0008, 0x1102, 0x1000, "SB????", "Audigy 2 LS", HAS_AC97 | HAS_51 | IS_CA0108 | DIGITAL_ONLY},
537 {0x1102, 0x0008, 0x1102, 0x1001, "SB0400", "Audigy 2 Value", HAS_AC97 | HAS_71 | IS_CA0108 | DIGITAL_ONLY},
538 {0x1102, 0x0008, 0x1102, 0x1021, "SB0610", "Audigy 4", HAS_AC97 | HAS_71 | IS_CA0108 | DIGITAL_ONLY},
540 {0x1102, 0x0008, 0x1102, 0x2001, "SB0530", "Audigy 2 ZS CardBus", HAS_AC97 | HAS_71 | IS_CA0108 | IS_CARDBUS},
542 {0x1102, 0x0008, 0x0000, 0x0000, "SB????", "Audigy 2 Value (Unknown model)", HAS_AC97 | HAS_51 | IS_CA0108},
544 /* Unsupported cards */
546 static struct emu_hwinfo emu_bad_cards[] = {
547 /* APS cards should be possible to support */
548 {0x1102, 0x0002, 0x1102, 0x4001, "EMUAPS", "E-mu APS", 0},
549 {0x1102, 0x0002, 0x1102, 0x4002, "EMUAPS", "E-mu APS", 0},
550 {0x1102, 0x0004, 0x1102, 0x4001, "EMU???", "E-mu 1212m [4001]", 0},
551 /* Similar-named ("Live!" or "Audigy") cards on different chipsets */
552 {0x1102, 0x8064, 0x0000, 0x0000, "SB0100", "SBLive! 5.1 OEM", 0},
553 {0x1102, 0x0006, 0x0000, 0x0000, "SB0200", "DELL OEM SBLive! Value", 0},
554 {0x1102, 0x0007, 0x0000, 0x0000, "SB0310", "Audigy LS", 0},
558 * Get best known information about device.
561 emu_getcard(device_t dev)
566 unsigned int thiscard;
569 device = pci_read_config(dev, PCIR_DEVICE, /* bytes */ 2);
570 subdevice = pci_read_config(dev, PCIR_SUBDEV_0, /* bytes */ 2);
572 n_cards = NELEM(emu_cards);
574 for (i = 1; i < n_cards; i++) {
575 if (device == emu_cards[i].device) {
576 if (subdevice == emu_cards[i].subdevice) {
580 if (0x0000 == emu_cards[i].subdevice) {
583 * don't break, we can get more specific card
590 n_cards = NELEM(emu_bad_cards);
591 for (i = 0; i < n_cards; i++) {
592 if (device == emu_bad_cards[i].device) {
593 if (subdevice == emu_bad_cards[i].subdevice) {
597 if (0x0000 == emu_bad_cards[i].subdevice) {
599 break; /* we avoid all this cards */
608 * Base hardware interface are 32 (Audigy) or 64 (Audigy2) registers.
609 * Some of them are used directly, some of them provide pointer / data pairs.
612 emu_rd_nolock(struct emu_sc_info *sc, unsigned int regno, unsigned int size)
615 KASSERT(sc != NULL, ("emu_rd: NULL sc"));
618 return (bus_space_read_1(sc->st, sc->sh, regno));
620 return (bus_space_read_2(sc->st, sc->sh, regno));
622 return (bus_space_read_4(sc->st, sc->sh, regno));
628 emu_wr_nolock(struct emu_sc_info *sc, unsigned int regno, uint32_t data, unsigned int size)
631 KASSERT(sc != NULL, ("emu_rd: NULL sc"));
634 bus_space_write_1(sc->st, sc->sh, regno, data);
637 bus_space_write_2(sc->st, sc->sh, regno, data);
640 bus_space_write_4(sc->st, sc->sh, regno, data);
645 * EMU_PTR / EMU_DATA interface. Access to EMU10Kx is made
646 * via (channel, register) pair. Some registers are channel-specific,
650 emu_rdptr(struct emu_sc_info *sc, unsigned int chn, unsigned int reg)
652 uint32_t ptr, val, mask, size, offset;
654 ptr = ((reg << 16) & sc->address_mask) | (chn & EMU_PTR_CHNO_MASK);
657 emu_wr_nolock(sc, EMU_PTR, ptr, 4);
658 val = emu_rd_nolock(sc, EMU_DATA, 4);
662 * XXX Some register numbers has data size and offset encoded in
663 * it to get only part of 32bit register. This use is not described
664 * in register name, be careful!
666 if (reg & 0xff000000) {
667 size = (reg >> 24) & 0x3f;
668 offset = (reg >> 16) & 0x1f;
669 mask = ((1 << size) - 1) << offset;
677 emu_wrptr(struct emu_sc_info *sc, unsigned int chn, unsigned int reg, uint32_t data)
679 uint32_t ptr, mask, size, offset;
681 ptr = ((reg << 16) & sc->address_mask) | (chn & EMU_PTR_CHNO_MASK);
684 emu_wr_nolock(sc, EMU_PTR, ptr, 4);
686 * XXX Another kind of magic encoding in register number. This can
687 * give you side effect - it will read previous data from register
688 * and change only required bits.
690 if (reg & 0xff000000) {
691 size = (reg >> 24) & 0x3f;
692 offset = (reg >> 16) & 0x1f;
693 mask = ((1 << size) - 1) << offset;
696 data |= emu_rd_nolock(sc, EMU_DATA, 4) & ~mask;
698 emu_wr_nolock(sc, EMU_DATA, data, 4);
702 * EMU_A2_PTR / EMU_DATA2 interface. Access to P16v is made
703 * via (channel, register) pair. Some registers are channel-specific,
704 * some not. This interface is supported by CA0102 and CA0108 chips only.
707 emu_rd_p16vptr(struct emu_sc_info *sc, uint16_t chn, uint16_t reg)
711 /* XXX separate lock? */
713 emu_wr_nolock(sc, EMU_A2_PTR, (reg << 16) | chn, 4);
714 val = emu_rd_nolock(sc, EMU_DATA2, 4);
722 emu_wr_p16vptr(struct emu_sc_info *sc, uint16_t chn, uint16_t reg, uint32_t data)
726 emu_wr_nolock(sc, EMU_A2_PTR, (reg << 16) | chn, 4);
727 emu_wr_nolock(sc, EMU_DATA2, data, 4);
731 * XXX CardBus interface. Not tested on any real hardware.
734 emu_wr_cbptr(struct emu_sc_info *sc, uint32_t data)
739 * 0x38 is IPE3 (CD S/PDIF interrupt pending register) on CA0102. Seems
740 * to be some reg/value accessible kind of config register on CardBus
741 * CA0108, with value(?) in top 16 bit, address(?) in low 16
744 val = emu_rd_nolock(sc, 0x38, 4);
745 emu_wr_nolock(sc, 0x38, data, 4);
746 val = emu_rd_nolock(sc, 0x38, 4);
751 * Direct hardware register access
752 * Assume that it is never used to access EMU_PTR-based registers and can run unlocked.
755 emu_wr(struct emu_sc_info *sc, unsigned int regno, uint32_t data, unsigned int size)
757 KASSERT(regno != EMU_PTR, ("emu_wr: attempt to write to EMU_PTR"));
758 KASSERT(regno != EMU_A2_PTR, ("emu_wr: attempt to write to EMU_A2_PTR"));
760 emu_wr_nolock(sc, regno, data, size);
764 emu_rd(struct emu_sc_info *sc, unsigned int regno, unsigned int size)
768 KASSERT(regno != EMU_DATA, ("emu_rd: attempt to read DATA"));
769 KASSERT(regno != EMU_DATA2, ("emu_rd: attempt to read DATA2"));
771 rd = emu_rd_nolock(sc, regno, size);
776 * Enabling IR MIDI messages is another kind of black magic. It just
777 * has to be made this way. It really do it.
780 emu_enable_ir(struct emu_sc_info *sc)
784 if (sc->is_emu10k2 || sc->is_ca0102) {
785 iocfg = emu_rd_nolock(sc, EMU_A_IOCFG, 2);
786 emu_wr_nolock(sc, EMU_A_IOCFG, iocfg | EMU_A_IOCFG_GPOUT2, 2);
788 emu_wr_nolock(sc, EMU_A_IOCFG, iocfg | EMU_A_IOCFG_GPOUT1 | EMU_A_IOCFG_GPOUT2, 2);
790 emu_wr_nolock(sc, EMU_A_IOCFG, iocfg | EMU_A_IOCFG_GPOUT1, 2);
792 emu_wr_nolock(sc, EMU_A_IOCFG, iocfg, 2);
793 device_printf(sc->dev, "Audigy IR MIDI events enabled.\n");
796 if (sc->is_emu10k1) {
797 iocfg = emu_rd_nolock(sc, EMU_HCFG, 4);
798 emu_wr_nolock(sc, EMU_HCFG, iocfg | EMU_HCFG_GPOUT2, 4);
800 emu_wr_nolock(sc, EMU_HCFG, iocfg | EMU_HCFG_GPOUT1 | EMU_HCFG_GPOUT2, 4);
802 emu_wr_nolock(sc, EMU_HCFG, iocfg, 4);
803 device_printf(sc->dev, "SB Live! IR MIDI events enabled.\n");
810 * emu_timer_ - HW timer management
813 emu_timer_create(struct emu_sc_info *sc)
819 lockmgr(&sc->lock, LK_EXCLUSIVE);
820 for (i = 0; i < EMU_MAX_IRQ_CONSUMERS; i++)
821 if (sc->timer[i] == 0) {
822 sc->timer[i] = -1; /* disable it */
824 lockmgr(&sc->lock, LK_RELEASE);
827 lockmgr(&sc->lock, LK_RELEASE);
833 emu_timer_set(struct emu_sc_info *sc, int timer, int delay)
840 RANGE(delay, 16, 1024);
841 RANGE(timer, 0, EMU_MAX_IRQ_CONSUMERS-1);
843 lockmgr(&sc->lock, LK_EXCLUSIVE);
844 sc->timer[timer] = delay;
845 for (i = 0; i < EMU_MAX_IRQ_CONSUMERS; i++)
846 if (sc->timerinterval > sc->timer[i])
847 sc->timerinterval = sc->timer[i];
850 emu_wr(sc, EMU_TIMER, sc->timerinterval & 0x03ff, 2);
851 lockmgr(&sc->lock, LK_RELEASE);
857 emu_timer_enable(struct emu_sc_info *sc, int timer, int go)
866 RANGE(timer, 0, EMU_MAX_IRQ_CONSUMERS-1);
868 lockmgr(&sc->lock, LK_EXCLUSIVE);
870 if ((go == 1) && (sc->timer[timer] < 0))
871 sc->timer[timer] = -sc->timer[timer];
872 if ((go == 0) && (sc->timer[timer] > 0))
873 sc->timer[timer] = -sc->timer[timer];
876 for (i = 0; i < EMU_MAX_IRQ_CONSUMERS; i++) {
877 if (sc->timerinterval > sc->timer[i])
878 sc->timerinterval = sc->timer[i];
879 if (sc->timer[i] > 0)
883 emu_wr(sc, EMU_TIMER, sc->timerinterval & 0x03ff, 2);
886 x = emu_rd(sc, EMU_INTE, 4);
887 x |= EMU_INTE_INTERTIMERENB;
888 emu_wr(sc, EMU_INTE, x, 4);
890 x = emu_rd(sc, EMU_INTE, 4);
891 x &= ~EMU_INTE_INTERTIMERENB;
892 emu_wr(sc, EMU_INTE, x, 4);
894 lockmgr(&sc->lock, LK_RELEASE);
899 emu_timer_clear(struct emu_sc_info *sc, int timer)
904 RANGE(timer, 0, EMU_MAX_IRQ_CONSUMERS-1);
906 emu_timer_enable(sc, timer, 0);
908 lockmgr(&sc->lock, LK_EXCLUSIVE);
909 if (sc->timer[timer] != 0)
910 sc->timer[timer] = 0;
911 lockmgr(&sc->lock, LK_RELEASE);
917 * emu_intr_ - HW interrupt handler management
920 emu_intr_register(struct emu_sc_info *sc, uint32_t inte_mask, uint32_t intr_mask, uint32_t(*func) (void *softc, uint32_t irq), void *isc)
925 lockmgr(&sc->lock, LK_EXCLUSIVE);
926 for (i = 0; i < EMU_MAX_IRQ_CONSUMERS; i++)
927 if (sc->ihandler[i].inte_mask == 0) {
928 sc->ihandler[i].inte_mask = inte_mask;
929 sc->ihandler[i].intr_mask = intr_mask;
930 sc->ihandler[i].softc = isc;
931 sc->ihandler[i].irq_func = func;
932 x = emu_rd(sc, EMU_INTE, 4);
934 emu_wr(sc, EMU_INTE, x, 4);
935 lockmgr(&sc->lock, LK_RELEASE);
936 if (sc->dbg_level > 1)
937 device_printf(sc->dev, "ihandle %d registered\n", i);
941 lockmgr(&sc->lock, LK_RELEASE);
942 if (sc->dbg_level > 1)
943 device_printf(sc->dev, "ihandle not registered\n");
949 emu_intr_unregister(struct emu_sc_info *sc, int hnumber)
954 lockmgr(&sc->lock, LK_EXCLUSIVE);
956 if (sc->ihandler[hnumber].inte_mask == 0) {
957 lockmgr(&sc->lock, LK_RELEASE);
961 x = emu_rd(sc, EMU_INTE, 4);
962 x &= ~sc->ihandler[hnumber].inte_mask;
964 sc->ihandler[hnumber].inte_mask = 0;
965 sc->ihandler[hnumber].intr_mask = 0;
966 sc->ihandler[hnumber].softc = NULL;
967 sc->ihandler[hnumber].irq_func = NULL;
969 /* other interrupt handlers may use this EMU_INTE value */
970 for (i = 0; i < EMU_MAX_IRQ_CONSUMERS; i++)
971 if (sc->ihandler[i].inte_mask != 0)
972 x |= sc->ihandler[i].inte_mask;
974 emu_wr(sc, EMU_INTE, x, 4);
976 lockmgr(&sc->lock, LK_RELEASE);
983 struct emu_sc_info *sc = (struct emu_sc_info *)p;
988 stat = emu_rd(sc, EMU_IPR, 4);
992 emu_wr(sc, EMU_IPR, stat, 4);
993 for (i = 0; i < EMU_MAX_IRQ_CONSUMERS; i++) {
994 if ((((sc->ihandler[i].intr_mask) & stat) != 0) &&
995 (((void *)sc->ihandler[i].irq_func) != NULL)) {
996 ack |= sc->ihandler[i].irq_func(sc->ihandler[i].softc,
997 (sc->ihandler[i].intr_mask) & stat);
1000 if (sc->dbg_level > 1)
1002 device_printf(sc->dev, "Unhandled interrupt: %08x\n", stat & (~ack));
1006 if ((sc->is_ca0102) || (sc->is_ca0108))
1008 stat = emu_rd(sc, EMU_IPR2, 4);
1012 emu_wr(sc, EMU_IPR2, stat, 4);
1013 if (sc->dbg_level > 1)
1014 device_printf(sc->dev, "EMU_IPR2: %08x\n", stat);
1016 break; /* to avoid infinite loop. should be removed
1017 * after completion of P16V interface. */
1022 stat = emu_rd(sc, EMU_IPR3, 4);
1026 emu_wr(sc, EMU_IPR3, stat, 4);
1027 if (sc->dbg_level > 1)
1028 device_printf(sc->dev, "EMU_IPR3: %08x\n", stat);
1030 break; /* to avoid infinite loop. should be removed
1031 * after completion of S/PDIF interface */
1037 * Get data from private emu10kx structure for PCM buffer allocation.
1038 * Used by PCM code only.
1041 emu_gettag(struct emu_sc_info *sc)
1043 return (sc->mem.dmat);
1047 emu_setmap(void *arg, bus_dma_segment_t * segs, int nseg, int error)
1049 bus_addr_t *phys = (bus_addr_t *) arg;
1051 *phys = error ? 0 : (bus_addr_t) segs->ds_addr;
1054 kprintf("emu10kx: setmap (%lx, %lx), nseg=%d, error=%d\n",
1055 (unsigned long)segs->ds_addr, (unsigned long)segs->ds_len,
1061 emu_malloc(struct emu_mem *mem, uint32_t sz, bus_addr_t * addr,
1068 if ((error = bus_dmamem_alloc(mem->dmat, &dmabuf, BUS_DMA_NOWAIT, map))) {
1069 if (mem->card->dbg_level > 2)
1070 device_printf(mem->card->dev, "emu_malloc: failed to alloc DMA map: %d\n", error);
1073 if ((error = bus_dmamap_load(mem->dmat, *map, dmabuf, sz, emu_setmap, addr, 0)) || !*addr) {
1074 if (mem->card->dbg_level > 2)
1075 device_printf(mem->card->dev, "emu_malloc: failed to load DMA memory: %d\n", error);
1076 bus_dmamem_free(mem->dmat, dmabuf, *map);
1083 emu_free(struct emu_mem *mem, void *dmabuf, bus_dmamap_t map)
1085 bus_dmamap_unload(mem->dmat, map);
1086 bus_dmamem_free(mem->dmat, dmabuf, map);
1090 emu_memalloc(struct emu_mem *mem, uint32_t sz, bus_addr_t * addr, const char *owner)
1092 uint32_t blksz, start, idx, ofs, tmp, found;
1093 struct emu_memblk *blk;
1096 blksz = sz / EMUPAGESIZE;
1097 if (sz > (blksz * EMUPAGESIZE))
1099 if (blksz > EMU_MAX_BUFSZ / EMUPAGESIZE) {
1100 if (mem->card->dbg_level > 2)
1101 device_printf(mem->card->dev, "emu_memalloc: memory request tool large\n");
1104 /* find a free block in the bitmap */
1107 while (!found && start + blksz < EMU_MAXPAGES) {
1109 for (idx = start; idx < start + blksz; idx++)
1110 if (mem->bmap[idx >> 3] & (1 << (idx & 7)))
1116 if (mem->card->dbg_level > 2)
1117 device_printf(mem->card->dev, "emu_memalloc: no free space in bitmap\n");
1120 blk = kmalloc(sizeof(*blk), M_DEVBUF, M_WAITOK | M_ZERO);
1122 if (mem->card->dbg_level > 2)
1123 device_printf(mem->card->dev, "emu_memalloc: buffer allocation failed\n");
1126 bzero(blk, sizeof(*blk));
1127 membuf = emu_malloc(mem, sz, &blk->buf_addr, &blk->buf_map);
1128 *addr = blk->buf_addr;
1129 if (membuf == NULL) {
1130 if (mem->card->dbg_level > 2)
1131 device_printf(mem->card->dev, "emu_memalloc: can't setup HW memory\n");
1132 kfree(blk, M_DEVBUF);
1136 blk->pte_start = start;
1137 blk->pte_size = blksz;
1138 strncpy(blk->owner, owner, 15);
1139 blk->owner[15] = '\0';
1141 for (idx = start; idx < start + blksz; idx++) {
1142 mem->bmap[idx >> 3] |= 1 << (idx & 7);
1143 tmp = (uint32_t) (blk->buf_addr + ofs);
1144 mem->ptb_pages[idx] = (tmp << 1) | idx;
1147 SLIST_INSERT_HEAD(&mem->blocks, blk, link);
1152 emu_memfree(struct emu_mem *mem, void *membuf)
1155 struct emu_memblk *blk, *i;
1158 SLIST_FOREACH(i, &mem->blocks, link) {
1159 if (i->buf == membuf)
1164 SLIST_REMOVE(&mem->blocks, blk, emu_memblk, link);
1165 emu_free(mem, membuf, blk->buf_map);
1166 tmp = (uint32_t) (mem->silent_page_addr) << 1;
1167 for (idx = blk->pte_start; idx < blk->pte_start + blk->pte_size; idx++) {
1168 mem->bmap[idx >> 3] &= ~(1 << (idx & 7));
1169 mem->ptb_pages[idx] = tmp | idx;
1171 kfree(blk, M_DEVBUF);
1176 emu_memstart(struct emu_mem *mem, void *membuf)
1178 struct emu_memblk *blk, *i;
1181 SLIST_FOREACH(i, &mem->blocks, link) {
1182 if (i->buf == membuf)
1187 return (blk->pte_start);
1192 emu_rate_to_pitch(uint32_t rate)
1194 static uint32_t logMagTable[128] = {
1195 0x00000, 0x02dfc, 0x05b9e, 0x088e6, 0x0b5d6, 0x0e26f, 0x10eb3, 0x13aa2,
1196 0x1663f, 0x1918a, 0x1bc84, 0x1e72e, 0x2118b, 0x23b9a, 0x2655d, 0x28ed5,
1197 0x2b803, 0x2e0e8, 0x30985, 0x331db, 0x359eb, 0x381b6, 0x3a93d, 0x3d081,
1198 0x3f782, 0x41e42, 0x444c1, 0x46b01, 0x49101, 0x4b6c4, 0x4dc49, 0x50191,
1199 0x5269e, 0x54b6f, 0x57006, 0x59463, 0x5b888, 0x5dc74, 0x60029, 0x623a7,
1200 0x646ee, 0x66a00, 0x68cdd, 0x6af86, 0x6d1fa, 0x6f43c, 0x7164b, 0x73829,
1201 0x759d4, 0x77b4f, 0x79c9a, 0x7bdb5, 0x7dea1, 0x7ff5e, 0x81fed, 0x8404e,
1202 0x86082, 0x88089, 0x8a064, 0x8c014, 0x8df98, 0x8fef1, 0x91e20, 0x93d26,
1203 0x95c01, 0x97ab4, 0x9993e, 0x9b79f, 0x9d5d9, 0x9f3ec, 0xa11d8, 0xa2f9d,
1204 0xa4d3c, 0xa6ab5, 0xa8808, 0xaa537, 0xac241, 0xadf26, 0xafbe7, 0xb1885,
1205 0xb3500, 0xb5157, 0xb6d8c, 0xb899f, 0xba58f, 0xbc15e, 0xbdd0c, 0xbf899,
1206 0xc1404, 0xc2f50, 0xc4a7b, 0xc6587, 0xc8073, 0xc9b3f, 0xcb5ed, 0xcd07c,
1207 0xceaec, 0xd053f, 0xd1f73, 0xd398a, 0xd5384, 0xd6d60, 0xd8720, 0xda0c3,
1208 0xdba4a, 0xdd3b4, 0xded03, 0xe0636, 0xe1f4e, 0xe384a, 0xe512c, 0xe69f3,
1209 0xe829f, 0xe9b31, 0xeb3a9, 0xecc08, 0xee44c, 0xefc78, 0xf148a, 0xf2c83,
1210 0xf4463, 0xf5c2a, 0xf73da, 0xf8b71, 0xfa2f0, 0xfba57, 0xfd1a7, 0xfe8df
1212 static char logSlopeTable[128] = {
1213 0x5c, 0x5c, 0x5b, 0x5a, 0x5a, 0x59, 0x58, 0x58,
1214 0x57, 0x56, 0x56, 0x55, 0x55, 0x54, 0x53, 0x53,
1215 0x52, 0x52, 0x51, 0x51, 0x50, 0x50, 0x4f, 0x4f,
1216 0x4e, 0x4d, 0x4d, 0x4d, 0x4c, 0x4c, 0x4b, 0x4b,
1217 0x4a, 0x4a, 0x49, 0x49, 0x48, 0x48, 0x47, 0x47,
1218 0x47, 0x46, 0x46, 0x45, 0x45, 0x45, 0x44, 0x44,
1219 0x43, 0x43, 0x43, 0x42, 0x42, 0x42, 0x41, 0x41,
1220 0x41, 0x40, 0x40, 0x40, 0x3f, 0x3f, 0x3f, 0x3e,
1221 0x3e, 0x3e, 0x3d, 0x3d, 0x3d, 0x3c, 0x3c, 0x3c,
1222 0x3b, 0x3b, 0x3b, 0x3b, 0x3a, 0x3a, 0x3a, 0x39,
1223 0x39, 0x39, 0x39, 0x38, 0x38, 0x38, 0x38, 0x37,
1224 0x37, 0x37, 0x37, 0x36, 0x36, 0x36, 0x36, 0x35,
1225 0x35, 0x35, 0x35, 0x34, 0x34, 0x34, 0x34, 0x34,
1226 0x33, 0x33, 0x33, 0x33, 0x32, 0x32, 0x32, 0x32,
1227 0x32, 0x31, 0x31, 0x31, 0x31, 0x31, 0x30, 0x30,
1228 0x30, 0x30, 0x30, 0x2f, 0x2f, 0x2f, 0x2f, 0x2f
1234 rate *= 11185; /* Scale 48000 to 0x20002380 */
1235 for (i = 31; i > 0; i--) {
1236 if (rate & 0x80000000) { /* Detect leading "1" */
1237 return (((uint32_t) (i - 15) << 20) +
1238 logMagTable[0x7f & (rate >> 24)] +
1239 (0x7f & (rate >> 17)) *
1240 logSlopeTable[0x7f & (rate >> 24)]);
1249 emu_rate_to_linearpitch(uint32_t rate)
1251 rate = (rate << 8) / 375;
1252 return ((rate >> 1) + (rate & 1));
1256 emu_valloc(struct emu_sc_info *sc)
1258 struct emu_voice *v;
1262 lockmgr(&sc->lock, LK_EXCLUSIVE);
1263 for (i = 0; i < NUM_G && sc->voice[i].busy; i++);
1268 lockmgr(&sc->lock, LK_RELEASE);
1273 emu_vfree(struct emu_sc_info *sc, struct emu_voice *v)
1277 lockmgr(&sc->lock, LK_EXCLUSIVE);
1278 for (i = 0; i < NUM_G; i++) {
1279 if (v == &sc->voice[i] && sc->voice[i].busy) {
1282 * XXX What we should do with mono channels?
1283 * See -pcm.c emupchan_init for other side of
1286 if (v->slave != NULL)
1287 r = emu_memfree(&sc->mem, v->vbuf);
1290 lockmgr(&sc->lock, LK_RELEASE);
1294 emu_vinit(struct emu_sc_info *sc, struct emu_voice *m, struct emu_voice *s,
1295 uint32_t sz, struct snd_dbuf *b)
1298 bus_addr_t tmp_addr;
1300 vbuf = emu_memalloc(&sc->mem, sz, &tmp_addr, "vinit");
1302 if(sc->dbg_level > 2)
1303 device_printf(sc->dev, "emu_memalloc returns NULL in enu_vinit\n");
1307 sndbuf_setup(b, vbuf, sz);
1308 m->start = emu_memstart(&sc->mem, vbuf) * EMUPAGESIZE;
1310 if(sc->dbg_level > 2)
1311 device_printf(sc->dev, "emu_memstart returns (-1) in enu_vinit\n");
1312 emu_memfree(&sc->mem, vbuf);
1315 m->end = m->start + sz;
1326 s->start = m->start;
1342 emu_vsetup(struct emu_voice *v, int fmt, int spd)
1345 v->b16 = (fmt & AFMT_16BIT) ? 1 : 0;
1346 v->stereo = (AFMT_CHANNEL(fmt) > 1) ? 1 : 0;
1347 if (v->slave != NULL) {
1348 v->slave->b16 = v->b16;
1349 v->slave->stereo = v->stereo;
1354 if (v->slave != NULL)
1355 v->slave->speed = v->speed;
1360 emu_vroute(struct emu_sc_info *sc, struct emu_route *rt, struct emu_voice *v)
1364 for (i = 0; i < 8; i++) {
1365 v->routing[i] = rt->routing_left[i];
1366 v->amounts[i] = rt->amounts_left[i];
1368 if ((v->stereo) && (v->ismaster == 0))
1369 for (i = 0; i < 8; i++) {
1370 v->routing[i] = rt->routing_right[i];
1371 v->amounts[i] = rt->amounts_right[i];
1374 if ((v->stereo) && (v->slave != NULL))
1375 emu_vroute(sc, rt, v->slave);
1379 emu_vwrite(struct emu_sc_info *sc, struct emu_voice *v)
1382 uint32_t start, val, silent_page;
1384 s = (v->stereo ? 1 : 0) + (v->b16 ? 1 : 0);
1386 v->sa = v->start >> s;
1387 v->ea = v->end >> s;
1391 emu_wrptr(sc, v->vnum, EMU_CHAN_CPF, EMU_CHAN_CPF_STEREO_MASK);
1393 emu_wrptr(sc, v->vnum, EMU_CHAN_CPF, 0);
1395 val = v->stereo ? 28 : 30;
1396 val *= v->b16 ? 1 : 2;
1397 start = v->sa + val;
1399 if (sc->is_emu10k1) {
1400 emu_wrptr(sc, v->vnum, EMU_CHAN_FXRT, ((v->routing[3] << 12) |
1401 (v->routing[2] << 8) |
1402 (v->routing[1] << 4) |
1403 (v->routing[0] << 0)) << 16);
1405 emu_wrptr(sc, v->vnum, EMU_A_CHAN_FXRT1, (v->routing[3] << 24) |
1406 (v->routing[2] << 16) |
1407 (v->routing[1] << 8) |
1408 (v->routing[0] << 0));
1409 emu_wrptr(sc, v->vnum, EMU_A_CHAN_FXRT2, (v->routing[7] << 24) |
1410 (v->routing[6] << 16) |
1411 (v->routing[5] << 8) |
1412 (v->routing[4] << 0));
1413 emu_wrptr(sc, v->vnum, EMU_A_CHAN_SENDAMOUNTS, (v->amounts[7] << 24) |
1414 (v->amounts[6] << 26) |
1415 (v->amounts[5] << 8) |
1416 (v->amounts[4] << 0));
1418 emu_wrptr(sc, v->vnum, EMU_CHAN_PTRX, (v->amounts[0] << 8) | (v->amounts[1] << 0));
1419 emu_wrptr(sc, v->vnum, EMU_CHAN_DSL, v->ea | (v->amounts[3] << 24));
1420 emu_wrptr(sc, v->vnum, EMU_CHAN_PSST, v->sa | (v->amounts[2] << 24));
1422 emu_wrptr(sc, v->vnum, EMU_CHAN_CCCA, start | (v->b16 ? 0 : EMU_CHAN_CCCA_8BITSELECT));
1423 emu_wrptr(sc, v->vnum, EMU_CHAN_Z1, 0);
1424 emu_wrptr(sc, v->vnum, EMU_CHAN_Z2, 0);
1426 silent_page = ((uint32_t) (sc->mem.silent_page_addr) << 1) | EMU_CHAN_MAP_PTI_MASK;
1427 emu_wrptr(sc, v->vnum, EMU_CHAN_MAPA, silent_page);
1428 emu_wrptr(sc, v->vnum, EMU_CHAN_MAPB, silent_page);
1430 emu_wrptr(sc, v->vnum, EMU_CHAN_CVCF, EMU_CHAN_CVCF_CURRFILTER_MASK);
1431 emu_wrptr(sc, v->vnum, EMU_CHAN_VTFT, EMU_CHAN_VTFT_FILTERTARGET_MASK);
1432 emu_wrptr(sc, v->vnum, EMU_CHAN_ATKHLDM, 0);
1433 emu_wrptr(sc, v->vnum, EMU_CHAN_DCYSUSM, EMU_CHAN_DCYSUSM_DECAYTIME_MASK);
1434 emu_wrptr(sc, v->vnum, EMU_CHAN_LFOVAL1, 0x8000);
1435 emu_wrptr(sc, v->vnum, EMU_CHAN_LFOVAL2, 0x8000);
1436 emu_wrptr(sc, v->vnum, EMU_CHAN_FMMOD, 0);
1437 emu_wrptr(sc, v->vnum, EMU_CHAN_TREMFRQ, 0);
1438 emu_wrptr(sc, v->vnum, EMU_CHAN_FM2FRQ2, 0);
1439 emu_wrptr(sc, v->vnum, EMU_CHAN_ENVVAL, 0x8000);
1441 emu_wrptr(sc, v->vnum, EMU_CHAN_ATKHLDV, EMU_CHAN_ATKHLDV_HOLDTIME_MASK | EMU_CHAN_ATKHLDV_ATTACKTIME_MASK);
1442 emu_wrptr(sc, v->vnum, EMU_CHAN_ENVVOL, 0x8000);
1444 emu_wrptr(sc, v->vnum, EMU_CHAN_PEFE_FILTERAMOUNT, 0x7f);
1445 emu_wrptr(sc, v->vnum, EMU_CHAN_PEFE_PITCHAMOUNT, 0);
1446 if ((v->stereo) && (v->slave != NULL))
1447 emu_vwrite(sc, v->slave);
1451 emu_vstop(struct emu_sc_info *sc, char channel, int enable)
1455 reg = (channel & 0x20) ? EMU_SOLEH : EMU_SOLEL;
1458 reg |= channel << 16;
1459 emu_wrptr(sc, 0, reg, enable);
1463 emu_vtrigger(struct emu_sc_info *sc, struct emu_voice *v, int go)
1465 uint32_t pitch_target, initial_pitch;
1466 uint32_t cra, cs, ccis;
1471 cs = v->stereo ? 4 : 2;
1472 ccis = v->stereo ? 28 : 30;
1473 ccis *= v->b16 ? 1 : 2;
1474 sample = v->b16 ? 0x00000000 : 0x80808080;
1475 for (i = 0; i < cs; i++)
1476 emu_wrptr(sc, v->vnum, EMU_CHAN_CD0 + i, sample);
1477 emu_wrptr(sc, v->vnum, EMU_CHAN_CCR_CACHEINVALIDSIZE, 0);
1478 emu_wrptr(sc, v->vnum, EMU_CHAN_CCR_READADDRESS, cra);
1479 emu_wrptr(sc, v->vnum, EMU_CHAN_CCR_CACHEINVALIDSIZE, ccis);
1481 emu_wrptr(sc, v->vnum, EMU_CHAN_IFATN, 0xff00);
1482 emu_wrptr(sc, v->vnum, EMU_CHAN_VTFT, 0xffffffff);
1483 emu_wrptr(sc, v->vnum, EMU_CHAN_CVCF, 0xffffffff);
1484 emu_wrptr(sc, v->vnum, EMU_CHAN_DCYSUSV, 0x00007f7f);
1485 emu_vstop(sc, v->vnum, 0);
1487 pitch_target = emu_rate_to_linearpitch(v->speed);
1488 initial_pitch = emu_rate_to_pitch(v->speed) >> 8;
1489 emu_wrptr(sc, v->vnum, EMU_CHAN_PTRX_PITCHTARGET, pitch_target);
1490 emu_wrptr(sc, v->vnum, EMU_CHAN_CPF_PITCH, pitch_target);
1491 emu_wrptr(sc, v->vnum, EMU_CHAN_IP, initial_pitch);
1493 emu_wrptr(sc, v->vnum, EMU_CHAN_PTRX_PITCHTARGET, 0);
1494 emu_wrptr(sc, v->vnum, EMU_CHAN_CPF_PITCH, 0);
1495 emu_wrptr(sc, v->vnum, EMU_CHAN_IFATN, 0xffff);
1496 emu_wrptr(sc, v->vnum, EMU_CHAN_VTFT, 0x0000ffff);
1497 emu_wrptr(sc, v->vnum, EMU_CHAN_CVCF, 0x0000ffff);
1498 emu_wrptr(sc, v->vnum, EMU_CHAN_IP, 0);
1499 emu_vstop(sc, v->vnum, 1);
1501 if ((v->stereo) && (v->slave != NULL))
1502 emu_vtrigger(sc, v->slave, go);
1506 emu_vpos(struct emu_sc_info *sc, struct emu_voice *v)
1510 s = (v->b16 ? 1 : 0) + (v->stereo ? 1 : 0);
1511 ptr = (emu_rdptr(sc, v->vnum, EMU_CHAN_CCCA_CURRADDR) - (v->start >> s)) << s;
1512 return (ptr & ~0x0000001f);
1518 emu_wrefx(struct emu_sc_info *sc, unsigned int pc, unsigned int data)
1520 emu_wrptr(sc, 0, sc->code_base + pc, data);
1525 emu_addefxop(struct emu_sc_info *sc, unsigned int op, unsigned int z, unsigned int w, unsigned int x, unsigned int y, uint32_t * pc)
1527 if ((*pc) + 1 > sc->code_size) {
1528 device_printf(sc->dev, "DSP CODE OVERRUN: attept to write past code_size (pc=%d)\n", (*pc));
1531 emu_wrefx(sc, (*pc) * 2, (x << sc->high_operand_shift) | y);
1532 emu_wrefx(sc, (*pc) * 2 + 1, (op << sc->opcode_shift) | (z << sc->high_operand_shift) | w);
1537 sysctl_emu_mixer_control(SYSCTL_HANDLER_ARGS)
1539 struct emu_sc_info *sc;
1547 new_vol = emumix_get_volume(sc, mixer_id);
1548 err = sysctl_handle_int(oidp, &new_vol, 0, req);
1550 if (err || req->newptr == NULL)
1552 if (new_vol < 0 || new_vol > 100)
1554 emumix_set_volume(sc, mixer_id, new_vol);
1560 emu_addefxmixer(struct emu_sc_info *sc, const char *mix_name, const int mix_id, uint32_t defvolume)
1563 char sysctl_name[32];
1565 volgpr = emu_rm_gpr_alloc(sc->rm, 1);
1566 emumix_set_fxvol(sc, volgpr, defvolume);
1568 * Mixer controls with NULL mix_name are handled
1569 * by AC97 emulation code or PCM mixer.
1571 if (mix_name != NULL) {
1573 * Temporary sysctls should start with underscore,
1574 * see freebsd-current mailing list, emu10kx driver
1575 * discussion around 2006-05-24.
1577 ksnprintf(sysctl_name, 32, "_%s", mix_name);
1578 SYSCTL_ADD_PROC(sc->ctx,
1579 SYSCTL_CHILDREN(sc->root),
1580 OID_AUTO, sysctl_name,
1581 CTLTYPE_INT | CTLFLAG_RW, sc, mix_id,
1582 sysctl_emu_mixer_control, "I", "");
1589 sysctl_emu_digitalswitch_control(SYSCTL_HANDLER_ARGS)
1591 struct emu_sc_info *sc;
1597 new_val = (sc->mode == MODE_DIGITAL) ? 1 : 0;
1598 err = sysctl_handle_int(oidp, &new_val, 0, req);
1600 if (err || req->newptr == NULL)
1602 if (new_val < 0 || new_val > 1)
1607 emumix_set_mode(sc, MODE_ANALOG);
1610 emumix_set_mode(sc, MODE_DIGITAL);
1617 emu_digitalswitch(struct emu_sc_info *sc)
1619 /* XXX temporary? */
1620 SYSCTL_ADD_PROC(sc->ctx,
1621 SYSCTL_CHILDREN(sc->root),
1622 OID_AUTO, "_digital",
1623 CTLTYPE_INT | CTLFLAG_RW, sc, 0,
1624 sysctl_emu_digitalswitch_control, "I", "Enable digital output");
1630 * Allocate cache GPRs that will hold mixed output channels
1631 * and clear it on every DSP run.
1633 #define EFX_CACHE(CACHE_IDX) do { \
1634 sc->cache_gpr[CACHE_IDX] = emu_rm_gpr_alloc(sc->rm, 1); \
1635 emu_addefxop(sc, ACC3, \
1636 GPR(sc->cache_gpr[CACHE_IDX]), \
1643 /* Allocate GPR for volume control and route sound: OUT = OUT + IN * VOL */
1644 #define EFX_ROUTE(TITLE, INP_NR, IN_GPR_IDX, OUT_CACHE_IDX, DEF) do { \
1645 sc->mixer_gpr[IN_GPR_IDX] = emu_addefxmixer(sc, TITLE, IN_GPR_IDX, DEF); \
1646 sc->mixer_volcache[IN_GPR_IDX] = DEF; \
1647 emu_addefxop(sc, MACS, \
1648 GPR(sc->cache_gpr[OUT_CACHE_IDX]), \
1649 GPR(sc->cache_gpr[OUT_CACHE_IDX]), \
1651 GPR(sc->mixer_gpr[IN_GPR_IDX]), \
1655 /* allocate GPR, OUT = IN * VOL */
1656 #define EFX_OUTPUT(TITLE, OUT_CACHE_IDX, OUT_GPR_IDX, OUTP_NR, DEF) do { \
1657 sc->mixer_gpr[OUT_GPR_IDX] = emu_addefxmixer(sc, TITLE, OUT_GPR_IDX, DEF); \
1658 sc->mixer_volcache[OUT_GPR_IDX] = DEF; \
1659 emu_addefxop(sc, MACS, \
1662 GPR(sc->cache_gpr[OUT_CACHE_IDX]), \
1663 GPR(sc->mixer_gpr[OUT_GPR_IDX]), \
1667 /* like EFX_OUTPUT, but don't allocate mixer gpr */
1668 #define EFX_OUTPUTD(OUT_CACHE_IDX, OUT_GPR_IDX, OUTP_NR) do { \
1669 emu_addefxop(sc, MACS, \
1672 GPR(sc->cache_gpr[OUT_CACHE_IDX]), \
1673 GPR(sc->mixer_gpr[OUT_GPR_IDX]), \
1677 /* skip next OPCOUNT instructions if FLAG != 0 */
1678 #define EFX_SKIP(OPCOUNT, FLAG_GPR) do { \
1679 emu_addefxop(sc, MACS, \
1681 GPR(sc->mute_gpr[FLAG_GPR]), \
1685 emu_addefxop(sc, SKIP, \
1693 #define EFX_COPY(TO, FROM) do { \
1694 emu_addefxop(sc, ACC3, \
1704 emu_initefx(struct emu_sc_info *sc)
1710 if (sc->is_emu10k1) {
1711 emu_wrptr(sc, 0, EMU_DBG, EMU_DBG_SINGLE_STEP);
1713 emu_wrptr(sc, 0, EMU_A_DBG, EMU_A_DBG_SINGLE_STEP);
1716 /* code size is in instructions */
1718 for (i = 0; i < sc->code_size; i++) {
1719 if (sc->is_emu10k1) {
1720 emu_addefxop(sc, ACC3, DSP_CONST(0x0), DSP_CONST(0x0), DSP_CONST(0x0), DSP_CONST(0x0), &pc);
1722 emu_addefxop(sc, SKIP, DSP_CONST(0x0), DSP_CONST(0x0), DSP_CONST(0xf), DSP_CONST(0x0), &pc);
1726 /* allocate GPRs for mute switches (EFX_SKIP). Mute by default */
1727 for (i = 0; i < NUM_MUTE; i++) {
1728 sc->mute_gpr[i] = emu_rm_gpr_alloc(sc->rm, 1);
1729 emumix_set_gpr(sc, sc->mute_gpr[i], 1);
1731 emu_digitalswitch(sc);
1736 * DSP code below is not good, because:
1737 * 1. It can be written smaller, if it can use DSP accumulator register
1738 * instead of cache_gpr[].
1739 * 2. It can be more careful when volume is 100%, because in DSP
1740 * x*0x7fffffff may not be equal to x !
1744 for (i = 0; i < 16 ; i++) {
1745 emu_addefxop(sc, ACC3, OUTP(i), DSP_CONST(0), DSP_CONST(0), DSP_CONST(0), &pc);
1749 if (sc->is_emu10k1) {
1750 EFX_CACHE(C_FRONT_L);
1751 EFX_CACHE(C_FRONT_R);
1755 /* fx0 to front/record, 100%/muted by default */
1756 EFX_ROUTE("pcm_front_l", FX(0), M_FX0_FRONT_L, C_FRONT_L, 100);
1757 EFX_ROUTE("pcm_front_r", FX(1), M_FX1_FRONT_R, C_FRONT_R, 100);
1758 EFX_ROUTE(NULL, FX(0), M_FX0_REC_L, C_REC_L, 0);
1759 EFX_ROUTE(NULL, FX(1), M_FX1_REC_R, C_REC_R, 0);
1761 /* in0, from AC97 codec output */
1762 EFX_ROUTE("ac97_front_l", INP(IN_AC97_L), M_IN0_FRONT_L, C_FRONT_L, 0);
1763 EFX_ROUTE("ac97_front_r", INP(IN_AC97_R), M_IN0_FRONT_R, C_FRONT_R, 0);
1764 EFX_ROUTE("ac97_rec_l", INP(IN_AC97_L), M_IN0_REC_L, C_REC_L, 0);
1765 EFX_ROUTE("ac97_rec_r", INP(IN_AC97_R), M_IN0_REC_R, C_REC_R, 0);
1767 /* in1, from CD S/PDIF */
1768 /* XXX EFX_SKIP 4 assumes that each EFX_ROUTE is one DSP op */
1769 EFX_SKIP(4, CDSPDIFMUTE);
1770 EFX_ROUTE(NULL, INP(IN_SPDIF_CD_L), M_IN1_FRONT_L, C_FRONT_L, 0);
1771 EFX_ROUTE(NULL, INP(IN_SPDIF_CD_R), M_IN1_FRONT_R, C_FRONT_R, 0);
1772 EFX_ROUTE(NULL, INP(IN_SPDIF_CD_L), M_IN1_REC_L, C_REC_L, 0);
1773 EFX_ROUTE(NULL, INP(IN_SPDIF_CD_R), M_IN1_REC_R, C_REC_R, 0);
1775 if (sc->dbg_level > 0) {
1776 /* in2, ZoomVide (???) */
1777 EFX_ROUTE("zoom_front_l", INP(IN_ZOOM_L), M_IN2_FRONT_L, C_FRONT_L, 0);
1778 EFX_ROUTE("zoom_front_r", INP(IN_ZOOM_R), M_IN2_FRONT_R, C_FRONT_R, 0);
1779 EFX_ROUTE("zoom_rec_l", INP(IN_ZOOM_L), M_IN2_REC_L, C_REC_L, 0);
1780 EFX_ROUTE("zoom_rec_r", INP(IN_ZOOM_R), M_IN2_REC_R, C_REC_R, 0);
1784 EFX_ROUTE(NULL, INP(IN_TOSLINK_L), M_IN3_FRONT_L, C_FRONT_L, 0);
1785 EFX_ROUTE(NULL, INP(IN_TOSLINK_R), M_IN3_FRONT_R, C_FRONT_R, 0);
1786 EFX_ROUTE(NULL, INP(IN_TOSLINK_L), M_IN3_REC_L, C_REC_L, 0);
1787 EFX_ROUTE(NULL, INP(IN_TOSLINK_R), M_IN3_REC_R, C_REC_R, 0);
1789 EFX_ROUTE(NULL, INP(IN_LINE1_L), M_IN4_FRONT_L, C_FRONT_L, 0);
1790 EFX_ROUTE(NULL, INP(IN_LINE1_R), M_IN4_FRONT_R, C_FRONT_R, 0);
1791 EFX_ROUTE(NULL, INP(IN_LINE1_L), M_IN4_REC_L, C_REC_L, 0);
1792 EFX_ROUTE(NULL, INP(IN_LINE1_R), M_IN4_REC_R, C_REC_R, 0);
1794 /* in5, on-card S/PDIF */
1795 EFX_ROUTE(NULL, INP(IN_COAX_SPDIF_L), M_IN5_FRONT_L, C_FRONT_L, 0);
1796 EFX_ROUTE(NULL, INP(IN_COAX_SPDIF_R), M_IN5_FRONT_R, C_FRONT_R, 0);
1797 EFX_ROUTE(NULL, INP(IN_COAX_SPDIF_L), M_IN5_REC_L, C_REC_L, 0);
1798 EFX_ROUTE(NULL, INP(IN_COAX_SPDIF_R), M_IN5_REC_R, C_REC_R, 0);
1800 /* in6, Line2 on Live!Drive */
1801 EFX_ROUTE(NULL, INP(IN_LINE2_L), M_IN6_FRONT_L, C_FRONT_L, 0);
1802 EFX_ROUTE(NULL, INP(IN_LINE2_R), M_IN6_FRONT_R, C_FRONT_R, 0);
1803 EFX_ROUTE(NULL, INP(IN_LINE2_L), M_IN6_REC_L, C_REC_L, 0);
1804 EFX_ROUTE(NULL, INP(IN_LINE2_R), M_IN6_REC_R, C_REC_R, 0);
1806 if (sc->dbg_level > 0) {
1808 EFX_ROUTE("in7_front_l", INP(0xE), M_IN7_FRONT_L, C_FRONT_L, 0);
1809 EFX_ROUTE("in7_front_r", INP(0xF), M_IN7_FRONT_R, C_FRONT_R, 0);
1810 EFX_ROUTE("in7_rec_l", INP(0xE), M_IN7_REC_L, C_REC_L, 0);
1811 EFX_ROUTE("in7_rec_r", INP(0xF), M_IN7_REC_R, C_REC_R, 0);
1814 /* analog and digital */
1815 EFX_OUTPUT("master_front_l", C_FRONT_L, M_MASTER_FRONT_L, OUT_AC97_L, 100);
1816 EFX_OUTPUT("master_front_r", C_FRONT_R, M_MASTER_FRONT_R, OUT_AC97_R, 100);
1818 EFX_OUTPUTD(C_FRONT_L, M_MASTER_FRONT_L, OUT_TOSLINK_L);
1819 EFX_OUTPUTD(C_FRONT_R, M_MASTER_FRONT_R, OUT_TOSLINK_R);
1821 EFX_OUTPUTD(C_FRONT_L, M_MASTER_FRONT_L, OUT_HEADPHONE_L);
1822 EFX_OUTPUTD(C_FRONT_R, M_MASTER_FRONT_R, OUT_HEADPHONE_R);
1824 /* rec output to "ADC" */
1825 EFX_OUTPUT("master_rec_l", C_REC_L, M_MASTER_REC_L, OUT_ADC_REC_L, 100);
1826 EFX_OUTPUT("master_rec_r", C_REC_R, M_MASTER_REC_R, OUT_ADC_REC_R, 100);
1828 if (!(sc->mch_disabled)) {
1830 * Additional channel volume is controlled by mixer in
1831 * emu_dspmixer_set() in -pcm.c
1834 /* fx2/3 (pcm1) to rear */
1835 EFX_CACHE(C_REAR_L);
1836 EFX_CACHE(C_REAR_R);
1837 EFX_ROUTE(NULL, FX(2), M_FX2_REAR_L, C_REAR_L, 100);
1838 EFX_ROUTE(NULL, FX(3), M_FX3_REAR_R, C_REAR_R, 100);
1840 EFX_OUTPUT(NULL, C_REAR_L, M_MASTER_REAR_L, OUT_REAR_L, 100);
1841 EFX_OUTPUT(NULL, C_REAR_R, M_MASTER_REAR_R, OUT_REAR_R, 100);
1843 /* fx4 (pcm2) to center */
1844 EFX_CACHE(C_CENTER);
1845 EFX_ROUTE(NULL, FX(4), M_FX4_CENTER, C_CENTER, 100);
1846 EFX_OUTPUT(NULL, C_CENTER, M_MASTER_CENTER, OUT_D_CENTER, 100);
1848 /* XXX in digital mode (default) this should be muted because
1849 this output is shared with digital out */
1850 EFX_SKIP(1, ANALOGMUTE);
1851 EFX_OUTPUTD(C_CENTER, M_MASTER_CENTER, OUT_A_CENTER);
1853 /* fx5 (pcm3) to sub */
1855 EFX_ROUTE(NULL, FX(5), M_FX5_SUBWOOFER, C_SUB, 100);
1856 EFX_OUTPUT(NULL, C_SUB, M_MASTER_SUBWOOFER, OUT_D_SUB, 100);
1858 /* XXX in digital mode (default) this should be muted because
1859 this output is shared with digital out */
1860 EFX_SKIP(1, ANALOGMUTE);
1861 EFX_OUTPUTD(C_SUB, M_MASTER_SUBWOOFER, OUT_A_SUB);
1865 /* SND_EMU10KX_MULTICHANNEL_DISABLED */
1866 EFX_OUTPUT(NULL, C_FRONT_L, M_MASTER_REAR_L, OUT_REAR_L, 57); /* 75%*75% */
1867 EFX_OUTPUT(NULL, C_FRONT_R, M_MASTER_REAR_R, OUT_REAR_R, 57); /* 75%*75% */
1870 /* XXX 5.1 does not work */
1873 /* (fx0+fx1)/2 to center */
1874 EFX_CACHE(C_CENTER);
1875 emu_addefxop(sc, MACS,
1876 GPR(sc->cache_gpr[C_CENTER]),
1877 GPR(sc->cache_gpr[C_CENTER]),
1878 DSP_CONST(0xd), /* = 1/2 */
1879 GPR(sc->cache_gpr[C_FRONT_L]),
1881 emu_addefxop(sc, MACS,
1882 GPR(sc->cache_gpr[C_CENTER]),
1883 GPR(sc->cache_gpr[C_CENTER]),
1884 DSP_CONST(0xd), /* = 1/2 */
1885 GPR(sc->cache_gpr[C_FRONT_R]),
1887 EFX_OUTPUT(NULL, C_CENTER, M_MASTER_CENTER, OUT_D_CENTER, 100);
1889 /* XXX in digital mode (default) this should be muted because
1890 this output is shared with digital out */
1891 EFX_SKIP(1, ANALOGMUTE);
1892 EFX_OUTPUTD(C_CENTER, M_MASTER_CENTER, OUT_A_CENTER);
1894 /* (fx0+fx1)/2 to sub */
1896 emu_addefxop(sc, MACS,
1897 GPR(sc->cache_gpr[C_CENTER]),
1898 GPR(sc->cache_gpr[C_CENTER]),
1899 DSP_CONST(0xd), /* = 1/2 */
1900 GPR(sc->cache_gpr[C_FRONT_L]),
1902 emu_addefxop(sc, MACS,
1903 GPR(sc->cache_gpr[C_CENTER]),
1904 GPR(sc->cache_gpr[C_CENTER]),
1905 DSP_CONST(0xd), /* = 1/2 */
1906 GPR(sc->cache_gpr[C_FRONT_R]),
1908 /* XXX add lowpass filter here */
1910 EFX_OUTPUT(NULL, C_SUB, M_MASTER_SUBWOOFER, OUT_D_SUB, 100);
1912 /* XXX in digital mode (default) this should be muted because
1913 this output is shared with digital out */
1914 EFX_SKIP(1, ANALOGMUTE);
1915 EFX_OUTPUTD(C_SUB, M_MASTER_SUBWOOFER, OUT_A_SUB);
1918 } /* !mch_disabled */
1921 * MCH RECORDING , hight 16 slots. On 5.1 cards first 4 slots
1922 * are used as outputs and already filled with data
1925 * XXX On Live! cards stream does not begin at zero offset.
1926 * It can be HW, driver or sound buffering problem.
1927 * Use sync substream (offset 0x3E) to let userland find
1932 * Substream map (in byte offsets, each substream is 2 bytes):
1933 * 0x00..0x1E - outputs
1934 * 0x20..0x3E - FX, inputs and sync stream
1937 /* First 2 channels (offset 0x20,0x22) are empty */
1938 for(i = (sc->has_51 ? 2 : 0); i < 2; i++)
1939 EFX_COPY(FX2(i), DSP_CONST(0));
1941 /* PCM Playback monitoring, offset 0x24..0x2A */
1942 for(i = 0; i < 4; i++)
1943 EFX_COPY(FX2(i+2), FX(i));
1945 /* Copy of some inputs, offset 0x2C..0x3C */
1946 for(i = 0; i < 9; i++)
1947 EFX_COPY(FX2(i+8), INP(i));
1949 /* sync data (0xc0de, offset 0x3E) */
1950 sc->dummy_gpr = emu_rm_gpr_alloc(sc->rm, 1);
1951 emumix_set_gpr(sc, sc->dummy_gpr, 0xc0de0000);
1953 EFX_COPY(FX2(15), GPR(sc->dummy_gpr));
1955 } else /* emu10k2 and later */ {
1956 EFX_CACHE(C_FRONT_L);
1957 EFX_CACHE(C_FRONT_R);
1961 /* fx0 to front/record, 100%/muted by default */
1963 * FRONT_[L|R] is controlled by AC97 emulation in
1964 * emu_ac97_[read|write]_emulation in -pcm.c
1966 EFX_ROUTE(NULL, FX(0), M_FX0_FRONT_L, C_FRONT_L, 100);
1967 EFX_ROUTE(NULL, FX(1), M_FX1_FRONT_R, C_FRONT_R, 100);
1968 EFX_ROUTE(NULL, FX(0), M_FX0_REC_L, C_REC_L, 0);
1969 EFX_ROUTE(NULL, FX(1), M_FX1_REC_R, C_REC_R, 0);
1971 /* in0, from AC97 codec output */
1972 EFX_ROUTE(NULL, INP(A_IN_AC97_L), M_IN0_FRONT_L, C_FRONT_L, 100);
1973 EFX_ROUTE(NULL, INP(A_IN_AC97_R), M_IN0_FRONT_R, C_FRONT_R, 100);
1974 EFX_ROUTE(NULL, INP(A_IN_AC97_L), M_IN0_REC_L, C_REC_L, 0);
1975 EFX_ROUTE(NULL, INP(A_IN_AC97_R), M_IN0_REC_R, C_REC_R, 0);
1977 /* in1, from CD S/PDIF */
1978 EFX_ROUTE(NULL, INP(A_IN_SPDIF_CD_L), M_IN1_FRONT_L, C_FRONT_L, 0);
1979 EFX_ROUTE(NULL, INP(A_IN_SPDIF_CD_R), M_IN1_FRONT_R, C_FRONT_R, 0);
1980 EFX_ROUTE(NULL, INP(A_IN_SPDIF_CD_L), M_IN1_REC_L, C_REC_L, 0);
1981 EFX_ROUTE(NULL, INP(A_IN_SPDIF_CD_R), M_IN1_REC_R, C_REC_R, 0);
1983 /* in2, optical & coax S/PDIF on AudigyDrive*/
1984 /* XXX Should be muted when GPRSCS valid stream == 0 */
1985 EFX_ROUTE(NULL, INP(A_IN_O_SPDIF_L), M_IN2_FRONT_L, C_FRONT_L, 0);
1986 EFX_ROUTE(NULL, INP(A_IN_O_SPDIF_R), M_IN2_FRONT_R, C_FRONT_R, 0);
1987 EFX_ROUTE(NULL, INP(A_IN_O_SPDIF_L), M_IN2_REC_L, C_REC_L, 0);
1988 EFX_ROUTE(NULL, INP(A_IN_O_SPDIF_R), M_IN2_REC_R, C_REC_R, 0);
1990 if (sc->dbg_level > 0) {
1992 EFX_ROUTE("in3_front_l", INP(0x6), M_IN3_FRONT_L, C_FRONT_L, 0);
1993 EFX_ROUTE("in3_front_r", INP(0x7), M_IN3_FRONT_R, C_FRONT_R, 0);
1994 EFX_ROUTE("in3_rec_l", INP(0x6), M_IN3_REC_L, C_REC_L, 0);
1995 EFX_ROUTE("in3_rec_r", INP(0x7), M_IN3_REC_R, C_REC_R, 0);
1998 /* in4, LineIn 2 on AudigyDrive */
1999 EFX_ROUTE(NULL, INP(A_IN_LINE2_L), M_IN4_FRONT_L, C_FRONT_L, 0);
2000 EFX_ROUTE(NULL, INP(A_IN_LINE2_R), M_IN4_FRONT_R, C_FRONT_R, 0);
2001 EFX_ROUTE(NULL, INP(A_IN_LINE2_L), M_IN4_REC_L, C_REC_L, 0);
2002 EFX_ROUTE(NULL, INP(A_IN_LINE2_R), M_IN4_REC_R, C_REC_R, 0);
2004 /* in5, on-card S/PDIF */
2005 EFX_ROUTE(NULL, INP(A_IN_R_SPDIF_L), M_IN5_FRONT_L, C_FRONT_L, 0);
2006 EFX_ROUTE(NULL, INP(A_IN_R_SPDIF_R), M_IN5_FRONT_R, C_FRONT_R, 0);
2007 EFX_ROUTE(NULL, INP(A_IN_R_SPDIF_L), M_IN5_REC_L, C_REC_L, 0);
2008 EFX_ROUTE(NULL, INP(A_IN_R_SPDIF_R), M_IN5_REC_R, C_REC_R, 0);
2010 /* in6, AUX2 on AudigyDrive */
2011 EFX_ROUTE(NULL, INP(A_IN_AUX2_L), M_IN6_FRONT_L, C_FRONT_L, 0);
2012 EFX_ROUTE(NULL, INP(A_IN_AUX2_R), M_IN6_FRONT_R, C_FRONT_R, 0);
2013 EFX_ROUTE(NULL, INP(A_IN_AUX2_L), M_IN6_REC_L, C_REC_L, 0);
2014 EFX_ROUTE(NULL, INP(A_IN_AUX2_R), M_IN6_REC_R, C_REC_R, 0);
2016 if (sc->dbg_level > 0) {
2018 EFX_ROUTE("in7_front_l", INP(0xE), M_IN7_FRONT_L, C_FRONT_L, 0);
2019 EFX_ROUTE("in7_front_r", INP(0xF), M_IN7_FRONT_R, C_FRONT_R, 0);
2020 EFX_ROUTE("in7_rec_l", INP(0xE), M_IN7_REC_L, C_REC_L, 0);
2021 EFX_ROUTE("in7_rec_r", INP(0xF), M_IN7_REC_R, C_REC_R, 0);
2024 /* front output to headphones and alog and digital *front */
2025 /* volume controlled by AC97 emulation */
2026 EFX_OUTPUT(NULL, C_FRONT_L, M_MASTER_FRONT_L, A_OUT_A_FRONT_L, 100);
2027 EFX_OUTPUT(NULL, C_FRONT_R, M_MASTER_FRONT_R, A_OUT_A_FRONT_R, 100);
2028 EFX_OUTPUTD(C_FRONT_L, M_MASTER_FRONT_L, A_OUT_D_FRONT_L);
2029 EFX_OUTPUTD(C_FRONT_R, M_MASTER_FRONT_R, A_OUT_D_FRONT_R);
2030 EFX_OUTPUTD(C_FRONT_L, M_MASTER_FRONT_L, A_OUT_HPHONE_L);
2031 EFX_OUTPUTD(C_FRONT_R, M_MASTER_FRONT_R, A_OUT_HPHONE_R);
2033 /* rec output to "ADC" */
2034 /* volume controlled by AC97 emulation */
2035 EFX_OUTPUT(NULL, C_REC_L, M_MASTER_REC_L, A_OUT_ADC_REC_L, 100);
2036 EFX_OUTPUT(NULL, C_REC_R, M_MASTER_REC_R, A_OUT_ADC_REC_R, 100);
2038 if (!(sc->mch_disabled)) {
2040 * Additional channel volume is controlled by mixer in
2041 * emu_dspmixer_set() in -pcm.c
2044 /* fx2/3 (pcm1) to rear */
2045 EFX_CACHE(C_REAR_L);
2046 EFX_CACHE(C_REAR_R);
2047 EFX_ROUTE(NULL, FX(2), M_FX2_REAR_L, C_REAR_L, 100);
2048 EFX_ROUTE(NULL, FX(3), M_FX3_REAR_R, C_REAR_R, 100);
2050 EFX_OUTPUT(NULL, C_REAR_L, M_MASTER_REAR_L, A_OUT_A_REAR_L, 100);
2051 EFX_OUTPUT(NULL, C_REAR_R, M_MASTER_REAR_R, A_OUT_A_REAR_R, 100);
2052 EFX_OUTPUTD(C_REAR_L, M_MASTER_REAR_L, A_OUT_D_REAR_L);
2053 EFX_OUTPUTD(C_REAR_R, M_MASTER_REAR_R, A_OUT_D_REAR_R);
2055 /* fx4 (pcm2) to center */
2056 EFX_CACHE(C_CENTER);
2057 EFX_ROUTE(NULL, FX(4), M_FX4_CENTER, C_CENTER, 100);
2058 EFX_OUTPUT(NULL, C_CENTER, M_MASTER_CENTER, A_OUT_D_CENTER, 100);
2061 * XXX in digital mode (default) this should be muted
2062 * because this output is shared with digital out
2064 EFX_OUTPUTD(C_CENTER, M_MASTER_CENTER, A_OUT_A_CENTER);
2066 /* fx5 (pcm3) to sub */
2068 EFX_ROUTE(NULL, FX(5), M_FX5_SUBWOOFER, C_SUB, 100);
2069 EFX_OUTPUT(NULL, C_SUB, M_MASTER_SUBWOOFER, A_OUT_D_SUB, 100);
2072 * XXX in digital mode (default) this should be muted
2073 * because this output is shared with digital out
2075 EFX_OUTPUTD(C_SUB, M_MASTER_SUBWOOFER, A_OUT_A_SUB);
2078 /* XXX this will broke headphones on AudigyDrive */
2079 /* fx6/7 (pcm4) to side */
2080 EFX_CACHE(C_SIDE_L);
2081 EFX_CACHE(C_SIDE_R);
2082 EFX_ROUTE(NULL, FX(6), M_FX6_SIDE_L, C_SIDE_L, 100);
2083 EFX_ROUTE(NULL, FX(7), M_FX7_SIDE_R, C_SIDE_R, 100);
2084 EFX_OUTPUT(NULL, C_SIDE_L, M_MASTER_SIDE_L, A_OUT_A_SIDE_L, 100);
2085 EFX_OUTPUT(NULL, C_SIDE_R, M_MASTER_SIDE_R, A_OUT_A_SIDE_R, 100);
2086 EFX_OUTPUTD(C_SIDE_L, M_MASTER_SIDE_L, A_OUT_D_SIDE_L);
2087 EFX_OUTPUTD(C_SIDE_R, M_MASTER_SIDE_R, A_OUT_D_SIDE_R);
2089 } else { /* mch_disabled */
2090 EFX_OUTPUTD(C_FRONT_L, M_MASTER_FRONT_L, A_OUT_A_REAR_L);
2091 EFX_OUTPUTD(C_FRONT_R, M_MASTER_FRONT_R, A_OUT_A_REAR_R);
2093 EFX_OUTPUTD(C_FRONT_L, M_MASTER_FRONT_L, A_OUT_D_REAR_L);
2094 EFX_OUTPUTD(C_FRONT_R, M_MASTER_FRONT_R, A_OUT_D_REAR_R);
2097 /* (fx0+fx1)/2 to center */
2098 EFX_CACHE(C_CENTER);
2099 emu_addefxop(sc, MACS,
2100 GPR(sc->cache_gpr[C_CENTER]),
2101 GPR(sc->cache_gpr[C_CENTER]),
2102 DSP_CONST(0xd), /* = 1/2 */
2103 GPR(sc->cache_gpr[C_FRONT_L]),
2105 emu_addefxop(sc, MACS,
2106 GPR(sc->cache_gpr[C_CENTER]),
2107 GPR(sc->cache_gpr[C_CENTER]),
2108 DSP_CONST(0xd), /* = 1/2 */
2109 GPR(sc->cache_gpr[C_FRONT_R]),
2111 EFX_OUTPUT(NULL, C_CENTER, M_MASTER_CENTER, A_OUT_D_CENTER, 100);
2113 /* XXX in digital mode (default) this should be muted because
2114 this output is shared with digital out */
2115 EFX_SKIP(1, ANALOGMUTE);
2116 EFX_OUTPUTD(C_CENTER, M_MASTER_CENTER, A_OUT_A_CENTER);
2118 /* (fx0+fx1)/2 to sub */
2120 emu_addefxop(sc, MACS,
2121 GPR(sc->cache_gpr[C_SUB]),
2122 GPR(sc->cache_gpr[C_SUB]),
2123 DSP_CONST(0xd), /* = 1/2 */
2124 GPR(sc->cache_gpr[C_FRONT_L]),
2126 emu_addefxop(sc, MACS,
2127 GPR(sc->cache_gpr[C_SUB]),
2128 GPR(sc->cache_gpr[C_SUB]),
2129 DSP_CONST(0xd), /* = 1/2 */
2130 GPR(sc->cache_gpr[C_FRONT_R]),
2132 /* XXX add lowpass filter here */
2134 EFX_OUTPUT(NULL, C_SUB, M_MASTER_SUBWOOFER, A_OUT_D_SUB, 100);
2136 /* XXX in digital mode (default) this should be muted because
2137 this output is shared with digital out */
2138 EFX_SKIP(1, ANALOGMUTE);
2139 EFX_OUTPUTD(C_SUB, M_MASTER_SUBWOOFER, A_OUT_A_SUB);
2141 } /* mch_disabled */
2143 /* MCH RECORDING, high 32 slots */
2146 * Stream map (in byte offsets):
2147 * 0x00..0x3E - outputs
2148 * 0x40..0x7E - FX, inputs
2149 * each substream is 2 bytes.
2152 * XXX Audigy 2 Value cards (and, possibly,
2153 * Audigy 4) write some unknown data in place of
2154 * some outputs (offsets 0x20..0x3F) and one
2155 * input (offset 0x7E).
2158 /* PCM Playback monitoring, offsets 0x40..0x5E */
2159 for(i = 0; i < 16; i++)
2160 EFX_COPY(FX2(i), FX(i));
2162 /* Copy of all inputs, offsets 0x60..0x7E */
2163 for(i = 0; i < 16; i++)
2164 EFX_COPY(FX2(i+16), INP(i));
2166 /* XXX Audigy seems to work correct and does not need this */
2167 /* sync data (0xc0de), offset 0x7E */
2168 sc->dummy_gpr = emu_rm_gpr_alloc(sc->rm, 1);
2169 emumix_set_gpr(sc, sc->dummy_gpr, 0xc0de0000);
2170 EFX_COPY(FX2(31), GPR(sc->dummy_gpr));
2175 sc->routing_code_end = pc;
2178 if (sc->is_emu10k1) {
2179 emu_wrptr(sc, 0, EMU_DBG, 0);
2181 emu_wrptr(sc, 0, EMU_A_DBG, 0);
2186 static d_open_t emu10kx_open;
2187 static d_close_t emu10kx_close;
2188 static d_read_t emu10kx_read;
2190 static struct dev_ops emu10kx_ops = {
2191 .d_open = emu10kx_open,
2192 .d_close = emu10kx_close,
2193 .d_read = emu10kx_read,
2198 emu10kx_open(struct dev_open_args *ap)
2200 struct cdev *i_dev = ap->a_head.a_dev;
2202 struct emu_sc_info *sc;
2204 sc = i_dev->si_drv1;
2205 lockmgr(&sc->emu10kx_lock, LK_EXCLUSIVE);
2206 if (sc->emu10kx_isopen) {
2207 lockmgr(&sc->emu10kx_lock, LK_RELEASE);
2210 sc->emu10kx_isopen = 1;
2211 lockmgr(&sc->emu10kx_lock, LK_RELEASE);
2212 if (sbuf_new(&sc->emu10kx_sbuf, NULL, 4096, 0) == NULL) {
2216 sc->emu10kx_bufptr = 0;
2217 error = (emu10kx_prepare(sc, &sc->emu10kx_sbuf) > 0) ? 0 : ENOMEM;
2220 lockmgr(&sc->emu10kx_lock, LK_EXCLUSIVE);
2221 sc->emu10kx_isopen = 0;
2222 lockmgr(&sc->emu10kx_lock, LK_RELEASE);
2228 emu10kx_close(struct dev_close_args *ap)
2230 struct cdev *i_dev = ap->a_head.a_dev;
2231 struct emu_sc_info *sc;
2233 sc = i_dev->si_drv1;
2235 lockmgr(&sc->emu10kx_lock, LK_EXCLUSIVE);
2236 if (!(sc->emu10kx_isopen)) {
2237 lockmgr(&sc->emu10kx_lock, LK_RELEASE);
2240 sbuf_delete(&sc->emu10kx_sbuf);
2241 sc->emu10kx_isopen = 0;
2242 lockmgr(&sc->emu10kx_lock, LK_RELEASE);
2248 emu10kx_read(struct dev_read_args *ap)
2250 struct cdev *i_dev = ap->a_head.a_dev;
2251 struct uio *buf = ap->a_uio;
2253 struct emu_sc_info *sc;
2255 sc = i_dev->si_drv1;
2256 lockmgr(&sc->emu10kx_lock, LK_EXCLUSIVE);
2257 if (!(sc->emu10kx_isopen)) {
2258 lockmgr(&sc->emu10kx_lock, LK_RELEASE);
2261 lockmgr(&sc->emu10kx_lock, LK_RELEASE);
2263 l = min(buf->uio_resid, sbuf_len(&sc->emu10kx_sbuf) - sc->emu10kx_bufptr);
2264 err = (l > 0) ? uiomove(sbuf_data(&sc->emu10kx_sbuf) + sc->emu10kx_bufptr, l, buf) : 0;
2265 sc->emu10kx_bufptr += l;
2271 emu10kx_prepare(struct emu_sc_info *sc, struct sbuf *s)
2275 sbuf_printf(s, "FreeBSD EMU10Kx Audio Driver\n");
2276 sbuf_printf(s, "\nHardware resource usage:\n");
2277 sbuf_printf(s, "DSP General Purpose Registers: %d used, %d total\n", sc->rm->num_used, sc->rm->num_gprs);
2278 sbuf_printf(s, "DSP Instruction Registers: %d used, %d total\n", sc->routing_code_end, sc->code_size);
2279 sbuf_printf(s, "Card supports");
2281 sbuf_printf(s, " AC97 codec");
2283 sbuf_printf(s, " NO AC97 codec");
2287 sbuf_printf(s, " and 7.1 output");
2289 sbuf_printf(s, " and 5.1 output");
2292 sbuf_printf(s, ", SBLive! DSP code");
2294 sbuf_printf(s, ", Audigy DSP code");
2296 sbuf_printf(s, ", Audigy DSP code with Audigy2 hacks");
2298 sbuf_printf(s, ", Audigy DSP code with Audigy2Value hacks");
2299 sbuf_printf(s, "\n");
2300 if (sc->broken_digital)
2301 sbuf_printf(s, "Digital mode unsupported\n");
2302 sbuf_printf(s, "\nInstalled devices:\n");
2303 for (i = 0; i < RT_COUNT; i++)
2304 if (sc->pcm[i] != NULL)
2305 if (device_is_attached(sc->pcm[i])) {
2306 sbuf_printf(s, "%s on %s\n", device_get_desc(sc->pcm[i]), device_get_nameunit(sc->pcm[i]));
2308 if (sc->midi[0] != NULL)
2309 if (device_is_attached(sc->midi[0])) {
2310 sbuf_printf(s, "EMU10Kx MIDI Interface\n");
2311 sbuf_printf(s, "\tOn-card connector on %s\n", device_get_nameunit(sc->midi[0]));
2313 if (sc->midi[1] != NULL)
2314 if (device_is_attached(sc->midi[1])) {
2315 sbuf_printf(s, "\tOn-Drive connector on %s\n", device_get_nameunit(sc->midi[1]));
2317 if (sc->midi[0] != NULL)
2318 if (device_is_attached(sc->midi[0])) {
2319 sbuf_printf(s, "\tIR receiver MIDI events %s\n", sc->enable_ir ? "enabled" : "disabled");
2321 sbuf_printf(s, "Card is in %s mode\n", (sc->mode == MODE_ANALOG) ? "analog" : "digital");
2324 return (sbuf_len(s));
2329 emu10kx_dev_init(struct emu_sc_info *sc)
2333 lockinit(&sc->emu10kx_lock, device_get_nameunit(sc->dev), 0,
2335 unit = device_get_unit(sc->dev);
2337 sc->cdev = make_dev(&emu10kx_ops, PCMMKMINOR(unit, 0, 0),
2338 UID_ROOT, GID_WHEEL, 0640, "emu10kx%d", unit);
2339 if (sc->cdev != NULL) {
2340 sc->cdev->si_drv1 = sc;
2347 emu10kx_dev_uninit(struct emu_sc_info *sc)
2349 lockmgr(&sc->emu10kx_lock, LK_EXCLUSIVE);
2350 if (sc->emu10kx_isopen) {
2351 lockmgr(&sc->emu10kx_lock, LK_RELEASE);
2355 destroy_dev(sc->cdev);
2357 lockmgr(&sc->emu10kx_lock, LK_RELEASE);
2359 lockuninit(&sc->emu10kx_lock);
2363 /* resource manager */
2365 emu_rm_init(struct emu_sc_info *sc)
2371 rm = kmalloc(sizeof(struct emu_rm), M_DEVBUF, M_WAITOK | M_ZERO);
2377 maxcount = sc->num_gprs;
2379 lockinit(&(rm->gpr_lock), device_get_nameunit(sc->dev), 0,
2381 rm->num_gprs = (maxcount < EMU_MAX_GPR ? maxcount : EMU_MAX_GPR);
2382 for (i = 0; i < rm->num_gprs; i++)
2383 rm->allocmap[i] = 0;
2384 /* pre-allocate gpr[0] */
2385 rm->allocmap[0] = 1;
2386 rm->last_free_gpr = 1;
2392 emu_rm_uninit(struct emu_sc_info *sc)
2396 if (sc->dbg_level > 1) {
2397 lockmgr(&(sc->rm->gpr_lock), LK_EXCLUSIVE);
2398 for (i = 1; i < sc->rm->last_free_gpr; i++)
2399 if (sc->rm->allocmap[i] > 0)
2400 device_printf(sc->dev, "rm: gpr %d not free before uninit\n", i);
2401 lockmgr(&(sc->rm->gpr_lock), LK_RELEASE);
2404 lockuninit(&(sc->rm->gpr_lock));
2405 kfree(sc->rm, M_DEVBUF);
2410 emu_rm_gpr_alloc(struct emu_rm *rm, int count)
2415 allocated_gpr = rm->num_gprs;
2416 /* try fast way first */
2417 lockmgr(&(rm->gpr_lock), LK_EXCLUSIVE);
2418 if (rm->last_free_gpr + count <= rm->num_gprs) {
2419 allocated_gpr = rm->last_free_gpr;
2420 rm->last_free_gpr += count;
2421 rm->allocmap[allocated_gpr] = count;
2422 for (i = 1; i < count; i++)
2423 rm->allocmap[allocated_gpr + i] = -(count - i);
2427 allocated_gpr = rm->num_gprs;
2428 while (i < rm->last_free_gpr - count) {
2429 if (rm->allocmap[i] > 0) {
2430 i += rm->allocmap[i];
2433 for (j = 1; j < count; j++) {
2434 if (rm->allocmap[i + j] != 0)
2435 allocated_gpr = rm->num_gprs;
2437 if (allocated_gpr == i)
2441 if (allocated_gpr + count < rm->last_free_gpr) {
2442 rm->allocmap[allocated_gpr] = count;
2443 for (i = 1; i < count; i++)
2444 rm->allocmap[allocated_gpr + i] = -(count - i);
2448 if (allocated_gpr == rm->num_gprs)
2449 allocated_gpr = (-1);
2450 if (allocated_gpr >= 0)
2451 rm->num_used += count;
2452 lockmgr(&(rm->gpr_lock), LK_RELEASE);
2453 return (allocated_gpr);
2458 emumix_set_mode(struct emu_sc_info *sc, int mode)
2473 hcfg = EMU_HCFG_AUDIOENABLE | EMU_HCFG_AUTOMUTE;
2477 hcfg |= EMU_HCFG_JOYENABLE;
2480 hcfg |= EMU_HCFG_LOCKTANKCACHE_MASK;
2482 hcfg |= EMU_HCFG_CODECFMT_I2S | EMU_HCFG_JOYENABLE;
2485 if (mode == MODE_DIGITAL) {
2486 if (sc->broken_digital) {
2487 device_printf(sc->dev, "Digital mode is reported as broken on this card.\n");
2489 a_iocfg |= EMU_A_IOCFG_GPOUT1;
2490 hcfg |= EMU_HCFG_GPOUT0;
2493 if (mode == MODE_ANALOG)
2494 emumix_set_spdif_mode(sc, SPDIF_MODE_PCM);
2497 a_iocfg |= 0x80; /* XXX */
2499 if ((sc->is_ca0102) || (sc->is_ca0108))
2501 * Setting EMU_A_IOCFG_DISABLE_ANALOG will do opposite things
2502 * on diffrerent cards.
2503 * "don't disable analog outs" on Audigy 2 (ca0102/ca0108)
2504 * "disable analog outs" on Audigy (emu10k2)
2506 a_iocfg |= EMU_A_IOCFG_DISABLE_ANALOG;
2509 a_iocfg |= 0x20; /* XXX */
2511 /* Mute analog center & subwoofer before mode change */
2512 if (mode == MODE_DIGITAL)
2513 emumix_set_gpr(sc, sc->mute_gpr[ANALOGMUTE], 1);
2515 emu_wr(sc, EMU_HCFG, hcfg, 4);
2517 if ((sc->is_emu10k2) || (sc->is_ca0102) || (sc->is_ca0108)) {
2518 tmp = emu_rd(sc, EMU_A_IOCFG, 2);
2520 emu_wr(sc, EMU_A_IOCFG, tmp, 2);
2523 /* Unmute if we have changed mode to analog. */
2525 if (mode == MODE_ANALOG)
2526 emumix_set_gpr(sc, sc->mute_gpr[ANALOGMUTE], 0);
2532 emumix_set_spdif_mode(struct emu_sc_info *sc, int mode)
2537 case SPDIF_MODE_PCM:
2539 case SPDIF_MODE_AC3:
2540 device_printf(sc->dev, "AC3 mode does not work and disabled\n");
2546 spcs = EMU_SPCS_CLKACCY_1000PPM | EMU_SPCS_SAMPLERATE_48 |
2547 EMU_SPCS_CHANNELNUM_LEFT | EMU_SPCS_SOURCENUM_UNSPEC |
2548 EMU_SPCS_GENERATIONSTATUS | 0x00001200 | 0x00000000 |
2549 EMU_SPCS_EMPHASIS_NONE | EMU_SPCS_COPYRIGHT;
2551 mode = SPDIF_MODE_PCM;
2553 emu_wrptr(sc, 0, EMU_SPCS0, spcs);
2554 emu_wrptr(sc, 0, EMU_SPCS1, spcs);
2555 emu_wrptr(sc, 0, EMU_SPCS2, spcs);
2558 #define L2L_POINTS 10
2560 static int l2l_df[L2L_POINTS] = {
2561 0x572C5CA, /* 100..90 */
2562 0x3211625, /* 90..80 */
2563 0x1CC1A76, /* 80..70 */
2564 0x108428F, /* 70..60 */
2565 0x097C70A, /* 60..50 */
2566 0x0572C5C, /* 50..40 */
2567 0x0321162, /* 40..30 */
2568 0x01CC1A7, /* 30..20 */
2569 0x0108428, /* 20..10 */
2570 0x016493D /* 10..0 */
2573 static int l2l_f[L2L_POINTS] = {
2574 0x4984461A, /* 90 */
2575 0x2A3968A7, /* 80 */
2576 0x18406003, /* 70 */
2577 0x0DEDC66D, /* 60 */
2578 0x07FFFFFF, /* 50 */
2579 0x04984461, /* 40 */
2580 0x02A3968A, /* 30 */
2581 0x01840600, /* 20 */
2582 0x00DEDC66, /* 10 */
2603 idx = (L2L_POINTS - 1) - log_t / (L2L_POINTS);
2604 lin = log_t % (L2L_POINTS);
2605 lin_t = l2l_df[idx] * lin + l2l_f[idx];
2611 emumix_set_fxvol(struct emu_sc_info *sc, unsigned gpr, int32_t vol)
2615 emumix_set_gpr(sc, gpr, vol);
2619 emumix_set_gpr(struct emu_sc_info *sc, unsigned gpr, int32_t val)
2621 if (sc->dbg_level > 1)
2623 device_printf(sc->dev, "Zero gpr write access\n");
2630 emu_wrptr(sc, 0, GPR(gpr), val);
2634 emumix_set_volume(struct emu_sc_info *sc, int mixer_idx, int volume)
2637 RANGE(volume, 0, 100);
2638 if (mixer_idx < NUM_MIXERS) {
2639 sc->mixer_volcache[mixer_idx] = volume;
2640 emumix_set_fxvol(sc, sc->mixer_gpr[mixer_idx], volume);
2645 emumix_get_volume(struct emu_sc_info *sc, int mixer_idx)
2647 if ((mixer_idx < NUM_MIXERS) && (mixer_idx >= 0))
2648 return (sc->mixer_volcache[mixer_idx]);
2652 /* Init CardBus part */
2654 emu_cardbus_init(struct emu_sc_info *sc)
2658 * XXX May not need this if we have EMU_IPR3 handler.
2659 * Is it a real init calls, or EMU_IPR3 interrupt acknowledgments?
2660 * Looks much like "(data << 16) | register".
2662 emu_wr_cbptr(sc, (0x00d0 << 16) | 0x0000);
2663 emu_wr_cbptr(sc, (0x00d0 << 16) | 0x0001);
2664 emu_wr_cbptr(sc, (0x00d0 << 16) | 0x005f);
2665 emu_wr_cbptr(sc, (0x00d0 << 16) | 0x007f);
2667 emu_wr_cbptr(sc, (0x0090 << 16) | 0x007f);
2672 /* Probe and attach the card */
2674 emu_init(struct emu_sc_info *sc)
2682 /* disable audio and lock cache */
2683 emu_wr(sc, EMU_HCFG, EMU_HCFG_LOCKSOUNDCACHE | EMU_HCFG_LOCKTANKCACHE_MASK | EMU_HCFG_MUTEBUTTONENABLE, 4);
2685 /* reset recording buffers */
2686 emu_wrptr(sc, 0, EMU_MICBS, EMU_RECBS_BUFSIZE_NONE);
2687 emu_wrptr(sc, 0, EMU_MICBA, 0);
2688 emu_wrptr(sc, 0, EMU_FXBS, EMU_RECBS_BUFSIZE_NONE);
2689 emu_wrptr(sc, 0, EMU_FXBA, 0);
2690 emu_wrptr(sc, 0, EMU_ADCBS, EMU_RECBS_BUFSIZE_NONE);
2691 emu_wrptr(sc, 0, EMU_ADCBA, 0);
2693 /* disable channel interrupt */
2694 emu_wr(sc, EMU_INTE, EMU_INTE_INTERTIMERENB | EMU_INTE_SAMPLERATER | EMU_INTE_PCIERRENABLE, 4);
2695 emu_wrptr(sc, 0, EMU_CLIEL, 0);
2696 emu_wrptr(sc, 0, EMU_CLIEH, 0);
2697 emu_wrptr(sc, 0, EMU_SOLEL, 0);
2698 emu_wrptr(sc, 0, EMU_SOLEH, 0);
2700 /* disable P16V and S/PDIF interrupts */
2701 if ((sc->is_ca0102) || (sc->is_ca0108))
2702 emu_wr(sc, EMU_INTE2, 0, 4);
2705 emu_wr(sc, EMU_INTE3, 0, 4);
2707 /* init phys inputs and outputs */
2710 ac97slot = EMU_AC97SLOT_CENTER | EMU_AC97SLOT_LFE;
2712 ac97slot = EMU_AC97SLOT_CENTER | EMU_AC97SLOT_LFE | EMU_AC97SLOT_REAR_LEFT | EMU_AC97SLOT_REAR_RIGHT;
2715 emu_wrptr(sc, 0, EMU_AC97SLOT, ac97slot);
2717 if (sc->is_emu10k2) /* XXX for later cards? */
2718 emu_wrptr(sc, 0, EMU_SPBYPASS, 0xf00); /* What will happen if
2719 * we write 1 here? */
2721 if (bus_dma_tag_create( /* parent */ bus_get_dma_tag(sc->dev),
2722 /* alignment */ 2, /* boundary */ 0,
2723 /* lowaddr */ (1U << 31) - 1, /* can only access 0-2gb */
2724 /* highaddr */ BUS_SPACE_MAXADDR,
2725 /* filter */ NULL, /* filterarg */ NULL,
2726 /* maxsize */ EMU_MAX_BUFSZ, /* nsegments */ 1, /* maxsegz */ 0x3ffff,
2728 &(sc->mem.dmat)) != 0) {
2729 device_printf(sc->dev, "unable to create dma tag\n");
2730 bus_dma_tag_destroy(sc->mem.dmat);
2735 SLIST_INIT(&sc->mem.blocks);
2736 sc->mem.ptb_pages = emu_malloc(&sc->mem, EMU_MAXPAGES * sizeof(uint32_t), &sc->mem.ptb_pages_addr, &sc->mem.ptb_map);
2737 if (sc->mem.ptb_pages == NULL)
2740 sc->mem.silent_page = emu_malloc(&sc->mem, EMUPAGESIZE, &sc->mem.silent_page_addr, &sc->mem.silent_map);
2741 if (sc->mem.silent_page == NULL) {
2742 emu_free(&sc->mem, sc->mem.ptb_pages, sc->mem.ptb_map);
2745 /* Clear page with silence & setup all pointers to this page */
2746 bzero(sc->mem.silent_page, EMUPAGESIZE);
2747 tmp = (uint32_t) (sc->mem.silent_page_addr) << 1;
2748 for (i = 0; i < EMU_MAXPAGES; i++)
2749 sc->mem.ptb_pages[i] = tmp | i;
2751 for (ch = 0; ch < NUM_G; ch++) {
2752 emu_wrptr(sc, ch, EMU_CHAN_MAPA, tmp | EMU_CHAN_MAP_PTI_MASK);
2753 emu_wrptr(sc, ch, EMU_CHAN_MAPB, tmp | EMU_CHAN_MAP_PTI_MASK);
2755 emu_wrptr(sc, 0, EMU_PTB, (sc->mem.ptb_pages_addr));
2756 emu_wrptr(sc, 0, EMU_TCB, 0); /* taken from original driver */
2757 emu_wrptr(sc, 0, EMU_TCBS, 0); /* taken from original driver */
2759 /* init envelope engine */
2760 for (ch = 0; ch < NUM_G; ch++) {
2761 emu_wrptr(sc, ch, EMU_CHAN_DCYSUSV, 0);
2762 emu_wrptr(sc, ch, EMU_CHAN_IP, 0);
2763 emu_wrptr(sc, ch, EMU_CHAN_VTFT, 0xffff);
2764 emu_wrptr(sc, ch, EMU_CHAN_CVCF, 0xffff);
2765 emu_wrptr(sc, ch, EMU_CHAN_PTRX, 0);
2766 emu_wrptr(sc, ch, EMU_CHAN_CPF, 0);
2767 emu_wrptr(sc, ch, EMU_CHAN_CCR, 0);
2769 emu_wrptr(sc, ch, EMU_CHAN_PSST, 0);
2770 emu_wrptr(sc, ch, EMU_CHAN_DSL, 0x10);
2771 emu_wrptr(sc, ch, EMU_CHAN_CCCA, 0);
2772 emu_wrptr(sc, ch, EMU_CHAN_Z1, 0);
2773 emu_wrptr(sc, ch, EMU_CHAN_Z2, 0);
2774 emu_wrptr(sc, ch, EMU_CHAN_FXRT, 0xd01c0000);
2776 emu_wrptr(sc, ch, EMU_CHAN_ATKHLDM, 0);
2777 emu_wrptr(sc, ch, EMU_CHAN_DCYSUSM, 0);
2778 emu_wrptr(sc, ch, EMU_CHAN_IFATN, 0xffff);
2779 emu_wrptr(sc, ch, EMU_CHAN_PEFE, 0);
2780 emu_wrptr(sc, ch, EMU_CHAN_FMMOD, 0);
2781 emu_wrptr(sc, ch, EMU_CHAN_TREMFRQ, 24); /* 1 Hz */
2782 emu_wrptr(sc, ch, EMU_CHAN_FM2FRQ2, 24); /* 1 Hz */
2783 emu_wrptr(sc, ch, EMU_CHAN_TEMPENV, 0);
2785 /*** these are last so OFF prevents writing ***/
2786 emu_wrptr(sc, ch, EMU_CHAN_LFOVAL2, 0);
2787 emu_wrptr(sc, ch, EMU_CHAN_LFOVAL1, 0);
2788 emu_wrptr(sc, ch, EMU_CHAN_ATKHLDV, 0);
2789 emu_wrptr(sc, ch, EMU_CHAN_ENVVOL, 0);
2790 emu_wrptr(sc, ch, EMU_CHAN_ENVVAL, 0);
2792 if ((sc->is_emu10k2) || (sc->is_ca0102) || (sc->is_ca0108)) {
2793 emu_wrptr(sc, ch, 0x4c, 0x0);
2794 emu_wrptr(sc, ch, 0x4d, 0x0);
2795 emu_wrptr(sc, ch, 0x4e, 0x0);
2796 emu_wrptr(sc, ch, 0x4f, 0x0);
2797 emu_wrptr(sc, ch, EMU_A_CHAN_FXRT1, 0x3f3f3f3f);
2798 emu_wrptr(sc, ch, EMU_A_CHAN_FXRT2, 0x3f3f3f3f);
2799 emu_wrptr(sc, ch, EMU_A_CHAN_SENDAMOUNTS, 0x0);
2803 emumix_set_spdif_mode(sc, SPDIF_MODE_PCM);
2805 if ((sc->is_emu10k2) || (sc->is_ca0102) || (sc->is_ca0108))
2806 emu_wrptr(sc, 0, EMU_A_SPDIF_SAMPLERATE, EMU_A_SPDIF_48000);
2809 * CAxxxx cards needs additional setup:
2810 * 1. Set I2S capture sample rate to 96000
2811 * 2. Disable P16v / P17v proceesing
2812 * 3. Allow EMU10K DSP inputs
2814 if ((sc->is_ca0102) || (sc->is_ca0108)) {
2816 spdif_sr = emu_rdptr(sc, 0, EMU_A_SPDIF_SAMPLERATE);
2817 spdif_sr &= 0xfffff1ff;
2818 spdif_sr |= EMU_A_I2S_CAPTURE_96000;
2819 emu_wrptr(sc, 0, EMU_A_SPDIF_SAMPLERATE, spdif_sr);
2821 /* Disable P16v processing */
2822 emu_wr_p16vptr(sc, 0, EMU_A2_SRCSel, 0x14);
2824 /* Setup P16v/P17v sound routing */
2826 emu_wr_p16vptr(sc, 0, EMU_A2_SRCMULTI_ENABLE, 0xFF00FF00);
2828 emu_wr_p16vptr(sc, 0, EMU_A2_MIXER_I2S_ENABLE, 0xFF000000);
2829 emu_wr_p16vptr(sc, 0, EMU_A2_MIXER_SPDIF_ENABLE, 0xFF000000);
2831 tmp = emu_rd(sc, EMU_A_IOCFG, 2);
2832 emu_wr(sc, EMU_A_IOCFG, tmp & ~0x8, 2);
2837 def_mode = MODE_ANALOG;
2838 if ((sc->is_emu10k2) || (sc->is_ca0102) || (sc->is_ca0108))
2839 def_mode = MODE_DIGITAL;
2840 if (((sc->is_emu10k2) || (sc->is_ca0102) || (sc->is_ca0108)) && (sc->broken_digital)) {
2841 device_printf(sc->dev, "Audigy card initialized in analog mode.\n");
2842 def_mode = MODE_ANALOG;
2844 emumix_set_mode(sc, def_mode);
2847 tmp = emu_rd(sc, EMU_HCFG, 4);
2848 device_printf(sc->dev, "Card Configuration ( 0x%08x )\n", tmp);
2849 device_printf(sc->dev, "Card Configuration ( & 0xff000000 ) : %s%s%s%s%s%s%s%s\n",
2850 (tmp & 0x80000000 ? "[Legacy MPIC] " : ""),
2851 (tmp & 0x40000000 ? "[0x40] " : ""),
2852 (tmp & 0x20000000 ? "[0x20] " : ""),
2853 (tmp & 0x10000000 ? "[0x10] " : ""),
2854 (tmp & 0x08000000 ? "[0x08] " : ""),
2855 (tmp & 0x04000000 ? "[0x04] " : ""),
2856 (tmp & 0x02000000 ? "[0x02] " : ""),
2857 (tmp & 0x01000000 ? "[0x01]" : " "));
2858 device_printf(sc->dev, "Card Configuration ( & 0x00ff0000 ) : %s%s%s%s%s%s%s%s\n",
2859 (tmp & 0x00800000 ? "[0x80] " : ""),
2860 (tmp & 0x00400000 ? "[0x40] " : ""),
2861 (tmp & 0x00200000 ? "[Legacy INT] " : ""),
2862 (tmp & 0x00100000 ? "[0x10] " : ""),
2863 (tmp & 0x00080000 ? "[0x08] " : ""),
2864 (tmp & 0x00040000 ? "[Codec4] " : ""),
2865 (tmp & 0x00020000 ? "[Codec2] " : ""),
2866 (tmp & 0x00010000 ? "[I2S Codec]" : " "));
2867 device_printf(sc->dev, "Card Configuration ( & 0x0000ff00 ) : %s%s%s%s%s%s%s%s\n",
2868 (tmp & 0x00008000 ? "[0x80] " : ""),
2869 (tmp & 0x00004000 ? "[GPINPUT0] " : ""),
2870 (tmp & 0x00002000 ? "[GPINPUT1] " : ""),
2871 (tmp & 0x00001000 ? "[GPOUT0] " : ""),
2872 (tmp & 0x00000800 ? "[GPOUT1] " : ""),
2873 (tmp & 0x00000400 ? "[GPOUT2] " : ""),
2874 (tmp & 0x00000200 ? "[Joystick] " : ""),
2875 (tmp & 0x00000100 ? "[0x01]" : " "));
2876 device_printf(sc->dev, "Card Configuration ( & 0x000000ff ) : %s%s%s%s%s%s%s%s\n",
2877 (tmp & 0x00000080 ? "[0x80] " : ""),
2878 (tmp & 0x00000040 ? "[0x40] " : ""),
2879 (tmp & 0x00000020 ? "[0x20] " : ""),
2880 (tmp & 0x00000010 ? "[AUTOMUTE] " : ""),
2881 (tmp & 0x00000008 ? "[LOCKSOUNDCACHE] " : ""),
2882 (tmp & 0x00000004 ? "[LOCKTANKCACHE] " : ""),
2883 (tmp & 0x00000002 ? "[MUTEBUTTONENABLE] " : ""),
2884 (tmp & 0x00000001 ? "[AUDIOENABLE]" : " "));
2886 if ((sc->is_emu10k2) || (sc->is_ca0102) || (sc->is_ca0108)) {
2887 tmp = emu_rd(sc, EMU_A_IOCFG, 2);
2888 device_printf(sc->dev, "Audigy Card Configuration ( 0x%04x )\n", tmp);
2889 device_printf(sc->dev, "Audigy Card Configuration ( & 0xff00 )");
2890 kprintf(" : %s%s%s%s%s%s%s%s\n",
2891 (tmp & 0x8000 ? "[Rear Speakers] " : ""),
2892 (tmp & 0x4000 ? "[Front Speakers] " : ""),
2893 (tmp & 0x2000 ? "[0x20] " : ""),
2894 (tmp & 0x1000 ? "[0x10] " : ""),
2895 (tmp & 0x0800 ? "[0x08] " : ""),
2896 (tmp & 0x0400 ? "[0x04] " : ""),
2897 (tmp & 0x0200 ? "[0x02] " : ""),
2898 (tmp & 0x0100 ? "[AudigyDrive Phones]" : " "));
2899 device_printf(sc->dev, "Audigy Card Configuration ( & 0x00ff )");
2900 kprintf(" : %s%s%s%s%s%s%s%s\n",
2901 (tmp & 0x0080 ? "[0x80] " : ""),
2902 (tmp & 0x0040 ? "[Mute AnalogOut] " : ""),
2903 (tmp & 0x0020 ? "[0x20] " : ""),
2904 (tmp & 0x0010 ? "[0x10] " : ""),
2905 (tmp & 0x0008 ? "[0x08] " : ""),
2906 (tmp & 0x0004 ? "[GPOUT0] " : ""),
2907 (tmp & 0x0002 ? "[GPOUT1] " : ""),
2908 (tmp & 0x0001 ? "[GPOUT2]" : " "));
2909 } /* is_emu10k2 or ca* */
2915 emu_uninit(struct emu_sc_info *sc)
2918 struct emu_memblk *blk;
2920 emu_wr(sc, EMU_INTE, 0, 4);
2921 for (ch = 0; ch < NUM_G; ch++)
2922 emu_wrptr(sc, ch, EMU_CHAN_DCYSUSV, 0);
2923 for (ch = 0; ch < NUM_G; ch++) {
2924 emu_wrptr(sc, ch, EMU_CHAN_VTFT, 0);
2925 emu_wrptr(sc, ch, EMU_CHAN_CVCF, 0);
2926 emu_wrptr(sc, ch, EMU_CHAN_PTRX, 0);
2927 emu_wrptr(sc, ch, EMU_CHAN_CPF, 0);
2930 /* disable audio and lock cache */
2931 emu_wr(sc, EMU_HCFG, EMU_HCFG_LOCKSOUNDCACHE | EMU_HCFG_LOCKTANKCACHE_MASK | EMU_HCFG_MUTEBUTTONENABLE, 4);
2933 emu_wrptr(sc, 0, EMU_PTB, 0);
2934 /* reset recording buffers */
2935 emu_wrptr(sc, 0, EMU_MICBS, EMU_RECBS_BUFSIZE_NONE);
2936 emu_wrptr(sc, 0, EMU_MICBA, 0);
2937 emu_wrptr(sc, 0, EMU_FXBS, EMU_RECBS_BUFSIZE_NONE);
2938 emu_wrptr(sc, 0, EMU_FXBA, 0);
2939 emu_wrptr(sc, 0, EMU_FXWC, 0);
2940 emu_wrptr(sc, 0, EMU_ADCBS, EMU_RECBS_BUFSIZE_NONE);
2941 emu_wrptr(sc, 0, EMU_ADCBA, 0);
2942 emu_wrptr(sc, 0, EMU_TCB, 0);
2943 emu_wrptr(sc, 0, EMU_TCBS, 0);
2945 /* disable channel interrupt */
2946 emu_wrptr(sc, 0, EMU_CLIEL, 0);
2947 emu_wrptr(sc, 0, EMU_CLIEH, 0);
2948 emu_wrptr(sc, 0, EMU_SOLEL, 0);
2949 emu_wrptr(sc, 0, EMU_SOLEH, 0);
2951 if (!SLIST_EMPTY(&sc->mem.blocks))
2952 device_printf(sc->dev, "warning: memblock list not empty\n");
2954 SLIST_FOREACH(blk, &sc->mem.blocks, link)
2956 device_printf(sc->dev, "lost %d for %s\n", blk->pte_size, blk->owner);
2958 emu_free(&sc->mem, sc->mem.ptb_pages, sc->mem.ptb_map);
2959 emu_free(&sc->mem, sc->mem.silent_page, sc->mem.silent_map);
2965 emu_read_ivar(device_t bus, device_t dev, int ivar_index, uintptr_t * result)
2967 struct sndcard_func *func = device_get_ivars(dev);
2968 struct emu_sc_info *sc = device_get_softc(bus);
2975 switch (ivar_index) {
2977 *result = func->func;
2980 if (func->varinfo == NULL)
2982 *result = ((struct emu_pcminfo *)func->varinfo)->route;
2984 case EMU_VAR_ISEMU10K1:
2985 *result = sc->is_emu10k1;
2987 case EMU_VAR_MCH_DISABLED:
2988 *result = sc->mch_disabled;
2990 case EMU_VAR_MCH_REC:
2991 *result = sc->mch_rec;
3001 emu_write_ivar(device_t bus __unused, device_t dev __unused,
3002 int ivar_index, uintptr_t value __unused)
3005 switch (ivar_index) {
3015 emu_pci_probe(device_t dev)
3018 unsigned int thiscard = 0;
3021 vendor = pci_read_config(dev, PCIR_DEVVENDOR, /* bytes */ 2);
3022 if (vendor != 0x1102)
3023 return (ENXIO); /* Not Creative */
3025 thiscard = emu_getcard(dev);
3029 s = sbuf_new(NULL, NULL, 4096, 0);
3032 sbuf_printf(s, "Creative %s [%s]", emu_cards[thiscard].desc, emu_cards[thiscard].SBcode);
3035 device_set_desc_copy(dev, sbuf_data(s));
3039 return (BUS_PROBE_DEFAULT);
3044 emu_pci_attach(device_t dev)
3046 struct sndcard_func *func;
3047 struct emu_sc_info *sc;
3048 struct emu_pcminfo *pcminfo;
3050 struct emu_midiinfo *midiinfo;
3058 sc = device_get_softc(dev);
3059 unit = device_get_unit(dev);
3061 /* Get configuration */
3063 sc->ctx = device_get_sysctl_ctx(dev);
3064 if (sc->ctx == NULL)
3066 sc->root = device_get_sysctl_tree(dev);
3067 if (sc->root == NULL)
3070 if (resource_int_value("emu10kx", unit, "multichannel_disabled", &(sc->mch_disabled)))
3071 RANGE(sc->mch_disabled, 0, 1);
3072 SYSCTL_ADD_INT(device_get_sysctl_ctx(dev),
3073 SYSCTL_CHILDREN(device_get_sysctl_tree(dev)),
3074 OID_AUTO, "multichannel_disabled", CTLFLAG_RD, &(sc->mch_disabled), 0, "Multichannel playback setting");
3076 if (resource_int_value("emu10kx", unit, "multichannel_recording", &(sc->mch_rec)))
3077 RANGE(sc->mch_rec, 0, 1);
3078 SYSCTL_ADD_INT(device_get_sysctl_ctx(dev),
3079 SYSCTL_CHILDREN(device_get_sysctl_tree(dev)),
3080 OID_AUTO, "multichannel_recording", CTLFLAG_RD, &(sc->mch_rec), 0, "Multichannel recording setting");
3082 if (resource_int_value("emu10kx", unit, "debug", &(sc->dbg_level)))
3083 RANGE(sc->mch_rec, 0, 2);
3084 SYSCTL_ADD_INT(device_get_sysctl_ctx(dev),
3085 SYSCTL_CHILDREN(device_get_sysctl_tree(dev)),
3086 OID_AUTO, "debug", CTLFLAG_RW, &(sc->dbg_level), 0, "Debug level");
3088 /* Fill in the softc. */
3089 lockinit(&sc->lock, device_get_nameunit(dev), 0, LK_CANRECURSE);
3090 lockinit(&sc->rw, device_get_nameunit(dev), 0, LK_CANRECURSE);
3092 sc->type = pci_get_devid(dev);
3093 sc->rev = pci_get_revid(dev);
3098 sc->broken_digital = 0;
3105 device_flags = emu_cards[emu_getcard(dev)].flags;
3106 if (device_flags & HAS_51)
3108 if (device_flags & HAS_71) {
3112 if (device_flags & IS_EMU10K1)
3114 if (device_flags & IS_EMU10K2)
3116 if (device_flags & IS_CA0102)
3118 if (device_flags & IS_CA0108)
3120 if ((sc->is_emu10k2) && (sc->rev == 4)) {
3122 sc->is_ca0102 = 1; /* for unknown Audigy 2 cards */
3124 if ((sc->is_ca0102 == 1) || (sc->is_ca0108 == 1))
3125 if (device_flags & IS_CARDBUS)
3128 if ((sc->is_emu10k1 + sc->is_emu10k2 + sc->is_ca0102 + sc->is_ca0108) != 1) {
3129 device_printf(sc->dev, "Unable to detect HW chipset\n");
3132 if (device_flags & BROKEN_DIGITAL)
3133 sc->broken_digital = 1;
3134 if (device_flags & HAS_AC97)
3137 sc->opcode_shift = 0;
3138 if ((sc->is_emu10k2) || (sc->is_ca0102) || (sc->is_ca0108)) {
3139 sc->opcode_shift = 24;
3140 sc->high_operand_shift = 12;
3143 /* sc->fx_base = 0x0 */
3144 sc->input_base = 0x40;
3145 /* sc->p16vinput_base = 0x50; */
3146 sc->output_base = 0x60;
3147 sc->efxc_base = 0x80;
3148 /* sc->output32h_base = 0xa0; */
3149 /* sc->output32l_base = 0xb0; */
3150 sc->dsp_zero = 0xc0;
3151 /* 0xe0...0x100 are unknown */
3152 /* sc->tram_base = 0x200 */
3153 /* sc->tram_addr_base = 0x300 */
3154 sc->gpr_base = EMU_A_FXGPREGBASE;
3155 sc->num_gprs = 0x200;
3156 sc->code_base = EMU_A_MICROCODEBASE;
3157 sc->code_size = 0x800 / 2; /* 0x600-0xdff, 2048 words,
3158 * 1024 instructions */
3160 sc->mchannel_fx = 8;
3161 sc->num_fxbuses = 16;
3163 sc->num_outputs = 16;
3164 sc->address_mask = EMU_A_PTR_ADDR_MASK;
3166 if (sc->is_emu10k1) {
3167 sc->has_51 = 0; /* We don't support 5.1 sound on SB Live! 5.1 */
3168 sc->opcode_shift = 20;
3169 sc->high_operand_shift = 10;
3170 sc->code_base = EMU_MICROCODEBASE;
3171 sc->code_size = 0x400 / 2; /* 0x400-0x7ff, 1024 words,
3172 * 512 instructions */
3173 sc->gpr_base = EMU_FXGPREGBASE;
3174 sc->num_gprs = 0x100;
3175 sc->input_base = 0x10;
3176 sc->output_base = 0x20;
3178 * XXX 5.1 Analog outputs are inside efxc address space!
3179 * They use output+0x11/+0x12 (=efxc+1/+2).
3180 * Don't use this efx registers for recording on SB Live! 5.1!
3182 sc->efxc_base = 0x30;
3183 sc->dsp_zero = 0x40;
3184 sc->mchannel_fx = 0;
3185 sc->num_fxbuses = 8;
3187 sc->num_outputs = 16;
3188 sc->address_mask = EMU_PTR_ADDR_MASK;
3190 if (sc->opcode_shift == 0)
3193 pci_enable_busmaster(dev);
3196 sc->reg = bus_alloc_resource_any(dev, SYS_RES_IOPORT, &i, RF_ACTIVE);
3197 if (sc->reg == NULL) {
3198 device_printf(dev, "unable to map register space\n");
3201 sc->st = rman_get_bustag(sc->reg);
3202 sc->sh = rman_get_bushandle(sc->reg);
3204 for (i = 0; i < EMU_MAX_IRQ_CONSUMERS; i++)
3205 sc->timer[i] = 0; /* disable it */
3208 sc->irq = bus_alloc_resource_any(dev, SYS_RES_IRQ, &i, RF_ACTIVE | RF_SHAREABLE);
3209 if ((sc->irq == NULL) || bus_setup_intr(dev, sc->irq, INTR_MPSAFE,
3210 emu_intr, sc, &sc->ih, NULL)) {
3211 device_printf(dev, "unable to map interrupt\n");
3214 if (emu_rm_init(sc) != 0) {
3215 device_printf(dev, "unable to create resource manager\n");
3219 if (emu_cardbus_init(sc) != 0) {
3220 device_printf(dev, "unable to initialize CardBus interface\n");
3223 if (emu_init(sc) != 0) {
3224 device_printf(dev, "unable to initialize the card\n");
3227 if (emu10kx_dev_init(sc) != 0) {
3228 device_printf(dev, "unable to create control device\n");
3231 ksnprintf(status, 255, "rev %d at io 0x%lx irq %ld", sc->rev, rman_get_start(sc->reg), rman_get_start(sc->irq));
3234 for (i = 0; i < NUM_G; i++) {
3235 sc->voice[i].vnum = i;
3236 sc->voice[i].slave = NULL;
3237 sc->voice[i].busy = 0;
3238 sc->voice[i].ismaster = 0;
3239 sc->voice[i].running = 0;
3240 sc->voice[i].b16 = 0;
3241 sc->voice[i].stereo = 0;
3242 sc->voice[i].speed = 0;
3243 sc->voice[i].start = 0;
3244 sc->voice[i].end = 0;
3248 for (i = 0; i < RT_COUNT; i++)
3252 func = kmalloc(sizeof(struct sndcard_func), M_DEVBUF,
3258 pcminfo = kmalloc(sizeof(struct emu_pcminfo), M_DEVBUF,
3260 if (pcminfo == NULL) {
3265 pcminfo->route = RT_FRONT;
3267 func->func = SCF_PCM;
3268 func->varinfo = pcminfo;
3269 sc->pcm[RT_FRONT] = device_add_child(dev, "pcm", -1);
3270 device_set_ivars(sc->pcm[RT_FRONT], func);
3272 if (!(sc->mch_disabled)) {
3274 func = kmalloc(sizeof(struct sndcard_func), M_DEVBUF,
3280 pcminfo = kmalloc(sizeof(struct emu_pcminfo), M_DEVBUF,
3282 if (pcminfo == NULL) {
3287 pcminfo->route = RT_REAR;
3289 func->func = SCF_PCM;
3290 func->varinfo = pcminfo;
3291 sc->pcm[RT_REAR] = device_add_child(dev, "pcm", -1);
3292 device_set_ivars(sc->pcm[RT_REAR], func);
3295 func = kmalloc(sizeof(struct sndcard_func), M_DEVBUF,
3301 pcminfo = kmalloc(sizeof(struct emu_pcminfo),
3302 M_DEVBUF, M_WAITOK | M_ZERO);
3303 if (pcminfo == NULL) {
3308 pcminfo->route = RT_CENTER;
3310 func->func = SCF_PCM;
3311 func->varinfo = pcminfo;
3312 sc->pcm[RT_CENTER] = device_add_child(dev, "pcm", -1);
3313 device_set_ivars(sc->pcm[RT_CENTER], func);
3315 func = kmalloc(sizeof(struct sndcard_func), M_DEVBUF,
3321 pcminfo = kmalloc(sizeof(struct emu_pcminfo),
3322 M_DEVBUF, M_WAITOK | M_ZERO);
3323 if (pcminfo == NULL) {
3328 pcminfo->route = RT_SUB;
3330 func->func = SCF_PCM;
3331 func->varinfo = pcminfo;
3332 sc->pcm[RT_SUB] = device_add_child(dev, "pcm", -1);
3333 device_set_ivars(sc->pcm[RT_SUB], func);
3337 func = kmalloc(sizeof(struct sndcard_func), M_DEVBUF,
3343 pcminfo = kmalloc(sizeof(struct emu_pcminfo),
3344 M_DEVBUF, M_WAITOK | M_ZERO);
3345 if (pcminfo == NULL) {
3350 pcminfo->route = RT_SIDE;
3352 func->func = SCF_PCM;
3353 func->varinfo = pcminfo;
3354 sc->pcm[RT_SIDE] = device_add_child(dev, "pcm", -1);
3355 device_set_ivars(sc->pcm[RT_SIDE], func);
3357 } /* mch_disabled */
3360 func = kmalloc(sizeof(struct sndcard_func), M_DEVBUF,
3366 pcminfo = kmalloc(sizeof(struct emu_pcminfo), M_DEVBUF,
3368 if (pcminfo == NULL) {
3373 pcminfo->route = RT_MCHRECORD;
3375 func->func = SCF_PCM;
3376 func->varinfo = pcminfo;
3377 sc->pcm[RT_MCHRECORD] = device_add_child(dev, "pcm", -1);
3378 device_set_ivars(sc->pcm[RT_MCHRECORD], func);
3381 for (i = 0; i < 2; i++)
3384 /* MIDI has some memory mangament and (possible) locking problems */
3386 /* Midi Interface 1: Live!, Audigy, Audigy 2 */
3387 if ((sc->is_emu10k1) || (sc->is_emu10k2) || (sc->is_ca0102)) {
3388 func = malloc(sizeof(struct sndcard_func), M_DEVBUF, M_WAITOK | M_ZERO);
3393 midiinfo = malloc(sizeof(struct emu_midiinfo), M_DEVBUF, M_WAITOK | M_ZERO);
3394 if (midiinfo == NULL) {
3398 midiinfo->card = sc;
3399 if (sc->is_emu10k2 || (sc->is_ca0102)) {
3400 midiinfo->port = EMU_A_MUDATA1;
3401 midiinfo->portnr = 1;
3403 if (sc->is_emu10k1) {
3404 midiinfo->port = MUDATA;
3405 midiinfo->portnr = 1;
3407 func->func = SCF_MIDI;
3408 func->varinfo = midiinfo;
3409 sc->midi[0] = device_add_child(dev, "midi", -1);
3410 device_set_ivars(sc->midi[0], func);
3412 /* Midi Interface 2: Audigy, Audigy 2 (on AudigyDrive) */
3413 if (sc->is_emu10k2 || (sc->is_ca0102)) {
3414 func = malloc(sizeof(struct sndcard_func), M_DEVBUF, M_WAITOK | M_ZERO);
3419 midiinfo = malloc(sizeof(struct emu_midiinfo), M_DEVBUF, M_WAITOK | M_ZERO);
3420 if (midiinfo == NULL) {
3424 midiinfo->card = sc;
3426 midiinfo->port = EMU_A_MUDATA2;
3427 midiinfo->portnr = 2;
3429 func->func = SCF_MIDI;
3430 func->varinfo = midiinfo;
3431 sc->midi[1] = device_add_child(dev, "midi", -1);
3432 device_set_ivars(sc->midi[1], func);
3435 return (bus_generic_attach(dev));
3438 /* XXX can we just call emu_pci_detach here? */
3440 emu10kx_dev_uninit(sc);
3444 bus_release_resource(dev, SYS_RES_IOPORT, PCIR_BAR(0), sc->reg);
3446 bus_teardown_intr(dev, sc->irq, sc->ih);
3448 bus_release_resource(dev, SYS_RES_IRQ, 0, sc->irq);
3449 lockuninit(&sc->rw);
3450 lockuninit(&sc->lock);
3455 emu_pci_detach(device_t dev)
3457 struct emu_sc_info *sc;
3458 struct sndcard_func *func;
3460 device_t *childlist;
3463 sc = device_get_softc(dev);
3465 for (i = 0; i < RT_COUNT; i++) {
3466 if (sc->pcm[i] != NULL) {
3467 func = device_get_ivars(sc->pcm[i]);
3468 if (func != NULL && func->func == SCF_PCM) {
3469 device_set_ivars(sc->pcm[i], NULL);
3470 kfree(func->varinfo, M_DEVBUF);
3471 kfree(func, M_DEVBUF);
3473 r = device_delete_child(dev, sc->pcm[i]);
3478 if (sc->midi[0] != NULL) {
3479 func = device_get_ivars(sc->midi[0]);
3480 if (func != NULL && func->func == SCF_MIDI) {
3481 device_set_ivars(sc->midi[0], NULL);
3482 kfree(func->varinfo, M_DEVBUF);
3483 kfree(func, M_DEVBUF);
3485 r = device_delete_child(dev, sc->midi[0]);
3489 if (sc->midi[1] != NULL) {
3490 func = device_get_ivars(sc->midi[1]);
3491 if (func != NULL && func->func == SCF_MIDI) {
3492 device_set_ivars(sc->midi[1], NULL);
3493 kfree(func->varinfo, M_DEVBUF);
3494 kfree(func, M_DEVBUF);
3496 r = device_delete_child(dev, sc->midi[1]);
3500 if (device_get_children(dev, &childlist, &devcount) == 0)
3501 for (i = 0; i < devcount - 1; i++) {
3502 device_printf(dev, "removing stale child %d (unit %d)\n", i, device_get_unit(childlist[i]));
3503 func = device_get_ivars(childlist[i]);
3504 if (func != NULL && (func->func == SCF_MIDI || func->func == SCF_PCM)) {
3505 device_set_ivars(childlist[i], NULL);
3506 kfree(func->varinfo, M_DEVBUF);
3507 kfree(func, M_DEVBUF);
3509 device_delete_child(dev, childlist[i]);
3511 if (childlist != NULL)
3512 kfree(childlist, M_TEMP);
3514 r = emu10kx_dev_uninit(sc);
3523 bus_dma_tag_destroy(sc->mem.dmat);
3526 bus_release_resource(dev, SYS_RES_IOPORT, PCIR_BAR(0), sc->reg);
3527 bus_teardown_intr(dev, sc->irq, sc->ih);
3528 bus_release_resource(dev, SYS_RES_IRQ, 0, sc->irq);
3529 lockuninit(&sc->rw);
3530 lockuninit(&sc->lock);
3532 return (bus_generic_detach(dev));
3534 /* add suspend, resume */
3535 static device_method_t emu_methods[] = {
3536 /* Device interface */
3537 DEVMETHOD(device_probe, emu_pci_probe),
3538 DEVMETHOD(device_attach, emu_pci_attach),
3539 DEVMETHOD(device_detach, emu_pci_detach),
3541 DEVMETHOD(bus_read_ivar, emu_read_ivar),
3542 DEVMETHOD(bus_write_ivar, emu_write_ivar),
3548 static driver_t emu_driver = {
3551 sizeof(struct emu_sc_info),
3558 emu_modevent(module_t mod __unused, int cmd, void *data __unused)
3564 break; /* Success */
3569 /* XXX Should we check state of pcm & midi subdevices here? */
3571 break; /* Success */
3582 static devclass_t emu_devclass;
3584 DRIVER_MODULE(snd_emu10kx, pci, emu_driver, emu_devclass, emu_modevent, NULL);
3585 MODULE_VERSION(snd_emu10kx, SND_EMU10KX_PREFVER);