2 * Copyright (c) 1991 The Regents of the University of California.
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions
8 * 1. Redistributions of source code must retain the above copyright
9 * notice, this list of conditions and the following disclaimer.
10 * 2. Redistributions in binary form must reproduce the above copyright
11 * notice, this list of conditions and the following disclaimer in the
12 * documentation and/or other materials provided with the distribution.
13 * 3. All advertising materials mentioning features or use of this software
14 * must display the following acknowledgement:
15 * This product includes software developed by the University of
16 * California, Berkeley and its contributors.
17 * 4. Neither the name of the University nor the names of its contributors
18 * may be used to endorse or promote products derived from this software
19 * without specific prior written permission.
21 * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
22 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
23 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
24 * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
25 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
26 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
27 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
28 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
29 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
30 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
33 * $FreeBSD: src/sys/i386/isa/intr_machdep.h,v 1.19.2.2 2001/10/14 20:05:50 luigi Exp $
36 #ifndef _ARCH_ISA_INTR_MACHDEP_H_
37 #define _ARCH_ISA_INTR_MACHDEP_H_
41 #include <sys/types.h>
46 * Low level interrupt code.
51 #define IDT_OFFSET 0x20
52 #define IDT_OFFSET_SYSCALL 0x80
53 #define IDT_OFFSET_IPI 0xe0
55 #define IDT_HWI_VECTORS (IDT_OFFSET_IPI - IDT_OFFSET)
58 * Local APIC TPR priority vector levels:
60 * 0xff (255) +-------------+
61 * | | 15 (IPIs: Xcpustop, Xspuriousint)
62 * 0xf0 (240) +-------------+
63 * | | 14 (IPIs: Xinvltlb, Xipiq, Xtimer)
64 * 0xe0 (224) +-------------+
66 * 0xd0 (208) +-------------+
68 * 0xc0 (192) +-------------+
70 * 0xb0 (176) +-------------+
72 * 0xa0 (160) +-------------+
74 * 0x90 (144) +-------------+
75 * | | 8 (syscall at 0x80)
76 * 0x80 (128) +-------------+
78 * 0x70 (112) +-------------+
80 * 0x60 (96) +-------------+
82 * 0x50 (80) +-------------+
84 * 0x40 (64) +-------------+
86 * 0x30 (48) +-------------+
87 * | | 2 (hardware INTs)
88 * 0x20 (32) +-------------+
89 * | | 1 (exceptions, traps, etc.)
90 * 0x10 (16) +-------------+
91 * | | 0 (exceptions, traps, etc.)
92 * 0x00 (0) +-------------+
96 /* Local APIC Task Priority Register */
97 #define TPR_IPI (IDT_OFFSET_IPI - 1)
103 #define IDT_OFFSET_IPIG1 IDT_OFFSET_IPI
106 #define XINVLTLB_OFFSET (IDT_OFFSET_IPIG1 + 0)
108 /* IPI group1 1: unused (was inter-cpu clock handling) */
109 /* IPI group1 2: unused (was inter-cpu rendezvous) */
112 #define XIPIQ_OFFSET (IDT_OFFSET_IPIG1 + 3)
114 /* Local APIC TIMER */
115 #define XTIMER_OFFSET (IDT_OFFSET_IPIG1 + 4)
117 /* IPI group1 5 ~ 15: unused */
123 #define IDT_OFFSET_IPIG2 (IDT_OFFSET_IPIG1 + TPR_STEP)
125 /* IPI to signal CPUs to stop and wait for another CPU to restart them */
126 #define XCPUSTOP_OFFSET (IDT_OFFSET_IPIG2 + 0)
128 /* IPI group2 1 ~ 14: unused */
130 /* NOTE: this vector MUST be xxxx1111 */
131 #define XSPURIOUSINT_OFFSET (IDT_OFFSET_IPIG2 + 15)
136 * Type of the first (asm) part of an interrupt handler.
138 typedef void inthand_t(u_int cs, u_int ef, u_int esp, u_int ss);
140 #define IDTVEC(name) __CONCAT(X,name)
143 Xspuriousint, /* handle APIC "spurious INTs" */
144 Xtimer; /* handle LAPIC timer INT */
147 Xcpustop, /* CPU stops & waits for another CPU to restart it */
148 Xinvltlb, /* TLB shootdowns */
149 Xipiq; /* handle lwkt_send_ipiq() requests */
155 #endif /* !_ARCH_ISA_INTR_MACHDEP_H_ */