2 * Copyright (c) 1999, 2000 Dave Boyce. All rights reserved.
4 * Copyright (c) 2000, 2001 Hellmuth Michaelis. All rights reserved.
6 * Redistribution and use in source and binary forms, with or without
7 * modification, are permitted provided that the following conditions
9 * 1. Redistributions of source code must retain the above copyright
10 * notice, this list of conditions and the following disclaimer.
11 * 2. Redistributions in binary form must reproduce the above copyright
12 * notice, this list of conditions and the following disclaimer in the
13 * documentation and/or other materials provided with the distribution.
15 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
16 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
17 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
18 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
19 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
20 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
21 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
22 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
23 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
24 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
27 *---------------------------------------------------------------------------
29 * i4b_iwic - isdn4bsd Winbond W6692 driver
30 * ----------------------------------------
32 * $FreeBSD: src/sys/i4b/layer1/iwic/i4b_iwic_bchan.c,v 1.7.2.1 2001/08/10 14:08:40 obrien Exp $
33 * $DragonFly: src/sys/net/i4b/layer1/iwic/i4b_iwic_bchan.c,v 1.2 2003/06/17 04:28:40 dillon Exp $
35 * last edit-date: [Tue Jan 16 13:21:24 2001]
37 *---------------------------------------------------------------------------*/
43 #if (NIWIC > 0) && (NPCI > 0)
45 #include <sys/param.h>
46 #include <sys/systm.h>
48 #include <sys/socket.h>
53 #include <machine/i4b_debug.h>
54 #include <machine/i4b_ioctl.h>
55 #include <machine/i4b_trace.h>
57 #include <i4b/layer1/i4b_l1.h>
59 #include <i4b/layer1/iwic/i4b_iwic.h>
60 #include <i4b/layer1/iwic/i4b_w6692.h>
62 #include <i4b/include/i4b_global.h>
63 #include <i4b/include/i4b_mbuf.h>
65 static void iwic_bchan_init(struct iwic_softc *sc, int chan_no, int activate);
67 /*---------------------------------------------------------------------------*
68 * B-channel interrupt handler
69 *---------------------------------------------------------------------------*/
71 iwic_bchan_xirq(struct iwic_softc *sc, int chan_no)
74 struct iwic_bchan *chan;
78 chan = &sc->sc_bchan[chan_no];
80 irq_stat = IWIC_READ(sc, chan->offset + B_EXIR);
82 NDBGL1(L1_H_IRQ, "irq_stat = 0x%x", irq_stat);
84 if((irq_stat & (B_EXIR_RMR | B_EXIR_RME | B_EXIR_RDOV | B_EXIR_XFR | B_EXIR_XDUN)) == 0)
86 NDBGL1(L1_H_XFRERR, "spurious IRQ!");
90 if (irq_stat & B_EXIR_RDOV)
92 NDBGL1(L1_H_XFRERR, "iwic%d: EXIR B-channel Receive Data Overflow", sc->sc_unit);
95 if (irq_stat & B_EXIR_XDUN)
97 NDBGL1(L1_H_XFRERR, "iwic%d: EXIR B-channel Transmit Data Underrun", sc->sc_unit);
98 cmd |= (B_CMDR_XRST); /*XXX must retransmit frame ! */
101 /* RX message end interrupt */
103 if(irq_stat & B_EXIR_RME)
107 NDBGL1(L1_H_IRQ, "B_EXIR_RME");
109 error = (IWIC_READ(sc,chan->offset+B_STAR) &
110 (B_STAR_RDOV | B_STAR_CRCE | B_STAR_RMB));
114 if(error & B_STAR_RDOV)
115 NDBGL1(L1_H_XFRERR, "iwic%d: B-channel Receive Data Overflow", sc->sc_unit);
116 if(error & B_STAR_CRCE)
117 NDBGL1(L1_H_XFRERR, "iwic%d: B-channel CRC Error", sc->sc_unit);
118 if(error & B_STAR_RMB)
119 NDBGL1(L1_H_XFRERR, "iwic%d: B-channel Receive Message Aborted", sc->sc_unit);
122 /* all error conditions checked, now decide and take action */
126 register int fifo_data_len;
127 fifo_data_len = ((IWIC_READ(sc,chan->offset+B_RBCL)) &
128 ((IWIC_BCHAN_FIFO_LEN)-1));
130 if(fifo_data_len == 0)
131 fifo_data_len = IWIC_BCHAN_FIFO_LEN;
134 if(chan->in_mbuf == NULL)
136 if((chan->in_mbuf = i4b_Bgetmbuf(BCH_MAX_DATALEN)) == NULL)
137 panic("L1 iwic_bchan_irq: RME, cannot allocate mbuf!\n");
138 chan->in_cbptr = chan->in_mbuf->m_data;
142 if((chan->in_len + fifo_data_len) <= BCH_MAX_DATALEN)
144 /* read data from fifo */
146 NDBGL1(L1_H_IRQ, "B_EXIR_RME, rd fifo, len = %d", fifo_data_len);
148 IWIC_RDBFIFO(sc, chan, chan->in_cbptr, fifo_data_len);
150 cmd |= (B_CMDR_RACK | B_CMDR_RACT);
151 IWIC_WRITE(sc, chan->offset + B_CMDR, cmd);
154 chan->in_len += fifo_data_len;
155 chan->rxcount += fifo_data_len;
157 /* setup mbuf data length */
159 chan->in_mbuf->m_len = chan->in_len;
160 chan->in_mbuf->m_pkthdr.len = chan->in_len;
162 if(sc->sc_trace & TRACE_B_RX)
165 hdr.unit = L0IWICUNIT(sc->sc_unit);
166 hdr.type = (chan_no == IWIC_BCH_A ? TRC_CH_B1 : TRC_CH_B2);
168 hdr.count = ++sc->sc_bchan[chan_no].sc_trace_bcount;
170 i4b_l1_trace_ind(&hdr, chan->in_mbuf->m_len, chan->in_mbuf->m_data);
173 (*chan->iwic_drvr_linktab->bch_rx_data_ready)(chan->iwic_drvr_linktab->unit);
177 /* mark buffer ptr as unused */
179 chan->in_mbuf = NULL;
180 chan->in_cbptr = NULL;
185 NDBGL1(L1_H_XFRERR, "RAWHDLC rx buffer overflow in RME, in_len=%d, fifolen=%d", chan->in_len, fifo_data_len);
186 chan->in_cbptr = chan->in_mbuf->m_data;
188 cmd |= (B_CMDR_RRST | B_CMDR_RACK);
193 if (chan->in_mbuf != NULL)
195 i4b_Bfreembuf(chan->in_mbuf);
196 chan->in_mbuf = NULL;
197 chan->in_cbptr = NULL;
200 cmd |= (B_CMDR_RRST | B_CMDR_RACK);
204 /* RX fifo full interrupt */
206 if(irq_stat & B_EXIR_RMR)
208 NDBGL1(L1_H_IRQ, "B_EXIR_RMR");
210 if(chan->in_mbuf == NULL)
212 if((chan->in_mbuf = i4b_Bgetmbuf(BCH_MAX_DATALEN)) == NULL)
213 panic("L1 iwic_bchan_irq: RMR, cannot allocate mbuf!\n");
214 chan->in_cbptr = chan->in_mbuf->m_data;
218 chan->rxcount += IWIC_BCHAN_FIFO_LEN;
220 if((chan->in_len + IWIC_BCHAN_FIFO_LEN) <= BCH_MAX_DATALEN)
222 /* read data from fifo */
224 NDBGL1(L1_H_IRQ, "B_EXIR_RMR, rd fifo, len = max (64)");
226 IWIC_RDBFIFO(sc, chan, chan->in_cbptr, IWIC_BCHAN_FIFO_LEN);
228 chan->in_cbptr += IWIC_BCHAN_FIFO_LEN;
229 chan->in_len += IWIC_BCHAN_FIFO_LEN;
233 if(chan->bprot == BPROT_NONE)
235 /* setup mbuf data length */
237 chan->in_mbuf->m_len = chan->in_len;
238 chan->in_mbuf->m_pkthdr.len = chan->in_len;
240 if(sc->sc_trace & TRACE_B_RX)
243 hdr.unit = L0IWICUNIT(sc->sc_unit);
244 hdr.type = (chan_no == IWIC_BCH_A ? TRC_CH_B1 : TRC_CH_B2);
246 hdr.count = ++sc->sc_bchan[chan_no].sc_trace_bcount;
248 i4b_l1_trace_ind(&hdr, chan->in_mbuf->m_len, chan->in_mbuf->m_data);
251 /* silence detection */
253 if(!(i4b_l1_bchan_tel_silence(chan->in_mbuf->m_data, chan->in_mbuf->m_len)))
256 #if defined (__FreeBSD__) && __FreeBSD__ > 4
257 (void) IF_HANDOFF(&chan->rx_queue, chan->in_mbuf, NULL);
259 if(!(IF_QFULL(&chan->rx_queue)))
261 IF_ENQUEUE(&chan->rx_queue, chan->in_mbuf);
265 i4b_Bfreembuf(chan->in_mbuf);
268 /* signal upper driver that data is available */
270 (*chan->iwic_drvr_linktab->bch_rx_data_ready)(chan->iwic_drvr_linktab->unit);
272 /* alloc new buffer */
274 if((chan->in_mbuf = i4b_Bgetmbuf(BCH_MAX_DATALEN)) == NULL)
275 panic("L1 iwic_bchan_irq: RMR, cannot allocate new mbuf!\n");
277 /* setup new data ptr */
279 chan->in_cbptr = chan->in_mbuf->m_data;
281 /* read data from fifo */
283 NDBGL1(L1_H_IRQ, "B_EXIR_RMR, rd fifo1, len = max (64)");
285 IWIC_RDBFIFO(sc, chan, chan->in_cbptr, IWIC_BCHAN_FIFO_LEN);
287 chan->in_cbptr += IWIC_BCHAN_FIFO_LEN;
288 chan->in_len = IWIC_BCHAN_FIFO_LEN;
290 chan->rxcount += IWIC_BCHAN_FIFO_LEN;
294 NDBGL1(L1_H_XFRERR, "RAWHDLC rx buffer overflow in RPF, in_len=%d", chan->in_len);
295 chan->in_cbptr = chan->in_mbuf->m_data;
297 cmd |= (B_CMDR_RRST | B_CMDR_RACK);
301 /* command to release fifo space */
308 if (irq_stat & B_EXIR_XFR)
310 /* transmit fifo empty, new data can be written to fifo */
316 NDBGL1(L1_H_IRQ, "B_EXIR_XFR");
318 if(chan->out_mbuf_cur == NULL) /* last frame is transmitted */
320 IF_DEQUEUE(&chan->tx_queue, chan->out_mbuf_head);
322 if(chan->out_mbuf_head == NULL)
324 chan->state &= ~ST_TX_ACTIVE;
325 (*chan->iwic_drvr_linktab->bch_tx_queue_empty)(chan->iwic_drvr_linktab->unit);
329 chan->state |= ST_TX_ACTIVE;
330 chan->out_mbuf_cur = chan->out_mbuf_head;
331 chan->out_mbuf_cur_ptr = chan->out_mbuf_cur->m_data;
332 chan->out_mbuf_cur_len = chan->out_mbuf_cur->m_len;
334 if(sc->sc_trace & TRACE_B_TX)
337 hdr.unit = L0IWICUNIT(sc->sc_unit);
338 hdr.type = (chan_no == IWIC_BCH_A ? TRC_CH_B1 : TRC_CH_B2);
340 hdr.count = ++sc->sc_bchan[chan_no].sc_trace_bcount;
342 i4b_l1_trace_ind(&hdr, chan->out_mbuf_cur->m_len, chan->out_mbuf_cur->m_data);
345 if(chan->bprot == BPROT_NONE)
347 if(!(i4b_l1_bchan_tel_silence(chan->out_mbuf_cur->m_data, chan->out_mbuf_cur->m_len)))
359 while(chan->out_mbuf_cur && len != IWIC_BCHAN_FIFO_LEN)
361 nextlen = min(chan->out_mbuf_cur_len, IWIC_BCHAN_FIFO_LEN - len);
363 NDBGL1(L1_H_IRQ, "B_EXIR_XFR, wr fifo, len = %d", nextlen);
365 IWIC_WRBFIFO(sc, chan, chan->out_mbuf_cur_ptr, nextlen);
370 chan->txcount += nextlen;
372 chan->out_mbuf_cur_ptr += nextlen;
373 chan->out_mbuf_cur_len -= nextlen;
375 if(chan->out_mbuf_cur_len == 0)
377 if((chan->out_mbuf_cur = chan->out_mbuf_cur->m_next) != NULL)
379 chan->out_mbuf_cur_ptr = chan->out_mbuf_cur->m_data;
380 chan->out_mbuf_cur_len = chan->out_mbuf_cur->m_len;
382 if(sc->sc_trace & TRACE_B_TX)
385 hdr.unit = L0IWICUNIT(sc->sc_unit);
386 hdr.type = (chan_no == IWIC_BCH_A ? TRC_CH_B1 : TRC_CH_B2);
388 hdr.count = ++sc->sc_bchan[chan_no].sc_trace_bcount;
390 i4b_l1_trace_ind(&hdr, chan->out_mbuf_cur->m_len, chan->out_mbuf_cur->m_data);
395 if (chan->bprot != BPROT_NONE)
397 i4b_Bfreembuf(chan->out_mbuf_head);
398 chan->out_mbuf_head = NULL;
406 IWIC_WRITE(sc, chan->offset + B_CMDR, cmd);
410 /*---------------------------------------------------------------------------*
411 * initialize one B channels rx/tx data structures
412 *---------------------------------------------------------------------------*/
414 iwic_bchannel_setup(int unit, int chan_no, int bprot, int activate)
416 struct iwic_softc *sc = &iwic_sc[unit];
417 struct iwic_bchan *chan = &sc->sc_bchan[chan_no];
421 NDBGL1(L1_BCHAN, "unit %d, chan %d, bprot %d, activate %d", unit, chan_no, bprot, activate);
425 chan->bprot = bprot; /* B channel protocol */
426 chan->state = ST_IDLE; /* B channel state */
431 iwic_bchan_init(sc, chan_no, activate);
436 chan->rx_queue.ifq_maxlen = IFQ_MAXLEN;
438 #if defined (__FreeBSD__) && __FreeBSD__ > 4
439 mtx_init(&chan->rx_queue.ifq_mtx, "i4b_iwic_rx", MTX_DEF);
442 i4b_Bcleanifq(&chan->rx_queue); /* clean rx queue */
444 chan->rxcount = 0; /* reset rx counter */
446 i4b_Bfreembuf(chan->in_mbuf); /* clean rx mbuf */
448 chan->in_mbuf = NULL; /* reset mbuf ptr */
449 chan->in_cbptr = NULL; /* reset mbuf curr ptr */
450 chan->in_len = 0; /* reset mbuf data len */
452 /* transmitter part */
454 chan->tx_queue.ifq_maxlen = IFQ_MAXLEN;
456 #if defined (__FreeBSD__) && __FreeBSD__ > 4
457 mtx_init(&chan->tx_queue.ifq_mtx, "i4b_iwic_tx", MTX_DEF);
460 i4b_Bcleanifq(&chan->tx_queue); /* clean tx queue */
462 chan->txcount = 0; /* reset tx counter */
464 i4b_Bfreembuf(chan->out_mbuf_head); /* clean tx mbuf */
466 chan->out_mbuf_head = NULL; /* reset head mbuf ptr */
467 chan->out_mbuf_cur = NULL; /* reset current mbuf ptr */
468 chan->out_mbuf_cur_ptr = NULL; /* reset current mbuf data ptr */
469 chan->out_mbuf_cur_len = 0; /* reset current mbuf data cnt */
474 iwic_bchan_init(sc, chan_no, activate);
480 /*---------------------------------------------------------------------------*
481 * initalize / deinitialize B-channel hardware
482 *---------------------------------------------------------------------------*/
484 iwic_bchan_init(struct iwic_softc *sc, int chan_no, int activate)
486 struct iwic_bchan *bchan = &sc->sc_bchan[chan_no];
488 NDBGL1(L1_BCHAN, "chan %d, activate %d", chan_no, activate);
492 if(bchan->bprot == BPROT_NONE)
494 /* Extended transparent mode */
495 IWIC_WRITE(sc, bchan->offset + B_MODE, B_MODE_MMS);
499 /* Transparent mode */
500 IWIC_WRITE(sc, bchan->offset + B_MODE, 0);
501 /* disable address comparation */
502 IWIC_WRITE (sc, bchan->offset+B_ADM1, 0xff);
503 IWIC_WRITE (sc, bchan->offset+B_ADM2, 0xff);
506 /* reset & start receiver */
507 IWIC_WRITE(sc, bchan->offset + B_CMDR, B_CMDR_RRST|B_CMDR_RACT);
510 IWIC_WRITE(sc, bchan->offset + B_EXIM, 0);
515 IWIC_WRITE(sc, bchan->offset + B_EXIM, 0xff);
518 IWIC_WRITE(sc, bchan->offset + B_MODE, 0);
520 /* Bring interface down */
521 IWIC_WRITE(sc, bchan->offset + B_CMDR, B_CMDR_RRST | B_CMDR_XRST);
523 /* Flush pending interrupts */
524 IWIC_READ(sc, bchan->offset + B_EXIR);
528 /*---------------------------------------------------------------------------*
529 * start transmission on a b channel
530 *---------------------------------------------------------------------------*/
532 iwic_bchannel_start(int unit, int chan_no)
534 struct iwic_softc *sc = &iwic_sc[unit];
535 register struct iwic_bchan *chan = &sc->sc_bchan[chan_no];
536 register int next_len;
543 s = SPLI4B(); /* enter critical section */
545 NDBGL1(L1_BCHAN, "unit %d, channel %d", unit, chan_no);
547 if(chan->state & ST_TX_ACTIVE) /* already running ? */
550 return; /* yes, leave */
553 /* get next mbuf from queue */
555 IF_DEQUEUE(&chan->tx_queue, chan->out_mbuf_head);
557 if(chan->out_mbuf_head == NULL) /* queue empty ? */
559 splx(s); /* leave critical section */
560 return; /* yes, exit */
563 /* init current mbuf values */
565 chan->out_mbuf_cur = chan->out_mbuf_head;
566 chan->out_mbuf_cur_len = chan->out_mbuf_cur->m_len;
567 chan->out_mbuf_cur_ptr = chan->out_mbuf_cur->m_data;
569 /* activity indicator for timeout handling */
571 if(chan->bprot == BPROT_NONE)
573 if(!(i4b_l1_bchan_tel_silence(chan->out_mbuf_cur->m_data, chan->out_mbuf_cur->m_len)))
581 chan->state |= ST_TX_ACTIVE; /* we start transmitting */
583 if(sc->sc_trace & TRACE_B_TX) /* if trace, send mbuf to trace dev */
586 hdr.unit = L0IWICUNIT(unit);
587 hdr.type = (chan_no == IWIC_BCH_A ? TRC_CH_B1 : TRC_CH_B2);
589 hdr.count = ++sc->sc_bchan[chan_no].sc_trace_bcount;
591 i4b_l1_trace_ind(&hdr, chan->out_mbuf_cur->m_len, chan->out_mbuf_cur->m_data);
594 len = 0; /* # of chars put into tx fifo this time */
597 * fill the tx fifo with data from the current mbuf. if
598 * current mbuf holds less data than fifo length, try to
599 * get the next mbuf from (a possible) mbuf chain. if there is
600 * not enough data in a single mbuf or in a chain, then this
601 * is the last mbuf and we tell the chip that it has to send
602 * CRC and closing flag
605 while((len < IWIC_BCHAN_FIFO_LEN) && chan->out_mbuf_cur)
608 * put as much data into the fifo as is
609 * available from the current mbuf
612 if((len + chan->out_mbuf_cur_len) >= IWIC_BCHAN_FIFO_LEN)
613 next_len = IWIC_BCHAN_FIFO_LEN - len;
615 next_len = chan->out_mbuf_cur_len;
617 /* write what we have from current mbuf to fifo */
619 IWIC_WRBFIFO(sc, chan, chan->out_mbuf_cur_ptr, next_len);
621 len += next_len; /* update # of bytes written */
622 chan->txcount += next_len; /* statistics */
623 chan->out_mbuf_cur_ptr += next_len; /* data ptr */
624 chan->out_mbuf_cur_len -= next_len; /* data len */
627 * in case the current mbuf (of a possible chain) data
628 * has been put into the fifo, check if there is a next
629 * mbuf in the chain. If there is one, get ptr to it
630 * and update the data ptr and the length
633 if((chan->out_mbuf_cur_len <= 0) &&
634 ((chan->out_mbuf_cur = chan->out_mbuf_cur->m_next) != NULL))
636 chan->out_mbuf_cur_ptr = chan->out_mbuf_cur->m_data;
637 chan->out_mbuf_cur_len = chan->out_mbuf_cur->m_len;
639 if(sc->sc_trace & TRACE_B_TX)
642 hdr.unit = L0IWICUNIT(unit);
643 hdr.type = (chan_no == IWIC_BCH_A ? TRC_CH_B1 : TRC_CH_B2);
645 hdr.count = ++sc->sc_bchan[chan_no].sc_trace_bcount;
647 i4b_l1_trace_ind(&hdr, chan->out_mbuf_cur->m_len, chan->out_mbuf_cur->m_data);
653 * if there is either still data in the current mbuf and/or
654 * there is a successor on the chain available issue just
655 * a XTF (transmit) command to the chip. if there is no more
656 * data available from the current mbuf (-chain), issue
657 * an XTF and an XME (message end) command which will then
658 * send the CRC and the closing HDLC flag sequence
661 if(chan->out_mbuf_cur && (chan->out_mbuf_cur_len > 0))
664 * more data available, send current fifo out.
665 * next xfer to tx fifo is done in the
673 /* end of mbuf chain */
675 if(chan->bprot == BPROT_NONE)
678 cmd |= (B_CMDR_XMS | B_CMDR_XME);
680 i4b_Bfreembuf(chan->out_mbuf_head); /* free mbuf chain */
682 chan->out_mbuf_head = NULL;
683 chan->out_mbuf_cur = NULL;
684 chan->out_mbuf_cur_ptr = NULL;
685 chan->out_mbuf_cur_len = 0;
688 /* call timeout handling routine */
690 if(activity == ACT_RX || activity == ACT_TX)
691 (*chan->iwic_drvr_linktab->bch_activity)(chan->iwic_drvr_linktab->unit, activity);
696 IWIC_WRITE(sc, chan->offset + B_CMDR, cmd);
702 /*---------------------------------------------------------------------------*
703 * return B-channel statistics
704 *---------------------------------------------------------------------------*/
706 iwic_bchannel_stat(int unit, int chan_no, bchan_statistics_t *bsp)
708 struct iwic_softc *sc = iwic_find_sc(unit);
709 struct iwic_bchan *bchan = &sc->sc_bchan[chan_no];
713 bsp->outbytes = bchan->txcount;
714 bsp->inbytes = bchan->rxcount;
722 /*---------------------------------------------------------------------------*
723 * initialize our local linktab
724 *---------------------------------------------------------------------------*/
726 iwic_init_linktab(struct iwic_softc *sc)
728 struct iwic_bchan *chan;
731 /* make sure the hardware driver is known to layer 4 */
732 ctrl_types[CTRL_PASSIVE].set_linktab = i4b_l1_set_linktab;
733 ctrl_types[CTRL_PASSIVE].get_linktab = i4b_l1_ret_linktab;
737 chan = &sc->sc_bchan[IWIC_BCH_A];
738 lt = &chan->iwic_isdn_linktab;
740 lt->unit = sc->sc_unit;
741 lt->channel = IWIC_BCH_A;
742 lt->bch_config = iwic_bchannel_setup;
743 lt->bch_tx_start = iwic_bchannel_start;
744 lt->bch_stat = iwic_bchannel_stat;
745 lt->tx_queue = &chan->tx_queue;
747 /* used by non-HDLC data transfers, i.e. telephony drivers */
748 lt->rx_queue = &chan->rx_queue;
750 /* used by HDLC data transfers, i.e. ipr and isp drivers */
751 lt->rx_mbuf = &chan->in_mbuf;
755 chan = &sc->sc_bchan[IWIC_BCH_B];
756 lt = &chan->iwic_isdn_linktab;
758 lt->unit = sc->sc_unit;
759 lt->channel = IWIC_BCH_B;
760 lt->bch_config = iwic_bchannel_setup;
761 lt->bch_tx_start = iwic_bchannel_start;
762 lt->bch_stat = iwic_bchannel_stat;
763 lt->tx_queue = &chan->tx_queue;
765 /* used by non-HDLC data transfers, i.e. telephony drivers */
766 lt->rx_queue = &chan->rx_queue;
768 /* used by HDLC data transfers, i.e. ipr and isp drivers */
769 lt->rx_mbuf = &chan->in_mbuf;
772 #endif /* NIWIC > 0 */