1 /* $OpenBSD: if_txp.c,v 1.48 2001/06/27 06:34:50 kjc Exp $ */
2 /* $FreeBSD: src/sys/dev/txp/if_txp.c,v 1.4.2.4 2001/12/14 19:50:43 jlemon Exp $ */
3 /* $DragonFly: src/sys/dev/netif/txp/if_txp.c,v 1.40 2006/10/25 20:55:59 dillon Exp $ */
7 * Jason L. Wright <jason@thought.net>, Theo de Raadt, and
8 * Aaron Campbell <aaron@monkey.org>. All rights reserved.
10 * Redistribution and use in source and binary forms, with or without
11 * modification, are permitted provided that the following conditions
13 * 1. Redistributions of source code must retain the above copyright
14 * notice, this list of conditions and the following disclaimer.
15 * 2. Redistributions in binary form must reproduce the above copyright
16 * notice, this list of conditions and the following disclaimer in the
17 * documentation and/or other materials provided with the distribution.
18 * 3. All advertising materials mentioning features or use of this software
19 * must display the following acknowledgement:
20 * This product includes software developed by Jason L. Wright,
21 * Theo de Raadt and Aaron Campbell.
22 * 4. Neither the name of the author nor the names of any co-contributors
23 * may be used to endorse or promote products derived from this software
24 * without specific prior written permission.
26 * THIS SOFTWARE IS PROVIDED BY THE AUTHORS ``AS IS'' AND ANY EXPRESS OR
27 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
28 * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
29 * ARE DISCLAIMED. IN NO EVENT SHALL Bill Paul OR THE VOICES IN HIS HEAD
30 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
31 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
32 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
33 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
34 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
35 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF
36 * THE POSSIBILITY OF SUCH DAMAGE.
40 * Driver for 3c990 (Typhoon) Ethernet ASIC
43 #include <sys/param.h>
44 #include <sys/systm.h>
45 #include <sys/sockio.h>
47 #include <sys/malloc.h>
48 #include <sys/kernel.h>
49 #include <sys/socket.h>
50 #include <sys/serialize.h>
53 #include <sys/thread2.h>
56 #include <net/ifq_var.h>
57 #include <net/if_arp.h>
58 #include <net/ethernet.h>
59 #include <net/if_dl.h>
60 #include <net/if_types.h>
61 #include <net/vlan/if_vlan_var.h>
63 #include <netinet/in.h>
64 #include <netinet/in_systm.h>
65 #include <netinet/in_var.h>
66 #include <netinet/ip.h>
67 #include <netinet/if_ether.h>
68 #include <sys/in_cksum.h>
70 #include <net/if_media.h>
74 #include <vm/vm.h> /* for vtophys */
75 #include <vm/pmap.h> /* for vtophys */
77 #include "../mii_layer/mii.h"
78 #include "../mii_layer/miivar.h"
80 #include <bus/pci/pcidevs.h>
81 #include <bus/pci/pcireg.h>
82 #include <bus/pci/pcivar.h>
84 #define TXP_USEIOSPACE
85 #define __STRICT_ALIGNMENT
87 #include "if_txpreg.h"
91 * Various supported device vendors/types and their names.
93 static struct txp_type txp_devs[] = {
94 { PCI_VENDOR_3COM, PCI_PRODUCT_3COM_3CR990TX95,
95 "3Com 3cR990-TX-95 Etherlink with 3XP Processor" },
96 { PCI_VENDOR_3COM, PCI_PRODUCT_3COM_3CR990TX97,
97 "3Com 3cR990-TX-97 Etherlink with 3XP Processor" },
98 { PCI_VENDOR_3COM, PCI_PRODUCT_3COM_3C990B,
99 "3Com 3cR990B-TXM Etherlink with 3XP Processor" },
100 { PCI_VENDOR_3COM, PCI_PRODUCT_3COM_3CR990SVR95,
101 "3Com 3cR990-SRV-95 Etherlink Server with 3XP Processor" },
102 { PCI_VENDOR_3COM, PCI_PRODUCT_3COM_3CR990SVR97,
103 "3Com 3cR990-SRV-97 Etherlink Server with 3XP Processor" },
104 { PCI_VENDOR_3COM, PCI_PRODUCT_3COM_3C990BSVR,
105 "3Com 3cR990B-SRV Etherlink Server with 3XP Processor" },
109 static int txp_probe (device_t);
110 static int txp_attach (device_t);
111 static int txp_detach (device_t);
112 static void txp_intr (void *);
113 static void txp_tick (void *);
114 static int txp_shutdown (device_t);
115 static int txp_ioctl (struct ifnet *, u_long, caddr_t, struct ucred *);
116 static void txp_start (struct ifnet *);
117 static void txp_stop (struct txp_softc *);
118 static void txp_init (void *);
119 static void txp_watchdog (struct ifnet *);
121 static void txp_release_resources (device_t);
122 static int txp_chip_init (struct txp_softc *);
123 static int txp_reset_adapter (struct txp_softc *);
124 static int txp_download_fw (struct txp_softc *);
125 static int txp_download_fw_wait (struct txp_softc *);
126 static int txp_download_fw_section (struct txp_softc *,
127 struct txp_fw_section_header *, int);
128 static int txp_alloc_rings (struct txp_softc *);
129 static int txp_rxring_fill (struct txp_softc *);
130 static void txp_rxring_empty (struct txp_softc *);
131 static void txp_set_filter (struct txp_softc *);
133 static int txp_cmd_desc_numfree (struct txp_softc *);
134 static int txp_command (struct txp_softc *, u_int16_t, u_int16_t, u_int32_t,
135 u_int32_t, u_int16_t *, u_int32_t *, u_int32_t *, int);
136 static int txp_command2 (struct txp_softc *, u_int16_t, u_int16_t,
137 u_int32_t, u_int32_t, struct txp_ext_desc *, u_int8_t,
138 struct txp_rsp_desc **, int);
139 static int txp_response (struct txp_softc *, u_int32_t, u_int16_t, u_int16_t,
140 struct txp_rsp_desc **);
141 static void txp_rsp_fixup (struct txp_softc *, struct txp_rsp_desc *,
142 struct txp_rsp_desc *);
143 static void txp_capabilities (struct txp_softc *);
145 static void txp_ifmedia_sts (struct ifnet *, struct ifmediareq *);
146 static int txp_ifmedia_upd (struct ifnet *);
148 static void txp_show_descriptor (void *);
150 static void txp_tx_reclaim (struct txp_softc *, struct txp_tx_ring *);
151 static void txp_rxbuf_reclaim (struct txp_softc *);
152 static void txp_rx_reclaim (struct txp_softc *, struct txp_rx_ring *);
154 #ifdef TXP_USEIOSPACE
155 #define TXP_RES SYS_RES_IOPORT
156 #define TXP_RID TXP_PCI_LOIO
158 #define TXP_RES SYS_RES_MEMORY
159 #define TXP_RID TXP_PCI_LOMEM
162 static device_method_t txp_methods[] = {
163 /* Device interface */
164 DEVMETHOD(device_probe, txp_probe),
165 DEVMETHOD(device_attach, txp_attach),
166 DEVMETHOD(device_detach, txp_detach),
167 DEVMETHOD(device_shutdown, txp_shutdown),
171 static driver_t txp_driver = {
174 sizeof(struct txp_softc)
177 static devclass_t txp_devclass;
179 DECLARE_DUMMY_MODULE(if_txp);
180 DRIVER_MODULE(if_txp, pci, txp_driver, txp_devclass, 0, 0);
183 txp_probe(device_t dev)
188 vid = pci_get_vendor(dev);
189 did = pci_get_device(dev);
191 for (t = txp_devs; t->txp_name != NULL; ++t) {
192 if ((vid == t->txp_vid) && (did == t->txp_did)) {
193 device_set_desc(dev, t->txp_name);
202 txp_attach(device_t dev)
204 struct txp_softc *sc;
208 uint8_t enaddr[ETHER_ADDR_LEN];
211 sc = device_get_softc(dev);
212 callout_init(&sc->txp_stat_timer);
214 ifp = &sc->sc_arpcom.ac_if;
215 if_initname(ifp, device_get_name(dev), device_get_unit(dev));
217 pci_enable_busmaster(dev);
220 sc->sc_res = bus_alloc_resource_any(dev, TXP_RES, &rid, RF_ACTIVE);
222 if (sc->sc_res == NULL) {
223 device_printf(dev, "couldn't map ports/memory\n");
227 sc->sc_bt = rman_get_bustag(sc->sc_res);
228 sc->sc_bh = rman_get_bushandle(sc->sc_res);
230 /* Allocate interrupt */
232 sc->sc_irq = bus_alloc_resource_any(dev, SYS_RES_IRQ, &rid,
233 RF_SHAREABLE | RF_ACTIVE);
235 if (sc->sc_irq == NULL) {
236 device_printf(dev, "couldn't map interrupt\n");
241 if (txp_chip_init(sc)) {
246 sc->sc_fwbuf = contigmalloc(32768, M_DEVBUF,
247 M_WAITOK, 0, 0xffffffff, PAGE_SIZE, 0);
248 error = txp_download_fw(sc);
249 contigfree(sc->sc_fwbuf, 32768, M_DEVBUF);
255 sc->sc_ldata = contigmalloc(sizeof(struct txp_ldata), M_DEVBUF,
256 M_WAITOK, 0, 0xffffffff, PAGE_SIZE, 0);
257 bzero(sc->sc_ldata, sizeof(struct txp_ldata));
259 if (txp_alloc_rings(sc)) {
264 if (txp_command(sc, TXP_CMD_MAX_PKT_SIZE_WRITE, TXP_MAX_PKTLEN, 0, 0,
265 NULL, NULL, NULL, 1)) {
270 if (txp_command(sc, TXP_CMD_STATION_ADDRESS_READ, 0, 0, 0,
271 &p1, &p2, NULL, 1)) {
278 enaddr[0] = ((uint8_t *)&p1)[1];
279 enaddr[1] = ((uint8_t *)&p1)[0];
280 enaddr[2] = ((uint8_t *)&p2)[3];
281 enaddr[3] = ((uint8_t *)&p2)[2];
282 enaddr[4] = ((uint8_t *)&p2)[1];
283 enaddr[5] = ((uint8_t *)&p2)[0];
285 ifmedia_init(&sc->sc_ifmedia, 0, txp_ifmedia_upd, txp_ifmedia_sts);
286 ifmedia_add(&sc->sc_ifmedia, IFM_ETHER|IFM_10_T, 0, NULL);
287 ifmedia_add(&sc->sc_ifmedia, IFM_ETHER|IFM_10_T|IFM_HDX, 0, NULL);
288 ifmedia_add(&sc->sc_ifmedia, IFM_ETHER|IFM_10_T|IFM_FDX, 0, NULL);
289 ifmedia_add(&sc->sc_ifmedia, IFM_ETHER|IFM_100_TX, 0, NULL);
290 ifmedia_add(&sc->sc_ifmedia, IFM_ETHER|IFM_100_TX|IFM_HDX, 0, NULL);
291 ifmedia_add(&sc->sc_ifmedia, IFM_ETHER|IFM_100_TX|IFM_FDX, 0, NULL);
292 ifmedia_add(&sc->sc_ifmedia, IFM_ETHER|IFM_AUTO, 0, NULL);
294 sc->sc_xcvr = TXP_XCVR_AUTO;
295 txp_command(sc, TXP_CMD_XCVR_SELECT, TXP_XCVR_AUTO, 0, 0,
296 NULL, NULL, NULL, 0);
297 ifmedia_set(&sc->sc_ifmedia, IFM_ETHER|IFM_AUTO);
300 ifp->if_mtu = ETHERMTU;
301 ifp->if_flags = IFF_BROADCAST | IFF_SIMPLEX | IFF_MULTICAST;
302 ifp->if_ioctl = txp_ioctl;
303 ifp->if_start = txp_start;
304 ifp->if_watchdog = txp_watchdog;
305 ifp->if_init = txp_init;
306 ifp->if_baudrate = 100000000;
307 ifq_set_maxlen(&ifp->if_snd, TX_ENTRIES);
308 ifq_set_ready(&ifp->if_snd);
309 ifp->if_hwassist = 0;
310 txp_capabilities(sc);
312 ether_ifattach(ifp, enaddr, NULL);
314 error = bus_setup_intr(dev, sc->sc_irq, INTR_NETSAFE,
315 txp_intr, sc, &sc->sc_intrhand,
318 device_printf(dev, "couldn't set up irq\n");
326 txp_release_resources(dev);
331 txp_detach(device_t dev)
333 struct txp_softc *sc = device_get_softc(dev);
334 struct ifnet *ifp = &sc->sc_arpcom.ac_if;
337 lwkt_serialize_enter(ifp->if_serializer);
341 bus_teardown_intr(dev, sc->sc_irq, sc->sc_intrhand);
343 lwkt_serialize_exit(ifp->if_serializer);
345 ifmedia_removeall(&sc->sc_ifmedia);
348 for (i = 0; i < RXBUF_ENTRIES; i++)
349 kfree(sc->sc_rxbufs[i].rb_sd, M_DEVBUF);
351 txp_release_resources(dev);
357 txp_release_resources(device_t dev)
359 struct txp_softc *sc;
361 sc = device_get_softc(dev);
363 if (sc->sc_irq != NULL)
364 bus_release_resource(dev, SYS_RES_IRQ, 0, sc->sc_irq);
366 if (sc->sc_res != NULL)
367 bus_release_resource(dev, TXP_RES, TXP_RID, sc->sc_res);
369 if (sc->sc_ldata != NULL)
370 contigfree(sc->sc_ldata, sizeof(struct txp_ldata), M_DEVBUF);
376 txp_chip_init(struct txp_softc *sc)
378 /* disable interrupts */
379 WRITE_REG(sc, TXP_IER, 0);
380 WRITE_REG(sc, TXP_IMR,
381 TXP_INT_SELF | TXP_INT_PCI_TABORT | TXP_INT_PCI_MABORT |
382 TXP_INT_DMA3 | TXP_INT_DMA2 | TXP_INT_DMA1 | TXP_INT_DMA0 |
385 /* ack all interrupts */
386 WRITE_REG(sc, TXP_ISR, TXP_INT_RESERVED | TXP_INT_LATCH |
387 TXP_INT_A2H_7 | TXP_INT_A2H_6 | TXP_INT_A2H_5 | TXP_INT_A2H_4 |
388 TXP_INT_SELF | TXP_INT_PCI_TABORT | TXP_INT_PCI_MABORT |
389 TXP_INT_DMA3 | TXP_INT_DMA2 | TXP_INT_DMA1 | TXP_INT_DMA0 |
390 TXP_INT_A2H_3 | TXP_INT_A2H_2 | TXP_INT_A2H_1 | TXP_INT_A2H_0);
392 if (txp_reset_adapter(sc))
395 /* disable interrupts */
396 WRITE_REG(sc, TXP_IER, 0);
397 WRITE_REG(sc, TXP_IMR,
398 TXP_INT_SELF | TXP_INT_PCI_TABORT | TXP_INT_PCI_MABORT |
399 TXP_INT_DMA3 | TXP_INT_DMA2 | TXP_INT_DMA1 | TXP_INT_DMA0 |
402 /* ack all interrupts */
403 WRITE_REG(sc, TXP_ISR, TXP_INT_RESERVED | TXP_INT_LATCH |
404 TXP_INT_A2H_7 | TXP_INT_A2H_6 | TXP_INT_A2H_5 | TXP_INT_A2H_4 |
405 TXP_INT_SELF | TXP_INT_PCI_TABORT | TXP_INT_PCI_MABORT |
406 TXP_INT_DMA3 | TXP_INT_DMA2 | TXP_INT_DMA1 | TXP_INT_DMA0 |
407 TXP_INT_A2H_3 | TXP_INT_A2H_2 | TXP_INT_A2H_1 | TXP_INT_A2H_0);
413 txp_reset_adapter(struct txp_softc *sc)
418 WRITE_REG(sc, TXP_SRR, TXP_SRR_ALL);
420 WRITE_REG(sc, TXP_SRR, 0);
422 /* Should wait max 6 seconds */
423 for (i = 0; i < 6000; i++) {
424 r = READ_REG(sc, TXP_A2H_0);
425 if (r == STAT_WAITING_FOR_HOST_REQUEST)
430 if (r != STAT_WAITING_FOR_HOST_REQUEST) {
431 if_printf(&sc->sc_arpcom.ac_if, "reset hung\n");
439 txp_download_fw(struct txp_softc *sc)
441 struct txp_fw_file_header *fileheader;
442 struct txp_fw_section_header *secthead;
444 u_int32_t r, i, ier, imr;
446 ier = READ_REG(sc, TXP_IER);
447 WRITE_REG(sc, TXP_IER, ier | TXP_INT_A2H_0);
449 imr = READ_REG(sc, TXP_IMR);
450 WRITE_REG(sc, TXP_IMR, imr | TXP_INT_A2H_0);
452 for (i = 0; i < 10000; i++) {
453 r = READ_REG(sc, TXP_A2H_0);
454 if (r == STAT_WAITING_FOR_HOST_REQUEST)
458 if (r != STAT_WAITING_FOR_HOST_REQUEST) {
459 if_printf(&sc->sc_arpcom.ac_if,
460 "not waiting for host request\n");
465 WRITE_REG(sc, TXP_ISR, TXP_INT_A2H_0);
467 fileheader = (struct txp_fw_file_header *)tc990image;
468 if (bcmp("TYPHOON", fileheader->magicid, sizeof(fileheader->magicid))) {
469 if_printf(&sc->sc_arpcom.ac_if, "fw invalid magic\n");
473 /* Tell boot firmware to get ready for image */
474 WRITE_REG(sc, TXP_H2A_1, fileheader->addr);
475 WRITE_REG(sc, TXP_H2A_0, TXP_BOOTCMD_RUNTIME_IMAGE);
477 if (txp_download_fw_wait(sc)) {
478 if_printf(&sc->sc_arpcom.ac_if, "fw wait failed, initial\n");
482 secthead = (struct txp_fw_section_header *)(((u_int8_t *)tc990image) +
483 sizeof(struct txp_fw_file_header));
485 for (sect = 0; sect < fileheader->nsections; sect++) {
486 if (txp_download_fw_section(sc, secthead, sect))
488 secthead = (struct txp_fw_section_header *)
489 (((u_int8_t *)secthead) + secthead->nbytes +
493 WRITE_REG(sc, TXP_H2A_0, TXP_BOOTCMD_DOWNLOAD_COMPLETE);
495 for (i = 0; i < 10000; i++) {
496 r = READ_REG(sc, TXP_A2H_0);
497 if (r == STAT_WAITING_FOR_BOOT)
501 if (r != STAT_WAITING_FOR_BOOT) {
502 if_printf(&sc->sc_arpcom.ac_if, "not waiting for boot\n");
506 WRITE_REG(sc, TXP_IER, ier);
507 WRITE_REG(sc, TXP_IMR, imr);
513 txp_download_fw_wait(struct txp_softc *sc)
517 for (i = 0; i < 10000; i++) {
518 r = READ_REG(sc, TXP_ISR);
519 if (r & TXP_INT_A2H_0)
524 if (!(r & TXP_INT_A2H_0)) {
525 if_printf(&sc->sc_arpcom.ac_if, "fw wait failed comm0\n");
529 WRITE_REG(sc, TXP_ISR, TXP_INT_A2H_0);
531 r = READ_REG(sc, TXP_A2H_0);
532 if (r != STAT_WAITING_FOR_SEGMENT) {
533 if_printf(&sc->sc_arpcom.ac_if, "fw not waiting for segment\n");
540 txp_download_fw_section(struct txp_softc *sc,
541 struct txp_fw_section_header *sect, int sectnum)
548 /* Skip zero length sections */
549 if (sect->nbytes == 0)
552 /* Make sure we aren't past the end of the image */
553 rseg = ((u_int8_t *)sect) - ((u_int8_t *)tc990image);
554 if (rseg >= sizeof(tc990image)) {
555 if_printf(&sc->sc_arpcom.ac_if, "fw invalid section address, "
556 "section %d\n", sectnum);
560 /* Make sure this section doesn't go past the end */
561 rseg += sect->nbytes;
562 if (rseg >= sizeof(tc990image)) {
563 if_printf(&sc->sc_arpcom.ac_if, "fw truncated section %d\n",
568 bcopy(((u_int8_t *)sect) + sizeof(*sect), sc->sc_fwbuf, sect->nbytes);
569 dma = vtophys(sc->sc_fwbuf);
572 * dummy up mbuf and verify section checksum
575 m.m_next = m.m_nextpkt = NULL;
576 m.m_len = sect->nbytes;
577 m.m_data = sc->sc_fwbuf;
579 csum = in_cksum(&m, sect->nbytes);
580 if (csum != sect->cksum) {
581 if_printf(&sc->sc_arpcom.ac_if, "fw section %d, bad "
582 "cksum (expected 0x%x got 0x%x)\n",
583 sectnum, sect->cksum, csum);
588 WRITE_REG(sc, TXP_H2A_1, sect->nbytes);
589 WRITE_REG(sc, TXP_H2A_2, sect->cksum);
590 WRITE_REG(sc, TXP_H2A_3, sect->addr);
591 WRITE_REG(sc, TXP_H2A_4, 0);
592 WRITE_REG(sc, TXP_H2A_5, dma & 0xffffffff);
593 WRITE_REG(sc, TXP_H2A_0, TXP_BOOTCMD_SEGMENT_AVAILABLE);
595 if (txp_download_fw_wait(sc)) {
596 if_printf(&sc->sc_arpcom.ac_if, "fw wait failed, "
597 "section %d\n", sectnum);
608 struct txp_softc *sc = vsc;
609 struct txp_hostvar *hv = sc->sc_hostvar;
612 /* mask all interrupts */
613 WRITE_REG(sc, TXP_IMR, TXP_INT_RESERVED | TXP_INT_SELF |
614 TXP_INT_A2H_7 | TXP_INT_A2H_6 | TXP_INT_A2H_5 | TXP_INT_A2H_4 |
615 TXP_INT_A2H_2 | TXP_INT_A2H_1 | TXP_INT_A2H_0 |
616 TXP_INT_DMA3 | TXP_INT_DMA2 | TXP_INT_DMA1 | TXP_INT_DMA0 |
617 TXP_INT_PCI_TABORT | TXP_INT_PCI_MABORT | TXP_INT_LATCH);
619 isr = READ_REG(sc, TXP_ISR);
621 WRITE_REG(sc, TXP_ISR, isr);
623 if ((*sc->sc_rxhir.r_roff) != (*sc->sc_rxhir.r_woff))
624 txp_rx_reclaim(sc, &sc->sc_rxhir);
625 if ((*sc->sc_rxlor.r_roff) != (*sc->sc_rxlor.r_woff))
626 txp_rx_reclaim(sc, &sc->sc_rxlor);
628 if (hv->hv_rx_buf_write_idx == hv->hv_rx_buf_read_idx)
629 txp_rxbuf_reclaim(sc);
631 if (sc->sc_txhir.r_cnt && (sc->sc_txhir.r_cons !=
632 TXP_OFFSET2IDX(*(sc->sc_txhir.r_off))))
633 txp_tx_reclaim(sc, &sc->sc_txhir);
635 if (sc->sc_txlor.r_cnt && (sc->sc_txlor.r_cons !=
636 TXP_OFFSET2IDX(*(sc->sc_txlor.r_off))))
637 txp_tx_reclaim(sc, &sc->sc_txlor);
639 isr = READ_REG(sc, TXP_ISR);
642 /* unmask all interrupts */
643 WRITE_REG(sc, TXP_IMR, TXP_INT_A2H_3);
645 txp_start(&sc->sc_arpcom.ac_if);
651 txp_rx_reclaim(struct txp_softc *sc, struct txp_rx_ring *r)
653 struct ifnet *ifp = &sc->sc_arpcom.ac_if;
654 struct txp_rx_desc *rxd;
656 struct txp_swdesc *sd = NULL;
657 u_int32_t roff, woff;
661 rxd = r->r_desc + (roff / sizeof(struct txp_rx_desc));
663 while (roff != woff) {
665 if (rxd->rx_flags & RX_FLAGS_ERROR) {
666 if_printf(ifp, "error 0x%x\n", rxd->rx_stat);
671 /* retrieve stashed pointer */
677 m->m_pkthdr.len = m->m_len = rxd->rx_len;
679 #ifdef __STRICT_ALIGNMENT
682 * XXX Nice chip, except it won't accept "off by 2"
683 * buffers, so we're force to copy. Supposedly
684 * this will be fixed in a newer firmware rev
685 * and this will be temporary.
689 MGETHDR(mnew, MB_DONTWAIT, MT_DATA);
694 if (m->m_len > (MHLEN - 2)) {
695 MCLGET(mnew, MB_DONTWAIT);
696 if (!(mnew->m_flags & M_EXT)) {
702 mnew->m_pkthdr.rcvif = ifp;
704 mnew->m_pkthdr.len = mnew->m_len = m->m_len;
705 m_copydata(m, 0, m->m_pkthdr.len, mtod(mnew, caddr_t));
711 if (rxd->rx_stat & RX_STAT_IPCKSUMBAD)
712 m->m_pkthdr.csum_flags |= CSUM_IP_CHECKED;
713 else if (rxd->rx_stat & RX_STAT_IPCKSUMGOOD)
714 m->m_pkthdr.csum_flags |=
715 CSUM_IP_CHECKED|CSUM_IP_VALID;
717 if ((rxd->rx_stat & RX_STAT_TCPCKSUMGOOD) ||
718 (rxd->rx_stat & RX_STAT_UDPCKSUMGOOD)) {
719 m->m_pkthdr.csum_flags |=
720 CSUM_DATA_VALID|CSUM_PSEUDO_HDR;
721 m->m_pkthdr.csum_data = 0xffff;
724 lwkt_serialize_enter(ifp->if_serializer);
725 if (rxd->rx_stat & RX_STAT_VLAN)
726 VLAN_INPUT_TAG(m, htons(rxd->rx_vlan >> 16));
728 ifp->if_input(ifp, m);
729 lwkt_serialize_exit(ifp->if_serializer);
733 roff += sizeof(struct txp_rx_desc);
734 if (roff == (RX_ENTRIES * sizeof(struct txp_rx_desc))) {
748 txp_rxbuf_reclaim(struct txp_softc *sc)
750 struct ifnet *ifp = &sc->sc_arpcom.ac_if;
751 struct txp_hostvar *hv = sc->sc_hostvar;
752 struct txp_rxbuf_desc *rbd;
753 struct txp_swdesc *sd;
756 if (!(ifp->if_flags & IFF_RUNNING))
759 i = sc->sc_rxbufprod;
760 rbd = sc->sc_rxbufs + i;
764 if (sd->sd_mbuf != NULL)
767 MGETHDR(sd->sd_mbuf, MB_DONTWAIT, MT_DATA);
768 if (sd->sd_mbuf == NULL)
771 MCLGET(sd->sd_mbuf, MB_DONTWAIT);
772 if ((sd->sd_mbuf->m_flags & M_EXT) == 0)
774 sd->sd_mbuf->m_pkthdr.rcvif = ifp;
775 sd->sd_mbuf->m_pkthdr.len = sd->sd_mbuf->m_len = MCLBYTES;
777 rbd->rb_paddrlo = vtophys(mtod(sd->sd_mbuf, vm_offset_t))
781 hv->hv_rx_buf_write_idx = TXP_IDX2OFFSET(i);
783 if (++i == RXBUF_ENTRIES) {
790 sc->sc_rxbufprod = i;
795 m_freem(sd->sd_mbuf);
801 * Reclaim mbufs and entries from a transmit ring.
804 txp_tx_reclaim(struct txp_softc *sc, struct txp_tx_ring *r)
806 struct ifnet *ifp = &sc->sc_arpcom.ac_if;
807 u_int32_t idx = TXP_OFFSET2IDX(*(r->r_off));
808 u_int32_t cons = r->r_cons, cnt = r->r_cnt;
809 struct txp_tx_desc *txd = r->r_desc + cons;
810 struct txp_swdesc *sd = sc->sc_txd + cons;
813 while (cons != idx) {
817 if ((txd->tx_flags & TX_FLAGS_TYPE_M) ==
818 TX_FLAGS_TYPE_DATA) {
827 ifp->if_flags &= ~IFF_OACTIVE;
829 if (++cons == TX_ENTRIES) {
848 txp_shutdown(device_t dev)
850 struct txp_softc *sc;
853 sc = device_get_softc(dev);
854 ifp = &sc->sc_arpcom.ac_if;
855 lwkt_serialize_enter(ifp->if_serializer);
857 /* mask all interrupts */
858 WRITE_REG(sc, TXP_IMR,
859 TXP_INT_SELF | TXP_INT_PCI_TABORT | TXP_INT_PCI_MABORT |
860 TXP_INT_DMA3 | TXP_INT_DMA2 | TXP_INT_DMA1 | TXP_INT_DMA0 |
863 txp_command(sc, TXP_CMD_TX_DISABLE, 0, 0, 0, NULL, NULL, NULL, 0);
864 txp_command(sc, TXP_CMD_RX_DISABLE, 0, 0, 0, NULL, NULL, NULL, 0);
865 txp_command(sc, TXP_CMD_HALT, 0, 0, 0, NULL, NULL, NULL, 0);
867 lwkt_serialize_exit(ifp->if_serializer);
872 txp_alloc_rings(struct txp_softc *sc)
874 struct txp_boot_record *boot;
875 struct txp_ldata *ld;
880 boot = &ld->txp_boot;
886 bzero(&ld->txp_hostvar, sizeof(struct txp_hostvar));
887 boot->br_hostvar_lo = vtophys(&ld->txp_hostvar);
888 boot->br_hostvar_hi = 0;
889 sc->sc_hostvar = (struct txp_hostvar *)&ld->txp_hostvar;
891 /* hi priority tx ring */
892 boot->br_txhipri_lo = vtophys(&ld->txp_txhiring);
893 boot->br_txhipri_hi = 0;
894 boot->br_txhipri_siz = TX_ENTRIES * sizeof(struct txp_tx_desc);
895 sc->sc_txhir.r_reg = TXP_H2A_1;
896 sc->sc_txhir.r_desc = (struct txp_tx_desc *)&ld->txp_txhiring;
897 sc->sc_txhir.r_cons = sc->sc_txhir.r_prod = sc->sc_txhir.r_cnt = 0;
898 sc->sc_txhir.r_off = &sc->sc_hostvar->hv_tx_hi_desc_read_idx;
900 /* lo priority tx ring */
901 boot->br_txlopri_lo = vtophys(&ld->txp_txloring);
902 boot->br_txlopri_hi = 0;
903 boot->br_txlopri_siz = TX_ENTRIES * sizeof(struct txp_tx_desc);
904 sc->sc_txlor.r_reg = TXP_H2A_3;
905 sc->sc_txlor.r_desc = (struct txp_tx_desc *)&ld->txp_txloring;
906 sc->sc_txlor.r_cons = sc->sc_txlor.r_prod = sc->sc_txlor.r_cnt = 0;
907 sc->sc_txlor.r_off = &sc->sc_hostvar->hv_tx_lo_desc_read_idx;
909 /* high priority rx ring */
910 boot->br_rxhipri_lo = vtophys(&ld->txp_rxhiring);
911 boot->br_rxhipri_hi = 0;
912 boot->br_rxhipri_siz = RX_ENTRIES * sizeof(struct txp_rx_desc);
913 sc->sc_rxhir.r_desc = (struct txp_rx_desc *)&ld->txp_rxhiring;
914 sc->sc_rxhir.r_roff = &sc->sc_hostvar->hv_rx_hi_read_idx;
915 sc->sc_rxhir.r_woff = &sc->sc_hostvar->hv_rx_hi_write_idx;
917 /* low priority rx ring */
918 boot->br_rxlopri_lo = vtophys(&ld->txp_rxloring);
919 boot->br_rxlopri_hi = 0;
920 boot->br_rxlopri_siz = RX_ENTRIES * sizeof(struct txp_rx_desc);
921 sc->sc_rxlor.r_desc = (struct txp_rx_desc *)&ld->txp_rxloring;
922 sc->sc_rxlor.r_roff = &sc->sc_hostvar->hv_rx_lo_read_idx;
923 sc->sc_rxlor.r_woff = &sc->sc_hostvar->hv_rx_lo_write_idx;
926 bzero(&ld->txp_cmdring, sizeof(struct txp_cmd_desc) * CMD_ENTRIES);
927 boot->br_cmd_lo = vtophys(&ld->txp_cmdring);
929 boot->br_cmd_siz = CMD_ENTRIES * sizeof(struct txp_cmd_desc);
930 sc->sc_cmdring.base = (struct txp_cmd_desc *)&ld->txp_cmdring;
931 sc->sc_cmdring.size = CMD_ENTRIES * sizeof(struct txp_cmd_desc);
932 sc->sc_cmdring.lastwrite = 0;
935 bzero(&ld->txp_rspring, sizeof(struct txp_rsp_desc) * RSP_ENTRIES);
936 boot->br_resp_lo = vtophys(&ld->txp_rspring);
937 boot->br_resp_hi = 0;
938 boot->br_resp_siz = CMD_ENTRIES * sizeof(struct txp_rsp_desc);
939 sc->sc_rspring.base = (struct txp_rsp_desc *)&ld->txp_rspring;
940 sc->sc_rspring.size = RSP_ENTRIES * sizeof(struct txp_rsp_desc);
941 sc->sc_rspring.lastwrite = 0;
943 /* receive buffer ring */
944 boot->br_rxbuf_lo = vtophys(&ld->txp_rxbufs);
945 boot->br_rxbuf_hi = 0;
946 boot->br_rxbuf_siz = RXBUF_ENTRIES * sizeof(struct txp_rxbuf_desc);
947 sc->sc_rxbufs = (struct txp_rxbuf_desc *)&ld->txp_rxbufs;
949 for (i = 0; i < RXBUF_ENTRIES; i++) {
950 struct txp_swdesc *sd;
951 if (sc->sc_rxbufs[i].rb_sd != NULL)
953 sc->sc_rxbufs[i].rb_sd = kmalloc(sizeof(struct txp_swdesc),
955 if (sc->sc_rxbufs[i].rb_sd == NULL)
957 sd = sc->sc_rxbufs[i].rb_sd;
960 sc->sc_rxbufprod = 0;
963 bzero(&ld->txp_zero, sizeof(u_int32_t));
964 boot->br_zero_lo = vtophys(&ld->txp_zero);
965 boot->br_zero_hi = 0;
967 /* See if it's waiting for boot, and try to boot it */
968 for (i = 0; i < 10000; i++) {
969 r = READ_REG(sc, TXP_A2H_0);
970 if (r == STAT_WAITING_FOR_BOOT)
975 if (r != STAT_WAITING_FOR_BOOT) {
976 if_printf(&sc->sc_arpcom.ac_if, "not waiting for boot\n");
980 WRITE_REG(sc, TXP_H2A_2, 0);
981 WRITE_REG(sc, TXP_H2A_1, vtophys(sc->sc_boot));
982 WRITE_REG(sc, TXP_H2A_0, TXP_BOOTCMD_REGISTER_BOOT_RECORD);
984 /* See if it booted */
985 for (i = 0; i < 10000; i++) {
986 r = READ_REG(sc, TXP_A2H_0);
987 if (r == STAT_RUNNING)
991 if (r != STAT_RUNNING) {
992 if_printf(&sc->sc_arpcom.ac_if, "fw not running\n");
996 /* Clear TX and CMD ring write registers */
997 WRITE_REG(sc, TXP_H2A_1, TXP_BOOTCMD_NULL);
998 WRITE_REG(sc, TXP_H2A_2, TXP_BOOTCMD_NULL);
999 WRITE_REG(sc, TXP_H2A_3, TXP_BOOTCMD_NULL);
1000 WRITE_REG(sc, TXP_H2A_0, TXP_BOOTCMD_NULL);
1006 txp_ioctl(struct ifnet *ifp, u_long command, caddr_t data, struct ucred *cr)
1008 struct txp_softc *sc = ifp->if_softc;
1009 struct ifreq *ifr = (struct ifreq *)data;
1014 if (ifp->if_flags & IFF_UP) {
1017 if (ifp->if_flags & IFF_RUNNING)
1024 * Multicast list has changed; set the hardware
1025 * filter accordingly.
1032 error = ifmedia_ioctl(ifp, ifr, &sc->sc_ifmedia, command);
1035 error = ether_ioctl(ifp, command, data);
1042 txp_rxring_fill(struct txp_softc *sc)
1046 struct txp_swdesc *sd;
1048 ifp = &sc->sc_arpcom.ac_if;
1050 for (i = 0; i < RXBUF_ENTRIES; i++) {
1051 sd = sc->sc_rxbufs[i].rb_sd;
1052 MGETHDR(sd->sd_mbuf, MB_DONTWAIT, MT_DATA);
1053 if (sd->sd_mbuf == NULL)
1056 MCLGET(sd->sd_mbuf, MB_DONTWAIT);
1057 if ((sd->sd_mbuf->m_flags & M_EXT) == 0) {
1058 m_freem(sd->sd_mbuf);
1061 sd->sd_mbuf->m_pkthdr.len = sd->sd_mbuf->m_len = MCLBYTES;
1062 sd->sd_mbuf->m_pkthdr.rcvif = ifp;
1064 sc->sc_rxbufs[i].rb_paddrlo =
1065 vtophys(mtod(sd->sd_mbuf, vm_offset_t));
1066 sc->sc_rxbufs[i].rb_paddrhi = 0;
1069 sc->sc_hostvar->hv_rx_buf_write_idx = (RXBUF_ENTRIES - 1) *
1070 sizeof(struct txp_rxbuf_desc);
1076 txp_rxring_empty(struct txp_softc *sc)
1079 struct txp_swdesc *sd;
1081 if (sc->sc_rxbufs == NULL)
1084 for (i = 0; i < RXBUF_ENTRIES; i++) {
1085 if (&sc->sc_rxbufs[i] == NULL)
1087 sd = sc->sc_rxbufs[i].rb_sd;
1090 if (sd->sd_mbuf != NULL) {
1091 m_freem(sd->sd_mbuf);
1102 struct txp_softc *sc;
1108 ifp = &sc->sc_arpcom.ac_if;
1110 if (ifp->if_flags & IFF_RUNNING)
1115 txp_command(sc, TXP_CMD_MAX_PKT_SIZE_WRITE, TXP_MAX_PKTLEN, 0, 0,
1116 NULL, NULL, NULL, 1);
1118 /* Set station address. */
1119 ((u_int8_t *)&p1)[1] = sc->sc_arpcom.ac_enaddr[0];
1120 ((u_int8_t *)&p1)[0] = sc->sc_arpcom.ac_enaddr[1];
1121 ((u_int8_t *)&p2)[3] = sc->sc_arpcom.ac_enaddr[2];
1122 ((u_int8_t *)&p2)[2] = sc->sc_arpcom.ac_enaddr[3];
1123 ((u_int8_t *)&p2)[1] = sc->sc_arpcom.ac_enaddr[4];
1124 ((u_int8_t *)&p2)[0] = sc->sc_arpcom.ac_enaddr[5];
1125 txp_command(sc, TXP_CMD_STATION_ADDRESS_WRITE, p1, p2, 0,
1126 NULL, NULL, NULL, 1);
1130 txp_rxring_fill(sc);
1132 txp_command(sc, TXP_CMD_TX_ENABLE, 0, 0, 0, NULL, NULL, NULL, 1);
1133 txp_command(sc, TXP_CMD_RX_ENABLE, 0, 0, 0, NULL, NULL, NULL, 1);
1135 WRITE_REG(sc, TXP_IER, TXP_INT_RESERVED | TXP_INT_SELF |
1136 TXP_INT_A2H_7 | TXP_INT_A2H_6 | TXP_INT_A2H_5 | TXP_INT_A2H_4 |
1137 TXP_INT_A2H_2 | TXP_INT_A2H_1 | TXP_INT_A2H_0 |
1138 TXP_INT_DMA3 | TXP_INT_DMA2 | TXP_INT_DMA1 | TXP_INT_DMA0 |
1139 TXP_INT_PCI_TABORT | TXP_INT_PCI_MABORT | TXP_INT_LATCH);
1140 WRITE_REG(sc, TXP_IMR, TXP_INT_A2H_3);
1142 ifp->if_flags |= IFF_RUNNING;
1143 ifp->if_flags &= ~IFF_OACTIVE;
1146 callout_reset(&sc->txp_stat_timer, hz, txp_tick, sc);
1152 struct txp_softc *sc = vsc;
1153 struct ifnet *ifp = &sc->sc_arpcom.ac_if;
1154 struct txp_rsp_desc *rsp = NULL;
1155 struct txp_ext_desc *ext;
1157 lwkt_serialize_enter(ifp->if_serializer);
1158 txp_rxbuf_reclaim(sc);
1160 if (txp_command2(sc, TXP_CMD_READ_STATISTICS, 0, 0, 0, NULL, 0,
1163 if (rsp->rsp_numdesc != 6)
1165 if (txp_command(sc, TXP_CMD_CLEAR_STATISTICS, 0, 0, 0,
1166 NULL, NULL, NULL, 1))
1168 ext = (struct txp_ext_desc *)(rsp + 1);
1170 ifp->if_ierrors += ext[3].ext_2 + ext[3].ext_3 + ext[3].ext_4 +
1171 ext[4].ext_1 + ext[4].ext_4;
1172 ifp->if_oerrors += ext[0].ext_1 + ext[1].ext_1 + ext[1].ext_4 +
1174 ifp->if_collisions += ext[0].ext_2 + ext[0].ext_3 + ext[1].ext_2 +
1176 ifp->if_opackets += rsp->rsp_par2;
1177 ifp->if_ipackets += ext[2].ext_3;
1181 kfree(rsp, M_DEVBUF);
1183 callout_reset(&sc->txp_stat_timer, hz, txp_tick, sc);
1184 lwkt_serialize_exit(ifp->if_serializer);
1188 txp_start(struct ifnet *ifp)
1190 struct txp_softc *sc = ifp->if_softc;
1191 struct txp_tx_ring *r = &sc->sc_txhir;
1192 struct txp_tx_desc *txd;
1193 struct txp_frag_desc *fxd;
1194 struct mbuf *m, *m0;
1195 struct txp_swdesc *sd;
1196 u_int32_t firstprod, firstcnt, prod, cnt;
1199 if ((ifp->if_flags & (IFF_RUNNING | IFF_OACTIVE)) != IFF_RUNNING)
1206 m = ifq_poll(&ifp->if_snd);
1213 sd = sc->sc_txd + prod;
1216 if ((TX_ENTRIES - cnt) < 4)
1219 txd = r->r_desc + prod;
1221 txd->tx_flags = TX_FLAGS_TYPE_DATA;
1222 txd->tx_numdesc = 0;
1228 if (++prod == TX_ENTRIES)
1231 if (++cnt >= (TX_ENTRIES - 4))
1234 if ((m->m_flags & (M_PROTO1|M_PKTHDR)) == (M_PROTO1|M_PKTHDR) &&
1235 m->m_pkthdr.rcvif != NULL) {
1236 ifv = m->m_pkthdr.rcvif->if_softc;
1237 txd->tx_pflags = TX_PFLAGS_VLAN |
1238 (htons(ifv->ifv_tag) << TX_PFLAGS_VLANTAG_S);
1241 if (m->m_pkthdr.csum_flags & CSUM_IP)
1242 txd->tx_pflags |= TX_PFLAGS_IPCKSUM;
1245 if (m->m_pkthdr.csum_flags & CSUM_TCP)
1246 txd->tx_pflags |= TX_PFLAGS_TCPCKSUM;
1247 if (m->m_pkthdr.csum_flags & CSUM_UDP)
1248 txd->tx_pflags |= TX_PFLAGS_UDPCKSUM;
1251 fxd = (struct txp_frag_desc *)(r->r_desc + prod);
1252 for (m0 = m; m0 != NULL; m0 = m0->m_next) {
1255 if (++cnt >= (TX_ENTRIES - 4))
1260 fxd->frag_flags = FRAG_FLAGS_TYPE_FRAG;
1261 fxd->frag_rsvd1 = 0;
1262 fxd->frag_len = m0->m_len;
1263 fxd->frag_addrlo = vtophys(mtod(m0, vm_offset_t));
1264 fxd->frag_addrhi = 0;
1265 fxd->frag_rsvd2 = 0;
1267 if (++prod == TX_ENTRIES) {
1268 fxd = (struct txp_frag_desc *)r->r_desc;
1277 ifq_dequeue(&ifp->if_snd, m);
1279 WRITE_REG(sc, r->r_reg, TXP_IDX2OFFSET(prod));
1287 ifp->if_flags |= IFF_OACTIVE;
1288 r->r_prod = firstprod;
1289 r->r_cnt = firstcnt;
1294 * Handle simple commands sent to the typhoon
1297 txp_command(struct txp_softc *sc, u_int16_t id, u_int16_t in1, u_int32_t in2,
1298 u_int32_t in3, u_int16_t *out1, u_int32_t *out2, u_int32_t *out3,
1301 struct txp_rsp_desc *rsp = NULL;
1303 if (txp_command2(sc, id, in1, in2, in3, NULL, 0, &rsp, wait))
1310 *out1 = rsp->rsp_par1;
1312 *out2 = rsp->rsp_par2;
1314 *out3 = rsp->rsp_par3;
1315 kfree(rsp, M_DEVBUF);
1320 txp_command2(struct txp_softc *sc, u_int16_t id, u_int16_t in1, u_int32_t in2,
1321 u_int32_t in3, struct txp_ext_desc *in_extp, u_int8_t in_extn,
1322 struct txp_rsp_desc **rspp, int wait)
1324 struct txp_hostvar *hv = sc->sc_hostvar;
1325 struct txp_cmd_desc *cmd;
1326 struct txp_ext_desc *ext;
1330 if (txp_cmd_desc_numfree(sc) < (in_extn + 1)) {
1331 if_printf(&sc->sc_arpcom.ac_if, "no free cmd descriptors\n");
1335 idx = sc->sc_cmdring.lastwrite;
1336 cmd = (struct txp_cmd_desc *)(((u_int8_t *)sc->sc_cmdring.base) + idx);
1337 bzero(cmd, sizeof(*cmd));
1339 cmd->cmd_numdesc = in_extn;
1340 cmd->cmd_seq = seq = sc->sc_seq++;
1342 cmd->cmd_par1 = in1;
1343 cmd->cmd_par2 = in2;
1344 cmd->cmd_par3 = in3;
1345 cmd->cmd_flags = CMD_FLAGS_TYPE_CMD |
1346 (wait ? CMD_FLAGS_RESP : 0) | CMD_FLAGS_VALID;
1348 idx += sizeof(struct txp_cmd_desc);
1349 if (idx == sc->sc_cmdring.size)
1352 for (i = 0; i < in_extn; i++) {
1353 ext = (struct txp_ext_desc *)(((u_int8_t *)sc->sc_cmdring.base) + idx);
1354 bcopy(in_extp, ext, sizeof(struct txp_ext_desc));
1356 idx += sizeof(struct txp_cmd_desc);
1357 if (idx == sc->sc_cmdring.size)
1361 sc->sc_cmdring.lastwrite = idx;
1363 WRITE_REG(sc, TXP_H2A_2, sc->sc_cmdring.lastwrite);
1368 for (i = 0; i < 10000; i++) {
1369 idx = hv->hv_resp_read_idx;
1370 if (idx != hv->hv_resp_write_idx) {
1372 if (txp_response(sc, idx, id, seq, rspp))
1379 if (i == 1000 || (*rspp) == NULL) {
1380 if_printf(&sc->sc_arpcom.ac_if, "0x%x command failed\n", id);
1388 txp_response(struct txp_softc *sc, u_int32_t ridx, u_int16_t id, u_int16_t seq,
1389 struct txp_rsp_desc **rspp)
1391 struct txp_hostvar *hv = sc->sc_hostvar;
1392 struct txp_rsp_desc *rsp;
1394 while (ridx != hv->hv_resp_write_idx) {
1395 rsp = (struct txp_rsp_desc *)(((u_int8_t *)sc->sc_rspring.base) + ridx);
1397 if (id == rsp->rsp_id && rsp->rsp_seq == seq) {
1398 *rspp = (struct txp_rsp_desc *)kmalloc(
1399 sizeof(struct txp_rsp_desc) * (rsp->rsp_numdesc + 1),
1400 M_DEVBUF, M_INTWAIT);
1401 if ((*rspp) == NULL)
1403 txp_rsp_fixup(sc, rsp, *rspp);
1407 if (rsp->rsp_flags & RSP_FLAGS_ERROR) {
1408 if_printf(&sc->sc_arpcom.ac_if, "response error!\n");
1409 txp_rsp_fixup(sc, rsp, NULL);
1410 ridx = hv->hv_resp_read_idx;
1414 switch (rsp->rsp_id) {
1415 case TXP_CMD_CYCLE_STATISTICS:
1416 case TXP_CMD_MEDIA_STATUS_READ:
1418 case TXP_CMD_HELLO_RESPONSE:
1419 if_printf(&sc->sc_arpcom.ac_if, "hello\n");
1422 if_printf(&sc->sc_arpcom.ac_if, "unknown id(0x%x)\n",
1426 txp_rsp_fixup(sc, rsp, NULL);
1427 ridx = hv->hv_resp_read_idx;
1428 hv->hv_resp_read_idx = ridx;
1435 txp_rsp_fixup(struct txp_softc *sc, struct txp_rsp_desc *rsp,
1436 struct txp_rsp_desc *dst)
1438 struct txp_rsp_desc *src = rsp;
1439 struct txp_hostvar *hv = sc->sc_hostvar;
1442 ridx = hv->hv_resp_read_idx;
1444 for (i = 0; i < rsp->rsp_numdesc + 1; i++) {
1446 bcopy(src, dst++, sizeof(struct txp_rsp_desc));
1447 ridx += sizeof(struct txp_rsp_desc);
1448 if (ridx == sc->sc_rspring.size) {
1449 src = sc->sc_rspring.base;
1453 sc->sc_rspring.lastwrite = hv->hv_resp_read_idx = ridx;
1456 hv->hv_resp_read_idx = ridx;
1460 txp_cmd_desc_numfree(struct txp_softc *sc)
1462 struct txp_hostvar *hv = sc->sc_hostvar;
1463 struct txp_boot_record *br = sc->sc_boot;
1464 u_int32_t widx, ridx, nfree;
1466 widx = sc->sc_cmdring.lastwrite;
1467 ridx = hv->hv_cmd_read_idx;
1470 /* Ring is completely free */
1471 nfree = br->br_cmd_siz - sizeof(struct txp_cmd_desc);
1474 nfree = br->br_cmd_siz -
1475 (widx - ridx + sizeof(struct txp_cmd_desc));
1477 nfree = ridx - widx - sizeof(struct txp_cmd_desc);
1480 return (nfree / sizeof(struct txp_cmd_desc));
1484 txp_stop(struct txp_softc *sc)
1488 ifp = &sc->sc_arpcom.ac_if;
1490 ifp->if_flags &= ~(IFF_RUNNING | IFF_OACTIVE);
1492 callout_stop(&sc->txp_stat_timer);
1494 txp_command(sc, TXP_CMD_TX_DISABLE, 0, 0, 0, NULL, NULL, NULL, 1);
1495 txp_command(sc, TXP_CMD_RX_DISABLE, 0, 0, 0, NULL, NULL, NULL, 1);
1497 txp_rxring_empty(sc);
1503 txp_watchdog(struct ifnet *ifp)
1509 txp_ifmedia_upd(struct ifnet *ifp)
1511 struct txp_softc *sc = ifp->if_softc;
1512 struct ifmedia *ifm = &sc->sc_ifmedia;
1515 if (IFM_TYPE(ifm->ifm_media) != IFM_ETHER)
1518 if (IFM_SUBTYPE(ifm->ifm_media) == IFM_10_T) {
1519 if ((ifm->ifm_media & IFM_GMASK) == IFM_FDX)
1520 new_xcvr = TXP_XCVR_10_FDX;
1522 new_xcvr = TXP_XCVR_10_HDX;
1523 } else if (IFM_SUBTYPE(ifm->ifm_media) == IFM_100_TX) {
1524 if ((ifm->ifm_media & IFM_GMASK) == IFM_FDX)
1525 new_xcvr = TXP_XCVR_100_FDX;
1527 new_xcvr = TXP_XCVR_100_HDX;
1528 } else if (IFM_SUBTYPE(ifm->ifm_media) == IFM_AUTO) {
1529 new_xcvr = TXP_XCVR_AUTO;
1534 if (sc->sc_xcvr == new_xcvr)
1537 txp_command(sc, TXP_CMD_XCVR_SELECT, new_xcvr, 0, 0,
1538 NULL, NULL, NULL, 0);
1539 sc->sc_xcvr = new_xcvr;
1545 txp_ifmedia_sts(struct ifnet *ifp, struct ifmediareq *ifmr)
1547 struct txp_softc *sc = ifp->if_softc;
1548 struct ifmedia *ifm = &sc->sc_ifmedia;
1549 u_int16_t bmsr, bmcr, anlpar;
1551 ifmr->ifm_status = IFM_AVALID;
1552 ifmr->ifm_active = IFM_ETHER;
1554 if (txp_command(sc, TXP_CMD_PHY_MGMT_READ, 0, MII_BMSR, 0,
1555 &bmsr, NULL, NULL, 1))
1557 if (txp_command(sc, TXP_CMD_PHY_MGMT_READ, 0, MII_BMSR, 0,
1558 &bmsr, NULL, NULL, 1))
1561 if (txp_command(sc, TXP_CMD_PHY_MGMT_READ, 0, MII_BMCR, 0,
1562 &bmcr, NULL, NULL, 1))
1565 if (txp_command(sc, TXP_CMD_PHY_MGMT_READ, 0, MII_ANLPAR, 0,
1566 &anlpar, NULL, NULL, 1))
1569 if (bmsr & BMSR_LINK)
1570 ifmr->ifm_status |= IFM_ACTIVE;
1572 if (bmcr & BMCR_ISO) {
1573 ifmr->ifm_active |= IFM_NONE;
1574 ifmr->ifm_status = 0;
1578 if (bmcr & BMCR_LOOP)
1579 ifmr->ifm_active |= IFM_LOOP;
1581 if (bmcr & BMCR_AUTOEN) {
1582 if ((bmsr & BMSR_ACOMP) == 0) {
1583 ifmr->ifm_active |= IFM_NONE;
1587 if (anlpar & ANLPAR_T4)
1588 ifmr->ifm_active |= IFM_100_T4;
1589 else if (anlpar & ANLPAR_TX_FD)
1590 ifmr->ifm_active |= IFM_100_TX|IFM_FDX;
1591 else if (anlpar & ANLPAR_TX)
1592 ifmr->ifm_active |= IFM_100_TX;
1593 else if (anlpar & ANLPAR_10_FD)
1594 ifmr->ifm_active |= IFM_10_T|IFM_FDX;
1595 else if (anlpar & ANLPAR_10)
1596 ifmr->ifm_active |= IFM_10_T;
1598 ifmr->ifm_active |= IFM_NONE;
1600 ifmr->ifm_active = ifm->ifm_cur->ifm_media;
1604 ifmr->ifm_active |= IFM_NONE;
1605 ifmr->ifm_status &= ~IFM_AVALID;
1610 txp_show_descriptor(void *d)
1612 struct txp_cmd_desc *cmd = d;
1613 struct txp_rsp_desc *rsp = d;
1614 struct txp_tx_desc *txd = d;
1615 struct txp_frag_desc *frgd = d;
1617 switch (cmd->cmd_flags & CMD_FLAGS_TYPE_M) {
1618 case CMD_FLAGS_TYPE_CMD:
1619 /* command descriptor */
1620 printf("[cmd flags 0x%x num %d id %d seq %d par1 0x%x par2 0x%x par3 0x%x]\n",
1621 cmd->cmd_flags, cmd->cmd_numdesc, cmd->cmd_id, cmd->cmd_seq,
1622 cmd->cmd_par1, cmd->cmd_par2, cmd->cmd_par3);
1624 case CMD_FLAGS_TYPE_RESP:
1625 /* response descriptor */
1626 printf("[rsp flags 0x%x num %d id %d seq %d par1 0x%x par2 0x%x par3 0x%x]\n",
1627 rsp->rsp_flags, rsp->rsp_numdesc, rsp->rsp_id, rsp->rsp_seq,
1628 rsp->rsp_par1, rsp->rsp_par2, rsp->rsp_par3);
1630 case CMD_FLAGS_TYPE_DATA:
1631 /* data header (assuming tx for now) */
1632 printf("[data flags 0x%x num %d totlen %d addr 0x%x/0x%x pflags 0x%x]",
1633 txd->tx_flags, txd->tx_numdesc, txd->tx_totlen,
1634 txd->tx_addrlo, txd->tx_addrhi, txd->tx_pflags);
1636 case CMD_FLAGS_TYPE_FRAG:
1637 /* fragment descriptor */
1638 printf("[frag flags 0x%x rsvd1 0x%x len %d addr 0x%x/0x%x rsvd2 0x%x]",
1639 frgd->frag_flags, frgd->frag_rsvd1, frgd->frag_len,
1640 frgd->frag_addrlo, frgd->frag_addrhi, frgd->frag_rsvd2);
1643 printf("[unknown(%x) flags 0x%x num %d id %d seq %d par1 0x%x par2 0x%x par3 0x%x]\n",
1644 cmd->cmd_flags & CMD_FLAGS_TYPE_M,
1645 cmd->cmd_flags, cmd->cmd_numdesc, cmd->cmd_id, cmd->cmd_seq,
1646 cmd->cmd_par1, cmd->cmd_par2, cmd->cmd_par3);
1653 txp_set_filter(struct txp_softc *sc)
1655 struct ifnet *ifp = &sc->sc_arpcom.ac_if;
1657 struct ifmultiaddr *ifma;
1659 if (ifp->if_flags & IFF_PROMISC) {
1660 filter = TXP_RXFILT_PROMISC;
1664 filter = TXP_RXFILT_DIRECT;
1666 if (ifp->if_flags & IFF_BROADCAST)
1667 filter |= TXP_RXFILT_BROADCAST;
1669 if (ifp->if_flags & IFF_ALLMULTI) {
1670 filter |= TXP_RXFILT_ALLMULTI;
1672 uint32_t hashbit, hash[2];
1675 hash[0] = hash[1] = 0;
1677 LIST_FOREACH(ifma, &ifp->if_multiaddrs, ifma_link) {
1678 if (ifma->ifma_addr->sa_family != AF_LINK)
1682 hashbit = (uint16_t)(ether_crc32_be(
1683 LLADDR((struct sockaddr_dl *)ifma->ifma_addr),
1684 ETHER_ADDR_LEN) & (64 - 1));
1685 hash[hashbit / 32] |= (1 << hashbit % 32);
1689 filter |= TXP_RXFILT_HASHMULTI;
1690 txp_command(sc, TXP_CMD_MCAST_HASH_MASK_WRITE,
1691 2, hash[0], hash[1], NULL, NULL, NULL, 0);
1696 txp_command(sc, TXP_CMD_RX_FILTER_WRITE, filter, 0, 0,
1697 NULL, NULL, NULL, 1);
1701 txp_capabilities(struct txp_softc *sc)
1703 struct ifnet *ifp = &sc->sc_arpcom.ac_if;
1704 struct txp_rsp_desc *rsp = NULL;
1705 struct txp_ext_desc *ext;
1707 if (txp_command2(sc, TXP_CMD_OFFLOAD_READ, 0, 0, 0, NULL, 0, &rsp, 1))
1710 if (rsp->rsp_numdesc != 1)
1712 ext = (struct txp_ext_desc *)(rsp + 1);
1714 sc->sc_tx_capability = ext->ext_1 & OFFLOAD_MASK;
1715 sc->sc_rx_capability = ext->ext_2 & OFFLOAD_MASK;
1716 ifp->if_capabilities = 0;
1718 if (rsp->rsp_par2 & rsp->rsp_par3 & OFFLOAD_VLAN) {
1719 sc->sc_tx_capability |= OFFLOAD_VLAN;
1720 sc->sc_rx_capability |= OFFLOAD_VLAN;
1725 if (rsp->rsp_par2 & rsp->rsp_par3 & OFFLOAD_IPSEC) {
1726 sc->sc_tx_capability |= OFFLOAD_IPSEC;
1727 sc->sc_rx_capability |= OFFLOAD_IPSEC;
1728 ifp->if_capabilities |= IFCAP_IPSEC;
1732 if (rsp->rsp_par2 & rsp->rsp_par3 & OFFLOAD_IPCKSUM) {
1733 sc->sc_tx_capability |= OFFLOAD_IPCKSUM;
1734 sc->sc_rx_capability |= OFFLOAD_IPCKSUM;
1735 ifp->if_capabilities |= IFCAP_HWCSUM;
1736 ifp->if_hwassist |= CSUM_IP;
1739 if (rsp->rsp_par2 & rsp->rsp_par3 & OFFLOAD_TCPCKSUM) {
1741 sc->sc_tx_capability |= OFFLOAD_TCPCKSUM;
1743 sc->sc_rx_capability |= OFFLOAD_TCPCKSUM;
1744 ifp->if_capabilities |= IFCAP_HWCSUM;
1747 if (rsp->rsp_par2 & rsp->rsp_par3 & OFFLOAD_UDPCKSUM) {
1749 sc->sc_tx_capability |= OFFLOAD_UDPCKSUM;
1751 sc->sc_rx_capability |= OFFLOAD_UDPCKSUM;
1752 ifp->if_capabilities |= IFCAP_HWCSUM;
1754 ifp->if_capenable = ifp->if_capabilities;
1756 if (txp_command(sc, TXP_CMD_OFFLOAD_WRITE, 0,
1757 sc->sc_tx_capability, sc->sc_rx_capability, NULL, NULL, NULL, 1))
1762 kfree(rsp, M_DEVBUF);