Do a major clean-up of the BUSDMA architecture. A large number of
[dragonfly.git] / sys / dev / raid / dpt / dpt_scsi.c
1 /*
2  *       Copyright (c) 1997 by Simon Shapiro
3  *       All Rights Reserved
4  *
5  * Redistribution and use in source and binary forms, with or without
6  * modification, are permitted provided that the following conditions
7  * are met:
8  * 1. Redistributions of source code must retain the above copyright
9  *    notice, this list of conditions, and the following disclaimer,
10  *    without modification, immediately at the beginning of the file.
11  * 2. Redistributions in binary form must reproduce the above copyright
12  *    notice, this list of conditions and the following disclaimer in the
13  *    documentation and/or other materials provided with the distribution.
14  * 3. The name of the author may not be used to endorse or promote products
15  *    derived from this software without specific prior written permission.
16  *
17  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
18  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
19  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
20  * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE FOR
21  * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
22  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
23  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
24  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
25  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
26  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
27  * SUCH DAMAGE.
28  */
29
30 /*
31  * dpt_scsi.c: SCSI dependant code for the DPT driver
32  *
33  * credits:     Assisted by Mike Neuffer in the early low level DPT code
34  *              Thanx to Mark Salyzyn of DPT for his assistance.
35  *              Special thanx to Justin Gibbs for invaluable help in
36  *              making this driver look and work like a FreeBSD component.
37  *              Last but not least, many thanx to UCB and the FreeBSD
38  *              team for creating and maintaining such a wonderful O/S.
39  *
40  * TODO:     * Add ISA probe code.
41  *           * Add driver-level RAID-0. This will allow interoperability with
42  *             NiceTry, M$-Doze, Win-Dog, Slowlaris, etc., in recognizing RAID
43  *             arrays that span controllers (Wow!).
44  */
45
46 #ident "$FreeBSD: src/sys/dev/dpt/dpt_scsi.c,v 1.28.2.3 2003/01/31 02:47:10 grog Exp $"
47 #ident "$DragonFly: src/sys/dev/raid/dpt/dpt_scsi.c,v 1.11 2006/10/25 20:56:01 dillon Exp $"
48
49 #define _DPT_C_
50
51 #include "opt_dpt.h"
52 #include <sys/param.h>
53 #include <sys/systm.h>
54 #include <sys/eventhandler.h>
55 #include <sys/malloc.h>
56 #include <sys/kernel.h>
57 #include <sys/bus.h>
58 #include <sys/thread2.h>
59
60 #include <machine/clock.h>
61
62 #include <bus/cam/cam.h>
63 #include <bus/cam/cam_ccb.h>
64 #include <bus/cam/cam_sim.h>
65 #include <bus/cam/cam_xpt_sim.h>
66 #include <bus/cam/cam_debug.h>
67 #include <bus/cam/scsi/scsi_all.h>
68 #include <bus/cam/scsi/scsi_message.h>
69
70 #include <vm/vm.h>
71 #include <vm/pmap.h>
72
73 #include "dpt.h"
74
75 /* dpt_isa.c, dpt_eisa.c, and dpt_pci.c need this in a central place */
76 int dpt_controllers_present;
77
78 u_long  dpt_unit;       /* Next unit number to use */
79
80 /* The linked list of softc structures */
81 struct dpt_softc_list dpt_softcs = TAILQ_HEAD_INITIALIZER(dpt_softcs);
82
83 #define microtime_now dpt_time_now()
84
85 #define dpt_inl(dpt, port)                              \
86         bus_space_read_4((dpt)->tag, (dpt)->bsh, port)
87 #define dpt_inb(dpt, port)                              \
88         bus_space_read_1((dpt)->tag, (dpt)->bsh, port)
89 #define dpt_outl(dpt, port, value)                      \
90         bus_space_write_4((dpt)->tag, (dpt)->bsh, port, value)
91 #define dpt_outb(dpt, port, value)                      \
92         bus_space_write_1((dpt)->tag, (dpt)->bsh, port, value)
93
94 /*
95  * These will have to be setup by parameters passed at boot/load time. For
96  * perfromance reasons, we make them constants for the time being.
97  */
98 #define dpt_min_segs    DPT_MAX_SEGS
99 #define dpt_max_segs    DPT_MAX_SEGS
100
101 /* Definitions for our use of the SIM private CCB area */
102 #define ccb_dccb_ptr spriv_ptr0
103 #define ccb_dpt_ptr spriv_ptr1
104
105 /* ================= Private Inline Function declarations ===================*/
106 static __inline int             dpt_just_reset(dpt_softc_t * dpt);
107 static __inline int             dpt_raid_busy(dpt_softc_t * dpt);
108 static __inline int             dpt_pio_wait (u_int32_t, u_int, u_int, u_int);
109 static __inline int             dpt_wait(dpt_softc_t *dpt, u_int bits,
110                                          u_int state);
111 static __inline struct dpt_ccb* dptgetccb(struct dpt_softc *dpt);
112 static __inline void            dptfreeccb(struct dpt_softc *dpt,
113                                            struct dpt_ccb *dccb);
114 static __inline u_int32_t       dptccbvtop(struct dpt_softc *dpt,
115                                            struct dpt_ccb *dccb);
116
117 static __inline int             dpt_send_immediate(dpt_softc_t *dpt,
118                                                    eata_ccb_t *cmd_block,
119                                                    u_int32_t cmd_busaddr,  
120                                                    u_int retries,
121                                                    u_int ifc, u_int code,
122                                                    u_int code2);
123
124 /* ==================== Private Function declarations =======================*/
125 static void             dptmapmem(void *arg, bus_dma_segment_t *segs,
126                                   int nseg, int error);
127
128 static struct sg_map_node*
129                         dptallocsgmap(struct dpt_softc *dpt);
130
131 static int              dptallocccbs(dpt_softc_t *dpt);
132
133 static int              dpt_get_conf(dpt_softc_t *dpt, dpt_ccb_t *dccb,
134                                      u_int32_t dccb_busaddr, u_int size,
135                                      u_int page, u_int target, int extent);
136 static void             dpt_detect_cache(dpt_softc_t *dpt, dpt_ccb_t *dccb,
137                                          u_int32_t dccb_busaddr,
138                                          u_int8_t *buff);
139
140 static void             dpt_poll(struct cam_sim *sim);
141
142 static void             dptexecuteccb(void *arg, bus_dma_segment_t *dm_segs,
143                                       int nseg, int error);
144
145 static void             dpt_action(struct cam_sim *sim, union ccb *ccb);
146
147 static int              dpt_send_eata_command(dpt_softc_t *dpt, eata_ccb_t *cmd,
148                                               u_int32_t cmd_busaddr,
149                                               u_int command, u_int retries,
150                                               u_int ifc, u_int code,
151                                               u_int code2);
152 static void             dptprocesserror(dpt_softc_t *dpt, dpt_ccb_t *dccb,
153                                         union ccb *ccb, u_int hba_stat,
154                                         u_int scsi_stat, u_int32_t resid);
155
156 static void             dpttimeout(void *arg);
157 static void             dptshutdown(void *arg, int howto);
158
159 /* ================= Private Inline Function definitions ====================*/
160 static __inline int
161 dpt_just_reset(dpt_softc_t * dpt)
162 {
163         if ((dpt_inb(dpt, 2) == 'D')
164          && (dpt_inb(dpt, 3) == 'P')
165          && (dpt_inb(dpt, 4) == 'T')
166          && (dpt_inb(dpt, 5) == 'H'))
167                 return (1);
168         else
169                 return (0);
170 }
171
172 static __inline int
173 dpt_raid_busy(dpt_softc_t * dpt)
174 {
175         if ((dpt_inb(dpt, 0) == 'D')
176          && (dpt_inb(dpt, 1) == 'P')
177          && (dpt_inb(dpt, 2) == 'T'))
178                 return (1);
179         else
180                 return (0);
181 }
182
183 static __inline int
184 dpt_pio_wait (u_int32_t base, u_int reg, u_int bits, u_int state)
185 {
186         int   i;
187         u_int c;
188
189         for (i = 0; i < 20000; i++) {   /* wait 20ms for not busy */
190                 c = inb(base + reg) & bits;
191                 if (!(c == state))
192                         return (0);
193                 else
194                         DELAY(50);
195         }
196         return (-1);
197 }
198
199 static __inline int
200 dpt_wait(dpt_softc_t *dpt, u_int bits, u_int state)
201 {
202         int   i;
203         u_int c;
204
205         for (i = 0; i < 20000; i++) {   /* wait 20ms for not busy */
206                 c = dpt_inb(dpt, HA_RSTATUS) & bits;
207                 if (c == state)
208                         return (0);
209                 else
210                         DELAY(50);
211         }
212         return (-1);
213 }
214
215 static __inline struct dpt_ccb*
216 dptgetccb(struct dpt_softc *dpt)
217 {
218         struct  dpt_ccb* dccb;
219
220         crit_enter();
221         if ((dccb = SLIST_FIRST(&dpt->free_dccb_list)) != NULL) {
222                 SLIST_REMOVE_HEAD(&dpt->free_dccb_list, links);
223                 dpt->free_dccbs--;
224         } else if (dpt->total_dccbs < dpt->max_dccbs) {
225                 dptallocccbs(dpt);
226                 dccb = SLIST_FIRST(&dpt->free_dccb_list);
227                 if (dccb == NULL)
228                         printf("dpt%d: Can't malloc DCCB\n", dpt->unit);
229                 else {
230                         SLIST_REMOVE_HEAD(&dpt->free_dccb_list, links);
231                         dpt->free_dccbs--;
232                 }
233         }
234         crit_exit();
235
236         return (dccb);
237 }
238
239 static __inline void
240 dptfreeccb(struct dpt_softc *dpt, struct dpt_ccb *dccb)
241 {
242         crit_enter();
243         if ((dccb->state & DCCB_ACTIVE) != 0)
244                 LIST_REMOVE(&dccb->ccb->ccb_h, sim_links.le);
245         if ((dccb->state & DCCB_RELEASE_SIMQ) != 0)
246                 dccb->ccb->ccb_h.status |= CAM_RELEASE_SIMQ;
247         else if (dpt->resource_shortage != 0
248          && (dccb->ccb->ccb_h.status & CAM_RELEASE_SIMQ) == 0) {
249                 dccb->ccb->ccb_h.status |= CAM_RELEASE_SIMQ;
250                 dpt->resource_shortage = FALSE;
251         }
252         dccb->state = DCCB_FREE;
253         SLIST_INSERT_HEAD(&dpt->free_dccb_list, dccb, links);
254         ++dpt->free_dccbs;
255         crit_exit();
256 }
257
258 static __inline u_int32_t
259 dptccbvtop(struct dpt_softc *dpt, struct dpt_ccb *dccb)
260 {
261         return (dpt->dpt_ccb_busbase
262               + (u_int32_t)((caddr_t)dccb - (caddr_t)dpt->dpt_dccbs));
263 }
264
265 static __inline struct dpt_ccb *
266 dptccbptov(struct dpt_softc *dpt, u_int32_t busaddr)
267 {
268         return (dpt->dpt_dccbs
269              +  ((struct dpt_ccb *)busaddr
270                - (struct dpt_ccb *)dpt->dpt_ccb_busbase));
271 }
272
273 /*
274  * Send a command for immediate execution by the DPT
275  * See above function for IMPORTANT notes.
276  */
277 static __inline int
278 dpt_send_immediate(dpt_softc_t *dpt, eata_ccb_t *cmd_block,
279                    u_int32_t cmd_busaddr, u_int retries,
280                    u_int ifc, u_int code, u_int code2)
281 {
282         return (dpt_send_eata_command(dpt, cmd_block, cmd_busaddr,
283                                       EATA_CMD_IMMEDIATE, retries, ifc,
284                                       code, code2));
285 }
286
287
288 /* ===================== Private Function definitions =======================*/
289 static void
290 dptmapmem(void *arg, bus_dma_segment_t *segs, int nseg, int error)
291 {
292         bus_addr_t *busaddrp;
293
294         busaddrp = (bus_addr_t *)arg;
295         *busaddrp = segs->ds_addr;
296 }
297
298 static struct sg_map_node *
299 dptallocsgmap(struct dpt_softc *dpt)
300 {
301         struct sg_map_node *sg_map;
302
303         sg_map = kmalloc(sizeof(*sg_map), M_DEVBUF, M_INTWAIT);
304
305         /* Allocate S/G space for the next batch of CCBS */
306         if (bus_dmamem_alloc(dpt->sg_dmat, (void **)&sg_map->sg_vaddr,
307                              BUS_DMA_NOWAIT, &sg_map->sg_dmamap) != 0) {
308                 kfree(sg_map, M_DEVBUF);
309                 return (NULL);
310         }
311
312         (void)bus_dmamap_load(dpt->sg_dmat, sg_map->sg_dmamap, sg_map->sg_vaddr,
313                               PAGE_SIZE, dptmapmem, &sg_map->sg_physaddr,
314                               /*flags*/0);
315
316         SLIST_INSERT_HEAD(&dpt->sg_maps, sg_map, links);
317
318         return (sg_map);
319 }
320
321 /*
322  * Allocate another chunk of CCB's. Return count of entries added.
323  * Assumed to be called at splcam().
324  */
325 static int
326 dptallocccbs(dpt_softc_t *dpt)
327 {
328         struct dpt_ccb *next_ccb;
329         struct sg_map_node *sg_map;
330         bus_addr_t physaddr;
331         dpt_sg_t *segs;
332         int newcount;
333         int i;
334
335         next_ccb = &dpt->dpt_dccbs[dpt->total_dccbs];
336
337         if (next_ccb == dpt->dpt_dccbs) {
338                 /*
339                  * First time through.  Re-use the S/G
340                  * space we allocated for initialization
341                  * CCBS.
342                  */
343                 sg_map = SLIST_FIRST(&dpt->sg_maps);
344         } else {
345                 sg_map = dptallocsgmap(dpt);
346         }
347
348         if (sg_map == NULL)
349                 return (0);
350
351         segs = sg_map->sg_vaddr;
352         physaddr = sg_map->sg_physaddr;
353
354         newcount = (PAGE_SIZE / (dpt->sgsize * sizeof(dpt_sg_t)));
355         for (i = 0; dpt->total_dccbs < dpt->max_dccbs && i < newcount; i++) {
356                 int error;
357
358                 error = bus_dmamap_create(dpt->buffer_dmat, /*flags*/0,
359                                           &next_ccb->dmamap);
360                 if (error != 0)
361                         break;
362                 next_ccb->sg_list = segs;
363                 next_ccb->sg_busaddr = htonl(physaddr);
364                 next_ccb->eata_ccb.cp_dataDMA = htonl(physaddr);
365                 next_ccb->eata_ccb.cp_statDMA = htonl(dpt->sp_physaddr);
366                 next_ccb->eata_ccb.cp_reqDMA =
367                     htonl(dptccbvtop(dpt, next_ccb)
368                         + offsetof(struct dpt_ccb, sense_data));
369                 next_ccb->eata_ccb.cp_busaddr = dpt->dpt_ccb_busend;
370                 next_ccb->state = DCCB_FREE;
371                 next_ccb->tag = dpt->total_dccbs;
372                 SLIST_INSERT_HEAD(&dpt->free_dccb_list, next_ccb, links);
373                 segs += dpt->sgsize;
374                 physaddr += (dpt->sgsize * sizeof(dpt_sg_t));
375                 dpt->dpt_ccb_busend += sizeof(*next_ccb);
376                 next_ccb++;
377                 dpt->total_dccbs++;
378         }
379         return (i);
380 }
381
382 dpt_conf_t *
383 dpt_pio_get_conf (u_int32_t base)
384 {
385         static dpt_conf_t *     conf;
386         u_int16_t *             p;
387         int                     i;
388
389         /*
390          * Allocate a dpt_conf_t
391          */
392         if (conf == NULL)
393                 conf = kmalloc(sizeof(dpt_conf_t), M_DEVBUF, M_INTWAIT);
394
395         /*
396          * If we have one, clean it up.
397          */
398         bzero(conf, sizeof(dpt_conf_t));
399
400         /*
401          * Reset the controller.
402          */
403         outb((base + HA_WCOMMAND), EATA_CMD_RESET);
404
405         /*
406          * Wait for the controller to become ready.
407          * For some reason there can be -no- delays after calling reset
408          * before we wait on ready status.
409          */
410         if (dpt_pio_wait(base, HA_RSTATUS, HA_SBUSY, 0)) {
411                 printf("dpt: timeout waiting for controller to become ready\n");
412                 return (NULL);
413         }
414
415         if (dpt_pio_wait(base, HA_RAUXSTAT, HA_ABUSY, 0)) {
416                 printf("dpt: timetout waiting for adapter ready.\n");
417                 return (NULL);
418         }
419
420         /*
421          * Send the PIO_READ_CONFIG command.
422          */
423         outb((base + HA_WCOMMAND), EATA_CMD_PIO_READ_CONFIG);
424
425         /*
426          * Read the data into the struct.
427          */
428         p = (u_int16_t *)conf;
429         for (i = 0; i < (sizeof(dpt_conf_t) / 2); i++) {
430
431                 if (dpt_pio_wait(base, HA_RSTATUS, HA_SDRQ, 0)) {
432                         printf("dpt: timeout in data read.\n");
433                         return (NULL);
434                 }
435
436                 (*p) = inw(base + HA_RDATA);
437                 p++;
438         }
439
440         if (inb(base + HA_RSTATUS) & HA_SERROR) {
441                 printf("dpt: error reading configuration data.\n");
442                 return (NULL);
443         }
444
445 #define BE_EATA_SIGNATURE       0x45415441
446 #define LE_EATA_SIGNATURE       0x41544145
447
448         /*
449          * Test to see if we have a valid card.
450          */
451         if ((conf->signature == BE_EATA_SIGNATURE) ||
452             (conf->signature == LE_EATA_SIGNATURE)) {
453
454                 while (inb(base + HA_RSTATUS) & HA_SDRQ) {
455                         inw(base + HA_RDATA);
456                 }
457
458                 return (conf);
459         }
460         return (NULL);
461 }
462
463 /*
464  * Read a configuration page into the supplied dpt_cont_t buffer.
465  */
466 static int
467 dpt_get_conf(dpt_softc_t *dpt, dpt_ccb_t *dccb, u_int32_t dccb_busaddr,
468              u_int size, u_int page, u_int target, int extent)
469 {
470         eata_ccb_t *cp;
471
472         u_int8_t   status;
473
474         int        ndx;
475         int        result;
476
477         cp = &dccb->eata_ccb;
478         bzero((void *)(uintptr_t)(volatile void *)dpt->sp, sizeof(*dpt->sp));
479
480         cp->Interpret = 1;
481         cp->DataIn = 1;
482         cp->Auto_Req_Sen = 1;
483         cp->reqlen = sizeof(struct scsi_sense_data);
484
485         cp->cp_id = target;
486         cp->cp_LUN = 0;         /* In the EATA packet */
487         cp->cp_lun = 0;         /* In the SCSI command */
488
489         cp->cp_scsi_cmd = INQUIRY;
490         cp->cp_len = size;
491
492         cp->cp_extent = extent;
493
494         cp->cp_page = page;
495         cp->cp_channel = 0;     /* DNC, Interpret mode is set */
496         cp->cp_identify = 1;
497         cp->cp_datalen = htonl(size);
498
499         crit_enter();
500
501         /*
502          * This could be a simple for loop, but we suspected the compiler To
503          * have optimized it a bit too much. Wait for the controller to
504          * become ready
505          */
506         while (((status = dpt_inb(dpt, HA_RSTATUS)) != (HA_SREADY | HA_SSC)
507              && (status != (HA_SREADY | HA_SSC | HA_SERROR))
508              && (status != (HA_SDRDY | HA_SERROR | HA_SDRQ)))
509             || (dpt_wait(dpt, HA_SBUSY, 0))) {
510
511                 /*
512                  * RAID Drives still Spinning up? (This should only occur if
513                  * the DPT controller is in a NON PC (PCI?) platform).
514                  */
515                 if (dpt_raid_busy(dpt)) {
516                         printf("dpt%d WARNING: Get_conf() RSUS failed.\n",
517                                dpt->unit);
518                         crit_exit();
519                         return (0);
520                 }
521         }
522
523         DptStat_Reset_BUSY(dpt->sp);
524
525         /*
526          * XXXX We might want to do something more clever than aborting at
527          * this point, like resetting (rebooting) the controller and trying
528          * again.
529          */
530         if ((result = dpt_send_eata_command(dpt, cp, dccb_busaddr,
531                                             EATA_CMD_DMA_SEND_CP,
532                                             10000, 0, 0, 0)) != 0) {
533                 printf("dpt%d WARNING: Get_conf() failed (%d) to send "
534                        "EATA_CMD_DMA_READ_CONFIG\n",
535                        dpt->unit, result);
536                 crit_exit();
537                 return (0);
538         }
539         /* Wait for two seconds for a response.  This can be slow  */
540         for (ndx = 0;
541              (ndx < 20000)
542              && !((status = dpt_inb(dpt, HA_RAUXSTAT)) & HA_AIRQ);
543              ndx++) {
544                 DELAY(50);
545         }
546
547         /* Grab the status and clear interrupts */
548         status = dpt_inb(dpt, HA_RSTATUS);
549
550         crit_exit();
551
552         /*
553          * Check the status carefully.  Return only if the
554          * command was successful.
555          */
556         if (((status & HA_SERROR) == 0)
557          && (dpt->sp->hba_stat == 0)
558          && (dpt->sp->scsi_stat == 0)
559          && (dpt->sp->residue_len == 0))
560                 return (0);
561
562         if (dpt->sp->scsi_stat == SCSI_STATUS_CHECK_COND)
563                 return (0);
564
565         return (1);
566 }
567
568 /* Detect Cache parameters and size */
569 static void
570 dpt_detect_cache(dpt_softc_t *dpt, dpt_ccb_t *dccb, u_int32_t dccb_busaddr,
571                  u_int8_t *buff)
572 {
573         eata_ccb_t *cp;
574         u_int8_t   *param;
575         int         bytes;
576         int         result;
577         int         ndx;
578         u_int8_t    status;
579
580         /*
581          * Default setting, for best perfromance..
582          * This is what virtually all cards default to..
583          */
584         dpt->cache_type = DPT_CACHE_WRITEBACK;
585         dpt->cache_size = 0;
586
587         cp = &dccb->eata_ccb;
588         bzero((void *)(uintptr_t)(volatile void *)dpt->sp, sizeof(dpt->sp));
589         bzero(buff, 512);
590
591         /* Setup the command structure */
592         cp->Interpret = 1;
593         cp->DataIn = 1;
594         cp->Auto_Req_Sen = 1;
595         cp->reqlen = sizeof(struct scsi_sense_data);
596
597         cp->cp_id = 0;          /* who cares?  The HBA will interpret.. */
598         cp->cp_LUN = 0;         /* In the EATA packet */
599         cp->cp_lun = 0;         /* In the SCSI command */
600         cp->cp_channel = 0;
601
602         cp->cp_scsi_cmd = EATA_CMD_DMA_SEND_CP;
603         cp->cp_len = 56;
604
605         cp->cp_extent = 0;
606         cp->cp_page = 0;
607         cp->cp_identify = 1;
608         cp->cp_dispri = 1;
609
610         /*
611          * Build the EATA Command Packet structure
612          * for a Log Sense Command.
613          */
614         cp->cp_cdb[0] = 0x4d;
615         cp->cp_cdb[1] = 0x0;
616         cp->cp_cdb[2] = 0x40 | 0x33;
617         cp->cp_cdb[7] = 1;
618
619         cp->cp_datalen = htonl(512);
620
621         crit_enter();
622         result = dpt_send_eata_command(dpt, cp, dccb_busaddr,
623                                        EATA_CMD_DMA_SEND_CP,
624                                        10000, 0, 0, 0);
625         if (result != 0) {
626                 printf("dpt%d WARNING: detect_cache() failed (%d) to send "
627                        "EATA_CMD_DMA_SEND_CP\n", dpt->unit, result);
628                 crit_exit();
629                 return;
630         }
631         /* Wait for two seconds for a response.  This can be slow... */
632         for (ndx = 0;
633              (ndx < 20000) &&
634              !((status = dpt_inb(dpt, HA_RAUXSTAT)) & HA_AIRQ);
635              ndx++) {
636                 DELAY(50);
637         }
638
639         /* Grab the status and clear interrupts */
640         status = dpt_inb(dpt, HA_RSTATUS);
641         crit_exit();
642
643         /*
644          * Sanity check
645          */
646         if (buff[0] != 0x33) {
647                 return;
648         }
649         bytes = DPT_HCP_LENGTH(buff);
650         param = DPT_HCP_FIRST(buff);
651
652         if (DPT_HCP_CODE(param) != 1) {
653                 /*
654                  * DPT Log Page layout error
655                  */
656                 printf("dpt%d: NOTICE: Log Page (1) layout error\n",
657                        dpt->unit);
658                 return;
659         }
660         if (!(param[4] & 0x4)) {
661                 dpt->cache_type = DPT_NO_CACHE;
662                 return;
663         }
664         while (DPT_HCP_CODE(param) != 6) {
665                 param = DPT_HCP_NEXT(param);
666                 if ((param < buff)
667                  || (param >= &buff[bytes])) {
668                         return;
669                 }
670         }
671
672         if (param[4] & 0x2) {
673                 /*
674                  * Cache disabled
675                  */
676                 dpt->cache_type = DPT_NO_CACHE;
677                 return;
678         }
679
680         if (param[4] & 0x4) {
681                 dpt->cache_type = DPT_CACHE_WRITETHROUGH;
682         }
683
684         /* XXX This isn't correct.  This log parameter only has two bytes.... */
685 #if 0
686         dpt->cache_size = param[5]
687                         | (param[6] << 8)
688                         | (param[7] << 16)
689                         | (param[8] << 24);
690 #endif
691 }
692
693 static void
694 dpt_poll(struct cam_sim *sim)
695 {
696         dpt_intr(cam_sim_softc(sim));
697 }
698
699 static void
700 dptexecuteccb(void *arg, bus_dma_segment_t *dm_segs, int nseg, int error)
701 {
702         struct   dpt_ccb *dccb;
703         union    ccb *ccb;
704         struct   dpt_softc *dpt;
705
706         dccb = (struct dpt_ccb *)arg;
707         ccb = dccb->ccb;
708         dpt = (struct dpt_softc *)ccb->ccb_h.ccb_dpt_ptr;
709
710         if (error != 0) {
711                 if (error != EFBIG)
712                         printf("dpt%d: Unexepected error 0x%x returned from "
713                                "bus_dmamap_load\n", dpt->unit, error);
714                 if (ccb->ccb_h.status == CAM_REQ_INPROG) {
715                         xpt_freeze_devq(ccb->ccb_h.path, /*count*/1);
716                         ccb->ccb_h.status = CAM_REQ_TOO_BIG|CAM_DEV_QFRZN;
717                 }
718                 dptfreeccb(dpt, dccb);
719                 xpt_done(ccb);
720                 return;
721         }
722                 
723         if (nseg != 0) {
724                 dpt_sg_t *sg;
725                 bus_dma_segment_t *end_seg;
726                 bus_dmasync_op_t op;
727
728                 end_seg = dm_segs + nseg;
729
730                 /* Copy the segments into our SG list */
731                 sg = dccb->sg_list;
732                 while (dm_segs < end_seg) {
733                         sg->seg_len = htonl(dm_segs->ds_len);
734                         sg->seg_addr = htonl(dm_segs->ds_addr);
735                         sg++;
736                         dm_segs++;
737                 }
738
739                 if (nseg > 1) {
740                         dccb->eata_ccb.scatter = 1;
741                         dccb->eata_ccb.cp_dataDMA = dccb->sg_busaddr;
742                         dccb->eata_ccb.cp_datalen =
743                             htonl(nseg * sizeof(dpt_sg_t));
744                 } else {
745                         dccb->eata_ccb.cp_dataDMA = dccb->sg_list[0].seg_addr;
746                         dccb->eata_ccb.cp_datalen = dccb->sg_list[0].seg_len;
747                 }
748
749                 if ((ccb->ccb_h.flags & CAM_DIR_MASK) == CAM_DIR_IN)
750                         op = BUS_DMASYNC_PREREAD;
751                 else
752                         op = BUS_DMASYNC_PREWRITE;
753
754                 bus_dmamap_sync(dpt->buffer_dmat, dccb->dmamap, op);
755
756         } else {
757                 dccb->eata_ccb.cp_dataDMA = 0;
758                 dccb->eata_ccb.cp_datalen = 0;
759         }
760
761         crit_enter();
762
763         /*
764          * Last time we need to check if this CCB needs to
765          * be aborted.
766          */
767         if (ccb->ccb_h.status != CAM_REQ_INPROG) {
768                 if (nseg != 0)
769                         bus_dmamap_unload(dpt->buffer_dmat, dccb->dmamap);
770                 dptfreeccb(dpt, dccb);
771                 xpt_done(ccb);
772                 crit_exit();
773                 return;
774         }
775                 
776         dccb->state |= DCCB_ACTIVE;
777         ccb->ccb_h.status |= CAM_SIM_QUEUED;
778         LIST_INSERT_HEAD(&dpt->pending_ccb_list, &ccb->ccb_h, sim_links.le);
779         callout_reset(&ccb->ccb_h.timeout_ch, (ccb->ccb_h.timeout * hz) / 1000,
780                       dpttimeout, dccb);
781         if (dpt_send_eata_command(dpt, &dccb->eata_ccb,
782                                   dccb->eata_ccb.cp_busaddr,
783                                   EATA_CMD_DMA_SEND_CP, 0, 0, 0, 0) != 0) {
784                 ccb->ccb_h.status = CAM_NO_HBA; /* HBA dead or just busy?? */
785                 if (nseg != 0)
786                         bus_dmamap_unload(dpt->buffer_dmat, dccb->dmamap);
787                 dptfreeccb(dpt, dccb);
788                 xpt_done(ccb);
789         }
790
791         crit_exit();
792 }
793
794 static void
795 dpt_action(struct cam_sim *sim, union ccb *ccb)
796 {
797         struct    dpt_softc *dpt;
798
799         CAM_DEBUG(ccb->ccb_h.path, CAM_DEBUG_TRACE, ("dpt_action\n"));
800         
801         dpt = (struct dpt_softc *)cam_sim_softc(sim);
802
803         if ((dpt->state & DPT_HA_SHUTDOWN_ACTIVE) != 0) {
804                 xpt_print_path(ccb->ccb_h.path);
805                 printf("controller is shutdown. Aborting CCB.\n");
806                 ccb->ccb_h.status = CAM_NO_HBA;
807                 xpt_done(ccb);
808                 return;
809         }
810
811         switch (ccb->ccb_h.func_code) {
812         /* Common cases first */
813         case XPT_SCSI_IO:       /* Execute the requested I/O operation */
814         {
815                 struct  ccb_scsiio *csio;
816                 struct  ccb_hdr *ccbh;
817                 struct  dpt_ccb *dccb;
818                 struct  eata_ccb *eccb;
819
820                 csio = &ccb->csio;
821                 ccbh = &ccb->ccb_h;
822                 /* Max CDB length is 12 bytes */
823                 if (csio->cdb_len > 12) { 
824                         ccb->ccb_h.status = CAM_REQ_INVALID;
825                         xpt_done(ccb);
826                         return;
827                 }
828                 if ((dccb = dptgetccb(dpt)) == NULL) {
829                         crit_enter();
830                         dpt->resource_shortage = 1;
831                         crit_exit();
832                         xpt_freeze_simq(sim, /*count*/1);
833                         ccb->ccb_h.status = CAM_REQUEUE_REQ;
834                         xpt_done(ccb);
835                         return;
836                 }
837                 eccb = &dccb->eata_ccb;
838
839                 /* Link dccb and ccb so we can find one from the other */
840                 dccb->ccb = ccb;
841                 ccb->ccb_h.ccb_dccb_ptr = dccb;
842                 ccb->ccb_h.ccb_dpt_ptr = dpt;
843
844                 /*
845                  * Explicitly set all flags so that the compiler can
846                  * be smart about setting them.
847                  */
848                 eccb->SCSI_Reset = 0;
849                 eccb->HBA_Init = 0;
850                 eccb->Auto_Req_Sen = (ccb->ccb_h.flags & CAM_DIS_AUTOSENSE)
851                                    ? 0 : 1;
852                 eccb->scatter = 0;
853                 eccb->Quick = 0;
854                 eccb->Interpret =
855                     ccb->ccb_h.target_id == dpt->hostid[cam_sim_bus(sim)]
856                     ? 1 : 0;
857                 eccb->DataOut = (ccb->ccb_h.flags & CAM_DIR_OUT) ? 1 : 0;
858                 eccb->DataIn = (ccb->ccb_h.flags & CAM_DIR_IN) ? 1 : 0;
859                 eccb->reqlen = csio->sense_len;
860                 eccb->cp_id = ccb->ccb_h.target_id;
861                 eccb->cp_channel = cam_sim_bus(sim);
862                 eccb->cp_LUN = ccb->ccb_h.target_lun;
863                 eccb->cp_luntar = 0;
864                 eccb->cp_dispri = (ccb->ccb_h.flags & CAM_DIS_DISCONNECT)
865                                 ? 0 : 1;
866                 eccb->cp_identify = 1;
867
868                 if ((ccb->ccb_h.flags & CAM_TAG_ACTION_VALID) != 0
869                  && csio->tag_action != CAM_TAG_ACTION_NONE) {
870                         eccb->cp_msg[0] = csio->tag_action;
871                         eccb->cp_msg[1] = dccb->tag;
872                 } else {
873                         eccb->cp_msg[0] = 0;
874                         eccb->cp_msg[1] = 0;
875                 }
876                 eccb->cp_msg[2] = 0;
877
878                 if ((ccb->ccb_h.flags & CAM_CDB_POINTER) != 0) {
879                         if ((ccb->ccb_h.flags & CAM_CDB_PHYS) == 0) {
880                                 bcopy(csio->cdb_io.cdb_ptr,
881                                       eccb->cp_cdb, csio->cdb_len);
882                         } else {
883                                 /* I guess I could map it in... */
884                                 ccb->ccb_h.status = CAM_REQ_INVALID;
885                                 dptfreeccb(dpt, dccb);
886                                 xpt_done(ccb);
887                                 return;
888                         }
889                 } else {
890                         bcopy(csio->cdb_io.cdb_bytes,
891                               eccb->cp_cdb, csio->cdb_len);
892                 }
893                 /*
894                  * If we have any data to send with this command,
895                  * map it into bus space.
896                  */
897                 /* Only use S/G if there is a transfer */
898                 if ((ccbh->flags & CAM_DIR_MASK) != CAM_DIR_NONE) {
899                         if ((ccbh->flags & CAM_SCATTER_VALID) == 0) {
900                                 /*
901                                  * We've been given a pointer
902                                  * to a single buffer.
903                                  */
904                                 if ((ccbh->flags & CAM_DATA_PHYS) == 0) {
905                                         int error;
906
907                                         crit_enter();
908                                         error =
909                                             bus_dmamap_load(dpt->buffer_dmat,
910                                                             dccb->dmamap,
911                                                             csio->data_ptr,
912                                                             csio->dxfer_len,
913                                                             dptexecuteccb,
914                                                             dccb, /*flags*/0);
915                                         if (error == EINPROGRESS) {
916                                                 /*
917                                                  * So as to maintain ordering,
918                                                  * freeze the controller queue
919                                                  * until our mapping is
920                                                  * returned.
921                                                  */
922                                                 xpt_freeze_simq(sim, 1);
923                                                 dccb->state |= CAM_RELEASE_SIMQ;
924                                         }
925                                         crit_exit();
926                                 } else {
927                                         struct bus_dma_segment seg; 
928
929                                         /* Pointer to physical buffer */
930                                         seg.ds_addr =
931                                             (bus_addr_t)csio->data_ptr;
932                                         seg.ds_len = csio->dxfer_len;
933                                         dptexecuteccb(dccb, &seg, 1, 0);
934                                 }
935                         } else {
936                                 struct bus_dma_segment *segs;
937
938                                 if ((ccbh->flags & CAM_DATA_PHYS) != 0)
939                                         panic("dpt_action - Physical "
940                                               "segment pointers "
941                                               "unsupported");
942
943                                 if ((ccbh->flags&CAM_SG_LIST_PHYS)==0)
944                                         panic("dpt_action - Virtual "
945                                               "segment addresses "
946                                               "unsupported");
947
948                                 /* Just use the segments provided */
949                                 segs = (struct bus_dma_segment *)csio->data_ptr;
950                                 dptexecuteccb(dccb, segs, csio->sglist_cnt, 0);
951                         }
952                 } else {
953                         /*
954                          * XXX JGibbs.
955                          * Does it want them both on or both off?
956                          * CAM_DIR_NONE is both on, so this code can
957                          * be removed if this is also what the DPT
958                          * exptects.
959                          */
960                         eccb->DataOut = 0;
961                         eccb->DataIn = 0;
962                         dptexecuteccb(dccb, NULL, 0, 0);
963                 }
964                 break;
965         }
966         case XPT_RESET_DEV:     /* Bus Device Reset the specified SCSI device */
967         case XPT_ABORT:                 /* Abort the specified CCB */
968                 /* XXX Implement */
969                 ccb->ccb_h.status = CAM_REQ_INVALID;
970                 xpt_done(ccb);
971                 break;
972         case XPT_SET_TRAN_SETTINGS:
973         {
974                 ccb->ccb_h.status = CAM_FUNC_NOTAVAIL;
975                 xpt_done(ccb);  
976                 break;
977         }
978         case XPT_GET_TRAN_SETTINGS:
979         /* Get default/user set transfer settings for the target */
980         {
981                 struct  ccb_trans_settings *cts;
982                 u_int   target_mask;
983  
984                 cts = &ccb->cts;
985                 target_mask = 0x01 << ccb->ccb_h.target_id;
986                 if ((cts->flags & CCB_TRANS_USER_SETTINGS) != 0) { 
987                         cts->flags = CCB_TRANS_DISC_ENB|CCB_TRANS_TAG_ENB;
988                         cts->bus_width = (dpt->max_id > 7)
989                                        ? MSG_EXT_WDTR_BUS_8_BIT
990                                        : MSG_EXT_WDTR_BUS_16_BIT;
991                         cts->sync_period = 25; /* 10MHz */
992
993                         if (cts->sync_period != 0)
994                                 cts->sync_offset = 15;
995
996                         cts->valid = CCB_TRANS_SYNC_RATE_VALID
997                                    | CCB_TRANS_SYNC_OFFSET_VALID
998                                    | CCB_TRANS_BUS_WIDTH_VALID
999                                    | CCB_TRANS_DISC_VALID
1000                                    | CCB_TRANS_TQ_VALID;
1001                         ccb->ccb_h.status = CAM_REQ_CMP;
1002                 } else {
1003                         ccb->ccb_h.status = CAM_FUNC_NOTAVAIL;
1004                 }
1005                 xpt_done(ccb);
1006                 break;
1007         }
1008         case XPT_CALC_GEOMETRY:
1009         {
1010                 struct    ccb_calc_geometry *ccg;
1011                 u_int32_t size_mb;
1012                 u_int32_t secs_per_cylinder;
1013                 int       extended;
1014
1015                 /*
1016                  * XXX Use Adaptec translation until I find out how to
1017                  *     get this information from the card.
1018                  */
1019                 ccg = &ccb->ccg;
1020                 size_mb = ccg->volume_size
1021                         / ((1024L * 1024L) / ccg->block_size);
1022                 extended = 1;
1023                 
1024                 if (size_mb > 1024 && extended) {
1025                         ccg->heads = 255;
1026                         ccg->secs_per_track = 63;
1027                 } else {
1028                         ccg->heads = 64;
1029                         ccg->secs_per_track = 32;
1030                 }
1031                 secs_per_cylinder = ccg->heads * ccg->secs_per_track;
1032                 ccg->cylinders = ccg->volume_size / secs_per_cylinder;
1033                 ccb->ccb_h.status = CAM_REQ_CMP;
1034                 xpt_done(ccb);
1035                 break;
1036         }
1037         case XPT_RESET_BUS:             /* Reset the specified SCSI bus */
1038         {
1039                 /* XXX Implement */
1040                 ccb->ccb_h.status = CAM_REQ_CMP;
1041                 xpt_done(ccb);
1042                 break;
1043         }
1044         case XPT_TERM_IO:               /* Terminate the I/O process */
1045                 /* XXX Implement */
1046                 ccb->ccb_h.status = CAM_REQ_INVALID;
1047                 xpt_done(ccb);
1048                 break;
1049         case XPT_PATH_INQ:              /* Path routing inquiry */
1050         {
1051                 struct ccb_pathinq *cpi = &ccb->cpi;
1052                 
1053                 cpi->version_num = 1;
1054                 cpi->hba_inquiry = PI_SDTR_ABLE|PI_TAG_ABLE;
1055                 if (dpt->max_id > 7)
1056                         cpi->hba_inquiry |= PI_WIDE_16;
1057                 cpi->target_sprt = 0;
1058                 cpi->hba_misc = 0;
1059                 cpi->hba_eng_cnt = 0;
1060                 cpi->max_target = dpt->max_id;
1061                 cpi->max_lun = dpt->max_lun;
1062                 cpi->initiator_id = dpt->hostid[cam_sim_bus(sim)];
1063                 cpi->bus_id = cam_sim_bus(sim);
1064                 cpi->base_transfer_speed = 3300;
1065                 strncpy(cpi->sim_vid, "FreeBSD", SIM_IDLEN);
1066                 strncpy(cpi->hba_vid, "DPT", HBA_IDLEN);
1067                 strncpy(cpi->dev_name, cam_sim_name(sim), DEV_IDLEN);
1068                 cpi->unit_number = cam_sim_unit(sim);
1069                 cpi->ccb_h.status = CAM_REQ_CMP;
1070                 xpt_done(ccb);
1071                 break;
1072         }
1073         default:
1074                 ccb->ccb_h.status = CAM_REQ_INVALID;
1075                 xpt_done(ccb);
1076                 break;
1077         }
1078 }
1079
1080 /*
1081  * This routine will try to send an EATA command to the DPT HBA.
1082  * It will, by default, try 20,000 times, waiting 50us between tries.
1083  * It returns 0 on success and 1 on failure.
1084  * It is assumed to be called at splcam().
1085  */
1086 static int
1087 dpt_send_eata_command(dpt_softc_t *dpt, eata_ccb_t *cmd_block,
1088                       u_int32_t cmd_busaddr, u_int command, u_int retries,
1089                       u_int ifc, u_int code, u_int code2)
1090 {
1091         u_int   loop;
1092         
1093         if (!retries)
1094                 retries = 20000;
1095
1096         /*
1097          * I hate this polling nonsense. Wish there was a way to tell the DPT
1098          * to go get commands at its own pace,  or to interrupt when ready.
1099          * In the mean time we will measure how many itterations it really
1100          * takes.
1101          */
1102         for (loop = 0; loop < retries; loop++) {
1103                 if ((dpt_inb(dpt, HA_RAUXSTAT) & HA_ABUSY) == 0)
1104                         break;
1105                 else
1106                         DELAY(50);
1107         }
1108
1109         if (loop < retries) {
1110 #ifdef DPT_MEASURE_PERFORMANCE
1111                 if (loop > dpt->performance.max_eata_tries)
1112                         dpt->performance.max_eata_tries = loop;
1113
1114                 if (loop < dpt->performance.min_eata_tries)
1115                         dpt->performance.min_eata_tries = loop;
1116 #endif
1117         } else {
1118 #ifdef DPT_MEASURE_PERFORMANCE
1119                 ++dpt->performance.command_too_busy;
1120 #endif
1121                 return (1);
1122         }
1123
1124         /* The controller is alive, advance the wedge timer */
1125 #ifdef DPT_RESET_HBA
1126         dpt->last_contact = microtime_now;
1127 #endif
1128
1129         if (cmd_block == NULL)
1130                 cmd_busaddr = 0;
1131 #if (BYTE_ORDER == BIG_ENDIAN)
1132         else {
1133                 cmd_busaddr = ((cmd_busaddr >> 24) & 0xFF)
1134                             | ((cmd_busaddr >> 16) & 0xFF)
1135                             | ((cmd_busaddr >> 8) & 0xFF)
1136                             | (cmd_busaddr & 0xFF);
1137         }
1138 #endif
1139         /* And now the address */
1140         dpt_outl(dpt, HA_WDMAADDR, cmd_busaddr);
1141
1142         if (command == EATA_CMD_IMMEDIATE) {
1143                 if (cmd_block == NULL) {
1144                         dpt_outb(dpt, HA_WCODE2, code2);
1145                         dpt_outb(dpt, HA_WCODE, code);
1146                 }
1147                 dpt_outb(dpt, HA_WIFC, ifc);
1148         }
1149         dpt_outb(dpt, HA_WCOMMAND, command);
1150
1151         return (0);
1152 }
1153
1154
1155 /* ==================== Exported Function definitions =======================*/
1156 dpt_softc_t *
1157 dpt_alloc(device_t dev, bus_space_tag_t tag, bus_space_handle_t bsh)
1158 {
1159         dpt_softc_t     *dpt = device_get_softc(dev);
1160         int    i;
1161
1162         bzero(dpt, sizeof(dpt_softc_t));
1163         dpt->tag = tag;
1164         dpt->bsh = bsh;
1165         dpt->unit = device_get_unit(dev);
1166         SLIST_INIT(&dpt->free_dccb_list);
1167         LIST_INIT(&dpt->pending_ccb_list);
1168         TAILQ_INSERT_TAIL(&dpt_softcs, dpt, links);
1169         for (i = 0; i < MAX_CHANNELS; i++)
1170                 dpt->resetlevel[i] = DPT_HA_OK;
1171
1172 #ifdef DPT_MEASURE_PERFORMANCE
1173         dpt_reset_performance(dpt);
1174 #endif /* DPT_MEASURE_PERFORMANCE */
1175         return (dpt);
1176 }
1177
1178 void
1179 dpt_free(struct dpt_softc *dpt)
1180 {
1181         switch (dpt->init_level) {
1182         default:
1183         case 5:
1184                 bus_dmamap_unload(dpt->dccb_dmat, dpt->dccb_dmamap);
1185         case 4:
1186                 bus_dmamem_free(dpt->dccb_dmat, dpt->dpt_dccbs,
1187                                 dpt->dccb_dmamap);
1188                 bus_dmamap_destroy(dpt->dccb_dmat, dpt->dccb_dmamap);
1189         case 3:
1190                 bus_dma_tag_destroy(dpt->dccb_dmat);
1191         case 2:
1192                 bus_dma_tag_destroy(dpt->buffer_dmat);
1193         case 1:
1194         {
1195                 struct sg_map_node *sg_map;
1196
1197                 while ((sg_map = SLIST_FIRST(&dpt->sg_maps)) != NULL) {
1198                         SLIST_REMOVE_HEAD(&dpt->sg_maps, links);
1199                         bus_dmamap_unload(dpt->sg_dmat,
1200                                           sg_map->sg_dmamap);
1201                         bus_dmamem_free(dpt->sg_dmat, sg_map->sg_vaddr,
1202                                         sg_map->sg_dmamap);
1203                         kfree(sg_map, M_DEVBUF);
1204                 }
1205                 bus_dma_tag_destroy(dpt->sg_dmat);
1206         }
1207         case 0:
1208                 break;
1209         }
1210         TAILQ_REMOVE(&dpt_softcs, dpt, links);
1211 }
1212
1213 static u_int8_t string_sizes[] =
1214 {
1215         sizeof(((dpt_inq_t*)NULL)->vendor),
1216         sizeof(((dpt_inq_t*)NULL)->modelNum),
1217         sizeof(((dpt_inq_t*)NULL)->firmware),
1218         sizeof(((dpt_inq_t*)NULL)->protocol),
1219 };
1220
1221 int
1222 dpt_init(struct dpt_softc *dpt)
1223 {
1224         dpt_conf_t  conf;
1225         struct      sg_map_node *sg_map;
1226         dpt_ccb_t  *dccb;
1227         u_int8_t   *strp;
1228         int         index;
1229         int         i;
1230         int         retval;
1231
1232         dpt->init_level = 0;
1233         SLIST_INIT(&dpt->sg_maps);
1234
1235 #ifdef DPT_RESET_BOARD
1236         printf("dpt%d: resetting HBA\n", dpt->unit);
1237         dpt_outb(dpt, HA_WCOMMAND, EATA_CMD_RESET);
1238         DELAY(750000);
1239         /* XXX Shouldn't we poll a status register or something??? */
1240 #endif
1241         /* DMA tag for our S/G structures.  We allocate in page sized chunks */
1242         if (bus_dma_tag_create(dpt->parent_dmat, /*alignment*/1, /*boundary*/0,
1243                                /*lowaddr*/BUS_SPACE_MAXADDR,
1244                                /*highaddr*/BUS_SPACE_MAXADDR,
1245                                /*filter*/NULL, /*filterarg*/NULL,
1246                                PAGE_SIZE, /*nsegments*/1,
1247                                /*maxsegsz*/BUS_SPACE_MAXSIZE_32BIT,
1248                                /*flags*/0, &dpt->sg_dmat) != 0) {
1249                 goto error_exit;
1250         }
1251
1252         dpt->init_level++;
1253
1254         /*
1255          * We allocate our DPT ccbs as a contiguous array of bus dma'able
1256          * memory.  To get the allocation size, we need to know how many
1257          * ccbs the card supports.  This requires a ccb.  We solve this
1258          * chicken and egg problem by allocating some re-usable S/G space
1259          * up front, and treating it as our status packet, CCB, and target
1260          * memory space for these commands.
1261          */
1262         sg_map = dptallocsgmap(dpt);
1263         if (sg_map == NULL)
1264                 goto error_exit;
1265
1266         dpt->sp = (volatile dpt_sp_t *)sg_map->sg_vaddr;
1267         dccb = (struct dpt_ccb *)(uintptr_t)(volatile void *)&dpt->sp[1];
1268         bzero(dccb, sizeof(*dccb));
1269         dpt->sp_physaddr = sg_map->sg_physaddr;
1270         dccb->eata_ccb.cp_dataDMA =
1271             htonl(sg_map->sg_physaddr + sizeof(dpt_sp_t) + sizeof(*dccb));
1272         dccb->eata_ccb.cp_busaddr = ~0;
1273         dccb->eata_ccb.cp_statDMA = htonl(dpt->sp_physaddr);
1274         dccb->eata_ccb.cp_reqDMA = htonl(dpt->sp_physaddr + sizeof(*dccb)
1275                                        + offsetof(struct dpt_ccb, sense_data));
1276
1277         /* Okay.  Fetch our config */
1278         bzero(&dccb[1], sizeof(conf)); /* data area */
1279         retval = dpt_get_conf(dpt, dccb, sg_map->sg_physaddr + sizeof(dpt_sp_t),
1280                               sizeof(conf), 0xc1, 7, 1);
1281
1282         if (retval != 0) {
1283                 printf("dpt%d: Failed to get board configuration\n", dpt->unit);
1284                 return (retval);
1285         }
1286         bcopy(&dccb[1], &conf, sizeof(conf));
1287
1288         bzero(&dccb[1], sizeof(dpt->board_data));
1289         retval = dpt_get_conf(dpt, dccb, sg_map->sg_physaddr + sizeof(dpt_sp_t),
1290                               sizeof(dpt->board_data), 0, conf.scsi_id0, 0);
1291         if (retval != 0) {
1292                 printf("dpt%d: Failed to get inquiry information\n", dpt->unit);
1293                 return (retval);
1294         }
1295         bcopy(&dccb[1], &dpt->board_data, sizeof(dpt->board_data));
1296
1297         dpt_detect_cache(dpt, dccb, sg_map->sg_physaddr + sizeof(dpt_sp_t),
1298                          (u_int8_t *)&dccb[1]);
1299
1300         switch (ntohl(conf.splen)) {
1301         case DPT_EATA_REVA:
1302                 dpt->EATA_revision = 'a';
1303                 break;
1304         case DPT_EATA_REVB:
1305                 dpt->EATA_revision = 'b';
1306                 break;
1307         case DPT_EATA_REVC:
1308                 dpt->EATA_revision = 'c';
1309                 break;
1310         case DPT_EATA_REVZ:
1311                 dpt->EATA_revision = 'z';
1312                 break;
1313         default:
1314                 dpt->EATA_revision = '?';
1315         }
1316
1317         dpt->max_id      = conf.MAX_ID;
1318         dpt->max_lun     = conf.MAX_LUN;
1319         dpt->irq         = conf.IRQ;
1320         dpt->dma_channel = (8 - conf.DMA_channel) & 7;
1321         dpt->channels    = conf.MAX_CHAN + 1;
1322         dpt->state      |= DPT_HA_OK;
1323         if (conf.SECOND)
1324                 dpt->primary = FALSE;
1325         else
1326                 dpt->primary = TRUE;
1327
1328         dpt->more_support = conf.MORE_support;
1329
1330         if (strncmp(dpt->board_data.firmware, "07G0", 4) >= 0)
1331                 dpt->immediate_support = 1;
1332         else
1333                 dpt->immediate_support = 0;
1334
1335         dpt->broken_INQUIRY = FALSE;
1336
1337         dpt->cplen = ntohl(conf.cplen);
1338         dpt->cppadlen = ntohs(conf.cppadlen);
1339         dpt->max_dccbs = ntohs(conf.queuesiz);
1340
1341         if (dpt->max_dccbs > 256) {
1342                 printf("dpt%d: Max CCBs reduced from %d to "
1343                        "256 due to tag algorithm\n", dpt->unit, dpt->max_dccbs);
1344                 dpt->max_dccbs = 256;
1345         }
1346
1347         dpt->hostid[0] = conf.scsi_id0;
1348         dpt->hostid[1] = conf.scsi_id1;
1349         dpt->hostid[2] = conf.scsi_id2;
1350
1351         if (conf.SG_64K)
1352                 dpt->sgsize = 8192;
1353         else
1354                 dpt->sgsize = ntohs(conf.SGsiz);
1355
1356         /* We can only get 64k buffers, so don't bother to waste space. */
1357         if (dpt->sgsize < 17 || dpt->sgsize > 32)
1358                 dpt->sgsize = 32; 
1359
1360         if (dpt->sgsize > dpt_max_segs)
1361                 dpt->sgsize = dpt_max_segs;
1362         
1363         /* DMA tag for mapping buffers into device visible space. */
1364         if (bus_dma_tag_create(dpt->parent_dmat, /*alignment*/1, /*boundary*/0,
1365                                /*lowaddr*/BUS_SPACE_MAXADDR,
1366                                /*highaddr*/BUS_SPACE_MAXADDR,
1367                                /*filter*/NULL, /*filterarg*/NULL,
1368                                /*maxsize*/MAXBSIZE, /*nsegments*/dpt->sgsize,
1369                                /*maxsegsz*/BUS_SPACE_MAXSIZE_32BIT,
1370                                /*flags*/BUS_DMA_ALLOCNOW,
1371                                &dpt->buffer_dmat) != 0) {
1372                 printf("dpt: bus_dma_tag_create(...,dpt->buffer_dmat) failed\n");
1373                 goto error_exit;
1374         }
1375
1376         dpt->init_level++;
1377
1378         /* DMA tag for our ccb structures and interrupt status packet */
1379         if (bus_dma_tag_create(dpt->parent_dmat, /*alignment*/1, /*boundary*/0,
1380                                /*lowaddr*/BUS_SPACE_MAXADDR,
1381                                /*highaddr*/BUS_SPACE_MAXADDR,
1382                                /*filter*/NULL, /*filterarg*/NULL,
1383                                (dpt->max_dccbs * sizeof(struct dpt_ccb))
1384                                + sizeof(dpt_sp_t),
1385                                /*nsegments*/1,
1386                                /*maxsegsz*/BUS_SPACE_MAXSIZE_32BIT,
1387                                /*flags*/0, &dpt->dccb_dmat) != 0) {
1388                 printf("dpt: bus_dma_tag_create(...,dpt->dccb_dmat) failed\n");
1389                 goto error_exit;
1390         }
1391
1392         dpt->init_level++;
1393
1394         /* Allocation for our ccbs and interrupt status packet */
1395         if (bus_dmamem_alloc(dpt->dccb_dmat, (void **)&dpt->dpt_dccbs,
1396                              BUS_DMA_NOWAIT, &dpt->dccb_dmamap) != 0) {
1397                 printf("dpt: bus_dmamem_alloc(dpt->dccb_dmat,...) failed\n");
1398                 goto error_exit;
1399         }
1400
1401         dpt->init_level++;
1402
1403         /* And permanently map them */
1404         bus_dmamap_load(dpt->dccb_dmat, dpt->dccb_dmamap,
1405                         dpt->dpt_dccbs,
1406                         (dpt->max_dccbs * sizeof(struct dpt_ccb))
1407                         + sizeof(dpt_sp_t),
1408                         dptmapmem, &dpt->dpt_ccb_busbase, /*flags*/0);
1409
1410         /* Clear them out. */
1411         bzero(dpt->dpt_dccbs,
1412               (dpt->max_dccbs * sizeof(struct dpt_ccb)) + sizeof(dpt_sp_t));
1413
1414         dpt->dpt_ccb_busend = dpt->dpt_ccb_busbase;
1415
1416         dpt->sp = (dpt_sp_t*)&dpt->dpt_dccbs[dpt->max_dccbs];
1417         dpt->sp_physaddr = dpt->dpt_ccb_busbase
1418                          + (dpt->max_dccbs * sizeof(dpt_ccb_t));
1419         dpt->init_level++;
1420
1421         /* Allocate our first batch of ccbs */
1422         if (dptallocccbs(dpt) == 0) {
1423                 printf("dpt: dptallocccbs(dpt) == 0\n");
1424                 return (2);
1425         }
1426
1427         /* Prepare for Target Mode */
1428         dpt->target_mode_enabled = 1;
1429
1430         /* Nuke excess spaces from inquiry information */
1431         strp = dpt->board_data.vendor;
1432         for (i = 0; i < sizeof(string_sizes); i++) {
1433                 index = string_sizes[i] - 1;    
1434                 while (index && (strp[index] == ' '))
1435                         strp[index--] = '\0';
1436                 strp += string_sizes[i];
1437         }
1438
1439         printf("dpt%d: %.8s %.16s FW Rev. %.4s, ",
1440                dpt->unit, dpt->board_data.vendor,
1441                dpt->board_data.modelNum, dpt->board_data.firmware);
1442
1443         printf("%d channel%s, ", dpt->channels, dpt->channels > 1 ? "s" : "");
1444
1445         if (dpt->cache_type != DPT_NO_CACHE
1446          && dpt->cache_size != 0) {
1447                 printf("%s Cache, ",
1448                        dpt->cache_type == DPT_CACHE_WRITETHROUGH
1449                      ? "Write-Through" : "Write-Back");
1450         }
1451
1452         printf("%d CCBs\n", dpt->max_dccbs);
1453         return (0);
1454                 
1455 error_exit:
1456         return (1);
1457 }
1458
1459 int
1460 dpt_attach(dpt_softc_t *dpt)
1461 {
1462         struct cam_devq *devq;
1463         int i;
1464
1465         /*
1466          * Create the device queue for our SIM.
1467          */
1468         devq = cam_simq_alloc(dpt->max_dccbs);
1469         if (devq == NULL)
1470                 return (0);
1471
1472         for (i = 0; i < dpt->channels; i++) {
1473                 /*
1474                  * Construct our SIM entry
1475                  */
1476                 dpt->sims[i] = cam_sim_alloc(dpt_action, dpt_poll, "dpt",
1477                                              dpt, dpt->unit, /*untagged*/2,
1478                                              /*tagged*/dpt->max_dccbs, devq);
1479                 if (xpt_bus_register(dpt->sims[i], i) != CAM_SUCCESS) {
1480                         cam_sim_free(dpt->sims[i]);
1481                         break;
1482                 }
1483
1484                 if (xpt_create_path(&dpt->paths[i], /*periph*/NULL,
1485                                     cam_sim_path(dpt->sims[i]),
1486                                     CAM_TARGET_WILDCARD,
1487                                     CAM_LUN_WILDCARD) != CAM_REQ_CMP) {
1488                         xpt_bus_deregister(cam_sim_path(dpt->sims[i]));
1489                         cam_sim_free(dpt->sims[i]);
1490                         break;
1491                 }
1492
1493         }
1494         cam_simq_release(devq);
1495         if (i > 0)
1496                 EVENTHANDLER_REGISTER(shutdown_final, dptshutdown,
1497                                       dpt, SHUTDOWN_PRI_DEFAULT);
1498         return (i);
1499 }
1500
1501
1502 /*
1503  * This is the interrupt handler for the DPT driver.
1504  */
1505 void
1506 dpt_intr(void *arg)
1507 {
1508         dpt_softc_t    *dpt;
1509         dpt_ccb_t      *dccb;
1510         union ccb      *ccb;
1511         u_int           status;
1512         u_int           aux_status;
1513         u_int           hba_stat;
1514         u_int           scsi_stat;
1515         u_int32_t       residue_len;    /* Number of bytes not transferred */
1516
1517         dpt = (dpt_softc_t *)arg;
1518
1519         /* First order of business is to check if this interrupt is for us */
1520         while (((aux_status = dpt_inb(dpt, HA_RAUXSTAT)) & HA_AIRQ) != 0) {
1521
1522                 /*
1523                  * What we want to do now, is to capture the status, all of it,
1524                  * move it where it belongs, wake up whoever sleeps waiting to
1525                  * process this result, and get out of here.
1526                  */
1527                 if (dpt->sp->ccb_busaddr < dpt->dpt_ccb_busbase
1528                  || dpt->sp->ccb_busaddr >= dpt->dpt_ccb_busend) {
1529                         printf("Encountered bogus status packet\n");
1530                         status = dpt_inb(dpt, HA_RSTATUS);
1531                         return;
1532                 }
1533
1534                 dccb = dptccbptov(dpt, dpt->sp->ccb_busaddr);
1535
1536                 dpt->sp->ccb_busaddr = ~0;
1537
1538                 /* Ignore status packets with EOC not set */
1539                 if (dpt->sp->EOC == 0) {
1540                         printf("dpt%d ERROR: Request %d received with "
1541                                "clear EOC.\n     Marking as LOST.\n",
1542                                dpt->unit, dccb->transaction_id);
1543
1544 #ifdef DPT_HANDLE_TIMEOUTS
1545                         dccb->state |= DPT_CCB_STATE_MARKED_LOST;
1546 #endif
1547                         /* This CLEARS the interrupt! */
1548                         status = dpt_inb(dpt, HA_RSTATUS);
1549                         continue;
1550                 }
1551                 dpt->sp->EOC = 0;
1552
1553                 /*
1554                  * Double buffer the status information so the hardware can
1555                  * work on updating the status packet while we decifer the
1556                  * one we were just interrupted for.
1557                  * According to Mark Salyzyn, we only need few pieces of it.
1558                  */
1559                 hba_stat = dpt->sp->hba_stat;
1560                 scsi_stat = dpt->sp->scsi_stat;
1561                 residue_len = dpt->sp->residue_len;
1562
1563                 /* Clear interrupts, check for error */
1564                 if ((status = dpt_inb(dpt, HA_RSTATUS)) & HA_SERROR) {
1565                         /*
1566                          * Error Condition. Check for magic cookie. Exit
1567                          * this test on earliest sign of non-reset condition
1568                          */
1569
1570                         /* Check that this is not a board reset interrupt */
1571                         if (dpt_just_reset(dpt)) {
1572                                 printf("dpt%d: HBA rebooted.\n"
1573                                        "      All transactions should be "
1574                                        "resubmitted\n",
1575                                        dpt->unit);
1576
1577                                 printf("dpt%d: >>---->>  This is incomplete, "
1578                                        "fix me....  <<----<<", dpt->unit);
1579                                 panic("DPT Rebooted");
1580
1581                         }
1582                 }
1583                 /* Process CCB */
1584                 ccb = dccb->ccb;
1585                 callout_stop(&ccb->ccb_h.timeout_ch);
1586                 if ((ccb->ccb_h.flags & CAM_DIR_MASK) != CAM_DIR_NONE) {
1587                         bus_dmasync_op_t op;
1588
1589                         if ((ccb->ccb_h.flags & CAM_DIR_MASK) == CAM_DIR_IN)
1590                                 op = BUS_DMASYNC_POSTREAD;
1591                         else
1592                                 op = BUS_DMASYNC_POSTWRITE;
1593                         bus_dmamap_sync(dpt->buffer_dmat, dccb->dmamap, op);
1594                         bus_dmamap_unload(dpt->buffer_dmat, dccb->dmamap);
1595                 }
1596
1597                 /* Common Case inline... */
1598                 if (hba_stat == HA_NO_ERROR) {
1599                         ccb->csio.scsi_status = scsi_stat;
1600                         ccb->ccb_h.status = 0;
1601                         switch (scsi_stat) {
1602                         case SCSI_STATUS_OK:
1603                                 ccb->ccb_h.status |= CAM_REQ_CMP;
1604                                 break;
1605                         case SCSI_STATUS_CHECK_COND:
1606                         case SCSI_STATUS_CMD_TERMINATED:
1607                                 bcopy(&dccb->sense_data, &ccb->csio.sense_data,
1608                                       ccb->csio.sense_len);
1609                                 ccb->ccb_h.status |= CAM_AUTOSNS_VALID;
1610                                 /* FALLTHROUGH */
1611                         default:
1612                                 ccb->ccb_h.status |= CAM_SCSI_STATUS_ERROR;
1613                                 /* XXX Freeze DevQ */
1614                                 break;
1615                         }
1616                         ccb->csio.resid = residue_len;
1617                         dptfreeccb(dpt, dccb);
1618                         xpt_done(ccb);
1619                 } else {
1620                         dptprocesserror(dpt, dccb, ccb, hba_stat, scsi_stat,
1621                                         residue_len);
1622                 }
1623         }
1624 }
1625
1626 static void
1627 dptprocesserror(dpt_softc_t *dpt, dpt_ccb_t *dccb, union ccb *ccb,
1628                 u_int hba_stat, u_int scsi_stat, u_int32_t resid)
1629 {
1630         ccb->csio.resid = resid;
1631         switch (hba_stat) {
1632         case HA_ERR_SEL_TO:
1633                 ccb->ccb_h.status = CAM_SEL_TIMEOUT;
1634                 break;
1635         case HA_ERR_CMD_TO:
1636                 ccb->ccb_h.status = CAM_CMD_TIMEOUT;
1637                 break;
1638         case HA_SCSIBUS_RESET:
1639         case HA_HBA_POWER_UP:   /* Similar effect to a bus reset??? */
1640                 ccb->ccb_h.status = CAM_SCSI_BUS_RESET;
1641                 break;
1642         case HA_CP_ABORTED:
1643         case HA_CP_RESET:       /* XXX ??? */
1644         case HA_CP_ABORT_NA:    /* XXX ??? */
1645         case HA_CP_RESET_NA:    /* XXX ??? */
1646                 if ((ccb->ccb_h.status & CAM_STATUS_MASK) == CAM_REQ_INPROG)
1647                         ccb->ccb_h.status = CAM_REQ_ABORTED;
1648                 break;
1649         case HA_PCI_PARITY:
1650         case HA_PCI_MABORT:
1651         case HA_PCI_TABORT:
1652         case HA_PCI_STABORT:
1653         case HA_BUS_PARITY:
1654         case HA_PARITY_ERR:
1655         case HA_ECC_ERR:
1656                 ccb->ccb_h.status = CAM_UNCOR_PARITY;
1657                 break;
1658         case HA_UNX_MSGRJCT:
1659                 ccb->ccb_h.status = CAM_MSG_REJECT_REC;
1660                 break;
1661         case HA_UNX_BUSPHASE:
1662                 ccb->ccb_h.status = CAM_SEQUENCE_FAIL;
1663                 break;
1664         case HA_UNX_BUS_FREE:
1665                 ccb->ccb_h.status = CAM_UNEXP_BUSFREE;
1666                 break;
1667         case HA_SCSI_HUNG:
1668         case HA_RESET_STUCK:
1669                 /*
1670                  * Dead???  Can the controller get unstuck
1671                  * from these conditions
1672                  */
1673                 ccb->ccb_h.status = CAM_NO_HBA;
1674                 break;
1675         case HA_RSENSE_FAIL:
1676                 ccb->ccb_h.status = CAM_AUTOSENSE_FAIL;
1677                 break;
1678         default:
1679                 printf("dpt%d: Undocumented Error %x\n", dpt->unit, hba_stat);
1680                 printf("Please mail this message to shimon@simon-shapiro.org\n");
1681                 ccb->ccb_h.status = CAM_REQ_CMP_ERR;
1682                 break;
1683         }
1684         dptfreeccb(dpt, dccb);
1685         xpt_done(ccb);
1686 }
1687
1688 static void
1689 dpttimeout(void *arg)
1690 {
1691         struct dpt_ccb   *dccb;
1692         union  ccb       *ccb;
1693         struct dpt_softc *dpt;
1694
1695         dccb = (struct dpt_ccb *)arg;
1696         ccb = dccb->ccb;
1697         dpt = (struct dpt_softc *)ccb->ccb_h.ccb_dpt_ptr;
1698         xpt_print_path(ccb->ccb_h.path);
1699         printf("CCB %p - timed out\n", (void *)dccb);
1700
1701         crit_enter();
1702
1703         /*
1704          * Try to clear any pending jobs.  FreeBSD will loose interrupts,
1705          * leaving the controller suspended, and commands timed-out.
1706          * By calling the interrupt handler, any command thus stuck will be
1707          * completed.
1708          */
1709         dpt_intr(dpt);
1710         
1711         if ((dccb->state & DCCB_ACTIVE) == 0) {
1712                 xpt_print_path(ccb->ccb_h.path);
1713                 printf("CCB %p - timed out CCB already completed\n",
1714                        (void *)dccb);
1715                 crit_exit();
1716                 return;
1717         }
1718
1719         /* Abort this particular command.  Leave all others running */
1720         dpt_send_immediate(dpt, &dccb->eata_ccb, dccb->eata_ccb.cp_busaddr,
1721                            /*retries*/20000, EATA_SPECIFIC_ABORT, 0, 0);
1722         ccb->ccb_h.status = CAM_CMD_TIMEOUT;
1723         crit_exit();
1724 }
1725
1726 /*
1727  * Shutdown the controller and ensure that the cache is completely flushed.
1728  * Called from the shutdown_final event after all disk access has completed.
1729  */
1730 static void
1731 dptshutdown(void *arg, int howto)
1732 {
1733         dpt_softc_t *dpt;
1734
1735         dpt = (dpt_softc_t *)arg;
1736
1737         printf("dpt%d: Shutting down (mode %x) HBA.     Please wait...\n",
1738                dpt->unit, howto);
1739
1740         /*
1741          * What we do for a shutdown, is give the DPT early power loss warning
1742          */
1743         dpt_send_immediate(dpt, NULL, 0, EATA_POWER_OFF_WARN, 0, 0, 0);
1744         DELAY(1000 * 1000 * 5);
1745         printf("dpt%d: Controller was warned of shutdown and is now "
1746                "disabled\n", dpt->unit);
1747 }
1748
1749 /*============================================================================*/
1750
1751 #if 0
1752 #ifdef DPT_RESET_HBA
1753
1754 /*
1755 **      Function name : dpt_reset_hba
1756 **
1757 **      Description : Reset the HBA and properly discard all pending work
1758 **      Input :       Softc
1759 **      Output :      Nothing
1760 */
1761 static void
1762 dpt_reset_hba(dpt_softc_t *dpt)
1763 {
1764         eata_ccb_t       *ccb;
1765         dpt_ccb_t         dccb, *dccbp;
1766         int               result;
1767         struct scsi_xfer *xs;
1768     
1769         /* Prepare a control block.  The SCSI command part is immaterial */
1770         dccb.xs = NULL;
1771         dccb.flags = 0;
1772         dccb.state = DPT_CCB_STATE_NEW;
1773         dccb.std_callback = NULL;
1774         dccb.wrbuff_callback = NULL;
1775
1776         ccb = &dccb.eata_ccb;
1777         ccb->CP_OpCode = EATA_CMD_RESET;
1778         ccb->SCSI_Reset = 0;
1779         ccb->HBA_Init = 1;
1780         ccb->Auto_Req_Sen = 1;
1781         ccb->cp_id = 0; /* Should be ignored */
1782         ccb->DataIn = 1;
1783         ccb->DataOut = 0;
1784         ccb->Interpret = 1;
1785         ccb->reqlen = htonl(sizeof(struct scsi_sense_data));
1786         ccb->cp_statDMA = htonl(vtophys(&ccb->cp_statDMA));
1787         ccb->cp_reqDMA = htonl(vtophys(&ccb->cp_reqDMA));
1788         ccb->cp_viraddr = (u_int32_t) & ccb;
1789
1790         ccb->cp_msg[0] = HA_IDENTIFY_MSG | HA_DISCO_RECO;
1791         ccb->cp_scsi_cmd = 0;  /* Should be ignored */
1792
1793         /* Lock up the submitted queue.  We are very persistant here */
1794         crit_enter();
1795         while (dpt->queue_status & DPT_SUBMITTED_QUEUE_ACTIVE) {
1796                 DELAY(100);
1797         }
1798         
1799         dpt->queue_status |= DPT_SUBMITTED_QUEUE_ACTIVE;
1800         crit_exit();
1801
1802         /* Send the RESET message */
1803         if ((result = dpt_send_eata_command(dpt, &dccb.eata_ccb,
1804                                             EATA_CMD_RESET, 0, 0, 0, 0)) != 0) {
1805                 printf("dpt%d: Failed to send the RESET message.\n"
1806                        "      Trying cold boot (ouch!)\n", dpt->unit);
1807         
1808         
1809                 if ((result = dpt_send_eata_command(dpt, &dccb.eata_ccb,
1810                                                     EATA_COLD_BOOT, 0, 0,
1811                                                     0, 0)) != 0) {
1812                         panic("dpt%d:  Faild to cold boot the HBA\n",
1813                               dpt->unit);
1814                 }
1815 #ifdef DPT_MEASURE_PERFORMANCE
1816                 dpt->performance.cold_boots++;
1817 #endif /* DPT_MEASURE_PERFORMANCE */
1818         }
1819         
1820 #ifdef DPT_MEASURE_PERFORMANCE
1821         dpt->performance.warm_starts++;
1822 #endif /* DPT_MEASURE_PERFORMANCE */
1823         
1824         printf("dpt%d:  Aborting pending requests.  O/S should re-submit\n",
1825                dpt->unit);
1826
1827         while ((dccbp = TAILQ_FIRST(&dpt->completed_ccbs)) != NULL) {
1828                 struct scsi_xfer *xs = dccbp->xs;
1829             
1830                 /* Not all transactions have xs structs */
1831                 if (xs != NULL) {
1832                         /* Tell the kernel proper this did not complete well */
1833                         xs->error |= XS_SELTIMEOUT;
1834                         xs->flags |= SCSI_ITSDONE;
1835                         scsi_done(xs);
1836                 }
1837             
1838                 dpt_Qremove_submitted(dpt, dccbp);
1839         
1840                 /* Remember, Callbacks are NOT in the standard queue */
1841                 if (dccbp->std_callback != NULL) {
1842                         (dccbp->std_callback)(dpt, dccbp->eata_ccb.cp_channel,
1843                                                dccbp);
1844                 } else {
1845                         crit_enter();
1846                         dpt_Qpush_free(dpt, dccbp);
1847                         crit_exit();
1848                 }
1849         }
1850
1851         printf("dpt%d: reset done aborting all pending commands\n", dpt->unit);
1852         dpt->queue_status &= ~DPT_SUBMITTED_QUEUE_ACTIVE;
1853 }
1854
1855 #endif /* DPT_RESET_HBA */ 
1856
1857 /*
1858  * Build a Command Block for target mode READ/WRITE BUFFER,
1859  * with the ``sync'' bit ON.
1860  *
1861  * Although the length and offset are 24 bit fields in the command, they cannot
1862  * exceed 8192 bytes, so we take them as short integers andcheck their range.
1863  * If they are sensless, we round them to zero offset, maximum length and
1864  * complain.
1865  */
1866
1867 static void
1868 dpt_target_ccb(dpt_softc_t * dpt, int bus, u_int8_t target, u_int8_t lun,
1869                dpt_ccb_t * ccb, int mode, u_int8_t command,
1870                u_int16_t length, u_int16_t offset)
1871 {
1872         eata_ccb_t     *cp;
1873
1874         if ((length + offset) > DPT_MAX_TARGET_MODE_BUFFER_SIZE) {
1875                 printf("dpt%d:  Length of %d, and offset of %d are wrong\n",
1876                        dpt->unit, length, offset);
1877                 length = DPT_MAX_TARGET_MODE_BUFFER_SIZE;
1878                 offset = 0;
1879         }
1880         ccb->xs = NULL;
1881         ccb->flags = 0;
1882         ccb->state = DPT_CCB_STATE_NEW;
1883         ccb->std_callback = (ccb_callback) dpt_target_done;
1884         ccb->wrbuff_callback = NULL;
1885
1886         cp = &ccb->eata_ccb;
1887         cp->CP_OpCode = EATA_CMD_DMA_SEND_CP;
1888         cp->SCSI_Reset = 0;
1889         cp->HBA_Init = 0;
1890         cp->Auto_Req_Sen = 1;
1891         cp->cp_id = target;
1892         cp->DataIn = 1;
1893         cp->DataOut = 0;
1894         cp->Interpret = 0;
1895         cp->reqlen = htonl(sizeof(struct scsi_sense_data));
1896         cp->cp_statDMA = htonl(vtophys(&cp->cp_statDMA));
1897         cp->cp_reqDMA = htonl(vtophys(&cp->cp_reqDMA));
1898         cp->cp_viraddr = (u_int32_t) & ccb;
1899
1900         cp->cp_msg[0] = HA_IDENTIFY_MSG | HA_DISCO_RECO;
1901
1902         cp->cp_scsi_cmd = command;
1903         cp->cp_cdb[1] = (u_int8_t) (mode & SCSI_TM_MODE_MASK);
1904         cp->cp_lun = lun;       /* Order is important here! */
1905         cp->cp_cdb[2] = 0x00;   /* Buffer Id, only 1 :-( */
1906         cp->cp_cdb[3] = (length >> 16) & 0xFF;  /* Buffer offset MSB */
1907         cp->cp_cdb[4] = (length >> 8) & 0xFF;
1908         cp->cp_cdb[5] = length & 0xFF;
1909         cp->cp_cdb[6] = (length >> 16) & 0xFF;  /* Length MSB */
1910         cp->cp_cdb[7] = (length >> 8) & 0xFF;
1911         cp->cp_cdb[8] = length & 0xFF;  /* Length LSB */
1912         cp->cp_cdb[9] = 0;      /* No sync, no match bits */
1913
1914         /*
1915          * This could be optimized to live in dpt_register_buffer.
1916          * We keep it here, just in case the kernel decides to reallocate pages
1917          */
1918         if (dpt_scatter_gather(dpt, ccb, DPT_RW_BUFFER_SIZE,
1919                                dpt->rw_buffer[bus][target][lun])) {
1920                 printf("dpt%d: Failed to setup Scatter/Gather for "
1921                        "Target-Mode buffer\n", dpt->unit);
1922         }
1923 }
1924
1925 /* Setup a target mode READ command */
1926
1927 static void
1928 dpt_set_target(int redo, dpt_softc_t * dpt,
1929                u_int8_t bus, u_int8_t target, u_int8_t lun, int mode,
1930                u_int16_t length, u_int16_t offset, dpt_ccb_t * ccb)
1931 {
1932         if (dpt->target_mode_enabled) {
1933                 crit_enter();
1934
1935                 if (!redo)
1936                         dpt_target_ccb(dpt, bus, target, lun, ccb, mode,
1937                                        SCSI_TM_READ_BUFFER, length, offset);
1938
1939                 ccb->transaction_id = ++dpt->commands_processed;
1940
1941 #ifdef DPT_MEASURE_PERFORMANCE
1942                 dpt->performance.command_count[ccb->eata_ccb.cp_scsi_cmd]++;
1943                 ccb->command_started = microtime_now;
1944 #endif
1945                 dpt_Qadd_waiting(dpt, ccb);
1946                 dpt_sched_queue(dpt);
1947
1948                 crit_exit();
1949         } else {
1950                 printf("dpt%d:  Target Mode Request, but Target Mode is OFF\n",
1951                        dpt->unit);
1952         }
1953 }
1954
1955 /*
1956  * Schedule a buffer to be sent to another target.
1957  * The work will be scheduled and the callback provided will be called when
1958  * the work is actually done.
1959  *
1960  * Please NOTE:  ``Anyone'' can send a buffer, but only registered clients
1961  * get notified of receipt of buffers.
1962  */
1963
1964 int
1965 dpt_send_buffer(int unit, u_int8_t channel, u_int8_t target, u_int8_t lun,
1966                 u_int8_t mode, u_int16_t length, u_int16_t offset, void *data,
1967                 buff_wr_done callback)
1968 {
1969         dpt_softc_t    *dpt;
1970         dpt_ccb_t      *ccb = NULL;
1971
1972         /* This is an external call.  Be a bit paranoid */
1973         for (dpt = TAILQ_FIRST(&dpt_softc_list);
1974              dpt != NULL;
1975              dpt = TAILQ_NEXT(dpt, links)) {
1976                 if (dpt->unit == unit)
1977                         goto valid_unit;
1978         }
1979
1980         return (INVALID_UNIT);
1981
1982 valid_unit:
1983
1984         if (dpt->target_mode_enabled) {
1985                 if ((channel >= dpt->channels) || (target > dpt->max_id) ||
1986                     (lun > dpt->max_lun)) {
1987                         return (INVALID_SENDER);
1988                 }
1989                 if ((dpt->rw_buffer[channel][target][lun] == NULL) ||
1990                     (dpt->buffer_receiver[channel][target][lun] == NULL))
1991                         return (NOT_REGISTERED);
1992
1993                 crit_enter();
1994                 /* Process the free list */
1995                 if ((TAILQ_EMPTY(&dpt->free_ccbs)) && dpt_alloc_freelist(dpt)) {
1996                         printf("dpt%d ERROR: Cannot allocate any more free CCB's.\n"
1997                                "             Please try later\n",
1998                                dpt->unit);
1999                         crit_exit();
2000                         return (NO_RESOURCES);
2001                 }
2002                 /* Now grab the newest CCB */
2003                 if ((ccb = dpt_Qpop_free(dpt)) == NULL) {
2004                         crit_exit();
2005                         panic("dpt%d: Got a NULL CCB from pop_free()\n", dpt->unit);
2006                 }
2007                 crit_exit();
2008
2009                 bcopy(dpt->rw_buffer[channel][target][lun] + offset, data, length);
2010                 dpt_target_ccb(dpt, channel, target, lun, ccb, mode, 
2011                                            SCSI_TM_WRITE_BUFFER,
2012                                            length, offset);
2013                 ccb->std_callback = (ccb_callback) callback; /* Potential trouble */
2014
2015                 crit_enter();
2016                 ccb->transaction_id = ++dpt->commands_processed;
2017
2018 #ifdef DPT_MEASURE_PERFORMANCE
2019                 dpt->performance.command_count[ccb->eata_ccb.cp_scsi_cmd]++;
2020                 ccb->command_started = microtime_now;
2021 #endif
2022                 dpt_Qadd_waiting(dpt, ccb);
2023                 dpt_sched_queue(dpt);
2024
2025                 crit_exit();
2026                 return (0);
2027         }
2028         return (DRIVER_DOWN);
2029 }
2030
2031 static void
2032 dpt_target_done(dpt_softc_t * dpt, int bus, dpt_ccb_t * ccb)
2033 {
2034         eata_ccb_t     *cp;
2035
2036         cp = &ccb->eata_ccb;
2037
2038         /*
2039          * Remove the CCB from the waiting queue.
2040          *  We do NOT put it back on the free, etc., queues as it is a special
2041          * ccb, owned by the dpt_softc of this unit.
2042          */
2043         crit_enter();
2044         dpt_Qremove_completed(dpt, ccb);
2045         crit_exit();
2046
2047 #define br_channel           (ccb->eata_ccb.cp_channel)
2048 #define br_target            (ccb->eata_ccb.cp_id)
2049 #define br_lun               (ccb->eata_ccb.cp_LUN)
2050 #define br_index             [br_channel][br_target][br_lun]
2051 #define read_buffer_callback (dpt->buffer_receiver br_index )
2052 #define read_buffer          (dpt->rw_buffer[br_channel][br_target][br_lun])
2053 #define cb(offset)           (ccb->eata_ccb.cp_cdb[offset])
2054 #define br_offset            ((cb(3) << 16) | (cb(4) << 8) | cb(5))
2055 #define br_length            ((cb(6) << 16) | (cb(7) << 8) | cb(8))
2056
2057         /* Different reasons for being here, you know... */
2058         switch (ccb->eata_ccb.cp_scsi_cmd) {
2059         case SCSI_TM_READ_BUFFER:
2060                 if (read_buffer_callback != NULL) {
2061                         /* This is a buffer generated by a kernel process */
2062                         read_buffer_callback(dpt->unit, br_channel,
2063                                              br_target, br_lun,
2064                                              read_buffer,
2065                                              br_offset, br_length);
2066                 } else {
2067                         /*
2068                          * This is a buffer waited for by a user (sleeping)
2069                          * command
2070                          */
2071                         wakeup(ccb);
2072                 }
2073
2074                 /* We ALWAYS re-issue the same command; args are don't-care  */
2075                 dpt_set_target(1, 0, 0, 0, 0, 0, 0, 0, 0);
2076                 break;
2077
2078         case SCSI_TM_WRITE_BUFFER:
2079                 (ccb->wrbuff_callback) (dpt->unit, br_channel, br_target,
2080                                         br_offset, br_length,
2081                                         br_lun, ccb->status_packet.hba_stat);
2082                 break;
2083         default:
2084                 printf("dpt%d:  %s is an unsupported command for target mode\n",
2085                        dpt->unit, scsi_cmd_name(ccb->eata_ccb.cp_scsi_cmd));
2086         }
2087         crit_enter();
2088         dpt->target_ccb[br_channel][br_target][br_lun] = NULL;
2089         dpt_Qpush_free(dpt, ccb);
2090         crit_exit();
2091 }
2092
2093
2094 /*
2095  * Use this function to register a client for a buffer read target operation.
2096  * The function you register will be called every time a buffer is received
2097  * by the target mode code.
2098  */
2099 dpt_rb_t
2100 dpt_register_buffer(int unit, u_int8_t channel, u_int8_t target, u_int8_t lun,
2101                     u_int8_t mode, u_int16_t length, u_int16_t offset,
2102                     dpt_rec_buff callback, dpt_rb_op_t op)
2103 {
2104         dpt_softc_t    *dpt;
2105         dpt_ccb_t      *ccb = NULL;
2106
2107         for (dpt = TAILQ_FIRST(&dpt_softc_list);
2108              dpt != NULL;
2109              dpt = TAILQ_NEXT(dpt, links)) {
2110                 if (dpt->unit == unit)
2111                         goto valid_unit;
2112         }
2113
2114         return (INVALID_UNIT);
2115
2116 valid_unit:
2117
2118         if (dpt->state & DPT_HA_SHUTDOWN_ACTIVE)
2119                 return (DRIVER_DOWN);
2120
2121         if ((channel > (dpt->channels - 1)) || (target > (dpt->max_id - 1)) ||
2122             (lun > (dpt->max_lun - 1)))
2123                 return (INVALID_SENDER);
2124
2125         if (dpt->buffer_receiver[channel][target][lun] == NULL) {
2126                 if (op == REGISTER_BUFFER) {
2127                         /* Assign the requested callback */
2128                         dpt->buffer_receiver[channel][target][lun] = callback;
2129                         /* Get a CCB */
2130                         crit_enter();
2131
2132                         /* Process the free list */
2133                         if ((TAILQ_EMPTY(&dpt->free_ccbs)) && dpt_alloc_freelist(dpt)) {
2134                                 printf("dpt%d ERROR: Cannot allocate any more free CCB's.\n"
2135                                        "             Please try later\n",
2136                                        dpt->unit);
2137                                 crit_exit();
2138                                 return (NO_RESOURCES);
2139                         }
2140                         /* Now grab the newest CCB */
2141                         if ((ccb = dpt_Qpop_free(dpt)) == NULL) {
2142                                 crit_exit();
2143                                 panic("dpt%d: Got a NULL CCB from pop_free()\n",
2144                                       dpt->unit);
2145                         }
2146                         crit_exit();
2147
2148                         /* Clean up the leftover of the previous tenant */
2149                         ccb->status = DPT_CCB_STATE_NEW;
2150                         dpt->target_ccb[channel][target][lun] = ccb;
2151
2152                         dpt->rw_buffer[channel][target][lun] =
2153                                 kmalloc(DPT_RW_BUFFER_SIZE, M_DEVBUF, M_INTWAIT);
2154                         dpt_set_target(0, dpt, channel, target, lun, mode,
2155                                        length, offset, ccb);
2156                         return (SUCCESSFULLY_REGISTERED);
2157                 } else
2158                         return (NOT_REGISTERED);
2159         } else {
2160                 if (op == REGISTER_BUFFER) {
2161                         if (dpt->buffer_receiver[channel][target][lun] == callback)
2162                                 return (ALREADY_REGISTERED);
2163                         else
2164                                 return (REGISTERED_TO_ANOTHER);
2165                 } else {
2166                         if (dpt->buffer_receiver[channel][target][lun] == callback) {
2167                                 dpt->buffer_receiver[channel][target][lun] = NULL;
2168                                 crit_enter();
2169                                 dpt_Qpush_free(dpt, ccb);
2170                                 crit_exit();
2171                                 kfree(dpt->rw_buffer[channel][target][lun], M_DEVBUF);
2172                                 return (SUCCESSFULLY_REGISTERED);
2173                         } else
2174                                 return (INVALID_CALLBACK);
2175                 }
2176
2177         }
2178 }
2179
2180 /* Return the state of the blinking DPT LED's */
2181 u_int8_t
2182 dpt_blinking_led(dpt_softc_t * dpt)
2183 {
2184         int             ndx;
2185         u_int32_t       state;
2186         u_int32_t       previous;
2187         u_int8_t        result;
2188
2189         crit_enter();
2190
2191         result = 0;
2192
2193         for (ndx = 0, state = 0, previous = 0;
2194              (ndx < 10) && (state != previous);
2195              ndx++) {
2196                 previous = state;
2197                 state = dpt_inl(dpt, 1);
2198         }
2199
2200         if ((state == previous) && (state == DPT_BLINK_INDICATOR))
2201                 result = dpt_inb(dpt, 5);
2202
2203         crit_exit();
2204         return (result);
2205 }
2206
2207 /*
2208  * Execute a command which did not come from the kernel's SCSI layer.
2209  * The only way to map user commands to bus and target is to comply with the
2210  * standard DPT wire-down scheme:
2211  */
2212 int
2213 dpt_user_cmd(dpt_softc_t * dpt, eata_pt_t * user_cmd,
2214              caddr_t cmdarg, int minor_no)
2215 {
2216         dpt_ccb_t *ccb;
2217         void      *data;
2218         int        channel, target, lun;
2219         int        huh;
2220         int        result;
2221         int        submitted;
2222
2223         data = NULL;
2224         channel = minor2hba(minor_no);
2225         target = minor2target(minor_no);
2226         lun = minor2lun(minor_no);
2227
2228         if ((channel > (dpt->channels - 1))
2229          || (target > dpt->max_id)
2230          || (lun > dpt->max_lun))
2231                 return (ENXIO);
2232
2233         if (target == dpt->sc_scsi_link[channel].adapter_targ) {
2234                 /* This one is for the controller itself */
2235                 if ((user_cmd->eataID[0] != 'E')
2236                  || (user_cmd->eataID[1] != 'A')
2237                  || (user_cmd->eataID[2] != 'T')
2238                  || (user_cmd->eataID[3] != 'A')) {
2239                         return (ENXIO);
2240                 }
2241         }
2242         /* Get a DPT CCB, so we can prepare a command */
2243         crit_enter();
2244
2245         /* Process the free list */
2246         if ((TAILQ_EMPTY(&dpt->free_ccbs)) && dpt_alloc_freelist(dpt)) {
2247                 printf("dpt%d ERROR: Cannot allocate any more free CCB's.\n"
2248                        "             Please try later\n",
2249                        dpt->unit);
2250                 crit_exit();
2251                 return (EFAULT);
2252         }
2253         /* Now grab the newest CCB */
2254         if ((ccb = dpt_Qpop_free(dpt)) == NULL) {
2255                 crit_exit();
2256                 panic("dpt%d: Got a NULL CCB from pop_free()\n", dpt->unit);
2257         } else {
2258                 crit_exit();
2259                 /* Clean up the leftover of the previous tenant */
2260                 ccb->status = DPT_CCB_STATE_NEW;
2261         }
2262
2263         bcopy((caddr_t) & user_cmd->command_packet, (caddr_t) & ccb->eata_ccb,
2264               sizeof(eata_ccb_t));
2265
2266         /* We do not want to do user specified scatter/gather.  Why?? */
2267         if (ccb->eata_ccb.scatter == 1)
2268                 return (EINVAL);
2269
2270         ccb->eata_ccb.Auto_Req_Sen = 1;
2271         ccb->eata_ccb.reqlen = htonl(sizeof(struct scsi_sense_data));
2272         ccb->eata_ccb.cp_datalen = htonl(sizeof(ccb->eata_ccb.cp_datalen));
2273         ccb->eata_ccb.cp_dataDMA = htonl(vtophys(ccb->eata_ccb.cp_dataDMA));
2274         ccb->eata_ccb.cp_statDMA = htonl(vtophys(&ccb->eata_ccb.cp_statDMA));
2275         ccb->eata_ccb.cp_reqDMA = htonl(vtophys(&ccb->eata_ccb.cp_reqDMA));
2276         ccb->eata_ccb.cp_viraddr = (u_int32_t) & ccb;
2277
2278         if (ccb->eata_ccb.DataIn || ccb->eata_ccb.DataOut) {
2279                 /* Data I/O is involved in this command.  Alocate buffer */
2280                 if (ccb->eata_ccb.cp_datalen > PAGE_SIZE) {
2281                         data = contigmalloc(ccb->eata_ccb.cp_datalen,
2282                                             M_TEMP, M_WAITOK, 0, ~0,
2283                                             ccb->eata_ccb.cp_datalen,
2284                                             0x10000);
2285                 } else {
2286                         data = kmalloc(ccb->eata_ccb.cp_datalen, M_TEMP,
2287                                       M_WAITOK);
2288                 }
2289
2290                 if (data == NULL) {
2291                         printf("dpt%d: Cannot allocate %d bytes "
2292                                "for EATA command\n", dpt->unit,
2293                                ccb->eata_ccb.cp_datalen);
2294                         return (EFAULT);
2295                 }
2296 #define usr_cmd_DMA (caddr_t)user_cmd->command_packet.cp_dataDMA
2297                 if (ccb->eata_ccb.DataIn == 1) {
2298                         if (copyin(usr_cmd_DMA,
2299                                    data, ccb->eata_ccb.cp_datalen) == -1)
2300                                 return (EFAULT);
2301                 }
2302         } else {
2303                 /* No data I/O involved here.  Make sure the DPT knows that */
2304                 ccb->eata_ccb.cp_datalen = 0;
2305                 data = NULL;
2306         }
2307
2308         if (ccb->eata_ccb.FWNEST == 1)
2309                 ccb->eata_ccb.FWNEST = 0;
2310
2311         if (ccb->eata_ccb.cp_datalen != 0) {
2312                 if (dpt_scatter_gather(dpt, ccb, ccb->eata_ccb.cp_datalen,
2313                                        data) != 0) {
2314                         if (data != NULL)
2315                                 kfree(data, M_TEMP);
2316                         return (EFAULT);
2317                 }
2318         }
2319         /**
2320          * We are required to quiet a SCSI bus.
2321          * since we do not queue comands on a bus basis,
2322          * we wait for ALL commands on a controller to complete.
2323          * In the mean time, sched_queue() will not schedule new commands.
2324          */
2325         if ((ccb->eata_ccb.cp_cdb[0] == MULTIFUNCTION_CMD)
2326             && (ccb->eata_ccb.cp_cdb[2] == BUS_QUIET)) {
2327                 /* We wait for ALL traffic for this HBa to subside */
2328                 crit_enter();
2329                 dpt->state |= DPT_HA_QUIET;
2330                 crit_exit();
2331
2332                 while ((submitted = dpt->submitted_ccbs_count) != 0) {
2333                         huh = tsleep((void *) dpt, PCATCH, "dptqt", 100 * hz);
2334                         switch (huh) {
2335                         case 0:
2336                                 /* Wakeup call received */
2337                                 break;
2338                         case EWOULDBLOCK:
2339                                 /* Timer Expired */
2340                                 break;
2341                         default:
2342                                 /* anything else */
2343                                 break;
2344                         }
2345                 }
2346         }
2347         /* Resume normal operation */
2348         if ((ccb->eata_ccb.cp_cdb[0] == MULTIFUNCTION_CMD)
2349             && (ccb->eata_ccb.cp_cdb[2] == BUS_UNQUIET)) {
2350                 crit_enter();
2351                 dpt->state &= ~DPT_HA_QUIET;
2352                 crit_exit();
2353         }
2354         /**
2355          * Schedule the command and submit it.
2356          * We bypass dpt_sched_queue, as it will block on DPT_HA_QUIET
2357          */
2358         ccb->xs = NULL;
2359         ccb->flags = 0;
2360         ccb->eata_ccb.Auto_Req_Sen = 1; /* We always want this feature */
2361
2362         ccb->transaction_id = ++dpt->commands_processed;
2363         ccb->std_callback = (ccb_callback) dpt_user_cmd_done;
2364         ccb->result = (u_int32_t) & cmdarg;
2365         ccb->data = data;
2366
2367 #ifdef DPT_MEASURE_PERFORMANCE
2368         ++dpt->performance.command_count[ccb->eata_ccb.cp_scsi_cmd];
2369         ccb->command_started = microtime_now;
2370 #endif
2371         crit_enter();
2372         dpt_Qadd_waiting(dpt, ccb);
2373         crit_exit();
2374
2375         dpt_sched_queue(dpt);
2376
2377         /* Wait for the command to complete */
2378         (void) tsleep((void *) ccb, PCATCH, "dptucw", 100 * hz);
2379
2380         /* Free allocated memory */
2381         if (data != NULL)
2382                 kfree(data, M_TEMP);
2383
2384         return (0);
2385 }
2386
2387 static void
2388 dpt_user_cmd_done(dpt_softc_t * dpt, int bus, dpt_ccb_t * ccb)
2389 {
2390         u_int32_t       result;
2391         caddr_t         cmd_arg;
2392
2393         crit_enter();
2394
2395         /**
2396          * If Auto Request Sense is on, copyout the sense struct
2397          */
2398 #define usr_pckt_DMA    (caddr_t)(intptr_t)ntohl(ccb->eata_ccb.cp_reqDMA)
2399 #define usr_pckt_len    ntohl(ccb->eata_ccb.cp_datalen)
2400         if (ccb->eata_ccb.Auto_Req_Sen == 1) {
2401                 if (copyout((caddr_t) & ccb->sense_data, usr_pckt_DMA,
2402                             sizeof(struct scsi_sense_data))) {
2403                         ccb->result = EFAULT;
2404                         dpt_Qpush_free(dpt, ccb);
2405                         crit_exit();
2406                         wakeup(ccb);
2407                         return;
2408                 }
2409         }
2410         /* If DataIn is on, copyout the data */
2411         if ((ccb->eata_ccb.DataIn == 1)
2412             && (ccb->status_packet.hba_stat == HA_NO_ERROR)) {
2413                 if (copyout(ccb->data, usr_pckt_DMA, usr_pckt_len)) {
2414                         dpt_Qpush_free(dpt, ccb);
2415                         ccb->result = EFAULT;
2416
2417                         crit_exit();
2418                         wakeup(ccb);
2419                         return;
2420                 }
2421         }
2422         /* Copyout the status */
2423         result = ccb->status_packet.hba_stat;
2424         cmd_arg = (caddr_t) ccb->result;
2425
2426         if (copyout((caddr_t) & result, cmd_arg, sizeof(result))) {
2427                 dpt_Qpush_free(dpt, ccb);
2428                 ccb->result = EFAULT;
2429                 crit_exit();
2430                 wakeup(ccb);
2431                 return;
2432         }
2433         /* Put the CCB back in the freelist */
2434         ccb->state |= DPT_CCB_STATE_COMPLETED;
2435         dpt_Qpush_free(dpt, ccb);
2436
2437         /* Free allocated memory */
2438         crit_exit();
2439         return;
2440 }
2441
2442 #ifdef DPT_HANDLE_TIMEOUTS
2443 /**
2444  * This function walks down the SUBMITTED queue.
2445  * Every request that is too old gets aborted and marked.
2446  * Since the DPT will complete (interrupt) immediately (what does that mean?),
2447  * We just walk the list, aborting old commands and marking them as such.
2448  * The dpt_complete function will get rid of the that were interrupted in the
2449  * normal manner.
2450  *
2451  * This function needs to run at splcam(), as it interacts with the submitted
2452  * queue, as well as the completed and free queues.  Just like dpt_intr() does.
2453  * To run it at any ISPL other than that of dpt_intr(), will mean that dpt_intr
2454  * willbe able to pre-empt it, grab a transaction in progress (towards
2455  * destruction) and operate on it.  The state of this transaction will be not
2456  * very clear.
2457  * The only other option, is to lock it only as long as necessary but have
2458  * dpt_intr() spin-wait on it. In a UP environment this makes no sense and in
2459  * a SMP environment, the advantage is dubvious for a function that runs once
2460  * every ten seconds for few microseconds and, on systems with healthy
2461  * hardware, does not do anything anyway.
2462  */
2463
2464 static void
2465 dpt_handle_timeouts(dpt_softc_t * dpt)
2466 {
2467         dpt_ccb_t      *ccb;
2468
2469         crit_enter();
2470
2471         if (dpt->state & DPT_HA_TIMEOUTS_ACTIVE) {
2472                 printf("dpt%d WARNING: Timeout Handling Collision\n",
2473                        dpt->unit);
2474                 crit_exit();
2475                 return;
2476         }
2477         dpt->state |= DPT_HA_TIMEOUTS_ACTIVE;
2478
2479         /* Loop through the entire submitted queue, looking for lost souls */
2480         for (ccb = TAILQ_FIRST(&dpt->submitted_ccbs);
2481              ccb != NULL;
2482              ccb = TAILQ_NEXT(ccb, links)) {
2483                 struct scsi_xfer *xs;
2484                 u_int32_t       age, max_age;
2485
2486                 xs = ccb->xs;
2487                 age = dpt_time_delta(ccb->command_started, microtime_now);
2488
2489 #define TenSec  10000000
2490
2491                 if (xs == NULL) {       /* Local, non-kernel call */
2492                         max_age = TenSec;
2493                 } else {
2494                         max_age = (((xs->timeout * (dpt->submitted_ccbs_count
2495                                                     + DPT_TIMEOUT_FACTOR))
2496                                     > TenSec)
2497                                  ? (xs->timeout * (dpt->submitted_ccbs_count
2498                                                    + DPT_TIMEOUT_FACTOR))
2499                                    : TenSec);
2500                 }
2501
2502                 /*
2503                  * If a transaction is marked lost and is TWICE as old as we
2504                  * care, then, and only then do we destroy it!
2505                  */
2506                 if (ccb->state & DPT_CCB_STATE_MARKED_LOST) {
2507                         /* Remember who is next */
2508                         if (age > (max_age * 2)) {
2509                                 dpt_Qremove_submitted(dpt, ccb);
2510                                 ccb->state &= ~DPT_CCB_STATE_MARKED_LOST;
2511                                 ccb->state |= DPT_CCB_STATE_ABORTED;
2512 #define cmd_name scsi_cmd_name(ccb->eata_ccb.cp_scsi_cmd)
2513                                 if (ccb->retries++ > DPT_RETRIES) {
2514                                         printf("dpt%d ERROR: Destroying stale "
2515                                                "%d (%s)\n"
2516                                                "                on "
2517                                                "c%db%dt%du%d (%d/%d)\n",
2518                                              dpt->unit, ccb->transaction_id,
2519                                                cmd_name,
2520                                                dpt->unit,
2521                                                ccb->eata_ccb.cp_channel,
2522                                                ccb->eata_ccb.cp_id,
2523                                                ccb->eata_ccb.cp_LUN, age,
2524                                                ccb->retries);
2525 #define send_ccb &ccb->eata_ccb
2526 #define ESA      EATA_SPECIFIC_ABORT
2527                                         (void) dpt_send_immediate(dpt,
2528                                                                   send_ccb,
2529                                                                   ESA,
2530                                                                   0, 0);
2531                                         dpt_Qpush_free(dpt, ccb);
2532
2533                                         /* The SCSI layer should re-try */
2534                                         xs->error |= XS_TIMEOUT;
2535                                         xs->flags |= SCSI_ITSDONE;
2536                                         scsi_done(xs);
2537                                 } else {
2538                                         printf("dpt%d ERROR: Stale %d (%s) on "
2539                                                "c%db%dt%du%d (%d)\n"
2540                                              "          gets another "
2541                                                "chance(%d/%d)\n",
2542                                              dpt->unit, ccb->transaction_id,
2543                                                cmd_name,
2544                                                dpt->unit,
2545                                                ccb->eata_ccb.cp_channel,
2546                                                ccb->eata_ccb.cp_id,
2547                                                ccb->eata_ccb.cp_LUN,
2548                                             age, ccb->retries, DPT_RETRIES);
2549
2550                                         dpt_Qpush_waiting(dpt, ccb);
2551                                         dpt_sched_queue(dpt);
2552                                 }
2553                         }
2554                 } else {
2555                         /*
2556                          * This is a transaction that is not to be destroyed
2557                          * (yet) But it is too old for our liking. We wait as
2558                          * long as the upper layer thinks. Not really, we
2559                          * multiply that by the number of commands in the
2560                          * submitted queue + 1.
2561                          */
2562                         if (!(ccb->state & DPT_CCB_STATE_MARKED_LOST) &&
2563                             (age != ~0) && (age > max_age)) {
2564                                 printf("dpt%d ERROR: Marking %d (%s) on "
2565                                        "c%db%dt%du%d \n"
2566                                        "            as late after %dusec\n",
2567                                        dpt->unit, ccb->transaction_id,
2568                                        cmd_name,
2569                                        dpt->unit, ccb->eata_ccb.cp_channel,
2570                                        ccb->eata_ccb.cp_id,
2571                                        ccb->eata_ccb.cp_LUN, age);
2572                                 ccb->state |= DPT_CCB_STATE_MARKED_LOST;
2573                         }
2574                 }
2575         }
2576
2577         dpt->state &= ~DPT_HA_TIMEOUTS_ACTIVE;
2578         crit_exit();
2579 }
2580
2581 #endif                          /* DPT_HANDLE_TIMEOUTS */
2582
2583 #endif