2 * Copyright (c) 2002-2006 Sam Leffler, Errno Consulting, Atheros
3 * Communications, Inc. All rights reserved.
5 * Redistribution and use in source and binary forms are permitted
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36 * $Id: //depot/sw/linuxsrc/src/802_11/madwifi/hal/main/freebsd/ah_osdep.h#17 $
38 #ifndef _ATH_AH_OSDEP_H_
39 #define _ATH_AH_OSDEP_H_
41 * Atheros Hardware Access Layer (HAL) OS Dependent Definitions.
43 #include <sys/param.h>
44 #include <sys/systm.h>
45 #include <sys/endian.h>
48 typedef void* HAL_SOFTC;
49 typedef bus_space_tag_t HAL_BUS_TAG;
50 typedef bus_space_handle_t HAL_BUS_HANDLE;
51 typedef bus_addr_t HAL_BUS_ADDR;
54 * Delay n microseconds.
56 extern void ath_hal_delay(int);
57 #define OS_DELAY(_n) ath_hal_delay(_n)
59 #define OS_INLINE __inline
60 #define OS_MEMZERO(_a, _n) ath_hal_memzero((_a), (_n))
61 extern void ath_hal_memzero(void *, size_t);
62 #define OS_MEMCPY(_d, _s, _n) ath_hal_memcpy(_d,_s,_n)
63 extern void *ath_hal_memcpy(void *, const void *, size_t);
65 #define abs(_a) __builtin_abs(_a)
68 extern u_int32_t ath_hal_getuptime(struct ath_hal *);
69 #define OS_GETUPTIME(_ah) ath_hal_getuptime(_ah)
72 * Register read/write; we assume the registers will always
73 * be memory-mapped. Note that register accesses are done
74 * using target-specific functions when debugging is enabled
75 * (AH_DEBUG) or we are explicitly configured this way. The
76 * latter is used on some platforms where the full i/o space
77 * cannot be directly mapped.
79 #if defined(AH_DEBUG) || defined(AH_REGOPS_FUNC) || defined(AH_DEBUG_ALQ)
80 #define OS_REG_WRITE(_ah, _reg, _val) ath_hal_reg_write(_ah, _reg, _val)
81 #define OS_REG_READ(_ah, _reg) ath_hal_reg_read(_ah, _reg)
83 extern void ath_hal_reg_write(struct ath_hal *ah, u_int reg, u_int32_t val);
84 extern u_int32_t ath_hal_reg_read(struct ath_hal *ah, u_int reg);
87 * The hardware registers are native little-endian byte order.
88 * Big-endian hosts are handled by enabling hardware byte-swap
89 * of register reads and writes at reset. But the PCI clock
90 * domain registers are not byte swapped! Thus, on big-endian
91 * platforms we have to byte-swap thoese registers specifically.
92 * Most of this code is collapsed at compile time because the
93 * register values are constants.
95 #define AH_LITTLE_ENDIAN 1234
96 #define AH_BIG_ENDIAN 4321
98 #if _BYTE_ORDER == _BIG_ENDIAN
99 #define OS_REG_WRITE(_ah, _reg, _val) do { \
100 if ( (_reg) >= 0x4000 && (_reg) < 0x5000) \
101 bus_space_write_4((_ah)->ah_st, (_ah)->ah_sh, \
102 (_reg), htole32(_val)); \
104 bus_space_write_4((_ah)->ah_st, (_ah)->ah_sh, \
107 #define OS_REG_READ(_ah, _reg) \
108 (((_reg) >= 0x4000 && (_reg) < 0x5000) ? \
109 le32toh(bus_space_read_4((_ah)->ah_st, (_ah)->ah_sh, \
111 bus_space_read_4((_ah)->ah_st, (_ah)->ah_sh, (_reg)))
112 #else /* _BYTE_ORDER == _LITTLE_ENDIAN */
113 #define OS_REG_WRITE(_ah, _reg, _val) \
114 bus_space_write_4((_ah)->ah_st, (_ah)->ah_sh, (_reg), (_val))
115 #define OS_REG_READ(_ah, _reg) \
116 ((u_int32_t) bus_space_read_4((_ah)->ah_st, (_ah)->ah_sh, (_reg)))
117 #endif /* _BYTE_ORDER */
118 #endif /* AH_DEBUG || AH_REGFUNC || AH_DEBUG_ALQ */
121 extern void OS_MARK(struct ath_hal *, u_int id, u_int32_t value);
123 #define OS_MARK(_ah, _id, _v)
126 #endif /* _ATH_AH_OSDEP_H_ */