2 * Copyright (c) 1991 The Regents of the University of California.
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33 * $FreeBSD: src/sys/i386/isa/intr_machdep.h,v 1.19.2.2 2001/10/14 20:05:50 luigi Exp $
34 * $DragonFly: src/sys/platform/pc32/isa/intr_machdep.h,v 1.25 2006/10/23 21:50:31 dillon Exp $
37 #ifndef _ARCH_ISA_INTR_MACHDEP_H_
38 #define _ARCH_ISA_INTR_MACHDEP_H_
41 #ifndef _SYS_INTERRUPT_H_
42 #include <sys/interrupt.h>
44 #ifndef _SYS_SERIALIZE_H_
45 #include <sys/serialize.h>
50 * Low level interrupt code.
55 #define IDT_OFFSET 0x20
56 #define IDT_OFFSET_HWINT 0x60
57 #define IDT_OFFSET_IPI 0xe0
62 * Local APIC TPR priority vector levels:
64 * 0xff (255) +-------------+
65 * | | 15 (IPIs: Xcpustop, Xspuriousint)
66 * 0xf0 (240) +-------------+
67 * | | 14 (IPIs: Xinvltlb, Xipiq, Xtimer)
68 * 0xe0 (224) +-------------+
70 * 0xd0 (208) +-------------+
72 * 0xc0 (192) +-------------+
74 * 0xb0 (176) +-------------+
76 * 0xa0 (160) +-------------+
78 * 0x90 (144) +-------------+
79 * | | 8 (syscall at 0x80)
80 * 0x80 (128) +-------------+
82 * 0x70 (112) +-------------+
84 * 0x60 (96) +-------------+
86 * 0x50 (80) +-------------+
88 * 0x40 (64) +-------------+
90 * 0x30 (48) +-------------+
91 * | | 2 (8259A compat hardware INTs)
92 * 0x20 (32) +-------------+
93 * | | 1 (exceptions, traps, etc.)
94 * 0x10 (16) +-------------+
95 * | | 0 (exceptions, traps, etc.)
96 * 0x00 (0) +-------------+
100 /* Local APIC Task Priority Register */
101 #define TPR_IPI (IDT_OFFSET_IPI - 1)
107 #define IDT_OFFSET_IPIG1 IDT_OFFSET_IPI
110 #define XINVLTLB_OFFSET (IDT_OFFSET_IPIG1 + 0)
112 /* IPI group1 1: unused (was inter-cpu clock handling) */
113 /* IPI group1 2: unused (was inter-cpu rendezvous) */
116 #define XIPIQ_OFFSET (IDT_OFFSET_IPIG1 + 3)
118 /* Local APIC TIMER */
119 #define XTIMER_OFFSET (IDT_OFFSET_IPIG1 + 4)
121 /* IPI group1 5 ~ 15: unused */
127 #define IDT_OFFSET_IPIG2 (IDT_OFFSET_IPIG1 + TPR_STEP)
129 /* IPI to signal CPUs to stop and wait for another CPU to restart them */
130 #define XCPUSTOP_OFFSET (IDT_OFFSET_IPIG2 + 0)
132 /* IPI group2 1 ~ 14: unused */
134 /* NOTE: this vector MUST be xxxx1111 */
135 #define XSPURIOUSINT_OFFSET (IDT_OFFSET_IPIG2 + 15)
142 * Type of the first (asm) part of an interrupt handler.
144 typedef void inthand_t(u_int cs, u_int ef, u_int esp, u_int ss);
146 #define IDTVEC(name) __CONCAT(X,name)
150 Xinvltlb, /* TLB shootdowns */
151 Xcpuast, /* Additional software trap on other cpu */
152 Xforward_irq, /* Forward irq to cpu holding ISR lock */
153 Xcpustop, /* CPU stops & waits for another CPU to restart it */
154 Xspuriousint, /* handle APIC "spurious INTs" */
155 Xtimer, /* handle LAPIC timer INT */
156 Xipiq; /* handle lwkt_send_ipiq() requests */
159 void isa_defaultirq (void);
160 int isa_nmi (int cd);
161 void icu_reinit (void);
167 #endif /* !_ARCH_ISA_INTR_MACHDEP_H_ */