2 * Copyright (c) 2001 Wind River Systems
3 * Copyright (c) 1997, 1998, 1999, 2000, 2001
4 * Bill Paul <wpaul@bsdi.com>. All rights reserved.
6 * Redistribution and use in source and binary forms, with or without
7 * modification, are permitted provided that the following conditions
9 * 1. Redistributions of source code must retain the above copyright
10 * notice, this list of conditions and the following disclaimer.
11 * 2. Redistributions in binary form must reproduce the above copyright
12 * notice, this list of conditions and the following disclaimer in the
13 * documentation and/or other materials provided with the distribution.
14 * 3. All advertising materials mentioning features or use of this software
15 * must display the following acknowledgement:
16 * This product includes software developed by Bill Paul.
17 * 4. Neither the name of the author nor the names of any co-contributors
18 * may be used to endorse or promote products derived from this software
19 * without specific prior written permission.
21 * THIS SOFTWARE IS PROVIDED BY Bill Paul AND CONTRIBUTORS ``AS IS'' AND
22 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
23 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
24 * ARE DISCLAIMED. IN NO EVENT SHALL Bill Paul OR THE VOICES IN HIS HEAD
25 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
26 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
27 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
28 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
29 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
30 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF
31 * THE POSSIBILITY OF SUCH DAMAGE.
33 * $FreeBSD: src/sys/dev/nge/if_nge.c,v 1.13.2.13 2003/02/05 22:03:57 mbr Exp $
34 * $DragonFly: src/sys/dev/netif/nge/if_nge.c,v 1.12 2004/07/02 17:42:18 joerg Exp $
36 * $FreeBSD: src/sys/dev/nge/if_nge.c,v 1.13.2.13 2003/02/05 22:03:57 mbr Exp $
40 * National Semiconductor DP83820/DP83821 gigabit ethernet driver
41 * for FreeBSD. Datasheets are available from:
43 * http://www.national.com/ds/DP/DP83820.pdf
44 * http://www.national.com/ds/DP/DP83821.pdf
46 * These chips are used on several low cost gigabit ethernet NICs
47 * sold by D-Link, Addtron, SMC and Asante. Both parts are
48 * virtually the same, except the 83820 is a 64-bit/32-bit part,
49 * while the 83821 is 32-bit only.
51 * Many cards also use National gigE transceivers, such as the
52 * DP83891, DP83861 and DP83862 gigPHYTER parts. The DP83861 datasheet
53 * contains a full register description that applies to all of these
56 * http://www.national.com/ds/DP/DP83861.pdf
58 * Written by Bill Paul <wpaul@bsdi.com>
59 * BSDi Open Source Solutions
63 * The NatSemi DP83820 and 83821 controllers are enhanced versions
64 * of the NatSemi MacPHYTER 10/100 devices. They support 10, 100
65 * and 1000Mbps speeds with 1000baseX (ten bit interface), MII and GMII
66 * ports. Other features include 8K TX FIFO and 32K RX FIFO, TCP/IP
67 * hardware checksum offload (IPv4 only), VLAN tagging and filtering,
68 * priority TX and RX queues, a 2048 bit multicast hash filter, 4 RX pattern
69 * matching buffers, one perfect address filter buffer and interrupt
70 * moderation. The 83820 supports both 64-bit and 32-bit addressing
71 * and data transfers: the 64-bit support can be toggled on or off
72 * via software. This affects the size of certain fields in the DMA
75 * There are two bugs/misfeatures in the 83820/83821 that I have
78 * - Receive buffers must be aligned on 64-bit boundaries, which means
79 * you must resort to copying data in order to fix up the payload
82 * - In order to transmit jumbo frames larger than 8170 bytes, you have
83 * to turn off transmit checksum offloading, because the chip can't
84 * compute the checksum on an outgoing frame unless it fits entirely
85 * within the TX FIFO, which is only 8192 bytes in size. If you have
86 * TX checksum offload enabled and you transmit attempt to transmit a
87 * frame larger than 8170 bytes, the transmitter will wedge.
89 * To work around the latter problem, TX checksum offload is disabled
90 * if the user selects an MTU larger than 8152 (8170 - 18).
93 #include <sys/param.h>
94 #include <sys/systm.h>
95 #include <sys/sockio.h>
97 #include <sys/malloc.h>
98 #include <sys/kernel.h>
99 #include <sys/socket.h>
102 #include <net/if_arp.h>
103 #include <net/ethernet.h>
104 #include <net/if_dl.h>
105 #include <net/if_media.h>
106 #include <net/if_types.h>
107 #include <net/vlan/if_vlan_var.h>
111 #include <vm/vm.h> /* for vtophys */
112 #include <vm/pmap.h> /* for vtophys */
113 #include <machine/clock.h> /* for DELAY */
114 #include <machine/bus_pio.h>
115 #include <machine/bus_memio.h>
116 #include <machine/bus.h>
117 #include <machine/resource.h>
119 #include <sys/rman.h>
121 #include "../mii_layer/mii.h"
122 #include "../mii_layer/miivar.h"
124 #include <bus/pci/pcireg.h>
125 #include <bus/pci/pcivar.h>
127 #define NGE_USEIOSPACE
129 #include "if_ngereg.h"
132 /* "controller miibus0" required. See GENERIC if you get errors here. */
133 #include "miibus_if.h"
135 #define NGE_CSUM_FEATURES (CSUM_IP | CSUM_TCP | CSUM_UDP)
138 * Various supported device vendors/types and their names.
140 static struct nge_type nge_devs[] = {
141 { NGE_VENDORID, NGE_DEVICEID,
142 "National Semiconductor Gigabit Ethernet" },
146 static int nge_probe (device_t);
147 static int nge_attach (device_t);
148 static int nge_detach (device_t);
150 static int nge_alloc_jumbo_mem (struct nge_softc *);
151 static void nge_free_jumbo_mem (struct nge_softc *);
152 static void *nge_jalloc (struct nge_softc *);
153 static void nge_jfree (caddr_t, u_int);
154 static void nge_jref (caddr_t, u_int);
156 static int nge_newbuf (struct nge_softc *,
157 struct nge_desc *, struct mbuf *);
158 static int nge_encap (struct nge_softc *,
159 struct mbuf *, u_int32_t *);
160 static void nge_rxeof (struct nge_softc *);
161 static void nge_txeof (struct nge_softc *);
162 static void nge_intr (void *);
163 static void nge_tick (void *);
164 static void nge_start (struct ifnet *);
165 static int nge_ioctl (struct ifnet *, u_long, caddr_t,
167 static void nge_init (void *);
168 static void nge_stop (struct nge_softc *);
169 static void nge_watchdog (struct ifnet *);
170 static void nge_shutdown (device_t);
171 static int nge_ifmedia_upd (struct ifnet *);
172 static void nge_ifmedia_sts (struct ifnet *, struct ifmediareq *);
174 static void nge_delay (struct nge_softc *);
175 static void nge_eeprom_idle (struct nge_softc *);
176 static void nge_eeprom_putbyte (struct nge_softc *, int);
177 static void nge_eeprom_getword (struct nge_softc *, int, u_int16_t *);
178 static void nge_read_eeprom (struct nge_softc *, caddr_t, int, int, int);
180 static void nge_mii_sync (struct nge_softc *);
181 static void nge_mii_send (struct nge_softc *, u_int32_t, int);
182 static int nge_mii_readreg (struct nge_softc *, struct nge_mii_frame *);
183 static int nge_mii_writereg (struct nge_softc *, struct nge_mii_frame *);
185 static int nge_miibus_readreg (device_t, int, int);
186 static int nge_miibus_writereg (device_t, int, int, int);
187 static void nge_miibus_statchg (device_t);
189 static void nge_setmulti (struct nge_softc *);
190 static u_int32_t nge_crc (struct nge_softc *, caddr_t);
191 static void nge_reset (struct nge_softc *);
192 static int nge_list_rx_init (struct nge_softc *);
193 static int nge_list_tx_init (struct nge_softc *);
195 #ifdef NGE_USEIOSPACE
196 #define NGE_RES SYS_RES_IOPORT
197 #define NGE_RID NGE_PCI_LOIO
199 #define NGE_RES SYS_RES_MEMORY
200 #define NGE_RID NGE_PCI_LOMEM
203 static device_method_t nge_methods[] = {
204 /* Device interface */
205 DEVMETHOD(device_probe, nge_probe),
206 DEVMETHOD(device_attach, nge_attach),
207 DEVMETHOD(device_detach, nge_detach),
208 DEVMETHOD(device_shutdown, nge_shutdown),
211 DEVMETHOD(bus_print_child, bus_generic_print_child),
212 DEVMETHOD(bus_driver_added, bus_generic_driver_added),
215 DEVMETHOD(miibus_readreg, nge_miibus_readreg),
216 DEVMETHOD(miibus_writereg, nge_miibus_writereg),
217 DEVMETHOD(miibus_statchg, nge_miibus_statchg),
222 static driver_t nge_driver = {
225 sizeof(struct nge_softc)
228 static devclass_t nge_devclass;
230 DECLARE_DUMMY_MODULE(if_nge);
231 MODULE_DEPEND(if_nge, miibus, 1, 1, 1);
232 DRIVER_MODULE(if_nge, pci, nge_driver, nge_devclass, 0, 0);
233 DRIVER_MODULE(miibus, nge, miibus_driver, miibus_devclass, 0, 0);
235 #define NGE_SETBIT(sc, reg, x) \
236 CSR_WRITE_4(sc, reg, \
237 CSR_READ_4(sc, reg) | (x))
239 #define NGE_CLRBIT(sc, reg, x) \
240 CSR_WRITE_4(sc, reg, \
241 CSR_READ_4(sc, reg) & ~(x))
244 CSR_WRITE_4(sc, NGE_MEAR, CSR_READ_4(sc, NGE_MEAR) | x)
247 CSR_WRITE_4(sc, NGE_MEAR, CSR_READ_4(sc, NGE_MEAR) & ~x)
249 static void nge_delay(sc)
250 struct nge_softc *sc;
254 for (idx = (300 / 33) + 1; idx > 0; idx--)
255 CSR_READ_4(sc, NGE_CSR);
260 static void nge_eeprom_idle(sc)
261 struct nge_softc *sc;
265 SIO_SET(NGE_MEAR_EE_CSEL);
267 SIO_SET(NGE_MEAR_EE_CLK);
270 for (i = 0; i < 25; i++) {
271 SIO_CLR(NGE_MEAR_EE_CLK);
273 SIO_SET(NGE_MEAR_EE_CLK);
277 SIO_CLR(NGE_MEAR_EE_CLK);
279 SIO_CLR(NGE_MEAR_EE_CSEL);
281 CSR_WRITE_4(sc, NGE_MEAR, 0x00000000);
287 * Send a read command and address to the EEPROM, check for ACK.
289 static void nge_eeprom_putbyte(sc, addr)
290 struct nge_softc *sc;
295 d = addr | NGE_EECMD_READ;
298 * Feed in each bit and stobe the clock.
300 for (i = 0x400; i; i >>= 1) {
302 SIO_SET(NGE_MEAR_EE_DIN);
304 SIO_CLR(NGE_MEAR_EE_DIN);
307 SIO_SET(NGE_MEAR_EE_CLK);
309 SIO_CLR(NGE_MEAR_EE_CLK);
317 * Read a word of data stored in the EEPROM at address 'addr.'
319 static void nge_eeprom_getword(sc, addr, dest)
320 struct nge_softc *sc;
327 /* Force EEPROM to idle state. */
330 /* Enter EEPROM access mode. */
332 SIO_CLR(NGE_MEAR_EE_CLK);
334 SIO_SET(NGE_MEAR_EE_CSEL);
338 * Send address of word we want to read.
340 nge_eeprom_putbyte(sc, addr);
343 * Start reading bits from EEPROM.
345 for (i = 0x8000; i; i >>= 1) {
346 SIO_SET(NGE_MEAR_EE_CLK);
348 if (CSR_READ_4(sc, NGE_MEAR) & NGE_MEAR_EE_DOUT)
351 SIO_CLR(NGE_MEAR_EE_CLK);
355 /* Turn off EEPROM access mode. */
364 * Read a sequence of words from the EEPROM.
366 static void nge_read_eeprom(sc, dest, off, cnt, swap)
367 struct nge_softc *sc;
374 u_int16_t word = 0, *ptr;
376 for (i = 0; i < cnt; i++) {
377 nge_eeprom_getword(sc, off + i, &word);
378 ptr = (u_int16_t *)(dest + (i * 2));
389 * Sync the PHYs by setting data bit and strobing the clock 32 times.
391 static void nge_mii_sync(sc)
392 struct nge_softc *sc;
396 SIO_SET(NGE_MEAR_MII_DIR|NGE_MEAR_MII_DATA);
398 for (i = 0; i < 32; i++) {
399 SIO_SET(NGE_MEAR_MII_CLK);
401 SIO_CLR(NGE_MEAR_MII_CLK);
409 * Clock a series of bits through the MII.
411 static void nge_mii_send(sc, bits, cnt)
412 struct nge_softc *sc;
418 SIO_CLR(NGE_MEAR_MII_CLK);
420 for (i = (0x1 << (cnt - 1)); i; i >>= 1) {
422 SIO_SET(NGE_MEAR_MII_DATA);
424 SIO_CLR(NGE_MEAR_MII_DATA);
427 SIO_CLR(NGE_MEAR_MII_CLK);
429 SIO_SET(NGE_MEAR_MII_CLK);
434 * Read an PHY register through the MII.
436 static int nge_mii_readreg(sc, frame)
437 struct nge_softc *sc;
438 struct nge_mii_frame *frame;
446 * Set up frame for RX.
448 frame->mii_stdelim = NGE_MII_STARTDELIM;
449 frame->mii_opcode = NGE_MII_READOP;
450 frame->mii_turnaround = 0;
453 CSR_WRITE_4(sc, NGE_MEAR, 0);
458 SIO_SET(NGE_MEAR_MII_DIR);
463 * Send command/address info.
465 nge_mii_send(sc, frame->mii_stdelim, 2);
466 nge_mii_send(sc, frame->mii_opcode, 2);
467 nge_mii_send(sc, frame->mii_phyaddr, 5);
468 nge_mii_send(sc, frame->mii_regaddr, 5);
471 SIO_CLR((NGE_MEAR_MII_CLK|NGE_MEAR_MII_DATA));
473 SIO_SET(NGE_MEAR_MII_CLK);
477 SIO_CLR(NGE_MEAR_MII_DIR);
479 SIO_CLR(NGE_MEAR_MII_CLK);
481 ack = CSR_READ_4(sc, NGE_MEAR) & NGE_MEAR_MII_DATA;
482 SIO_SET(NGE_MEAR_MII_CLK);
486 * Now try reading data bits. If the ack failed, we still
487 * need to clock through 16 cycles to keep the PHY(s) in sync.
490 for(i = 0; i < 16; i++) {
491 SIO_CLR(NGE_MEAR_MII_CLK);
493 SIO_SET(NGE_MEAR_MII_CLK);
499 for (i = 0x8000; i; i >>= 1) {
500 SIO_CLR(NGE_MEAR_MII_CLK);
503 if (CSR_READ_4(sc, NGE_MEAR) & NGE_MEAR_MII_DATA)
504 frame->mii_data |= i;
507 SIO_SET(NGE_MEAR_MII_CLK);
513 SIO_CLR(NGE_MEAR_MII_CLK);
515 SIO_SET(NGE_MEAR_MII_CLK);
526 * Write to a PHY register through the MII.
528 static int nge_mii_writereg(sc, frame)
529 struct nge_softc *sc;
530 struct nge_mii_frame *frame;
537 * Set up frame for TX.
540 frame->mii_stdelim = NGE_MII_STARTDELIM;
541 frame->mii_opcode = NGE_MII_WRITEOP;
542 frame->mii_turnaround = NGE_MII_TURNAROUND;
545 * Turn on data output.
547 SIO_SET(NGE_MEAR_MII_DIR);
551 nge_mii_send(sc, frame->mii_stdelim, 2);
552 nge_mii_send(sc, frame->mii_opcode, 2);
553 nge_mii_send(sc, frame->mii_phyaddr, 5);
554 nge_mii_send(sc, frame->mii_regaddr, 5);
555 nge_mii_send(sc, frame->mii_turnaround, 2);
556 nge_mii_send(sc, frame->mii_data, 16);
559 SIO_SET(NGE_MEAR_MII_CLK);
561 SIO_CLR(NGE_MEAR_MII_CLK);
567 SIO_CLR(NGE_MEAR_MII_DIR);
574 static int nge_miibus_readreg(dev, phy, reg)
578 struct nge_softc *sc;
579 struct nge_mii_frame frame;
581 sc = device_get_softc(dev);
583 bzero((char *)&frame, sizeof(frame));
585 frame.mii_phyaddr = phy;
586 frame.mii_regaddr = reg;
587 nge_mii_readreg(sc, &frame);
589 return(frame.mii_data);
592 static int nge_miibus_writereg(dev, phy, reg, data)
596 struct nge_softc *sc;
597 struct nge_mii_frame frame;
599 sc = device_get_softc(dev);
601 bzero((char *)&frame, sizeof(frame));
603 frame.mii_phyaddr = phy;
604 frame.mii_regaddr = reg;
605 frame.mii_data = data;
606 nge_mii_writereg(sc, &frame);
611 static void nge_miibus_statchg(dev)
615 struct nge_softc *sc;
616 struct mii_data *mii;
618 sc = device_get_softc(dev);
620 if (IFM_SUBTYPE(sc->nge_ifmedia.ifm_cur->ifm_media)
622 status = CSR_READ_4(sc, NGE_TBI_ANLPAR);
623 if (status == 0 || status & NGE_TBIANAR_FDX) {
624 NGE_SETBIT(sc, NGE_TX_CFG,
625 (NGE_TXCFG_IGN_HBEAT|NGE_TXCFG_IGN_CARR));
626 NGE_SETBIT(sc, NGE_RX_CFG, NGE_RXCFG_RX_FDX);
628 NGE_CLRBIT(sc, NGE_TX_CFG,
629 (NGE_TXCFG_IGN_HBEAT|NGE_TXCFG_IGN_CARR));
630 NGE_CLRBIT(sc, NGE_RX_CFG, NGE_RXCFG_RX_FDX);
633 } else if ((sc->nge_ifmedia.ifm_cur->ifm_media & IFM_GMASK)
635 NGE_CLRBIT(sc, NGE_TX_CFG,
636 (NGE_TXCFG_IGN_HBEAT|NGE_TXCFG_IGN_CARR));
637 NGE_CLRBIT(sc, NGE_RX_CFG, NGE_RXCFG_RX_FDX);
639 NGE_SETBIT(sc, NGE_TX_CFG,
640 (NGE_TXCFG_IGN_HBEAT|NGE_TXCFG_IGN_CARR));
641 NGE_SETBIT(sc, NGE_RX_CFG, NGE_RXCFG_RX_FDX);
644 mii = device_get_softc(sc->nge_miibus);
646 if ((mii->mii_media_active & IFM_GMASK) == IFM_FDX) {
647 NGE_SETBIT(sc, NGE_TX_CFG,
648 (NGE_TXCFG_IGN_HBEAT|NGE_TXCFG_IGN_CARR));
649 NGE_SETBIT(sc, NGE_RX_CFG, NGE_RXCFG_RX_FDX);
651 NGE_CLRBIT(sc, NGE_TX_CFG,
652 (NGE_TXCFG_IGN_HBEAT|NGE_TXCFG_IGN_CARR));
653 NGE_CLRBIT(sc, NGE_RX_CFG, NGE_RXCFG_RX_FDX);
656 /* If we have a 1000Mbps link, set the mode_1000 bit. */
657 if (IFM_SUBTYPE(mii->mii_media_active) == IFM_1000_TX ||
658 IFM_SUBTYPE(mii->mii_media_active) == IFM_1000_SX) {
659 NGE_SETBIT(sc, NGE_CFG, NGE_CFG_MODE_1000);
661 NGE_CLRBIT(sc, NGE_CFG, NGE_CFG_MODE_1000);
667 static u_int32_t nge_crc(sc, addr)
668 struct nge_softc *sc;
671 u_int32_t crc, carry;
675 /* Compute CRC for the address value. */
676 crc = 0xFFFFFFFF; /* initial value */
678 for (i = 0; i < 6; i++) {
680 for (j = 0; j < 8; j++) {
681 carry = ((crc & 0x80000000) ? 1 : 0) ^ (c & 0x01);
685 crc = (crc ^ 0x04c11db6) | carry;
690 * return the filter bit position
693 return((crc >> 21) & 0x00000FFF);
696 static void nge_setmulti(sc)
697 struct nge_softc *sc;
700 struct ifmultiaddr *ifma;
701 u_int32_t h = 0, i, filtsave;
704 ifp = &sc->arpcom.ac_if;
706 if (ifp->if_flags & IFF_ALLMULTI || ifp->if_flags & IFF_PROMISC) {
707 NGE_CLRBIT(sc, NGE_RXFILT_CTL,
708 NGE_RXFILTCTL_MCHASH|NGE_RXFILTCTL_UCHASH);
709 NGE_SETBIT(sc, NGE_RXFILT_CTL, NGE_RXFILTCTL_ALLMULTI);
714 * We have to explicitly enable the multicast hash table
715 * on the NatSemi chip if we want to use it, which we do.
716 * We also have to tell it that we don't want to use the
717 * hash table for matching unicast addresses.
719 NGE_SETBIT(sc, NGE_RXFILT_CTL, NGE_RXFILTCTL_MCHASH);
720 NGE_CLRBIT(sc, NGE_RXFILT_CTL,
721 NGE_RXFILTCTL_ALLMULTI|NGE_RXFILTCTL_UCHASH);
723 filtsave = CSR_READ_4(sc, NGE_RXFILT_CTL);
725 /* first, zot all the existing hash bits */
726 for (i = 0; i < NGE_MCAST_FILTER_LEN; i += 2) {
727 CSR_WRITE_4(sc, NGE_RXFILT_CTL, NGE_FILTADDR_MCAST_LO + i);
728 CSR_WRITE_4(sc, NGE_RXFILT_DATA, 0);
732 * From the 11 bits returned by the crc routine, the top 7
733 * bits represent the 16-bit word in the mcast hash table
734 * that needs to be updated, and the lower 4 bits represent
735 * which bit within that byte needs to be set.
737 LIST_FOREACH(ifma, &ifp->if_multiaddrs, ifma_link) {
738 if (ifma->ifma_addr->sa_family != AF_LINK)
740 h = nge_crc(sc, LLADDR((struct sockaddr_dl *)ifma->ifma_addr));
741 index = (h >> 4) & 0x7F;
743 CSR_WRITE_4(sc, NGE_RXFILT_CTL,
744 NGE_FILTADDR_MCAST_LO + (index * 2));
745 NGE_SETBIT(sc, NGE_RXFILT_DATA, (1 << bit));
748 CSR_WRITE_4(sc, NGE_RXFILT_CTL, filtsave);
753 static void nge_reset(sc)
754 struct nge_softc *sc;
758 NGE_SETBIT(sc, NGE_CSR, NGE_CSR_RESET);
760 for (i = 0; i < NGE_TIMEOUT; i++) {
761 if (!(CSR_READ_4(sc, NGE_CSR) & NGE_CSR_RESET))
765 if (i == NGE_TIMEOUT)
766 printf("nge%d: reset never completed\n", sc->nge_unit);
768 /* Wait a little while for the chip to get its brains in order. */
772 * If this is a NetSemi chip, make sure to clear
775 CSR_WRITE_4(sc, NGE_CLKRUN, NGE_CLKRUN_PMESTS);
776 CSR_WRITE_4(sc, NGE_CLKRUN, 0);
782 * Probe for an NatSemi chip. Check the PCI vendor and device
783 * IDs against our list and return a device name if we find a match.
785 static int nge_probe(dev)
792 while(t->nge_name != NULL) {
793 if ((pci_get_vendor(dev) == t->nge_vid) &&
794 (pci_get_device(dev) == t->nge_did)) {
795 device_set_desc(dev, t->nge_name);
805 * Attach the interface. Allocate softc structures, do ifmedia
806 * setup and ethernet/BPF attach.
808 static int nge_attach(dev)
812 u_char eaddr[ETHER_ADDR_LEN];
814 struct nge_softc *sc;
816 int unit, error = 0, rid;
817 const char *sep = "";
821 sc = device_get_softc(dev);
822 unit = device_get_unit(dev);
823 bzero(sc, sizeof(struct nge_softc));
826 * Handle power management nonsense.
830 command = pci_read_config(dev, NGE_PCI_CAPID, 4) & 0x000000FF;
831 if (command == 0x01) {
833 command = pci_read_config(dev, NGE_PCI_PWRMGMTCTRL, 4);
834 if (command & NGE_PSTATE_MASK) {
835 u_int32_t iobase, membase, irq;
837 /* Save important PCI config data. */
838 iobase = pci_read_config(dev, NGE_PCI_LOIO, 4);
839 membase = pci_read_config(dev, NGE_PCI_LOMEM, 4);
840 irq = pci_read_config(dev, NGE_PCI_INTLINE, 4);
842 /* Reset the power state. */
843 printf("nge%d: chip is in D%d power mode "
844 "-- setting to D0\n", unit, command & NGE_PSTATE_MASK);
845 command &= 0xFFFFFFFC;
846 pci_write_config(dev, NGE_PCI_PWRMGMTCTRL, command, 4);
848 /* Restore PCI config data. */
849 pci_write_config(dev, NGE_PCI_LOIO, iobase, 4);
850 pci_write_config(dev, NGE_PCI_LOMEM, membase, 4);
851 pci_write_config(dev, NGE_PCI_INTLINE, irq, 4);
856 * Map control/status registers.
858 command = pci_read_config(dev, PCIR_COMMAND, 4);
859 command |= (PCIM_CMD_PORTEN|PCIM_CMD_MEMEN|PCIM_CMD_BUSMASTEREN);
860 pci_write_config(dev, PCIR_COMMAND, command, 4);
861 command = pci_read_config(dev, PCIR_COMMAND, 4);
863 #ifdef NGE_USEIOSPACE
864 if (!(command & PCIM_CMD_PORTEN)) {
865 printf("nge%d: failed to enable I/O ports!\n", unit);
870 if (!(command & PCIM_CMD_MEMEN)) {
871 printf("nge%d: failed to enable memory mapping!\n", unit);
878 sc->nge_res = bus_alloc_resource(dev, NGE_RES, &rid,
879 0, ~0, 1, RF_ACTIVE);
881 if (sc->nge_res == NULL) {
882 printf("nge%d: couldn't map ports/memory\n", unit);
887 sc->nge_btag = rman_get_bustag(sc->nge_res);
888 sc->nge_bhandle = rman_get_bushandle(sc->nge_res);
890 /* Allocate interrupt */
892 sc->nge_irq = bus_alloc_resource(dev, SYS_RES_IRQ, &rid, 0, ~0, 1,
893 RF_SHAREABLE | RF_ACTIVE);
895 if (sc->nge_irq == NULL) {
896 printf("nge%d: couldn't map interrupt\n", unit);
897 bus_release_resource(dev, NGE_RES, NGE_RID, sc->nge_res);
902 error = bus_setup_intr(dev, sc->nge_irq, INTR_TYPE_NET,
903 nge_intr, sc, &sc->nge_intrhand);
906 bus_release_resource(dev, SYS_RES_IRQ, 0, sc->nge_irq);
907 bus_release_resource(dev, NGE_RES, NGE_RID, sc->nge_res);
908 printf("nge%d: couldn't set up irq\n", unit);
912 /* Reset the adapter. */
916 * Get station address from the EEPROM.
918 nge_read_eeprom(sc, (caddr_t)&eaddr[4], NGE_EE_NODEADDR, 1, 0);
919 nge_read_eeprom(sc, (caddr_t)&eaddr[2], NGE_EE_NODEADDR + 1, 1, 0);
920 nge_read_eeprom(sc, (caddr_t)&eaddr[0], NGE_EE_NODEADDR + 2, 1, 0);
924 sc->nge_ldata = contigmalloc(sizeof(struct nge_list_data), M_DEVBUF,
925 M_NOWAIT, 0, 0xffffffff, PAGE_SIZE, 0);
927 if (sc->nge_ldata == NULL) {
928 printf("nge%d: no memory for list buffers!\n", unit);
929 bus_teardown_intr(dev, sc->nge_irq, sc->nge_intrhand);
930 bus_release_resource(dev, SYS_RES_IRQ, 0, sc->nge_irq);
931 bus_release_resource(dev, NGE_RES, NGE_RID, sc->nge_res);
935 bzero(sc->nge_ldata, sizeof(struct nge_list_data));
937 /* Try to allocate memory for jumbo buffers. */
938 if (nge_alloc_jumbo_mem(sc)) {
939 printf("nge%d: jumbo buffer allocation failed\n",
941 contigfree(sc->nge_ldata,
942 sizeof(struct nge_list_data), M_DEVBUF);
943 bus_teardown_intr(dev, sc->nge_irq, sc->nge_intrhand);
944 bus_release_resource(dev, SYS_RES_IRQ, 0, sc->nge_irq);
945 bus_release_resource(dev, NGE_RES, NGE_RID, sc->nge_res);
950 ifp = &sc->arpcom.ac_if;
952 if_initname(ifp, "nge", unit);
953 ifp->if_mtu = ETHERMTU;
954 ifp->if_flags = IFF_BROADCAST | IFF_SIMPLEX | IFF_MULTICAST;
955 ifp->if_ioctl = nge_ioctl;
956 ifp->if_output = ether_output;
957 ifp->if_start = nge_start;
958 ifp->if_watchdog = nge_watchdog;
959 ifp->if_init = nge_init;
960 ifp->if_baudrate = 1000000000;
961 ifp->if_snd.ifq_maxlen = NGE_TX_LIST_CNT - 1;
962 ifp->if_hwassist = NGE_CSUM_FEATURES;
963 ifp->if_capabilities = IFCAP_HWCSUM;
964 ifp->if_capenable = ifp->if_capabilities;
969 if (mii_phy_probe(dev, &sc->nge_miibus,
970 nge_ifmedia_upd, nge_ifmedia_sts)) {
971 if (CSR_READ_4(sc, NGE_CFG) & NGE_CFG_TBI_EN) {
973 device_printf(dev, "Using TBI\n");
975 sc->nge_miibus = dev;
977 ifmedia_init(&sc->nge_ifmedia, 0, nge_ifmedia_upd,
979 #define ADD(m, c) ifmedia_add(&sc->nge_ifmedia, (m), (c), NULL)
980 #define PRINT(s) printf("%s%s", sep, s); sep = ", "
981 ADD(IFM_MAKEWORD(IFM_ETHER, IFM_NONE, 0, 0), 0);
982 device_printf(dev, " ");
983 ADD(IFM_MAKEWORD(IFM_ETHER, IFM_1000_SX, 0, 0), 0);
985 ADD(IFM_MAKEWORD(IFM_ETHER, IFM_1000_SX, IFM_FDX, 0),0);
986 PRINT("1000baseSX-FDX");
987 ADD(IFM_MAKEWORD(IFM_ETHER, IFM_AUTO, 0, 0), 0);
993 ifmedia_set(&sc->nge_ifmedia,
994 IFM_MAKEWORD(IFM_ETHER, IFM_AUTO, 0, 0));
996 CSR_WRITE_4(sc, NGE_GPIO, CSR_READ_4(sc, NGE_GPIO)
998 | NGE_GPIO_GP1_OUTENB | NGE_GPIO_GP2_OUTENB
999 | NGE_GPIO_GP3_OUTENB
1000 | NGE_GPIO_GP3_IN | NGE_GPIO_GP4_IN);
1003 printf("nge%d: MII without any PHY!\n", sc->nge_unit);
1004 nge_free_jumbo_mem(sc);
1005 bus_teardown_intr(dev, sc->nge_irq, sc->nge_intrhand);
1006 bus_release_resource(dev, SYS_RES_IRQ, 0, sc->nge_irq);
1007 bus_release_resource(dev, NGE_RES, NGE_RID,
1015 * Call MI attach routine.
1017 ether_ifattach(ifp, eaddr);
1018 callout_handle_init(&sc->nge_stat_ch);
1026 static int nge_detach(dev)
1029 struct nge_softc *sc;
1035 sc = device_get_softc(dev);
1036 ifp = &sc->arpcom.ac_if;
1040 ether_ifdetach(ifp);
1042 bus_generic_detach(dev);
1044 device_delete_child(dev, sc->nge_miibus);
1046 bus_teardown_intr(dev, sc->nge_irq, sc->nge_intrhand);
1047 bus_release_resource(dev, SYS_RES_IRQ, 0, sc->nge_irq);
1048 bus_release_resource(dev, NGE_RES, NGE_RID, sc->nge_res);
1050 contigfree(sc->nge_ldata, sizeof(struct nge_list_data), M_DEVBUF);
1051 nge_free_jumbo_mem(sc);
1059 * Initialize the transmit descriptors.
1061 static int nge_list_tx_init(sc)
1062 struct nge_softc *sc;
1064 struct nge_list_data *ld;
1065 struct nge_ring_data *cd;
1068 cd = &sc->nge_cdata;
1071 for (i = 0; i < NGE_TX_LIST_CNT; i++) {
1072 if (i == (NGE_TX_LIST_CNT - 1)) {
1073 ld->nge_tx_list[i].nge_nextdesc =
1074 &ld->nge_tx_list[0];
1075 ld->nge_tx_list[i].nge_next =
1076 vtophys(&ld->nge_tx_list[0]);
1078 ld->nge_tx_list[i].nge_nextdesc =
1079 &ld->nge_tx_list[i + 1];
1080 ld->nge_tx_list[i].nge_next =
1081 vtophys(&ld->nge_tx_list[i + 1]);
1083 ld->nge_tx_list[i].nge_mbuf = NULL;
1084 ld->nge_tx_list[i].nge_ptr = 0;
1085 ld->nge_tx_list[i].nge_ctl = 0;
1088 cd->nge_tx_prod = cd->nge_tx_cons = cd->nge_tx_cnt = 0;
1095 * Initialize the RX descriptors and allocate mbufs for them. Note that
1096 * we arrange the descriptors in a closed ring, so that the last descriptor
1097 * points back to the first.
1099 static int nge_list_rx_init(sc)
1100 struct nge_softc *sc;
1102 struct nge_list_data *ld;
1103 struct nge_ring_data *cd;
1107 cd = &sc->nge_cdata;
1109 for (i = 0; i < NGE_RX_LIST_CNT; i++) {
1110 if (nge_newbuf(sc, &ld->nge_rx_list[i], NULL) == ENOBUFS)
1112 if (i == (NGE_RX_LIST_CNT - 1)) {
1113 ld->nge_rx_list[i].nge_nextdesc =
1114 &ld->nge_rx_list[0];
1115 ld->nge_rx_list[i].nge_next =
1116 vtophys(&ld->nge_rx_list[0]);
1118 ld->nge_rx_list[i].nge_nextdesc =
1119 &ld->nge_rx_list[i + 1];
1120 ld->nge_rx_list[i].nge_next =
1121 vtophys(&ld->nge_rx_list[i + 1]);
1125 cd->nge_rx_prod = 0;
1131 * Initialize an RX descriptor and attach an MBUF cluster.
1133 static int nge_newbuf(sc, c, m)
1134 struct nge_softc *sc;
1138 struct mbuf *m_new = NULL;
1139 caddr_t *buf = NULL;
1142 MGETHDR(m_new, MB_DONTWAIT, MT_DATA);
1143 if (m_new == NULL) {
1144 printf("nge%d: no memory for rx list "
1145 "-- packet dropped!\n", sc->nge_unit);
1149 /* Allocate the jumbo buffer */
1150 buf = nge_jalloc(sc);
1153 printf("nge%d: jumbo allocation failed "
1154 "-- packet dropped!\n", sc->nge_unit);
1159 /* Attach the buffer to the mbuf */
1160 m_new->m_data = m_new->m_ext.ext_buf = (void *)buf;
1161 m_new->m_flags |= M_EXT;
1162 m_new->m_ext.ext_size = m_new->m_pkthdr.len =
1163 m_new->m_len = NGE_MCLBYTES;
1164 m_new->m_ext.ext_free = nge_jfree;
1165 m_new->m_ext.ext_ref = nge_jref;
1168 m_new->m_len = m_new->m_pkthdr.len = NGE_MCLBYTES;
1169 m_new->m_data = m_new->m_ext.ext_buf;
1172 m_adj(m_new, sizeof(u_int64_t));
1174 c->nge_mbuf = m_new;
1175 c->nge_ptr = vtophys(mtod(m_new, caddr_t));
1176 c->nge_ctl = m_new->m_len;
1182 static int nge_alloc_jumbo_mem(sc)
1183 struct nge_softc *sc;
1187 struct nge_jpool_entry *entry;
1189 /* Grab a big chunk o' storage. */
1190 sc->nge_cdata.nge_jumbo_buf = contigmalloc(NGE_JMEM, M_DEVBUF,
1191 M_NOWAIT, 0, 0xffffffff, PAGE_SIZE, 0);
1193 if (sc->nge_cdata.nge_jumbo_buf == NULL) {
1194 printf("nge%d: no memory for jumbo buffers!\n", sc->nge_unit);
1198 SLIST_INIT(&sc->nge_jfree_listhead);
1199 SLIST_INIT(&sc->nge_jinuse_listhead);
1202 * Now divide it up into 9K pieces and save the addresses
1205 ptr = sc->nge_cdata.nge_jumbo_buf;
1206 for (i = 0; i < NGE_JSLOTS; i++) {
1208 aptr = (u_int64_t **)ptr;
1209 aptr[0] = (u_int64_t *)sc;
1210 ptr += sizeof(u_int64_t);
1211 sc->nge_cdata.nge_jslots[i].nge_buf = ptr;
1212 sc->nge_cdata.nge_jslots[i].nge_inuse = 0;
1213 ptr += NGE_MCLBYTES;
1214 entry = malloc(sizeof(struct nge_jpool_entry),
1215 M_DEVBUF, M_WAITOK);
1216 if (entry == NULL) {
1217 printf("nge%d: no memory for jumbo "
1218 "buffer queue!\n", sc->nge_unit);
1222 SLIST_INSERT_HEAD(&sc->nge_jfree_listhead,
1223 entry, jpool_entries);
1229 static void nge_free_jumbo_mem(sc)
1230 struct nge_softc *sc;
1233 struct nge_jpool_entry *entry;
1235 for (i = 0; i < NGE_JSLOTS; i++) {
1236 entry = SLIST_FIRST(&sc->nge_jfree_listhead);
1237 SLIST_REMOVE_HEAD(&sc->nge_jfree_listhead, jpool_entries);
1238 free(entry, M_DEVBUF);
1241 contigfree(sc->nge_cdata.nge_jumbo_buf, NGE_JMEM, M_DEVBUF);
1247 * Allocate a jumbo buffer.
1249 static void *nge_jalloc(sc)
1250 struct nge_softc *sc;
1252 struct nge_jpool_entry *entry;
1254 entry = SLIST_FIRST(&sc->nge_jfree_listhead);
1256 if (entry == NULL) {
1258 printf("nge%d: no free jumbo buffers\n", sc->nge_unit);
1263 SLIST_REMOVE_HEAD(&sc->nge_jfree_listhead, jpool_entries);
1264 SLIST_INSERT_HEAD(&sc->nge_jinuse_listhead, entry, jpool_entries);
1265 sc->nge_cdata.nge_jslots[entry->slot].nge_inuse = 1;
1266 return(sc->nge_cdata.nge_jslots[entry->slot].nge_buf);
1270 * Adjust usage count on a jumbo buffer. In general this doesn't
1271 * get used much because our jumbo buffers don't get passed around
1272 * a lot, but it's implemented for correctness.
1274 static void nge_jref(buf, size)
1278 struct nge_softc *sc;
1282 /* Extract the softc struct pointer. */
1283 aptr = (u_int64_t **)(buf - sizeof(u_int64_t));
1284 sc = (struct nge_softc *)(aptr[0]);
1287 panic("nge_jref: can't find softc pointer!");
1289 if (size != NGE_MCLBYTES)
1290 panic("nge_jref: adjusting refcount of buf of wrong size!");
1292 /* calculate the slot this buffer belongs to */
1294 i = ((vm_offset_t)aptr
1295 - (vm_offset_t)sc->nge_cdata.nge_jumbo_buf) / NGE_JLEN;
1297 if ((i < 0) || (i >= NGE_JSLOTS))
1298 panic("nge_jref: asked to reference buffer "
1299 "that we don't manage!");
1300 else if (sc->nge_cdata.nge_jslots[i].nge_inuse == 0)
1301 panic("nge_jref: buffer already free!");
1303 sc->nge_cdata.nge_jslots[i].nge_inuse++;
1309 * Release a jumbo buffer.
1311 static void nge_jfree(buf, size)
1315 struct nge_softc *sc;
1318 struct nge_jpool_entry *entry;
1320 /* Extract the softc struct pointer. */
1321 aptr = (u_int64_t **)(buf - sizeof(u_int64_t));
1322 sc = (struct nge_softc *)(aptr[0]);
1325 panic("nge_jfree: can't find softc pointer!");
1327 if (size != NGE_MCLBYTES)
1328 panic("nge_jfree: freeing buffer of wrong size!");
1330 /* calculate the slot this buffer belongs to */
1332 i = ((vm_offset_t)aptr
1333 - (vm_offset_t)sc->nge_cdata.nge_jumbo_buf) / NGE_JLEN;
1335 if ((i < 0) || (i >= NGE_JSLOTS))
1336 panic("nge_jfree: asked to free buffer that we don't manage!");
1337 else if (sc->nge_cdata.nge_jslots[i].nge_inuse == 0)
1338 panic("nge_jfree: buffer already free!");
1340 sc->nge_cdata.nge_jslots[i].nge_inuse--;
1341 if(sc->nge_cdata.nge_jslots[i].nge_inuse == 0) {
1342 entry = SLIST_FIRST(&sc->nge_jinuse_listhead);
1344 panic("nge_jfree: buffer not in use!");
1346 SLIST_REMOVE_HEAD(&sc->nge_jinuse_listhead,
1348 SLIST_INSERT_HEAD(&sc->nge_jfree_listhead,
1349 entry, jpool_entries);
1356 * A frame has been uploaded: pass the resulting mbuf chain up to
1357 * the higher level protocols.
1359 static void nge_rxeof(sc)
1360 struct nge_softc *sc;
1362 struct ether_header *eh;
1365 struct nge_desc *cur_rx;
1366 int i, total_len = 0;
1369 ifp = &sc->arpcom.ac_if;
1370 i = sc->nge_cdata.nge_rx_prod;
1372 while(NGE_OWNDESC(&sc->nge_ldata->nge_rx_list[i])) {
1373 struct mbuf *m0 = NULL;
1376 #ifdef DEVICE_POLLING
1377 if (ifp->if_flags & IFF_POLLING) {
1378 if (sc->rxcycles <= 0)
1382 #endif /* DEVICE_POLLING */
1384 cur_rx = &sc->nge_ldata->nge_rx_list[i];
1385 rxstat = cur_rx->nge_rxstat;
1386 extsts = cur_rx->nge_extsts;
1387 m = cur_rx->nge_mbuf;
1388 cur_rx->nge_mbuf = NULL;
1389 total_len = NGE_RXBYTES(cur_rx);
1390 NGE_INC(i, NGE_RX_LIST_CNT);
1392 * If an error occurs, update stats, clear the
1393 * status word and leave the mbuf cluster in place:
1394 * it should simply get re-used next time this descriptor
1395 * comes up in the ring.
1397 if (!(rxstat & NGE_CMDSTS_PKT_OK)) {
1399 nge_newbuf(sc, cur_rx, m);
1404 * Ok. NatSemi really screwed up here. This is the
1405 * only gigE chip I know of with alignment constraints
1406 * on receive buffers. RX buffers must be 64-bit aligned.
1410 * By popular demand, ignore the alignment problems
1411 * on the Intel x86 platform. The performance hit
1412 * incurred due to unaligned accesses is much smaller
1413 * than the hit produced by forcing buffer copies all
1414 * the time, especially with jumbo frames. We still
1415 * need to fix up the alignment everywhere else though.
1417 if (nge_newbuf(sc, cur_rx, NULL) == ENOBUFS) {
1419 m0 = m_devget(mtod(m, char *) - ETHER_ALIGN,
1420 total_len + ETHER_ALIGN, 0, ifp, NULL);
1421 nge_newbuf(sc, cur_rx, m);
1423 printf("nge%d: no receive buffers "
1424 "available -- packet dropped!\n",
1429 m_adj(m0, ETHER_ALIGN);
1433 m->m_pkthdr.rcvif = ifp;
1434 m->m_pkthdr.len = m->m_len = total_len;
1439 eh = mtod(m, struct ether_header *);
1441 /* Remove header from mbuf and pass it on. */
1442 m_adj(m, sizeof(struct ether_header));
1444 /* Do IP checksum checking. */
1445 if (extsts & NGE_RXEXTSTS_IPPKT)
1446 m->m_pkthdr.csum_flags |= CSUM_IP_CHECKED;
1447 if (!(extsts & NGE_RXEXTSTS_IPCSUMERR))
1448 m->m_pkthdr.csum_flags |= CSUM_IP_VALID;
1449 if ((extsts & NGE_RXEXTSTS_TCPPKT &&
1450 !(extsts & NGE_RXEXTSTS_TCPCSUMERR)) ||
1451 (extsts & NGE_RXEXTSTS_UDPPKT &&
1452 !(extsts & NGE_RXEXTSTS_UDPCSUMERR))) {
1453 m->m_pkthdr.csum_flags |=
1454 CSUM_DATA_VALID|CSUM_PSEUDO_HDR;
1455 m->m_pkthdr.csum_data = 0xffff;
1459 * If we received a packet with a vlan tag, pass it
1460 * to vlan_input() instead of ether_input().
1462 if (extsts & NGE_RXEXTSTS_VLANPKT) {
1463 VLAN_INPUT_TAG(eh, m, extsts & NGE_RXEXTSTS_VTCI);
1467 ether_input(ifp, eh, m);
1470 sc->nge_cdata.nge_rx_prod = i;
1476 * A frame was downloaded to the chip. It's safe for us to clean up
1480 static void nge_txeof(sc)
1481 struct nge_softc *sc;
1483 struct nge_desc *cur_tx = NULL;
1487 ifp = &sc->arpcom.ac_if;
1489 /* Clear the timeout timer. */
1493 * Go through our tx list and free mbufs for those
1494 * frames that have been transmitted.
1496 idx = sc->nge_cdata.nge_tx_cons;
1497 while (idx != sc->nge_cdata.nge_tx_prod) {
1498 cur_tx = &sc->nge_ldata->nge_tx_list[idx];
1500 if (NGE_OWNDESC(cur_tx))
1503 if (cur_tx->nge_ctl & NGE_CMDSTS_MORE) {
1504 sc->nge_cdata.nge_tx_cnt--;
1505 NGE_INC(idx, NGE_TX_LIST_CNT);
1509 if (!(cur_tx->nge_ctl & NGE_CMDSTS_PKT_OK)) {
1511 if (cur_tx->nge_txstat & NGE_TXSTAT_EXCESSCOLLS)
1512 ifp->if_collisions++;
1513 if (cur_tx->nge_txstat & NGE_TXSTAT_OUTOFWINCOLL)
1514 ifp->if_collisions++;
1517 ifp->if_collisions +=
1518 (cur_tx->nge_txstat & NGE_TXSTAT_COLLCNT) >> 16;
1521 if (cur_tx->nge_mbuf != NULL) {
1522 m_freem(cur_tx->nge_mbuf);
1523 cur_tx->nge_mbuf = NULL;
1526 sc->nge_cdata.nge_tx_cnt--;
1527 NGE_INC(idx, NGE_TX_LIST_CNT);
1531 sc->nge_cdata.nge_tx_cons = idx;
1534 ifp->if_flags &= ~IFF_OACTIVE;
1539 static void nge_tick(xsc)
1542 struct nge_softc *sc;
1543 struct mii_data *mii;
1550 ifp = &sc->arpcom.ac_if;
1553 if (!sc->nge_link) {
1554 if (CSR_READ_4(sc, NGE_TBI_BMSR)
1555 & NGE_TBIBMSR_ANEG_DONE) {
1556 printf("nge%d: gigabit link up\n",
1558 nge_miibus_statchg(sc->nge_miibus);
1560 if (ifp->if_snd.ifq_head != NULL)
1565 mii = device_get_softc(sc->nge_miibus);
1568 if (!sc->nge_link) {
1569 if (mii->mii_media_status & IFM_ACTIVE &&
1570 IFM_SUBTYPE(mii->mii_media_active) != IFM_NONE) {
1572 if (IFM_SUBTYPE(mii->mii_media_active)
1574 printf("nge%d: gigabit link up\n",
1576 if (ifp->if_snd.ifq_head != NULL)
1581 sc->nge_stat_ch = timeout(nge_tick, sc, hz);
1588 #ifdef DEVICE_POLLING
1589 static poll_handler_t nge_poll;
1592 nge_poll(struct ifnet *ifp, enum poll_cmd cmd, int count)
1594 struct nge_softc *sc = ifp->if_softc;
1596 if (cmd == POLL_DEREGISTER) { /* final call, enable interrupts */
1597 CSR_WRITE_4(sc, NGE_IER, 1);
1602 * On the nge, reading the status register also clears it.
1603 * So before returning to intr mode we must make sure that all
1604 * possible pending sources of interrupts have been served.
1605 * In practice this means run to completion the *eof routines,
1606 * and then call the interrupt routine
1608 sc->rxcycles = count;
1611 if (ifp->if_snd.ifq_head != NULL)
1614 if (sc->rxcycles > 0 || cmd == POLL_AND_CHECK_STATUS) {
1617 /* Reading the ISR register clears all interrupts. */
1618 status = CSR_READ_4(sc, NGE_ISR);
1620 if (status & (NGE_ISR_RX_ERR|NGE_ISR_RX_OFLOW))
1623 if (status & (NGE_ISR_RX_IDLE))
1624 NGE_SETBIT(sc, NGE_CSR, NGE_CSR_RX_ENABLE);
1626 if (status & NGE_ISR_SYSERR) {
1632 #endif /* DEVICE_POLLING */
1634 static void nge_intr(arg)
1637 struct nge_softc *sc;
1642 ifp = &sc->arpcom.ac_if;
1644 #ifdef DEVICE_POLLING
1645 if (ifp->if_flags & IFF_POLLING)
1647 if (ether_poll_register(nge_poll, ifp)) { /* ok, disable interrupts */
1648 CSR_WRITE_4(sc, NGE_IER, 0);
1649 nge_poll(ifp, 0, 1);
1652 #endif /* DEVICE_POLLING */
1654 /* Supress unwanted interrupts */
1655 if (!(ifp->if_flags & IFF_UP)) {
1660 /* Disable interrupts. */
1661 CSR_WRITE_4(sc, NGE_IER, 0);
1663 /* Data LED on for TBI mode */
1665 CSR_WRITE_4(sc, NGE_GPIO, CSR_READ_4(sc, NGE_GPIO)
1666 | NGE_GPIO_GP3_OUT);
1669 /* Reading the ISR register clears all interrupts. */
1670 status = CSR_READ_4(sc, NGE_ISR);
1672 if ((status & NGE_INTRS) == 0)
1675 if ((status & NGE_ISR_TX_DESC_OK) ||
1676 (status & NGE_ISR_TX_ERR) ||
1677 (status & NGE_ISR_TX_OK) ||
1678 (status & NGE_ISR_TX_IDLE))
1681 if ((status & NGE_ISR_RX_DESC_OK) ||
1682 (status & NGE_ISR_RX_ERR) ||
1683 (status & NGE_ISR_RX_OFLOW) ||
1684 (status & NGE_ISR_RX_FIFO_OFLOW) ||
1685 (status & NGE_ISR_RX_IDLE) ||
1686 (status & NGE_ISR_RX_OK))
1689 if ((status & NGE_ISR_RX_IDLE))
1690 NGE_SETBIT(sc, NGE_CSR, NGE_CSR_RX_ENABLE);
1692 if (status & NGE_ISR_SYSERR) {
1694 ifp->if_flags &= ~IFF_RUNNING;
1699 /* mii_tick should only be called once per second */
1700 if (status & NGE_ISR_PHY_INTR) {
1707 /* Re-enable interrupts. */
1708 CSR_WRITE_4(sc, NGE_IER, 1);
1710 if (ifp->if_snd.ifq_head != NULL)
1713 /* Data LED off for TBI mode */
1716 CSR_WRITE_4(sc, NGE_GPIO, CSR_READ_4(sc, NGE_GPIO)
1717 & ~NGE_GPIO_GP3_OUT);
1723 * Encapsulate an mbuf chain in a descriptor by coupling the mbuf data
1724 * pointers to the fragment pointers.
1726 static int nge_encap(sc, m_head, txidx)
1727 struct nge_softc *sc;
1728 struct mbuf *m_head;
1731 struct nge_desc *f = NULL;
1733 int frag, cur, cnt = 0;
1734 struct ifvlan *ifv = NULL;
1736 if ((m_head->m_flags & (M_PROTO1|M_PKTHDR)) == (M_PROTO1|M_PKTHDR) &&
1737 m_head->m_pkthdr.rcvif != NULL &&
1738 m_head->m_pkthdr.rcvif->if_type == IFT_L2VLAN)
1739 ifv = m_head->m_pkthdr.rcvif->if_softc;
1742 * Start packing the mbufs in this chain into
1743 * the fragment pointers. Stop when we run out
1744 * of fragments or hit the end of the mbuf chain.
1747 cur = frag = *txidx;
1749 for (m = m_head; m != NULL; m = m->m_next) {
1750 if (m->m_len != 0) {
1751 if ((NGE_TX_LIST_CNT -
1752 (sc->nge_cdata.nge_tx_cnt + cnt)) < 2)
1754 f = &sc->nge_ldata->nge_tx_list[frag];
1755 f->nge_ctl = NGE_CMDSTS_MORE | m->m_len;
1756 f->nge_ptr = vtophys(mtod(m, vm_offset_t));
1758 f->nge_ctl |= NGE_CMDSTS_OWN;
1760 NGE_INC(frag, NGE_TX_LIST_CNT);
1768 sc->nge_ldata->nge_tx_list[*txidx].nge_extsts = 0;
1769 if (m_head->m_pkthdr.csum_flags) {
1770 if (m_head->m_pkthdr.csum_flags & CSUM_IP)
1771 sc->nge_ldata->nge_tx_list[*txidx].nge_extsts |=
1772 NGE_TXEXTSTS_IPCSUM;
1773 if (m_head->m_pkthdr.csum_flags & CSUM_TCP)
1774 sc->nge_ldata->nge_tx_list[*txidx].nge_extsts |=
1775 NGE_TXEXTSTS_TCPCSUM;
1776 if (m_head->m_pkthdr.csum_flags & CSUM_UDP)
1777 sc->nge_ldata->nge_tx_list[*txidx].nge_extsts |=
1778 NGE_TXEXTSTS_UDPCSUM;
1782 sc->nge_ldata->nge_tx_list[cur].nge_extsts |=
1783 (NGE_TXEXTSTS_VLANPKT|ifv->ifv_tag);
1786 sc->nge_ldata->nge_tx_list[cur].nge_mbuf = m_head;
1787 sc->nge_ldata->nge_tx_list[cur].nge_ctl &= ~NGE_CMDSTS_MORE;
1788 sc->nge_ldata->nge_tx_list[*txidx].nge_ctl |= NGE_CMDSTS_OWN;
1789 sc->nge_cdata.nge_tx_cnt += cnt;
1796 * Main transmit routine. To avoid having to do mbuf copies, we put pointers
1797 * to the mbuf data regions directly in the transmit lists. We also save a
1798 * copy of the pointers since the transmit list fragment pointers are
1799 * physical addresses.
1802 static void nge_start(ifp)
1805 struct nge_softc *sc;
1806 struct mbuf *m_head = NULL;
1814 idx = sc->nge_cdata.nge_tx_prod;
1816 if (ifp->if_flags & IFF_OACTIVE)
1819 while(sc->nge_ldata->nge_tx_list[idx].nge_mbuf == NULL) {
1820 IF_DEQUEUE(&ifp->if_snd, m_head);
1824 if (nge_encap(sc, m_head, &idx)) {
1825 IF_PREPEND(&ifp->if_snd, m_head);
1826 ifp->if_flags |= IFF_OACTIVE;
1831 * If there's a BPF listener, bounce a copy of this frame
1835 bpf_mtap(ifp, m_head);
1840 sc->nge_cdata.nge_tx_prod = idx;
1841 NGE_SETBIT(sc, NGE_CSR, NGE_CSR_TX_ENABLE);
1844 * Set a timeout in case the chip goes out to lunch.
1851 static void nge_init(xsc)
1854 struct nge_softc *sc = xsc;
1855 struct ifnet *ifp = &sc->arpcom.ac_if;
1856 struct mii_data *mii;
1859 if (ifp->if_flags & IFF_RUNNING)
1865 * Cancel pending I/O and free all RX/TX buffers.
1868 sc->nge_stat_ch = timeout(nge_tick, sc, hz);
1873 mii = device_get_softc(sc->nge_miibus);
1876 /* Set MAC address */
1877 CSR_WRITE_4(sc, NGE_RXFILT_CTL, NGE_FILTADDR_PAR0);
1878 CSR_WRITE_4(sc, NGE_RXFILT_DATA,
1879 ((u_int16_t *)sc->arpcom.ac_enaddr)[0]);
1880 CSR_WRITE_4(sc, NGE_RXFILT_CTL, NGE_FILTADDR_PAR1);
1881 CSR_WRITE_4(sc, NGE_RXFILT_DATA,
1882 ((u_int16_t *)sc->arpcom.ac_enaddr)[1]);
1883 CSR_WRITE_4(sc, NGE_RXFILT_CTL, NGE_FILTADDR_PAR2);
1884 CSR_WRITE_4(sc, NGE_RXFILT_DATA,
1885 ((u_int16_t *)sc->arpcom.ac_enaddr)[2]);
1887 /* Init circular RX list. */
1888 if (nge_list_rx_init(sc) == ENOBUFS) {
1889 printf("nge%d: initialization failed: no "
1890 "memory for rx buffers\n", sc->nge_unit);
1897 * Init tx descriptors.
1899 nge_list_tx_init(sc);
1902 * For the NatSemi chip, we have to explicitly enable the
1903 * reception of ARP frames, as well as turn on the 'perfect
1904 * match' filter where we store the station address, otherwise
1905 * we won't receive unicasts meant for this host.
1907 NGE_SETBIT(sc, NGE_RXFILT_CTL, NGE_RXFILTCTL_ARP);
1908 NGE_SETBIT(sc, NGE_RXFILT_CTL, NGE_RXFILTCTL_PERFECT);
1910 /* If we want promiscuous mode, set the allframes bit. */
1911 if (ifp->if_flags & IFF_PROMISC) {
1912 NGE_SETBIT(sc, NGE_RXFILT_CTL, NGE_RXFILTCTL_ALLPHYS);
1914 NGE_CLRBIT(sc, NGE_RXFILT_CTL, NGE_RXFILTCTL_ALLPHYS);
1918 * Set the capture broadcast bit to capture broadcast frames.
1920 if (ifp->if_flags & IFF_BROADCAST) {
1921 NGE_SETBIT(sc, NGE_RXFILT_CTL, NGE_RXFILTCTL_BROAD);
1923 NGE_CLRBIT(sc, NGE_RXFILT_CTL, NGE_RXFILTCTL_BROAD);
1927 * Load the multicast filter.
1931 /* Turn the receive filter on */
1932 NGE_SETBIT(sc, NGE_RXFILT_CTL, NGE_RXFILTCTL_ENABLE);
1935 * Load the address of the RX and TX lists.
1937 CSR_WRITE_4(sc, NGE_RX_LISTPTR,
1938 vtophys(&sc->nge_ldata->nge_rx_list[0]));
1939 CSR_WRITE_4(sc, NGE_TX_LISTPTR,
1940 vtophys(&sc->nge_ldata->nge_tx_list[0]));
1942 /* Set RX configuration */
1943 CSR_WRITE_4(sc, NGE_RX_CFG, NGE_RXCFG);
1945 * Enable hardware checksum validation for all IPv4
1946 * packets, do not reject packets with bad checksums.
1948 CSR_WRITE_4(sc, NGE_VLAN_IP_RXCTL, NGE_VIPRXCTL_IPCSUM_ENB);
1951 * Tell the chip to detect and strip VLAN tag info from
1952 * received frames. The tag will be provided in the extsts
1953 * field in the RX descriptors.
1955 NGE_SETBIT(sc, NGE_VLAN_IP_RXCTL,
1956 NGE_VIPRXCTL_TAG_DETECT_ENB|NGE_VIPRXCTL_TAG_STRIP_ENB);
1958 /* Set TX configuration */
1959 CSR_WRITE_4(sc, NGE_TX_CFG, NGE_TXCFG);
1962 * Enable TX IPv4 checksumming on a per-packet basis.
1964 CSR_WRITE_4(sc, NGE_VLAN_IP_TXCTL, NGE_VIPTXCTL_CSUM_PER_PKT);
1967 * Tell the chip to insert VLAN tags on a per-packet basis as
1968 * dictated by the code in the frame encapsulation routine.
1970 NGE_SETBIT(sc, NGE_VLAN_IP_TXCTL, NGE_VIPTXCTL_TAG_PER_PKT);
1972 /* Set full/half duplex mode. */
1974 if ((sc->nge_ifmedia.ifm_cur->ifm_media & IFM_GMASK)
1976 NGE_SETBIT(sc, NGE_TX_CFG,
1977 (NGE_TXCFG_IGN_HBEAT|NGE_TXCFG_IGN_CARR));
1978 NGE_SETBIT(sc, NGE_RX_CFG, NGE_RXCFG_RX_FDX);
1980 NGE_CLRBIT(sc, NGE_TX_CFG,
1981 (NGE_TXCFG_IGN_HBEAT|NGE_TXCFG_IGN_CARR));
1982 NGE_CLRBIT(sc, NGE_RX_CFG, NGE_RXCFG_RX_FDX);
1985 if ((mii->mii_media_active & IFM_GMASK) == IFM_FDX) {
1986 NGE_SETBIT(sc, NGE_TX_CFG,
1987 (NGE_TXCFG_IGN_HBEAT|NGE_TXCFG_IGN_CARR));
1988 NGE_SETBIT(sc, NGE_RX_CFG, NGE_RXCFG_RX_FDX);
1990 NGE_CLRBIT(sc, NGE_TX_CFG,
1991 (NGE_TXCFG_IGN_HBEAT|NGE_TXCFG_IGN_CARR));
1992 NGE_CLRBIT(sc, NGE_RX_CFG, NGE_RXCFG_RX_FDX);
1997 * Enable the delivery of PHY interrupts based on
1998 * link/speed/duplex status changes. Also enable the
1999 * extsts field in the DMA descriptors (needed for
2000 * TCP/IP checksum offload on transmit).
2002 NGE_SETBIT(sc, NGE_CFG, NGE_CFG_PHYINTR_SPD|
2003 NGE_CFG_PHYINTR_LNK|NGE_CFG_PHYINTR_DUP|NGE_CFG_EXTSTS_ENB);
2006 * Configure interrupt holdoff (moderation). We can
2007 * have the chip delay interrupt delivery for a certain
2008 * period. Units are in 100us, and the max setting
2009 * is 25500us (0xFF x 100us). Default is a 100us holdoff.
2011 CSR_WRITE_4(sc, NGE_IHR, 0x01);
2014 * Enable interrupts.
2016 CSR_WRITE_4(sc, NGE_IMR, NGE_INTRS);
2017 #ifdef DEVICE_POLLING
2019 * ... only enable interrupts if we are not polling, make sure
2020 * they are off otherwise.
2022 if (ifp->if_flags & IFF_POLLING)
2023 CSR_WRITE_4(sc, NGE_IER, 0);
2025 #endif /* DEVICE_POLLING */
2026 CSR_WRITE_4(sc, NGE_IER, 1);
2028 /* Enable receiver and transmitter. */
2029 NGE_CLRBIT(sc, NGE_CSR, NGE_CSR_TX_DISABLE|NGE_CSR_RX_DISABLE);
2030 NGE_SETBIT(sc, NGE_CSR, NGE_CSR_RX_ENABLE);
2032 nge_ifmedia_upd(ifp);
2034 ifp->if_flags |= IFF_RUNNING;
2035 ifp->if_flags &= ~IFF_OACTIVE;
2043 * Set media options.
2045 static int nge_ifmedia_upd(ifp)
2048 struct nge_softc *sc;
2049 struct mii_data *mii;
2054 if (IFM_SUBTYPE(sc->nge_ifmedia.ifm_cur->ifm_media)
2056 CSR_WRITE_4(sc, NGE_TBI_ANAR,
2057 CSR_READ_4(sc, NGE_TBI_ANAR)
2058 | NGE_TBIANAR_HDX | NGE_TBIANAR_FDX
2059 | NGE_TBIANAR_PS1 | NGE_TBIANAR_PS2);
2060 CSR_WRITE_4(sc, NGE_TBI_BMCR, NGE_TBIBMCR_ENABLE_ANEG
2061 | NGE_TBIBMCR_RESTART_ANEG);
2062 CSR_WRITE_4(sc, NGE_TBI_BMCR, NGE_TBIBMCR_ENABLE_ANEG);
2063 } else if ((sc->nge_ifmedia.ifm_cur->ifm_media
2064 & IFM_GMASK) == IFM_FDX) {
2065 NGE_SETBIT(sc, NGE_TX_CFG,
2066 (NGE_TXCFG_IGN_HBEAT|NGE_TXCFG_IGN_CARR));
2067 NGE_SETBIT(sc, NGE_RX_CFG, NGE_RXCFG_RX_FDX);
2069 CSR_WRITE_4(sc, NGE_TBI_ANAR, 0);
2070 CSR_WRITE_4(sc, NGE_TBI_BMCR, 0);
2072 NGE_CLRBIT(sc, NGE_TX_CFG,
2073 (NGE_TXCFG_IGN_HBEAT|NGE_TXCFG_IGN_CARR));
2074 NGE_CLRBIT(sc, NGE_RX_CFG, NGE_RXCFG_RX_FDX);
2076 CSR_WRITE_4(sc, NGE_TBI_ANAR, 0);
2077 CSR_WRITE_4(sc, NGE_TBI_BMCR, 0);
2080 CSR_WRITE_4(sc, NGE_GPIO, CSR_READ_4(sc, NGE_GPIO)
2081 & ~NGE_GPIO_GP3_OUT);
2083 mii = device_get_softc(sc->nge_miibus);
2085 if (mii->mii_instance) {
2086 struct mii_softc *miisc;
2087 for (miisc = LIST_FIRST(&mii->mii_phys); miisc != NULL;
2088 miisc = LIST_NEXT(miisc, mii_list))
2089 mii_phy_reset(miisc);
2098 * Report current media status.
2100 static void nge_ifmedia_sts(ifp, ifmr)
2102 struct ifmediareq *ifmr;
2104 struct nge_softc *sc;
2105 struct mii_data *mii;
2110 ifmr->ifm_status = IFM_AVALID;
2111 ifmr->ifm_active = IFM_ETHER;
2113 if (CSR_READ_4(sc, NGE_TBI_BMSR) & NGE_TBIBMSR_ANEG_DONE) {
2114 ifmr->ifm_status |= IFM_ACTIVE;
2116 if (CSR_READ_4(sc, NGE_TBI_BMCR) & NGE_TBIBMCR_LOOPBACK)
2117 ifmr->ifm_active |= IFM_LOOP;
2118 if (!CSR_READ_4(sc, NGE_TBI_BMSR) & NGE_TBIBMSR_ANEG_DONE) {
2119 ifmr->ifm_active |= IFM_NONE;
2120 ifmr->ifm_status = 0;
2123 ifmr->ifm_active |= IFM_1000_SX;
2124 if (IFM_SUBTYPE(sc->nge_ifmedia.ifm_cur->ifm_media)
2126 ifmr->ifm_active |= IFM_AUTO;
2127 if (CSR_READ_4(sc, NGE_TBI_ANLPAR)
2128 & NGE_TBIANAR_FDX) {
2129 ifmr->ifm_active |= IFM_FDX;
2130 }else if (CSR_READ_4(sc, NGE_TBI_ANLPAR)
2131 & NGE_TBIANAR_HDX) {
2132 ifmr->ifm_active |= IFM_HDX;
2134 } else if ((sc->nge_ifmedia.ifm_cur->ifm_media & IFM_GMASK)
2136 ifmr->ifm_active |= IFM_FDX;
2138 ifmr->ifm_active |= IFM_HDX;
2141 mii = device_get_softc(sc->nge_miibus);
2143 ifmr->ifm_active = mii->mii_media_active;
2144 ifmr->ifm_status = mii->mii_media_status;
2150 static int nge_ioctl(ifp, command, data, cr)
2156 struct nge_softc *sc = ifp->if_softc;
2157 struct ifreq *ifr = (struct ifreq *) data;
2158 struct mii_data *mii;
2166 error = ether_ioctl(ifp, command, data);
2169 if (ifr->ifr_mtu > NGE_JUMBO_MTU)
2172 ifp->if_mtu = ifr->ifr_mtu;
2174 * Workaround: if the MTU is larger than
2175 * 8152 (TX FIFO size minus 64 minus 18), turn off
2176 * TX checksum offloading.
2178 if (ifr->ifr_mtu >= 8152)
2179 ifp->if_hwassist = 0;
2181 ifp->if_hwassist = NGE_CSUM_FEATURES;
2185 if (ifp->if_flags & IFF_UP) {
2186 if (ifp->if_flags & IFF_RUNNING &&
2187 ifp->if_flags & IFF_PROMISC &&
2188 !(sc->nge_if_flags & IFF_PROMISC)) {
2189 NGE_SETBIT(sc, NGE_RXFILT_CTL,
2190 NGE_RXFILTCTL_ALLPHYS|
2191 NGE_RXFILTCTL_ALLMULTI);
2192 } else if (ifp->if_flags & IFF_RUNNING &&
2193 !(ifp->if_flags & IFF_PROMISC) &&
2194 sc->nge_if_flags & IFF_PROMISC) {
2195 NGE_CLRBIT(sc, NGE_RXFILT_CTL,
2196 NGE_RXFILTCTL_ALLPHYS);
2197 if (!(ifp->if_flags & IFF_ALLMULTI))
2198 NGE_CLRBIT(sc, NGE_RXFILT_CTL,
2199 NGE_RXFILTCTL_ALLMULTI);
2201 ifp->if_flags &= ~IFF_RUNNING;
2205 if (ifp->if_flags & IFF_RUNNING)
2208 sc->nge_if_flags = ifp->if_flags;
2219 error = ifmedia_ioctl(ifp, ifr, &sc->nge_ifmedia,
2222 mii = device_get_softc(sc->nge_miibus);
2223 error = ifmedia_ioctl(ifp, ifr, &mii->mii_media,
2237 static void nge_watchdog(ifp)
2240 struct nge_softc *sc;
2245 printf("nge%d: watchdog timeout\n", sc->nge_unit);
2249 ifp->if_flags &= ~IFF_RUNNING;
2252 if (ifp->if_snd.ifq_head != NULL)
2259 * Stop the adapter and free any mbufs allocated to the
2262 static void nge_stop(sc)
2263 struct nge_softc *sc;
2267 struct ifmedia_entry *ifm;
2268 struct mii_data *mii;
2271 ifp = &sc->arpcom.ac_if;
2276 mii = device_get_softc(sc->nge_miibus);
2279 untimeout(nge_tick, sc, sc->nge_stat_ch);
2280 #ifdef DEVICE_POLLING
2281 ether_poll_deregister(ifp);
2283 CSR_WRITE_4(sc, NGE_IER, 0);
2284 CSR_WRITE_4(sc, NGE_IMR, 0);
2285 NGE_SETBIT(sc, NGE_CSR, NGE_CSR_TX_DISABLE|NGE_CSR_RX_DISABLE);
2287 CSR_WRITE_4(sc, NGE_TX_LISTPTR, 0);
2288 CSR_WRITE_4(sc, NGE_RX_LISTPTR, 0);
2291 * Isolate/power down the PHY, but leave the media selection
2292 * unchanged so that things will be put back to normal when
2293 * we bring the interface back up.
2295 itmp = ifp->if_flags;
2296 ifp->if_flags |= IFF_UP;
2299 ifm = sc->nge_ifmedia.ifm_cur;
2301 ifm = mii->mii_media.ifm_cur;
2303 mtmp = ifm->ifm_media;
2304 ifm->ifm_media = IFM_ETHER|IFM_NONE;
2308 ifm->ifm_media = mtmp;
2309 ifp->if_flags = itmp;
2314 * Free data in the RX lists.
2316 for (i = 0; i < NGE_RX_LIST_CNT; i++) {
2317 if (sc->nge_ldata->nge_rx_list[i].nge_mbuf != NULL) {
2318 m_freem(sc->nge_ldata->nge_rx_list[i].nge_mbuf);
2319 sc->nge_ldata->nge_rx_list[i].nge_mbuf = NULL;
2322 bzero((char *)&sc->nge_ldata->nge_rx_list,
2323 sizeof(sc->nge_ldata->nge_rx_list));
2326 * Free the TX list buffers.
2328 for (i = 0; i < NGE_TX_LIST_CNT; i++) {
2329 if (sc->nge_ldata->nge_tx_list[i].nge_mbuf != NULL) {
2330 m_freem(sc->nge_ldata->nge_tx_list[i].nge_mbuf);
2331 sc->nge_ldata->nge_tx_list[i].nge_mbuf = NULL;
2335 bzero((char *)&sc->nge_ldata->nge_tx_list,
2336 sizeof(sc->nge_ldata->nge_tx_list));
2338 ifp->if_flags &= ~(IFF_RUNNING | IFF_OACTIVE);
2344 * Stop all chip I/O so that the kernel's probe routines don't
2345 * get confused by errant DMAs when rebooting.
2347 static void nge_shutdown(dev)
2350 struct nge_softc *sc;
2352 sc = device_get_softc(dev);