2 * Copyright (c) 2002-2009 Sam Leffler, Errno Consulting
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions
8 * 1. Redistributions of source code must retain the above copyright
9 * notice, this list of conditions and the following disclaimer,
10 * without modification.
11 * 2. Redistributions in binary form must reproduce at minimum a disclaimer
12 * similar to the "NO WARRANTY" disclaimer below ("Disclaimer") and any
13 * redistribution must be conditioned upon including a substantially
14 * similar Disclaimer requirement for further binary redistribution.
17 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
18 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
19 * LIMITED TO, THE IMPLIED WARRANTIES OF NONINFRINGEMENT, MERCHANTIBILITY
20 * AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL
21 * THE COPYRIGHT HOLDERS OR CONTRIBUTORS BE LIABLE FOR SPECIAL, EXEMPLARY,
22 * OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
23 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
24 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER
25 * IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
26 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF
27 * THE POSSIBILITY OF SUCH DAMAGES.
29 * $FreeBSD: head/sys/dev/ath/if_ath.c 203751 2010-02-10 11:12:39Z rpaulo $");
33 * Driver for the Atheros Wireless LAN controller.
35 * This software is derived from work of Atsushi Onoe; his contribution
36 * is greatly appreciated.
43 #include <sys/param.h>
44 #include <sys/systm.h>
45 #include <sys/sysctl.h>
47 #include <sys/malloc.h>
49 #include <sys/mutex.h>
50 #include <sys/kernel.h>
51 #include <sys/socket.h>
52 #include <sys/sockio.h>
53 #include <sys/errno.h>
54 #include <sys/callout.h>
56 #include <sys/endian.h>
57 #include <sys/kthread.h>
58 #include <sys/taskqueue.h>
62 #include <net/if_dl.h>
63 #include <net/if_media.h>
64 #include <net/if_types.h>
65 #include <net/if_arp.h>
66 #include <net/if_llc.h>
67 #include <net/ifq_var.h>
69 #include <netproto/802_11/ieee80211_var.h>
70 #include <netproto/802_11/ieee80211_regdomain.h>
71 #ifdef IEEE80211_SUPPORT_SUPERG
72 #include <netproto/802_11/ieee80211_superg.h>
74 #ifdef IEEE80211_SUPPORT_TDMA
75 #include <netproto/802_11/ieee80211_tdma.h>
81 #include <netinet/in.h>
82 #include <netinet/if_ether.h>
85 #include <dev/netif/ath/ath/if_athvar.h>
86 #include <dev/netif/ath/hal/ath_hal/ah_devid.h> /* XXX for softled */
89 #include <dev/netif/ath_tx99/ath_tx99.h>
93 * ATH_BCBUF determines the number of vap's that can transmit
94 * beacons and also (currently) the number of vap's that can
95 * have unique mac addresses/bssid. When staggering beacons
96 * 4 is probably a good max as otherwise the beacons become
97 * very closely spaced and there is limited time for cab q traffic
98 * to go out. You can burst beacons instead but that is not good
99 * for stations in power save and at some point you really want
100 * another radio (and channel).
102 * The limit on the number of mac addresses is tied to our use of
103 * the U/L bit and tracking addresses in a byte; it would be
104 * worthwhile to allow more for applications like proxy sta.
106 CTASSERT(ATH_BCBUF <= 8);
108 /* unaligned little endian access */
109 #define LE_READ_2(p) \
111 ((((u_int8_t *)(p))[0] ) | (((u_int8_t *)(p))[1] << 8)))
112 #define LE_READ_4(p) \
114 ((((u_int8_t *)(p))[0] ) | (((u_int8_t *)(p))[1] << 8) | \
115 (((u_int8_t *)(p))[2] << 16) | (((u_int8_t *)(p))[3] << 24)))
117 static struct ieee80211vap *ath_vap_create(struct ieee80211com *,
118 const char name[IFNAMSIZ], int unit, int opmode,
119 int flags, const uint8_t bssid[IEEE80211_ADDR_LEN],
120 const uint8_t mac[IEEE80211_ADDR_LEN]);
121 static void ath_vap_delete(struct ieee80211vap *);
122 static void ath_init(void *);
123 static void ath_stop_locked(struct ifnet *);
124 static void ath_stop(struct ifnet *);
125 static void ath_start(struct ifnet *);
126 static int ath_reset(struct ifnet *);
127 static int ath_reset_vap(struct ieee80211vap *, u_long);
128 static int ath_media_change(struct ifnet *);
129 static void ath_watchdog_callout(void *);
130 static int ath_ioctl(struct ifnet *, u_long, caddr_t, struct ucred *);
131 static void ath_fatal_proc(void *, int);
132 static void ath_bmiss_vap(struct ieee80211vap *);
133 static void ath_bmiss_task(void *, int);
134 static int ath_keyset(struct ath_softc *, const struct ieee80211_key *,
135 struct ieee80211_node *);
136 static int ath_key_alloc(struct ieee80211vap *,
137 struct ieee80211_key *,
138 ieee80211_keyix *, ieee80211_keyix *);
139 static int ath_key_delete(struct ieee80211vap *,
140 const struct ieee80211_key *);
141 static int ath_key_set(struct ieee80211vap *, const struct ieee80211_key *,
142 const u_int8_t mac[IEEE80211_ADDR_LEN]);
143 static void ath_key_update_begin(struct ieee80211vap *);
144 static void ath_key_update_end(struct ieee80211vap *);
145 static void ath_update_mcast(struct ifnet *);
146 static void ath_update_promisc(struct ifnet *);
147 static void ath_mode_init(struct ath_softc *);
148 static void ath_setslottime(struct ath_softc *);
149 static void ath_updateslot(struct ifnet *);
150 static int ath_beaconq_setup(struct ath_hal *);
151 static int ath_beacon_alloc(struct ath_softc *, struct ieee80211_node *);
152 static void ath_beacon_update(struct ieee80211vap *, int item);
153 static void ath_beacon_setup(struct ath_softc *, struct ath_buf *);
154 static void ath_beacon_proc(void *, int);
155 static struct ath_buf *ath_beacon_generate(struct ath_softc *,
156 struct ieee80211vap *);
157 static void ath_bstuck_task(void *, int);
158 static void ath_beacon_return(struct ath_softc *, struct ath_buf *);
159 static void ath_beacon_free(struct ath_softc *);
160 static void ath_beacon_config(struct ath_softc *, struct ieee80211vap *);
161 static void ath_descdma_cleanup(struct ath_softc *sc,
162 struct ath_descdma *, ath_bufhead *);
163 static int ath_desc_alloc(struct ath_softc *);
164 static void ath_desc_free(struct ath_softc *);
165 static struct ieee80211_node *ath_node_alloc(struct ieee80211vap *,
166 const uint8_t [IEEE80211_ADDR_LEN]);
167 static void ath_node_free(struct ieee80211_node *);
168 static void ath_node_getsignal(const struct ieee80211_node *,
170 static int ath_rxbuf_init(struct ath_softc *, struct ath_buf *);
171 static void ath_recv_mgmt(struct ieee80211_node *ni, struct mbuf *m,
172 int subtype, int rssi, int nf);
173 static void ath_setdefantenna(struct ath_softc *, u_int);
174 static void ath_rx_task(void *, int);
175 static void ath_txq_init(struct ath_softc *sc, struct ath_txq *, int);
176 static struct ath_txq *ath_txq_setup(struct ath_softc*, int qtype, int subtype);
177 static int ath_tx_setup(struct ath_softc *, int, int);
178 static int ath_wme_update(struct ieee80211com *);
179 static void ath_tx_cleanupq(struct ath_softc *, struct ath_txq *);
180 static void ath_tx_cleanup(struct ath_softc *);
181 static void ath_freetx(struct mbuf *);
182 static int ath_tx_start(struct ath_softc *, struct ieee80211_node *,
183 struct ath_buf *, struct mbuf *);
184 static void ath_tx_task_q0(void *, int);
185 static void ath_tx_task_q0123(void *, int);
186 static void ath_tx_task(void *, int);
187 static void ath_tx_draintxq(struct ath_softc *, struct ath_txq *);
188 static int ath_chan_set(struct ath_softc *, struct ieee80211_channel *);
189 static void ath_draintxq(struct ath_softc *);
190 static void ath_stoprecv(struct ath_softc *);
191 static int ath_startrecv(struct ath_softc *);
192 static void ath_chan_change(struct ath_softc *, struct ieee80211_channel *);
193 static void ath_scan_start(struct ieee80211com *);
194 static void ath_scan_end(struct ieee80211com *);
195 static void ath_set_channel(struct ieee80211com *);
196 static void ath_calibrate_callout(void *);
197 static int ath_newstate(struct ieee80211vap *, enum ieee80211_state, int);
198 static void ath_setup_stationkey(struct ieee80211_node *);
199 static void ath_newassoc(struct ieee80211_node *, int);
200 static int ath_setregdomain(struct ieee80211com *,
201 struct ieee80211_regdomain *, int,
202 struct ieee80211_channel []);
203 static void ath_getradiocaps(struct ieee80211com *, int, int *,
204 struct ieee80211_channel []);
205 static int ath_getchannels(struct ath_softc *);
206 static void ath_led_event(struct ath_softc *, int);
208 static int ath_rate_setup(struct ath_softc *, u_int mode);
209 static void ath_setcurmode(struct ath_softc *, enum ieee80211_phymode);
211 static void ath_sysctlattach(struct ath_softc *);
212 static int ath_raw_xmit(struct ieee80211_node *,
213 struct mbuf *, const struct ieee80211_bpf_params *);
214 static void ath_announce(struct ath_softc *);
216 #ifdef IEEE80211_SUPPORT_TDMA
217 static void ath_tdma_settimers(struct ath_softc *sc, u_int32_t nexttbtt,
219 static void ath_tdma_bintvalsetup(struct ath_softc *sc,
220 const struct ieee80211_tdma_state *tdma);
221 static void ath_tdma_config(struct ath_softc *sc, struct ieee80211vap *vap);
222 static void ath_tdma_update(struct ieee80211_node *ni,
223 const struct ieee80211_tdma_param *tdma, int);
224 static void ath_tdma_beacon_send(struct ath_softc *sc,
225 struct ieee80211vap *vap);
228 ath_hal_setcca(struct ath_hal *ah, int ena)
231 * NB: fill me in; this is not provided by default because disabling
232 * CCA in most locales violates regulatory.
237 ath_hal_getcca(struct ath_hal *ah)
240 if (ath_hal_getcapability(ah, HAL_CAP_DIAG, 0, &diag) != HAL_OK)
242 return ((diag & 0x500000) == 0);
245 #define TDMA_EP_MULTIPLIER (1<<10) /* pow2 to optimize out * and / */
246 #define TDMA_LPF_LEN 6
247 #define TDMA_DUMMY_MARKER 0x127
248 #define TDMA_EP_MUL(x, mul) ((x) * (mul))
249 #define TDMA_IN(x) (TDMA_EP_MUL((x), TDMA_EP_MULTIPLIER))
250 #define TDMA_LPF(x, y, len) \
251 ((x != TDMA_DUMMY_MARKER) ? (((x) * ((len)-1) + (y)) / (len)) : (y))
252 #define TDMA_SAMPLE(x, y) do { \
253 x = TDMA_LPF((x), TDMA_IN(y), TDMA_LPF_LEN); \
255 #define TDMA_EP_RND(x,mul) \
256 ((((x)%(mul)) >= ((mul)/2)) ? ((x) + ((mul) - 1)) / (mul) : (x)/(mul))
257 #define TDMA_AVG(x) TDMA_EP_RND(x, TDMA_EP_MULTIPLIER)
258 #endif /* IEEE80211_SUPPORT_TDMA */
260 SYSCTL_DECL(_hw_ath);
262 /* XXX validate sysctl values */
263 static int ath_longcalinterval = 30; /* long cals every 30 secs */
264 SYSCTL_INT(_hw_ath, OID_AUTO, longcal, CTLFLAG_RW, &ath_longcalinterval,
265 0, "long chip calibration interval (secs)");
266 static int ath_shortcalinterval = 100; /* short cals every 100 ms */
267 SYSCTL_INT(_hw_ath, OID_AUTO, shortcal, CTLFLAG_RW, &ath_shortcalinterval,
268 0, "short chip calibration interval (msecs)");
269 static int ath_resetcalinterval = 20*60; /* reset cal state 20 mins */
270 SYSCTL_INT(_hw_ath, OID_AUTO, resetcal, CTLFLAG_RW, &ath_resetcalinterval,
271 0, "reset chip calibration results (secs)");
273 static int ath_rxbuf = ATH_RXBUF; /* # rx buffers to allocate */
274 SYSCTL_INT(_hw_ath, OID_AUTO, rxbuf, CTLFLAG_RW, &ath_rxbuf,
275 0, "rx buffers allocated");
276 TUNABLE_INT("hw.ath.rxbuf", &ath_rxbuf);
277 static int ath_txbuf = ATH_TXBUF; /* # tx buffers to allocate */
278 SYSCTL_INT(_hw_ath, OID_AUTO, txbuf, CTLFLAG_RW, &ath_txbuf,
279 0, "tx buffers allocated");
280 TUNABLE_INT("hw.ath.txbuf", &ath_txbuf);
282 static int ath_bstuck_threshold = 4; /* max missed beacons */
283 SYSCTL_INT(_hw_ath, OID_AUTO, bstuck, CTLFLAG_RW, &ath_bstuck_threshold,
284 0, "max missed beacon xmits before chip reset");
288 ATH_DEBUG_XMIT = 0x00000001, /* basic xmit operation */
289 ATH_DEBUG_XMIT_DESC = 0x00000002, /* xmit descriptors */
290 ATH_DEBUG_RECV = 0x00000004, /* basic recv operation */
291 ATH_DEBUG_RECV_DESC = 0x00000008, /* recv descriptors */
292 ATH_DEBUG_RATE = 0x00000010, /* rate control */
293 ATH_DEBUG_RESET = 0x00000020, /* reset processing */
294 ATH_DEBUG_MODE = 0x00000040, /* mode init/setup */
295 ATH_DEBUG_BEACON = 0x00000080, /* beacon handling */
296 ATH_DEBUG_WATCHDOG = 0x00000100, /* watchdog timeout */
297 ATH_DEBUG_INTR = 0x00001000, /* ISR */
298 ATH_DEBUG_TX_PROC = 0x00002000, /* tx ISR proc */
299 ATH_DEBUG_RX_PROC = 0x00004000, /* rx ISR proc */
300 ATH_DEBUG_BEACON_PROC = 0x00008000, /* beacon ISR proc */
301 ATH_DEBUG_CALIBRATE = 0x00010000, /* periodic calibration */
302 ATH_DEBUG_KEYCACHE = 0x00020000, /* key cache management */
303 ATH_DEBUG_STATE = 0x00040000, /* 802.11 state transitions */
304 ATH_DEBUG_NODE = 0x00080000, /* node management */
305 ATH_DEBUG_LED = 0x00100000, /* led management */
306 ATH_DEBUG_FF = 0x00200000, /* fast frames */
307 ATH_DEBUG_DFS = 0x00400000, /* DFS processing */
308 ATH_DEBUG_TDMA = 0x00800000, /* TDMA processing */
309 ATH_DEBUG_TDMA_TIMER = 0x01000000, /* TDMA timer processing */
310 ATH_DEBUG_REGDOMAIN = 0x02000000, /* regulatory processing */
311 ATH_DEBUG_FATAL = 0x80000000, /* fatal errors */
312 ATH_DEBUG_ANY = 0xffffffff
314 static int ath_debug = 0;
315 SYSCTL_INT(_hw_ath, OID_AUTO, debug, CTLFLAG_RW, &ath_debug,
316 0, "control debugging printfs");
317 TUNABLE_INT("hw.ath.debug", &ath_debug);
319 #define IFF_DUMPPKTS(sc, m) \
320 ((sc->sc_debug & (m)) || \
321 (sc->sc_ifp->if_flags & (IFF_DEBUG|IFF_LINK2)) == (IFF_DEBUG|IFF_LINK2))
322 #define DPRINTF(sc, m, fmt, ...) do { \
323 if (sc->sc_debug & (m)) \
324 kprintf(fmt, __VA_ARGS__); \
326 #define KEYPRINTF(sc, ix, hk, mac) do { \
327 if (sc->sc_debug & ATH_DEBUG_KEYCACHE) \
328 ath_keyprint(sc, __func__, ix, hk, mac); \
330 static void ath_printrxbuf(struct ath_softc *, const struct ath_buf *bf,
332 static void ath_printtxbuf(struct ath_softc *, const struct ath_buf *bf,
333 u_int qnum, u_int ix, int done);
335 #define IFF_DUMPPKTS(sc, m) \
336 ((sc->sc_ifp->if_flags & (IFF_DEBUG|IFF_LINK2)) == (IFF_DEBUG|IFF_LINK2))
337 #define DPRINTF(sc, m, fmt, ...) do { \
340 #define KEYPRINTF(sc, k, ix, mac) do { \
345 MALLOC_DEFINE(M_ATHDEV, "athdev", "ath driver dma buffers");
348 ath_attach(u_int16_t devid, struct ath_softc *sc)
351 struct ieee80211com *ic;
352 struct ath_hal *ah = NULL;
356 uint8_t macaddr[IEEE80211_ADDR_LEN];
358 DPRINTF(sc, ATH_DEBUG_ANY, "%s: devid 0x%x\n", __func__, devid);
360 ifp = sc->sc_ifp = if_alloc(IFT_IEEE80211);
362 device_printf(sc->sc_dev, "can not if_alloc()\n");
368 /* set these up early for if_printf use */
369 if_initname(ifp, device_get_name(sc->sc_dev),
370 device_get_unit(sc->sc_dev));
372 /* prepare sysctl tree for use in sub modules */
373 sysctl_ctx_init(&sc->sc_sysctl_ctx);
374 sc->sc_sysctl_tree = SYSCTL_ADD_NODE(&sc->sc_sysctl_ctx,
375 SYSCTL_STATIC_CHILDREN(_hw),
377 device_get_nameunit(sc->sc_dev),
380 ah = ath_hal_attach(devid, sc, sc->sc_st, sc->sc_sh, &status);
382 if_printf(ifp, "unable to attach hardware; HAL status %u\n",
388 sc->sc_invalid = 0; /* ready to go, enable interrupt handling */
390 sc->sc_debug = ath_debug;
394 * Check if the MAC has multi-rate retry support.
395 * We do this by trying to setup a fake extended
396 * descriptor. MAC's that don't have support will
397 * return false w/o doing anything. MAC's that do
398 * support it will return true w/o doing anything.
400 sc->sc_mrretry = ath_hal_setupxtxdesc(ah, NULL, 0,0, 0,0, 0,0);
403 * Check if the device has hardware counters for PHY
404 * errors. If so we need to enable the MIB interrupt
405 * so we can act on stat triggers.
407 if (ath_hal_hwphycounters(ah))
411 * Get the hardware key cache size.
413 sc->sc_keymax = ath_hal_keycachesize(ah);
414 if (sc->sc_keymax > ATH_KEYMAX) {
415 if_printf(ifp, "Warning, using only %u of %u key cache slots\n",
416 ATH_KEYMAX, sc->sc_keymax);
417 sc->sc_keymax = ATH_KEYMAX;
420 * Reset the key cache since some parts do not
421 * reset the contents on initial power up.
423 for (i = 0; i < sc->sc_keymax; i++)
424 ath_hal_keyreset(ah, i);
427 * Collect the default channel list.
429 error = ath_getchannels(sc);
434 * Setup rate tables for all potential media types.
436 ath_rate_setup(sc, IEEE80211_MODE_11A);
437 ath_rate_setup(sc, IEEE80211_MODE_11B);
438 ath_rate_setup(sc, IEEE80211_MODE_11G);
439 ath_rate_setup(sc, IEEE80211_MODE_TURBO_A);
440 ath_rate_setup(sc, IEEE80211_MODE_TURBO_G);
441 ath_rate_setup(sc, IEEE80211_MODE_STURBO_A);
442 ath_rate_setup(sc, IEEE80211_MODE_11NA);
443 ath_rate_setup(sc, IEEE80211_MODE_11NG);
444 ath_rate_setup(sc, IEEE80211_MODE_HALF);
445 ath_rate_setup(sc, IEEE80211_MODE_QUARTER);
447 /* NB: setup here so ath_rate_update is happy */
448 ath_setcurmode(sc, IEEE80211_MODE_11A);
451 * Allocate tx+rx descriptors and populate the lists.
453 wlan_assert_serialized();
454 wlan_serialize_exit();
455 error = ath_desc_alloc(sc);
456 wlan_serialize_enter();
458 if_printf(ifp, "failed to allocate descriptors: %d\n", error);
461 callout_init(&sc->sc_cal_ch);
462 callout_init(&sc->sc_wd_ch);
464 sc->sc_tq = taskqueue_create("ath_taskq", M_INTWAIT,
465 taskqueue_thread_enqueue, &sc->sc_tq);
466 taskqueue_start_threads(&sc->sc_tq, 1, TDPRI_KERN_DAEMON, -1,
467 "%s taskq", ifp->if_xname);
469 TASK_INIT(&sc->sc_rxtask, 0, ath_rx_task, sc);
470 TASK_INIT(&sc->sc_bmisstask, 0, ath_bmiss_task, sc);
471 TASK_INIT(&sc->sc_bstucktask,0, ath_bstuck_task, sc);
474 * Allocate hardware transmit queues: one queue for
475 * beacon frames and one data queue for each QoS
476 * priority. Note that the hal handles reseting
477 * these queues at the needed time.
481 sc->sc_bhalq = ath_beaconq_setup(ah);
482 if (sc->sc_bhalq == (u_int) -1) {
483 if_printf(ifp, "unable to setup a beacon xmit queue!\n");
487 sc->sc_cabq = ath_txq_setup(sc, HAL_TX_QUEUE_CAB, 0);
488 if (sc->sc_cabq == NULL) {
489 if_printf(ifp, "unable to setup CAB xmit queue!\n");
493 /* NB: insure BK queue is the lowest priority h/w queue */
494 if (!ath_tx_setup(sc, WME_AC_BK, HAL_WME_AC_BK)) {
495 if_printf(ifp, "unable to setup xmit queue for %s traffic!\n",
496 ieee80211_wme_acnames[WME_AC_BK]);
500 if (!ath_tx_setup(sc, WME_AC_BE, HAL_WME_AC_BE) ||
501 !ath_tx_setup(sc, WME_AC_VI, HAL_WME_AC_VI) ||
502 !ath_tx_setup(sc, WME_AC_VO, HAL_WME_AC_VO)) {
504 * Not enough hardware tx queues to properly do WME;
505 * just punt and assign them all to the same h/w queue.
506 * We could do a better job of this if, for example,
507 * we allocate queues when we switch from station to
510 if (sc->sc_ac2q[WME_AC_VI] != NULL)
511 ath_tx_cleanupq(sc, sc->sc_ac2q[WME_AC_VI]);
512 if (sc->sc_ac2q[WME_AC_BE] != NULL)
513 ath_tx_cleanupq(sc, sc->sc_ac2q[WME_AC_BE]);
514 sc->sc_ac2q[WME_AC_BE] = sc->sc_ac2q[WME_AC_BK];
515 sc->sc_ac2q[WME_AC_VI] = sc->sc_ac2q[WME_AC_BK];
516 sc->sc_ac2q[WME_AC_VO] = sc->sc_ac2q[WME_AC_BK];
520 * Special case certain configurations. Note the
521 * CAB queue is handled by these specially so don't
522 * include them when checking the txq setup mask.
524 switch (sc->sc_txqsetup &~ (1<<sc->sc_cabq->axq_qnum)) {
526 TASK_INIT(&sc->sc_txtask, 0, ath_tx_task_q0, sc);
529 TASK_INIT(&sc->sc_txtask, 0, ath_tx_task_q0123, sc);
532 TASK_INIT(&sc->sc_txtask, 0, ath_tx_task, sc);
537 * Setup rate control. Some rate control modules
538 * call back to change the anntena state so expose
539 * the necessary entry points.
540 * XXX maybe belongs in struct ath_ratectrl?
542 sc->sc_setdefantenna = ath_setdefantenna;
543 sc->sc_rc = ath_rate_attach(sc);
544 if (sc->sc_rc == NULL) {
551 sc->sc_ledon = 0; /* low true */
552 sc->sc_ledidle = (2700*hz)/1000; /* 2.7sec */
553 callout_init_mp(&sc->sc_ledtimer);
555 * Auto-enable soft led processing for IBM cards and for
556 * 5211 minipci cards. Users can also manually enable/disable
557 * support with a sysctl.
559 sc->sc_softled = (devid == AR5212_DEVID_IBM || devid == AR5211_DEVID);
560 if (sc->sc_softled) {
561 ath_hal_gpioCfgOutput(ah, sc->sc_ledpin,
562 HAL_GPIO_MUX_MAC_NETWORK_LED);
563 ath_hal_gpioset(ah, sc->sc_ledpin, !sc->sc_ledon);
567 ifp->if_flags = IFF_SIMPLEX | IFF_BROADCAST | IFF_MULTICAST;
568 ifp->if_start = ath_start;
569 ifp->if_ioctl = ath_ioctl;
570 ifp->if_init = ath_init;
571 ifq_set_maxlen(&ifp->if_snd, IFQ_MAXLEN);
572 ifq_set_ready(&ifp->if_snd);
575 /* XXX not right but it's not used anywhere important */
576 ic->ic_phytype = IEEE80211_T_OFDM;
577 ic->ic_opmode = IEEE80211_M_STA;
579 IEEE80211_C_STA /* station mode */
580 | IEEE80211_C_IBSS /* ibss, nee adhoc, mode */
581 | IEEE80211_C_HOSTAP /* hostap mode */
582 | IEEE80211_C_MONITOR /* monitor mode */
583 | IEEE80211_C_AHDEMO /* adhoc demo mode */
584 | IEEE80211_C_WDS /* 4-address traffic works */
585 | IEEE80211_C_MBSS /* mesh point link mode */
586 | IEEE80211_C_SHPREAMBLE /* short preamble supported */
587 | IEEE80211_C_SHSLOT /* short slot time supported */
588 | IEEE80211_C_WPA /* capable of WPA1+WPA2 */
589 | IEEE80211_C_BGSCAN /* capable of bg scanning */
590 | IEEE80211_C_TXFRAG /* handle tx frags */
593 * Query the hal to figure out h/w crypto support.
595 if (ath_hal_ciphersupported(ah, HAL_CIPHER_WEP))
596 ic->ic_cryptocaps |= IEEE80211_CRYPTO_WEP;
597 if (ath_hal_ciphersupported(ah, HAL_CIPHER_AES_OCB))
598 ic->ic_cryptocaps |= IEEE80211_CRYPTO_AES_OCB;
599 if (ath_hal_ciphersupported(ah, HAL_CIPHER_AES_CCM))
600 ic->ic_cryptocaps |= IEEE80211_CRYPTO_AES_CCM;
601 if (ath_hal_ciphersupported(ah, HAL_CIPHER_CKIP))
602 ic->ic_cryptocaps |= IEEE80211_CRYPTO_CKIP;
603 if (ath_hal_ciphersupported(ah, HAL_CIPHER_TKIP)) {
604 ic->ic_cryptocaps |= IEEE80211_CRYPTO_TKIP;
606 * Check if h/w does the MIC and/or whether the
607 * separate key cache entries are required to
608 * handle both tx+rx MIC keys.
610 if (ath_hal_ciphersupported(ah, HAL_CIPHER_MIC))
611 ic->ic_cryptocaps |= IEEE80211_CRYPTO_TKIPMIC;
613 * If the h/w supports storing tx+rx MIC keys
614 * in one cache slot automatically enable use.
616 if (ath_hal_hastkipsplit(ah) ||
617 !ath_hal_settkipsplit(ah, AH_FALSE))
620 * If the h/w can do TKIP MIC together with WME then
621 * we use it; otherwise we force the MIC to be done
622 * in software by the net80211 layer.
624 if (ath_hal_haswmetkipmic(ah))
625 sc->sc_wmetkipmic = 1;
627 sc->sc_hasclrkey = ath_hal_ciphersupported(ah, HAL_CIPHER_CLR);
629 * Check for multicast key search support.
631 if (ath_hal_hasmcastkeysearch(sc->sc_ah) &&
632 !ath_hal_getmcastkeysearch(sc->sc_ah)) {
633 ath_hal_setmcastkeysearch(sc->sc_ah, 1);
635 sc->sc_mcastkey = ath_hal_getmcastkeysearch(ah);
637 * Mark key cache slots associated with global keys
638 * as in use. If we knew TKIP was not to be used we
639 * could leave the +32, +64, and +32+64 slots free.
641 for (i = 0; i < IEEE80211_WEP_NKID; i++) {
642 setbit(sc->sc_keymap, i);
643 setbit(sc->sc_keymap, i+64);
644 if (sc->sc_splitmic) {
645 setbit(sc->sc_keymap, i+32);
646 setbit(sc->sc_keymap, i+32+64);
650 * TPC support can be done either with a global cap or
651 * per-packet support. The latter is not available on
652 * all parts. We're a bit pedantic here as all parts
653 * support a global cap.
655 if (ath_hal_hastpc(ah) || ath_hal_hastxpowlimit(ah))
656 ic->ic_caps |= IEEE80211_C_TXPMGT;
659 * Mark WME capability only if we have sufficient
660 * hardware queues to do proper priority scheduling.
662 if (sc->sc_ac2q[WME_AC_BE] != sc->sc_ac2q[WME_AC_BK])
663 ic->ic_caps |= IEEE80211_C_WME;
665 * Check for misc other capabilities.
667 if (ath_hal_hasbursting(ah))
668 ic->ic_caps |= IEEE80211_C_BURST;
669 sc->sc_hasbmask = ath_hal_hasbssidmask(ah);
670 sc->sc_hasbmatch = ath_hal_hasbssidmatch(ah);
671 sc->sc_hastsfadd = ath_hal_hastsfadjust(ah);
672 if (ath_hal_hasfastframes(ah))
673 ic->ic_caps |= IEEE80211_C_FF;
674 wmodes = ath_hal_getwirelessmodes(ah);
675 if (wmodes & (HAL_MODE_108G|HAL_MODE_TURBO))
676 ic->ic_caps |= IEEE80211_C_TURBOP;
677 #ifdef IEEE80211_SUPPORT_TDMA
678 if (ath_hal_macversion(ah) > 0x78) {
679 ic->ic_caps |= IEEE80211_C_TDMA; /* capable of TDMA */
680 ic->ic_tdma_update = ath_tdma_update;
684 * Indicate we need the 802.11 header padded to a
685 * 32-bit boundary for 4-address and QoS frames.
687 ic->ic_flags |= IEEE80211_F_DATAPAD;
690 * Query the hal about antenna support.
692 sc->sc_defant = ath_hal_getdefantenna(ah);
695 * Not all chips have the VEOL support we want to
696 * use with IBSS beacons; check here for it.
698 sc->sc_hasveol = ath_hal_hasveol(ah);
700 /* get mac address from hardware */
701 ath_hal_getmac(ah, macaddr);
703 ath_hal_getbssidmask(ah, sc->sc_hwbssidmask);
705 /* NB: used to size node table key mapping array */
706 ic->ic_max_keyix = sc->sc_keymax;
707 /* call MI attach routine. */
708 ieee80211_ifattach(ic, macaddr);
709 ic->ic_setregdomain = ath_setregdomain;
710 ic->ic_getradiocaps = ath_getradiocaps;
711 sc->sc_opmode = HAL_M_STA;
713 /* override default methods */
714 ic->ic_newassoc = ath_newassoc;
715 ic->ic_updateslot = ath_updateslot;
716 ic->ic_wme.wme_update = ath_wme_update;
717 ic->ic_vap_create = ath_vap_create;
718 ic->ic_vap_delete = ath_vap_delete;
719 ic->ic_raw_xmit = ath_raw_xmit;
720 ic->ic_update_mcast = ath_update_mcast;
721 ic->ic_update_promisc = ath_update_promisc;
722 ic->ic_node_alloc = ath_node_alloc;
723 sc->sc_node_free = ic->ic_node_free;
724 ic->ic_node_free = ath_node_free;
725 ic->ic_node_getsignal = ath_node_getsignal;
726 ic->ic_scan_start = ath_scan_start;
727 ic->ic_scan_end = ath_scan_end;
728 ic->ic_set_channel = ath_set_channel;
730 ieee80211_radiotap_attach(ic,
731 &sc->sc_tx_th.wt_ihdr, sizeof(sc->sc_tx_th),
732 ATH_TX_RADIOTAP_PRESENT,
733 &sc->sc_rx_th.wr_ihdr, sizeof(sc->sc_rx_th),
734 ATH_RX_RADIOTAP_PRESENT);
737 * Setup dynamic sysctl's now that country code and
738 * regdomain are available from the hal.
740 ath_sysctlattach(sc);
743 ieee80211_announce(ic);
759 ath_detach(struct ath_softc *sc)
761 struct ifnet *ifp = sc->sc_ifp;
763 DPRINTF(sc, ATH_DEBUG_ANY, "%s: if_flags %x\n",
764 __func__, ifp->if_flags);
767 * NB: the order of these is important:
768 * o stop the chip so no more interrupts will fire
769 * o call the 802.11 layer before detaching the hal to
770 * insure callbacks into the driver to delete global
771 * key cache entries can be handled
772 * o free the taskqueue which drains any pending tasks
773 * o reclaim the tx queue data structures after calling
774 * the 802.11 layer as we'll get called back to reclaim
775 * node state and potentially want to use them
776 * o to cleanup the tx queues the hal is called, so detach
778 * Other than that, it's straightforward...
781 ieee80211_ifdetach(ifp->if_l2com);
782 taskqueue_free(sc->sc_tq);
784 if (sc->sc_tx99 != NULL)
785 sc->sc_tx99->detach(sc->sc_tx99);
787 ath_rate_detach(sc->sc_rc);
790 ath_hal_detach(sc->sc_ah); /* NB: sets chip in full sleep */
791 if (sc->sc_sysctl_tree) {
792 sysctl_ctx_free(&sc->sc_sysctl_ctx);
793 sc->sc_sysctl_tree = NULL;
801 * MAC address handling for multiple BSS on the same radio.
802 * The first vap uses the MAC address from the EEPROM. For
803 * subsequent vap's we set the U/L bit (bit 1) in the MAC
804 * address and use the next six bits as an index.
807 assign_address(struct ath_softc *sc, uint8_t mac[IEEE80211_ADDR_LEN], int clone)
811 if (clone && sc->sc_hasbmask) {
812 /* NB: we only do this if h/w supports multiple bssid */
813 for (i = 0; i < 8; i++)
814 if ((sc->sc_bssidmask & (1<<i)) == 0)
817 mac[0] |= (i << 2)|0x2;
820 sc->sc_bssidmask |= 1<<i;
821 sc->sc_hwbssidmask[0] &= ~mac[0];
827 reclaim_address(struct ath_softc *sc, const uint8_t mac[IEEE80211_ADDR_LEN])
832 if (i != 0 || --sc->sc_nbssid0 == 0) {
833 sc->sc_bssidmask &= ~(1<<i);
834 /* recalculate bssid mask from remaining addresses */
836 for (i = 1; i < 8; i++)
837 if (sc->sc_bssidmask & (1<<i))
838 mask &= ~((i<<2)|0x2);
839 sc->sc_hwbssidmask[0] |= mask;
844 * Assign a beacon xmit slot. We try to space out
845 * assignments so when beacons are staggered the
846 * traffic coming out of the cab q has maximal time
847 * to go out before the next beacon is scheduled.
850 assign_bslot(struct ath_softc *sc)
855 for (slot = 0; slot < ATH_BCBUF; slot++)
856 if (sc->sc_bslot[slot] == NULL) {
857 if (sc->sc_bslot[(slot+1)%ATH_BCBUF] == NULL &&
858 sc->sc_bslot[(slot-1)%ATH_BCBUF] == NULL)
861 /* NB: keep looking for a double slot */
866 static struct ieee80211vap *
867 ath_vap_create(struct ieee80211com *ic,
868 const char name[IFNAMSIZ], int unit, int opmode, int flags,
869 const uint8_t bssid[IEEE80211_ADDR_LEN],
870 const uint8_t mac0[IEEE80211_ADDR_LEN])
872 struct ath_softc *sc = ic->ic_ifp->if_softc;
874 struct ieee80211vap *vap;
875 uint8_t mac[IEEE80211_ADDR_LEN];
876 int ic_opmode, needbeacon, error;
878 avp = (struct ath_vap *) kmalloc(sizeof(struct ath_vap),
879 M_80211_VAP, M_WAITOK | M_ZERO);
881 IEEE80211_ADDR_COPY(mac, mac0);
883 ic_opmode = opmode; /* default to opmode of new vap */
885 case IEEE80211_M_STA:
886 if (sc->sc_nstavaps != 0) { /* XXX only 1 for now */
887 device_printf(sc->sc_dev, "only 1 sta vap supported\n");
892 * With multiple vaps we must fall back
893 * to s/w beacon miss handling.
895 flags |= IEEE80211_CLONE_NOBEACONS;
897 if (flags & IEEE80211_CLONE_NOBEACONS) {
899 * Station mode w/o beacons are implemented w/ AP mode.
901 ic_opmode = IEEE80211_M_HOSTAP;
904 case IEEE80211_M_IBSS:
905 if (sc->sc_nvaps != 0) { /* XXX only 1 for now */
906 device_printf(sc->sc_dev,
907 "only 1 ibss vap supported\n");
912 case IEEE80211_M_AHDEMO:
913 #ifdef IEEE80211_SUPPORT_TDMA
914 if (flags & IEEE80211_CLONE_TDMA) {
915 if (sc->sc_nvaps != 0) {
916 device_printf(sc->sc_dev,
917 "only 1 tdma vap supported\n");
921 flags |= IEEE80211_CLONE_NOBEACONS;
925 case IEEE80211_M_MONITOR:
926 if (sc->sc_nvaps != 0 && ic->ic_opmode != opmode) {
928 * Adopt existing mode. Adding a monitor or ahdemo
929 * vap to an existing configuration is of dubious
930 * value but should be ok.
932 /* XXX not right for monitor mode */
933 ic_opmode = ic->ic_opmode;
936 case IEEE80211_M_HOSTAP:
937 case IEEE80211_M_MBSS:
940 case IEEE80211_M_WDS:
941 if (sc->sc_nvaps != 0 && ic->ic_opmode == IEEE80211_M_STA) {
942 device_printf(sc->sc_dev,
943 "wds not supported in sta mode\n");
947 * Silently remove any request for a unique
948 * bssid; WDS vap's always share the local
951 flags &= ~IEEE80211_CLONE_BSSID;
952 if (sc->sc_nvaps == 0)
953 ic_opmode = IEEE80211_M_HOSTAP;
955 ic_opmode = ic->ic_opmode;
958 device_printf(sc->sc_dev, "unknown opmode %d\n", opmode);
962 * Check that a beacon buffer is available; the code below assumes it.
964 if (needbeacon & STAILQ_EMPTY(&sc->sc_bbuf)) {
965 device_printf(sc->sc_dev, "no beacon buffer available\n");
970 if (opmode == IEEE80211_M_HOSTAP || opmode == IEEE80211_M_MBSS) {
971 assign_address(sc, mac, flags & IEEE80211_CLONE_BSSID);
972 ath_hal_setbssidmask(sc->sc_ah, sc->sc_hwbssidmask);
976 /* XXX can't hold mutex across if_alloc */
977 error = ieee80211_vap_setup(ic, vap, name, unit, opmode, flags,
980 device_printf(sc->sc_dev, "%s: error %d creating vap\n",
985 /* h/w crypto support */
986 vap->iv_key_alloc = ath_key_alloc;
987 vap->iv_key_delete = ath_key_delete;
988 vap->iv_key_set = ath_key_set;
989 vap->iv_key_update_begin = ath_key_update_begin;
990 vap->iv_key_update_end = ath_key_update_end;
992 /* override various methods */
993 avp->av_recv_mgmt = vap->iv_recv_mgmt;
994 vap->iv_recv_mgmt = ath_recv_mgmt;
995 vap->iv_reset = ath_reset_vap;
996 vap->iv_update_beacon = ath_beacon_update;
997 avp->av_newstate = vap->iv_newstate;
998 vap->iv_newstate = ath_newstate;
999 avp->av_bmiss = vap->iv_bmiss;
1000 vap->iv_bmiss = ath_bmiss_vap;
1005 * Allocate beacon state and setup the q for buffered
1006 * multicast frames. We know a beacon buffer is
1007 * available because we checked above.
1009 avp->av_bcbuf = STAILQ_FIRST(&sc->sc_bbuf);
1010 STAILQ_REMOVE_HEAD(&sc->sc_bbuf, bf_list);
1011 if (opmode != IEEE80211_M_IBSS || !sc->sc_hasveol) {
1013 * Assign the vap to a beacon xmit slot. As above
1014 * this cannot fail to find a free one.
1016 avp->av_bslot = assign_bslot(sc);
1017 KASSERT(sc->sc_bslot[avp->av_bslot] == NULL,
1018 ("beacon slot %u not empty", avp->av_bslot));
1019 sc->sc_bslot[avp->av_bslot] = vap;
1022 if (sc->sc_hastsfadd && sc->sc_nbcnvaps > 0) {
1024 * Multple vaps are to transmit beacons and we
1025 * have h/w support for TSF adjusting; enable
1026 * use of staggered beacons.
1028 sc->sc_stagbeacons = 1;
1030 ath_txq_init(sc, &avp->av_mcastq, ATH_TXQ_SWQ);
1033 ic->ic_opmode = ic_opmode;
1034 if (opmode != IEEE80211_M_WDS) {
1036 if (opmode == IEEE80211_M_STA)
1038 if (opmode == IEEE80211_M_MBSS)
1041 switch (ic_opmode) {
1042 case IEEE80211_M_IBSS:
1043 sc->sc_opmode = HAL_M_IBSS;
1045 case IEEE80211_M_STA:
1046 sc->sc_opmode = HAL_M_STA;
1048 case IEEE80211_M_AHDEMO:
1049 #ifdef IEEE80211_SUPPORT_TDMA
1050 if (vap->iv_caps & IEEE80211_C_TDMA) {
1052 /* NB: disable tsf adjust */
1053 sc->sc_stagbeacons = 0;
1056 * NB: adhoc demo mode is a pseudo mode; to the hal it's
1061 case IEEE80211_M_HOSTAP:
1062 case IEEE80211_M_MBSS:
1063 sc->sc_opmode = HAL_M_HOSTAP;
1065 case IEEE80211_M_MONITOR:
1066 sc->sc_opmode = HAL_M_MONITOR;
1069 /* XXX should not happen */
1072 if (sc->sc_hastsfadd) {
1074 * Configure whether or not TSF adjust should be done.
1076 ath_hal_settsfadjust(sc->sc_ah, sc->sc_stagbeacons);
1078 if (flags & IEEE80211_CLONE_NOBEACONS) {
1080 * Enable s/w beacon miss handling.
1085 /* complete setup */
1086 ieee80211_vap_attach(vap, ath_media_change, ieee80211_media_status);
1089 reclaim_address(sc, mac);
1090 ath_hal_setbssidmask(sc->sc_ah, sc->sc_hwbssidmask);
1092 kfree(avp, M_80211_VAP);
1097 ath_vap_delete(struct ieee80211vap *vap)
1099 struct ieee80211com *ic = vap->iv_ic;
1100 struct ifnet *ifp = ic->ic_ifp;
1101 struct ath_softc *sc = ifp->if_softc;
1102 struct ath_hal *ah = sc->sc_ah;
1103 struct ath_vap *avp = ATH_VAP(vap);
1105 if (ifp->if_flags & IFF_RUNNING) {
1107 * Quiesce the hardware while we remove the vap. In
1108 * particular we need to reclaim all references to
1109 * the vap state by any frames pending on the tx queues.
1111 ath_hal_intrset(ah, 0); /* disable interrupts */
1112 ath_draintxq(sc); /* stop xmit side */
1113 ath_stoprecv(sc); /* stop recv side */
1116 ieee80211_vap_detach(vap);
1118 * Reclaim beacon state. Note this must be done before
1119 * the vap instance is reclaimed as we may have a reference
1120 * to it in the buffer for the beacon frame.
1122 if (avp->av_bcbuf != NULL) {
1123 if (avp->av_bslot != -1) {
1124 sc->sc_bslot[avp->av_bslot] = NULL;
1127 ath_beacon_return(sc, avp->av_bcbuf);
1128 avp->av_bcbuf = NULL;
1129 if (sc->sc_nbcnvaps == 0) {
1130 sc->sc_stagbeacons = 0;
1131 if (sc->sc_hastsfadd)
1132 ath_hal_settsfadjust(sc->sc_ah, 0);
1135 * Reclaim any pending mcast frames for the vap.
1137 ath_tx_draintxq(sc, &avp->av_mcastq);
1140 * Update bookkeeping.
1142 if (vap->iv_opmode == IEEE80211_M_STA) {
1144 if (sc->sc_nstavaps == 0 && sc->sc_swbmiss)
1146 } else if (vap->iv_opmode == IEEE80211_M_HOSTAP ||
1147 vap->iv_opmode == IEEE80211_M_MBSS) {
1148 reclaim_address(sc, vap->iv_myaddr);
1149 ath_hal_setbssidmask(ah, sc->sc_hwbssidmask);
1150 if (vap->iv_opmode == IEEE80211_M_MBSS)
1153 if (vap->iv_opmode != IEEE80211_M_WDS)
1155 #ifdef IEEE80211_SUPPORT_TDMA
1156 /* TDMA operation ceases when the last vap is destroyed */
1157 if (sc->sc_tdma && sc->sc_nvaps == 0) {
1162 kfree(avp, M_80211_VAP);
1164 if (ifp->if_flags & IFF_RUNNING) {
1166 * Restart rx+tx machines if still running (RUNNING will
1167 * be reset if we just destroyed the last vap).
1169 if (ath_startrecv(sc) != 0)
1170 if_printf(ifp, "%s: unable to restart recv logic\n",
1172 if (sc->sc_beacons) { /* restart beacons */
1173 #ifdef IEEE80211_SUPPORT_TDMA
1175 ath_tdma_config(sc, NULL);
1178 ath_beacon_config(sc, NULL);
1180 ath_hal_intrset(ah, sc->sc_imask);
1185 ath_suspend(struct ath_softc *sc)
1187 struct ifnet *ifp = sc->sc_ifp;
1188 struct ieee80211com *ic = ifp->if_l2com;
1190 DPRINTF(sc, ATH_DEBUG_ANY, "%s: if_flags %x\n",
1191 __func__, ifp->if_flags);
1193 sc->sc_resume_up = (ifp->if_flags & IFF_UP) != 0;
1194 if (ic->ic_opmode == IEEE80211_M_STA)
1197 ieee80211_suspend_all(ic);
1199 * NB: don't worry about putting the chip in low power
1200 * mode; pci will power off our socket on suspend and
1201 * CardBus detaches the device.
1206 * Reset the key cache since some parts do not reset the
1207 * contents on resume. First we clear all entries, then
1208 * re-load keys that the 802.11 layer assumes are setup
1212 ath_reset_keycache(struct ath_softc *sc)
1214 struct ifnet *ifp = sc->sc_ifp;
1215 struct ieee80211com *ic = ifp->if_l2com;
1216 struct ath_hal *ah = sc->sc_ah;
1219 for (i = 0; i < sc->sc_keymax; i++)
1220 ath_hal_keyreset(ah, i);
1221 ieee80211_crypto_reload_keys(ic);
1225 ath_resume(struct ath_softc *sc)
1227 struct ifnet *ifp = sc->sc_ifp;
1228 struct ieee80211com *ic = ifp->if_l2com;
1229 struct ath_hal *ah = sc->sc_ah;
1232 DPRINTF(sc, ATH_DEBUG_ANY, "%s: if_flags %x\n",
1233 __func__, ifp->if_flags);
1236 * Must reset the chip before we reload the
1237 * keycache as we were powered down on suspend.
1239 ath_hal_reset(ah, sc->sc_opmode,
1240 sc->sc_curchan != NULL ? sc->sc_curchan : ic->ic_curchan,
1242 ath_reset_keycache(sc);
1243 if (sc->sc_resume_up) {
1244 if (ic->ic_opmode == IEEE80211_M_STA) {
1247 * Program the beacon registers using the last rx'd
1248 * beacon frame and enable sync on the next beacon
1249 * we see. This should handle the case where we
1250 * wakeup and find the same AP and also the case where
1251 * we wakeup and need to roam. For the latter we
1252 * should get bmiss events that trigger a roam.
1254 ath_beacon_config(sc, NULL);
1255 sc->sc_syncbeacon = 1;
1257 ieee80211_resume_all(ic);
1259 if (sc->sc_softled) {
1260 ath_hal_gpioCfgOutput(ah, sc->sc_ledpin,
1261 HAL_GPIO_MUX_MAC_NETWORK_LED);
1262 ath_hal_gpioset(ah, sc->sc_ledpin, !sc->sc_ledon);
1267 ath_shutdown(struct ath_softc *sc)
1269 struct ifnet *ifp = sc->sc_ifp;
1271 DPRINTF(sc, ATH_DEBUG_ANY, "%s: if_flags %x\n",
1272 __func__, ifp->if_flags);
1275 /* NB: no point powering down chip as we're about to reboot */
1279 * Interrupt handler. Most of the actual processing is deferred.
1284 struct ath_softc *sc = arg;
1285 struct ifnet *ifp = sc->sc_ifp;
1286 struct ath_hal *ah = sc->sc_ah;
1290 if (sc->sc_invalid) {
1292 * The hardware is not ready/present, don't touch anything.
1293 * Note this can happen early on if the IRQ is shared.
1295 DPRINTF(sc, ATH_DEBUG_ANY, "%s: invalid; ignored\n", __func__);
1299 if (!ath_hal_intrpend(ah)) /* shared irq, not for us */
1301 if ((ifp->if_flags & IFF_UP) == 0 ||
1302 (ifp->if_flags & IFF_RUNNING) == 0) {
1305 DPRINTF(sc, ATH_DEBUG_ANY, "%s: if_flags 0x%x\n",
1306 __func__, ifp->if_flags);
1307 ath_hal_getisr(ah, &status); /* clear ISR */
1308 ath_hal_intrset(ah, 0); /* disable further intr's */
1312 * Figure out the reason(s) for the interrupt. Note
1313 * that the hal returns a pseudo-ISR that may include
1314 * bits we haven't explicitly enabled so we mask the
1315 * value to insure we only process bits we requested.
1317 ath_hal_getisr(ah, &ostatus); /* NB: clears ISR too */
1318 DPRINTF(sc, ATH_DEBUG_INTR, "%s: status 0x%x\n", __func__, ostatus);
1319 status = ostatus & sc->sc_imask; /* discard unasked for bits */
1320 if (status & HAL_INT_FATAL) {
1321 sc->sc_stats.ast_hardware++;
1322 ath_hal_intrset(ah, 0); /* disable intr's until reset */
1323 ath_fatal_proc(sc, 0);
1325 if (status & HAL_INT_SWBA) {
1327 * Software beacon alert--time to send a beacon.
1328 * Handle beacon transmission directly; deferring
1329 * this is too slow to meet timing constraints
1332 #ifdef IEEE80211_SUPPORT_TDMA
1334 if (sc->sc_tdmaswba == 0) {
1335 struct ieee80211com *ic = ifp->if_l2com;
1336 struct ieee80211vap *vap =
1337 TAILQ_FIRST(&ic->ic_vaps);
1338 ath_tdma_beacon_send(sc, vap);
1340 vap->iv_tdma->tdma_bintval;
1346 ath_beacon_proc(sc, 0);
1347 #ifdef IEEE80211_SUPPORT_SUPERG
1349 * Schedule the rx taskq in case there's no
1350 * traffic so any frames held on the staging
1351 * queue are aged and potentially flushed.
1353 taskqueue_enqueue(sc->sc_tq, &sc->sc_rxtask);
1359 * NB: The hardware should re-read the link when the RXE
1360 * bit is written, but it doesn't work at least on
1363 if (status & HAL_INT_RXEOL) {
1364 sc->sc_stats.ast_rxeol++;
1365 sc->sc_rxlink = NULL;
1368 if (status & HAL_INT_TXURN) {
1369 sc->sc_stats.ast_txurn++;
1370 /* bump tx trigger level */
1371 ath_hal_updatetxtriglevel(ah, AH_TRUE);
1374 if (status & HAL_INT_RX)
1375 taskqueue_enqueue(sc->sc_tq, &sc->sc_rxtask);
1377 if (status & HAL_INT_TX)
1378 taskqueue_enqueue(sc->sc_tq, &sc->sc_txtask);
1380 if (status & HAL_INT_BMISS) {
1381 sc->sc_stats.ast_bmiss++;
1382 taskqueue_enqueue(sc->sc_tq, &sc->sc_bmisstask);
1385 if (status & HAL_INT_MIB) {
1386 sc->sc_stats.ast_mib++;
1388 * Disable interrupts until we service the MIB
1389 * interrupt; otherwise it will continue to fire.
1391 ath_hal_intrset(ah, 0);
1393 * Let the hal handle the event. We assume it will
1394 * clear whatever condition caused the interrupt.
1396 ath_hal_mibevent(ah, &sc->sc_halstats);
1397 ath_hal_intrset(ah, sc->sc_imask);
1400 if (status & HAL_INT_RXORN) {
1401 /* NB: hal marks HAL_INT_FATAL when RXORN is fatal */
1402 sc->sc_stats.ast_rxorn++;
1408 ath_fatal_proc(void *arg, int pending)
1410 struct ath_softc *sc = arg;
1411 struct ifnet *ifp = sc->sc_ifp;
1416 if_printf(ifp, "hardware error; resetting\n");
1418 * Fatal errors are unrecoverable. Typically these
1419 * are caused by DMA errors. Collect h/w state from
1420 * the hal so we can diagnose what's going on.
1422 if (ath_hal_getfatalstate(sc->sc_ah, &sp, &len)) {
1423 KASSERT(len >= 6*sizeof(u_int32_t), ("len %u bytes", len));
1425 if_printf(ifp, "0x%08x 0x%08x 0x%08x, 0x%08x 0x%08x 0x%08x\n",
1426 state[0], state[1] , state[2], state[3],
1427 state[4], state[5]);
1433 ath_bmiss_vap(struct ieee80211vap *vap)
1436 * Workaround phantom bmiss interrupts by sanity-checking
1437 * the time of our last rx'd frame. If it is within the
1438 * beacon miss interval then ignore the interrupt. If it's
1439 * truly a bmiss we'll get another interrupt soon and that'll
1440 * be dispatched up for processing. Note this applies only
1441 * for h/w beacon miss events.
1443 if ((vap->iv_flags_ext & IEEE80211_FEXT_SWBMISS) == 0) {
1444 struct ifnet *ifp = vap->iv_ic->ic_ifp;
1445 struct ath_softc *sc = ifp->if_softc;
1446 u_int64_t lastrx = sc->sc_lastrx;
1447 u_int64_t tsf = ath_hal_gettsf64(sc->sc_ah);
1448 u_int bmisstimeout =
1449 vap->iv_bmissthreshold * vap->iv_bss->ni_intval * 1024;
1451 DPRINTF(sc, ATH_DEBUG_BEACON,
1452 "%s: tsf %llu lastrx %lld (%llu) bmiss %u\n",
1453 __func__, (unsigned long long) tsf,
1454 (unsigned long long)(tsf - lastrx),
1455 (unsigned long long) lastrx, bmisstimeout);
1457 if (tsf - lastrx <= bmisstimeout) {
1458 sc->sc_stats.ast_bmiss_phantom++;
1462 ATH_VAP(vap)->av_bmiss(vap);
1466 ath_hal_gethangstate(struct ath_hal *ah, uint32_t mask, uint32_t *hangs)
1471 if (!ath_hal_getdiagstate(ah, 32, &mask, sizeof(mask), &sp, &rsize))
1473 KASSERT(rsize == sizeof(uint32_t), ("resultsize %u", rsize));
1474 *hangs = *(uint32_t *)sp;
1479 ath_bmiss_task(void *arg, int pending)
1481 struct ath_softc *sc = arg;
1482 struct ifnet *ifp = sc->sc_ifp;
1485 wlan_serialize_enter();
1486 DPRINTF(sc, ATH_DEBUG_ANY, "%s: pending %u\n", __func__, pending);
1488 if (ath_hal_gethangstate(sc->sc_ah, 0xff, &hangs) && hangs != 0) {
1489 if_printf(ifp, "bb hang detected (0x%x), reseting\n", hangs);
1492 ieee80211_beacon_miss(ifp->if_l2com);
1494 wlan_serialize_exit();
1498 * Handle TKIP MIC setup to deal hardware that doesn't do MIC
1499 * calcs together with WME. If necessary disable the crypto
1500 * hardware and mark the 802.11 state so keys will be setup
1501 * with the MIC work done in software.
1504 ath_settkipmic(struct ath_softc *sc)
1506 struct ifnet *ifp = sc->sc_ifp;
1507 struct ieee80211com *ic = ifp->if_l2com;
1509 if ((ic->ic_cryptocaps & IEEE80211_CRYPTO_TKIP) && !sc->sc_wmetkipmic) {
1510 if (ic->ic_flags & IEEE80211_F_WME) {
1511 ath_hal_settkipmic(sc->sc_ah, AH_FALSE);
1512 ic->ic_cryptocaps &= ~IEEE80211_CRYPTO_TKIPMIC;
1514 ath_hal_settkipmic(sc->sc_ah, AH_TRUE);
1515 ic->ic_cryptocaps |= IEEE80211_CRYPTO_TKIPMIC;
1523 struct ath_softc *sc = (struct ath_softc *) arg;
1524 struct ifnet *ifp = sc->sc_ifp;
1525 struct ieee80211com *ic = ifp->if_l2com;
1526 struct ath_hal *ah = sc->sc_ah;
1529 DPRINTF(sc, ATH_DEBUG_ANY, "%s: if_flags 0x%x\n",
1530 __func__, ifp->if_flags);
1533 * Stop anything previously setup. This is safe
1534 * whether this is the first time through or not.
1536 ath_stop_locked(ifp);
1539 * The basic interface to setting the hardware in a good
1540 * state is ``reset''. On return the hardware is known to
1541 * be powered up and with interrupts disabled. This must
1542 * be followed by initialization of the appropriate bits
1543 * and then setup of the interrupt mask.
1546 if (!ath_hal_reset(ah, sc->sc_opmode, ic->ic_curchan, AH_FALSE, &status)) {
1547 if_printf(ifp, "unable to reset hardware; hal status %u\n",
1551 ath_chan_change(sc, ic->ic_curchan);
1554 * Likewise this is set during reset so update
1555 * state cached in the driver.
1557 sc->sc_diversity = ath_hal_getdiversity(ah);
1558 sc->sc_lastlongcal = 0;
1559 sc->sc_resetcal = 1;
1560 sc->sc_lastcalreset = 0;
1563 * Setup the hardware after reset: the key cache
1564 * is filled as needed and the receive engine is
1565 * set going. Frame transmit is handled entirely
1566 * in the frame output path; there's nothing to do
1567 * here except setup the interrupt mask.
1569 if (ath_startrecv(sc) != 0) {
1570 if_printf(ifp, "unable to start recv logic\n");
1575 * Enable interrupts.
1577 sc->sc_imask = HAL_INT_RX | HAL_INT_TX
1578 | HAL_INT_RXEOL | HAL_INT_RXORN
1579 | HAL_INT_FATAL | HAL_INT_GLOBAL;
1581 * Enable MIB interrupts when there are hardware phy counters.
1582 * Note we only do this (at the moment) for station mode.
1584 if (sc->sc_needmib && ic->ic_opmode == IEEE80211_M_STA)
1585 sc->sc_imask |= HAL_INT_MIB;
1587 ifp->if_flags |= IFF_RUNNING;
1588 callout_reset(&sc->sc_wd_ch, hz, ath_watchdog_callout, sc);
1589 ath_hal_intrset(ah, sc->sc_imask);
1592 #ifdef ATH_TX99_DIAG
1593 if (sc->sc_tx99 != NULL)
1594 sc->sc_tx99->start(sc->sc_tx99);
1597 ieee80211_start_all(ic); /* start all vap's */
1601 ath_stop_locked(struct ifnet *ifp)
1603 struct ath_softc *sc = ifp->if_softc;
1604 struct ath_hal *ah = sc->sc_ah;
1606 DPRINTF(sc, ATH_DEBUG_ANY, "%s: invalid %u if_flags 0x%x\n",
1607 __func__, sc->sc_invalid, ifp->if_flags);
1609 if (ifp->if_flags & IFF_RUNNING) {
1611 * Shutdown the hardware and driver:
1612 * reset 802.11 state machine
1614 * disable interrupts
1615 * turn off the radio
1616 * clear transmit machinery
1617 * clear receive machinery
1618 * drain and release tx queues
1619 * reclaim beacon resources
1620 * power down hardware
1622 * Note that some of this work is not possible if the
1623 * hardware is gone (invalid).
1625 #ifdef ATH_TX99_DIAG
1626 if (sc->sc_tx99 != NULL)
1627 sc->sc_tx99->stop(sc->sc_tx99);
1629 callout_stop(&sc->sc_wd_ch);
1630 sc->sc_wd_timer = 0;
1631 ifp->if_flags &= ~IFF_RUNNING;
1632 if (!sc->sc_invalid) {
1633 if (sc->sc_softled) {
1634 callout_stop(&sc->sc_ledtimer);
1635 ath_hal_gpioset(ah, sc->sc_ledpin,
1637 sc->sc_blinking = 0;
1639 ath_hal_intrset(ah, 0);
1642 if (!sc->sc_invalid) {
1644 ath_hal_phydisable(ah);
1646 sc->sc_rxlink = NULL;
1647 ath_beacon_free(sc); /* XXX not needed */
1652 ath_stop(struct ifnet *ifp)
1654 struct ath_softc *sc __unused = ifp->if_softc;
1656 ath_stop_locked(ifp);
1660 * Reset the hardware w/o losing operational state. This is
1661 * basically a more efficient way of doing ath_stop, ath_init,
1662 * followed by state transitions to the current 802.11
1663 * operational state. Used to recover from various errors and
1664 * to reset or reload hardware state.
1667 ath_reset(struct ifnet *ifp)
1669 struct ath_softc *sc = ifp->if_softc;
1670 struct ieee80211com *ic = ifp->if_l2com;
1671 struct ath_hal *ah = sc->sc_ah;
1674 ath_hal_intrset(ah, 0); /* disable interrupts */
1675 ath_draintxq(sc); /* stop xmit side */
1676 ath_stoprecv(sc); /* stop recv side */
1677 ath_settkipmic(sc); /* configure TKIP MIC handling */
1678 /* NB: indicate channel change so we do a full reset */
1679 if (!ath_hal_reset(ah, sc->sc_opmode, ic->ic_curchan, AH_TRUE, &status))
1680 if_printf(ifp, "%s: unable to reset hardware; hal status %u\n",
1682 sc->sc_diversity = ath_hal_getdiversity(ah);
1683 if (ath_startrecv(sc) != 0) /* restart recv */
1684 if_printf(ifp, "%s: unable to start recv logic\n", __func__);
1686 * We may be doing a reset in response to an ioctl
1687 * that changes the channel so update any state that
1688 * might change as a result.
1690 ath_chan_change(sc, ic->ic_curchan);
1691 if (sc->sc_beacons) { /* restart beacons */
1692 #ifdef IEEE80211_SUPPORT_TDMA
1694 ath_tdma_config(sc, NULL);
1697 ath_beacon_config(sc, NULL);
1699 ath_hal_intrset(ah, sc->sc_imask);
1701 ath_start(ifp); /* restart xmit */
1706 ath_reset_vap(struct ieee80211vap *vap, u_long cmd)
1708 struct ieee80211com *ic = vap->iv_ic;
1709 struct ifnet *ifp = ic->ic_ifp;
1710 struct ath_softc *sc = ifp->if_softc;
1711 struct ath_hal *ah = sc->sc_ah;
1714 case IEEE80211_IOC_TXPOWER:
1716 * If per-packet TPC is enabled, then we have nothing
1717 * to do; otherwise we need to force the global limit.
1718 * All this can happen directly; no need to reset.
1720 if (!ath_hal_gettpc(ah))
1721 ath_hal_settxpowlimit(ah, ic->ic_txpowlimit);
1724 return ath_reset(ifp);
1727 static struct ath_buf *
1728 _ath_getbuf_locked(struct ath_softc *sc)
1732 bf = STAILQ_FIRST(&sc->sc_txbuf);
1733 if (bf != NULL && (bf->bf_flags & ATH_BUF_BUSY) == 0)
1734 STAILQ_REMOVE_HEAD(&sc->sc_txbuf, bf_list);
1738 kprintf("ath: ran out of descriptors\n");
1739 DPRINTF(sc, ATH_DEBUG_XMIT, "%s: %s\n", __func__,
1740 STAILQ_FIRST(&sc->sc_txbuf) == NULL ?
1741 "out of xmit buffers" : "xmit buffer busy");
1746 static struct ath_buf *
1747 ath_getbuf(struct ath_softc *sc)
1751 bf = _ath_getbuf_locked(sc);
1753 struct ifnet *ifp = sc->sc_ifp;
1755 DPRINTF(sc, ATH_DEBUG_XMIT, "%s: stop queue\n", __func__);
1756 sc->sc_stats.ast_tx_qstop++;
1757 ifp->if_flags |= IFF_OACTIVE;
1763 * Cleanup driver resources when we run out of buffers
1764 * while processing fragments; return the tx buffers
1765 * allocated and drop node references.
1768 ath_txfrag_cleanup(struct ath_softc *sc,
1769 ath_bufhead *frags, struct ieee80211_node *ni)
1771 struct ath_buf *bf, *next;
1773 STAILQ_FOREACH_MUTABLE(bf, frags, bf_list, next) {
1774 /* NB: bf assumed clean */
1775 STAILQ_REMOVE_HEAD(frags, bf_list);
1776 STAILQ_INSERT_HEAD(&sc->sc_txbuf, bf, bf_list);
1777 ieee80211_node_decref(ni);
1782 * Setup xmit of a fragmented frame. Allocate a buffer
1783 * for each frag and bump the node reference count to
1784 * reflect the held reference to be setup by ath_tx_start.
1787 ath_txfrag_setup(struct ath_softc *sc, ath_bufhead *frags,
1788 struct mbuf *m0, struct ieee80211_node *ni)
1793 for (m = m0->m_nextpkt; m != NULL; m = m->m_nextpkt) {
1794 bf = _ath_getbuf_locked(sc);
1795 if (bf == NULL) { /* out of buffers, cleanup */
1796 ath_txfrag_cleanup(sc, frags, ni);
1799 ieee80211_node_incref(ni);
1800 STAILQ_INSERT_TAIL(frags, bf, bf_list);
1803 return !STAILQ_EMPTY(frags);
1807 ath_start(struct ifnet *ifp)
1809 struct ath_softc *sc = ifp->if_softc;
1810 struct ieee80211_node *ni;
1812 struct mbuf *m, *next;
1815 if ((ifp->if_flags & IFF_RUNNING) == 0 || sc->sc_invalid) {
1816 ifq_purge(&ifp->if_snd);
1821 * Grab a TX buffer and associated resources.
1823 bf = ath_getbuf(sc);
1827 IF_DEQUEUE(&ifp->if_snd, m);
1829 STAILQ_INSERT_HEAD(&sc->sc_txbuf, bf, bf_list);
1832 ni = (struct ieee80211_node *) m->m_pkthdr.rcvif;
1834 * Check for fragmentation. If this frame
1835 * has been broken up verify we have enough
1836 * buffers to send all the fragments so all
1839 STAILQ_INIT(&frags);
1840 if ((m->m_flags & M_FRAG) &&
1841 !ath_txfrag_setup(sc, &frags, m, ni)) {
1842 DPRINTF(sc, ATH_DEBUG_XMIT,
1843 "%s: out of txfrag buffers\n", __func__);
1844 sc->sc_stats.ast_tx_nofrag++;
1852 * Pass the frame to the h/w for transmission.
1853 * Fragmented frames have each frag chained together
1854 * with m_nextpkt. We know there are sufficient ath_buf's
1855 * to send all the frags because of work done by
1856 * ath_txfrag_setup. We leave m_nextpkt set while
1857 * calling ath_tx_start so it can use it to extend the
1858 * the tx duration to cover the subsequent frag and
1859 * so it can reclaim all the mbufs in case of an error;
1860 * ath_tx_start clears m_nextpkt once it commits to
1861 * handing the frame to the hardware.
1863 next = m->m_nextpkt;
1864 if (ath_tx_start(sc, ni, bf, m)) {
1870 STAILQ_INSERT_HEAD(&sc->sc_txbuf, bf, bf_list);
1871 ath_txfrag_cleanup(sc, &frags, ni);
1873 ieee80211_free_node(ni);
1878 * Beware of state changing between frags.
1879 * XXX check sta power-save state?
1881 if (ni->ni_vap->iv_state != IEEE80211_S_RUN) {
1882 DPRINTF(sc, ATH_DEBUG_XMIT,
1883 "%s: flush fragmented packet, state %s\n",
1885 ieee80211_state_name[ni->ni_vap->iv_state]);
1890 bf = STAILQ_FIRST(&frags);
1891 KASSERT(bf != NULL, ("no buf for txfrag"));
1892 STAILQ_REMOVE_HEAD(&frags, bf_list);
1896 sc->sc_wd_timer = 5;
1901 ath_media_change(struct ifnet *ifp)
1903 int error = ieee80211_media_change(ifp);
1904 /* NB: only the fixed rate can change and that doesn't need a reset */
1905 return (error == ENETRESET ? 0 : error);
1910 ath_keyprint(struct ath_softc *sc, const char *tag, u_int ix,
1911 const HAL_KEYVAL *hk, const u_int8_t mac[IEEE80211_ADDR_LEN])
1913 static const char *ciphers[] = {
1923 kprintf("%s: [%02u] %-7s ", tag, ix, ciphers[hk->kv_type]);
1924 for (i = 0, n = hk->kv_len; i < n; i++)
1925 kprintf("%02x", hk->kv_val[i]);
1926 kprintf(" mac %6D", mac, ":");
1927 if (hk->kv_type == HAL_CIPHER_TKIP) {
1928 kprintf(" %s ", sc->sc_splitmic ? "mic" : "rxmic");
1929 for (i = 0; i < sizeof(hk->kv_mic); i++)
1930 kprintf("%02x", hk->kv_mic[i]);
1931 if (!sc->sc_splitmic) {
1933 for (i = 0; i < sizeof(hk->kv_txmic); i++)
1934 kprintf("%02x", hk->kv_txmic[i]);
1942 * Set a TKIP key into the hardware. This handles the
1943 * potential distribution of key state to multiple key
1944 * cache slots for TKIP.
1947 ath_keyset_tkip(struct ath_softc *sc, const struct ieee80211_key *k,
1948 HAL_KEYVAL *hk, const u_int8_t mac[IEEE80211_ADDR_LEN])
1950 #define IEEE80211_KEY_XR (IEEE80211_KEY_XMIT | IEEE80211_KEY_RECV)
1951 static const u_int8_t zerobssid[IEEE80211_ADDR_LEN];
1952 struct ath_hal *ah = sc->sc_ah;
1954 KASSERT(k->wk_cipher->ic_cipher == IEEE80211_CIPHER_TKIP,
1955 ("got a non-TKIP key, cipher %u", k->wk_cipher->ic_cipher));
1956 if ((k->wk_flags & IEEE80211_KEY_XR) == IEEE80211_KEY_XR) {
1957 if (sc->sc_splitmic) {
1959 * TX key goes at first index, RX key at the rx index.
1960 * The hal handles the MIC keys at index+64.
1962 memcpy(hk->kv_mic, k->wk_txmic, sizeof(hk->kv_mic));
1963 KEYPRINTF(sc, k->wk_keyix, hk, zerobssid);
1964 if (!ath_hal_keyset(ah, k->wk_keyix, hk, zerobssid))
1967 memcpy(hk->kv_mic, k->wk_rxmic, sizeof(hk->kv_mic));
1968 KEYPRINTF(sc, k->wk_keyix+32, hk, mac);
1969 /* XXX delete tx key on failure? */
1970 return ath_hal_keyset(ah, k->wk_keyix+32, hk, mac);
1973 * Room for both TX+RX MIC keys in one key cache
1974 * slot, just set key at the first index; the hal
1975 * will handle the rest.
1977 memcpy(hk->kv_mic, k->wk_rxmic, sizeof(hk->kv_mic));
1978 memcpy(hk->kv_txmic, k->wk_txmic, sizeof(hk->kv_txmic));
1979 KEYPRINTF(sc, k->wk_keyix, hk, mac);
1980 return ath_hal_keyset(ah, k->wk_keyix, hk, mac);
1982 } else if (k->wk_flags & IEEE80211_KEY_XMIT) {
1983 if (sc->sc_splitmic) {
1985 * NB: must pass MIC key in expected location when
1986 * the keycache only holds one MIC key per entry.
1988 memcpy(hk->kv_mic, k->wk_txmic, sizeof(hk->kv_txmic));
1990 memcpy(hk->kv_txmic, k->wk_txmic, sizeof(hk->kv_txmic));
1991 KEYPRINTF(sc, k->wk_keyix, hk, mac);
1992 return ath_hal_keyset(ah, k->wk_keyix, hk, mac);
1993 } else if (k->wk_flags & IEEE80211_KEY_RECV) {
1994 memcpy(hk->kv_mic, k->wk_rxmic, sizeof(hk->kv_mic));
1995 KEYPRINTF(sc, k->wk_keyix, hk, mac);
1996 return ath_hal_keyset(ah, k->wk_keyix, hk, mac);
1999 #undef IEEE80211_KEY_XR
2003 * Set a net80211 key into the hardware. This handles the
2004 * potential distribution of key state to multiple key
2005 * cache slots for TKIP with hardware MIC support.
2008 ath_keyset(struct ath_softc *sc, const struct ieee80211_key *k,
2009 struct ieee80211_node *bss)
2011 #define N(a) (sizeof(a)/sizeof(a[0]))
2012 static const u_int8_t ciphermap[] = {
2013 HAL_CIPHER_WEP, /* IEEE80211_CIPHER_WEP */
2014 HAL_CIPHER_TKIP, /* IEEE80211_CIPHER_TKIP */
2015 HAL_CIPHER_AES_OCB, /* IEEE80211_CIPHER_AES_OCB */
2016 HAL_CIPHER_AES_CCM, /* IEEE80211_CIPHER_AES_CCM */
2017 (u_int8_t) -1, /* 4 is not allocated */
2018 HAL_CIPHER_CKIP, /* IEEE80211_CIPHER_CKIP */
2019 HAL_CIPHER_CLR, /* IEEE80211_CIPHER_NONE */
2021 struct ath_hal *ah = sc->sc_ah;
2022 const struct ieee80211_cipher *cip = k->wk_cipher;
2023 u_int8_t gmac[IEEE80211_ADDR_LEN];
2024 const u_int8_t *mac;
2027 memset(&hk, 0, sizeof(hk));
2029 * Software crypto uses a "clear key" so non-crypto
2030 * state kept in the key cache are maintained and
2031 * so that rx frames have an entry to match.
2033 if ((k->wk_flags & IEEE80211_KEY_SWCRYPT) == 0) {
2034 KASSERT(cip->ic_cipher < N(ciphermap),
2035 ("invalid cipher type %u", cip->ic_cipher));
2036 hk.kv_type = ciphermap[cip->ic_cipher];
2037 hk.kv_len = k->wk_keylen;
2038 memcpy(hk.kv_val, k->wk_key, k->wk_keylen);
2040 hk.kv_type = HAL_CIPHER_CLR;
2042 if ((k->wk_flags & IEEE80211_KEY_GROUP) && sc->sc_mcastkey) {
2044 * Group keys on hardware that supports multicast frame
2045 * key search use a MAC that is the sender's address with
2046 * the high bit set instead of the app-specified address.
2048 IEEE80211_ADDR_COPY(gmac, bss->ni_macaddr);
2052 mac = k->wk_macaddr;
2054 if (hk.kv_type == HAL_CIPHER_TKIP &&
2055 (k->wk_flags & IEEE80211_KEY_SWMIC) == 0) {
2056 return ath_keyset_tkip(sc, k, &hk, mac);
2058 KEYPRINTF(sc, k->wk_keyix, &hk, mac);
2059 return ath_hal_keyset(ah, k->wk_keyix, &hk, mac);
2065 * Allocate tx/rx key slots for TKIP. We allocate two slots for
2066 * each key, one for decrypt/encrypt and the other for the MIC.
2069 key_alloc_2pair(struct ath_softc *sc,
2070 ieee80211_keyix *txkeyix, ieee80211_keyix *rxkeyix)
2072 #define N(a) (sizeof(a)/sizeof(a[0]))
2075 KASSERT(sc->sc_splitmic, ("key cache !split"));
2076 /* XXX could optimize */
2077 for (i = 0; i < N(sc->sc_keymap)/4; i++) {
2078 u_int8_t b = sc->sc_keymap[i];
2081 * One or more slots in this byte are free.
2089 /* XXX IEEE80211_KEY_XMIT | IEEE80211_KEY_RECV */
2090 if (isset(sc->sc_keymap, keyix+32) ||
2091 isset(sc->sc_keymap, keyix+64) ||
2092 isset(sc->sc_keymap, keyix+32+64)) {
2093 /* full pair unavailable */
2095 if (keyix == (i+1)*NBBY) {
2096 /* no slots were appropriate, advance */
2101 setbit(sc->sc_keymap, keyix);
2102 setbit(sc->sc_keymap, keyix+64);
2103 setbit(sc->sc_keymap, keyix+32);
2104 setbit(sc->sc_keymap, keyix+32+64);
2105 DPRINTF(sc, ATH_DEBUG_KEYCACHE,
2106 "%s: key pair %u,%u %u,%u\n",
2107 __func__, keyix, keyix+64,
2108 keyix+32, keyix+32+64);
2110 *rxkeyix = keyix+32;
2114 DPRINTF(sc, ATH_DEBUG_KEYCACHE, "%s: out of pair space\n", __func__);
2120 * Allocate tx/rx key slots for TKIP. We allocate two slots for
2121 * each key, one for decrypt/encrypt and the other for the MIC.
2124 key_alloc_pair(struct ath_softc *sc,
2125 ieee80211_keyix *txkeyix, ieee80211_keyix *rxkeyix)
2127 #define N(a) (sizeof(a)/sizeof(a[0]))
2130 KASSERT(!sc->sc_splitmic, ("key cache split"));
2131 /* XXX could optimize */
2132 for (i = 0; i < N(sc->sc_keymap)/4; i++) {
2133 u_int8_t b = sc->sc_keymap[i];
2136 * One or more slots in this byte are free.
2144 if (isset(sc->sc_keymap, keyix+64)) {
2145 /* full pair unavailable */
2147 if (keyix == (i+1)*NBBY) {
2148 /* no slots were appropriate, advance */
2153 setbit(sc->sc_keymap, keyix);
2154 setbit(sc->sc_keymap, keyix+64);
2155 DPRINTF(sc, ATH_DEBUG_KEYCACHE,
2156 "%s: key pair %u,%u\n",
2157 __func__, keyix, keyix+64);
2158 *txkeyix = *rxkeyix = keyix;
2162 DPRINTF(sc, ATH_DEBUG_KEYCACHE, "%s: out of pair space\n", __func__);
2168 * Allocate a single key cache slot.
2171 key_alloc_single(struct ath_softc *sc,
2172 ieee80211_keyix *txkeyix, ieee80211_keyix *rxkeyix)
2174 #define N(a) (sizeof(a)/sizeof(a[0]))
2177 /* XXX try i,i+32,i+64,i+32+64 to minimize key pair conflicts */
2178 for (i = 0; i < N(sc->sc_keymap); i++) {
2179 u_int8_t b = sc->sc_keymap[i];
2182 * One or more slots are free.
2187 setbit(sc->sc_keymap, keyix);
2188 DPRINTF(sc, ATH_DEBUG_KEYCACHE, "%s: key %u\n",
2190 *txkeyix = *rxkeyix = keyix;
2194 DPRINTF(sc, ATH_DEBUG_KEYCACHE, "%s: out of space\n", __func__);
2200 * Allocate one or more key cache slots for a uniacst key. The
2201 * key itself is needed only to identify the cipher. For hardware
2202 * TKIP with split cipher+MIC keys we allocate two key cache slot
2203 * pairs so that we can setup separate TX and RX MIC keys. Note
2204 * that the MIC key for a TKIP key at slot i is assumed by the
2205 * hardware to be at slot i+64. This limits TKIP keys to the first
2209 ath_key_alloc(struct ieee80211vap *vap, struct ieee80211_key *k,
2210 ieee80211_keyix *keyix, ieee80211_keyix *rxkeyix)
2212 struct ath_softc *sc = vap->iv_ic->ic_ifp->if_softc;
2215 * Group key allocation must be handled specially for
2216 * parts that do not support multicast key cache search
2217 * functionality. For those parts the key id must match
2218 * the h/w key index so lookups find the right key. On
2219 * parts w/ the key search facility we install the sender's
2220 * mac address (with the high bit set) and let the hardware
2221 * find the key w/o using the key id. This is preferred as
2222 * it permits us to support multiple users for adhoc and/or
2223 * multi-station operation.
2225 if (k->wk_keyix != IEEE80211_KEYIX_NONE) {
2227 * Only global keys should have key index assigned.
2229 if (!(&vap->iv_nw_keys[0] <= k &&
2230 k < &vap->iv_nw_keys[IEEE80211_WEP_NKID])) {
2231 /* should not happen */
2232 DPRINTF(sc, ATH_DEBUG_KEYCACHE,
2233 "%s: bogus group key\n", __func__);
2236 if (vap->iv_opmode != IEEE80211_M_HOSTAP ||
2237 !(k->wk_flags & IEEE80211_KEY_GROUP) ||
2240 * XXX we pre-allocate the global keys so
2241 * have no way to check if they've already
2244 *keyix = *rxkeyix = k - vap->iv_nw_keys;
2248 * Group key and device supports multicast key search.
2250 k->wk_keyix = IEEE80211_KEYIX_NONE;
2254 * We allocate two pair for TKIP when using the h/w to do
2255 * the MIC. For everything else, including software crypto,
2256 * we allocate a single entry. Note that s/w crypto requires
2257 * a pass-through slot on the 5211 and 5212. The 5210 does
2258 * not support pass-through cache entries and we map all
2259 * those requests to slot 0.
2261 if (k->wk_flags & IEEE80211_KEY_SWCRYPT) {
2262 return key_alloc_single(sc, keyix, rxkeyix);
2263 } else if (k->wk_cipher->ic_cipher == IEEE80211_CIPHER_TKIP &&
2264 (k->wk_flags & IEEE80211_KEY_SWMIC) == 0) {
2265 if (sc->sc_splitmic)
2266 return key_alloc_2pair(sc, keyix, rxkeyix);
2268 return key_alloc_pair(sc, keyix, rxkeyix);
2270 return key_alloc_single(sc, keyix, rxkeyix);
2275 * Delete an entry in the key cache allocated by ath_key_alloc.
2278 ath_key_delete(struct ieee80211vap *vap, const struct ieee80211_key *k)
2280 struct ath_softc *sc = vap->iv_ic->ic_ifp->if_softc;
2281 struct ath_hal *ah = sc->sc_ah;
2282 const struct ieee80211_cipher *cip = k->wk_cipher;
2283 u_int keyix = k->wk_keyix;
2285 DPRINTF(sc, ATH_DEBUG_KEYCACHE, "%s: delete key %u\n", __func__, keyix);
2287 ath_hal_keyreset(ah, keyix);
2289 * Handle split tx/rx keying required for TKIP with h/w MIC.
2291 if (cip->ic_cipher == IEEE80211_CIPHER_TKIP &&
2292 (k->wk_flags & IEEE80211_KEY_SWMIC) == 0 && sc->sc_splitmic)
2293 ath_hal_keyreset(ah, keyix+32); /* RX key */
2294 if (keyix >= IEEE80211_WEP_NKID) {
2296 * Don't touch keymap entries for global keys so
2297 * they are never considered for dynamic allocation.
2299 clrbit(sc->sc_keymap, keyix);
2300 if (cip->ic_cipher == IEEE80211_CIPHER_TKIP &&
2301 (k->wk_flags & IEEE80211_KEY_SWMIC) == 0) {
2302 clrbit(sc->sc_keymap, keyix+64); /* TX key MIC */
2303 if (sc->sc_splitmic) {
2304 /* +32 for RX key, +32+64 for RX key MIC */
2305 clrbit(sc->sc_keymap, keyix+32);
2306 clrbit(sc->sc_keymap, keyix+32+64);
2314 * Set the key cache contents for the specified key. Key cache
2315 * slot(s) must already have been allocated by ath_key_alloc.
2318 ath_key_set(struct ieee80211vap *vap, const struct ieee80211_key *k,
2319 const u_int8_t mac[IEEE80211_ADDR_LEN])
2321 struct ath_softc *sc = vap->iv_ic->ic_ifp->if_softc;
2323 return ath_keyset(sc, k, vap->iv_bss);
2327 * Block/unblock tx+rx processing while a key change is done.
2328 * We assume the caller serializes key management operations
2329 * so we only need to worry about synchronization with other
2330 * uses that originate in the driver.
2333 ath_key_update_begin(struct ieee80211vap *vap)
2335 struct ifnet *ifp = vap->iv_ic->ic_ifp;
2336 struct ath_softc *sc = ifp->if_softc;
2338 DPRINTF(sc, ATH_DEBUG_KEYCACHE, "%s:\n", __func__);
2339 taskqueue_block(sc->sc_tq);
2343 ath_key_update_end(struct ieee80211vap *vap)
2345 struct ifnet *ifp = vap->iv_ic->ic_ifp;
2346 struct ath_softc *sc = ifp->if_softc;
2348 DPRINTF(sc, ATH_DEBUG_KEYCACHE, "%s:\n", __func__);
2349 taskqueue_unblock(sc->sc_tq);
2353 * Calculate the receive filter according to the
2354 * operating mode and state:
2356 * o always accept unicast, broadcast, and multicast traffic
2357 * o accept PHY error frames when hardware doesn't have MIB support
2358 * to count and we need them for ANI (sta mode only until recently)
2359 * and we are not scanning (ANI is disabled)
2360 * NB: older hal's add rx filter bits out of sight and we need to
2361 * blindly preserve them
2362 * o probe request frames are accepted only when operating in
2363 * hostap, adhoc, mesh, or monitor modes
2364 * o enable promiscuous mode
2365 * - when in monitor mode
2366 * - if interface marked PROMISC (assumes bridge setting is filtered)
2368 * - when operating in station mode for collecting rssi data when
2369 * the station is otherwise quiet, or
2370 * - when operating in adhoc mode so the 802.11 layer creates
2371 * node table entries for peers,
2373 * - when doing s/w beacon miss (e.g. for ap+sta)
2374 * - when operating in ap mode in 11g to detect overlapping bss that
2375 * require protection
2376 * - when operating in mesh mode to detect neighbors
2377 * o accept control frames:
2378 * - when in monitor mode
2379 * XXX BAR frames for 11n
2380 * XXX HT protection for 11n
2383 ath_calcrxfilter(struct ath_softc *sc)
2385 struct ifnet *ifp = sc->sc_ifp;
2386 struct ieee80211com *ic = ifp->if_l2com;
2389 rfilt = HAL_RX_FILTER_UCAST | HAL_RX_FILTER_BCAST | HAL_RX_FILTER_MCAST;
2390 if (!sc->sc_needmib && !sc->sc_scanning)
2391 rfilt |= HAL_RX_FILTER_PHYERR;
2392 if (ic->ic_opmode != IEEE80211_M_STA)
2393 rfilt |= HAL_RX_FILTER_PROBEREQ;
2394 /* XXX ic->ic_monvaps != 0? */
2395 if (ic->ic_opmode == IEEE80211_M_MONITOR || (ifp->if_flags & IFF_PROMISC))
2396 rfilt |= HAL_RX_FILTER_PROM;
2397 if (ic->ic_opmode == IEEE80211_M_STA ||
2398 ic->ic_opmode == IEEE80211_M_IBSS ||
2399 sc->sc_swbmiss || sc->sc_scanning)
2400 rfilt |= HAL_RX_FILTER_BEACON;
2402 * NB: We don't recalculate the rx filter when
2403 * ic_protmode changes; otherwise we could do
2404 * this only when ic_protmode != NONE.
2406 if (ic->ic_opmode == IEEE80211_M_HOSTAP &&
2407 IEEE80211_IS_CHAN_ANYG(ic->ic_curchan))
2408 rfilt |= HAL_RX_FILTER_BEACON;
2409 if (sc->sc_nmeshvaps) {
2410 rfilt |= HAL_RX_FILTER_BEACON;
2411 if (sc->sc_hasbmatch)
2412 rfilt |= HAL_RX_FILTER_BSSID;
2414 rfilt |= HAL_RX_FILTER_PROM;
2416 if (ic->ic_opmode == IEEE80211_M_MONITOR)
2417 rfilt |= HAL_RX_FILTER_CONTROL;
2418 DPRINTF(sc, ATH_DEBUG_MODE, "%s: RX filter 0x%x, %s if_flags 0x%x\n",
2419 __func__, rfilt, ieee80211_opmode_name[ic->ic_opmode], ifp->if_flags);
2424 ath_update_promisc(struct ifnet *ifp)
2426 struct ath_softc *sc = ifp->if_softc;
2429 /* configure rx filter */
2430 rfilt = ath_calcrxfilter(sc);
2431 ath_hal_setrxfilter(sc->sc_ah, rfilt);
2433 DPRINTF(sc, ATH_DEBUG_MODE, "%s: RX filter 0x%x\n", __func__, rfilt);
2437 ath_update_mcast(struct ifnet *ifp)
2439 struct ath_softc *sc = ifp->if_softc;
2442 /* calculate and install multicast filter */
2443 if ((ifp->if_flags & IFF_ALLMULTI) == 0) {
2444 struct ifmultiaddr *ifma;
2446 * Merge multicast addresses to form the hardware filter.
2448 mfilt[0] = mfilt[1] = 0;
2450 if_maddr_rlock(ifp); /* XXX need some fiddling to remove? */
2452 TAILQ_FOREACH(ifma, &ifp->if_multiaddrs, ifma_link) {
2457 /* calculate XOR of eight 6bit values */
2458 dl = LLADDR((struct sockaddr_dl *) ifma->ifma_addr);
2459 val = LE_READ_4(dl + 0);
2460 pos = (val >> 18) ^ (val >> 12) ^ (val >> 6) ^ val;
2461 val = LE_READ_4(dl + 3);
2462 pos ^= (val >> 18) ^ (val >> 12) ^ (val >> 6) ^ val;
2464 mfilt[pos / 32] |= (1 << (pos % 32));
2467 if_maddr_runlock(ifp);
2470 mfilt[0] = mfilt[1] = ~0;
2471 ath_hal_setmcastfilter(sc->sc_ah, mfilt[0], mfilt[1]);
2472 DPRINTF(sc, ATH_DEBUG_MODE, "%s: MC filter %08x:%08x\n",
2473 __func__, mfilt[0], mfilt[1]);
2477 ath_mode_init(struct ath_softc *sc)
2479 struct ifnet *ifp = sc->sc_ifp;
2480 struct ath_hal *ah = sc->sc_ah;
2483 /* configure rx filter */
2484 rfilt = ath_calcrxfilter(sc);
2485 ath_hal_setrxfilter(ah, rfilt);
2487 /* configure operational mode */
2488 ath_hal_setopmode(ah);
2490 /* handle any link-level address change */
2491 ath_hal_setmac(ah, IF_LLADDR(ifp));
2493 /* calculate and install multicast filter */
2494 ath_update_mcast(ifp);
2498 * Set the slot time based on the current setting.
2501 ath_setslottime(struct ath_softc *sc)
2503 struct ieee80211com *ic = sc->sc_ifp->if_l2com;
2504 struct ath_hal *ah = sc->sc_ah;
2507 if (IEEE80211_IS_CHAN_HALF(ic->ic_curchan))
2509 else if (IEEE80211_IS_CHAN_QUARTER(ic->ic_curchan))
2511 else if (IEEE80211_IS_CHAN_ANYG(ic->ic_curchan)) {
2512 /* honor short/long slot time only in 11g */
2513 /* XXX shouldn't honor on pure g or turbo g channel */
2514 if (ic->ic_flags & IEEE80211_F_SHSLOT)
2515 usec = HAL_SLOT_TIME_9;
2517 usec = HAL_SLOT_TIME_20;
2519 usec = HAL_SLOT_TIME_9;
2521 DPRINTF(sc, ATH_DEBUG_RESET,
2522 "%s: chan %u MHz flags 0x%x %s slot, %u usec\n",
2523 __func__, ic->ic_curchan->ic_freq, ic->ic_curchan->ic_flags,
2524 ic->ic_flags & IEEE80211_F_SHSLOT ? "short" : "long", usec);
2526 ath_hal_setslottime(ah, usec);
2527 sc->sc_updateslot = OK;
2531 * Callback from the 802.11 layer to update the
2532 * slot time based on the current setting.
2535 ath_updateslot(struct ifnet *ifp)
2537 struct ath_softc *sc = ifp->if_softc;
2538 struct ieee80211com *ic = ifp->if_l2com;
2541 * When not coordinating the BSS, change the hardware
2542 * immediately. For other operation we defer the change
2543 * until beacon updates have propagated to the stations.
2545 if (ic->ic_opmode == IEEE80211_M_HOSTAP ||
2546 ic->ic_opmode == IEEE80211_M_MBSS)
2547 sc->sc_updateslot = UPDATE;
2549 ath_setslottime(sc);
2553 * Setup a h/w transmit queue for beacons.
2556 ath_beaconq_setup(struct ath_hal *ah)
2560 memset(&qi, 0, sizeof(qi));
2561 qi.tqi_aifs = HAL_TXQ_USEDEFAULT;
2562 qi.tqi_cwmin = HAL_TXQ_USEDEFAULT;
2563 qi.tqi_cwmax = HAL_TXQ_USEDEFAULT;
2564 /* NB: for dynamic turbo, don't enable any other interrupts */
2565 qi.tqi_qflags = HAL_TXQ_TXDESCINT_ENABLE;
2566 return ath_hal_setuptxqueue(ah, HAL_TX_QUEUE_BEACON, &qi);
2570 * Setup the transmit queue parameters for the beacon queue.
2573 ath_beaconq_config(struct ath_softc *sc)
2575 #define ATH_EXPONENT_TO_VALUE(v) ((1<<(v))-1)
2576 struct ieee80211com *ic = sc->sc_ifp->if_l2com;
2577 struct ath_hal *ah = sc->sc_ah;
2580 ath_hal_gettxqueueprops(ah, sc->sc_bhalq, &qi);
2581 if (ic->ic_opmode == IEEE80211_M_HOSTAP ||
2582 ic->ic_opmode == IEEE80211_M_MBSS) {
2584 * Always burst out beacon and CAB traffic.
2586 qi.tqi_aifs = ATH_BEACON_AIFS_DEFAULT;
2587 qi.tqi_cwmin = ATH_BEACON_CWMIN_DEFAULT;
2588 qi.tqi_cwmax = ATH_BEACON_CWMAX_DEFAULT;
2590 struct wmeParams *wmep =
2591 &ic->ic_wme.wme_chanParams.cap_wmeParams[WME_AC_BE];
2593 * Adhoc mode; important thing is to use 2x cwmin.
2595 qi.tqi_aifs = wmep->wmep_aifsn;
2596 qi.tqi_cwmin = 2*ATH_EXPONENT_TO_VALUE(wmep->wmep_logcwmin);
2597 qi.tqi_cwmax = ATH_EXPONENT_TO_VALUE(wmep->wmep_logcwmax);
2600 if (!ath_hal_settxqueueprops(ah, sc->sc_bhalq, &qi)) {
2601 device_printf(sc->sc_dev, "unable to update parameters for "
2602 "beacon hardware queue!\n");
2605 ath_hal_resettxqueue(ah, sc->sc_bhalq); /* push to h/w */
2608 #undef ATH_EXPONENT_TO_VALUE
2612 * Allocate and setup an initial beacon frame.
2615 ath_beacon_alloc(struct ath_softc *sc, struct ieee80211_node *ni)
2617 struct ieee80211vap *vap = ni->ni_vap;
2618 struct ath_vap *avp = ATH_VAP(vap);
2624 if (bf->bf_m != NULL) {
2625 bus_dmamap_unload(sc->sc_dmat, bf->bf_dmamap);
2629 if (bf->bf_node != NULL) {
2630 ieee80211_free_node(bf->bf_node);
2635 * NB: the beacon data buffer must be 32-bit aligned;
2636 * we assume the mbuf routines will return us something
2637 * with this alignment (perhaps should assert).
2639 m = ieee80211_beacon_alloc(ni, &avp->av_boff);
2641 device_printf(sc->sc_dev, "%s: cannot get mbuf\n", __func__);
2642 sc->sc_stats.ast_be_nombuf++;
2645 error = bus_dmamap_load_mbuf_segment(sc->sc_dmat, bf->bf_dmamap, m,
2646 bf->bf_segs, 1, &bf->bf_nseg,
2649 device_printf(sc->sc_dev,
2650 "%s: cannot map mbuf, bus_dmamap_load_mbuf_segment returns %d\n",
2657 * Calculate a TSF adjustment factor required for staggered
2658 * beacons. Note that we assume the format of the beacon
2659 * frame leaves the tstamp field immediately following the
2662 if (sc->sc_stagbeacons && avp->av_bslot > 0) {
2664 struct ieee80211_frame *wh;
2667 * The beacon interval is in TU's; the TSF is in usecs.
2668 * We figure out how many TU's to add to align the timestamp
2669 * then convert to TSF units and handle byte swapping before
2670 * inserting it in the frame. The hardware will then add this
2671 * each time a beacon frame is sent. Note that we align vap's
2672 * 1..N and leave vap 0 untouched. This means vap 0 has a
2673 * timestamp in one beacon interval while the others get a
2674 * timstamp aligned to the next interval.
2676 tsfadjust = ni->ni_intval *
2677 (ATH_BCBUF - avp->av_bslot) / ATH_BCBUF;
2678 tsfadjust = htole64(tsfadjust << 10); /* TU -> TSF */
2680 DPRINTF(sc, ATH_DEBUG_BEACON,
2681 "%s: %s beacons bslot %d intval %u tsfadjust %llu\n",
2682 __func__, sc->sc_stagbeacons ? "stagger" : "burst",
2683 avp->av_bslot, ni->ni_intval,
2684 (long long unsigned) le64toh(tsfadjust));
2686 wh = mtod(m, struct ieee80211_frame *);
2687 memcpy(&wh[1], &tsfadjust, sizeof(tsfadjust));
2690 bf->bf_node = ieee80211_ref_node(ni);
2696 * Setup the beacon frame for transmit.
2699 ath_beacon_setup(struct ath_softc *sc, struct ath_buf *bf)
2701 #define USE_SHPREAMBLE(_ic) \
2702 (((_ic)->ic_flags & (IEEE80211_F_SHPREAMBLE | IEEE80211_F_USEBARKER))\
2703 == IEEE80211_F_SHPREAMBLE)
2704 struct ieee80211_node *ni = bf->bf_node;
2705 struct ieee80211com *ic = ni->ni_ic;
2706 struct mbuf *m = bf->bf_m;
2707 struct ath_hal *ah = sc->sc_ah;
2708 struct ath_desc *ds;
2710 const HAL_RATE_TABLE *rt;
2713 DPRINTF(sc, ATH_DEBUG_BEACON_PROC, "%s: m %p len %u\n",
2714 __func__, m, m->m_len);
2716 /* setup descriptors */
2719 flags = HAL_TXDESC_NOACK;
2720 if (ic->ic_opmode == IEEE80211_M_IBSS && sc->sc_hasveol) {
2721 ds->ds_link = bf->bf_daddr; /* self-linked */
2722 flags |= HAL_TXDESC_VEOL;
2724 * Let hardware handle antenna switching.
2726 antenna = sc->sc_txantenna;
2730 * Switch antenna every 4 beacons.
2731 * XXX assumes two antenna
2733 if (sc->sc_txantenna != 0)
2734 antenna = sc->sc_txantenna;
2735 else if (sc->sc_stagbeacons && sc->sc_nbcnvaps != 0)
2736 antenna = ((sc->sc_stats.ast_be_xmit / sc->sc_nbcnvaps) & 4 ? 2 : 1);
2738 antenna = (sc->sc_stats.ast_be_xmit & 4 ? 2 : 1);
2741 KASSERT(bf->bf_nseg == 1,
2742 ("multi-segment beacon frame; nseg %u", bf->bf_nseg));
2743 ds->ds_data = bf->bf_segs[0].ds_addr;
2745 * Calculate rate code.
2746 * XXX everything at min xmit rate
2749 rt = sc->sc_currates;
2750 rate = rt->info[rix].rateCode;
2751 if (USE_SHPREAMBLE(ic))
2752 rate |= rt->info[rix].shortPreamble;
2753 ath_hal_setuptxdesc(ah, ds
2754 , m->m_len + IEEE80211_CRC_LEN /* frame length */
2755 , sizeof(struct ieee80211_frame)/* header length */
2756 , HAL_PKT_TYPE_BEACON /* Atheros packet type */
2757 , ni->ni_txpower /* txpower XXX */
2758 , rate, 1 /* series 0 rate/tries */
2759 , HAL_TXKEYIX_INVALID /* no encryption */
2760 , antenna /* antenna mode */
2761 , flags /* no ack, veol for beacons */
2762 , 0 /* rts/cts rate */
2763 , 0 /* rts/cts duration */
2765 /* NB: beacon's BufLen must be a multiple of 4 bytes */
2766 ath_hal_filltxdesc(ah, ds
2767 , roundup(m->m_len, 4) /* buffer length */
2768 , AH_TRUE /* first segment */
2769 , AH_TRUE /* last segment */
2770 , ds /* first descriptor */
2775 #undef USE_SHPREAMBLE
2779 ath_beacon_update(struct ieee80211vap *vap, int item)
2781 struct ieee80211_beacon_offsets *bo = &ATH_VAP(vap)->av_boff;
2783 setbit(bo->bo_flags, item);
2787 * Append the contents of src to dst; both queues
2788 * are assumed to be locked.
2791 ath_txqmove(struct ath_txq *dst, struct ath_txq *src)
2793 STAILQ_CONCAT(&dst->axq_q, &src->axq_q);
2795 dst->axq_link = src->axq_link;
2796 src->axq_link = NULL;
2797 dst->axq_depth += src->axq_depth;
2802 * Transmit a beacon frame at SWBA. Dynamic updates to the
2803 * frame contents are done as needed and the slot time is
2804 * also adjusted based on current state.
2807 ath_beacon_proc(void *arg, int pending)
2809 struct ath_softc *sc = arg;
2810 struct ath_hal *ah = sc->sc_ah;
2811 struct ieee80211vap *vap;
2816 DPRINTF(sc, ATH_DEBUG_BEACON_PROC, "%s: pending %u\n",
2819 * Check if the previous beacon has gone out. If
2820 * not don't try to post another, skip this period
2821 * and wait for the next. Missed beacons indicate
2822 * a problem and should not occur. If we miss too
2823 * many consecutive beacons reset the device.
2825 if (ath_hal_numtxpending(ah, sc->sc_bhalq) != 0) {
2826 sc->sc_bmisscount++;
2827 DPRINTF(sc, ATH_DEBUG_BEACON,
2828 "%s: missed %u consecutive beacons\n",
2829 __func__, sc->sc_bmisscount);
2830 if (sc->sc_bmisscount >= ath_bstuck_threshold)
2831 taskqueue_enqueue(sc->sc_tq, &sc->sc_bstucktask);
2834 if (sc->sc_bmisscount != 0) {
2835 DPRINTF(sc, ATH_DEBUG_BEACON,
2836 "%s: resume beacon xmit after %u misses\n",
2837 __func__, sc->sc_bmisscount);
2838 sc->sc_bmisscount = 0;
2842 * Stop any current dma before messing with the beacon linkages.
2844 if (!ath_hal_stoptxdma(ah, sc->sc_bhalq)) {
2845 DPRINTF(sc, ATH_DEBUG_ANY,
2846 "%s: beacon queue %u did not stop?\n",
2847 __func__, sc->sc_bhalq);
2850 if (sc->sc_stagbeacons) { /* staggered beacons */
2851 struct ieee80211com *ic = sc->sc_ifp->if_l2com;
2854 tsftu = ath_hal_gettsf32(ah) >> 10;
2856 slot = ((tsftu % ic->ic_lintval) * ATH_BCBUF) / ic->ic_lintval;
2857 vap = sc->sc_bslot[(slot+1) % ATH_BCBUF];
2859 if (vap != NULL && vap->iv_state >= IEEE80211_S_RUN) {
2860 bf = ath_beacon_generate(sc, vap);
2862 bfaddr = bf->bf_daddr;
2864 } else { /* burst'd beacons */
2865 uint32_t *bflink = &bfaddr;
2867 for (slot = 0; slot < ATH_BCBUF; slot++) {
2868 vap = sc->sc_bslot[slot];
2869 if (vap != NULL && vap->iv_state >= IEEE80211_S_RUN) {
2870 bf = ath_beacon_generate(sc, vap);
2872 *bflink = bf->bf_daddr;
2873 bflink = &bf->bf_desc->ds_link;
2877 *bflink = 0; /* terminate list */
2881 * Handle slot time change when a non-ERP station joins/leaves
2882 * an 11g network. The 802.11 layer notifies us via callback,
2883 * we mark updateslot, then wait one beacon before effecting
2884 * the change. This gives associated stations at least one
2885 * beacon interval to note the state change.
2888 if (sc->sc_updateslot == UPDATE) {
2889 sc->sc_updateslot = COMMIT; /* commit next beacon */
2890 sc->sc_slotupdate = slot;
2891 } else if (sc->sc_updateslot == COMMIT && sc->sc_slotupdate == slot)
2892 ath_setslottime(sc); /* commit change to h/w */
2895 * Check recent per-antenna transmit statistics and flip
2896 * the default antenna if noticeably more frames went out
2897 * on the non-default antenna.
2898 * XXX assumes 2 anntenae
2900 if (!sc->sc_diversity && (!sc->sc_stagbeacons || slot == 0)) {
2901 otherant = sc->sc_defant & 1 ? 2 : 1;
2902 if (sc->sc_ant_tx[otherant] > sc->sc_ant_tx[sc->sc_defant] + 2)
2903 ath_setdefantenna(sc, otherant);
2904 sc->sc_ant_tx[1] = sc->sc_ant_tx[2] = 0;
2908 /* NB: cabq traffic should already be queued and primed */
2909 ath_hal_puttxbuf(ah, sc->sc_bhalq, bfaddr);
2910 sc->sc_stats.ast_be_xmit++;
2911 ath_hal_txstart(ah, sc->sc_bhalq);
2913 /* else no beacon will be generated */
2916 static struct ath_buf *
2917 ath_beacon_generate(struct ath_softc *sc, struct ieee80211vap *vap)
2919 struct ath_vap *avp = ATH_VAP(vap);
2920 struct ath_txq *cabq = sc->sc_cabq;
2925 KASSERT(vap->iv_state >= IEEE80211_S_RUN,
2926 ("not running, state %d", vap->iv_state));
2927 KASSERT(avp->av_bcbuf != NULL, ("no beacon buffer"));
2930 * Update dynamic beacon contents. If this returns
2931 * non-zero then we need to remap the memory because
2932 * the beacon frame changed size (probably because
2933 * of the TIM bitmap).
2937 nmcastq = avp->av_mcastq.axq_depth;
2938 if (ieee80211_beacon_update(bf->bf_node, &avp->av_boff, m, nmcastq)) {
2939 /* XXX too conservative? */
2940 bus_dmamap_unload(sc->sc_dmat, bf->bf_dmamap);
2941 error = bus_dmamap_load_mbuf_segment(sc->sc_dmat, bf->bf_dmamap, m,
2942 bf->bf_segs, 1, &bf->bf_nseg,
2945 if_printf(vap->iv_ifp,
2946 "%s: bus_dmamap_load_mbuf_segment failed, error %u\n",
2951 if ((avp->av_boff.bo_tim[4] & 1) && cabq->axq_depth) {
2952 DPRINTF(sc, ATH_DEBUG_BEACON,
2953 "%s: cabq did not drain, mcastq %u cabq %u\n",
2954 __func__, nmcastq, cabq->axq_depth);
2955 sc->sc_stats.ast_cabq_busy++;
2956 if (sc->sc_nvaps > 1 && sc->sc_stagbeacons) {
2958 * CABQ traffic from a previous vap is still pending.
2959 * We must drain the q before this beacon frame goes
2960 * out as otherwise this vap's stations will get cab
2961 * frames from a different vap.
2962 * XXX could be slow causing us to miss DBA
2964 ath_tx_draintxq(sc, cabq);
2967 ath_beacon_setup(sc, bf);
2968 bus_dmamap_sync(sc->sc_dmat, bf->bf_dmamap, BUS_DMASYNC_PREWRITE);
2971 * Enable the CAB queue before the beacon queue to
2972 * insure cab frames are triggered by this beacon.
2974 if (avp->av_boff.bo_tim[4] & 1) {
2975 struct ath_hal *ah = sc->sc_ah;
2977 /* NB: only at DTIM */
2979 struct ath_buf *bfm;
2983 * Move frames from the s/w mcast q to the h/w cab q.
2986 bfm = STAILQ_FIRST(&avp->av_mcastq.axq_q);
2987 qbusy = ath_hal_txqenabled(ah, cabq->axq_qnum);
2989 if (cabq->axq_link != NULL) {
2991 *cabq->axq_link = bfm->bf_daddr;
2992 cabq->axq_flags |= ATH_TXQ_PUTPENDING;
2995 ath_hal_puttxbuf(ah, cabq->axq_qnum,
2999 if (cabq->axq_link != NULL) {
3001 *cabq->axq_link = bfm->bf_daddr;
3003 cabq->axq_flags |= ATH_TXQ_PUTPENDING;
3005 ath_txqmove(cabq, &avp->av_mcastq);
3007 sc->sc_stats.ast_cabq_xmit += nmcastq;
3009 /* NB: gated by beacon so safe to start here */
3010 ath_hal_txstart(ah, cabq->axq_qnum);
3016 ath_beacon_start_adhoc(struct ath_softc *sc, struct ieee80211vap *vap)
3018 struct ath_vap *avp = ATH_VAP(vap);
3019 struct ath_hal *ah = sc->sc_ah;
3024 KASSERT(avp->av_bcbuf != NULL, ("no beacon buffer"));
3027 * Update dynamic beacon contents. If this returns
3028 * non-zero then we need to remap the memory because
3029 * the beacon frame changed size (probably because
3030 * of the TIM bitmap).
3034 if (ieee80211_beacon_update(bf->bf_node, &avp->av_boff, m, 0)) {
3035 /* XXX too conservative? */
3036 bus_dmamap_unload(sc->sc_dmat, bf->bf_dmamap);
3037 error = bus_dmamap_load_mbuf_segment(sc->sc_dmat, bf->bf_dmamap, m,
3038 bf->bf_segs, 1, &bf->bf_nseg,
3041 if_printf(vap->iv_ifp,
3042 "%s: bus_dmamap_load_mbuf_segment failed, error %u\n",
3047 ath_beacon_setup(sc, bf);
3048 bus_dmamap_sync(sc->sc_dmat, bf->bf_dmamap, BUS_DMASYNC_PREWRITE);
3050 /* NB: caller is known to have already stopped tx dma */
3051 ath_hal_puttxbuf(ah, sc->sc_bhalq, bf->bf_daddr);
3052 ath_hal_txstart(ah, sc->sc_bhalq);
3056 * Reset the hardware after detecting beacons have stopped.
3059 ath_bstuck_task(void *arg, int pending)
3061 struct ath_softc *sc = arg;
3062 struct ifnet *ifp = sc->sc_ifp;
3064 wlan_serialize_enter();
3065 if_printf(ifp, "stuck beacon; resetting (bmiss count %u)\n",
3067 sc->sc_stats.ast_bstuck++;
3069 wlan_serialize_exit();
3073 * Reclaim beacon resources and return buffer to the pool.
3076 ath_beacon_return(struct ath_softc *sc, struct ath_buf *bf)
3079 if (bf->bf_m != NULL) {
3080 bus_dmamap_unload(sc->sc_dmat, bf->bf_dmamap);
3084 if (bf->bf_node != NULL) {
3085 ieee80211_free_node(bf->bf_node);
3088 STAILQ_INSERT_TAIL(&sc->sc_bbuf, bf, bf_list);
3092 * Reclaim beacon resources.
3095 ath_beacon_free(struct ath_softc *sc)
3099 STAILQ_FOREACH(bf, &sc->sc_bbuf, bf_list) {
3100 if (bf->bf_m != NULL) {
3101 bus_dmamap_unload(sc->sc_dmat, bf->bf_dmamap);
3105 if (bf->bf_node != NULL) {
3106 ieee80211_free_node(bf->bf_node);
3113 * Configure the beacon and sleep timers.
3115 * When operating as an AP this resets the TSF and sets
3116 * up the hardware to notify us when we need to issue beacons.
3118 * When operating in station mode this sets up the beacon
3119 * timers according to the timestamp of the last received
3120 * beacon and the current TSF, configures PCF and DTIM
3121 * handling, programs the sleep registers so the hardware
3122 * will wakeup in time to receive beacons, and configures
3123 * the beacon miss handling so we'll receive a BMISS
3124 * interrupt when we stop seeing beacons from the AP
3125 * we've associated with.
3128 ath_beacon_config(struct ath_softc *sc, struct ieee80211vap *vap)
3130 #define TSF_TO_TU(_h,_l) \
3131 ((((u_int32_t)(_h)) << 22) | (((u_int32_t)(_l)) >> 10))
3133 struct ath_hal *ah = sc->sc_ah;
3134 struct ieee80211com *ic = sc->sc_ifp->if_l2com;
3135 struct ieee80211_node *ni;
3136 u_int32_t nexttbtt, intval, tsftu;
3140 vap = TAILQ_FIRST(&ic->ic_vaps); /* XXX */
3143 /* extract tstamp from last beacon and convert to TU */
3144 nexttbtt = TSF_TO_TU(LE_READ_4(ni->ni_tstamp.data + 4),
3145 LE_READ_4(ni->ni_tstamp.data));
3146 if (ic->ic_opmode == IEEE80211_M_HOSTAP ||
3147 ic->ic_opmode == IEEE80211_M_MBSS) {
3149 * For multi-bss ap/mesh support beacons are either staggered
3150 * evenly over N slots or burst together. For the former
3151 * arrange for the SWBA to be delivered for each slot.
3152 * Slots that are not occupied will generate nothing.
3154 /* NB: the beacon interval is kept internally in TU's */
3155 intval = ni->ni_intval & HAL_BEACON_PERIOD;
3156 if (sc->sc_stagbeacons)
3157 intval /= ATH_BCBUF;
3159 /* NB: the beacon interval is kept internally in TU's */
3160 intval = ni->ni_intval & HAL_BEACON_PERIOD;
3162 if (nexttbtt == 0) /* e.g. for ap mode */
3164 else if (intval) /* NB: can be 0 for monitor mode */
3165 nexttbtt = roundup(nexttbtt, intval);
3166 DPRINTF(sc, ATH_DEBUG_BEACON, "%s: nexttbtt %u intval %u (%u)\n",
3167 __func__, nexttbtt, intval, ni->ni_intval);
3168 if (ic->ic_opmode == IEEE80211_M_STA && !sc->sc_swbmiss) {
3169 HAL_BEACON_STATE bs;
3170 int dtimperiod, dtimcount;
3171 int cfpperiod, cfpcount;
3174 * Setup dtim and cfp parameters according to
3175 * last beacon we received (which may be none).
3177 dtimperiod = ni->ni_dtim_period;
3178 if (dtimperiod <= 0) /* NB: 0 if not known */
3180 dtimcount = ni->ni_dtim_count;
3181 if (dtimcount >= dtimperiod) /* NB: sanity check */
3182 dtimcount = 0; /* XXX? */
3183 cfpperiod = 1; /* NB: no PCF support yet */
3186 * Pull nexttbtt forward to reflect the current
3187 * TSF and calculate dtim+cfp state for the result.
3189 tsf = ath_hal_gettsf64(ah);
3190 tsftu = TSF_TO_TU(tsf>>32, tsf) + FUDGE;
3193 if (--dtimcount < 0) {
3194 dtimcount = dtimperiod - 1;
3196 cfpcount = cfpperiod - 1;
3198 } while (nexttbtt < tsftu);
3199 memset(&bs, 0, sizeof(bs));
3200 bs.bs_intval = intval;
3201 bs.bs_nexttbtt = nexttbtt;
3202 bs.bs_dtimperiod = dtimperiod*intval;
3203 bs.bs_nextdtim = bs.bs_nexttbtt + dtimcount*intval;
3204 bs.bs_cfpperiod = cfpperiod*bs.bs_dtimperiod;
3205 bs.bs_cfpnext = bs.bs_nextdtim + cfpcount*bs.bs_dtimperiod;
3206 bs.bs_cfpmaxduration = 0;
3209 * The 802.11 layer records the offset to the DTIM
3210 * bitmap while receiving beacons; use it here to
3211 * enable h/w detection of our AID being marked in
3212 * the bitmap vector (to indicate frames for us are
3213 * pending at the AP).
3214 * XXX do DTIM handling in s/w to WAR old h/w bugs
3215 * XXX enable based on h/w rev for newer chips
3217 bs.bs_timoffset = ni->ni_timoff;
3220 * Calculate the number of consecutive beacons to miss
3221 * before taking a BMISS interrupt.
3222 * Note that we clamp the result to at most 10 beacons.
3224 bs.bs_bmissthreshold = vap->iv_bmissthreshold;
3225 if (bs.bs_bmissthreshold > 10)
3226 bs.bs_bmissthreshold = 10;
3227 else if (bs.bs_bmissthreshold <= 0)
3228 bs.bs_bmissthreshold = 1;
3231 * Calculate sleep duration. The configuration is
3232 * given in ms. We insure a multiple of the beacon
3233 * period is used. Also, if the sleep duration is
3234 * greater than the DTIM period then it makes senses
3235 * to make it a multiple of that.
3237 * XXX fixed at 100ms
3239 bs.bs_sleepduration =
3240 roundup(IEEE80211_MS_TO_TU(100), bs.bs_intval);
3241 if (bs.bs_sleepduration > bs.bs_dtimperiod)
3242 bs.bs_sleepduration = roundup(bs.bs_sleepduration, bs.bs_dtimperiod);
3244 DPRINTF(sc, ATH_DEBUG_BEACON,
3245 "%s: tsf %ju tsf:tu %u intval %u nexttbtt %u dtim %u nextdtim %u bmiss %u sleep %u cfp:period %u maxdur %u next %u timoffset %u\n"
3252 , bs.bs_bmissthreshold
3253 , bs.bs_sleepduration
3255 , bs.bs_cfpmaxduration
3259 ath_hal_intrset(ah, 0);
3260 ath_hal_beacontimers(ah, &bs);
3261 sc->sc_imask |= HAL_INT_BMISS;
3262 ath_hal_intrset(ah, sc->sc_imask);
3264 ath_hal_intrset(ah, 0);
3265 if (nexttbtt == intval)
3266 intval |= HAL_BEACON_RESET_TSF;
3267 if (ic->ic_opmode == IEEE80211_M_IBSS) {
3269 * In IBSS mode enable the beacon timers but only
3270 * enable SWBA interrupts if we need to manually
3271 * prepare beacon frames. Otherwise we use a
3272 * self-linked tx descriptor and let the hardware
3275 intval |= HAL_BEACON_ENA;
3276 if (!sc->sc_hasveol)
3277 sc->sc_imask |= HAL_INT_SWBA;
3278 if ((intval & HAL_BEACON_RESET_TSF) == 0) {
3280 * Pull nexttbtt forward to reflect
3283 tsf = ath_hal_gettsf64(ah);
3284 tsftu = TSF_TO_TU(tsf>>32, tsf) + FUDGE;
3287 } while (nexttbtt < tsftu);
3289 ath_beaconq_config(sc);
3290 } else if (ic->ic_opmode == IEEE80211_M_HOSTAP ||
3291 ic->ic_opmode == IEEE80211_M_MBSS) {
3293 * In AP/mesh mode we enable the beacon timers
3294 * and SWBA interrupts to prepare beacon frames.
3296 intval |= HAL_BEACON_ENA;
3297 sc->sc_imask |= HAL_INT_SWBA; /* beacon prepare */
3298 ath_beaconq_config(sc);
3300 ath_hal_beaconinit(ah, nexttbtt, intval);
3301 sc->sc_bmisscount = 0;
3302 ath_hal_intrset(ah, sc->sc_imask);
3304 * When using a self-linked beacon descriptor in
3305 * ibss mode load it once here.
3307 if (ic->ic_opmode == IEEE80211_M_IBSS && sc->sc_hasveol)
3308 ath_beacon_start_adhoc(sc, vap);
3310 sc->sc_syncbeacon = 0;
3316 ath_load_cb(void *arg, bus_dma_segment_t *segs, int nsegs, int error)
3318 bus_addr_t *paddr = (bus_addr_t*) arg;
3319 KASSERT(error == 0, ("error %u on bus_dma callback", error));
3320 *paddr = segs->ds_addr;
3324 ath_descdma_setup(struct ath_softc *sc,
3325 struct ath_descdma *dd, ath_bufhead *head,
3326 const char *name, int nbuf, int ndesc)
3328 #define DS2PHYS(_dd, _ds) \
3329 ((_dd)->dd_desc_paddr + ((caddr_t)(_ds) - (caddr_t)(_dd)->dd_desc))
3330 struct ifnet *ifp = sc->sc_ifp;
3331 struct ath_desc *ds;
3333 int i, bsize, error;
3335 DPRINTF(sc, ATH_DEBUG_RESET, "%s: %s DMA: %u buffers %u desc/buf\n",
3336 __func__, name, nbuf, ndesc);
3339 dd->dd_desc_len = sizeof(struct ath_desc) * nbuf * ndesc;
3342 * Setup DMA descriptor area.
3344 error = bus_dma_tag_create(dd->dd_dmat, /* parent */
3345 PAGE_SIZE, 0, /* alignment, bounds */
3346 BUS_SPACE_MAXADDR_32BIT, /* lowaddr */
3347 BUS_SPACE_MAXADDR, /* highaddr */
3348 NULL, NULL, /* filter, filterarg */
3349 dd->dd_desc_len, /* maxsize */
3351 dd->dd_desc_len, /* maxsegsize */
3352 BUS_DMA_ALLOCNOW, /* flags */
3355 if_printf(ifp, "cannot allocate %s DMA tag\n", dd->dd_name);
3359 /* allocate descriptors */
3360 error = bus_dmamap_create(dd->dd_dmat, BUS_DMA_NOWAIT, &dd->dd_dmamap);
3362 if_printf(ifp, "unable to create dmamap for %s descriptors, "
3363 "error %u\n", dd->dd_name, error);
3367 error = bus_dmamem_alloc(dd->dd_dmat, (void**) &dd->dd_desc,
3368 BUS_DMA_NOWAIT | BUS_DMA_COHERENT,
3371 if_printf(ifp, "unable to alloc memory for %u %s descriptors, "
3372 "error %u\n", nbuf * ndesc, dd->dd_name, error);
3376 error = bus_dmamap_load(dd->dd_dmat, dd->dd_dmamap,
3377 dd->dd_desc, dd->dd_desc_len,
3378 ath_load_cb, &dd->dd_desc_paddr,
3381 if_printf(ifp, "unable to map %s descriptors, error %u\n",
3382 dd->dd_name, error);
3387 DPRINTF(sc, ATH_DEBUG_RESET, "%s: %s DMA map: %p (%lu) -> %p (%lu)\n",
3388 __func__, dd->dd_name, ds, (u_long) dd->dd_desc_len,
3389 (caddr_t) dd->dd_desc_paddr, /*XXX*/ (u_long) dd->dd_desc_len);
3391 /* allocate rx buffers */
3392 bsize = sizeof(struct ath_buf) * nbuf;
3393 bf = kmalloc(bsize, M_ATHDEV, M_INTWAIT | M_ZERO);
3395 if_printf(ifp, "malloc of %s buffers failed, size %u\n",
3396 dd->dd_name, bsize);
3402 for (i = 0; i < nbuf; i++, bf++, ds += ndesc) {
3404 bf->bf_daddr = DS2PHYS(dd, ds);
3405 error = bus_dmamap_create(sc->sc_dmat, BUS_DMA_NOWAIT,
3408 if_printf(ifp, "unable to create dmamap for %s "
3409 "buffer %u, error %u\n", dd->dd_name, i, error);
3410 ath_descdma_cleanup(sc, dd, head);
3413 STAILQ_INSERT_TAIL(head, bf, bf_list);
3417 bus_dmamap_unload(dd->dd_dmat, dd->dd_dmamap);
3419 bus_dmamem_free(dd->dd_dmat, dd->dd_desc, dd->dd_dmamap);
3421 bus_dmamap_destroy(dd->dd_dmat, dd->dd_dmamap);
3423 bus_dma_tag_destroy(dd->dd_dmat);
3424 memset(dd, 0, sizeof(*dd));
3430 ath_descdma_cleanup(struct ath_softc *sc,
3431 struct ath_descdma *dd, ath_bufhead *head)
3434 struct ieee80211_node *ni;
3436 bus_dmamap_unload(dd->dd_dmat, dd->dd_dmamap);
3437 bus_dmamem_free(dd->dd_dmat, dd->dd_desc, dd->dd_dmamap);
3438 bus_dmamap_destroy(dd->dd_dmat, dd->dd_dmamap);
3439 bus_dma_tag_destroy(dd->dd_dmat);
3441 STAILQ_FOREACH(bf, head, bf_list) {
3446 if (bf->bf_dmamap != NULL) {
3447 bus_dmamap_destroy(sc->sc_dmat, bf->bf_dmamap);
3448 bf->bf_dmamap = NULL;
3454 * Reclaim node reference.
3456 ieee80211_free_node(ni);
3461 kfree(dd->dd_bufptr, M_ATHDEV);
3462 memset(dd, 0, sizeof(*dd));
3466 ath_desc_alloc(struct ath_softc *sc)
3470 error = ath_descdma_setup(sc, &sc->sc_rxdma, &sc->sc_rxbuf,
3471 "rx", ath_rxbuf, 1);
3475 error = ath_descdma_setup(sc, &sc->sc_txdma, &sc->sc_txbuf,
3476 "tx", ath_txbuf, ATH_TXDESC);
3478 ath_descdma_cleanup(sc, &sc->sc_rxdma, &sc->sc_rxbuf);
3482 error = ath_descdma_setup(sc, &sc->sc_bdma, &sc->sc_bbuf,
3483 "beacon", ATH_BCBUF, 1);
3485 ath_descdma_cleanup(sc, &sc->sc_txdma, &sc->sc_txbuf);
3486 ath_descdma_cleanup(sc, &sc->sc_rxdma, &sc->sc_rxbuf);
3493 ath_desc_free(struct ath_softc *sc)
3496 if (sc->sc_bdma.dd_desc_len != 0)
3497 ath_descdma_cleanup(sc, &sc->sc_bdma, &sc->sc_bbuf);
3498 if (sc->sc_txdma.dd_desc_len != 0)
3499 ath_descdma_cleanup(sc, &sc->sc_txdma, &sc->sc_txbuf);
3500 if (sc->sc_rxdma.dd_desc_len != 0)
3501 ath_descdma_cleanup(sc, &sc->sc_rxdma, &sc->sc_rxbuf);
3504 static struct ieee80211_node *
3505 ath_node_alloc(struct ieee80211vap *vap, const uint8_t mac[IEEE80211_ADDR_LEN])
3507 struct ieee80211com *ic = vap->iv_ic;
3508 struct ath_softc *sc = ic->ic_ifp->if_softc;
3509 const size_t space = sizeof(struct ath_node) + sc->sc_rc->arc_space;
3510 struct ath_node *an;
3512 an = kmalloc(space, M_80211_NODE, M_INTWAIT|M_ZERO);
3517 ath_rate_node_init(sc, an);
3519 DPRINTF(sc, ATH_DEBUG_NODE, "%s: an %p\n", __func__, an);
3520 return &an->an_node;
3524 ath_node_free(struct ieee80211_node *ni)
3526 struct ieee80211com *ic = ni->ni_ic;
3527 struct ath_softc *sc = ic->ic_ifp->if_softc;
3529 DPRINTF(sc, ATH_DEBUG_NODE, "%s: ni %p\n", __func__, ni);
3531 ath_rate_node_cleanup(sc, ATH_NODE(ni));
3532 sc->sc_node_free(ni);
3536 ath_node_getsignal(const struct ieee80211_node *ni, int8_t *rssi, int8_t *noise)
3538 struct ieee80211com *ic = ni->ni_ic;
3539 struct ath_softc *sc = ic->ic_ifp->if_softc;
3540 struct ath_hal *ah = sc->sc_ah;
3542 *rssi = ic->ic_node_getrssi(ni);
3543 if (ni->ni_chan != IEEE80211_CHAN_ANYC)
3544 *noise = ath_hal_getchannoise(ah, ni->ni_chan);
3546 *noise = -95; /* nominally correct */
3550 ath_rxbuf_init(struct ath_softc *sc, struct ath_buf *bf)
3552 struct ath_hal *ah = sc->sc_ah;
3555 struct ath_desc *ds;
3560 * NB: by assigning a page to the rx dma buffer we
3561 * implicitly satisfy the Atheros requirement that
3562 * this buffer be cache-line-aligned and sized to be
3563 * multiple of the cache line size. Not doing this
3564 * causes weird stuff to happen (for the 5210 at least).
3566 m = m_getcl(MB_WAIT, MT_DATA, M_PKTHDR);
3568 kprintf("ath_rxbuf_init: no mbuf\n");
3569 DPRINTF(sc, ATH_DEBUG_ANY,
3570 "%s: no mbuf/cluster\n", __func__);
3571 sc->sc_stats.ast_rx_nombuf++;
3574 m->m_pkthdr.len = m->m_len = m->m_ext.ext_size;
3576 error = bus_dmamap_load_mbuf_segment(sc->sc_dmat,
3578 bf->bf_segs, 1, &bf->bf_nseg,
3581 DPRINTF(sc, ATH_DEBUG_ANY,
3582 "%s: bus_dmamap_load_mbuf_segment failed; error %d\n",
3584 sc->sc_stats.ast_rx_busdma++;
3588 KASSERT(bf->bf_nseg == 1,
3589 ("multi-segment packet; nseg %u", bf->bf_nseg));
3592 bus_dmamap_sync(sc->sc_dmat, bf->bf_dmamap, BUS_DMASYNC_PREREAD);
3595 * Setup descriptors. For receive we always terminate
3596 * the descriptor list with a self-linked entry so we'll
3597 * not get overrun under high load (as can happen with a
3598 * 5212 when ANI processing enables PHY error frames).
3600 * To insure the last descriptor is self-linked we create
3601 * each descriptor as self-linked and add it to the end. As
3602 * each additional descriptor is added the previous self-linked
3603 * entry is ``fixed'' naturally. This should be safe even
3604 * if DMA is happening. When processing RX interrupts we
3605 * never remove/process the last, self-linked, entry on the
3606 * descriptor list. This insures the hardware always has
3607 * someplace to write a new frame.
3610 ds->ds_link = bf->bf_daddr; /* link to self */
3611 ds->ds_data = bf->bf_segs[0].ds_addr;
3612 ath_hal_setuprxdesc(ah, ds
3613 , m->m_len /* buffer size */
3617 if (sc->sc_rxlink != NULL)
3618 *sc->sc_rxlink = bf->bf_daddr;
3619 sc->sc_rxlink = &ds->ds_link;
3624 * Extend 15-bit time stamp from rx descriptor to
3625 * a full 64-bit TSF using the specified TSF.
3627 static __inline u_int64_t
3628 ath_extend_tsf(u_int32_t rstamp, u_int64_t tsf)
3630 if ((tsf & 0x7fff) < rstamp)
3632 return ((tsf &~ 0x7fff) | rstamp);
3636 * Intercept management frames to collect beacon rssi data
3637 * and to do ibss merges.
3640 ath_recv_mgmt(struct ieee80211_node *ni, struct mbuf *m,
3641 int subtype, int rssi, int nf)
3643 struct ieee80211vap *vap = ni->ni_vap;
3644 struct ath_softc *sc = vap->iv_ic->ic_ifp->if_softc;
3647 * Call up first so subsequent work can use information
3648 * potentially stored in the node (e.g. for ibss merge).
3650 ATH_VAP(vap)->av_recv_mgmt(ni, m, subtype, rssi, nf);
3652 case IEEE80211_FC0_SUBTYPE_BEACON:
3653 /* update rssi statistics for use by the hal */
3654 ATH_RSSI_LPF(sc->sc_halstats.ns_avgbrssi, rssi);
3655 if (sc->sc_syncbeacon &&
3656 ni == vap->iv_bss && vap->iv_state == IEEE80211_S_RUN) {
3658 * Resync beacon timers using the tsf of the beacon
3659 * frame we just received.
3661 ath_beacon_config(sc, vap);
3664 case IEEE80211_FC0_SUBTYPE_PROBE_RESP:
3665 if (vap->iv_opmode == IEEE80211_M_IBSS &&
3666 vap->iv_state == IEEE80211_S_RUN) {
3667 uint32_t rstamp = sc->sc_lastrs->rs_tstamp;
3668 u_int64_t tsf = ath_extend_tsf(rstamp,
3669 ath_hal_gettsf64(sc->sc_ah));
3671 * Handle ibss merge as needed; check the tsf on the
3672 * frame before attempting the merge. The 802.11 spec
3673 * says the station should change it's bssid to match
3674 * the oldest station with the same ssid, where oldest
3675 * is determined by the tsf. Note that hardware
3676 * reconfiguration happens through callback to
3677 * ath_newstate as the state machine will go from
3678 * RUN -> RUN when this happens.
3680 if (le64toh(ni->ni_tstamp.tsf) >= tsf) {
3681 DPRINTF(sc, ATH_DEBUG_STATE,
3682 "ibss merge, rstamp %u tsf %ju "
3683 "tstamp %ju\n", rstamp, (uintmax_t)tsf,
3684 (uintmax_t)ni->ni_tstamp.tsf);
3685 (void) ieee80211_ibss_merge(ni);
3693 * Set the default antenna.
3696 ath_setdefantenna(struct ath_softc *sc, u_int antenna)
3698 struct ath_hal *ah = sc->sc_ah;
3700 /* XXX block beacon interrupts */
3701 ath_hal_setdefantenna(ah, antenna);
3702 if (sc->sc_defant != antenna)
3703 sc->sc_stats.ast_ant_defswitch++;
3704 sc->sc_defant = antenna;
3705 sc->sc_rxotherant = 0;
3709 ath_rx_tap(struct ifnet *ifp, struct mbuf *m,
3710 const struct ath_rx_status *rs, u_int64_t tsf, int16_t nf)
3712 #define CHAN_HT20 htole32(IEEE80211_CHAN_HT20)
3713 #define CHAN_HT40U htole32(IEEE80211_CHAN_HT40U)
3714 #define CHAN_HT40D htole32(IEEE80211_CHAN_HT40D)
3715 #define CHAN_HT (CHAN_HT20|CHAN_HT40U|CHAN_HT40D)
3716 struct ath_softc *sc = ifp->if_softc;
3717 const HAL_RATE_TABLE *rt;
3720 rt = sc->sc_currates;
3721 KASSERT(rt != NULL, ("no rate table, mode %u", sc->sc_curmode));
3722 rix = rt->rateCodeToIndex[rs->rs_rate];
3723 sc->sc_rx_th.wr_rate = sc->sc_hwmap[rix].ieeerate;
3724 sc->sc_rx_th.wr_flags = sc->sc_hwmap[rix].rxflags;
3725 #ifdef AH_SUPPORT_AR5416
3726 sc->sc_rx_th.wr_chan_flags &= ~CHAN_HT;
3727 if (sc->sc_rx_th.wr_rate & IEEE80211_RATE_MCS) { /* HT rate */
3728 struct ieee80211com *ic = ifp->if_l2com;
3730 if ((rs->rs_flags & HAL_RX_2040) == 0)
3731 sc->sc_rx_th.wr_chan_flags |= CHAN_HT20;
3732 else if (IEEE80211_IS_CHAN_HT40U(ic->ic_curchan))
3733 sc->sc_rx_th.wr_chan_flags |= CHAN_HT40U;
3735 sc->sc_rx_th.wr_chan_flags |= CHAN_HT40D;
3736 if ((rs->rs_flags & HAL_RX_GI) == 0)
3737 sc->sc_rx_th.wr_flags |= IEEE80211_RADIOTAP_F_SHORTGI;
3740 sc->sc_rx_th.wr_tsf = htole64(ath_extend_tsf(rs->rs_tstamp, tsf));
3741 if (rs->rs_status & HAL_RXERR_CRC)
3742 sc->sc_rx_th.wr_flags |= IEEE80211_RADIOTAP_F_BADFCS;
3743 /* XXX propagate other error flags from descriptor */
3744 sc->sc_rx_th.wr_antnoise = nf;
3745 sc->sc_rx_th.wr_antsignal = nf + rs->rs_rssi;
3746 sc->sc_rx_th.wr_antenna = rs->rs_antenna;
3754 ath_handle_micerror(struct ieee80211com *ic,
3755 struct ieee80211_frame *wh, int keyix)
3757 struct ieee80211_node *ni;
3759 /* XXX recheck MIC to deal w/ chips that lie */
3760 /* XXX discard MIC errors on !data frames */
3761 ni = ieee80211_find_rxnode(ic, (const struct ieee80211_frame_min *) wh);
3763 ieee80211_notify_michael_failure(ni->ni_vap, wh, keyix);
3764 ieee80211_free_node(ni);
3769 ath_rx_task(void *arg, int npending)
3771 #define PA2DESC(_sc, _pa) \
3772 ((struct ath_desc *)((caddr_t)(_sc)->sc_rxdma.dd_desc + \
3773 ((_pa) - (_sc)->sc_rxdma.dd_desc_paddr)))
3774 struct ath_softc *sc = arg;
3777 struct ieee80211com *ic;
3779 struct ath_desc *ds;
3780 struct ath_rx_status *rs;
3782 struct ieee80211_node *ni;
3783 int len, type, ngood;
3789 wlan_serialize_enter();
3794 DPRINTF(sc, ATH_DEBUG_RX_PROC, "%s: pending %u\n", __func__, npending);
3796 nf = ath_hal_getchannoise(ah, sc->sc_curchan);
3797 sc->sc_stats.ast_rx_noise = nf;
3798 tsf = ath_hal_gettsf64(ah);
3800 bf = STAILQ_FIRST(&sc->sc_rxbuf);
3801 if (bf == NULL) { /* NB: shouldn't happen */
3802 if_printf(ifp, "%s: no buffer!\n", __func__);
3806 if (m == NULL) { /* NB: shouldn't happen */
3808 * If mbuf allocation failed previously there
3809 * will be no mbuf; try again to re-populate it.
3811 /* XXX make debug msg */
3812 if_printf(ifp, "%s: no mbuf!\n", __func__);
3813 STAILQ_REMOVE_HEAD(&sc->sc_rxbuf, bf_list);
3817 if (ds->ds_link == bf->bf_daddr) {
3818 /* NB: never process the self-linked entry at the end */
3821 /* XXX sync descriptor memory */
3823 * Must provide the virtual address of the current
3824 * descriptor, the physical address, and the virtual
3825 * address of the next descriptor in the h/w chain.
3826 * This allows the HAL to look ahead to see if the
3827 * hardware is done with a descriptor by checking the
3828 * done bit in the following descriptor and the address
3829 * of the current descriptor the DMA engine is working
3830 * on. All this is necessary because of our use of
3831 * a self-linked list to avoid rx overruns.
3833 rs = &bf->bf_status.ds_rxstat;
3834 status = ath_hal_rxprocdesc(ah, ds,
3835 bf->bf_daddr, PA2DESC(sc, ds->ds_link), rs);
3837 if (sc->sc_debug & ATH_DEBUG_RECV_DESC)
3838 ath_printrxbuf(sc, bf, 0, status == HAL_OK);
3840 if (status == HAL_EINPROGRESS)
3842 STAILQ_REMOVE_HEAD(&sc->sc_rxbuf, bf_list);
3843 if (rs->rs_status != 0) {
3844 if (rs->rs_status & HAL_RXERR_CRC)
3845 sc->sc_stats.ast_rx_crcerr++;
3846 if (rs->rs_status & HAL_RXERR_FIFO)
3847 sc->sc_stats.ast_rx_fifoerr++;
3848 if (rs->rs_status & HAL_RXERR_PHY) {
3849 sc->sc_stats.ast_rx_phyerr++;
3850 phyerr = rs->rs_phyerr & 0x1f;
3851 sc->sc_stats.ast_rx_phy[phyerr]++;
3852 goto rx_error; /* NB: don't count in ierrors */
3854 if (rs->rs_status & HAL_RXERR_DECRYPT) {
3856 * Decrypt error. If the error occurred
3857 * because there was no hardware key, then
3858 * let the frame through so the upper layers
3859 * can process it. This is necessary for 5210
3860 * parts which have no way to setup a ``clear''
3863 * XXX do key cache faulting
3865 if (rs->rs_keyix == HAL_RXKEYIX_INVALID)
3867 sc->sc_stats.ast_rx_badcrypt++;
3869 if (rs->rs_status & HAL_RXERR_MIC) {
3870 sc->sc_stats.ast_rx_badmic++;
3872 * Do minimal work required to hand off
3873 * the 802.11 header for notification.
3875 /* XXX frag's and qos frames */
3876 len = rs->rs_datalen;
3877 if (len >= sizeof (struct ieee80211_frame)) {
3878 bus_dmamap_sync(sc->sc_dmat,
3880 BUS_DMASYNC_POSTREAD);
3881 ath_handle_micerror(ic,
3882 mtod(m, struct ieee80211_frame *),
3884 rs->rs_keyix-32 : rs->rs_keyix);
3890 * Cleanup any pending partial frame.
3892 if (sc->sc_rxpending != NULL) {
3893 m_freem(sc->sc_rxpending);
3894 sc->sc_rxpending = NULL;
3897 * When a tap is present pass error frames
3898 * that have been requested. By default we
3899 * pass decrypt+mic errors but others may be
3900 * interesting (e.g. crc).
3902 if (ieee80211_radiotap_active(ic) &&
3903 (rs->rs_status & sc->sc_monpass)) {
3904 bus_dmamap_sync(sc->sc_dmat, bf->bf_dmamap,
3905 BUS_DMASYNC_POSTREAD);
3906 /* NB: bpf needs the mbuf length setup */
3907 len = rs->rs_datalen;
3908 m->m_pkthdr.len = m->m_len = len;
3909 ath_rx_tap(ifp, m, rs, tsf, nf);
3910 ieee80211_radiotap_rx_all(ic, m);
3912 /* XXX pass MIC errors up for s/w reclaculation */
3917 * Sync and unmap the frame. At this point we're
3918 * committed to passing the mbuf somewhere so clear
3919 * bf_m; this means a new mbuf must be allocated
3920 * when the rx descriptor is setup again to receive
3923 bus_dmamap_sync(sc->sc_dmat, bf->bf_dmamap,
3924 BUS_DMASYNC_POSTREAD);
3925 bus_dmamap_unload(sc->sc_dmat, bf->bf_dmamap);
3928 len = rs->rs_datalen;
3933 * Frame spans multiple descriptors; save
3934 * it for the next completed descriptor, it
3935 * will be used to construct a jumbogram.
3937 if (sc->sc_rxpending != NULL) {
3938 /* NB: max frame size is currently 2 clusters */
3939 sc->sc_stats.ast_rx_toobig++;
3940 m_freem(sc->sc_rxpending);
3942 m->m_pkthdr.rcvif = ifp;
3943 m->m_pkthdr.len = len;
3944 sc->sc_rxpending = m;
3946 } else if (sc->sc_rxpending != NULL) {
3948 * This is the second part of a jumbogram,
3949 * chain it to the first mbuf, adjust the
3950 * frame length, and clear the rxpending state.
3952 sc->sc_rxpending->m_next = m;
3953 sc->sc_rxpending->m_pkthdr.len += len;
3954 m = sc->sc_rxpending;
3955 sc->sc_rxpending = NULL;
3958 * Normal single-descriptor receive; setup
3959 * the rcvif and packet length.
3961 m->m_pkthdr.rcvif = ifp;
3962 m->m_pkthdr.len = len;
3966 sc->sc_stats.ast_ant_rx[rs->rs_antenna]++;
3969 * Populate the rx status block. When there are bpf
3970 * listeners we do the additional work to provide
3971 * complete status. Otherwise we fill in only the
3972 * material required by ieee80211_input. Note that
3973 * noise setting is filled in above.
3975 if (ieee80211_radiotap_active(ic))
3976 ath_rx_tap(ifp, m, rs, tsf, nf);
3979 * From this point on we assume the frame is at least
3980 * as large as ieee80211_frame_min; verify that.
3982 if (len < IEEE80211_MIN_LEN) {
3983 if (!ieee80211_radiotap_active(ic)) {
3984 DPRINTF(sc, ATH_DEBUG_RECV,
3985 "%s: short packet %d\n", __func__, len);
3986 sc->sc_stats.ast_rx_tooshort++;
3988 /* NB: in particular this captures ack's */
3989 ieee80211_radiotap_rx_all(ic, m);
3995 if (IFF_DUMPPKTS(sc, ATH_DEBUG_RECV)) {
3996 const HAL_RATE_TABLE *rt = sc->sc_currates;
3997 uint8_t rix = rt->rateCodeToIndex[rs->rs_rate];
3999 ieee80211_dump_pkt(ic, mtod(m, caddr_t), len,
4000 sc->sc_hwmap[rix].ieeerate, rs->rs_rssi);
4003 m_adj(m, -IEEE80211_CRC_LEN);
4006 * Locate the node for sender, track state, and then
4007 * pass the (referenced) node up to the 802.11 layer
4010 ni = ieee80211_find_rxnode_withkey(ic,
4011 mtod(m, const struct ieee80211_frame_min *),
4012 rs->rs_keyix == HAL_RXKEYIX_INVALID ?
4013 IEEE80211_KEYIX_NONE : rs->rs_keyix);
4016 * Sending station is known, dispatch directly.
4019 type = ieee80211_input(ni, m, rs->rs_rssi, nf);
4020 ieee80211_free_node(ni);
4022 * Arrange to update the last rx timestamp only for
4023 * frames from our ap when operating in station mode.
4024 * This assumes the rx key is always setup when
4027 if (ic->ic_opmode == IEEE80211_M_STA &&
4028 rs->rs_keyix != HAL_RXKEYIX_INVALID)
4031 type = ieee80211_input_all(ic, m, rs->rs_rssi, nf);
4034 * Track rx rssi and do any rx antenna management.
4036 ATH_RSSI_LPF(sc->sc_halstats.ns_avgrssi, rs->rs_rssi);
4037 if (sc->sc_diversity) {
4039 * When using fast diversity, change the default rx
4040 * antenna if diversity chooses the other antenna 3
4043 if (sc->sc_defant != rs->rs_antenna) {
4044 if (++sc->sc_rxotherant >= 3)
4045 ath_setdefantenna(sc, rs->rs_antenna);
4047 sc->sc_rxotherant = 0;
4049 if (sc->sc_softled) {
4051 * Blink for any data frame. Otherwise do a
4052 * heartbeat-style blink when idle. The latter
4053 * is mainly for station mode where we depend on
4054 * periodic beacon frames to trigger the poll event.
4056 if (type == IEEE80211_FC0_TYPE_DATA) {
4057 const HAL_RATE_TABLE *rt = sc->sc_currates;
4059 rt->rateCodeToIndex[rs->rs_rate]);
4060 } else if (ticks - sc->sc_ledevent >= sc->sc_ledidle)
4061 ath_led_event(sc, 0);
4064 STAILQ_INSERT_TAIL(&sc->sc_rxbuf, bf, bf_list);
4065 } while (ath_rxbuf_init(sc, bf) == 0);
4067 /* rx signal state monitoring */
4068 ath_hal_rxmonitor(ah, &sc->sc_halstats, sc->sc_curchan);
4070 sc->sc_lastrx = tsf;
4072 if ((ifp->if_flags & IFF_OACTIVE) == 0) {
4073 #ifdef IEEE80211_SUPPORT_SUPERG
4074 ieee80211_ff_age_all(ic, 100);
4076 if (!ifq_is_empty(&ifp->if_snd))
4079 wlan_serialize_exit();
4084 ath_txq_init(struct ath_softc *sc, struct ath_txq *txq, int qnum)
4086 txq->axq_qnum = qnum;
4089 txq->axq_intrcnt = 0;
4090 txq->axq_link = NULL;
4091 STAILQ_INIT(&txq->axq_q);
4095 * Setup a h/w transmit queue.
4097 static struct ath_txq *
4098 ath_txq_setup(struct ath_softc *sc, int qtype, int subtype)
4100 #define N(a) (sizeof(a)/sizeof(a[0]))
4101 struct ath_hal *ah = sc->sc_ah;
4105 memset(&qi, 0, sizeof(qi));
4106 qi.tqi_subtype = subtype;
4107 qi.tqi_aifs = HAL_TXQ_USEDEFAULT;
4108 qi.tqi_cwmin = HAL_TXQ_USEDEFAULT;
4109 qi.tqi_cwmax = HAL_TXQ_USEDEFAULT;
4111 * Enable interrupts only for EOL and DESC conditions.
4112 * We mark tx descriptors to receive a DESC interrupt
4113 * when a tx queue gets deep; otherwise waiting for the
4114 * EOL to reap descriptors. Note that this is done to
4115 * reduce interrupt load and this only defers reaping
4116 * descriptors, never transmitting frames. Aside from
4117 * reducing interrupts this also permits more concurrency.
4118 * The only potential downside is if the tx queue backs
4119 * up in which case the top half of the kernel may backup
4120 * due to a lack of tx descriptors.
4122 qi.tqi_qflags = HAL_TXQ_TXEOLINT_ENABLE | HAL_TXQ_TXDESCINT_ENABLE;
4123 qnum = ath_hal_setuptxqueue(ah, qtype, &qi);
4126 * NB: don't print a message, this happens
4127 * normally on parts with too few tx queues
4131 if (qnum >= N(sc->sc_txq)) {
4132 device_printf(sc->sc_dev,
4133 "hal qnum %u out of range, max %zu!\n",
4134 qnum, N(sc->sc_txq));
4135 ath_hal_releasetxqueue(ah, qnum);
4138 if (!ATH_TXQ_SETUP(sc, qnum)) {
4139 ath_txq_init(sc, &sc->sc_txq[qnum], qnum);
4140 sc->sc_txqsetup |= 1<<qnum;
4142 return &sc->sc_txq[qnum];
4147 * Setup a hardware data transmit queue for the specified
4148 * access control. The hal may not support all requested
4149 * queues in which case it will return a reference to a
4150 * previously setup queue. We record the mapping from ac's
4151 * to h/w queues for use by ath_tx_start and also track
4152 * the set of h/w queues being used to optimize work in the
4153 * transmit interrupt handler and related routines.
4156 ath_tx_setup(struct ath_softc *sc, int ac, int haltype)
4158 #define N(a) (sizeof(a)/sizeof(a[0]))
4159 struct ath_txq *txq;
4161 if (ac >= N(sc->sc_ac2q)) {
4162 device_printf(sc->sc_dev, "AC %u out of range, max %zu!\n",
4163 ac, N(sc->sc_ac2q));
4166 txq = ath_txq_setup(sc, HAL_TX_QUEUE_DATA, haltype);
4169 sc->sc_ac2q[ac] = txq;
4177 * Update WME parameters for a transmit queue.
4180 ath_txq_update(struct ath_softc *sc, int ac)
4182 #define ATH_EXPONENT_TO_VALUE(v) ((1<<v)-1)
4183 #define ATH_TXOP_TO_US(v) (v<<5)
4184 struct ifnet *ifp = sc->sc_ifp;
4185 struct ieee80211com *ic = ifp->if_l2com;
4186 struct ath_txq *txq = sc->sc_ac2q[ac];
4187 struct wmeParams *wmep = &ic->ic_wme.wme_chanParams.cap_wmeParams[ac];
4188 struct ath_hal *ah = sc->sc_ah;
4191 ath_hal_gettxqueueprops(ah, txq->axq_qnum, &qi);
4192 #ifdef IEEE80211_SUPPORT_TDMA
4195 * AIFS is zero so there's no pre-transmit wait. The
4196 * burst time defines the slot duration and is configured
4197 * through net80211. The QCU is setup to not do post-xmit
4198 * back off, lockout all lower-priority QCU's, and fire
4199 * off the DMA beacon alert timer which is setup based
4200 * on the slot configuration.
4202 qi.tqi_qflags = HAL_TXQ_TXOKINT_ENABLE
4203 | HAL_TXQ_TXERRINT_ENABLE
4204 | HAL_TXQ_TXURNINT_ENABLE
4205 | HAL_TXQ_TXEOLINT_ENABLE
4207 | HAL_TXQ_BACKOFF_DISABLE
4208 | HAL_TXQ_ARB_LOCKOUT_GLOBAL
4212 qi.tqi_readyTime = sc->sc_tdmaslotlen;
4213 qi.tqi_burstTime = qi.tqi_readyTime;
4216 qi.tqi_qflags = HAL_TXQ_TXOKINT_ENABLE
4217 | HAL_TXQ_TXERRINT_ENABLE
4218 | HAL_TXQ_TXDESCINT_ENABLE
4219 | HAL_TXQ_TXURNINT_ENABLE
4221 qi.tqi_aifs = wmep->wmep_aifsn;
4222 qi.tqi_cwmin = ATH_EXPONENT_TO_VALUE(wmep->wmep_logcwmin);
4223 qi.tqi_cwmax = ATH_EXPONENT_TO_VALUE(wmep->wmep_logcwmax);
4224 qi.tqi_readyTime = 0;
4225 qi.tqi_burstTime = ATH_TXOP_TO_US(wmep->wmep_txopLimit);
4226 #ifdef IEEE80211_SUPPORT_TDMA
4230 DPRINTF(sc, ATH_DEBUG_RESET,
4231 "%s: Q%u qflags 0x%x aifs %u cwmin %u cwmax %u burstTime %u\n",
4232 __func__, txq->axq_qnum, qi.tqi_qflags,
4233 qi.tqi_aifs, qi.tqi_cwmin, qi.tqi_cwmax, qi.tqi_burstTime);
4235 if (!ath_hal_settxqueueprops(ah, txq->axq_qnum, &qi)) {
4236 if_printf(ifp, "unable to update hardware queue "
4237 "parameters for %s traffic!\n",
4238 ieee80211_wme_acnames[ac]);
4241 ath_hal_resettxqueue(ah, txq->axq_qnum); /* push to h/w */
4244 #undef ATH_TXOP_TO_US
4245 #undef ATH_EXPONENT_TO_VALUE
4249 * Callback from the 802.11 layer to update WME parameters.
4252 ath_wme_update(struct ieee80211com *ic)
4254 struct ath_softc *sc = ic->ic_ifp->if_softc;
4256 return !ath_txq_update(sc, WME_AC_BE) ||
4257 !ath_txq_update(sc, WME_AC_BK) ||
4258 !ath_txq_update(sc, WME_AC_VI) ||
4259 !ath_txq_update(sc, WME_AC_VO) ? EIO : 0;
4263 * Reclaim resources for a setup queue.
4266 ath_tx_cleanupq(struct ath_softc *sc, struct ath_txq *txq)
4269 ath_hal_releasetxqueue(sc->sc_ah, txq->axq_qnum);
4270 sc->sc_txqsetup &= ~(1<<txq->axq_qnum);
4274 * Reclaim all tx queue resources.
4277 ath_tx_cleanup(struct ath_softc *sc)
4281 for (i = 0; i < HAL_NUM_TX_QUEUES; i++)
4282 if (ATH_TXQ_SETUP(sc, i))
4283 ath_tx_cleanupq(sc, &sc->sc_txq[i]);
4287 * Return h/w rate index for an IEEE rate (w/o basic rate bit)
4288 * using the current rates in sc_rixmap.
4291 ath_tx_findrix(const struct ath_softc *sc, uint8_t rate)
4293 int rix = sc->sc_rixmap[rate];
4294 /* NB: return lowest rix for invalid rate */
4295 return (rix == 0xff ? 0 : rix);
4299 * Reclaim mbuf resources. For fragmented frames we
4300 * need to claim each frag chained with m_nextpkt.
4303 ath_freetx(struct mbuf *m)
4308 next = m->m_nextpkt;
4309 m->m_nextpkt = NULL;
4311 } while ((m = next) != NULL);
4315 ath_tx_dmasetup(struct ath_softc *sc, struct ath_buf *bf, struct mbuf *m0)
4321 * Load the DMA map so any coalescing is done. This
4322 * also calculates the number of descriptors we need.
4324 error = bus_dmamap_load_mbuf_defrag(sc->sc_dmat, bf->bf_dmamap, &m0,
4325 bf->bf_segs, ATH_TXDESC,
4326 &bf->bf_nseg, BUS_DMA_NOWAIT);
4328 sc->sc_stats.ast_tx_busdma++;
4334 * Discard null packets.
4336 if (bf->bf_nseg == 0) { /* null packet, discard */
4337 sc->sc_stats.ast_tx_nodata++;
4341 DPRINTF(sc, ATH_DEBUG_XMIT, "%s: m %p len %u\n",
4342 __func__, m0, m0->m_pkthdr.len);
4343 bus_dmamap_sync(sc->sc_dmat, bf->bf_dmamap, BUS_DMASYNC_PREWRITE);
4350 ath_tx_handoff(struct ath_softc *sc, struct ath_txq *txq, struct ath_buf *bf)
4352 struct ath_hal *ah = sc->sc_ah;
4353 struct ath_desc *ds, *ds0;
4357 * Fillin the remainder of the descriptor info.
4359 ds0 = ds = bf->bf_desc;
4360 for (i = 0; i < bf->bf_nseg; i++, ds++) {
4361 ds->ds_data = bf->bf_segs[i].ds_addr;
4362 if (i == bf->bf_nseg - 1)
4365 ds->ds_link = bf->bf_daddr + sizeof(*ds) * (i + 1);
4366 ath_hal_filltxdesc(ah, ds
4367 , bf->bf_segs[i].ds_len /* segment length */
4368 , i == 0 /* first segment */
4369 , i == bf->bf_nseg - 1 /* last segment */
4370 , ds0 /* first descriptor */
4372 DPRINTF(sc, ATH_DEBUG_XMIT,
4373 "%s: %d: %08x %08x %08x %08x %08x %08x\n",
4374 __func__, i, ds->ds_link, ds->ds_data,
4375 ds->ds_ctl0, ds->ds_ctl1, ds->ds_hw[0], ds->ds_hw[1]);
4378 * Insert the frame on the outbound list and pass it on
4379 * to the hardware. Multicast frames buffered for power
4380 * save stations and transmit from the CAB queue are stored
4381 * on a s/w only queue and loaded on to the CAB queue in
4382 * the SWBA handler since frames only go out on DTIM and
4383 * to avoid possible races.
4385 KASSERT((bf->bf_flags & ATH_BUF_BUSY) == 0,
4386 ("busy status 0x%x", bf->bf_flags));
4387 if (txq->axq_qnum != ATH_TXQ_SWQ) {
4388 #ifdef IEEE80211_SUPPORT_TDMA
4390 * Supporting transmit dma. If the queue is busy it is
4391 * impossible to determine if we've won the race against
4392 * the chipset checking the link field or not, so we don't
4393 * try. Instead we let the TX interrupt detect the case
4394 * and restart the transmitter.
4396 * If the queue is not busy we can start things rolling
4401 ATH_TXQ_INSERT_TAIL(txq, bf, bf_list);
4402 qbusy = ath_hal_txqenabled(ah, txq->axq_qnum);
4405 if (txq->axq_link != NULL) {
4407 * We had already started one previously but
4408 * not yet processed the TX interrupt. Don't
4409 * try to race a restart because we do not
4410 * know where it stopped, let the TX interrupt
4411 * restart us when it figures out where we
4415 *txq->axq_link = bf->bf_daddr;
4416 txq->axq_flags |= ATH_TXQ_PUTPENDING;
4419 * We are first in line, we can safely start
4423 ath_hal_puttxbuf(ah, txq->axq_qnum,
4428 * The queue is busy, go ahead and link us in but
4429 * do not try to start/restart the tx. We just
4430 * don't know whether it will pick up our link
4431 * or not and we don't want to double-xmit.
4433 if (txq->axq_link != NULL) {
4435 *txq->axq_link = bf->bf_daddr;
4437 txq->axq_flags |= ATH_TXQ_PUTPENDING;
4440 ath_hal_puttxbuf(ah, txq->axq_qnum,
4441 STAILQ_FIRST(&txq->axq_q)->bf_daddr);
4444 ATH_TXQ_INSERT_TAIL(txq, bf, bf_list);
4445 if (txq->axq_link == NULL) {
4446 ath_hal_puttxbuf(ah, txq->axq_qnum, bf->bf_daddr);
4447 DPRINTF(sc, ATH_DEBUG_XMIT,
4448 "%s: TXDP[%u] = %p (%p) depth %d\n",
4449 __func__, txq->axq_qnum,
4450 (caddr_t)bf->bf_daddr, bf->bf_desc,
4453 *txq->axq_link = bf->bf_daddr;
4454 DPRINTF(sc, ATH_DEBUG_XMIT,
4455 "%s: link[%u](%p)=%p (%p) depth %d\n", __func__,
4456 txq->axq_qnum, txq->axq_link,
4457 (caddr_t)bf->bf_daddr, bf->bf_desc, txq->axq_depth);
4459 #endif /* IEEE80211_SUPPORT_TDMA */
4460 txq->axq_link = &bf->bf_desc[bf->bf_nseg - 1].ds_link;
4461 ath_hal_txstart(ah, txq->axq_qnum);
4463 if (txq->axq_link != NULL) {
4464 struct ath_buf *last = ATH_TXQ_LAST(txq);
4465 struct ieee80211_frame *wh;
4467 /* mark previous frame */
4468 wh = mtod(last->bf_m, struct ieee80211_frame *);
4469 wh->i_fc[1] |= IEEE80211_FC1_MORE_DATA;
4470 bus_dmamap_sync(sc->sc_dmat, last->bf_dmamap,
4471 BUS_DMASYNC_PREWRITE);
4473 /* link descriptor */
4474 *txq->axq_link = bf->bf_daddr;
4476 ATH_TXQ_INSERT_TAIL(txq, bf, bf_list);
4477 txq->axq_link = &bf->bf_desc[bf->bf_nseg - 1].ds_link;
4482 ath_tx_start(struct ath_softc *sc, struct ieee80211_node *ni, struct ath_buf *bf,
4485 struct ieee80211vap *vap = ni->ni_vap;
4486 struct ath_vap *avp = ATH_VAP(vap);
4487 struct ath_hal *ah = sc->sc_ah;
4488 struct ifnet *ifp = sc->sc_ifp;
4489 struct ieee80211com *ic = ifp->if_l2com;
4490 const struct chanAccParams *cap = &ic->ic_wme.wme_chanParams;
4491 int error, iswep, ismcast, isfrag, ismrr;
4492 int keyix, hdrlen, pktlen, try0;
4493 u_int8_t rix, txrate, ctsrate;
4494 u_int8_t cix = 0xff; /* NB: silence compiler */
4495 struct ath_desc *ds;
4496 struct ath_txq *txq;
4497 struct ieee80211_frame *wh;
4498 u_int subtype, flags, ctsduration;
4500 const HAL_RATE_TABLE *rt;
4501 HAL_BOOL shortPreamble;
4502 struct ath_node *an;
4505 wh = mtod(m0, struct ieee80211_frame *);
4506 iswep = wh->i_fc[1] & IEEE80211_FC1_WEP;
4507 ismcast = IEEE80211_IS_MULTICAST(wh->i_addr1);
4508 isfrag = m0->m_flags & M_FRAG;
4509 hdrlen = ieee80211_anyhdrsize(wh);
4511 * Packet length must not include any
4512 * pad bytes; deduct them here.
4514 pktlen = m0->m_pkthdr.len - (hdrlen & 3);
4517 const struct ieee80211_cipher *cip;
4518 struct ieee80211_key *k;
4521 * Construct the 802.11 header+trailer for an encrypted
4522 * frame. The only reason this can fail is because of an
4523 * unknown or unsupported cipher/key type.
4525 k = ieee80211_crypto_encap(ni, m0);
4528 * This can happen when the key is yanked after the
4529 * frame was queued. Just discard the frame; the
4530 * 802.11 layer counts failures and provides
4531 * debugging/diagnostics.
4537 * Adjust the packet + header lengths for the crypto
4538 * additions and calculate the h/w key index. When
4539 * a s/w mic is done the frame will have had any mic
4540 * added to it prior to entry so m0->m_pkthdr.len will
4541 * account for it. Otherwise we need to add it to the
4545 hdrlen += cip->ic_header;
4546 pktlen += cip->ic_header + cip->ic_trailer;
4547 /* NB: frags always have any TKIP MIC done in s/w */
4548 if ((k->wk_flags & IEEE80211_KEY_SWMIC) == 0 && !isfrag)
4549 pktlen += cip->ic_miclen;
4550 keyix = k->wk_keyix;
4552 /* packet header may have moved, reset our local pointer */
4553 wh = mtod(m0, struct ieee80211_frame *);
4554 } else if (ni->ni_ucastkey.wk_cipher == &ieee80211_cipher_none) {
4556 * Use station key cache slot, if assigned.
4558 keyix = ni->ni_ucastkey.wk_keyix;
4559 if (keyix == IEEE80211_KEYIX_NONE)
4560 keyix = HAL_TXKEYIX_INVALID;
4562 keyix = HAL_TXKEYIX_INVALID;
4564 pktlen += IEEE80211_CRC_LEN;
4567 * Load the DMA map so any coalescing is done. This
4568 * also calculates the number of descriptors we need.
4570 error = ath_tx_dmasetup(sc, bf, m0);
4574 bf->bf_node = ni; /* NB: held reference */
4575 m0 = bf->bf_m; /* NB: may have changed */
4576 wh = mtod(m0, struct ieee80211_frame *);
4578 /* setup descriptors */
4580 rt = sc->sc_currates;
4581 KASSERT(rt != NULL, ("no rate table, mode %u", sc->sc_curmode));
4584 * NB: the 802.11 layer marks whether or not we should
4585 * use short preamble based on the current mode and
4586 * negotiated parameters.
4588 if ((ic->ic_flags & IEEE80211_F_SHPREAMBLE) &&
4589 (ni->ni_capinfo & IEEE80211_CAPINFO_SHORT_PREAMBLE)) {
4590 shortPreamble = AH_TRUE;
4591 sc->sc_stats.ast_tx_shortpre++;
4593 shortPreamble = AH_FALSE;
4597 flags = HAL_TXDESC_CLRDMASK; /* XXX needed for crypto errs */
4598 ismrr = 0; /* default no multi-rate retry*/
4599 pri = M_WME_GETAC(m0); /* honor classification */
4600 /* XXX use txparams instead of fixed values */
4602 * Calculate Atheros packet type from IEEE80211 packet header,
4603 * setup for rate calculations, and select h/w transmit queue.
4605 switch (wh->i_fc[0] & IEEE80211_FC0_TYPE_MASK) {
4606 case IEEE80211_FC0_TYPE_MGT:
4607 subtype = wh->i_fc[0] & IEEE80211_FC0_SUBTYPE_MASK;
4608 if (subtype == IEEE80211_FC0_SUBTYPE_BEACON)
4609 atype = HAL_PKT_TYPE_BEACON;
4610 else if (subtype == IEEE80211_FC0_SUBTYPE_PROBE_RESP)
4611 atype = HAL_PKT_TYPE_PROBE_RESP;
4612 else if (subtype == IEEE80211_FC0_SUBTYPE_ATIM)
4613 atype = HAL_PKT_TYPE_ATIM;
4615 atype = HAL_PKT_TYPE_NORMAL; /* XXX */
4616 rix = an->an_mgmtrix;
4617 txrate = rt->info[rix].rateCode;
4619 txrate |= rt->info[rix].shortPreamble;
4620 try0 = ATH_TXMGTTRY;
4621 flags |= HAL_TXDESC_INTREQ; /* force interrupt */
4623 case IEEE80211_FC0_TYPE_CTL:
4624 atype = HAL_PKT_TYPE_PSPOLL; /* stop setting of duration */
4625 rix = an->an_mgmtrix;
4626 txrate = rt->info[rix].rateCode;
4628 txrate |= rt->info[rix].shortPreamble;
4629 try0 = ATH_TXMGTTRY;
4630 flags |= HAL_TXDESC_INTREQ; /* force interrupt */
4632 case IEEE80211_FC0_TYPE_DATA:
4633 atype = HAL_PKT_TYPE_NORMAL; /* default */
4635 * Data frames: multicast frames go out at a fixed rate,
4636 * EAPOL frames use the mgmt frame rate; otherwise consult
4637 * the rate control module for the rate to use.
4640 rix = an->an_mcastrix;
4641 txrate = rt->info[rix].rateCode;
4643 txrate |= rt->info[rix].shortPreamble;
4645 } else if (m0->m_flags & M_EAPOL) {
4646 /* XXX? maybe always use long preamble? */
4647 rix = an->an_mgmtrix;
4648 txrate = rt->info[rix].rateCode;
4650 txrate |= rt->info[rix].shortPreamble;
4651 try0 = ATH_TXMAXTRY; /* XXX?too many? */
4653 ath_rate_findrate(sc, an, shortPreamble, pktlen,
4654 &rix, &try0, &txrate);
4655 sc->sc_txrix = rix; /* for LED blinking */
4656 sc->sc_lastdatarix = rix; /* for fast frames */
4657 if (try0 != ATH_TXMAXTRY)
4660 if (cap->cap_wmeParams[pri].wmep_noackPolicy)
4661 flags |= HAL_TXDESC_NOACK;
4664 if_printf(ifp, "bogus frame type 0x%x (%s)\n",
4665 wh->i_fc[0] & IEEE80211_FC0_TYPE_MASK, __func__);
4670 txq = sc->sc_ac2q[pri];
4673 * When servicing one or more stations in power-save mode
4674 * (or) if there is some mcast data waiting on the mcast
4675 * queue (to prevent out of order delivery) multicast
4676 * frames must be buffered until after the beacon.
4678 if (ismcast && (vap->iv_ps_sta || avp->av_mcastq.axq_depth))
4679 txq = &avp->av_mcastq;
4682 * Calculate miscellaneous flags.
4685 flags |= HAL_TXDESC_NOACK; /* no ack on broad/multicast */
4686 } else if (pktlen > vap->iv_rtsthreshold &&
4687 (ni->ni_ath_flags & IEEE80211_NODE_FF) == 0) {
4688 flags |= HAL_TXDESC_RTSENA; /* RTS based on frame length */
4689 cix = rt->info[rix].controlRate;
4690 sc->sc_stats.ast_tx_rts++;
4692 if (flags & HAL_TXDESC_NOACK) /* NB: avoid double counting */
4693 sc->sc_stats.ast_tx_noack++;
4694 #ifdef IEEE80211_SUPPORT_TDMA
4695 if (sc->sc_tdma && (flags & HAL_TXDESC_NOACK) == 0) {
4696 DPRINTF(sc, ATH_DEBUG_TDMA,
4697 "%s: discard frame, ACK required w/ TDMA\n", __func__);
4698 sc->sc_stats.ast_tdma_ack++;
4705 * If 802.11g protection is enabled, determine whether
4706 * to use RTS/CTS or just CTS. Note that this is only
4707 * done for OFDM unicast frames.
4709 if ((ic->ic_flags & IEEE80211_F_USEPROT) &&
4710 rt->info[rix].phy == IEEE80211_T_OFDM &&
4711 (flags & HAL_TXDESC_NOACK) == 0) {
4712 /* XXX fragments must use CCK rates w/ protection */
4713 if (ic->ic_protmode == IEEE80211_PROT_RTSCTS)
4714 flags |= HAL_TXDESC_RTSENA;
4715 else if (ic->ic_protmode == IEEE80211_PROT_CTSONLY)
4716 flags |= HAL_TXDESC_CTSENA;
4719 * For frags it would be desirable to use the
4720 * highest CCK rate for RTS/CTS. But stations
4721 * farther away may detect it at a lower CCK rate
4722 * so use the configured protection rate instead
4725 cix = rt->info[sc->sc_protrix].controlRate;
4727 cix = rt->info[sc->sc_protrix].controlRate;
4728 sc->sc_stats.ast_tx_protect++;
4732 * Calculate duration. This logically belongs in the 802.11
4733 * layer but it lacks sufficient information to calculate it.
4735 if ((flags & HAL_TXDESC_NOACK) == 0 &&
4736 (wh->i_fc[0] & IEEE80211_FC0_TYPE_MASK) != IEEE80211_FC0_TYPE_CTL) {
4739 dur = rt->info[rix].spAckDuration;
4741 dur = rt->info[rix].lpAckDuration;
4742 if (wh->i_fc[1] & IEEE80211_FC1_MORE_FRAG) {
4743 dur += dur; /* additional SIFS+ACK */
4744 KASSERT(m0->m_nextpkt != NULL, ("no fragment"));
4746 * Include the size of next fragment so NAV is
4747 * updated properly. The last fragment uses only
4750 dur += ath_hal_computetxtime(ah, rt,
4751 m0->m_nextpkt->m_pkthdr.len,
4752 rix, shortPreamble);
4756 * Force hardware to use computed duration for next
4757 * fragment by disabling multi-rate retry which updates
4758 * duration based on the multi-rate duration table.
4761 try0 = ATH_TXMGTTRY; /* XXX? */
4763 *(u_int16_t *)wh->i_dur = htole16(dur);
4767 * Calculate RTS/CTS rate and duration if needed.
4770 if (flags & (HAL_TXDESC_RTSENA|HAL_TXDESC_CTSENA)) {
4772 * CTS transmit rate is derived from the transmit rate
4773 * by looking in the h/w rate table. We must also factor
4774 * in whether or not a short preamble is to be used.
4776 /* NB: cix is set above where RTS/CTS is enabled */
4777 KASSERT(cix != 0xff, ("cix not setup"));
4778 ctsrate = rt->info[cix].rateCode;
4780 * Compute the transmit duration based on the frame
4781 * size and the size of an ACK frame. We call into the
4782 * HAL to do the computation since it depends on the
4783 * characteristics of the actual PHY being used.
4785 * NB: CTS is assumed the same size as an ACK so we can
4786 * use the precalculated ACK durations.
4788 if (shortPreamble) {
4789 ctsrate |= rt->info[cix].shortPreamble;
4790 if (flags & HAL_TXDESC_RTSENA) /* SIFS + CTS */
4791 ctsduration += rt->info[cix].spAckDuration;
4792 ctsduration += ath_hal_computetxtime(ah,
4793 rt, pktlen, rix, AH_TRUE);
4794 if ((flags & HAL_TXDESC_NOACK) == 0) /* SIFS + ACK */
4795 ctsduration += rt->info[rix].spAckDuration;
4797 if (flags & HAL_TXDESC_RTSENA) /* SIFS + CTS */
4798 ctsduration += rt->info[cix].lpAckDuration;
4799 ctsduration += ath_hal_computetxtime(ah,
4800 rt, pktlen, rix, AH_FALSE);
4801 if ((flags & HAL_TXDESC_NOACK) == 0) /* SIFS + ACK */
4802 ctsduration += rt->info[rix].lpAckDuration;
4805 * Must disable multi-rate retry when using RTS/CTS.
4808 try0 = ATH_TXMGTTRY; /* XXX */
4813 * At this point we are committed to sending the frame
4814 * and we don't need to look at m_nextpkt; clear it in
4815 * case this frame is part of frag chain.
4817 m0->m_nextpkt = NULL;
4819 if (IFF_DUMPPKTS(sc, ATH_DEBUG_XMIT))
4820 ieee80211_dump_pkt(ic, mtod(m0, const uint8_t *), m0->m_len,
4821 sc->sc_hwmap[rix].ieeerate, -1);
4823 if (ieee80211_radiotap_active_vap(vap)) {
4824 u_int64_t tsf = ath_hal_gettsf64(ah);
4826 sc->sc_tx_th.wt_tsf = htole64(tsf);
4827 sc->sc_tx_th.wt_flags = sc->sc_hwmap[rix].txflags;
4829 sc->sc_tx_th.wt_flags |= IEEE80211_RADIOTAP_F_WEP;
4831 sc->sc_tx_th.wt_flags |= IEEE80211_RADIOTAP_F_FRAG;
4832 sc->sc_tx_th.wt_rate = sc->sc_hwmap[rix].ieeerate;
4833 sc->sc_tx_th.wt_txpower = ni->ni_txpower;
4834 sc->sc_tx_th.wt_antenna = sc->sc_txantenna;
4836 ieee80211_radiotap_tx(vap, m0);
4840 * Determine if a tx interrupt should be generated for
4841 * this descriptor. We take a tx interrupt to reap
4842 * descriptors when the h/w hits an EOL condition or
4843 * when the descriptor is specifically marked to generate
4844 * an interrupt. We periodically mark descriptors in this
4845 * way to insure timely replenishing of the supply needed
4846 * for sending frames. Defering interrupts reduces system
4847 * load and potentially allows more concurrent work to be
4848 * done but if done to aggressively can cause senders to
4851 * NB: use >= to deal with sc_txintrperiod changing
4852 * dynamically through sysctl.
4854 if (flags & HAL_TXDESC_INTREQ) {
4855 txq->axq_intrcnt = 0;
4856 } else if (++txq->axq_intrcnt >= sc->sc_txintrperiod) {
4857 flags |= HAL_TXDESC_INTREQ;
4858 txq->axq_intrcnt = 0;
4862 * Formulate first tx descriptor with tx controls.
4864 /* XXX check return value? */
4865 ath_hal_setuptxdesc(ah, ds
4866 , pktlen /* packet length */
4867 , hdrlen /* header length */
4868 , atype /* Atheros packet type */
4869 , ni->ni_txpower /* txpower */
4870 , txrate, try0 /* series 0 rate/tries */
4871 , keyix /* key cache index */
4872 , sc->sc_txantenna /* antenna mode */
4874 , ctsrate /* rts/cts rate */
4875 , ctsduration /* rts/cts duration */
4877 bf->bf_txflags = flags;
4879 * Setup the multi-rate retry state only when we're
4880 * going to use it. This assumes ath_hal_setuptxdesc
4881 * initializes the descriptors (so we don't have to)
4882 * when the hardware supports multi-rate retry and
4886 ath_rate_setupxtxdesc(sc, an, ds, shortPreamble, rix);
4888 ath_tx_handoff(sc, txq, bf);
4893 * Process completed xmit descriptors from the specified queue.
4896 ath_tx_processq(struct ath_softc *sc, struct ath_txq *txq)
4898 struct ath_hal *ah = sc->sc_ah;
4899 struct ifnet *ifp = sc->sc_ifp;
4900 struct ieee80211com *ic = ifp->if_l2com;
4901 struct ath_buf *bf, *last;
4902 struct ath_desc *ds, *ds0;
4903 struct ath_tx_status *ts;
4904 struct ieee80211_node *ni;
4905 struct ath_node *an;
4906 int sr, lr, pri, nacked;
4909 DPRINTF(sc, ATH_DEBUG_TX_PROC, "%s: tx queue %u head %p link %p\n",
4910 __func__, txq->axq_qnum,
4911 (caddr_t)(uintptr_t) ath_hal_gettxbuf(sc->sc_ah, txq->axq_qnum),
4917 txq->axq_intrcnt = 0; /* reset periodic desc intr count */
4918 bf = STAILQ_FIRST(&txq->axq_q);
4921 ds0 = &bf->bf_desc[0];
4922 ds = &bf->bf_desc[bf->bf_nseg - 1];
4923 ts = &bf->bf_status.ds_txstat;
4924 qbusy = ath_hal_txqenabled(ah, txq->axq_qnum);
4925 status = ath_hal_txprocdesc(ah, ds, ts);
4927 if (sc->sc_debug & ATH_DEBUG_XMIT_DESC)
4928 ath_printtxbuf(sc, bf, txq->axq_qnum, 0,
4931 if (status == HAL_EINPROGRESS) {
4932 #ifdef IEEE80211_SUPPORT_TDMA
4934 * If not done and the queue is not busy then the
4935 * transmitter raced the hardware on the link field
4936 * and we have to restart it.
4940 ath_hal_puttxbuf(ah, txq->axq_qnum,
4942 ath_hal_txstart(ah, txq->axq_qnum);
4947 ATH_TXQ_REMOVE_HEAD(txq, bf_list);
4948 #ifdef IEEE80211_SUPPORT_TDMA
4949 if (txq->axq_depth > 0) {
4951 * More frames follow. Mark the buffer busy
4952 * so it's not re-used while the hardware may
4953 * still re-read the link field in the descriptor.
4955 bf->bf_flags |= ATH_BUF_BUSY;
4958 if (txq->axq_depth == 0)
4960 txq->axq_link = NULL;
4965 if (ts->ts_status == 0) {
4966 u_int8_t txant = ts->ts_antenna;
4967 sc->sc_stats.ast_ant_tx[txant]++;
4968 sc->sc_ant_tx[txant]++;
4969 if (ts->ts_finaltsi != 0)
4970 sc->sc_stats.ast_tx_altrate++;
4971 pri = M_WME_GETAC(bf->bf_m);
4972 if (pri >= WME_AC_VO)
4973 ic->ic_wme.wme_hipri_traffic++;
4974 if ((bf->bf_txflags & HAL_TXDESC_NOACK) == 0)
4975 ni->ni_inact = ni->ni_inact_reload;
4977 if (ts->ts_status & HAL_TXERR_XRETRY)
4978 sc->sc_stats.ast_tx_xretries++;
4979 if (ts->ts_status & HAL_TXERR_FIFO)
4980 sc->sc_stats.ast_tx_fifoerr++;
4981 if (ts->ts_status & HAL_TXERR_FILT)
4982 sc->sc_stats.ast_tx_filtered++;
4983 if (bf->bf_m->m_flags & M_FF)
4984 sc->sc_stats.ast_ff_txerr++;
4986 sr = ts->ts_shortretry;
4987 lr = ts->ts_longretry;
4988 sc->sc_stats.ast_tx_shortretry += sr;
4989 sc->sc_stats.ast_tx_longretry += lr;
4991 * Hand the descriptor to the rate control algorithm.
4993 if ((ts->ts_status & HAL_TXERR_FILT) == 0 &&
4994 (bf->bf_txflags & HAL_TXDESC_NOACK) == 0) {
4996 * If frame was ack'd update statistics,
4997 * including the last rx time used to
4998 * workaround phantom bmiss interrupts.
5000 if (ts->ts_status == 0) {
5002 sc->sc_stats.ast_tx_rssi = ts->ts_rssi;
5003 ATH_RSSI_LPF(sc->sc_halstats.ns_avgtxrssi,
5006 ath_rate_tx_complete(sc, an, bf);
5009 * Do any tx complete callback. Note this must
5010 * be done before releasing the node reference.
5012 if (bf->bf_m->m_flags & M_TXCB)
5013 ieee80211_process_callback(ni, bf->bf_m,
5014 (bf->bf_txflags & HAL_TXDESC_NOACK) == 0 ?
5015 ts->ts_status : HAL_TXERR_XRETRY);
5016 ieee80211_free_node(ni);
5018 bus_dmamap_sync(sc->sc_dmat, bf->bf_dmamap,
5019 BUS_DMASYNC_POSTWRITE);
5020 bus_dmamap_unload(sc->sc_dmat, bf->bf_dmamap);
5026 last = STAILQ_LAST(&sc->sc_txbuf, ath_buf, bf_list);
5028 last->bf_flags &= ~ATH_BUF_BUSY;
5029 STAILQ_INSERT_TAIL(&sc->sc_txbuf, bf, bf_list);
5031 #ifdef IEEE80211_SUPPORT_SUPERG
5033 * Flush fast-frame staging queue when traffic slows.
5035 if (txq->axq_depth <= 1)
5036 ieee80211_ff_flush(ic, txq->axq_ac);
5042 txqactive(struct ath_hal *ah, int qnum)
5044 u_int32_t txqs = 1<<qnum;
5045 ath_hal_gettxintrtxqs(ah, &txqs);
5046 return (txqs & (1<<qnum));
5050 * Deferred processing of transmit interrupt; special-cased
5051 * for a single hardware transmit queue (e.g. 5210 and 5211).
5054 ath_tx_task_q0(void *arg, int npending)
5056 struct ath_softc *sc = arg;
5057 struct ifnet *ifp = sc->sc_ifp;
5059 wlan_serialize_enter();
5060 if (txqactive(sc->sc_ah, 0) && ath_tx_processq(sc, &sc->sc_txq[0]))
5061 sc->sc_lastrx = ath_hal_gettsf64(sc->sc_ah);
5062 if (txqactive(sc->sc_ah, sc->sc_cabq->axq_qnum))
5063 ath_tx_processq(sc, sc->sc_cabq);
5064 ifp->if_flags &= ~IFF_OACTIVE;
5065 sc->sc_wd_timer = 0;
5068 ath_led_event(sc, sc->sc_txrix);
5071 wlan_serialize_exit();
5075 * Deferred processing of transmit interrupt; special-cased
5076 * for four hardware queues, 0-3 (e.g. 5212 w/ WME support).
5079 ath_tx_task_q0123(void *arg, int npending)
5081 struct ath_softc *sc = arg;
5082 struct ifnet *ifp = sc->sc_ifp;
5085 wlan_serialize_enter();
5087 * Process each active queue.
5090 if (txqactive(sc->sc_ah, 0))
5091 nacked += ath_tx_processq(sc, &sc->sc_txq[0]);
5092 if (txqactive(sc->sc_ah, 1))
5093 nacked += ath_tx_processq(sc, &sc->sc_txq[1]);
5094 if (txqactive(sc->sc_ah, 2))
5095 nacked += ath_tx_processq(sc, &sc->sc_txq[2]);
5096 if (txqactive(sc->sc_ah, 3))
5097 nacked += ath_tx_processq(sc, &sc->sc_txq[3]);
5098 if (txqactive(sc->sc_ah, sc->sc_cabq->axq_qnum))
5099 ath_tx_processq(sc, sc->sc_cabq);
5101 sc->sc_lastrx = ath_hal_gettsf64(sc->sc_ah);
5103 ifp->if_flags &= ~IFF_OACTIVE;
5104 sc->sc_wd_timer = 0;
5107 ath_led_event(sc, sc->sc_txrix);
5110 wlan_serialize_exit();
5114 * Deferred processing of transmit interrupt.
5117 ath_tx_task(void *arg, int npending)
5119 struct ath_softc *sc = arg;
5120 struct ifnet *ifp = sc->sc_ifp;
5123 wlan_serialize_enter();
5126 * Process each active queue.
5129 for (i = 0; i < HAL_NUM_TX_QUEUES; i++) {
5130 if (ATH_TXQ_SETUP(sc, i) && txqactive(sc->sc_ah, i))
5131 nacked += ath_tx_processq(sc, &sc->sc_txq[i]);
5134 sc->sc_lastrx = ath_hal_gettsf64(sc->sc_ah);
5136 ifp->if_flags &= ~IFF_OACTIVE;
5137 sc->sc_wd_timer = 0;
5140 ath_led_event(sc, sc->sc_txrix);
5143 wlan_serialize_exit();
5147 ath_tx_draintxq(struct ath_softc *sc, struct ath_txq *txq)
5150 struct ath_hal *ah = sc->sc_ah;
5152 struct ieee80211_node *ni;
5157 * NB: this assumes output has been stopped and
5158 * we do not need to block ath_tx_proc
5160 bf = STAILQ_LAST(&sc->sc_txbuf, ath_buf, bf_list);
5162 bf->bf_flags &= ~ATH_BUF_BUSY;
5163 for (ix = 0;; ix++) {
5164 bf = STAILQ_FIRST(&txq->axq_q);
5166 txq->axq_link = NULL;
5169 ATH_TXQ_REMOVE_HEAD(txq, bf_list);
5171 if (sc->sc_debug & ATH_DEBUG_RESET) {
5172 struct ieee80211com *ic = sc->sc_ifp->if_l2com;
5174 ath_printtxbuf(sc, bf, txq->axq_qnum, ix,
5175 ath_hal_txprocdesc(ah, bf->bf_desc,
5176 &bf->bf_status.ds_txstat) == HAL_OK);
5177 ieee80211_dump_pkt(ic, mtod(bf->bf_m, const uint8_t *),
5178 bf->bf_m->m_len, 0, -1);
5180 #endif /* ATH_DEBUG */
5181 bus_dmamap_unload(sc->sc_dmat, bf->bf_dmamap);
5186 * Do any callback and reclaim the node reference.
5188 if (bf->bf_m->m_flags & M_TXCB)
5189 ieee80211_process_callback(ni, bf->bf_m, -1);
5190 ieee80211_free_node(ni);
5194 bf->bf_flags &= ~ATH_BUF_BUSY;
5196 STAILQ_INSERT_TAIL(&sc->sc_txbuf, bf, bf_list);
5201 ath_tx_stopdma(struct ath_softc *sc, struct ath_txq *txq)
5203 struct ath_hal *ah = sc->sc_ah;
5205 DPRINTF(sc, ATH_DEBUG_RESET, "%s: tx queue [%u] %p, link %p\n",
5206 __func__, txq->axq_qnum,
5207 (caddr_t)(uintptr_t) ath_hal_gettxbuf(ah, txq->axq_qnum),
5209 (void) ath_hal_stoptxdma(ah, txq->axq_qnum);
5213 * Drain the transmit queues and reclaim resources.
5216 ath_draintxq(struct ath_softc *sc)
5218 struct ath_hal *ah = sc->sc_ah;
5219 struct ifnet *ifp = sc->sc_ifp;
5222 /* XXX return value */
5223 if (!sc->sc_invalid) {
5224 /* don't touch the hardware if marked invalid */
5225 DPRINTF(sc, ATH_DEBUG_RESET, "%s: tx queue [%u] %p, link %p\n",
5226 __func__, sc->sc_bhalq,
5227 (caddr_t)(uintptr_t) ath_hal_gettxbuf(ah, sc->sc_bhalq),
5229 (void) ath_hal_stoptxdma(ah, sc->sc_bhalq);
5230 for (i = 0; i < HAL_NUM_TX_QUEUES; i++)
5231 if (ATH_TXQ_SETUP(sc, i))
5232 ath_tx_stopdma(sc, &sc->sc_txq[i]);
5234 for (i = 0; i < HAL_NUM_TX_QUEUES; i++)
5235 if (ATH_TXQ_SETUP(sc, i))
5236 ath_tx_draintxq(sc, &sc->sc_txq[i]);
5238 if (sc->sc_debug & ATH_DEBUG_RESET) {
5239 struct ath_buf *bf = STAILQ_FIRST(&sc->sc_bbuf);
5240 if (bf != NULL && bf->bf_m != NULL) {
5241 ath_printtxbuf(sc, bf, sc->sc_bhalq, 0,
5242 ath_hal_txprocdesc(ah, bf->bf_desc,
5243 &bf->bf_status.ds_txstat) == HAL_OK);
5244 ieee80211_dump_pkt(ifp->if_l2com,
5245 mtod(bf->bf_m, const uint8_t *), bf->bf_m->m_len,
5249 #endif /* ATH_DEBUG */
5250 ifp->if_flags &= ~IFF_OACTIVE;
5251 sc->sc_wd_timer = 0;
5255 * Disable the receive h/w in preparation for a reset.
5258 ath_stoprecv(struct ath_softc *sc)
5260 #define PA2DESC(_sc, _pa) \
5261 ((struct ath_desc *)((caddr_t)(_sc)->sc_rxdma.dd_desc + \
5262 ((_pa) - (_sc)->sc_rxdma.dd_desc_paddr)))
5263 struct ath_hal *ah = sc->sc_ah;
5265 ath_hal_stoppcurecv(ah); /* disable PCU */
5266 ath_hal_setrxfilter(ah, 0); /* clear recv filter */
5267 ath_hal_stopdmarecv(ah); /* disable DMA engine */
5268 DELAY(3000); /* 3ms is long enough for 1 frame */
5270 if (sc->sc_debug & (ATH_DEBUG_RESET | ATH_DEBUG_FATAL)) {
5274 kprintf("%s: rx queue %p, link %p\n", __func__,
5275 (caddr_t)(uintptr_t) ath_hal_getrxbuf(ah), sc->sc_rxlink);
5277 STAILQ_FOREACH(bf, &sc->sc_rxbuf, bf_list) {
5278 struct ath_desc *ds = bf->bf_desc;
5279 struct ath_rx_status *rs = &bf->bf_status.ds_rxstat;
5280 HAL_STATUS status = ath_hal_rxprocdesc(ah, ds,
5281 bf->bf_daddr, PA2DESC(sc, ds->ds_link), rs);
5282 if (status == HAL_OK || (sc->sc_debug & ATH_DEBUG_FATAL))
5283 ath_printrxbuf(sc, bf, ix, status == HAL_OK);
5288 if (sc->sc_rxpending != NULL) {
5289 m_freem(sc->sc_rxpending);
5290 sc->sc_rxpending = NULL;
5292 sc->sc_rxlink = NULL; /* just in case */
5297 * Enable the receive h/w following a reset.
5300 ath_startrecv(struct ath_softc *sc)
5302 struct ath_hal *ah = sc->sc_ah;
5305 sc->sc_rxlink = NULL;
5306 sc->sc_rxpending = NULL;
5307 STAILQ_FOREACH(bf, &sc->sc_rxbuf, bf_list) {
5308 int error = ath_rxbuf_init(sc, bf);
5310 DPRINTF(sc, ATH_DEBUG_RECV,
5311 "%s: ath_rxbuf_init failed %d\n",
5317 bf = STAILQ_FIRST(&sc->sc_rxbuf);
5318 ath_hal_putrxbuf(ah, bf->bf_daddr);
5319 ath_hal_rxena(ah); /* enable recv descriptors */
5320 ath_mode_init(sc); /* set filters, etc. */
5321 ath_hal_startpcurecv(ah); /* re-enable PCU/DMA engine */
5326 * Update internal state after a channel change.
5329 ath_chan_change(struct ath_softc *sc, struct ieee80211_channel *chan)
5331 enum ieee80211_phymode mode;
5334 * Change channels and update the h/w rate map
5335 * if we're switching; e.g. 11a to 11b/g.
5337 mode = ieee80211_chan2mode(chan);
5338 if (mode != sc->sc_curmode)
5339 ath_setcurmode(sc, mode);
5340 sc->sc_curchan = chan;
5344 * Set/change channels. If the channel is really being changed,
5345 * it's done by reseting the chip. To accomplish this we must
5346 * first cleanup any pending DMA, then restart stuff after a la
5350 ath_chan_set(struct ath_softc *sc, struct ieee80211_channel *chan)
5352 struct ifnet *ifp = sc->sc_ifp;
5353 struct ieee80211com *ic = ifp->if_l2com;
5354 struct ath_hal *ah = sc->sc_ah;
5356 DPRINTF(sc, ATH_DEBUG_RESET, "%s: %u (%u MHz, flags 0x%x)\n",
5357 __func__, ieee80211_chan2ieee(ic, chan),
5358 chan->ic_freq, chan->ic_flags);
5359 if (chan != sc->sc_curchan) {
5362 * To switch channels clear any pending DMA operations;
5363 * wait long enough for the RX fifo to drain, reset the
5364 * hardware at the new frequency, and then re-enable
5365 * the relevant bits of the h/w.
5367 ath_hal_intrset(ah, 0); /* disable interrupts */
5368 ath_draintxq(sc); /* clear pending tx frames */
5369 ath_stoprecv(sc); /* turn off frame recv */
5370 if (!ath_hal_reset(ah, sc->sc_opmode, chan, AH_TRUE, &status)) {
5371 if_printf(ifp, "%s: unable to reset "
5372 "channel %u (%u MHz, flags 0x%x), hal status %u\n",
5373 __func__, ieee80211_chan2ieee(ic, chan),
5374 chan->ic_freq, chan->ic_flags, status);
5377 sc->sc_diversity = ath_hal_getdiversity(ah);
5380 * Re-enable rx framework.
5382 if (ath_startrecv(sc) != 0) {
5383 if_printf(ifp, "%s: unable to restart recv logic\n",
5389 * Change channels and update the h/w rate map
5390 * if we're switching; e.g. 11a to 11b/g.
5392 ath_chan_change(sc, chan);
5395 * Re-enable interrupts.
5397 ath_hal_intrset(ah, sc->sc_imask);
5403 * Periodically recalibrate the PHY to account
5404 * for temperature/environment changes.
5407 ath_calibrate_callout(void *arg)
5409 struct ath_softc *sc = arg;
5410 struct ath_hal *ah = sc->sc_ah;
5411 struct ifnet *ifp = sc->sc_ifp;
5412 struct ieee80211com *ic = ifp->if_l2com;
5413 HAL_BOOL longCal, isCalDone;
5416 wlan_serialize_enter();
5418 if (ic->ic_flags & IEEE80211_F_SCAN) /* defer, off channel */
5420 longCal = (ticks - sc->sc_lastlongcal >= ath_longcalinterval*hz);
5422 sc->sc_stats.ast_per_cal++;
5423 if (ath_hal_getrfgain(ah) == HAL_RFGAIN_NEED_CHANGE) {
5425 * Rfgain is out of bounds, reset the chip
5426 * to load new gain values.
5428 DPRINTF(sc, ATH_DEBUG_CALIBRATE,
5429 "%s: rfgain change\n", __func__);
5430 sc->sc_stats.ast_per_rfgain++;
5434 * If this long cal is after an idle period, then
5435 * reset the data collection state so we start fresh.
5437 if (sc->sc_resetcal) {
5438 (void) ath_hal_calreset(ah, sc->sc_curchan);
5439 sc->sc_lastcalreset = ticks;
5440 sc->sc_resetcal = 0;
5443 if (ath_hal_calibrateN(ah, sc->sc_curchan, longCal, &isCalDone)) {
5446 * Calibrate noise floor data again in case of change.
5448 ath_hal_process_noisefloor(ah);
5451 DPRINTF(sc, ATH_DEBUG_ANY,
5452 "%s: calibration of channel %u failed\n",
5453 __func__, sc->sc_curchan->ic_freq);
5454 sc->sc_stats.ast_per_calfail++;
5459 * Use a shorter interval to potentially collect multiple
5460 * data samples required to complete calibration. Once
5461 * we're told the work is done we drop back to a longer
5462 * interval between requests. We're more aggressive doing
5463 * work when operating as an AP to improve operation right
5466 nextcal = (1000*ath_shortcalinterval)/hz;
5467 if (sc->sc_opmode != HAL_M_HOSTAP)
5470 nextcal = ath_longcalinterval*hz;
5471 sc->sc_lastlongcal = ticks;
5472 if (sc->sc_lastcalreset == 0)
5473 sc->sc_lastcalreset = sc->sc_lastlongcal;
5474 else if (ticks - sc->sc_lastcalreset >= ath_resetcalinterval*hz)
5475 sc->sc_resetcal = 1; /* setup reset next trip */
5479 DPRINTF(sc, ATH_DEBUG_CALIBRATE, "%s: next +%u (%sisCalDone)\n",
5480 __func__, nextcal, isCalDone ? "" : "!");
5481 callout_reset(&sc->sc_cal_ch, nextcal,
5482 ath_calibrate_callout, sc);
5484 DPRINTF(sc, ATH_DEBUG_CALIBRATE, "%s: calibration disabled\n",
5486 /* NB: don't rearm timer */
5488 wlan_serialize_exit();
5492 ath_scan_start(struct ieee80211com *ic)
5494 struct ifnet *ifp = ic->ic_ifp;
5495 struct ath_softc *sc = ifp->if_softc;
5496 struct ath_hal *ah = sc->sc_ah;
5499 /* XXX calibration timer? */
5501 sc->sc_scanning = 1;
5502 sc->sc_syncbeacon = 0;
5503 rfilt = ath_calcrxfilter(sc);
5504 ath_hal_setrxfilter(ah, rfilt);
5505 ath_hal_setassocid(ah, ifp->if_broadcastaddr, 0);
5507 DPRINTF(sc, ATH_DEBUG_STATE, "%s: RX filter 0x%x bssid %6D aid 0\n",
5508 __func__, rfilt, ifp->if_broadcastaddr, ":");
5512 ath_scan_end(struct ieee80211com *ic)
5514 struct ifnet *ifp = ic->ic_ifp;
5515 struct ath_softc *sc = ifp->if_softc;
5516 struct ath_hal *ah = sc->sc_ah;
5519 sc->sc_scanning = 0;
5520 rfilt = ath_calcrxfilter(sc);
5521 ath_hal_setrxfilter(ah, rfilt);
5522 ath_hal_setassocid(ah, sc->sc_curbssid, sc->sc_curaid);
5524 ath_hal_process_noisefloor(ah);
5526 DPRINTF(sc, ATH_DEBUG_STATE, "%s: RX filter 0x%x bssid %6D aid 0x%x\n",
5527 __func__, rfilt, sc->sc_curbssid, ":",
5532 ath_set_channel(struct ieee80211com *ic)
5534 struct ifnet *ifp = ic->ic_ifp;
5535 struct ath_softc *sc = ifp->if_softc;
5537 (void) ath_chan_set(sc, ic->ic_curchan);
5539 * If we are returning to our bss channel then mark state
5540 * so the next recv'd beacon's tsf will be used to sync the
5541 * beacon timers. Note that since we only hear beacons in
5542 * sta/ibss mode this has no effect in other operating modes.
5544 if (!sc->sc_scanning && ic->ic_curchan == ic->ic_bsschan)
5545 sc->sc_syncbeacon = 1;
5549 * Walk the vap list and check if there any vap's in RUN state.
5552 ath_isanyrunningvaps(struct ieee80211vap *this)
5554 struct ieee80211com *ic = this->iv_ic;
5555 struct ieee80211vap *vap;
5557 TAILQ_FOREACH(vap, &ic->ic_vaps, iv_next) {
5558 if (vap != this && vap->iv_state >= IEEE80211_S_RUN)
5565 ath_newstate(struct ieee80211vap *vap, enum ieee80211_state nstate, int arg)
5567 struct ieee80211com *ic = vap->iv_ic;
5568 struct ath_softc *sc = ic->ic_ifp->if_softc;
5569 struct ath_vap *avp = ATH_VAP(vap);
5570 struct ath_hal *ah = sc->sc_ah;
5571 struct ieee80211_node *ni = NULL;
5572 int i, error, stamode;
5574 static const HAL_LED_STATE leds[] = {
5575 HAL_LED_INIT, /* IEEE80211_S_INIT */
5576 HAL_LED_SCAN, /* IEEE80211_S_SCAN */
5577 HAL_LED_AUTH, /* IEEE80211_S_AUTH */
5578 HAL_LED_ASSOC, /* IEEE80211_S_ASSOC */
5579 HAL_LED_RUN, /* IEEE80211_S_CAC */
5580 HAL_LED_RUN, /* IEEE80211_S_RUN */
5581 HAL_LED_RUN, /* IEEE80211_S_CSA */
5582 HAL_LED_RUN, /* IEEE80211_S_SLEEP */
5585 DPRINTF(sc, ATH_DEBUG_STATE, "%s: %s -> %s\n", __func__,
5586 ieee80211_state_name[vap->iv_state],
5587 ieee80211_state_name[nstate]);
5589 callout_stop(&sc->sc_cal_ch);
5590 ath_hal_setledstate(ah, leds[nstate]); /* set LED */
5592 if (nstate == IEEE80211_S_SCAN) {
5594 * Scanning: turn off beacon miss and don't beacon.
5595 * Mark beacon state so when we reach RUN state we'll
5596 * [re]setup beacons. Unblock the task q thread so
5597 * deferred interrupt processing is done.
5600 sc->sc_imask &~ (HAL_INT_SWBA | HAL_INT_BMISS));
5601 sc->sc_imask &= ~(HAL_INT_SWBA | HAL_INT_BMISS);
5603 taskqueue_unblock(sc->sc_tq);
5607 rfilt = ath_calcrxfilter(sc);
5608 stamode = (vap->iv_opmode == IEEE80211_M_STA ||
5609 vap->iv_opmode == IEEE80211_M_AHDEMO ||
5610 vap->iv_opmode == IEEE80211_M_IBSS);
5611 if (stamode && nstate == IEEE80211_S_RUN) {
5612 sc->sc_curaid = ni->ni_associd;
5613 IEEE80211_ADDR_COPY(sc->sc_curbssid, ni->ni_bssid);
5614 ath_hal_setassocid(ah, sc->sc_curbssid, sc->sc_curaid);
5616 DPRINTF(sc, ATH_DEBUG_STATE, "%s: RX filter 0x%x bssid %6D aid 0x%x\n",
5617 __func__, rfilt, sc->sc_curbssid, ":", sc->sc_curaid);
5618 ath_hal_setrxfilter(ah, rfilt);
5620 /* XXX is this to restore keycache on resume? */
5621 if (vap->iv_opmode != IEEE80211_M_STA &&
5622 (vap->iv_flags & IEEE80211_F_PRIVACY)) {
5623 for (i = 0; i < IEEE80211_WEP_NKID; i++)
5624 if (ath_hal_keyisvalid(ah, i))
5625 ath_hal_keysetmac(ah, i, ni->ni_bssid);
5629 * Invoke the parent method to do net80211 work.
5631 error = avp->av_newstate(vap, nstate, arg);
5635 if (nstate == IEEE80211_S_RUN) {
5636 /* NB: collect bss node again, it may have changed */
5639 DPRINTF(sc, ATH_DEBUG_STATE,
5640 "%s(RUN): iv_flags 0x%08x bintvl %d bssid %6D "
5641 "capinfo 0x%04x chan %d\n", __func__,
5642 vap->iv_flags, ni->ni_intval, ni->ni_bssid, ":",
5643 ni->ni_capinfo, ieee80211_chan2ieee(ic, ic->ic_curchan));
5645 switch (vap->iv_opmode) {
5646 #ifdef IEEE80211_SUPPORT_TDMA
5647 case IEEE80211_M_AHDEMO:
5648 if ((vap->iv_caps & IEEE80211_C_TDMA) == 0)
5652 case IEEE80211_M_HOSTAP:
5653 case IEEE80211_M_IBSS:
5654 case IEEE80211_M_MBSS:
5656 * Allocate and setup the beacon frame.
5658 * Stop any previous beacon DMA. This may be
5659 * necessary, for example, when an ibss merge
5660 * causes reconfiguration; there will be a state
5661 * transition from RUN->RUN that means we may
5662 * be called with beacon transmission active.
5664 ath_hal_stoptxdma(ah, sc->sc_bhalq);
5666 error = ath_beacon_alloc(sc, ni);
5670 * If joining an adhoc network defer beacon timer
5671 * configuration to the next beacon frame so we
5672 * have a current TSF to use. Otherwise we're
5673 * starting an ibss/bss so there's no need to delay;
5674 * if this is the first vap moving to RUN state, then
5675 * beacon state needs to be [re]configured.
5677 if (vap->iv_opmode == IEEE80211_M_IBSS &&
5678 ni->ni_tstamp.tsf != 0) {
5679 sc->sc_syncbeacon = 1;
5680 } else if (!sc->sc_beacons) {
5681 #ifdef IEEE80211_SUPPORT_TDMA
5682 if (vap->iv_caps & IEEE80211_C_TDMA)
5683 ath_tdma_config(sc, vap);
5686 ath_beacon_config(sc, vap);
5690 case IEEE80211_M_STA:
5692 * Defer beacon timer configuration to the next
5693 * beacon frame so we have a current TSF to use
5694 * (any TSF collected when scanning is likely old).
5696 sc->sc_syncbeacon = 1;
5698 case IEEE80211_M_MONITOR:
5700 * Monitor mode vaps have only INIT->RUN and RUN->RUN
5701 * transitions so we must re-enable interrupts here to
5702 * handle the case of a single monitor mode vap.
5704 ath_hal_intrset(ah, sc->sc_imask);
5706 case IEEE80211_M_WDS:
5712 * Let the hal process statistics collected during a
5713 * scan so it can provide calibrated noise floor data.
5715 ath_hal_process_noisefloor(ah);
5717 * Reset rssi stats; maybe not the best place...
5719 sc->sc_halstats.ns_avgbrssi = ATH_RSSI_DUMMY_MARKER;
5720 sc->sc_halstats.ns_avgrssi = ATH_RSSI_DUMMY_MARKER;
5721 sc->sc_halstats.ns_avgtxrssi = ATH_RSSI_DUMMY_MARKER;
5723 * Finally, start any timers and the task q thread
5724 * (in case we didn't go through SCAN state).
5726 if (ath_longcalinterval != 0) {
5727 /* start periodic recalibration timer */
5728 callout_reset(&sc->sc_cal_ch, 1,
5729 ath_calibrate_callout, sc);
5731 DPRINTF(sc, ATH_DEBUG_CALIBRATE,
5732 "%s: calibration disabled\n", __func__);
5734 taskqueue_unblock(sc->sc_tq);
5735 } else if (nstate == IEEE80211_S_INIT) {
5737 * If there are no vaps left in RUN state then
5738 * shutdown host/driver operation:
5739 * o disable interrupts
5740 * o disable the task queue thread
5741 * o mark beacon processing as stopped
5743 if (!ath_isanyrunningvaps(vap)) {
5744 sc->sc_imask &= ~(HAL_INT_SWBA | HAL_INT_BMISS);
5745 /* disable interrupts */
5746 ath_hal_intrset(ah, sc->sc_imask &~ HAL_INT_GLOBAL);
5747 taskqueue_block(sc->sc_tq);
5750 #ifdef IEEE80211_SUPPORT_TDMA
5751 ath_hal_setcca(ah, AH_TRUE);
5759 * Allocate a key cache slot to the station so we can
5760 * setup a mapping from key index to node. The key cache
5761 * slot is needed for managing antenna state and for
5762 * compression when stations do not use crypto. We do
5763 * it uniliaterally here; if crypto is employed this slot
5764 * will be reassigned.
5767 ath_setup_stationkey(struct ieee80211_node *ni)
5769 struct ieee80211vap *vap = ni->ni_vap;
5770 struct ath_softc *sc = vap->iv_ic->ic_ifp->if_softc;
5771 ieee80211_keyix keyix, rxkeyix;
5773 if (!ath_key_alloc(vap, &ni->ni_ucastkey, &keyix, &rxkeyix)) {
5775 * Key cache is full; we'll fall back to doing
5776 * the more expensive lookup in software. Note
5777 * this also means no h/w compression.
5779 /* XXX msg+statistic */
5782 ni->ni_ucastkey.wk_keyix = keyix;
5783 ni->ni_ucastkey.wk_rxkeyix = rxkeyix;
5784 /* NB: must mark device key to get called back on delete */
5785 ni->ni_ucastkey.wk_flags |= IEEE80211_KEY_DEVKEY;
5786 IEEE80211_ADDR_COPY(ni->ni_ucastkey.wk_macaddr, ni->ni_macaddr);
5787 /* NB: this will create a pass-thru key entry */
5788 ath_keyset(sc, &ni->ni_ucastkey, vap->iv_bss);
5793 * Setup driver-specific state for a newly associated node.
5794 * Note that we're called also on a re-associate, the isnew
5795 * param tells us if this is the first time or not.
5798 ath_newassoc(struct ieee80211_node *ni, int isnew)
5800 struct ath_node *an = ATH_NODE(ni);
5801 struct ieee80211vap *vap = ni->ni_vap;
5802 struct ath_softc *sc = vap->iv_ic->ic_ifp->if_softc;
5803 const struct ieee80211_txparam *tp = ni->ni_txparms;
5805 an->an_mcastrix = ath_tx_findrix(sc, tp->mcastrate);
5806 an->an_mgmtrix = ath_tx_findrix(sc, tp->mgmtrate);
5808 ath_rate_newassoc(sc, an, isnew);
5810 (vap->iv_flags & IEEE80211_F_PRIVACY) == 0 && sc->sc_hasclrkey &&
5811 ni->ni_ucastkey.wk_keyix == IEEE80211_KEYIX_NONE)
5812 ath_setup_stationkey(ni);
5816 ath_setregdomain(struct ieee80211com *ic, struct ieee80211_regdomain *reg,
5817 int nchans, struct ieee80211_channel chans[])
5819 struct ath_softc *sc = ic->ic_ifp->if_softc;
5820 struct ath_hal *ah = sc->sc_ah;
5823 DPRINTF(sc, ATH_DEBUG_REGDOMAIN,
5824 "%s: rd %u cc %u location %c%s\n",
5825 __func__, reg->regdomain, reg->country, reg->location,
5826 reg->ecm ? " ecm" : "");
5828 status = ath_hal_set_channels(ah, chans, nchans,
5829 reg->country, reg->regdomain);
5830 if (status != HAL_OK) {
5831 DPRINTF(sc, ATH_DEBUG_REGDOMAIN, "%s: failed, status %u\n",
5833 return EINVAL; /* XXX */
5839 ath_getradiocaps(struct ieee80211com *ic,
5840 int maxchans, int *nchans, struct ieee80211_channel chans[])
5842 struct ath_softc *sc = ic->ic_ifp->if_softc;
5843 struct ath_hal *ah = sc->sc_ah;
5845 DPRINTF(sc, ATH_DEBUG_REGDOMAIN, "%s: use rd %u cc %d\n",
5846 __func__, SKU_DEBUG, CTRY_DEFAULT);
5848 /* XXX check return */
5849 (void) ath_hal_getchannels(ah, chans, maxchans, nchans,
5850 HAL_MODE_ALL, CTRY_DEFAULT, SKU_DEBUG, AH_TRUE);
5855 ath_getchannels(struct ath_softc *sc)
5857 struct ifnet *ifp = sc->sc_ifp;
5858 struct ieee80211com *ic = ifp->if_l2com;
5859 struct ath_hal *ah = sc->sc_ah;
5863 * Collect channel set based on EEPROM contents.
5865 status = ath_hal_init_channels(ah, ic->ic_channels, IEEE80211_CHAN_MAX,
5866 &ic->ic_nchans, HAL_MODE_ALL, CTRY_DEFAULT, SKU_NONE, AH_TRUE);
5867 if (status != HAL_OK) {
5868 if_printf(ifp, "%s: unable to collect channel list from hal, "
5869 "status %d\n", __func__, status);
5872 (void) ath_hal_getregdomain(ah, &sc->sc_eerd);
5873 ath_hal_getcountrycode(ah, &sc->sc_eecc); /* NB: cannot fail */
5874 /* XXX map Atheros sku's to net80211 SKU's */
5875 /* XXX net80211 types too small */
5876 ic->ic_regdomain.regdomain = (uint16_t) sc->sc_eerd;
5877 ic->ic_regdomain.country = (uint16_t) sc->sc_eecc;
5878 ic->ic_regdomain.isocc[0] = ' '; /* XXX don't know */
5879 ic->ic_regdomain.isocc[1] = ' ';
5881 ic->ic_regdomain.ecm = 1;
5882 ic->ic_regdomain.location = 'I';
5884 DPRINTF(sc, ATH_DEBUG_REGDOMAIN,
5885 "%s: eeprom rd %u cc %u (mapped rd %u cc %u) location %c%s\n",
5886 __func__, sc->sc_eerd, sc->sc_eecc,
5887 ic->ic_regdomain.regdomain, ic->ic_regdomain.country,
5888 ic->ic_regdomain.location, ic->ic_regdomain.ecm ? " ecm" : "");
5893 ath_led_done_callout(void *arg)
5895 struct ath_softc *sc = arg;
5897 wlan_serialize_enter();
5898 sc->sc_blinking = 0;
5899 wlan_serialize_exit();
5903 * Turn the LED off: flip the pin and then set a timer so no
5904 * update will happen for the specified duration.
5907 ath_led_off_callout(void *arg)
5909 struct ath_softc *sc = arg;
5911 wlan_serialize_enter();
5912 ath_hal_gpioset(sc->sc_ah, sc->sc_ledpin, !sc->sc_ledon);
5913 callout_reset(&sc->sc_ledtimer, sc->sc_ledoff,
5914 ath_led_done_callout, sc);
5915 wlan_serialize_exit();
5919 * Blink the LED according to the specified on/off times.
5922 ath_led_blink(struct ath_softc *sc, int on, int off)
5924 DPRINTF(sc, ATH_DEBUG_LED, "%s: on %u off %u\n", __func__, on, off);
5925 ath_hal_gpioset(sc->sc_ah, sc->sc_ledpin, sc->sc_ledon);
5926 sc->sc_blinking = 1;
5927 sc->sc_ledoff = off;
5928 callout_reset(&sc->sc_ledtimer, on, ath_led_off_callout, sc);
5932 ath_led_event(struct ath_softc *sc, int rix)
5934 sc->sc_ledevent = ticks; /* time of last event */
5935 if (sc->sc_blinking) /* don't interrupt active blink */
5937 ath_led_blink(sc, sc->sc_hwmap[rix].ledon, sc->sc_hwmap[rix].ledoff);
5941 ath_rate_setup(struct ath_softc *sc, u_int mode)
5943 struct ath_hal *ah = sc->sc_ah;
5944 const HAL_RATE_TABLE *rt;
5947 case IEEE80211_MODE_11A:
5948 rt = ath_hal_getratetable(ah, HAL_MODE_11A);
5950 case IEEE80211_MODE_HALF:
5951 rt = ath_hal_getratetable(ah, HAL_MODE_11A_HALF_RATE);
5953 case IEEE80211_MODE_QUARTER:
5954 rt = ath_hal_getratetable(ah, HAL_MODE_11A_QUARTER_RATE);
5956 case IEEE80211_MODE_11B:
5957 rt = ath_hal_getratetable(ah, HAL_MODE_11B);
5959 case IEEE80211_MODE_11G:
5960 rt = ath_hal_getratetable(ah, HAL_MODE_11G);
5962 case IEEE80211_MODE_TURBO_A:
5963 rt = ath_hal_getratetable(ah, HAL_MODE_108A);
5965 case IEEE80211_MODE_TURBO_G:
5966 rt = ath_hal_getratetable(ah, HAL_MODE_108G);
5968 case IEEE80211_MODE_STURBO_A:
5969 rt = ath_hal_getratetable(ah, HAL_MODE_TURBO);
5971 case IEEE80211_MODE_11NA:
5972 rt = ath_hal_getratetable(ah, HAL_MODE_11NA_HT20);
5974 case IEEE80211_MODE_11NG:
5975 rt = ath_hal_getratetable(ah, HAL_MODE_11NG_HT20);
5978 DPRINTF(sc, ATH_DEBUG_ANY, "%s: invalid mode %u\n",
5982 sc->sc_rates[mode] = rt;
5983 return (rt != NULL);
5987 ath_setcurmode(struct ath_softc *sc, enum ieee80211_phymode mode)
5989 #define N(a) (sizeof(a)/sizeof(a[0]))
5990 /* NB: on/off times from the Atheros NDIS driver, w/ permission */
5991 static const struct {
5992 u_int rate; /* tx/rx 802.11 rate */
5993 u_int16_t timeOn; /* LED on time (ms) */
5994 u_int16_t timeOff; /* LED off time (ms) */
6010 /* XXX half/quarter rates */
6012 const HAL_RATE_TABLE *rt;
6015 memset(sc->sc_rixmap, 0xff, sizeof(sc->sc_rixmap));
6016 rt = sc->sc_rates[mode];
6017 KASSERT(rt != NULL, ("no h/w rate set for phy mode %u", mode));
6018 for (i = 0; i < rt->rateCount; i++) {
6019 uint8_t ieeerate = rt->info[i].dot11Rate & IEEE80211_RATE_VAL;
6020 if (rt->info[i].phy != IEEE80211_T_HT)
6021 sc->sc_rixmap[ieeerate] = i;
6023 sc->sc_rixmap[ieeerate | IEEE80211_RATE_MCS] = i;
6025 memset(sc->sc_hwmap, 0, sizeof(sc->sc_hwmap));
6026 for (i = 0; i < N(sc->sc_hwmap); i++) {
6027 if (i >= rt->rateCount) {
6028 sc->sc_hwmap[i].ledon = (500 * hz) / 1000;
6029 sc->sc_hwmap[i].ledoff = (130 * hz) / 1000;
6032 sc->sc_hwmap[i].ieeerate =
6033 rt->info[i].dot11Rate & IEEE80211_RATE_VAL;
6034 if (rt->info[i].phy == IEEE80211_T_HT)
6035 sc->sc_hwmap[i].ieeerate |= IEEE80211_RATE_MCS;
6036 sc->sc_hwmap[i].txflags = IEEE80211_RADIOTAP_F_DATAPAD;
6037 if (rt->info[i].shortPreamble ||
6038 rt->info[i].phy == IEEE80211_T_OFDM)
6039 sc->sc_hwmap[i].txflags |= IEEE80211_RADIOTAP_F_SHORTPRE;
6040 sc->sc_hwmap[i].rxflags = sc->sc_hwmap[i].txflags;
6041 for (j = 0; j < N(blinkrates)-1; j++)
6042 if (blinkrates[j].rate == sc->sc_hwmap[i].ieeerate)
6044 /* NB: this uses the last entry if the rate isn't found */
6045 /* XXX beware of overlow */
6046 sc->sc_hwmap[i].ledon = (blinkrates[j].timeOn * hz) / 1000;
6047 sc->sc_hwmap[i].ledoff = (blinkrates[j].timeOff * hz) / 1000;
6049 sc->sc_currates = rt;
6050 sc->sc_curmode = mode;
6052 * All protection frames are transmited at 2Mb/s for
6053 * 11g, otherwise at 1Mb/s.
6055 if (mode == IEEE80211_MODE_11G)
6056 sc->sc_protrix = ath_tx_findrix(sc, 2*2);
6058 sc->sc_protrix = ath_tx_findrix(sc, 2*1);
6059 /* NB: caller is responsible for reseting rate control state */
6065 ath_printrxbuf(struct ath_softc *sc, const struct ath_buf *bf,
6068 const struct ath_rx_status *rs = &bf->bf_status.ds_rxstat;
6069 struct ath_hal *ah = sc->sc_ah;
6070 const struct ath_desc *ds;
6073 for (i = 0, ds = bf->bf_desc; i < bf->bf_nseg; i++, ds++) {
6074 kprintf("R[%2u] (DS.V:%p DS.P:%p) L:%08x D:%08x%s\n"
6075 " %08x %08x %08x %08x\n",
6076 ix, ds, (const struct ath_desc *)bf->bf_daddr + i,
6077 ds->ds_link, ds->ds_data,
6078 !done ? "" : (rs->rs_status == 0) ? " *" : " !",
6079 ds->ds_ctl0, ds->ds_ctl1,
6080 ds->ds_hw[0], ds->ds_hw[1]);
6081 if (ah->ah_magic == 0x20065416) {
6082 kprintf(" %08x %08x %08x %08x %08x %08x %08x\n",
6083 ds->ds_hw[2], ds->ds_hw[3], ds->ds_hw[4],
6084 ds->ds_hw[5], ds->ds_hw[6], ds->ds_hw[7],
6091 ath_printtxbuf(struct ath_softc *sc, const struct ath_buf *bf,
6092 u_int qnum, u_int ix, int done)
6094 const struct ath_tx_status *ts = &bf->bf_status.ds_txstat;
6095 struct ath_hal *ah = sc->sc_ah;
6096 const struct ath_desc *ds;
6099 kprintf("Q%u[%3u]", qnum, ix);
6100 for (i = 0, ds = bf->bf_desc; i < bf->bf_nseg; i++, ds++) {
6101 kprintf(" (DS.V:%p DS.P:%p) L:%08x D:%08x F:04%x%s\n"
6102 " %08x %08x %08x %08x %08x %08x\n",
6103 ds, (const struct ath_desc *)bf->bf_daddr + i,
6104 ds->ds_link, ds->ds_data, bf->bf_txflags,
6105 !done ? "" : (ts->ts_status == 0) ? " *" : " !",
6106 ds->ds_ctl0, ds->ds_ctl1,
6107 ds->ds_hw[0], ds->ds_hw[1], ds->ds_hw[2], ds->ds_hw[3]);
6108 if (ah->ah_magic == 0x20065416) {
6109 kprintf(" %08x %08x %08x %08x %08x %08x %08x %08x\n",
6110 ds->ds_hw[4], ds->ds_hw[5], ds->ds_hw[6],
6111 ds->ds_hw[7], ds->ds_hw[8], ds->ds_hw[9],
6112 ds->ds_hw[10],ds->ds_hw[11]);
6113 kprintf(" %08x %08x %08x %08x %08x %08x %08x %08x\n",
6114 ds->ds_hw[12],ds->ds_hw[13],ds->ds_hw[14],
6115 ds->ds_hw[15],ds->ds_hw[16],ds->ds_hw[17],
6116 ds->ds_hw[18], ds->ds_hw[19]);
6120 #endif /* ATH_DEBUG */
6123 ath_watchdog_callout(void *arg)
6125 struct ath_softc *sc = arg;
6127 wlan_serialize_enter();
6128 if (sc->sc_wd_timer != 0 && --sc->sc_wd_timer == 0) {
6129 struct ifnet *ifp = sc->sc_ifp;
6132 if (ath_hal_gethangstate(sc->sc_ah, 0xffff, &hangs) &&
6134 if_printf(ifp, "%s hang detected (0x%x)\n",
6135 hangs & 0xff ? "bb" : "mac", hangs);
6137 if_printf(ifp, "device timeout\n");
6140 sc->sc_stats.ast_watchdog++;
6142 callout_reset(&sc->sc_wd_ch, hz, ath_watchdog_callout, sc);
6143 wlan_serialize_exit();
6148 * Diagnostic interface to the HAL. This is used by various
6149 * tools to do things like retrieve register contents for
6150 * debugging. The mechanism is intentionally opaque so that
6151 * it can change frequently w/o concern for compatiblity.
6154 ath_ioctl_diag(struct ath_softc *sc, struct ath_diag *ad)
6156 struct ath_hal *ah = sc->sc_ah;
6157 u_int id = ad->ad_id & ATH_DIAG_ID;
6158 void *indata = NULL;
6159 void *outdata = NULL;
6160 u_int32_t insize = ad->ad_in_size;
6161 u_int32_t outsize = ad->ad_out_size;
6164 if (ad->ad_id & ATH_DIAG_IN) {
6168 indata = kmalloc(insize, M_TEMP, M_INTWAIT);
6169 if (indata == NULL) {
6173 error = copyin(ad->ad_in_data, indata, insize);
6177 if (ad->ad_id & ATH_DIAG_DYN) {
6179 * Allocate a buffer for the results (otherwise the HAL
6180 * returns a pointer to a buffer where we can read the
6181 * results). Note that we depend on the HAL leaving this
6182 * pointer for us to use below in reclaiming the buffer;
6183 * may want to be more defensive.
6185 outdata = kmalloc(outsize, M_TEMP, M_INTWAIT);
6186 if (outdata == NULL) {
6191 if (ath_hal_getdiagstate(ah, id, indata, insize, &outdata, &outsize)) {
6192 if (outsize < ad->ad_out_size)
6193 ad->ad_out_size = outsize;
6194 if (outdata != NULL)
6195 error = copyout(outdata, ad->ad_out_data,
6201 if ((ad->ad_id & ATH_DIAG_IN) && indata != NULL)
6202 kfree(indata, M_TEMP);
6203 if ((ad->ad_id & ATH_DIAG_DYN) && outdata != NULL)
6204 kfree(outdata, M_TEMP);
6207 #endif /* ATH_DIAGAPI */
6210 ath_ioctl(struct ifnet *ifp, u_long cmd, caddr_t data, struct ucred *ucred)
6212 #define IS_RUNNING(ifp) \
6213 ((ifp->if_flags & IFF_UP) && (ifp->if_flags & IFF_RUNNING))
6214 struct ath_softc *sc = ifp->if_softc;
6215 struct ieee80211com *ic = ifp->if_l2com;
6216 struct ifreq *ifr = (struct ifreq *)data;
6217 const HAL_RATE_TABLE *rt;
6222 if (IS_RUNNING(ifp)) {
6224 * To avoid rescanning another access point,
6225 * do not call ath_init() here. Instead,
6226 * only reflect promisc mode settings.
6229 } else if (ifp->if_flags & IFF_UP) {
6231 * Beware of being called during attach/detach
6232 * to reset promiscuous mode. In that case we
6233 * will still be marked UP but not RUNNING.
6234 * However trying to re-init the interface
6235 * is the wrong thing to do as we've already
6236 * torn down much of our state. There's
6237 * probably a better way to deal with this.
6239 if (!sc->sc_invalid)
6240 ath_init(sc); /* XXX lose error */
6242 ath_stop_locked(ifp);
6244 /* XXX must wakeup in places like ath_vap_delete */
6245 if (!sc->sc_invalid)
6246 ath_hal_setpower(sc->sc_ah, HAL_PM_FULL_SLEEP);
6252 error = ifmedia_ioctl(ifp, ifr, &ic->ic_media, cmd);
6255 /* NB: embed these numbers to get a consistent view */
6256 sc->sc_stats.ast_tx_packets = ifp->if_opackets;
6257 sc->sc_stats.ast_rx_packets = ifp->if_ipackets;
6258 sc->sc_stats.ast_tx_rssi = ATH_RSSI(sc->sc_halstats.ns_avgtxrssi);
6259 sc->sc_stats.ast_rx_rssi = ATH_RSSI(sc->sc_halstats.ns_avgrssi);
6260 #ifdef IEEE80211_SUPPORT_TDMA
6261 sc->sc_stats.ast_tdma_tsfadjp = TDMA_AVG(sc->sc_avgtsfdeltap);
6262 sc->sc_stats.ast_tdma_tsfadjm = TDMA_AVG(sc->sc_avgtsfdeltam);
6264 rt = sc->sc_currates;
6266 sc->sc_stats.ast_tx_rate =
6267 rt->info[sc->sc_txrix].dot11Rate &~ IEEE80211_RATE_BASIC;
6268 return copyout(&sc->sc_stats,
6269 ifr->ifr_data, sizeof (sc->sc_stats));
6271 error = priv_check(curthread, PRIV_DRIVER);
6273 memset(&sc->sc_stats, 0, sizeof(sc->sc_stats));
6277 error = ath_ioctl_diag(sc, (struct ath_diag *) ifr);
6281 error = ether_ioctl(ifp, cmd, data);
6292 ath_sysctl_slottime(SYSCTL_HANDLER_ARGS)
6294 struct ath_softc *sc = arg1;
6298 wlan_serialize_enter();
6299 slottime = ath_hal_getslottime(sc->sc_ah);
6300 error = sysctl_handle_int(oidp, &slottime, 0, req);
6301 if (error == 0 && req->newptr) {
6302 if (!ath_hal_setslottime(sc->sc_ah, slottime))
6305 wlan_serialize_exit();
6310 ath_sysctl_acktimeout(SYSCTL_HANDLER_ARGS)
6312 struct ath_softc *sc = arg1;
6316 wlan_serialize_enter();
6317 acktimeout = ath_hal_getacktimeout(sc->sc_ah);
6318 error = sysctl_handle_int(oidp, &acktimeout, 0, req);
6319 if (error == 0 && req->newptr) {
6320 if (!ath_hal_setacktimeout(sc->sc_ah, acktimeout))
6323 wlan_serialize_exit();
6328 ath_sysctl_ctstimeout(SYSCTL_HANDLER_ARGS)
6330 struct ath_softc *sc = arg1;
6334 wlan_serialize_enter();
6335 ctstimeout = ath_hal_getctstimeout(sc->sc_ah);
6336 error = sysctl_handle_int(oidp, &ctstimeout, 0, req);
6337 if (error == 0 && req->newptr) {
6338 if (!ath_hal_setctstimeout(sc->sc_ah, ctstimeout))
6341 wlan_serialize_exit();
6346 ath_sysctl_softled(SYSCTL_HANDLER_ARGS)
6348 struct ath_softc *sc = arg1;
6349 int softled = sc->sc_softled;
6352 error = sysctl_handle_int(oidp, &softled, 0, req);
6353 if (error || !req->newptr)
6355 wlan_serialize_enter();
6356 softled = (softled != 0);
6357 if (softled != sc->sc_softled) {
6359 /* NB: handle any sc_ledpin change */
6360 ath_hal_gpioCfgOutput(sc->sc_ah, sc->sc_ledpin,
6361 HAL_GPIO_MUX_MAC_NETWORK_LED);
6362 ath_hal_gpioset(sc->sc_ah, sc->sc_ledpin,
6365 sc->sc_softled = softled;
6367 wlan_serialize_exit();
6372 ath_sysctl_ledpin(SYSCTL_HANDLER_ARGS)
6374 struct ath_softc *sc = arg1;
6375 int ledpin = sc->sc_ledpin;
6378 error = sysctl_handle_int(oidp, &ledpin, 0, req);
6379 if (error || !req->newptr)
6381 wlan_serialize_enter();
6382 if (ledpin != sc->sc_ledpin) {
6383 sc->sc_ledpin = ledpin;
6384 if (sc->sc_softled) {
6385 ath_hal_gpioCfgOutput(sc->sc_ah, sc->sc_ledpin,
6386 HAL_GPIO_MUX_MAC_NETWORK_LED);
6387 ath_hal_gpioset(sc->sc_ah, sc->sc_ledpin,
6391 wlan_serialize_exit();
6396 ath_sysctl_txantenna(SYSCTL_HANDLER_ARGS)
6398 struct ath_softc *sc = arg1;
6402 wlan_serialize_enter();
6403 txantenna = ath_hal_getantennaswitch(sc->sc_ah);
6404 error = sysctl_handle_int(oidp, &txantenna, 0, req);
6406 if (!error && req->newptr) {
6407 /* XXX assumes 2 antenna ports */
6408 if (txantenna < HAL_ANT_VARIABLE ||
6409 txantenna > HAL_ANT_FIXED_B) {
6412 ath_hal_setantennaswitch(sc->sc_ah, txantenna);
6414 * NB: with the switch locked this isn't meaningful,
6415 * but set it anyway so things like radiotap get
6416 * consistent info in their data.
6418 sc->sc_txantenna = txantenna;
6421 wlan_serialize_exit();
6426 ath_sysctl_rxantenna(SYSCTL_HANDLER_ARGS)
6428 struct ath_softc *sc = arg1;
6432 wlan_serialize_enter();
6433 defantenna = ath_hal_getdefantenna(sc->sc_ah);
6434 error = sysctl_handle_int(oidp, &defantenna, 0, req);
6435 if (error == 0 && req->newptr)
6436 ath_hal_setdefantenna(sc->sc_ah, defantenna);
6437 wlan_serialize_exit();
6442 ath_sysctl_diversity(SYSCTL_HANDLER_ARGS)
6444 struct ath_softc *sc = arg1;
6448 wlan_serialize_enter();
6449 diversity = ath_hal_getdiversity(sc->sc_ah);
6450 error = sysctl_handle_int(oidp, &diversity, 0, req);
6451 if (error == 0 && req->newptr) {
6452 if (!ath_hal_setdiversity(sc->sc_ah, diversity))
6455 sc->sc_diversity = diversity;
6457 wlan_serialize_exit();
6462 ath_sysctl_diag(SYSCTL_HANDLER_ARGS)
6464 struct ath_softc *sc = arg1;
6468 wlan_serialize_enter();
6469 if (!ath_hal_getdiag(sc->sc_ah, &diag)) {
6472 error = sysctl_handle_int(oidp, &diag, 0, req);
6473 if (error == 0 && req->newptr) {
6474 if (!ath_hal_setdiag(sc->sc_ah, diag))
6478 wlan_serialize_exit();
6483 ath_sysctl_tpscale(SYSCTL_HANDLER_ARGS)
6485 struct ath_softc *sc = arg1;
6486 struct ifnet *ifp = sc->sc_ifp;
6490 wlan_serialize_enter();
6491 (void)ath_hal_gettpscale(sc->sc_ah, &scale);
6492 error = sysctl_handle_int(oidp, &scale, 0, req);
6493 if (error == 0 && req->newptr) {
6494 if (!ath_hal_settpscale(sc->sc_ah, scale))
6496 else if (ifp->if_flags & IFF_RUNNING)
6497 error = ath_reset(ifp);
6499 wlan_serialize_exit();
6504 ath_sysctl_tpc(SYSCTL_HANDLER_ARGS)
6506 struct ath_softc *sc = arg1;
6510 wlan_serialize_enter();
6511 tpc = ath_hal_gettpc(sc->sc_ah);
6512 error = sysctl_handle_int(oidp, &tpc, 0, req);
6513 if (error == 0 && req->newptr) {
6514 if (!ath_hal_settpc(sc->sc_ah, tpc))
6517 wlan_serialize_exit();
6522 ath_sysctl_rfkill(SYSCTL_HANDLER_ARGS)
6524 struct ath_softc *sc = arg1;
6530 wlan_serialize_enter();
6533 rfkill = ath_hal_getrfkill(ah);
6535 error = sysctl_handle_int(oidp, &rfkill, 0, req);
6536 if (error == 0 && req->newptr) {
6537 if (rfkill != ath_hal_getrfkill(ah)) {
6538 if (!ath_hal_setrfkill(ah, rfkill))
6540 else if (ifp->if_flags & IFF_RUNNING)
6541 error = ath_reset(ifp);
6544 wlan_serialize_exit();
6549 ath_sysctl_rfsilent(SYSCTL_HANDLER_ARGS)
6551 struct ath_softc *sc = arg1;
6555 wlan_serialize_enter();
6556 (void)ath_hal_getrfsilent(sc->sc_ah, &rfsilent);
6557 error = sysctl_handle_int(oidp, &rfsilent, 0, req);
6558 if (error == 0 && req->newptr) {
6559 if (!ath_hal_setrfsilent(sc->sc_ah, rfsilent)) {
6562 sc->sc_rfsilentpin = rfsilent & 0x1c;
6563 sc->sc_rfsilentpol = (rfsilent & 0x2) != 0;
6566 wlan_serialize_exit();
6571 ath_sysctl_tpack(SYSCTL_HANDLER_ARGS)
6573 struct ath_softc *sc = arg1;
6577 wlan_serialize_enter();
6578 (void)ath_hal_gettpack(sc->sc_ah, &tpack);
6579 error = sysctl_handle_int(oidp, &tpack, 0, req);
6580 if (error == 0 && req->newptr) {
6581 if (!ath_hal_settpack(sc->sc_ah, tpack))
6584 wlan_serialize_exit();
6589 ath_sysctl_tpcts(SYSCTL_HANDLER_ARGS)
6591 struct ath_softc *sc = arg1;
6595 wlan_serialize_enter();
6596 (void)ath_hal_gettpcts(sc->sc_ah, &tpcts);
6597 error = sysctl_handle_int(oidp, &tpcts, 0, req);
6598 if (error == 0 && req->newptr) {
6599 if (!ath_hal_settpcts(sc->sc_ah, tpcts))
6602 wlan_serialize_exit();
6607 ath_sysctl_intmit(SYSCTL_HANDLER_ARGS)
6609 struct ath_softc *sc = arg1;
6612 wlan_serialize_enter();
6613 intmit = ath_hal_getintmit(sc->sc_ah);
6614 error = sysctl_handle_int(oidp, &intmit, 0, req);
6615 if (error == 0 && req->newptr) {
6616 if (!ath_hal_setintmit(sc->sc_ah, intmit))
6619 wlan_serialize_exit();
6623 #ifdef IEEE80211_SUPPORT_TDMA
6625 ath_sysctl_setcca(SYSCTL_HANDLER_ARGS)
6627 struct ath_softc *sc = arg1;
6630 wlan_serialize_enter();
6631 setcca = sc->sc_setcca;
6632 error = sysctl_handle_int(oidp, &setcca, 0, req);
6633 if (error == 0 && req->newptr)
6634 sc->sc_setcca = (setcca != 0);
6635 wlan_serialize_exit();
6638 #endif /* IEEE80211_SUPPORT_TDMA */
6641 ath_sysctlattach(struct ath_softc *sc)
6643 struct sysctl_ctx_list *ctx;
6644 struct sysctl_oid *tree;
6645 struct ath_hal *ah = sc->sc_ah;
6647 ctx = &sc->sc_sysctl_ctx;
6648 tree = sc->sc_sysctl_tree;
6650 device_printf(sc->sc_dev, "can't add sysctl node\n");
6654 SYSCTL_ADD_INT(ctx, SYSCTL_CHILDREN(tree), OID_AUTO,
6655 "countrycode", CTLFLAG_RD, &sc->sc_eecc, 0,
6656 "EEPROM country code");
6657 SYSCTL_ADD_INT(ctx, SYSCTL_CHILDREN(tree), OID_AUTO,
6658 "regdomain", CTLFLAG_RD, &sc->sc_eerd, 0,
6659 "EEPROM regdomain code");
6661 SYSCTL_ADD_INT(ctx, SYSCTL_CHILDREN(tree), OID_AUTO,
6662 "debug", CTLFLAG_RW, &sc->sc_debug, 0,
6663 "control debugging printfs");
6665 SYSCTL_ADD_PROC(ctx, SYSCTL_CHILDREN(tree), OID_AUTO,
6666 "slottime", CTLTYPE_INT | CTLFLAG_RW, sc, 0,
6667 ath_sysctl_slottime, "I", "802.11 slot time (us)");
6668 SYSCTL_ADD_PROC(ctx, SYSCTL_CHILDREN(tree), OID_AUTO,
6669 "acktimeout", CTLTYPE_INT | CTLFLAG_RW, sc, 0,
6670 ath_sysctl_acktimeout, "I", "802.11 ACK timeout (us)");
6671 SYSCTL_ADD_PROC(ctx, SYSCTL_CHILDREN(tree), OID_AUTO,
6672 "ctstimeout", CTLTYPE_INT | CTLFLAG_RW, sc, 0,
6673 ath_sysctl_ctstimeout, "I", "802.11 CTS timeout (us)");
6674 SYSCTL_ADD_PROC(ctx, SYSCTL_CHILDREN(tree), OID_AUTO,
6675 "softled", CTLTYPE_INT | CTLFLAG_RW, sc, 0,
6676 ath_sysctl_softled, "I", "enable/disable software LED support");
6677 SYSCTL_ADD_PROC(ctx, SYSCTL_CHILDREN(tree), OID_AUTO,
6678 "ledpin", CTLTYPE_INT | CTLFLAG_RW, sc, 0,
6679 ath_sysctl_ledpin, "I", "GPIO pin connected to LED");
6680 SYSCTL_ADD_INT(ctx, SYSCTL_CHILDREN(tree), OID_AUTO,
6681 "ledon", CTLFLAG_RW, &sc->sc_ledon, 0,
6682 "setting to turn LED on");
6683 SYSCTL_ADD_INT(ctx, SYSCTL_CHILDREN(tree), OID_AUTO,
6684 "ledidle", CTLFLAG_RW, &sc->sc_ledidle, 0,
6685 "idle time for inactivity LED (ticks)");
6686 SYSCTL_ADD_PROC(ctx, SYSCTL_CHILDREN(tree), OID_AUTO,
6687 "txantenna", CTLTYPE_INT | CTLFLAG_RW, sc, 0,
6688 ath_sysctl_txantenna, "I", "antenna switch");
6689 SYSCTL_ADD_PROC(ctx, SYSCTL_CHILDREN(tree), OID_AUTO,
6690 "rxantenna", CTLTYPE_INT | CTLFLAG_RW, sc, 0,
6691 ath_sysctl_rxantenna, "I", "default/rx antenna");
6692 if (ath_hal_hasdiversity(ah))
6693 SYSCTL_ADD_PROC(ctx, SYSCTL_CHILDREN(tree), OID_AUTO,
6694 "diversity", CTLTYPE_INT | CTLFLAG_RW, sc, 0,
6695 ath_sysctl_diversity, "I", "antenna diversity");
6696 sc->sc_txintrperiod = ATH_TXINTR_PERIOD;
6697 SYSCTL_ADD_INT(ctx, SYSCTL_CHILDREN(tree), OID_AUTO,
6698 "txintrperiod", CTLFLAG_RW, &sc->sc_txintrperiod, 0,
6699 "tx descriptor batching");
6700 SYSCTL_ADD_PROC(ctx, SYSCTL_CHILDREN(tree), OID_AUTO,
6701 "diag", CTLTYPE_INT | CTLFLAG_RW, sc, 0,
6702 ath_sysctl_diag, "I", "h/w diagnostic control");
6703 SYSCTL_ADD_PROC(ctx, SYSCTL_CHILDREN(tree), OID_AUTO,
6704 "tpscale", CTLTYPE_INT | CTLFLAG_RW, sc, 0,
6705 ath_sysctl_tpscale, "I", "tx power scaling");
6706 if (ath_hal_hastpc(ah)) {
6707 SYSCTL_ADD_PROC(ctx, SYSCTL_CHILDREN(tree), OID_AUTO,
6708 "tpc", CTLTYPE_INT | CTLFLAG_RW, sc, 0,
6709 ath_sysctl_tpc, "I", "enable/disable per-packet TPC");
6710 SYSCTL_ADD_PROC(ctx, SYSCTL_CHILDREN(tree), OID_AUTO,
6711 "tpack", CTLTYPE_INT | CTLFLAG_RW, sc, 0,
6712 ath_sysctl_tpack, "I", "tx power for ack frames");
6713 SYSCTL_ADD_PROC(ctx, SYSCTL_CHILDREN(tree), OID_AUTO,
6714 "tpcts", CTLTYPE_INT | CTLFLAG_RW, sc, 0,
6715 ath_sysctl_tpcts, "I", "tx power for cts frames");
6717 if (ath_hal_hasrfsilent(ah)) {
6718 SYSCTL_ADD_PROC(ctx, SYSCTL_CHILDREN(tree), OID_AUTO,
6719 "rfsilent", CTLTYPE_INT | CTLFLAG_RW, sc, 0,
6720 ath_sysctl_rfsilent, "I", "h/w RF silent config");
6721 SYSCTL_ADD_PROC(ctx, SYSCTL_CHILDREN(tree), OID_AUTO,
6722 "rfkill", CTLTYPE_INT | CTLFLAG_RW, sc, 0,
6723 ath_sysctl_rfkill, "I", "enable/disable RF kill switch");
6725 if (ath_hal_hasintmit(ah)) {
6726 SYSCTL_ADD_PROC(ctx, SYSCTL_CHILDREN(tree), OID_AUTO,
6727 "intmit", CTLTYPE_INT | CTLFLAG_RW, sc, 0,
6728 ath_sysctl_intmit, "I", "interference mitigation");
6730 sc->sc_monpass = HAL_RXERR_DECRYPT | HAL_RXERR_MIC;
6731 SYSCTL_ADD_INT(ctx, SYSCTL_CHILDREN(tree), OID_AUTO,
6732 "monpass", CTLFLAG_RW, &sc->sc_monpass, 0,
6733 "mask of error frames to pass when monitoring");
6734 #ifdef IEEE80211_SUPPORT_TDMA
6735 if (ath_hal_macversion(ah) > 0x78) {
6736 sc->sc_tdmadbaprep = 2;
6737 SYSCTL_ADD_INT(ctx, SYSCTL_CHILDREN(tree), OID_AUTO,
6738 "dbaprep", CTLFLAG_RW, &sc->sc_tdmadbaprep, 0,
6739 "TDMA DBA preparation time");
6740 sc->sc_tdmaswbaprep = 10;
6741 SYSCTL_ADD_INT(ctx, SYSCTL_CHILDREN(tree), OID_AUTO,
6742 "swbaprep", CTLFLAG_RW, &sc->sc_tdmaswbaprep, 0,
6743 "TDMA SWBA preparation time");
6744 SYSCTL_ADD_INT(ctx, SYSCTL_CHILDREN(tree), OID_AUTO,
6745 "guardtime", CTLFLAG_RW, &sc->sc_tdmaguard, 0,
6746 "TDMA slot guard time");
6747 SYSCTL_ADD_INT(ctx, SYSCTL_CHILDREN(tree), OID_AUTO,
6748 "superframe", CTLFLAG_RD, &sc->sc_tdmabintval, 0,
6749 "TDMA calculated super frame");
6750 SYSCTL_ADD_PROC(ctx, SYSCTL_CHILDREN(tree), OID_AUTO,
6751 "setcca", CTLTYPE_INT | CTLFLAG_RW, sc, 0,
6752 ath_sysctl_setcca, "I", "enable CCA control");
6758 ath_tx_raw_start(struct ath_softc *sc, struct ieee80211_node *ni,
6759 struct ath_buf *bf, struct mbuf *m0,
6760 const struct ieee80211_bpf_params *params)
6762 struct ifnet *ifp = sc->sc_ifp;
6763 struct ieee80211com *ic = ifp->if_l2com;
6764 struct ath_hal *ah = sc->sc_ah;
6765 struct ieee80211vap *vap = ni->ni_vap;
6766 int error, ismcast, ismrr;
6767 int keyix, hdrlen, pktlen, try0, txantenna;
6768 u_int8_t rix, cix, txrate, ctsrate, rate1, rate2, rate3;
6769 struct ieee80211_frame *wh;
6770 u_int flags, ctsduration;
6772 const HAL_RATE_TABLE *rt;
6773 struct ath_desc *ds;
6776 wh = mtod(m0, struct ieee80211_frame *);
6777 ismcast = IEEE80211_IS_MULTICAST(wh->i_addr1);
6778 hdrlen = ieee80211_anyhdrsize(wh);
6780 * Packet length must not include any
6781 * pad bytes; deduct them here.
6783 /* XXX honor IEEE80211_BPF_DATAPAD */
6784 pktlen = m0->m_pkthdr.len - (hdrlen & 3) + IEEE80211_CRC_LEN;
6786 if (params->ibp_flags & IEEE80211_BPF_CRYPTO) {
6787 const struct ieee80211_cipher *cip;
6788 struct ieee80211_key *k;
6791 * Construct the 802.11 header+trailer for an encrypted
6792 * frame. The only reason this can fail is because of an
6793 * unknown or unsupported cipher/key type.
6795 k = ieee80211_crypto_encap(ni, m0);
6798 * This can happen when the key is yanked after the
6799 * frame was queued. Just discard the frame; the
6800 * 802.11 layer counts failures and provides
6801 * debugging/diagnostics.
6807 * Adjust the packet + header lengths for the crypto
6808 * additions and calculate the h/w key index. When
6809 * a s/w mic is done the frame will have had any mic
6810 * added to it prior to entry so m0->m_pkthdr.len will
6811 * account for it. Otherwise we need to add it to the
6815 hdrlen += cip->ic_header;
6816 pktlen += cip->ic_header + cip->ic_trailer;
6817 /* NB: frags always have any TKIP MIC done in s/w */
6818 if ((k->wk_flags & IEEE80211_KEY_SWMIC) == 0)
6819 pktlen += cip->ic_miclen;
6820 keyix = k->wk_keyix;
6822 /* packet header may have moved, reset our local pointer */
6823 wh = mtod(m0, struct ieee80211_frame *);
6824 } else if (ni->ni_ucastkey.wk_cipher == &ieee80211_cipher_none) {
6826 * Use station key cache slot, if assigned.
6828 keyix = ni->ni_ucastkey.wk_keyix;
6829 if (keyix == IEEE80211_KEYIX_NONE)
6830 keyix = HAL_TXKEYIX_INVALID;
6832 keyix = HAL_TXKEYIX_INVALID;
6834 error = ath_tx_dmasetup(sc, bf, m0);
6837 m0 = bf->bf_m; /* NB: may have changed */
6838 wh = mtod(m0, struct ieee80211_frame *);
6839 bf->bf_node = ni; /* NB: held reference */
6841 flags = HAL_TXDESC_CLRDMASK; /* XXX needed for crypto errs */
6842 flags |= HAL_TXDESC_INTREQ; /* force interrupt */
6843 if (params->ibp_flags & IEEE80211_BPF_RTS)
6844 flags |= HAL_TXDESC_RTSENA;
6845 else if (params->ibp_flags & IEEE80211_BPF_CTS)
6846 flags |= HAL_TXDESC_CTSENA;
6847 /* XXX leave ismcast to injector? */
6848 if ((params->ibp_flags & IEEE80211_BPF_NOACK) || ismcast)
6849 flags |= HAL_TXDESC_NOACK;
6851 rt = sc->sc_currates;
6852 KASSERT(rt != NULL, ("no rate table, mode %u", sc->sc_curmode));
6853 rix = ath_tx_findrix(sc, params->ibp_rate0);
6854 txrate = rt->info[rix].rateCode;
6855 if (params->ibp_flags & IEEE80211_BPF_SHORTPRE)
6856 txrate |= rt->info[rix].shortPreamble;
6858 try0 = params->ibp_try0;
6859 ismrr = (params->ibp_try1 != 0);
6860 txantenna = params->ibp_pri >> 2;
6861 if (txantenna == 0) /* XXX? */
6862 txantenna = sc->sc_txantenna;
6864 if (flags & (HAL_TXDESC_CTSENA | HAL_TXDESC_RTSENA)) {
6865 cix = ath_tx_findrix(sc, params->ibp_ctsrate);
6866 ctsrate = rt->info[cix].rateCode;
6867 if (params->ibp_flags & IEEE80211_BPF_SHORTPRE) {
6868 ctsrate |= rt->info[cix].shortPreamble;
6869 if (flags & HAL_TXDESC_RTSENA) /* SIFS + CTS */
6870 ctsduration += rt->info[cix].spAckDuration;
6871 ctsduration += ath_hal_computetxtime(ah,
6872 rt, pktlen, rix, AH_TRUE);
6873 if ((flags & HAL_TXDESC_NOACK) == 0) /* SIFS + ACK */
6874 ctsduration += rt->info[rix].spAckDuration;
6876 if (flags & HAL_TXDESC_RTSENA) /* SIFS + CTS */
6877 ctsduration += rt->info[cix].lpAckDuration;
6878 ctsduration += ath_hal_computetxtime(ah,
6879 rt, pktlen, rix, AH_FALSE);
6880 if ((flags & HAL_TXDESC_NOACK) == 0) /* SIFS + ACK */
6881 ctsduration += rt->info[rix].lpAckDuration;
6883 ismrr = 0; /* XXX */
6886 pri = params->ibp_pri & 3;
6888 * NB: we mark all packets as type PSPOLL so the h/w won't
6889 * set the sequence number, duration, etc.
6891 atype = HAL_PKT_TYPE_PSPOLL;
6893 if (IFF_DUMPPKTS(sc, ATH_DEBUG_XMIT))
6894 ieee80211_dump_pkt(ic, mtod(m0, caddr_t), m0->m_len,
6895 sc->sc_hwmap[rix].ieeerate, -1);
6897 if (ieee80211_radiotap_active_vap(vap)) {
6898 u_int64_t tsf = ath_hal_gettsf64(ah);
6900 sc->sc_tx_th.wt_tsf = htole64(tsf);
6901 sc->sc_tx_th.wt_flags = sc->sc_hwmap[rix].txflags;
6902 if (wh->i_fc[1] & IEEE80211_FC1_WEP)
6903 sc->sc_tx_th.wt_flags |= IEEE80211_RADIOTAP_F_WEP;
6904 if (m0->m_flags & M_FRAG)
6905 sc->sc_tx_th.wt_flags |= IEEE80211_RADIOTAP_F_FRAG;
6906 sc->sc_tx_th.wt_rate = sc->sc_hwmap[rix].ieeerate;
6907 sc->sc_tx_th.wt_txpower = ni->ni_txpower;
6908 sc->sc_tx_th.wt_antenna = sc->sc_txantenna;
6910 ieee80211_radiotap_tx(vap, m0);
6914 * Formulate first tx descriptor with tx controls.
6917 /* XXX check return value? */
6918 ath_hal_setuptxdesc(ah, ds
6919 , pktlen /* packet length */
6920 , hdrlen /* header length */
6921 , atype /* Atheros packet type */
6922 , params->ibp_power /* txpower */
6923 , txrate, try0 /* series 0 rate/tries */
6924 , keyix /* key cache index */
6925 , txantenna /* antenna mode */
6927 , ctsrate /* rts/cts rate */
6928 , ctsduration /* rts/cts duration */
6930 bf->bf_txflags = flags;
6933 rix = ath_tx_findrix(sc, params->ibp_rate1);
6934 rate1 = rt->info[rix].rateCode;
6935 if (params->ibp_flags & IEEE80211_BPF_SHORTPRE)
6936 rate1 |= rt->info[rix].shortPreamble;
6937 if (params->ibp_try2) {
6938 rix = ath_tx_findrix(sc, params->ibp_rate2);
6939 rate2 = rt->info[rix].rateCode;
6940 if (params->ibp_flags & IEEE80211_BPF_SHORTPRE)
6941 rate2 |= rt->info[rix].shortPreamble;
6944 if (params->ibp_try3) {
6945 rix = ath_tx_findrix(sc, params->ibp_rate3);
6946 rate3 = rt->info[rix].rateCode;
6947 if (params->ibp_flags & IEEE80211_BPF_SHORTPRE)
6948 rate3 |= rt->info[rix].shortPreamble;
6951 ath_hal_setupxtxdesc(ah, ds
6952 , rate1, params->ibp_try1 /* series 1 */
6953 , rate2, params->ibp_try2 /* series 2 */
6954 , rate3, params->ibp_try3 /* series 3 */
6958 /* NB: no buffered multicast in power save support */
6959 ath_tx_handoff(sc, sc->sc_ac2q[pri], bf);
6964 ath_raw_xmit(struct ieee80211_node *ni, struct mbuf *m,
6965 const struct ieee80211_bpf_params *params)
6967 struct ieee80211com *ic = ni->ni_ic;
6968 struct ifnet *ifp = ic->ic_ifp;
6969 struct ath_softc *sc = ifp->if_softc;
6973 if ((ifp->if_flags & IFF_RUNNING) == 0 || sc->sc_invalid) {
6974 DPRINTF(sc, ATH_DEBUG_XMIT, "%s: discard frame, %s", __func__,
6975 (ifp->if_flags & IFF_RUNNING) == 0 ?
6976 "!running" : "invalid");
6982 * Grab a TX buffer and associated resources.
6984 bf = ath_getbuf(sc);
6986 sc->sc_stats.ast_tx_nobuf++;
6992 if (params == NULL) {
6994 * Legacy path; interpret frame contents to decide
6995 * precisely how to send the frame.
6997 if (ath_tx_start(sc, ni, bf, m)) {
6998 error = EIO; /* XXX */
7003 * Caller supplied explicit parameters to use in
7004 * sending the frame.
7006 if (ath_tx_raw_start(sc, ni, bf, m, params)) {
7007 error = EIO; /* XXX */
7011 sc->sc_wd_timer = 5;
7013 sc->sc_stats.ast_tx_raw++;
7017 STAILQ_INSERT_HEAD(&sc->sc_txbuf, bf, bf_list);
7020 sc->sc_stats.ast_tx_raw_fail++;
7021 ieee80211_free_node(ni);
7026 * Announce various information on device/driver attach.
7029 ath_announce(struct ath_softc *sc)
7031 struct ifnet *ifp = sc->sc_ifp;
7032 struct ath_hal *ah = sc->sc_ah;
7034 if_printf(ifp, "AR%s mac %d.%d RF%s phy %d.%d\n",
7035 ath_hal_mac_name(ah), ah->ah_macVersion, ah->ah_macRev,
7036 ath_hal_rf_name(ah), ah->ah_phyRev >> 4, ah->ah_phyRev & 0xf);
7039 for (i = 0; i <= WME_AC_VO; i++) {
7040 struct ath_txq *txq = sc->sc_ac2q[i];
7041 if_printf(ifp, "Use hw queue %u for %s traffic\n",
7042 txq->axq_qnum, ieee80211_wme_acnames[i]);
7044 if_printf(ifp, "Use hw queue %u for CAB traffic\n",
7045 sc->sc_cabq->axq_qnum);
7046 if_printf(ifp, "Use hw queue %u for beacons\n", sc->sc_bhalq);
7048 if (ath_rxbuf != ATH_RXBUF)
7049 if_printf(ifp, "using %u rx buffers\n", ath_rxbuf);
7050 if (ath_txbuf != ATH_TXBUF)
7051 if_printf(ifp, "using %u tx buffers\n", ath_txbuf);
7052 if (sc->sc_mcastkey && bootverbose)
7053 if_printf(ifp, "using multicast key search\n");
7056 #ifdef IEEE80211_SUPPORT_TDMA
7057 static __inline uint32_t
7058 ath_hal_getnexttbtt(struct ath_hal *ah)
7060 #define AR_TIMER0 0x8028
7061 return OS_REG_READ(ah, AR_TIMER0);
7064 static __inline void
7065 ath_hal_adjusttsf(struct ath_hal *ah, int32_t tsfdelta)
7067 /* XXX handle wrap/overflow */
7068 OS_REG_WRITE(ah, AR_TSF_L32, OS_REG_READ(ah, AR_TSF_L32) + tsfdelta);
7072 ath_tdma_settimers(struct ath_softc *sc, u_int32_t nexttbtt, u_int32_t bintval)
7074 struct ath_hal *ah = sc->sc_ah;
7075 HAL_BEACON_TIMERS bt;
7077 bt.bt_intval = bintval | HAL_BEACON_ENA;
7078 bt.bt_nexttbtt = nexttbtt;
7079 bt.bt_nextdba = (nexttbtt<<3) - sc->sc_tdmadbaprep;
7080 bt.bt_nextswba = (nexttbtt<<3) - sc->sc_tdmaswbaprep;
7081 bt.bt_nextatim = nexttbtt+1;
7082 ath_hal_beaconsettimers(ah, &bt);
7086 * Calculate the beacon interval. This is periodic in the
7087 * superframe for the bss. We assume each station is configured
7088 * identically wrt transmit rate so the guard time we calculate
7089 * above will be the same on all stations. Note we need to
7090 * factor in the xmit time because the hardware will schedule
7091 * a frame for transmit if the start of the frame is within
7092 * the burst time. When we get hardware that properly kills
7093 * frames in the PCU we can reduce/eliminate the guard time.
7095 * Roundup to 1024 is so we have 1 TU buffer in the guard time
7096 * to deal with the granularity of the nexttbtt timer. 11n MAC's
7097 * with 1us timer granularity should allow us to reduce/eliminate
7101 ath_tdma_bintvalsetup(struct ath_softc *sc,
7102 const struct ieee80211_tdma_state *tdma)
7104 /* copy from vap state (XXX check all vaps have same value?) */
7105 sc->sc_tdmaslotlen = tdma->tdma_slotlen;
7107 sc->sc_tdmabintval = roundup((sc->sc_tdmaslotlen+sc->sc_tdmaguard) *
7108 tdma->tdma_slotcnt, 1024);
7109 sc->sc_tdmabintval >>= 10; /* TSF -> TU */
7110 if (sc->sc_tdmabintval & 1)
7111 sc->sc_tdmabintval++;
7113 if (tdma->tdma_slot == 0) {
7115 * Only slot 0 beacons; other slots respond.
7117 sc->sc_imask |= HAL_INT_SWBA;
7118 sc->sc_tdmaswba = 0; /* beacon immediately */
7120 /* XXX all vaps must be slot 0 or slot !0 */
7121 sc->sc_imask &= ~HAL_INT_SWBA;
7126 * Max 802.11 overhead. This assumes no 4-address frames and
7127 * the encapsulation done by ieee80211_encap (llc). We also
7128 * include potential crypto overhead.
7130 #define IEEE80211_MAXOVERHEAD \
7131 (sizeof(struct ieee80211_qosframe) \
7132 + sizeof(struct llc) \
7133 + IEEE80211_ADDR_LEN \
7134 + IEEE80211_WEP_IVLEN \
7135 + IEEE80211_WEP_KIDLEN \
7136 + IEEE80211_WEP_CRCLEN \
7137 + IEEE80211_WEP_MICLEN \
7138 + IEEE80211_CRC_LEN)
7141 * Setup initially for tdma operation. Start the beacon
7142 * timers and enable SWBA if we are slot 0. Otherwise
7143 * we wait for slot 0 to arrive so we can sync up before
7144 * starting to transmit.
7147 ath_tdma_config(struct ath_softc *sc, struct ieee80211vap *vap)
7149 struct ath_hal *ah = sc->sc_ah;
7150 struct ifnet *ifp = sc->sc_ifp;
7151 struct ieee80211com *ic = ifp->if_l2com;
7152 const struct ieee80211_txparam *tp;
7153 const struct ieee80211_tdma_state *tdma = NULL;
7157 vap = TAILQ_FIRST(&ic->ic_vaps); /* XXX */
7159 if_printf(ifp, "%s: no vaps?\n", __func__);
7163 tp = vap->iv_bss->ni_txparms;
7165 * Calculate the guard time for each slot. This is the
7166 * time to send a maximal-size frame according to the
7167 * fixed/lowest transmit rate. Note that the interface
7168 * mtu does not include the 802.11 overhead so we must
7169 * tack that on (ath_hal_computetxtime includes the
7170 * preamble and plcp in it's calculation).
7172 tdma = vap->iv_tdma;
7173 if (tp->ucastrate != IEEE80211_FIXED_RATE_NONE)
7174 rix = ath_tx_findrix(sc, tp->ucastrate);
7176 rix = ath_tx_findrix(sc, tp->mcastrate);
7177 /* XXX short preamble assumed */
7178 sc->sc_tdmaguard = ath_hal_computetxtime(ah, sc->sc_currates,
7179 ifp->if_mtu + IEEE80211_MAXOVERHEAD, rix, AH_TRUE);
7181 ath_hal_intrset(ah, 0);
7183 ath_beaconq_config(sc); /* setup h/w beacon q */
7185 ath_hal_setcca(ah, AH_FALSE); /* disable CCA */
7186 ath_tdma_bintvalsetup(sc, tdma); /* calculate beacon interval */
7187 ath_tdma_settimers(sc, sc->sc_tdmabintval,
7188 sc->sc_tdmabintval | HAL_BEACON_RESET_TSF);
7189 sc->sc_syncbeacon = 0;
7191 sc->sc_avgtsfdeltap = TDMA_DUMMY_MARKER;
7192 sc->sc_avgtsfdeltam = TDMA_DUMMY_MARKER;
7194 ath_hal_intrset(ah, sc->sc_imask);
7196 DPRINTF(sc, ATH_DEBUG_TDMA, "%s: slot %u len %uus cnt %u "
7197 "bsched %u guard %uus bintval %u TU dba prep %u\n", __func__,
7198 tdma->tdma_slot, tdma->tdma_slotlen, tdma->tdma_slotcnt,
7199 tdma->tdma_bintval, sc->sc_tdmaguard, sc->sc_tdmabintval,
7200 sc->sc_tdmadbaprep);
7204 * Update tdma operation. Called from the 802.11 layer
7205 * when a beacon is received from the TDMA station operating
7206 * in the slot immediately preceding us in the bss. Use
7207 * the rx timestamp for the beacon frame to update our
7208 * beacon timers so we follow their schedule. Note that
7209 * by using the rx timestamp we implicitly include the
7210 * propagation delay in our schedule.
7213 ath_tdma_update(struct ieee80211_node *ni,
7214 const struct ieee80211_tdma_param *tdma, int changed)
7216 #define TSF_TO_TU(_h,_l) \
7217 ((((u_int32_t)(_h)) << 22) | (((u_int32_t)(_l)) >> 10))
7218 #define TU_TO_TSF(_tu) (((u_int64_t)(_tu)) << 10)
7219 struct ieee80211vap *vap = ni->ni_vap;
7220 struct ieee80211com *ic = ni->ni_ic;
7221 struct ath_softc *sc = ic->ic_ifp->if_softc;
7222 struct ath_hal *ah = sc->sc_ah;
7223 const HAL_RATE_TABLE *rt = sc->sc_currates;
7224 u_int64_t tsf, rstamp, nextslot;
7225 u_int32_t txtime, nextslottu, timer0;
7226 int32_t tudelta, tsfdelta;
7227 const struct ath_rx_status *rs;
7230 sc->sc_stats.ast_tdma_update++;
7233 * Check for and adopt configuration changes.
7236 const struct ieee80211_tdma_state *ts = vap->iv_tdma;
7238 ath_tdma_bintvalsetup(sc, ts);
7239 if (changed & TDMA_UPDATE_SLOTLEN)
7242 DPRINTF(sc, ATH_DEBUG_TDMA,
7243 "%s: adopt slot %u slotcnt %u slotlen %u us "
7244 "bintval %u TU\n", __func__,
7245 ts->tdma_slot, ts->tdma_slotcnt, ts->tdma_slotlen,
7246 sc->sc_tdmabintval);
7249 ath_hal_intrset(ah, sc->sc_imask);
7250 /* NB: beacon timers programmed below */
7253 /* extend rx timestamp to 64 bits */
7255 tsf = ath_hal_gettsf64(ah);
7256 rstamp = ath_extend_tsf(rs->rs_tstamp, tsf);
7258 * The rx timestamp is set by the hardware on completing
7259 * reception (at the point where the rx descriptor is DMA'd
7260 * to the host). To find the start of our next slot we
7261 * must adjust this time by the time required to send
7262 * the packet just received.
7264 rix = rt->rateCodeToIndex[rs->rs_rate];
7265 txtime = ath_hal_computetxtime(ah, rt, rs->rs_datalen, rix,
7266 rt->info[rix].shortPreamble);
7267 /* NB: << 9 is to cvt to TU and /2 */
7268 nextslot = (rstamp - txtime) + (sc->sc_tdmabintval << 9);
7269 nextslottu = TSF_TO_TU(nextslot>>32, nextslot) & HAL_BEACON_PERIOD;
7272 * TIMER0 is the h/w's idea of NextTBTT (in TU's). Convert
7273 * to usecs and calculate the difference between what the
7274 * other station thinks and what we have programmed. This
7275 * lets us figure how to adjust our timers to match. The
7276 * adjustments are done by pulling the TSF forward and possibly
7277 * rewriting the beacon timers.
7279 timer0 = ath_hal_getnexttbtt(ah);
7280 tsfdelta = (int32_t)((nextslot % TU_TO_TSF(HAL_BEACON_PERIOD+1)) - TU_TO_TSF(timer0));
7282 DPRINTF(sc, ATH_DEBUG_TDMA_TIMER,
7283 "tsfdelta %d avg +%d/-%d\n", tsfdelta,
7284 TDMA_AVG(sc->sc_avgtsfdeltap), TDMA_AVG(sc->sc_avgtsfdeltam));
7287 TDMA_SAMPLE(sc->sc_avgtsfdeltap, 0);
7288 TDMA_SAMPLE(sc->sc_avgtsfdeltam, -tsfdelta);
7289 tsfdelta = -tsfdelta % 1024;
7291 } else if (tsfdelta > 0) {
7292 TDMA_SAMPLE(sc->sc_avgtsfdeltap, tsfdelta);
7293 TDMA_SAMPLE(sc->sc_avgtsfdeltam, 0);
7294 tsfdelta = 1024 - (tsfdelta % 1024);
7297 TDMA_SAMPLE(sc->sc_avgtsfdeltap, 0);
7298 TDMA_SAMPLE(sc->sc_avgtsfdeltam, 0);
7300 tudelta = nextslottu - timer0;
7303 * Copy sender's timetstamp into tdma ie so they can
7304 * calculate roundtrip time. We submit a beacon frame
7305 * below after any timer adjustment. The frame goes out
7306 * at the next TBTT so the sender can calculate the
7307 * roundtrip by inspecting the tdma ie in our beacon frame.
7309 * NB: This tstamp is subtlely preserved when
7310 * IEEE80211_BEACON_TDMA is marked (e.g. when the
7311 * slot position changes) because ieee80211_add_tdma
7312 * skips over the data.
7314 memcpy(ATH_VAP(vap)->av_boff.bo_tdma +
7315 __offsetof(struct ieee80211_tdma_param, tdma_tstamp),
7316 &ni->ni_tstamp.data, 8);
7318 DPRINTF(sc, ATH_DEBUG_TDMA_TIMER,
7319 "tsf %llu nextslot %llu (%d, %d) nextslottu %u timer0 %u (%d)\n",
7320 (unsigned long long) tsf, (unsigned long long) nextslot,
7321 (int)(nextslot - tsf), tsfdelta,
7322 nextslottu, timer0, tudelta);
7325 * Adjust the beacon timers only when pulling them forward
7326 * or when going back by less than the beacon interval.
7327 * Negative jumps larger than the beacon interval seem to
7328 * cause the timers to stop and generally cause instability.
7329 * This basically filters out jumps due to missed beacons.
7331 if (tudelta != 0 && (tudelta > 0 || -tudelta < sc->sc_tdmabintval)) {
7332 ath_tdma_settimers(sc, nextslottu, sc->sc_tdmabintval);
7333 sc->sc_stats.ast_tdma_timers++;
7336 ath_hal_adjusttsf(ah, tsfdelta);
7337 sc->sc_stats.ast_tdma_tsf++;
7339 ath_tdma_beacon_send(sc, vap); /* prepare response */
7345 * Transmit a beacon frame at SWBA. Dynamic updates
7346 * to the frame contents are done as needed.
7349 ath_tdma_beacon_send(struct ath_softc *sc, struct ieee80211vap *vap)
7351 struct ath_hal *ah = sc->sc_ah;
7356 * Check if the previous beacon has gone out. If
7357 * not don't try to post another, skip this period
7358 * and wait for the next. Missed beacons indicate
7359 * a problem and should not occur. If we miss too
7360 * many consecutive beacons reset the device.
7362 if (ath_hal_numtxpending(ah, sc->sc_bhalq) != 0) {
7363 sc->sc_bmisscount++;
7364 DPRINTF(sc, ATH_DEBUG_BEACON,
7365 "%s: missed %u consecutive beacons\n",
7366 __func__, sc->sc_bmisscount);
7367 if (sc->sc_bmisscount >= ath_bstuck_threshold)
7368 taskqueue_enqueue(sc->sc_tq, &sc->sc_bstucktask);
7371 if (sc->sc_bmisscount != 0) {
7372 DPRINTF(sc, ATH_DEBUG_BEACON,
7373 "%s: resume beacon xmit after %u misses\n",
7374 __func__, sc->sc_bmisscount);
7375 sc->sc_bmisscount = 0;
7379 * Check recent per-antenna transmit statistics and flip
7380 * the default antenna if noticeably more frames went out
7381 * on the non-default antenna.
7382 * XXX assumes 2 anntenae
7384 if (!sc->sc_diversity) {
7385 otherant = sc->sc_defant & 1 ? 2 : 1;
7386 if (sc->sc_ant_tx[otherant] > sc->sc_ant_tx[sc->sc_defant] + 2)
7387 ath_setdefantenna(sc, otherant);
7388 sc->sc_ant_tx[1] = sc->sc_ant_tx[2] = 0;
7392 * Stop any current dma before messing with the beacon linkages.
7394 * This should never fail since we check above that no frames
7395 * are still pending on the queue.
7397 if (!ath_hal_stoptxdma(ah, sc->sc_bhalq)) {
7398 DPRINTF(sc, ATH_DEBUG_ANY,
7399 "%s: beacon queue %u did not stop?\n",
7400 __func__, sc->sc_bhalq);
7401 /* NB: the HAL still stops DMA, so proceed */
7403 bf = ath_beacon_generate(sc, vap);
7405 ath_hal_puttxbuf(ah, sc->sc_bhalq, bf->bf_daddr);
7406 ath_hal_txstart(ah, sc->sc_bhalq);
7408 sc->sc_stats.ast_be_xmit++; /* XXX per-vap? */
7411 * Record local TSF for our last send for use
7412 * in arbitrating slot collisions.
7414 vap->iv_bss->ni_tstamp.tsf = ath_hal_gettsf64(ah);
7416 device_printf(sc->sc_dev, "tdma beacon gen failed!\n");
7419 #endif /* IEEE80211_SUPPORT_TDMA */