2 * Copyright (c) 2002-2008 Sam Leffler, Errno Consulting
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions
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30 #include <sys/cdefs.h>
33 * PCI/Cardbus front-end for the Atheros Wireless LAN controller driver.
37 #include <sys/param.h>
38 #include <sys/systm.h>
39 #include <sys/malloc.h>
40 #include <sys/module.h>
41 #include <sys/kernel.h>
43 #include <sys/mutex.h>
44 #include <sys/errno.h>
49 #include <sys/socket.h>
52 #include <net/if_media.h>
53 #include <net/if_arp.h>
54 #include <net/ethernet.h>
56 #include <netproto/802_11/ieee80211_var.h>
58 #include <dev/netif/ath/ath/if_athvar.h>
60 #include <bus/pci/pcivar.h>
61 #include <bus/pci/pcireg.h>
63 /* For EEPROM firmware */
64 #ifdef ATH_EEPROM_FIRMWARE
65 #include <sys/linker.h>
66 #include <sys/firmware.h>
67 #endif /* ATH_EEPROM_FIRMWARE */
73 struct ath_pci_softc {
74 struct ath_softc sc_sc;
75 struct resource *sc_sr; /* memory resource */
76 struct resource *sc_irq; /* irq resource */
77 void *sc_ih; /* interrupt handler */
81 #define PCIR_RETRY_TIMEOUT 0x41
82 #define PCIR_CFG_PMCSR 0x48
84 #define DEFAULT_CACHESIZE 32
87 ath_pci_setup(device_t dev)
91 /* XXX TODO: need to override the _system_ saved copies of this */
94 * If the cache line size is 0, force it to a reasonable
97 cz = pci_read_config(dev, PCIR_CACHELNSZ, 1);
99 pci_write_config(dev, PCIR_CACHELNSZ,
100 DEFAULT_CACHESIZE / 4, 1);
103 /* Override the system latency timer */
104 pci_write_config(dev, PCIR_LATTIMER, 0xa8, 1);
106 /* If a PCI NIC, force wakeup */
107 #ifdef ATH_PCI_WAKEUP_WAR
108 /* XXX TODO: don't do this for non-PCI (ie, PCIe, Cardbus!) */
111 pmcsr = pci_read_config(dev, PCIR_CFG_PMCSR, 2);
113 pci_write_config(dev, PCIR_CFG_PMCSR, pmcsr, 2);
115 pci_write_config(dev, PCIR_CFG_PMCSR, pmcsr, 2);
120 * Disable retry timeout to keep PCI Tx retries from
121 * interfering with C3 CPU state.
123 pci_write_config(dev, PCIR_RETRY_TIMEOUT, 0, 1);
127 ath_pci_probe(device_t dev)
131 devname = ath_hal_probe(pci_get_vendor(dev), pci_get_device(dev));
132 if (devname != NULL) {
133 device_set_desc(dev, devname);
134 return BUS_PROBE_DEFAULT;
140 ath_pci_attach(device_t dev)
142 struct ath_pci_softc *psc = device_get_softc(dev);
143 struct ath_softc *sc = &psc->sc_sc;
146 #ifdef ATH_EEPROM_FIRMWARE
147 const struct firmware *fw = NULL;
154 * Enable bus mastering.
156 pci_enable_busmaster(dev);
159 * Setup other PCI bus configuration parameters.
164 * Setup memory-mapping of PCI registers.
167 psc->sc_sr = bus_alloc_resource_any(dev, SYS_RES_MEMORY, &rid,
169 if (psc->sc_sr == NULL) {
170 device_printf(dev, "cannot map register space\n");
173 /* XXX uintptr_t is a bandaid for ia64; to be fixed */
174 sc->sc_st = (HAL_BUS_TAG)(uintptr_t) rman_get_bustag(psc->sc_sr);
175 sc->sc_sh = (HAL_BUS_HANDLE) rman_get_bushandle(psc->sc_sr);
177 * Mark device invalid so any interrupts (shared or otherwise)
178 * that arrive before the HAL is setup are discarded.
183 * Arrange interrupt line.
186 psc->sc_irq = bus_alloc_resource_any(dev, SYS_RES_IRQ, &rid,
187 RF_SHAREABLE|RF_ACTIVE);
188 if (psc->sc_irq == NULL) {
189 device_printf(dev, "could not map interrupt\n");
192 if (bus_setup_intr(dev, psc->sc_irq,
194 ath_intr, sc, &psc->sc_ih,
195 &wlan_global_serializer)) {
196 device_printf(dev, "could not establish interrupt\n");
201 * Setup DMA descriptor area.
203 if (bus_dma_tag_create(bus_get_dma_tag(dev), /* parent */
204 4, 0, /* alignment, bounds */
205 BUS_SPACE_MAXADDR_32BIT, /* lowaddr */
206 BUS_SPACE_MAXADDR, /* highaddr */
207 NULL, NULL, /* filter, filterarg */
208 0x3ffff, /* maxsize XXX */
209 ATH_MAX_SCATTER, /* nsegments */
210 0x3ffff, /* maxsegsize XXX */
211 BUS_DMA_ALLOCNOW, /* flags */
213 device_printf(dev, "cannot allocate DMA tag\n");
217 #ifdef ATH_EEPROM_FIRMWARE
219 * If there's an EEPROM firmware image, load that in.
221 if (resource_string_value(device_get_name(dev), device_get_unit(dev),
222 "eeprom_firmware", &buf) == 0) {
224 device_printf(dev, "%s: looking up firmware @ '%s'\n",
227 fw = firmware_get(buf);
229 device_printf(dev, "%s: couldn't find firmware\n",
234 device_printf(dev, "%s: EEPROM firmware @ %p\n",
237 kmalloc(fw->datasize, M_TEMP, M_WAITOK | M_ZERO);
238 if (! sc->sc_eepromdata) {
239 device_printf(dev, "%s: can't malloc eepromdata\n",
243 memcpy(sc->sc_eepromdata, fw->data, fw->datasize);
246 #endif /* ATH_EEPROM_FIRMWARE */
249 ATH_PCU_LOCK_INIT(sc);
250 ATH_RX_LOCK_INIT(sc);
251 ATH_TX_LOCK_INIT(sc);
252 ATH_TX_IC_LOCK_INIT(sc);
253 ATH_TXSTATUS_LOCK_INIT(sc);
255 error = ath_attach(pci_get_device(dev), sc);
256 if (error == 0) /* success */
259 ATH_TXSTATUS_LOCK_DESTROY(sc);
260 ATH_PCU_LOCK_DESTROY(sc);
261 ATH_RX_LOCK_DESTROY(sc);
262 ATH_TX_IC_LOCK_DESTROY(sc);
263 ATH_TX_LOCK_DESTROY(sc);
264 ATH_LOCK_DESTROY(sc);
265 bus_dma_tag_destroy(sc->sc_dmat);
267 bus_teardown_intr(dev, psc->sc_irq, psc->sc_ih);
269 bus_release_resource(dev, SYS_RES_IRQ, 0, psc->sc_irq);
271 bus_release_resource(dev, SYS_RES_MEMORY, BS_BAR, psc->sc_sr);
277 ath_pci_detach(device_t dev)
279 struct ath_pci_softc *psc = device_get_softc(dev);
280 struct ath_softc *sc = &psc->sc_sc;
282 /* check if device was removed */
283 sc->sc_invalid = !bus_child_present(dev);
286 * Do a config read to clear pre-existing pci error status.
288 (void) pci_read_config(dev, PCIR_COMMAND, 4);
292 bus_generic_detach(dev);
293 bus_teardown_intr(dev, psc->sc_irq, psc->sc_ih);
294 bus_release_resource(dev, SYS_RES_IRQ, 0, psc->sc_irq);
296 bus_dma_tag_destroy(sc->sc_dmat);
297 bus_release_resource(dev, SYS_RES_MEMORY, BS_BAR, psc->sc_sr);
299 if (sc->sc_eepromdata)
300 kfree(sc->sc_eepromdata, M_TEMP);
302 ATH_TXSTATUS_LOCK_DESTROY(sc);
303 ATH_PCU_LOCK_DESTROY(sc);
304 ATH_RX_LOCK_DESTROY(sc);
305 ATH_TX_IC_LOCK_DESTROY(sc);
306 ATH_TX_LOCK_DESTROY(sc);
307 ATH_LOCK_DESTROY(sc);
313 ath_pci_shutdown(device_t dev)
315 struct ath_pci_softc *psc = device_get_softc(dev);
317 ath_shutdown(&psc->sc_sc);
322 ath_pci_suspend(device_t dev)
324 struct ath_pci_softc *psc = device_get_softc(dev);
326 ath_suspend(&psc->sc_sc);
332 ath_pci_resume(device_t dev)
334 struct ath_pci_softc *psc = device_get_softc(dev);
337 * Suspend/resume resets the PCI configuration space.
341 ath_resume(&psc->sc_sc);
346 static device_method_t ath_pci_methods[] = {
347 /* Device interface */
348 DEVMETHOD(device_probe, ath_pci_probe),
349 DEVMETHOD(device_attach, ath_pci_attach),
350 DEVMETHOD(device_detach, ath_pci_detach),
351 DEVMETHOD(device_shutdown, ath_pci_shutdown),
352 DEVMETHOD(device_suspend, ath_pci_suspend),
353 DEVMETHOD(device_resume, ath_pci_resume),
357 static driver_t ath_pci_driver = {
360 sizeof (struct ath_pci_softc)
362 static devclass_t ath_devclass;
363 DRIVER_MODULE(ath_pci, pci, ath_pci_driver, ath_devclass, 0, 0);
364 MODULE_VERSION(ath_pci, 1);
365 MODULE_DEPEND(ath_pci, wlan, 1, 1, 1); /* 802.11 media layer */
366 MODULE_DEPEND(ath_pci, if_ath, 1, 1, 1); /* if_ath driver */
367 MODULE_DEPEND(ath_pci, ath_hal, 1, 1, 1); /* Atheros HAL */
368 MODULE_DEPEND(ath_pci, ath_rate, 1, 1, 1); /* rate control alg */
369 MODULE_DEPEND(ath_pci, ath_dfs, 1, 1, 1); /* wtf */