3 * Damien Bergamini <damien.bergamini@free.fr>
5 * Permission to use, copy, modify, and distribute this software for any
6 * purpose with or without fee is hereby granted, provided that the above
7 * copyright notice and this permission notice appear in all copies.
9 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
10 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
11 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
12 * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
13 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
14 * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
15 * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
17 * $FreeBSD: src/sys/dev/ral/rt2661.c,v 1.4 2006/03/21 21:15:43 damien Exp $
18 * $DragonFly: src/sys/dev/netif/ral/rt2661.c,v 1.15 2007/03/30 11:39:33 sephe Exp $
22 * Ralink Technology RT2561, RT2561S and RT2661 chipset driver
23 * http://www.ralinktech.com/
26 #include <sys/param.h>
28 #include <sys/endian.h>
29 #include <sys/kernel.h>
30 #include <sys/malloc.h>
32 #include <sys/module.h>
33 #include <sys/queue.h>
35 #include <sys/socket.h>
36 #include <sys/sockio.h>
37 #include <sys/sysctl.h>
38 #include <sys/serialize.h>
42 #include <net/if_arp.h>
43 #include <net/ethernet.h>
44 #include <net/if_dl.h>
45 #include <net/if_media.h>
46 #include <net/ifq_var.h>
48 #include <netproto/802_11/ieee80211_var.h>
49 #include <netproto/802_11/ieee80211_radiotap.h>
51 #include <dev/netif/ral/if_ralrate.h>
52 #include <dev/netif/ral/rt2661reg.h>
53 #include <dev/netif/ral/rt2661var.h>
54 #include <dev/netif/ral/rt2661_ucode.h>
57 #define DPRINTF(x) do { if (ral_debug > 0) kprintf x; } while (0)
58 #define DPRINTFN(n, x) do { if (ral_debug >= (n)) kprintf x; } while (0)
60 SYSCTL_INT(_debug, OID_AUTO, ral, CTLFLAG_RW, &ral_debug, 0, "ral debug level");
63 #define DPRINTFN(n, x)
66 MALLOC_DEFINE(M_RT2661, "rt2661_ratectl", "rt2661 rate control data");
68 static void rt2661_dma_map_addr(void *, bus_dma_segment_t *, int,
70 static void rt2661_dma_map_mbuf(void *, bus_dma_segment_t *, int,
72 static int rt2661_alloc_tx_ring(struct rt2661_softc *,
73 struct rt2661_tx_ring *, int);
74 static void rt2661_reset_tx_ring(struct rt2661_softc *,
75 struct rt2661_tx_ring *);
76 static void rt2661_free_tx_ring(struct rt2661_softc *,
77 struct rt2661_tx_ring *);
78 static int rt2661_alloc_rx_ring(struct rt2661_softc *,
79 struct rt2661_rx_ring *, int);
80 static void rt2661_reset_rx_ring(struct rt2661_softc *,
81 struct rt2661_rx_ring *);
82 static void rt2661_free_rx_ring(struct rt2661_softc *,
83 struct rt2661_rx_ring *);
84 static struct ieee80211_node *rt2661_node_alloc(
85 struct ieee80211_node_table *);
86 static int rt2661_media_change(struct ifnet *);
87 static void rt2661_next_scan(void *);
88 static int rt2661_newstate(struct ieee80211com *,
89 enum ieee80211_state, int);
90 static uint16_t rt2661_eeprom_read(struct rt2661_softc *, uint8_t);
91 static void rt2661_rx_intr(struct rt2661_softc *);
92 static void rt2661_tx_intr(struct rt2661_softc *);
93 static void rt2661_tx_dma_intr(struct rt2661_softc *,
94 struct rt2661_tx_ring *);
95 static void rt2661_mcu_beacon_expire(struct rt2661_softc *);
96 static void rt2661_mcu_wakeup(struct rt2661_softc *);
97 static void rt2661_mcu_cmd_intr(struct rt2661_softc *);
98 static uint8_t rt2661_rxrate(struct rt2661_rx_desc *);
99 static uint8_t rt2661_plcp_signal(int);
100 static void rt2661_setup_tx_desc(struct rt2661_softc *,
101 struct rt2661_tx_desc *, uint32_t, uint16_t, int,
102 int, const bus_dma_segment_t *, int, int, int);
103 static struct mbuf * rt2661_get_rts(struct rt2661_softc *,
104 struct ieee80211_frame *, uint16_t);
105 static int rt2661_tx_data(struct rt2661_softc *, struct mbuf *,
106 struct ieee80211_node *, int);
107 static int rt2661_tx_mgt(struct rt2661_softc *, struct mbuf *,
108 struct ieee80211_node *);
109 static void rt2661_start(struct ifnet *);
110 static void rt2661_watchdog(struct ifnet *);
111 static int rt2661_reset(struct ifnet *);
112 static int rt2661_ioctl(struct ifnet *, u_long, caddr_t,
114 static void rt2661_bbp_write(struct rt2661_softc *, uint8_t,
116 static uint8_t rt2661_bbp_read(struct rt2661_softc *, uint8_t);
117 static void rt2661_rf_write(struct rt2661_softc *, uint8_t,
119 static int rt2661_tx_cmd(struct rt2661_softc *, uint8_t,
121 static void rt2661_select_antenna(struct rt2661_softc *);
122 static void rt2661_enable_mrr(struct rt2661_softc *);
123 static void rt2661_set_txpreamble(struct rt2661_softc *);
124 static void rt2661_set_basicrates(struct rt2661_softc *,
125 const struct ieee80211_rateset *);
126 static void rt2661_select_band(struct rt2661_softc *,
127 struct ieee80211_channel *);
128 static void rt2661_set_chan(struct rt2661_softc *,
129 struct ieee80211_channel *);
130 static void rt2661_set_bssid(struct rt2661_softc *,
132 static void rt2661_set_macaddr(struct rt2661_softc *,
134 static void rt2661_update_promisc(struct rt2661_softc *);
135 static int rt2661_wme_update(struct ieee80211com *) __unused;
136 static void rt2661_update_slot(struct ifnet *);
137 static const char *rt2661_get_rf(int);
138 static void rt2661_read_eeprom(struct rt2661_softc *);
139 static int rt2661_bbp_init(struct rt2661_softc *);
140 static void rt2661_init(void *);
141 static void rt2661_stop(void *);
142 static void rt2661_intr(void *);
143 static int rt2661_load_microcode(struct rt2661_softc *,
144 const uint8_t *, int);
146 static void rt2661_rx_tune(struct rt2661_softc *);
147 static void rt2661_radar_start(struct rt2661_softc *);
148 static int rt2661_radar_stop(struct rt2661_softc *);
150 static int rt2661_prepare_beacon(struct rt2661_softc *);
151 static void rt2661_enable_tsf_sync(struct rt2661_softc *);
152 static int rt2661_get_rssi(struct rt2661_softc *, uint8_t);
153 static void rt2661_led_newstate(struct rt2661_softc *,
154 enum ieee80211_state);
157 * Supported rates for 802.11a/b/g modes (in 500Kbps unit).
159 static const struct ieee80211_rateset rt2661_rateset_11a =
160 { 8, { 12, 18, 24, 36, 48, 72, 96, 108 } };
162 static const struct ieee80211_rateset rt2661_rateset_11b =
163 { 4, { 2, 4, 11, 22 } };
165 static const struct ieee80211_rateset rt2661_rateset_11g =
166 { 12, { 2, 4, 11, 22, 12, 18, 24, 36, 48, 72, 96, 108 } };
168 static const struct {
171 } rt2661_def_mac[] = {
175 static const struct {
178 } rt2661_def_bbp[] = {
182 static const struct rfprog {
184 uint32_t r1, r2, r3, r4;
185 } rt2661_rf5225_1[] = {
187 }, rt2661_rf5225_2[] = {
191 #define LED_EE2MCU(bit) { \
192 .ee_bit = RT2661_EE_LED_##bit, \
193 .mcu_bit = RT2661_MCU_LED_##bit \
195 static const struct {
210 struct rt2661_dmamap {
211 bus_dma_segment_t segs[RT2661_MAX_SCATTER];
216 rt2661_attach(device_t dev, int id)
218 struct rt2661_softc *sc = device_get_softc(dev);
219 struct ieee80211com *ic = &sc->sc_ic;
220 struct ifnet *ifp = &ic->ic_if;
222 const uint8_t *ucode = NULL;
223 int error, i, ac, ntries, size = 0;
225 callout_init(&sc->scan_ch);
226 callout_init(&sc->rssadapt_ch);
229 sc->sc_irq = bus_alloc_resource_any(dev, SYS_RES_IRQ, &sc->sc_irq_rid,
230 RF_ACTIVE | RF_SHAREABLE);
231 if (sc->sc_irq == NULL) {
232 device_printf(dev, "could not allocate interrupt resource\n");
236 /* wait for NIC to initialize */
237 for (ntries = 0; ntries < 1000; ntries++) {
238 if ((val = RAL_READ(sc, RT2661_MAC_CSR0)) != 0)
242 if (ntries == 1000) {
243 device_printf(sc->sc_dev,
244 "timeout waiting for NIC to initialize\n");
249 /* retrieve RF rev. no and various other things from EEPROM */
250 rt2661_read_eeprom(sc);
252 device_printf(dev, "MAC/BBP RT%X, RF %s\n", val,
253 rt2661_get_rf(sc->rf_rev));
256 * Load 8051 microcode into NIC.
260 ucode = rt2561s_ucode;
261 size = sizeof rt2561s_ucode;
264 ucode = rt2561_ucode;
265 size = sizeof rt2561_ucode;
268 ucode = rt2661_ucode;
269 size = sizeof rt2661_ucode;
273 error = rt2661_load_microcode(sc, ucode, size);
275 device_printf(sc->sc_dev, "could not load 8051 microcode\n");
280 * Allocate Tx and Rx rings.
282 for (ac = 0; ac < 4; ac++) {
283 error = rt2661_alloc_tx_ring(sc, &sc->txq[ac],
284 RT2661_TX_RING_COUNT);
286 device_printf(sc->sc_dev,
287 "could not allocate Tx ring %d\n", ac);
292 error = rt2661_alloc_tx_ring(sc, &sc->mgtq, RT2661_MGT_RING_COUNT);
294 device_printf(sc->sc_dev, "could not allocate Mgt ring\n");
298 error = rt2661_alloc_rx_ring(sc, &sc->rxq, RT2661_RX_RING_COUNT);
300 device_printf(sc->sc_dev, "could not allocate Rx ring\n");
304 STAILQ_INIT(&sc->tx_ratectl);
306 sysctl_ctx_init(&sc->sysctl_ctx);
307 sc->sysctl_tree = SYSCTL_ADD_NODE(&sc->sysctl_ctx,
308 SYSCTL_STATIC_CHILDREN(_hw),
310 device_get_nameunit(dev),
312 if (sc->sysctl_tree == NULL) {
313 device_printf(dev, "could not add sysctl node\n");
319 if_initname(ifp, device_get_name(dev), device_get_unit(dev));
320 ifp->if_flags = IFF_BROADCAST | IFF_SIMPLEX | IFF_MULTICAST;
321 ifp->if_init = rt2661_init;
322 ifp->if_ioctl = rt2661_ioctl;
323 ifp->if_start = rt2661_start;
324 ifp->if_watchdog = rt2661_watchdog;
325 ifq_set_maxlen(&ifp->if_snd, IFQ_MAXLEN);
326 ifq_set_ready(&ifp->if_snd);
328 ic->ic_phytype = IEEE80211_T_OFDM; /* not only, but not used */
329 ic->ic_opmode = IEEE80211_M_STA; /* default to BSS mode */
330 ic->ic_state = IEEE80211_S_INIT;
331 rt2661_led_newstate(sc, IEEE80211_S_INIT);
333 /* set device capabilities */
335 IEEE80211_C_IBSS | /* IBSS mode supported */
336 IEEE80211_C_MONITOR | /* monitor mode supported */
337 IEEE80211_C_HOSTAP | /* HostAp mode supported */
338 IEEE80211_C_TXPMGT | /* tx power management */
339 IEEE80211_C_SHPREAMBLE | /* short preamble supported */
340 IEEE80211_C_SHSLOT | /* short slot time supported */
342 IEEE80211_C_WME | /* 802.11e */
344 IEEE80211_C_WEP | /* WEP */
345 IEEE80211_C_WPA; /* 802.11i */
347 if (sc->rf_rev == RT2661_RF_5225 || sc->rf_rev == RT2661_RF_5325) {
348 /* set supported .11a rates */
349 ic->ic_sup_rates[IEEE80211_MODE_11A] = rt2661_rateset_11a;
351 /* set supported .11a channels */
352 for (i = 36; i <= 64; i += 4) {
353 ic->ic_channels[i].ic_freq =
354 ieee80211_ieee2mhz(i, IEEE80211_CHAN_5GHZ);
355 ic->ic_channels[i].ic_flags = IEEE80211_CHAN_A;
357 for (i = 100; i <= 140; i += 4) {
358 ic->ic_channels[i].ic_freq =
359 ieee80211_ieee2mhz(i, IEEE80211_CHAN_5GHZ);
360 ic->ic_channels[i].ic_flags = IEEE80211_CHAN_A;
362 for (i = 149; i <= 165; i += 4) {
363 ic->ic_channels[i].ic_freq =
364 ieee80211_ieee2mhz(i, IEEE80211_CHAN_5GHZ);
365 ic->ic_channels[i].ic_flags = IEEE80211_CHAN_A;
369 /* set supported .11b and .11g rates */
370 ic->ic_sup_rates[IEEE80211_MODE_11B] = rt2661_rateset_11b;
371 ic->ic_sup_rates[IEEE80211_MODE_11G] = rt2661_rateset_11g;
373 /* set supported .11b and .11g channels (1 through 14) */
374 for (i = 1; i <= 14; i++) {
375 ic->ic_channels[i].ic_freq =
376 ieee80211_ieee2mhz(i, IEEE80211_CHAN_2GHZ);
377 ic->ic_channels[i].ic_flags =
378 IEEE80211_CHAN_CCK | IEEE80211_CHAN_OFDM |
379 IEEE80211_CHAN_DYN | IEEE80211_CHAN_2GHZ;
382 sc->sc_sifs = IEEE80211_DUR_SIFS; /* Default SIFS */
384 ieee80211_ifattach(ic);
385 ic->ic_node_alloc = rt2661_node_alloc;
386 /* ic->ic_wme.wme_update = rt2661_wme_update;*/
387 ic->ic_updateslot = rt2661_update_slot;
388 ic->ic_reset = rt2661_reset;
389 /* enable s/w bmiss handling in sta mode */
390 ic->ic_flags_ext |= IEEE80211_FEXT_SWBMISS;
392 /* override state transition machine */
393 sc->sc_newstate = ic->ic_newstate;
394 ic->ic_newstate = rt2661_newstate;
395 ieee80211_media_init(ic, rt2661_media_change, ieee80211_media_status);
397 bpfattach_dlt(ifp, DLT_IEEE802_11_RADIO,
398 sizeof (struct ieee80211_frame) + 64, &sc->sc_drvbpf);
400 sc->sc_rxtap_len = sizeof sc->sc_rxtapu;
401 sc->sc_rxtap.wr_ihdr.it_len = htole16(sc->sc_rxtap_len);
402 sc->sc_rxtap.wr_ihdr.it_present = htole32(RT2661_RX_RADIOTAP_PRESENT);
404 sc->sc_txtap_len = sizeof sc->sc_txtapu;
405 sc->sc_txtap.wt_ihdr.it_len = htole16(sc->sc_txtap_len);
406 sc->sc_txtap.wt_ihdr.it_present = htole32(RT2661_TX_RADIOTAP_PRESENT);
409 * Add a few sysctl knobs.
413 SYSCTL_ADD_INT(&sc->sysctl_ctx,
414 SYSCTL_CHILDREN(sc->sysctl_tree), OID_AUTO, "dwell",
415 CTLFLAG_RW, &sc->dwelltime, 0,
416 "channel dwell time (ms) for AP/station scanning");
418 error = bus_setup_intr(dev, sc->sc_irq, INTR_MPSAFE, rt2661_intr,
419 sc, &sc->sc_ih, ifp->if_serializer);
421 device_printf(dev, "could not set up interrupt\n");
423 ieee80211_ifdetach(ic);
428 ieee80211_announce(ic);
436 rt2661_detach(void *xsc)
438 struct rt2661_softc *sc = xsc;
439 struct ieee80211com *ic = &sc->sc_ic;
440 struct ifnet *ifp = &ic->ic_if;
442 if (device_is_attached(sc->sc_dev)) {
443 lwkt_serialize_enter(ifp->if_serializer);
445 callout_stop(&sc->scan_ch);
446 callout_stop(&sc->rssadapt_ch);
448 bus_teardown_intr(sc->sc_dev, sc->sc_irq, sc->sc_ih);
450 lwkt_serialize_exit(ifp->if_serializer);
453 ieee80211_ifdetach(ic);
456 rt2661_free_tx_ring(sc, &sc->txq[0]);
457 rt2661_free_tx_ring(sc, &sc->txq[1]);
458 rt2661_free_tx_ring(sc, &sc->txq[2]);
459 rt2661_free_tx_ring(sc, &sc->txq[3]);
460 rt2661_free_tx_ring(sc, &sc->mgtq);
461 rt2661_free_rx_ring(sc, &sc->rxq);
463 if (sc->sc_irq != NULL) {
464 bus_release_resource(sc->sc_dev, SYS_RES_IRQ, sc->sc_irq_rid,
468 if (sc->sysctl_tree != NULL)
469 sysctl_ctx_free(&sc->sysctl_ctx);
475 rt2661_shutdown(void *xsc)
477 struct rt2661_softc *sc = xsc;
478 struct ifnet *ifp = &sc->sc_ic.ic_if;
480 lwkt_serialize_enter(ifp->if_serializer);
482 lwkt_serialize_exit(ifp->if_serializer);
486 rt2661_suspend(void *xsc)
488 struct rt2661_softc *sc = xsc;
489 struct ifnet *ifp = &sc->sc_ic.ic_if;
491 lwkt_serialize_enter(ifp->if_serializer);
493 lwkt_serialize_exit(ifp->if_serializer);
497 rt2661_resume(void *xsc)
499 struct rt2661_softc *sc = xsc;
500 struct ifnet *ifp = sc->sc_ic.ic_ifp;
502 lwkt_serialize_enter(ifp->if_serializer);
503 if (ifp->if_flags & IFF_UP) {
504 ifp->if_init(ifp->if_softc);
505 if (ifp->if_flags & IFF_RUNNING)
508 lwkt_serialize_exit(ifp->if_serializer);
512 rt2661_dma_map_addr(void *arg, bus_dma_segment_t *segs, int nseg, int error)
517 KASSERT(nseg == 1, ("too many DMA segments, %d should be 1", nseg));
519 *(bus_addr_t *)arg = segs[0].ds_addr;
523 rt2661_alloc_tx_ring(struct rt2661_softc *sc, struct rt2661_tx_ring *ring,
530 ring->cur = ring->next = 0;
532 error = bus_dma_tag_create(NULL, 4, 0, BUS_SPACE_MAXADDR_32BIT,
533 BUS_SPACE_MAXADDR, NULL, NULL, count * RT2661_TX_DESC_SIZE, 1,
534 count * RT2661_TX_DESC_SIZE, 0, &ring->desc_dmat);
536 device_printf(sc->sc_dev, "could not create desc DMA tag\n");
540 error = bus_dmamem_alloc(ring->desc_dmat, (void **)&ring->desc,
541 BUS_DMA_WAITOK | BUS_DMA_ZERO, &ring->desc_map);
543 device_printf(sc->sc_dev, "could not allocate DMA memory\n");
547 error = bus_dmamap_load(ring->desc_dmat, ring->desc_map, ring->desc,
548 count * RT2661_TX_DESC_SIZE, rt2661_dma_map_addr, &ring->physaddr,
551 device_printf(sc->sc_dev, "could not load desc DMA map\n");
553 bus_dmamem_free(ring->desc_dmat, ring->desc, ring->desc_map);
558 ring->data = kmalloc(count * sizeof (struct rt2661_data), M_DEVBUF,
561 error = bus_dma_tag_create(NULL, 1, 0, BUS_SPACE_MAXADDR_32BIT,
562 BUS_SPACE_MAXADDR, NULL, NULL, MCLBYTES * RT2661_MAX_SCATTER,
563 RT2661_MAX_SCATTER, MCLBYTES, 0, &ring->data_dmat);
565 device_printf(sc->sc_dev, "could not create data DMA tag\n");
569 for (i = 0; i < count; i++) {
570 error = bus_dmamap_create(ring->data_dmat, 0,
573 device_printf(sc->sc_dev, "could not create DMA map\n");
579 fail: rt2661_free_tx_ring(sc, ring);
584 rt2661_reset_tx_ring(struct rt2661_softc *sc, struct rt2661_tx_ring *ring)
586 struct rt2661_tx_desc *desc;
587 struct rt2661_data *data;
590 for (i = 0; i < ring->count; i++) {
591 desc = &ring->desc[i];
592 data = &ring->data[i];
594 if (data->m != NULL) {
595 bus_dmamap_sync(ring->data_dmat, data->map,
596 BUS_DMASYNC_POSTWRITE);
597 bus_dmamap_unload(ring->data_dmat, data->map);
605 bus_dmamap_sync(ring->desc_dmat, ring->desc_map, BUS_DMASYNC_PREWRITE);
608 ring->cur = ring->next = 0;
612 rt2661_free_tx_ring(struct rt2661_softc *sc, struct rt2661_tx_ring *ring)
614 struct rt2661_data *data;
617 if (ring->desc != NULL) {
618 bus_dmamap_sync(ring->desc_dmat, ring->desc_map,
619 BUS_DMASYNC_POSTWRITE);
620 bus_dmamap_unload(ring->desc_dmat, ring->desc_map);
621 bus_dmamem_free(ring->desc_dmat, ring->desc, ring->desc_map);
625 if (ring->desc_dmat != NULL) {
626 bus_dma_tag_destroy(ring->desc_dmat);
627 ring->desc_dmat = NULL;
630 if (ring->data != NULL) {
631 for (i = 0; i < ring->count; i++) {
632 data = &ring->data[i];
634 if (data->m != NULL) {
635 bus_dmamap_sync(ring->data_dmat, data->map,
636 BUS_DMASYNC_POSTWRITE);
637 bus_dmamap_unload(ring->data_dmat, data->map);
642 if (data->map != NULL) {
643 bus_dmamap_destroy(ring->data_dmat, data->map);
648 kfree(ring->data, M_DEVBUF);
652 if (ring->data_dmat != NULL) {
653 bus_dma_tag_destroy(ring->data_dmat);
654 ring->data_dmat = NULL;
659 rt2661_alloc_rx_ring(struct rt2661_softc *sc, struct rt2661_rx_ring *ring,
662 struct rt2661_rx_desc *desc;
663 struct rt2661_data *data;
668 ring->cur = ring->next = 0;
670 error = bus_dma_tag_create(NULL, 4, 0, BUS_SPACE_MAXADDR_32BIT,
671 BUS_SPACE_MAXADDR, NULL, NULL, count * RT2661_RX_DESC_SIZE, 1,
672 count * RT2661_RX_DESC_SIZE, 0, &ring->desc_dmat);
674 device_printf(sc->sc_dev, "could not create desc DMA tag\n");
678 error = bus_dmamem_alloc(ring->desc_dmat, (void **)&ring->desc,
679 BUS_DMA_WAITOK | BUS_DMA_ZERO, &ring->desc_map);
681 device_printf(sc->sc_dev, "could not allocate DMA memory\n");
685 error = bus_dmamap_load(ring->desc_dmat, ring->desc_map, ring->desc,
686 count * RT2661_RX_DESC_SIZE, rt2661_dma_map_addr, &ring->physaddr,
689 device_printf(sc->sc_dev, "could not load desc DMA map\n");
691 bus_dmamem_free(ring->desc_dmat, ring->desc, ring->desc_map);
696 ring->data = kmalloc(count * sizeof (struct rt2661_data), M_DEVBUF,
700 * Pre-allocate Rx buffers and populate Rx ring.
702 error = bus_dma_tag_create(NULL, 1, 0, BUS_SPACE_MAXADDR_32BIT,
703 BUS_SPACE_MAXADDR, NULL, NULL, MCLBYTES, 1, MCLBYTES, 0,
706 device_printf(sc->sc_dev, "could not create data DMA tag\n");
710 for (i = 0; i < count; i++) {
711 desc = &sc->rxq.desc[i];
712 data = &sc->rxq.data[i];
714 error = bus_dmamap_create(ring->data_dmat, 0, &data->map);
716 device_printf(sc->sc_dev, "could not create DMA map\n");
720 data->m = m_getcl(MB_DONTWAIT, MT_DATA, M_PKTHDR);
721 if (data->m == NULL) {
722 device_printf(sc->sc_dev,
723 "could not allocate rx mbuf\n");
728 error = bus_dmamap_load(ring->data_dmat, data->map,
729 mtod(data->m, void *), MCLBYTES, rt2661_dma_map_addr,
732 device_printf(sc->sc_dev,
733 "could not load rx buf DMA map");
740 desc->flags = htole32(RT2661_RX_BUSY);
741 desc->physaddr = htole32(physaddr);
744 bus_dmamap_sync(ring->desc_dmat, ring->desc_map, BUS_DMASYNC_PREWRITE);
748 fail: rt2661_free_rx_ring(sc, ring);
753 rt2661_reset_rx_ring(struct rt2661_softc *sc, struct rt2661_rx_ring *ring)
757 for (i = 0; i < ring->count; i++)
758 ring->desc[i].flags = htole32(RT2661_RX_BUSY);
760 bus_dmamap_sync(ring->desc_dmat, ring->desc_map, BUS_DMASYNC_PREWRITE);
762 ring->cur = ring->next = 0;
766 rt2661_free_rx_ring(struct rt2661_softc *sc, struct rt2661_rx_ring *ring)
768 struct rt2661_data *data;
771 if (ring->desc != NULL) {
772 bus_dmamap_sync(ring->desc_dmat, ring->desc_map,
773 BUS_DMASYNC_POSTWRITE);
774 bus_dmamap_unload(ring->desc_dmat, ring->desc_map);
775 bus_dmamem_free(ring->desc_dmat, ring->desc, ring->desc_map);
779 if (ring->desc_dmat != NULL) {
780 bus_dma_tag_destroy(ring->desc_dmat);
781 ring->desc_dmat = NULL;
784 if (ring->data != NULL) {
785 for (i = 0; i < ring->count; i++) {
786 data = &ring->data[i];
788 if (data->m != NULL) {
789 bus_dmamap_sync(ring->data_dmat, data->map,
790 BUS_DMASYNC_POSTREAD);
791 bus_dmamap_unload(ring->data_dmat, data->map);
796 if (data->map != NULL) {
797 bus_dmamap_destroy(ring->data_dmat, data->map);
802 kfree(ring->data, M_DEVBUF);
806 if (ring->data_dmat != NULL) {
807 bus_dma_tag_destroy(ring->data_dmat);
808 ring->data_dmat = NULL;
812 static struct ieee80211_node *
813 rt2661_node_alloc(struct ieee80211_node_table *nt)
815 struct rt2661_node *rn;
817 rn = kmalloc(sizeof (struct rt2661_node), M_80211_NODE,
820 return (rn != NULL) ? &rn->ni : NULL;
824 rt2661_media_change(struct ifnet *ifp)
826 struct rt2661_softc *sc = ifp->if_softc;
829 error = ieee80211_media_change(ifp);
830 if (error != ENETRESET)
833 if ((ifp->if_flags & (IFF_UP | IFF_RUNNING)) == (IFF_UP | IFF_RUNNING))
839 * This function is called periodically (every 200ms) during scanning to
840 * switch from one channel to another.
843 rt2661_next_scan(void *arg)
845 struct rt2661_softc *sc = arg;
846 struct ieee80211com *ic = &sc->sc_ic;
847 struct ifnet *ifp = &ic->ic_if;
849 lwkt_serialize_enter(ifp->if_serializer);
850 if (ic->ic_state == IEEE80211_S_SCAN)
851 ieee80211_next_scan(ic);
852 lwkt_serialize_exit(ifp->if_serializer);
856 * This function is called for each node present in the node station table.
859 rt2661_iter_func(void *arg, struct ieee80211_node *ni)
861 struct rt2661_node *rn = (struct rt2661_node *)ni;
863 ral_rssadapt_updatestats(&rn->rssadapt);
867 * This function is called periodically (every 100ms) in RUN state to update
868 * the rate adaptation statistics.
871 rt2661_update_rssadapt(void *arg)
873 struct rt2661_softc *sc = arg;
874 struct ieee80211com *ic = &sc->sc_ic;
875 struct ifnet *ifp = &ic->ic_if;
877 lwkt_serialize_enter(ifp->if_serializer);
879 ieee80211_iterate_nodes(&ic->ic_sta, rt2661_iter_func, arg);
880 callout_reset(&sc->rssadapt_ch, hz / 10, rt2661_update_rssadapt, sc);
882 lwkt_serialize_exit(ifp->if_serializer);
886 rt2661_newstate(struct ieee80211com *ic, enum ieee80211_state nstate, int arg)
888 struct rt2661_softc *sc = ic->ic_ifp->if_softc;
889 enum ieee80211_state ostate;
890 struct ieee80211_node *ni;
894 ostate = ic->ic_state;
895 callout_stop(&sc->scan_ch);
897 if (ostate != nstate)
898 rt2661_led_newstate(sc, nstate);
901 case IEEE80211_S_INIT:
902 callout_stop(&sc->rssadapt_ch);
904 if (ostate == IEEE80211_S_RUN) {
905 /* abort TSF synchronization */
906 tmp = RAL_READ(sc, RT2661_TXRX_CSR9);
907 RAL_WRITE(sc, RT2661_TXRX_CSR9, tmp & ~0x00ffffff);
911 case IEEE80211_S_SCAN:
912 rt2661_set_chan(sc, ic->ic_curchan);
913 callout_reset(&sc->scan_ch, (sc->dwelltime * hz) / 1000,
914 rt2661_next_scan, sc);
917 case IEEE80211_S_AUTH:
918 case IEEE80211_S_ASSOC:
919 rt2661_set_chan(sc, ic->ic_curchan);
922 case IEEE80211_S_RUN:
923 rt2661_set_chan(sc, ic->ic_curchan);
927 if (ic->ic_opmode != IEEE80211_M_MONITOR) {
928 rt2661_enable_mrr(sc);
929 rt2661_set_txpreamble(sc);
930 rt2661_set_basicrates(sc, &ni->ni_rates);
931 rt2661_set_bssid(sc, ni->ni_bssid);
934 if (ic->ic_opmode == IEEE80211_M_HOSTAP ||
935 ic->ic_opmode == IEEE80211_M_IBSS) {
936 if ((error = rt2661_prepare_beacon(sc)) != 0)
940 if (ic->ic_opmode != IEEE80211_M_MONITOR) {
941 callout_reset(&sc->rssadapt_ch, hz / 10,
942 rt2661_update_rssadapt, sc);
943 rt2661_enable_tsf_sync(sc);
948 return (error != 0) ? error : sc->sc_newstate(ic, nstate, arg);
952 * Read 16 bits at address 'addr' from the serial EEPROM (either 93C46 or
956 rt2661_eeprom_read(struct rt2661_softc *sc, uint8_t addr)
962 /* clock C once before the first command */
963 RT2661_EEPROM_CTL(sc, 0);
965 RT2661_EEPROM_CTL(sc, RT2661_S);
966 RT2661_EEPROM_CTL(sc, RT2661_S | RT2661_C);
967 RT2661_EEPROM_CTL(sc, RT2661_S);
969 /* write start bit (1) */
970 RT2661_EEPROM_CTL(sc, RT2661_S | RT2661_D);
971 RT2661_EEPROM_CTL(sc, RT2661_S | RT2661_D | RT2661_C);
973 /* write READ opcode (10) */
974 RT2661_EEPROM_CTL(sc, RT2661_S | RT2661_D);
975 RT2661_EEPROM_CTL(sc, RT2661_S | RT2661_D | RT2661_C);
976 RT2661_EEPROM_CTL(sc, RT2661_S);
977 RT2661_EEPROM_CTL(sc, RT2661_S | RT2661_C);
979 /* write address (A5-A0 or A7-A0) */
980 n = (RAL_READ(sc, RT2661_E2PROM_CSR) & RT2661_93C46) ? 5 : 7;
981 for (; n >= 0; n--) {
982 RT2661_EEPROM_CTL(sc, RT2661_S |
983 (((addr >> n) & 1) << RT2661_SHIFT_D));
984 RT2661_EEPROM_CTL(sc, RT2661_S |
985 (((addr >> n) & 1) << RT2661_SHIFT_D) | RT2661_C);
988 RT2661_EEPROM_CTL(sc, RT2661_S);
990 /* read data Q15-Q0 */
992 for (n = 15; n >= 0; n--) {
993 RT2661_EEPROM_CTL(sc, RT2661_S | RT2661_C);
994 tmp = RAL_READ(sc, RT2661_E2PROM_CSR);
995 val |= ((tmp & RT2661_Q) >> RT2661_SHIFT_Q) << n;
996 RT2661_EEPROM_CTL(sc, RT2661_S);
999 RT2661_EEPROM_CTL(sc, 0);
1001 /* clear Chip Select and clock C */
1002 RT2661_EEPROM_CTL(sc, RT2661_S);
1003 RT2661_EEPROM_CTL(sc, 0);
1004 RT2661_EEPROM_CTL(sc, RT2661_C);
1010 rt2661_tx_intr(struct rt2661_softc *sc)
1012 struct ieee80211com *ic = &sc->sc_ic;
1013 struct ifnet *ifp = ic->ic_ifp;
1014 struct rt2661_tx_ratectl *rctl;
1015 struct rt2661_node *rn;
1016 uint32_t val, result;
1020 val = RAL_READ(sc, RT2661_STA_CSR4);
1021 if (!(val & RT2661_TX_STAT_VALID))
1024 /* Gather statistics */
1025 result = RT2661_TX_RESULT(val);
1026 if (result == RT2661_TX_SUCCESS)
1031 /* No rate control */
1032 if (RT2661_TX_QID(val) == 0)
1035 /* retrieve rate control algorithm context */
1036 rctl = STAILQ_FIRST(&sc->tx_ratectl);
1040 * This really should not happen. Maybe we should
1041 * use assertion here? But why should we rely on
1042 * hardware to do the correct things? Even the
1043 * reference driver (RT61?) provided by Ralink does
1044 * not provide enough clue that this kind of interrupt
1045 * is promised to be generated for each packet. So
1046 * just print a message and keep going ...
1048 if_printf(ifp, "WARNING: no rate control information\n");
1051 STAILQ_REMOVE_HEAD(&sc->tx_ratectl, link);
1053 rn = (struct rt2661_node *)rctl->ni;
1056 case RT2661_TX_SUCCESS:
1057 retrycnt = RT2661_TX_RETRYCNT(val);
1059 DPRINTFN(10, ("data frame sent successfully after "
1060 "%d retries\n", retrycnt));
1061 if (retrycnt == 0 && rctl->id.id_node != NULL) {
1062 ral_rssadapt_raise_rate(ic, &rn->rssadapt,
1067 case RT2661_TX_RETRY_FAIL:
1068 DPRINTFN(9, ("sending data frame failed (too much "
1070 if (rctl->id.id_node != NULL) {
1071 ral_rssadapt_lower_rate(ic, rctl->ni,
1072 &rn->rssadapt, &rctl->id);
1078 device_printf(sc->sc_dev,
1079 "sending data frame failed 0x%08x\n", val);
1083 ieee80211_free_node(rctl->ni);
1085 kfree(rctl, M_RT2661);
1090 rt2661_tx_dma_intr(struct rt2661_softc *sc, struct rt2661_tx_ring *txq)
1092 struct rt2661_tx_desc *desc;
1093 struct rt2661_data *data;
1095 bus_dmamap_sync(txq->desc_dmat, txq->desc_map, BUS_DMASYNC_POSTREAD);
1098 desc = &txq->desc[txq->next];
1099 data = &txq->data[txq->next];
1101 if ((le32toh(desc->flags) & RT2661_TX_BUSY) ||
1102 !(le32toh(desc->flags) & RT2661_TX_VALID))
1105 bus_dmamap_sync(txq->data_dmat, data->map,
1106 BUS_DMASYNC_POSTWRITE);
1107 bus_dmamap_unload(txq->data_dmat, data->map);
1111 /* descriptor is no longer valid */
1112 desc->flags &= ~htole32(RT2661_TX_VALID);
1114 DPRINTFN(15, ("tx dma done q=%p idx=%u\n", txq, txq->next));
1117 if (++txq->next >= txq->count) /* faster than % count */
1121 bus_dmamap_sync(txq->desc_dmat, txq->desc_map, BUS_DMASYNC_PREWRITE);
1123 if (txq->queued < txq->count) {
1124 struct ifnet *ifp = &sc->sc_ic.ic_if;
1126 sc->sc_tx_timer = 0;
1127 ifp->if_flags &= ~IFF_OACTIVE;
1133 rt2661_rx_intr(struct rt2661_softc *sc)
1135 struct ieee80211com *ic = &sc->sc_ic;
1136 struct ifnet *ifp = ic->ic_ifp;
1137 struct rt2661_rx_desc *desc;
1138 struct rt2661_data *data;
1139 bus_addr_t physaddr;
1140 struct ieee80211_frame_min *wh;
1141 struct ieee80211_node *ni;
1142 struct rt2661_node *rn;
1143 struct mbuf *mnew, *m;
1146 bus_dmamap_sync(sc->rxq.desc_dmat, sc->rxq.desc_map,
1147 BUS_DMASYNC_POSTREAD);
1152 desc = &sc->rxq.desc[sc->rxq.cur];
1153 data = &sc->rxq.data[sc->rxq.cur];
1155 if (le32toh(desc->flags) & RT2661_RX_BUSY)
1158 if ((le32toh(desc->flags) & RT2661_RX_PHY_ERROR) ||
1159 (le32toh(desc->flags) & RT2661_RX_CRC_ERROR)) {
1161 * This should not happen since we did not request
1162 * to receive those frames when we filled TXRX_CSR0.
1164 DPRINTFN(5, ("PHY or CRC error flags 0x%08x\n",
1165 le32toh(desc->flags)));
1170 if ((le32toh(desc->flags) & RT2661_RX_CIPHER_MASK) != 0) {
1176 * Try to allocate a new mbuf for this ring element and load it
1177 * before processing the current mbuf. If the ring element
1178 * cannot be loaded, drop the received packet and reuse the old
1179 * mbuf. In the unlikely case that the old mbuf can't be
1180 * reloaded either, explicitly panic.
1182 mnew = m_getcl(MB_DONTWAIT, MT_DATA, M_PKTHDR);
1188 bus_dmamap_sync(sc->rxq.data_dmat, data->map,
1189 BUS_DMASYNC_POSTREAD);
1190 bus_dmamap_unload(sc->rxq.data_dmat, data->map);
1192 error = bus_dmamap_load(sc->rxq.data_dmat, data->map,
1193 mtod(mnew, void *), MCLBYTES, rt2661_dma_map_addr,
1198 /* try to reload the old mbuf */
1199 error = bus_dmamap_load(sc->rxq.data_dmat, data->map,
1200 mtod(data->m, void *), MCLBYTES,
1201 rt2661_dma_map_addr, &physaddr, 0);
1203 /* very unlikely that it will fail... */
1204 panic("%s: could not load old rx mbuf",
1205 device_get_name(sc->sc_dev));
1212 * New mbuf successfully loaded, update Rx ring and continue
1217 desc->physaddr = htole32(physaddr);
1220 m->m_pkthdr.rcvif = ifp;
1221 m->m_pkthdr.len = m->m_len =
1222 (le32toh(desc->flags) >> 16) & 0xfff;
1224 rssi = rt2661_get_rssi(sc, desc->rssi);
1226 wh = mtod(m, struct ieee80211_frame_min *);
1227 ni = ieee80211_find_rxnode(ic, wh);
1229 /* Error happened during RSSI conversion. */
1233 if (sc->sc_drvbpf != NULL) {
1234 struct rt2661_rx_radiotap_header *tap = &sc->sc_rxtap;
1235 uint32_t tsf_lo, tsf_hi;
1237 /* get timestamp (low and high 32 bits) */
1238 tsf_hi = RAL_READ(sc, RT2661_TXRX_CSR13);
1239 tsf_lo = RAL_READ(sc, RT2661_TXRX_CSR12);
1242 htole64(((uint64_t)tsf_hi << 32) | tsf_lo);
1244 tap->wr_rate = rt2661_rxrate(desc);
1245 tap->wr_chan_freq = htole16(ic->ic_curchan->ic_freq);
1246 tap->wr_chan_flags = htole16(ic->ic_curchan->ic_flags);
1247 tap->wr_antsignal = rssi;
1249 bpf_ptap(sc->sc_drvbpf, m, tap, sc->sc_rxtap_len);
1252 /* send the frame to the 802.11 layer */
1253 ieee80211_input(ic, m, ni, rssi, 0);
1255 /* give rssi to the rate adatation algorithm */
1256 rn = (struct rt2661_node *)ni;
1257 ral_rssadapt_input(ic, ni, &rn->rssadapt, rssi);
1259 /* node is no longer needed */
1260 ieee80211_free_node(ni);
1262 skip: desc->flags |= htole32(RT2661_RX_BUSY);
1264 DPRINTFN(15, ("rx intr idx=%u\n", sc->rxq.cur));
1266 sc->rxq.cur = (sc->rxq.cur + 1) % RT2661_RX_RING_COUNT;
1269 bus_dmamap_sync(sc->rxq.desc_dmat, sc->rxq.desc_map,
1270 BUS_DMASYNC_PREWRITE);
1275 rt2661_mcu_beacon_expire(struct rt2661_softc *sc)
1281 rt2661_mcu_wakeup(struct rt2661_softc *sc)
1283 RAL_WRITE(sc, RT2661_MAC_CSR11, 5 << 16);
1285 RAL_WRITE(sc, RT2661_SOFT_RESET_CSR, 0x7);
1286 RAL_WRITE(sc, RT2661_IO_CNTL_CSR, 0x18);
1287 RAL_WRITE(sc, RT2661_PCI_USEC_CSR, 0x20);
1289 /* send wakeup command to MCU */
1290 rt2661_tx_cmd(sc, RT2661_MCU_CMD_WAKEUP, 0);
1294 rt2661_mcu_cmd_intr(struct rt2661_softc *sc)
1296 RAL_READ(sc, RT2661_M2H_CMD_DONE_CSR);
1297 RAL_WRITE(sc, RT2661_M2H_CMD_DONE_CSR, 0xffffffff);
1301 rt2661_intr(void *arg)
1303 struct rt2661_softc *sc = arg;
1304 struct ifnet *ifp = &sc->sc_ic.ic_if;
1307 /* disable MAC and MCU interrupts */
1308 RAL_WRITE(sc, RT2661_INT_MASK_CSR, 0xffffff7f);
1309 RAL_WRITE(sc, RT2661_MCU_INT_MASK_CSR, 0xffffffff);
1311 /* don't re-enable interrupts if we're shutting down */
1312 if (!(ifp->if_flags & IFF_RUNNING))
1315 r1 = RAL_READ(sc, RT2661_INT_SOURCE_CSR);
1316 RAL_WRITE(sc, RT2661_INT_SOURCE_CSR, r1);
1318 r2 = RAL_READ(sc, RT2661_MCU_INT_SOURCE_CSR);
1319 RAL_WRITE(sc, RT2661_MCU_INT_SOURCE_CSR, r2);
1321 if (r1 & RT2661_MGT_DONE)
1322 rt2661_tx_dma_intr(sc, &sc->mgtq);
1324 if (r1 & RT2661_RX_DONE)
1327 if (r1 & RT2661_TX0_DMA_DONE)
1328 rt2661_tx_dma_intr(sc, &sc->txq[0]);
1330 if (r1 & RT2661_TX1_DMA_DONE)
1331 rt2661_tx_dma_intr(sc, &sc->txq[1]);
1333 if (r1 & RT2661_TX2_DMA_DONE)
1334 rt2661_tx_dma_intr(sc, &sc->txq[2]);
1336 if (r1 & RT2661_TX3_DMA_DONE)
1337 rt2661_tx_dma_intr(sc, &sc->txq[3]);
1339 if (r1 & RT2661_TX_DONE)
1342 if (r2 & RT2661_MCU_CMD_DONE)
1343 rt2661_mcu_cmd_intr(sc);
1345 if (r2 & RT2661_MCU_BEACON_EXPIRE)
1346 rt2661_mcu_beacon_expire(sc);
1348 if (r2 & RT2661_MCU_WAKEUP)
1349 rt2661_mcu_wakeup(sc);
1351 /* re-enable MAC and MCU interrupts */
1352 RAL_WRITE(sc, RT2661_INT_MASK_CSR, 0x0000ff10);
1353 RAL_WRITE(sc, RT2661_MCU_INT_MASK_CSR, 0);
1356 /* quickly determine if a given rate is CCK or OFDM */
1357 #define RAL_RATE_IS_OFDM(rate) ((rate) >= 12 && (rate) != 22)
1359 #define RAL_ACK_SIZE (sizeof(struct ieee80211_frame_ack) + IEEE80211_FCS_LEN)
1360 #define RAL_CTS_SIZE (sizeof(struct ieee80211_frame_cts) + IEEE80211_FCS_LEN)
1363 * This function is only used by the Rx radiotap code. It returns the rate at
1364 * which a given frame was received.
1367 rt2661_rxrate(struct rt2661_rx_desc *desc)
1369 if (le32toh(desc->flags) & RT2661_RX_OFDM) {
1370 /* reverse function of rt2661_plcp_signal */
1371 switch (desc->rate & 0xf) {
1372 case 0xb: return 12;
1373 case 0xf: return 18;
1374 case 0xa: return 24;
1375 case 0xe: return 36;
1376 case 0x9: return 48;
1377 case 0xd: return 72;
1378 case 0x8: return 96;
1379 case 0xc: return 108;
1382 if (desc->rate == 10)
1384 if (desc->rate == 20)
1386 if (desc->rate == 55)
1388 if (desc->rate == 110)
1391 return 2; /* should not get there */
1395 rt2661_plcp_signal(int rate)
1398 /* CCK rates (returned values are device-dependent) */
1401 case 11: return 0x2;
1402 case 22: return 0x3;
1404 /* OFDM rates (cf IEEE Std 802.11a-1999, pp. 14 Table 80) */
1405 case 12: return 0xb;
1406 case 18: return 0xf;
1407 case 24: return 0xa;
1408 case 36: return 0xe;
1409 case 48: return 0x9;
1410 case 72: return 0xd;
1411 case 96: return 0x8;
1412 case 108: return 0xc;
1414 /* unsupported rates (should not get there) */
1415 default: return 0xff;
1420 rt2661_setup_tx_desc(struct rt2661_softc *sc, struct rt2661_tx_desc *desc,
1421 uint32_t flags, uint16_t xflags, int len, int rate,
1422 const bus_dma_segment_t *segs, int nsegs, int ac, int ratectl)
1424 struct ieee80211com *ic = &sc->sc_ic;
1425 uint16_t plcp_length;
1428 desc->flags = htole32(flags);
1429 desc->flags |= htole32(len << 16);
1430 desc->flags |= htole32(RT2661_TX_VALID);
1432 desc->xflags = htole16(xflags);
1433 desc->xflags |= htole16(nsegs << 13);
1435 desc->wme = htole16(
1438 RT2661_LOGCWMIN(4) |
1439 RT2661_LOGCWMAX(10));
1442 * Remember whether TX rate control information should be gathered.
1443 * This field is driver private data only. It will be made available
1444 * by the NIC in STA_CSR4 on Tx done interrupts.
1446 desc->qid = ratectl;
1448 /* setup PLCP fields */
1449 desc->plcp_signal = rt2661_plcp_signal(rate);
1450 desc->plcp_service = 4;
1452 len += IEEE80211_CRC_LEN;
1453 if (RAL_RATE_IS_OFDM(rate)) {
1454 desc->flags |= htole32(RT2661_TX_OFDM);
1456 plcp_length = len & 0xfff;
1457 desc->plcp_length_hi = plcp_length >> 6;
1458 desc->plcp_length_lo = plcp_length & 0x3f;
1460 plcp_length = (16 * len + rate - 1) / rate;
1462 remainder = (16 * len) % 22;
1463 if (remainder != 0 && remainder < 7)
1464 desc->plcp_service |= RT2661_PLCP_LENGEXT;
1466 desc->plcp_length_hi = plcp_length >> 8;
1467 desc->plcp_length_lo = plcp_length & 0xff;
1469 if (rate != 2 && (ic->ic_flags & IEEE80211_F_SHPREAMBLE))
1470 desc->plcp_signal |= 0x08;
1473 /* RT2x61 supports scatter with up to 5 segments */
1474 for (i = 0; i < nsegs; i++) {
1475 desc->addr[i] = htole32(segs[i].ds_addr);
1476 desc->len [i] = htole16(segs[i].ds_len);
1479 desc->flags |= htole32(RT2661_TX_BUSY);
1483 rt2661_tx_mgt(struct rt2661_softc *sc, struct mbuf *m0,
1484 struct ieee80211_node *ni)
1486 struct ieee80211com *ic = &sc->sc_ic;
1487 struct rt2661_tx_desc *desc;
1488 struct rt2661_data *data;
1489 struct ieee80211_frame *wh;
1490 struct rt2661_dmamap map;
1492 uint32_t flags = 0; /* XXX HWSEQ */
1495 desc = &sc->mgtq.desc[sc->mgtq.cur];
1496 data = &sc->mgtq.data[sc->mgtq.cur];
1498 /* send mgt frames at the lowest available rate */
1499 rate = IEEE80211_IS_CHAN_5GHZ(ic->ic_curchan) ? 12 : 2;
1501 error = bus_dmamap_load_mbuf(sc->mgtq.data_dmat, data->map, m0,
1502 rt2661_dma_map_mbuf, &map, 0);
1504 device_printf(sc->sc_dev, "could not map mbuf (error %d)\n",
1510 if (sc->sc_drvbpf != NULL) {
1511 struct rt2661_tx_radiotap_header *tap = &sc->sc_txtap;
1514 tap->wt_rate = rate;
1515 tap->wt_chan_freq = htole16(ic->ic_curchan->ic_freq);
1516 tap->wt_chan_flags = htole16(ic->ic_curchan->ic_flags);
1518 bpf_ptap(sc->sc_drvbpf, m0, tap, sc->sc_txtap_len);
1523 wh = mtod(m0, struct ieee80211_frame *);
1525 if (!IEEE80211_IS_MULTICAST(wh->i_addr1)) {
1526 flags |= RT2661_TX_NEED_ACK;
1528 dur = ieee80211_txtime(ni, RAL_ACK_SIZE, rate, ic->ic_flags) +
1530 *(uint16_t *)wh->i_dur = htole16(dur);
1532 /* tell hardware to add timestamp in probe responses */
1534 (IEEE80211_FC0_TYPE_MASK | IEEE80211_FC0_SUBTYPE_MASK)) ==
1535 (IEEE80211_FC0_TYPE_MGT | IEEE80211_FC0_SUBTYPE_PROBE_RESP))
1536 flags |= RT2661_TX_TIMESTAMP;
1539 rt2661_setup_tx_desc(sc, desc, flags, 0 /* XXX HWSEQ */,
1540 m0->m_pkthdr.len, rate, map.segs, map.nseg, RT2661_QID_MGT, 0);
1542 bus_dmamap_sync(sc->mgtq.data_dmat, data->map, BUS_DMASYNC_PREWRITE);
1543 bus_dmamap_sync(sc->mgtq.desc_dmat, sc->mgtq.desc_map,
1544 BUS_DMASYNC_PREWRITE);
1546 DPRINTFN(10, ("sending mgt frame len=%u idx=%u rate=%u\n",
1547 m0->m_pkthdr.len, sc->mgtq.cur, rate));
1551 sc->mgtq.cur = (sc->mgtq.cur + 1) % RT2661_MGT_RING_COUNT;
1552 RAL_WRITE(sc, RT2661_TX_CNTL_CSR, RT2661_KICK_MGT);
1554 ieee80211_free_node(ni);
1560 * Build a RTS control frame.
1562 static struct mbuf *
1563 rt2661_get_rts(struct rt2661_softc *sc, struct ieee80211_frame *wh,
1566 struct ieee80211_frame_rts *rts;
1569 MGETHDR(m, MB_DONTWAIT, MT_DATA);
1571 sc->sc_ic.ic_stats.is_tx_nobuf++;
1572 device_printf(sc->sc_dev, "could not allocate RTS frame\n");
1576 rts = mtod(m, struct ieee80211_frame_rts *);
1578 rts->i_fc[0] = IEEE80211_FC0_VERSION_0 | IEEE80211_FC0_TYPE_CTL |
1579 IEEE80211_FC0_SUBTYPE_RTS;
1580 rts->i_fc[1] = IEEE80211_FC1_DIR_NODS;
1581 *(uint16_t *)rts->i_dur = htole16(dur);
1582 IEEE80211_ADDR_COPY(rts->i_ra, wh->i_addr1);
1583 IEEE80211_ADDR_COPY(rts->i_ta, wh->i_addr2);
1585 m->m_pkthdr.len = m->m_len = sizeof (struct ieee80211_frame_rts);
1591 rt2661_tx_data(struct rt2661_softc *sc, struct mbuf *m0,
1592 struct ieee80211_node *ni, int ac)
1594 struct ieee80211com *ic = &sc->sc_ic;
1595 struct rt2661_tx_ring *txq = &sc->txq[ac];
1596 struct rt2661_tx_desc *desc;
1597 struct rt2661_data *data;
1598 struct rt2661_tx_ratectl *rctl;
1599 struct rt2661_node *rn;
1600 struct ieee80211_rateset *rs;
1601 struct ieee80211_frame *wh;
1602 struct ieee80211_key *k;
1603 const struct chanAccParams *cap;
1605 struct rt2661_dmamap map;
1608 int error, rate, ackrate, noack = 0;
1610 wh = mtod(m0, struct ieee80211_frame *);
1612 if (ic->ic_fixed_rate != IEEE80211_FIXED_RATE_NONE) {
1613 rs = &ic->ic_sup_rates[ic->ic_curmode];
1614 rate = rs->rs_rates[ic->ic_fixed_rate];
1617 rn = (struct rt2661_node *)ni;
1618 ni->ni_txrate = ral_rssadapt_choose(&rn->rssadapt, rs,
1619 wh, m0->m_pkthdr.len, NULL, 0);
1620 rate = rs->rs_rates[ni->ni_txrate];
1622 rate &= IEEE80211_RATE_VAL;
1624 if (wh->i_fc[0] & IEEE80211_FC0_SUBTYPE_QOS) {
1625 cap = &ic->ic_wme.wme_chanParams;
1626 noack = cap->cap_wmeParams[ac].wmep_noackPolicy;
1629 if (wh->i_fc[1] & IEEE80211_FC1_WEP) {
1630 k = ieee80211_crypto_encap(ic, ni, m0);
1636 /* packet header may have moved, reset our local pointer */
1637 wh = mtod(m0, struct ieee80211_frame *);
1640 ackrate = ieee80211_ack_rate(ni, rate);
1643 * IEEE Std 802.11-1999, pp 82: "A STA shall use an RTS/CTS exchange
1644 * for directed frames only when the length of the MPDU is greater
1645 * than the length threshold indicated by [...]" ic_rtsthreshold.
1647 if (!IEEE80211_IS_MULTICAST(wh->i_addr1) &&
1648 m0->m_pkthdr.len > ic->ic_rtsthreshold) {
1653 rtsrate = IEEE80211_IS_CHAN_5GHZ(ic->ic_curchan) ? 12 : 2;
1655 /* XXX: noack (QoS)? */
1656 dur = ieee80211_txtime(ni, m0->m_pkthdr.len + IEEE80211_FCS_LEN,
1657 rate, ic->ic_flags) +
1658 ieee80211_txtime(ni, RAL_CTS_SIZE, rtsrate, ic->ic_flags)+
1659 ieee80211_txtime(ni, RAL_ACK_SIZE, ackrate, ic->ic_flags)+
1662 m = rt2661_get_rts(sc, wh, dur);
1664 desc = &txq->desc[txq->cur];
1665 data = &txq->data[txq->cur];
1667 error = bus_dmamap_load_mbuf(txq->data_dmat, data->map, m,
1668 rt2661_dma_map_mbuf, &map, 0);
1670 device_printf(sc->sc_dev,
1671 "could not map mbuf (error %d)\n", error);
1679 rt2661_setup_tx_desc(sc, desc, RT2661_TX_NEED_ACK |
1680 RT2661_TX_MORE_FRAG, 0, m->m_pkthdr.len,
1681 rtsrate, map.segs, map.nseg, ac, 0);
1683 bus_dmamap_sync(txq->data_dmat, data->map,
1684 BUS_DMASYNC_PREWRITE);
1687 txq->cur = (txq->cur + 1) % RT2661_TX_RING_COUNT;
1690 * IEEE Std 802.11-1999: when an RTS/CTS exchange is used, the
1691 * asynchronous data frame shall be transmitted after the CTS
1692 * frame and a SIFS period.
1694 flags |= RT2661_TX_LONG_RETRY | RT2661_TX_IFS;
1697 data = &txq->data[txq->cur];
1698 desc = &txq->desc[txq->cur];
1700 error = bus_dmamap_load_mbuf(txq->data_dmat, data->map, m0,
1701 rt2661_dma_map_mbuf, &map, 0);
1702 if (error != 0 && error != EFBIG) {
1703 device_printf(sc->sc_dev, "could not map mbuf (error %d)\n",
1709 mnew = m_defrag(m0, MB_DONTWAIT);
1711 device_printf(sc->sc_dev,
1712 "could not defragment mbuf\n");
1718 error = bus_dmamap_load_mbuf(txq->data_dmat, data->map, m0,
1719 rt2661_dma_map_mbuf, &map, 0);
1721 device_printf(sc->sc_dev,
1722 "could not map mbuf (error %d)\n", error);
1727 /* packet header have moved, reset our local pointer */
1728 wh = mtod(m0, struct ieee80211_frame *);
1731 if (sc->sc_drvbpf != NULL) {
1732 struct rt2661_tx_radiotap_header *tap = &sc->sc_txtap;
1735 tap->wt_rate = rate;
1736 tap->wt_chan_freq = htole16(ic->ic_curchan->ic_freq);
1737 tap->wt_chan_flags = htole16(ic->ic_curchan->ic_flags);
1739 bpf_ptap(sc->sc_drvbpf, m0, tap, sc->sc_txtap_len);
1744 rctl = kmalloc(sizeof(*rctl), M_RT2661, M_NOWAIT);
1748 /* remember link conditions for rate adaptation algorithm */
1749 if (ic->ic_fixed_rate == IEEE80211_FIXED_RATE_NONE) {
1750 rctl->id.id_len = m0->m_pkthdr.len;
1751 rctl->id.id_rateidx = ni->ni_txrate;
1752 rctl->id.id_node = ni;
1753 rctl->id.id_rssi = ni->ni_rssi;
1755 rctl->id.id_node = NULL;
1757 STAILQ_INSERT_TAIL(&sc->tx_ratectl, rctl, link);
1760 if (!noack && !IEEE80211_IS_MULTICAST(wh->i_addr1)) {
1761 flags |= RT2661_TX_NEED_ACK;
1763 dur = ieee80211_txtime(ni, RAL_ACK_SIZE, ackrate, ic->ic_flags)+
1765 *(uint16_t *)wh->i_dur = htole16(dur);
1768 rt2661_setup_tx_desc(sc, desc, flags, 0, m0->m_pkthdr.len, rate,
1769 map.segs, map.nseg, ac, rctl != NULL);
1771 bus_dmamap_sync(txq->data_dmat, data->map, BUS_DMASYNC_PREWRITE);
1772 bus_dmamap_sync(txq->desc_dmat, txq->desc_map, BUS_DMASYNC_PREWRITE);
1774 DPRINTFN(10, ("sending data frame len=%u idx=%u rate=%u\n",
1775 m0->m_pkthdr.len, txq->cur, rate));
1779 txq->cur = (txq->cur + 1) % RT2661_TX_RING_COUNT;
1780 RAL_WRITE(sc, RT2661_TX_CNTL_CSR, 1 << ac);
1783 ieee80211_free_node(ni);
1789 rt2661_start(struct ifnet *ifp)
1791 struct rt2661_softc *sc = ifp->if_softc;
1792 struct ieee80211com *ic = &sc->sc_ic;
1794 struct ether_header *eh;
1795 struct ieee80211_node *ni;
1798 /* prevent management frames from being sent if we're not ready */
1799 if (!(ifp->if_flags & IFF_RUNNING))
1803 IF_POLL(&ic->ic_mgtq, m0);
1805 if (sc->mgtq.queued >= RT2661_MGT_RING_COUNT) {
1806 ifp->if_flags |= IFF_OACTIVE;
1809 IF_DEQUEUE(&ic->ic_mgtq, m0);
1811 ni = (struct ieee80211_node *)m0->m_pkthdr.rcvif;
1812 m0->m_pkthdr.rcvif = NULL;
1814 if (ic->ic_rawbpf != NULL)
1815 bpf_mtap(ic->ic_rawbpf, m0);
1817 if (rt2661_tx_mgt(sc, m0, ni) != 0)
1821 if (ic->ic_state != IEEE80211_S_RUN)
1824 m0 = ifq_dequeue(&ifp->if_snd, NULL);
1828 if (m0->m_len < sizeof (struct ether_header) &&
1829 !(m0 = m_pullup(m0, sizeof (struct ether_header))))
1832 eh = mtod(m0, struct ether_header *);
1833 ni = ieee80211_find_txnode(ic, eh->ether_dhost);
1840 /* classify mbuf so we can find which tx ring to use */
1841 if (ieee80211_classify(ic, m0, ni) != 0) {
1843 ieee80211_free_node(ni);
1848 /* no QoS encapsulation for EAPOL frames */
1849 ac = (eh->ether_type != htons(ETHERTYPE_PAE)) ?
1850 M_WME_GETAC(m0) : WME_AC_BE;
1852 if (sc->txq[ac].queued >= RT2661_TX_RING_COUNT - 1) {
1853 /* there is no place left in this ring */
1854 ifp->if_flags |= IFF_OACTIVE;
1856 ieee80211_free_node(ni);
1862 m0 = ieee80211_encap(ic, m0, ni);
1864 ieee80211_free_node(ni);
1869 if (ic->ic_rawbpf != NULL)
1870 bpf_mtap(ic->ic_rawbpf, m0);
1872 if (rt2661_tx_data(sc, m0, ni, ac) != 0) {
1873 ieee80211_free_node(ni);
1879 sc->sc_tx_timer = 5;
1885 rt2661_watchdog(struct ifnet *ifp)
1887 struct rt2661_softc *sc = ifp->if_softc;
1888 struct ieee80211com *ic = &sc->sc_ic;
1892 if (sc->sc_tx_timer > 0) {
1893 if (--sc->sc_tx_timer == 0) {
1894 device_printf(sc->sc_dev, "device timeout\n");
1902 ieee80211_watchdog(ic);
1906 * This function allows for fast channel switching in monitor mode (used by
1907 * net-mgmt/kismet). In IBSS mode, we must explicitly reset the interface to
1908 * generate a new beacon frame.
1911 rt2661_reset(struct ifnet *ifp)
1913 struct rt2661_softc *sc = ifp->if_softc;
1914 struct ieee80211com *ic = &sc->sc_ic;
1916 if (ic->ic_opmode != IEEE80211_M_MONITOR)
1919 rt2661_set_chan(sc, ic->ic_curchan);
1925 rt2661_ioctl(struct ifnet *ifp, u_long cmd, caddr_t data, struct ucred *cr)
1927 struct rt2661_softc *sc = ifp->if_softc;
1928 struct ieee80211com *ic = &sc->sc_ic;
1933 if (ifp->if_flags & IFF_UP) {
1934 if (ifp->if_flags & IFF_RUNNING)
1935 rt2661_update_promisc(sc);
1939 if (ifp->if_flags & IFF_RUNNING)
1945 error = ieee80211_ioctl(ic, cmd, data, cr);
1948 if (error == ENETRESET) {
1949 if ((ifp->if_flags & (IFF_UP | IFF_RUNNING)) ==
1950 (IFF_UP | IFF_RUNNING) &&
1951 (ic->ic_roaming != IEEE80211_ROAMING_MANUAL))
1959 rt2661_bbp_write(struct rt2661_softc *sc, uint8_t reg, uint8_t val)
1964 for (ntries = 0; ntries < 100; ntries++) {
1965 if (!(RAL_READ(sc, RT2661_PHY_CSR3) & RT2661_BBP_BUSY))
1969 if (ntries == 100) {
1970 device_printf(sc->sc_dev, "could not write to BBP\n");
1974 tmp = RT2661_BBP_BUSY | (reg & 0x7f) << 8 | val;
1975 RAL_WRITE(sc, RT2661_PHY_CSR3, tmp);
1977 DPRINTFN(15, ("BBP R%u <- 0x%02x\n", reg, val));
1981 rt2661_bbp_read(struct rt2661_softc *sc, uint8_t reg)
1986 for (ntries = 0; ntries < 100; ntries++) {
1987 if (!(RAL_READ(sc, RT2661_PHY_CSR3) & RT2661_BBP_BUSY))
1991 if (ntries == 100) {
1992 device_printf(sc->sc_dev, "could not read from BBP\n");
1996 val = RT2661_BBP_BUSY | RT2661_BBP_READ | reg << 8;
1997 RAL_WRITE(sc, RT2661_PHY_CSR3, val);
1999 for (ntries = 0; ntries < 100; ntries++) {
2000 val = RAL_READ(sc, RT2661_PHY_CSR3);
2001 if (!(val & RT2661_BBP_BUSY))
2006 device_printf(sc->sc_dev, "could not read from BBP\n");
2011 rt2661_rf_write(struct rt2661_softc *sc, uint8_t reg, uint32_t val)
2016 for (ntries = 0; ntries < 100; ntries++) {
2017 if (!(RAL_READ(sc, RT2661_PHY_CSR4) & RT2661_RF_BUSY))
2021 if (ntries == 100) {
2022 device_printf(sc->sc_dev, "could not write to RF\n");
2026 tmp = RT2661_RF_BUSY | RT2661_RF_21BIT | (val & 0x1fffff) << 2 |
2028 RAL_WRITE(sc, RT2661_PHY_CSR4, tmp);
2030 /* remember last written value in sc */
2031 sc->rf_regs[reg] = val;
2033 DPRINTFN(15, ("RF R[%u] <- 0x%05x\n", reg & 3, val & 0x1fffff));
2037 rt2661_tx_cmd(struct rt2661_softc *sc, uint8_t cmd, uint16_t arg)
2039 if (RAL_READ(sc, RT2661_H2M_MAILBOX_CSR) & RT2661_H2M_BUSY)
2040 return EIO; /* there is already a command pending */
2042 RAL_WRITE(sc, RT2661_H2M_MAILBOX_CSR,
2043 RT2661_H2M_BUSY | RT2661_TOKEN_NO_INTR << 16 | arg);
2045 RAL_WRITE(sc, RT2661_HOST_CMD_CSR, RT2661_KICK_CMD | cmd);
2051 rt2661_select_antenna(struct rt2661_softc *sc)
2053 uint8_t bbp4, bbp77;
2056 bbp4 = rt2661_bbp_read(sc, 4);
2057 bbp77 = rt2661_bbp_read(sc, 77);
2061 /* make sure Rx is disabled before switching antenna */
2062 tmp = RAL_READ(sc, RT2661_TXRX_CSR0);
2063 RAL_WRITE(sc, RT2661_TXRX_CSR0, tmp | RT2661_DISABLE_RX);
2065 rt2661_bbp_write(sc, 4, bbp4);
2066 rt2661_bbp_write(sc, 77, bbp77);
2068 /* restore Rx filter */
2069 RAL_WRITE(sc, RT2661_TXRX_CSR0, tmp);
2073 * Enable multi-rate retries for frames sent at OFDM rates.
2074 * In 802.11b/g mode, allow fallback to CCK rates.
2077 rt2661_enable_mrr(struct rt2661_softc *sc)
2079 struct ieee80211com *ic = &sc->sc_ic;
2082 tmp = RAL_READ(sc, RT2661_TXRX_CSR4);
2084 tmp &= ~RT2661_MRR_CCK_FALLBACK;
2085 if (!IEEE80211_IS_CHAN_5GHZ(ic->ic_bss->ni_chan))
2086 tmp |= RT2661_MRR_CCK_FALLBACK;
2087 tmp |= RT2661_MRR_ENABLED;
2089 RAL_WRITE(sc, RT2661_TXRX_CSR4, tmp);
2093 rt2661_set_txpreamble(struct rt2661_softc *sc)
2097 tmp = RAL_READ(sc, RT2661_TXRX_CSR4);
2099 tmp &= ~RT2661_SHORT_PREAMBLE;
2100 if (sc->sc_ic.ic_flags & IEEE80211_F_SHPREAMBLE)
2101 tmp |= RT2661_SHORT_PREAMBLE;
2103 RAL_WRITE(sc, RT2661_TXRX_CSR4, tmp);
2107 rt2661_set_basicrates(struct rt2661_softc *sc,
2108 const struct ieee80211_rateset *rs)
2110 #define RV(r) ((r) & IEEE80211_RATE_VAL)
2115 for (i = 0; i < rs->rs_nrates; i++) {
2116 rate = rs->rs_rates[i];
2118 if (!(rate & IEEE80211_RATE_BASIC))
2122 * Find h/w rate index. We know it exists because the rate
2123 * set has already been negotiated.
2125 for (j = 0; rt2661_rateset_11g.rs_rates[j] != RV(rate); j++);
2130 RAL_WRITE(sc, RT2661_TXRX_CSR5, mask);
2132 DPRINTF(("Setting basic rate mask to 0x%x\n", mask));
2137 * Reprogram MAC/BBP to switch to a new band. Values taken from the reference
2141 rt2661_select_band(struct rt2661_softc *sc, struct ieee80211_channel *c)
2143 uint8_t bbp17, bbp35, bbp96, bbp97, bbp98, bbp104;
2146 /* update all BBP registers that depend on the band */
2147 bbp17 = 0x20; bbp96 = 0x48; bbp104 = 0x2c;
2148 bbp35 = 0x50; bbp97 = 0x48; bbp98 = 0x48;
2149 if (IEEE80211_IS_CHAN_5GHZ(c)) {
2150 bbp17 += 0x08; bbp96 += 0x10; bbp104 += 0x0c;
2151 bbp35 += 0x10; bbp97 += 0x10; bbp98 += 0x10;
2153 if ((IEEE80211_IS_CHAN_2GHZ(c) && sc->ext_2ghz_lna) ||
2154 (IEEE80211_IS_CHAN_5GHZ(c) && sc->ext_5ghz_lna)) {
2155 bbp17 += 0x10; bbp96 += 0x10; bbp104 += 0x10;
2158 rt2661_bbp_write(sc, 17, bbp17);
2159 rt2661_bbp_write(sc, 96, bbp96);
2160 rt2661_bbp_write(sc, 104, bbp104);
2162 if ((IEEE80211_IS_CHAN_2GHZ(c) && sc->ext_2ghz_lna) ||
2163 (IEEE80211_IS_CHAN_5GHZ(c) && sc->ext_5ghz_lna)) {
2164 rt2661_bbp_write(sc, 75, 0x80);
2165 rt2661_bbp_write(sc, 86, 0x80);
2166 rt2661_bbp_write(sc, 88, 0x80);
2169 rt2661_bbp_write(sc, 35, bbp35);
2170 rt2661_bbp_write(sc, 97, bbp97);
2171 rt2661_bbp_write(sc, 98, bbp98);
2173 tmp = RAL_READ(sc, RT2661_PHY_CSR0);
2174 tmp &= ~(RT2661_PA_PE_2GHZ | RT2661_PA_PE_5GHZ);
2175 if (IEEE80211_IS_CHAN_2GHZ(c))
2176 tmp |= RT2661_PA_PE_2GHZ;
2178 tmp |= RT2661_PA_PE_5GHZ;
2179 RAL_WRITE(sc, RT2661_PHY_CSR0, tmp);
2183 rt2661_set_chan(struct rt2661_softc *sc, struct ieee80211_channel *c)
2185 struct ieee80211com *ic = &sc->sc_ic;
2186 const struct rfprog *rfprog;
2187 uint8_t bbp3, bbp94 = RT2661_BBPR94_DEFAULT;
2191 chan = ieee80211_chan2ieee(ic, c);
2192 if (chan == 0 || chan == IEEE80211_CHAN_ANY)
2195 /* select the appropriate RF settings based on what EEPROM says */
2196 rfprog = (sc->rfprog == 0) ? rt2661_rf5225_1 : rt2661_rf5225_2;
2198 /* find the settings for this channel (we know it exists) */
2199 for (i = 0; rfprog[i].chan != chan; i++);
2201 power = sc->txpow[i];
2205 } else if (power > 31) {
2206 bbp94 += power - 31;
2211 * If we are switching from the 2GHz band to the 5GHz band or
2212 * vice-versa, BBP registers need to be reprogrammed.
2214 if (c->ic_flags != sc->sc_curchan->ic_flags) {
2215 rt2661_select_band(sc, c);
2216 rt2661_select_antenna(sc);
2220 rt2661_rf_write(sc, RAL_RF1, rfprog[i].r1);
2221 rt2661_rf_write(sc, RAL_RF2, rfprog[i].r2);
2222 rt2661_rf_write(sc, RAL_RF3, rfprog[i].r3 | power << 7);
2223 rt2661_rf_write(sc, RAL_RF4, rfprog[i].r4 | sc->rffreq << 10);
2227 rt2661_rf_write(sc, RAL_RF1, rfprog[i].r1);
2228 rt2661_rf_write(sc, RAL_RF2, rfprog[i].r2);
2229 rt2661_rf_write(sc, RAL_RF3, rfprog[i].r3 | power << 7 | 1);
2230 rt2661_rf_write(sc, RAL_RF4, rfprog[i].r4 | sc->rffreq << 10);
2234 rt2661_rf_write(sc, RAL_RF1, rfprog[i].r1);
2235 rt2661_rf_write(sc, RAL_RF2, rfprog[i].r2);
2236 rt2661_rf_write(sc, RAL_RF3, rfprog[i].r3 | power << 7);
2237 rt2661_rf_write(sc, RAL_RF4, rfprog[i].r4 | sc->rffreq << 10);
2239 /* enable smart mode for MIMO-capable RFs */
2240 bbp3 = rt2661_bbp_read(sc, 3);
2242 bbp3 &= ~RT2661_SMART_MODE;
2243 if (sc->rf_rev == RT2661_RF_5325 || sc->rf_rev == RT2661_RF_2529)
2244 bbp3 |= RT2661_SMART_MODE;
2246 rt2661_bbp_write(sc, 3, bbp3);
2248 if (bbp94 != RT2661_BBPR94_DEFAULT)
2249 rt2661_bbp_write(sc, 94, bbp94);
2251 /* 5GHz radio needs a 1ms delay here */
2252 if (IEEE80211_IS_CHAN_5GHZ(c))
2255 sc->sc_sifs = IEEE80211_IS_CHAN_5GHZ(c) ? IEEE80211_DUR_OFDM_SIFS
2256 : IEEE80211_DUR_SIFS;
2260 rt2661_set_bssid(struct rt2661_softc *sc, const uint8_t *bssid)
2264 tmp = bssid[0] | bssid[1] << 8 | bssid[2] << 16 | bssid[3] << 24;
2265 RAL_WRITE(sc, RT2661_MAC_CSR4, tmp);
2267 tmp = bssid[4] | bssid[5] << 8 | RT2661_ONE_BSSID << 16;
2268 RAL_WRITE(sc, RT2661_MAC_CSR5, tmp);
2272 rt2661_set_macaddr(struct rt2661_softc *sc, const uint8_t *addr)
2276 tmp = addr[0] | addr[1] << 8 | addr[2] << 16 | addr[3] << 24;
2277 RAL_WRITE(sc, RT2661_MAC_CSR2, tmp);
2279 tmp = addr[4] | addr[5] << 8;
2280 RAL_WRITE(sc, RT2661_MAC_CSR3, tmp);
2284 rt2661_update_promisc(struct rt2661_softc *sc)
2286 struct ifnet *ifp = sc->sc_ic.ic_ifp;
2289 tmp = RAL_READ(sc, RT2661_TXRX_CSR0);
2291 tmp &= ~RT2661_DROP_NOT_TO_ME;
2292 if (!(ifp->if_flags & IFF_PROMISC))
2293 tmp |= RT2661_DROP_NOT_TO_ME;
2295 RAL_WRITE(sc, RT2661_TXRX_CSR0, tmp);
2297 DPRINTF(("%s promiscuous mode\n", (ifp->if_flags & IFF_PROMISC) ?
2298 "entering" : "leaving"));
2302 * Update QoS (802.11e) settings for each h/w Tx ring.
2305 rt2661_wme_update(struct ieee80211com *ic)
2307 struct rt2661_softc *sc = ic->ic_ifp->if_softc;
2308 const struct wmeParams *wmep;
2310 wmep = ic->ic_wme.wme_chanParams.cap_wmeParams;
2312 /* XXX: not sure about shifts. */
2313 /* XXX: the reference driver plays with AC_VI settings too. */
2316 RAL_WRITE(sc, RT2661_AC_TXOP_CSR0,
2317 wmep[WME_AC_BE].wmep_txopLimit << 16 |
2318 wmep[WME_AC_BK].wmep_txopLimit);
2319 RAL_WRITE(sc, RT2661_AC_TXOP_CSR1,
2320 wmep[WME_AC_VI].wmep_txopLimit << 16 |
2321 wmep[WME_AC_VO].wmep_txopLimit);
2324 RAL_WRITE(sc, RT2661_CWMIN_CSR,
2325 wmep[WME_AC_BE].wmep_logcwmin << 12 |
2326 wmep[WME_AC_BK].wmep_logcwmin << 8 |
2327 wmep[WME_AC_VI].wmep_logcwmin << 4 |
2328 wmep[WME_AC_VO].wmep_logcwmin);
2331 RAL_WRITE(sc, RT2661_CWMAX_CSR,
2332 wmep[WME_AC_BE].wmep_logcwmax << 12 |
2333 wmep[WME_AC_BK].wmep_logcwmax << 8 |
2334 wmep[WME_AC_VI].wmep_logcwmax << 4 |
2335 wmep[WME_AC_VO].wmep_logcwmax);
2338 RAL_WRITE(sc, RT2661_AIFSN_CSR,
2339 wmep[WME_AC_BE].wmep_aifsn << 12 |
2340 wmep[WME_AC_BK].wmep_aifsn << 8 |
2341 wmep[WME_AC_VI].wmep_aifsn << 4 |
2342 wmep[WME_AC_VO].wmep_aifsn);
2348 rt2661_update_slot(struct ifnet *ifp)
2350 struct rt2661_softc *sc = ifp->if_softc;
2351 struct ieee80211com *ic = &sc->sc_ic;
2355 slottime = (ic->ic_flags & IEEE80211_F_SHSLOT) ? 9 : 20;
2357 tmp = RAL_READ(sc, RT2661_MAC_CSR9);
2358 tmp = (tmp & ~0xff) | slottime;
2359 RAL_WRITE(sc, RT2661_MAC_CSR9, tmp);
2363 rt2661_get_rf(int rev)
2366 case RT2661_RF_5225: return "RT5225";
2367 case RT2661_RF_5325: return "RT5325 (MIMO XR)";
2368 case RT2661_RF_2527: return "RT2527";
2369 case RT2661_RF_2529: return "RT2529 (MIMO XR)";
2370 default: return "unknown";
2375 rt2661_read_eeprom(struct rt2661_softc *sc)
2377 struct ieee80211com *ic = &sc->sc_ic;
2381 /* read MAC address */
2382 val = rt2661_eeprom_read(sc, RT2661_EEPROM_MAC01);
2383 ic->ic_myaddr[0] = val & 0xff;
2384 ic->ic_myaddr[1] = val >> 8;
2386 val = rt2661_eeprom_read(sc, RT2661_EEPROM_MAC23);
2387 ic->ic_myaddr[2] = val & 0xff;
2388 ic->ic_myaddr[3] = val >> 8;
2390 val = rt2661_eeprom_read(sc, RT2661_EEPROM_MAC45);
2391 ic->ic_myaddr[4] = val & 0xff;
2392 ic->ic_myaddr[5] = val >> 8;
2394 val = rt2661_eeprom_read(sc, RT2661_EEPROM_ANTENNA);
2395 /* XXX: test if different from 0xffff? */
2396 sc->rf_rev = (val >> 11) & 0x1f;
2397 sc->hw_radio = (val >> 10) & 0x1;
2398 sc->rx_ant = (val >> 4) & 0x3;
2399 sc->tx_ant = (val >> 2) & 0x3;
2400 sc->nb_ant = val & 0x3;
2402 DPRINTF(("RF revision=%d\n", sc->rf_rev));
2404 val = rt2661_eeprom_read(sc, RT2661_EEPROM_CONFIG2);
2405 sc->ext_5ghz_lna = (val >> 6) & 0x1;
2406 sc->ext_2ghz_lna = (val >> 4) & 0x1;
2408 DPRINTF(("External 2GHz LNA=%d\nExternal 5GHz LNA=%d\n",
2409 sc->ext_2ghz_lna, sc->ext_5ghz_lna));
2411 val = rt2661_eeprom_read(sc, RT2661_EEPROM_RSSI_2GHZ_OFFSET);
2412 if ((val & 0xff) != 0xff)
2413 sc->rssi_2ghz_corr = (int8_t)(val & 0xff); /* signed */
2415 /* Only [-10, 10] is valid */
2416 if (sc->rssi_2ghz_corr < -10 || sc->rssi_2ghz_corr > 10)
2417 sc->rssi_2ghz_corr = 0;
2419 val = rt2661_eeprom_read(sc, RT2661_EEPROM_RSSI_5GHZ_OFFSET);
2420 if ((val & 0xff) != 0xff)
2421 sc->rssi_5ghz_corr = (int8_t)(val & 0xff); /* signed */
2423 /* Only [-10, 10] is valid */
2424 if (sc->rssi_5ghz_corr < -10 || sc->rssi_5ghz_corr > 10)
2425 sc->rssi_5ghz_corr = 0;
2427 /* adjust RSSI correction for external low-noise amplifier */
2428 if (sc->ext_2ghz_lna)
2429 sc->rssi_2ghz_corr -= 14;
2430 if (sc->ext_5ghz_lna)
2431 sc->rssi_5ghz_corr -= 14;
2433 DPRINTF(("RSSI 2GHz corr=%d\nRSSI 5GHz corr=%d\n",
2434 sc->rssi_2ghz_corr, sc->rssi_5ghz_corr));
2436 val = rt2661_eeprom_read(sc, RT2661_EEPROM_FREQ_OFFSET);
2437 if ((val >> 8) != 0xff)
2438 sc->rfprog = (val >> 8) & 0x3;
2439 if ((val & 0xff) != 0xff)
2440 sc->rffreq = val & 0xff;
2442 DPRINTF(("RF prog=%d\nRF freq=%d\n", sc->rfprog, sc->rffreq));
2444 /* read Tx power for all a/b/g channels */
2445 for (i = 0; i < 19; i++) {
2446 val = rt2661_eeprom_read(sc, RT2661_EEPROM_TXPOWER + i);
2447 sc->txpow[i * 2] = (int8_t)(val >> 8); /* signed */
2448 DPRINTF(("Channel=%d Tx power=%d\n",
2449 rt2661_rf5225_1[i * 2].chan, sc->txpow[i * 2]));
2450 sc->txpow[i * 2 + 1] = (int8_t)(val & 0xff); /* signed */
2451 DPRINTF(("Channel=%d Tx power=%d\n",
2452 rt2661_rf5225_1[i * 2 + 1].chan, sc->txpow[i * 2 + 1]));
2455 /* read vendor-specific BBP values */
2456 for (i = 0; i < 16; i++) {
2457 val = rt2661_eeprom_read(sc, RT2661_EEPROM_BBP_BASE + i);
2458 if (val == 0 || val == 0xffff)
2459 continue; /* skip invalid entries */
2460 sc->bbp_prom[i].reg = val >> 8;
2461 sc->bbp_prom[i].val = val & 0xff;
2462 DPRINTF(("BBP R%d=%02x\n", sc->bbp_prom[i].reg,
2463 sc->bbp_prom[i].val));
2466 val = rt2661_eeprom_read(sc, RT2661_EEPROM_LED_OFFSET);
2467 DPRINTF(("LED %02x\n", val));
2468 if (val == 0xffff) {
2469 sc->mcu_led = RT2661_MCU_LED_DEFAULT;
2471 #define N(arr) (int)(sizeof(arr) / sizeof(arr[0]))
2473 for (i = 0; i < N(led_ee2mcu); ++i) {
2474 if (val & led_ee2mcu[i].ee_bit)
2475 sc->mcu_led |= led_ee2mcu[i].mcu_bit;
2480 sc->mcu_led |= ((val >> RT2661_EE_LED_MODE_SHIFT) &
2481 RT2661_EE_LED_MODE_MASK);
2486 rt2661_bbp_init(struct rt2661_softc *sc)
2488 #define N(a) (sizeof (a) / sizeof ((a)[0]))
2492 /* wait for BBP to be ready */
2493 for (ntries = 0; ntries < 100; ntries++) {
2494 val = rt2661_bbp_read(sc, 0);
2495 if (val != 0 && val != 0xff)
2499 if (ntries == 100) {
2500 device_printf(sc->sc_dev, "timeout waiting for BBP\n");
2504 /* initialize BBP registers to default values */
2505 for (i = 0; i < N(rt2661_def_bbp); i++) {
2506 rt2661_bbp_write(sc, rt2661_def_bbp[i].reg,
2507 rt2661_def_bbp[i].val);
2510 /* write vendor-specific BBP values (from EEPROM) */
2511 for (i = 0; i < 16; i++) {
2512 if (sc->bbp_prom[i].reg == 0)
2514 rt2661_bbp_write(sc, sc->bbp_prom[i].reg, sc->bbp_prom[i].val);
2522 rt2661_init(void *priv)
2524 #define N(a) (sizeof (a) / sizeof ((a)[0]))
2525 struct rt2661_softc *sc = priv;
2526 struct ieee80211com *ic = &sc->sc_ic;
2527 struct ifnet *ifp = ic->ic_ifp;
2528 uint32_t tmp, sta[3];
2533 /* initialize Tx rings */
2534 RAL_WRITE(sc, RT2661_AC1_BASE_CSR, sc->txq[1].physaddr);
2535 RAL_WRITE(sc, RT2661_AC0_BASE_CSR, sc->txq[0].physaddr);
2536 RAL_WRITE(sc, RT2661_AC2_BASE_CSR, sc->txq[2].physaddr);
2537 RAL_WRITE(sc, RT2661_AC3_BASE_CSR, sc->txq[3].physaddr);
2539 /* initialize Mgt ring */
2540 RAL_WRITE(sc, RT2661_MGT_BASE_CSR, sc->mgtq.physaddr);
2542 /* initialize Rx ring */
2543 RAL_WRITE(sc, RT2661_RX_BASE_CSR, sc->rxq.physaddr);
2545 /* initialize Tx rings sizes */
2546 RAL_WRITE(sc, RT2661_TX_RING_CSR0,
2547 RT2661_TX_RING_COUNT << 24 |
2548 RT2661_TX_RING_COUNT << 16 |
2549 RT2661_TX_RING_COUNT << 8 |
2550 RT2661_TX_RING_COUNT);
2552 RAL_WRITE(sc, RT2661_TX_RING_CSR1,
2553 RT2661_TX_DESC_WSIZE << 16 |
2554 RT2661_TX_RING_COUNT << 8 | /* XXX: HCCA ring unused */
2555 RT2661_MGT_RING_COUNT);
2557 /* initialize Rx rings */
2558 RAL_WRITE(sc, RT2661_RX_RING_CSR,
2559 RT2661_RX_DESC_BACK << 16 |
2560 RT2661_RX_DESC_WSIZE << 8 |
2561 RT2661_RX_RING_COUNT);
2563 /* XXX: some magic here */
2564 RAL_WRITE(sc, RT2661_TX_DMA_DST_CSR, 0xaa);
2566 /* load base addresses of all 5 Tx rings (4 data + 1 mgt) */
2567 RAL_WRITE(sc, RT2661_LOAD_TX_RING_CSR, 0x1f);
2569 /* load base address of Rx ring */
2570 RAL_WRITE(sc, RT2661_RX_CNTL_CSR, 2);
2572 /* initialize MAC registers to default values */
2573 for (i = 0; i < N(rt2661_def_mac); i++)
2574 RAL_WRITE(sc, rt2661_def_mac[i].reg, rt2661_def_mac[i].val);
2576 IEEE80211_ADDR_COPY(ic->ic_myaddr, IF_LLADDR(ifp));
2577 rt2661_set_macaddr(sc, ic->ic_myaddr);
2579 /* set host ready */
2580 RAL_WRITE(sc, RT2661_MAC_CSR1, 3);
2581 RAL_WRITE(sc, RT2661_MAC_CSR1, 0);
2583 /* wait for BBP/RF to wakeup */
2584 for (ntries = 0; ntries < 1000; ntries++) {
2585 if (RAL_READ(sc, RT2661_MAC_CSR12) & 8)
2589 if (ntries == 1000) {
2590 kprintf("timeout waiting for BBP/RF to wakeup\n");
2595 if (rt2661_bbp_init(sc) != 0) {
2600 /* select default channel */
2601 sc->sc_curchan = ic->ic_curchan;
2602 rt2661_select_band(sc, sc->sc_curchan);
2603 rt2661_select_antenna(sc);
2604 rt2661_set_chan(sc, sc->sc_curchan);
2606 /* update Rx filter */
2607 tmp = RAL_READ(sc, RT2661_TXRX_CSR0) & 0xffff;
2609 tmp |= RT2661_DROP_PHY_ERROR | RT2661_DROP_CRC_ERROR;
2610 if (ic->ic_opmode != IEEE80211_M_MONITOR) {
2611 tmp |= RT2661_DROP_CTL | RT2661_DROP_VER_ERROR |
2613 if (ic->ic_opmode != IEEE80211_M_HOSTAP)
2614 tmp |= RT2661_DROP_TODS;
2615 if (!(ifp->if_flags & IFF_PROMISC))
2616 tmp |= RT2661_DROP_NOT_TO_ME;
2619 RAL_WRITE(sc, RT2661_TXRX_CSR0, tmp);
2621 /* clear STA registers */
2622 RAL_READ_REGION_4(sc, RT2661_STA_CSR0, sta, N(sta));
2624 /* initialize ASIC */
2625 RAL_WRITE(sc, RT2661_MAC_CSR1, 4);
2627 /* clear any pending interrupt */
2628 RAL_WRITE(sc, RT2661_INT_SOURCE_CSR, 0xffffffff);
2630 /* enable interrupts */
2631 RAL_WRITE(sc, RT2661_INT_MASK_CSR, 0x0000ff10);
2632 RAL_WRITE(sc, RT2661_MCU_INT_MASK_CSR, 0);
2635 RAL_WRITE(sc, RT2661_RX_CNTL_CSR, 1);
2637 ifp->if_flags &= ~IFF_OACTIVE;
2638 ifp->if_flags |= IFF_RUNNING;
2640 if (ic->ic_opmode != IEEE80211_M_MONITOR) {
2641 if (ic->ic_roaming != IEEE80211_ROAMING_MANUAL)
2642 ieee80211_new_state(ic, IEEE80211_S_SCAN, -1);
2644 ieee80211_new_state(ic, IEEE80211_S_RUN, -1);
2649 rt2661_stop(void *priv)
2651 struct rt2661_softc *sc = priv;
2652 struct ieee80211com *ic = &sc->sc_ic;
2653 struct ifnet *ifp = ic->ic_ifp;
2654 struct rt2661_tx_ratectl *rctl;
2657 ieee80211_new_state(ic, IEEE80211_S_INIT, -1);
2659 sc->sc_tx_timer = 0;
2661 ifp->if_flags &= ~(IFF_RUNNING | IFF_OACTIVE);
2663 /* abort Tx (for all 5 Tx rings) */
2664 RAL_WRITE(sc, RT2661_TX_CNTL_CSR, 0x1f << 16);
2666 /* disable Rx (value remains after reset!) */
2667 tmp = RAL_READ(sc, RT2661_TXRX_CSR0);
2668 RAL_WRITE(sc, RT2661_TXRX_CSR0, tmp | RT2661_DISABLE_RX);
2671 RAL_WRITE(sc, RT2661_MAC_CSR1, 3);
2672 RAL_WRITE(sc, RT2661_MAC_CSR1, 0);
2674 /* disable interrupts */
2675 RAL_WRITE(sc, RT2661_INT_MASK_CSR, 0xffffffff);
2676 RAL_WRITE(sc, RT2661_MCU_INT_MASK_CSR, 0xffffffff);
2678 /* clear any pending interrupt */
2679 RAL_WRITE(sc, RT2661_INT_SOURCE_CSR, 0xffffffff);
2680 RAL_WRITE(sc, RT2661_MCU_INT_SOURCE_CSR, 0xffffffff);
2682 while ((rctl = STAILQ_FIRST(&sc->tx_ratectl)) != NULL) {
2683 STAILQ_REMOVE_HEAD(&sc->tx_ratectl, link);
2684 ieee80211_free_node(rctl->ni);
2686 kfree(rctl, M_RT2661);
2689 /* reset Tx and Rx rings */
2690 rt2661_reset_tx_ring(sc, &sc->txq[0]);
2691 rt2661_reset_tx_ring(sc, &sc->txq[1]);
2692 rt2661_reset_tx_ring(sc, &sc->txq[2]);
2693 rt2661_reset_tx_ring(sc, &sc->txq[3]);
2694 rt2661_reset_tx_ring(sc, &sc->mgtq);
2695 rt2661_reset_rx_ring(sc, &sc->rxq);
2699 rt2661_load_microcode(struct rt2661_softc *sc, const uint8_t *ucode, int size)
2704 RAL_WRITE(sc, RT2661_MCU_CNTL_CSR, RT2661_MCU_RESET);
2706 /* cancel any pending Host to MCU command */
2707 RAL_WRITE(sc, RT2661_H2M_MAILBOX_CSR, 0);
2708 RAL_WRITE(sc, RT2661_M2H_CMD_DONE_CSR, 0xffffffff);
2709 RAL_WRITE(sc, RT2661_HOST_CMD_CSR, 0);
2711 /* write 8051's microcode */
2712 RAL_WRITE(sc, RT2661_MCU_CNTL_CSR, RT2661_MCU_RESET | RT2661_MCU_SEL);
2713 RAL_WRITE_REGION_1(sc, RT2661_MCU_CODE_BASE, ucode, size);
2714 RAL_WRITE(sc, RT2661_MCU_CNTL_CSR, RT2661_MCU_RESET);
2716 /* kick 8051's ass */
2717 RAL_WRITE(sc, RT2661_MCU_CNTL_CSR, 0);
2719 /* wait for 8051 to initialize */
2720 for (ntries = 0; ntries < 500; ntries++) {
2721 if (RAL_READ(sc, RT2661_MCU_CNTL_CSR) & RT2661_MCU_READY)
2725 if (ntries == 500) {
2726 kprintf("timeout waiting for MCU to initialize\n");
2734 * Dynamically tune Rx sensitivity (BBP register 17) based on average RSSI and
2735 * false CCA count. This function is called periodically (every seconds) when
2736 * in the RUN state. Values taken from the reference driver.
2739 rt2661_rx_tune(struct rt2661_softc *sc)
2746 * Tuning range depends on operating band and on the presence of an
2747 * external low-noise amplifier.
2750 if (IEEE80211_IS_CHAN_5GHZ(sc->sc_curchan))
2752 if ((IEEE80211_IS_CHAN_2GHZ(sc->sc_curchan) && sc->ext_2ghz_lna) ||
2753 (IEEE80211_IS_CHAN_5GHZ(sc->sc_curchan) && sc->ext_5ghz_lna))
2757 /* retrieve false CCA count since last call (clear on read) */
2758 cca = RAL_READ(sc, RT2661_STA_CSR1) & 0xffff;
2762 } else if (dbm >= -58) {
2764 } else if (dbm >= -66) {
2766 } else if (dbm >= -74) {
2769 /* RSSI < -74dBm, tune using false CCA count */
2771 bbp17 = sc->bbp17; /* current value */
2773 hi -= 2 * (-74 - dbm);
2780 } else if (cca > 512) {
2783 } else if (cca < 100) {
2789 if (bbp17 != sc->bbp17) {
2790 rt2661_bbp_write(sc, 17, bbp17);
2796 * Enter/Leave radar detection mode.
2797 * This is for 802.11h additional regulatory domains.
2800 rt2661_radar_start(struct rt2661_softc *sc)
2805 tmp = RAL_READ(sc, RT2661_TXRX_CSR0);
2806 RAL_WRITE(sc, RT2661_TXRX_CSR0, tmp | RT2661_DISABLE_RX);
2808 rt2661_bbp_write(sc, 82, 0x20);
2809 rt2661_bbp_write(sc, 83, 0x00);
2810 rt2661_bbp_write(sc, 84, 0x40);
2812 /* save current BBP registers values */
2813 sc->bbp18 = rt2661_bbp_read(sc, 18);
2814 sc->bbp21 = rt2661_bbp_read(sc, 21);
2815 sc->bbp22 = rt2661_bbp_read(sc, 22);
2816 sc->bbp16 = rt2661_bbp_read(sc, 16);
2817 sc->bbp17 = rt2661_bbp_read(sc, 17);
2818 sc->bbp64 = rt2661_bbp_read(sc, 64);
2820 rt2661_bbp_write(sc, 18, 0xff);
2821 rt2661_bbp_write(sc, 21, 0x3f);
2822 rt2661_bbp_write(sc, 22, 0x3f);
2823 rt2661_bbp_write(sc, 16, 0xbd);
2824 rt2661_bbp_write(sc, 17, sc->ext_5ghz_lna ? 0x44 : 0x34);
2825 rt2661_bbp_write(sc, 64, 0x21);
2827 /* restore Rx filter */
2828 RAL_WRITE(sc, RT2661_TXRX_CSR0, tmp);
2832 rt2661_radar_stop(struct rt2661_softc *sc)
2836 /* read radar detection result */
2837 bbp66 = rt2661_bbp_read(sc, 66);
2839 /* restore BBP registers values */
2840 rt2661_bbp_write(sc, 16, sc->bbp16);
2841 rt2661_bbp_write(sc, 17, sc->bbp17);
2842 rt2661_bbp_write(sc, 18, sc->bbp18);
2843 rt2661_bbp_write(sc, 21, sc->bbp21);
2844 rt2661_bbp_write(sc, 22, sc->bbp22);
2845 rt2661_bbp_write(sc, 64, sc->bbp64);
2852 rt2661_prepare_beacon(struct rt2661_softc *sc)
2854 struct ieee80211com *ic = &sc->sc_ic;
2855 struct ieee80211_beacon_offsets bo;
2856 struct rt2661_tx_desc desc;
2860 m0 = ieee80211_beacon_alloc(ic, ic->ic_bss, &bo);
2862 device_printf(sc->sc_dev, "could not allocate beacon frame\n");
2866 /* send beacons at the lowest available rate */
2867 rate = IEEE80211_IS_CHAN_5GHZ(ic->ic_bss->ni_chan) ? 12 : 2;
2869 rt2661_setup_tx_desc(sc, &desc, RT2661_TX_TIMESTAMP, RT2661_TX_HWSEQ,
2870 m0->m_pkthdr.len, rate, NULL, 0, RT2661_QID_MGT, 0);
2872 /* copy the first 24 bytes of Tx descriptor into NIC memory */
2873 RAL_WRITE_REGION_1(sc, RT2661_HW_BEACON_BASE0, (uint8_t *)&desc, 24);
2875 /* copy beacon header and payload into NIC memory */
2876 RAL_WRITE_REGION_1(sc, RT2661_HW_BEACON_BASE0 + 24,
2877 mtod(m0, uint8_t *), m0->m_pkthdr.len);
2884 * Enable TSF synchronization and tell h/w to start sending beacons for IBSS
2885 * and HostAP operating modes.
2888 rt2661_enable_tsf_sync(struct rt2661_softc *sc)
2890 struct ieee80211com *ic = &sc->sc_ic;
2893 if (ic->ic_opmode != IEEE80211_M_STA) {
2895 * Change default 16ms TBTT adjustment to 8ms.
2896 * Must be done before enabling beacon generation.
2898 RAL_WRITE(sc, RT2661_TXRX_CSR10, 1 << 12 | 8);
2901 tmp = RAL_READ(sc, RT2661_TXRX_CSR9) & 0xff000000;
2903 /* set beacon interval (in 1/16ms unit) */
2904 tmp |= ic->ic_bss->ni_intval * 16;
2906 tmp |= RT2661_TSF_TICKING | RT2661_ENABLE_TBTT;
2907 if (ic->ic_opmode == IEEE80211_M_STA)
2908 tmp |= RT2661_TSF_MODE(1);
2910 tmp |= RT2661_TSF_MODE(2) | RT2661_GENERATE_BEACON;
2912 RAL_WRITE(sc, RT2661_TXRX_CSR9, tmp);
2916 * Retrieve the "Received Signal Strength Indicator" from the raw values
2917 * contained in Rx descriptors. The computation depends on which band the
2918 * frame was received. Correction values taken from the reference driver.
2921 rt2661_get_rssi(struct rt2661_softc *sc, uint8_t raw)
2925 lna = (raw >> 5) & 0x3;
2932 * NB: Since RSSI is relative to noise floor, -1 is
2933 * adequate for caller to know error happened.
2938 rssi = (2 * agc) - RT2661_NOISE_FLOOR;
2940 if (IEEE80211_IS_CHAN_2GHZ(sc->sc_curchan)) {
2941 rssi += sc->rssi_2ghz_corr;
2950 rssi += sc->rssi_5ghz_corr;
2963 rt2661_dma_map_mbuf(void *arg, bus_dma_segment_t *seg, int nseg,
2964 bus_size_t map_size __unused, int error)
2966 struct rt2661_dmamap *map = arg;
2971 KASSERT(nseg <= RT2661_MAX_SCATTER, ("too many DMA segments"));
2973 bcopy(seg, map->segs, nseg * sizeof(bus_dma_segment_t));
2978 rt2661_led_newstate(struct rt2661_softc *sc, enum ieee80211_state nstate)
2980 struct ieee80211com *ic = &sc->sc_ic;
2982 uint32_t mail = sc->mcu_led;
2984 if (RAL_READ(sc, RT2661_H2M_MAILBOX_CSR) & RT2661_H2M_BUSY) {
2985 DPRINTF(("%s failed\n", __func__));
2990 case IEEE80211_S_INIT:
2991 mail &= ~(RT2661_MCU_LED_LINKA | RT2661_MCU_LED_LINKG |
2995 if (ic->ic_curchan == NULL)
2998 on = RT2661_MCU_LED_LINKG;
2999 off = RT2661_MCU_LED_LINKA;
3000 if (IEEE80211_IS_CHAN_5GHZ(ic->ic_curchan)) {
3001 on = RT2661_MCU_LED_LINKA;
3002 off = RT2661_MCU_LED_LINKG;
3005 mail |= RT2661_MCU_LED_RF | on;
3010 RAL_WRITE(sc, RT2661_H2M_MAILBOX_CSR,
3011 RT2661_H2M_BUSY | RT2661_TOKEN_NO_INTR << 16 | mail);
3012 RAL_WRITE(sc, RT2661_HOST_CMD_CSR, RT2661_KICK_CMD | RT2661_MCU_SET_LED);