2 * PCI specific probe and attach routines for LSI Fusion Adapters
5 * Copyright (c) 2000, 2001 by Greg Ansley
6 * Partially derived from Matt Jacob's ISP driver.
7 * Copyright (c) 1997, 1998, 1999, 2000, 2001, 2002 by Matthew Jacob
11 * Redistribution and use in source and binary forms, with or without
12 * modification, are permitted provided that the following conditions
14 * 1. Redistributions of source code must retain the above copyright
15 * notice immediately at the beginning of the file, without modification,
16 * this list of conditions, and the following disclaimer.
17 * 2. The name of the author may not be used to endorse or promote products
18 * derived from this software without specific prior written permission.
20 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
21 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
22 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
23 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE FOR
24 * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
25 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
26 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
27 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
28 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
29 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
33 * Copyright (c) 2002, 2006 by Matthew Jacob
34 * All rights reserved.
36 * Redistribution and use in source and binary forms, with or without
37 * modification, are permitted provided that the following conditions are
39 * 1. Redistributions of source code must retain the above copyright
40 * notice, this list of conditions and the following disclaimer.
41 * 2. Redistributions in binary form must reproduce at minimum a disclaimer
42 * substantially similar to the "NO WARRANTY" disclaimer below
43 * ("Disclaimer") and any redistribution must be conditioned upon including
44 * a substantially similar Disclaimer requirement for further binary
46 * 3. Neither the names of the above listed copyright holders nor the names
47 * of any contributors may be used to endorse or promote products derived
48 * from this software without specific prior written permission.
50 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
51 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
52 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
53 * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
54 * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
55 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
56 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
57 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
58 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
59 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF THE COPYRIGHT
60 * OWNER OR CONTRIBUTOR IS ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
62 * Support from Chris Ellsworth in order to make SAS adapters work
63 * is gratefully acknowledged.
65 * Support from LSI-Logic has also gone a great deal toward making this a
66 * workable subsystem and is gratefully acknowledged.
69 * Copyright (c) 2004, Avid Technology, Inc. and its contributors.
70 * Copyright (c) 2005, WHEEL Sp. z o.o.
71 * Copyright (c) 2004, 2005 Justin T. Gibbs
72 * All rights reserved.
74 * Redistribution and use in source and binary forms, with or without
75 * modification, are permitted provided that the following conditions are
77 * 1. Redistributions of source code must retain the above copyright
78 * notice, this list of conditions and the following disclaimer.
79 * 2. Redistributions in binary form must reproduce at minimum a disclaimer
80 * substantially similar to the "NO WARRANTY" disclaimer below
81 * ("Disclaimer") and any redistribution must be conditioned upon including
82 * a substantially similar Disclaimer requirement for further binary
84 * 3. Neither the names of the above listed copyright holders nor the names
85 * of any contributors may be used to endorse or promote products derived
86 * from this software without specific prior written permission.
88 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
89 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
90 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
91 * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
92 * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
93 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
94 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
95 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
96 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
97 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF THE COPYRIGHT
98 * OWNER OR CONTRIBUTOR IS ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
100 * $FreeBSD: src/sys/dev/mpt/mpt_pci.c,v 1.61 2011/04/22 09:59:16 marius Exp $
103 #include <dev/disk/mpt/mpt.h>
104 #include <dev/disk/mpt/mpt_cam.h>
105 #include <dev/disk/mpt/mpt_raid.h>
107 #ifndef PCI_VENDOR_LSI
108 #define PCI_VENDOR_LSI 0x1000
111 #ifndef PCI_PRODUCT_LSI_FC909
112 #define PCI_PRODUCT_LSI_FC909 0x0620
115 #ifndef PCI_PRODUCT_LSI_FC909A
116 #define PCI_PRODUCT_LSI_FC909A 0x0621
119 #ifndef PCI_PRODUCT_LSI_FC919
120 #define PCI_PRODUCT_LSI_FC919 0x0624
123 #ifndef PCI_PRODUCT_LSI_FC919_LAN
124 #define PCI_PRODUCT_LSI_FC919_LAN 0x0625
127 #ifndef PCI_PRODUCT_LSI_FC929
128 #define PCI_PRODUCT_LSI_FC929 0x0622
131 #ifndef PCI_PRODUCT_LSI_FC929_LAN
132 #define PCI_PRODUCT_LSI_FC929_LAN 0x0623
135 #ifndef PCI_PRODUCT_LSI_FC929X
136 #define PCI_PRODUCT_LSI_FC929X 0x0626
139 #ifndef PCI_PRODUCT_LSI_FC929X_LAN
140 #define PCI_PRODUCT_LSI_FC929X_LAN 0x0627
143 #ifndef PCI_PRODUCT_LSI_FC919X
144 #define PCI_PRODUCT_LSI_FC919X 0x0628
147 #ifndef PCI_PRODUCT_LSI_FC919X_LAN
148 #define PCI_PRODUCT_LSI_FC919X_LAN 0x0629
151 #ifndef PCI_PRODUCT_LSI_FC7X04X
152 #define PCI_PRODUCT_LSI_FC7X04X 0x0640
155 #ifndef PCI_PRODUCT_LSI_FC646
156 #define PCI_PRODUCT_LSI_FC646 0x0646
159 #ifndef PCI_PRODUCT_LSI_1030
160 #define PCI_PRODUCT_LSI_1030 0x0030
163 #ifndef PCI_PRODUCT_LSI_1030ZC
164 #define PCI_PRODUCT_LSI_1030ZC 0x0031
167 #ifndef PCI_PRODUCT_LSI_SAS1064
168 #define PCI_PRODUCT_LSI_SAS1064 0x0050
171 #ifndef PCI_PRODUCT_LSI_SAS1064A
172 #define PCI_PRODUCT_LSI_SAS1064A 0x005C
175 #ifndef PCI_PRODUCT_LSI_SAS1064E
176 #define PCI_PRODUCT_LSI_SAS1064E 0x0056
179 #ifndef PCI_PRODUCT_LSI_SAS1066
180 #define PCI_PRODUCT_LSI_SAS1066 0x005E
183 #ifndef PCI_PRODUCT_LSI_SAS1066E
184 #define PCI_PRODUCT_LSI_SAS1066E 0x005A
187 #ifndef PCI_PRODUCT_LSI_SAS1068
188 #define PCI_PRODUCT_LSI_SAS1068 0x0054
191 #ifndef PCI_PRODUCT_LSI_SAS1068A
192 #define PCI_PRODUCT_LSI_SAS1068A 0x0055
195 #ifndef PCI_PRODUCT_LSI_SAS1068E
196 #define PCI_PRODUCT_LSI_SAS1068E 0x0058
199 #ifndef PCI_PRODUCT_LSI_SAS1078
200 #define PCI_PRODUCT_LSI_SAS1078 0x0062
203 #ifndef PCI_PRODUCT_LSI_SAS1078DE
204 #define PCI_PRODUCT_LSI_SAS1078DE 0x007C
207 #ifndef PCIM_CMD_SERRESPEN
208 #define PCIM_CMD_SERRESPEN 0x0100
213 static int mpt_pci_probe(device_t);
214 static int mpt_pci_attach(device_t);
215 static void mpt_free_bus_resources(struct mpt_softc *mpt);
216 static int mpt_pci_detach(device_t);
217 static int mpt_pci_shutdown(device_t);
218 static int mpt_dma_mem_alloc(struct mpt_softc *mpt);
219 static void mpt_dma_mem_free(struct mpt_softc *mpt);
220 static void mpt_read_config_regs(struct mpt_softc *mpt);
221 static void mpt_pci_intr(void *);
223 static device_method_t mpt_methods[] = {
224 /* Device interface */
225 DEVMETHOD(device_probe, mpt_pci_probe),
226 DEVMETHOD(device_attach, mpt_pci_attach),
227 DEVMETHOD(device_detach, mpt_pci_detach),
228 DEVMETHOD(device_shutdown, mpt_pci_shutdown),
232 static driver_t mpt_driver = {
233 "mpt", mpt_methods, sizeof(struct mpt_softc)
235 static devclass_t mpt_devclass;
236 DRIVER_MODULE(mpt, pci, mpt_driver, mpt_devclass, NULL, NULL);
237 MODULE_DEPEND(mpt, pci, 1, 1, 1);
238 MODULE_VERSION(mpt, 1);
241 mpt_pci_probe(device_t dev)
245 if (pci_get_vendor(dev) != PCI_VENDOR_LSI) {
249 switch (pci_get_device(dev)) {
250 case PCI_PRODUCT_LSI_FC909:
251 desc = "LSILogic FC909 FC Adapter";
253 case PCI_PRODUCT_LSI_FC909A:
254 desc = "LSILogic FC909A FC Adapter";
256 case PCI_PRODUCT_LSI_FC919:
257 desc = "LSILogic FC919 FC Adapter";
259 case PCI_PRODUCT_LSI_FC919_LAN:
260 desc = "LSILogic FC919 LAN Adapter";
262 case PCI_PRODUCT_LSI_FC929:
263 desc = "Dual LSILogic FC929 FC Adapter";
265 case PCI_PRODUCT_LSI_FC929_LAN:
266 desc = "Dual LSILogic FC929 LAN Adapter";
268 case PCI_PRODUCT_LSI_FC919X:
269 desc = "LSILogic FC919 FC PCI-X Adapter";
271 case PCI_PRODUCT_LSI_FC919X_LAN:
272 desc = "LSILogic FC919 LAN PCI-X Adapter";
274 case PCI_PRODUCT_LSI_FC929X:
275 desc = "Dual LSILogic FC929X 2Gb/s FC PCI-X Adapter";
277 case PCI_PRODUCT_LSI_FC929X_LAN:
278 desc = "Dual LSILogic FC929X LAN PCI-X Adapter";
280 case PCI_PRODUCT_LSI_FC646:
281 desc = "Dual LSILogic FC7X04X 4Gb/s FC PCI-Express Adapter";
283 case PCI_PRODUCT_LSI_FC7X04X:
284 desc = "Dual LSILogic FC7X04X 4Gb/s FC PCI-X Adapter";
286 case PCI_PRODUCT_LSI_1030:
287 case PCI_PRODUCT_LSI_1030ZC:
288 desc = "LSILogic 1030 Ultra4 Adapter";
290 case PCI_PRODUCT_LSI_SAS1064:
291 case PCI_PRODUCT_LSI_SAS1064A:
292 case PCI_PRODUCT_LSI_SAS1064E:
293 case PCI_PRODUCT_LSI_SAS1066:
294 case PCI_PRODUCT_LSI_SAS1066E:
295 case PCI_PRODUCT_LSI_SAS1068:
296 case PCI_PRODUCT_LSI_SAS1068A:
297 case PCI_PRODUCT_LSI_SAS1068E:
298 case PCI_PRODUCT_LSI_SAS1078:
299 case PCI_PRODUCT_LSI_SAS1078DE:
300 desc = "LSILogic SAS/SATA Adapter";
306 device_set_desc(dev, desc);
311 mpt_set_options(struct mpt_softc *mpt)
316 if (kgetenv_int("mpt_disable", &bitmap)) {
317 if (bitmap & (1 << mpt->unit)) {
322 if (kgetenv_int("mpt_debug", &bitmap)) {
323 if (bitmap & (1 << mpt->unit)) {
324 mpt->verbose = MPT_PRT_DEBUG;
328 if (kgetenv_int("mpt_debug1", &bitmap)) {
329 if (bitmap & (1 << mpt->unit)) {
330 mpt->verbose = MPT_PRT_DEBUG1;
334 if (kgetenv_int("mpt_debug2", &bitmap)) {
335 if (bitmap & (1 << mpt->unit)) {
336 mpt->verbose = MPT_PRT_DEBUG2;
340 if (kgetenv_int("mpt_debug3", &bitmap)) {
341 if (bitmap & (1 << mpt->unit)) {
342 mpt->verbose = MPT_PRT_DEBUG3;
346 mpt->cfg_role = MPT_ROLE_DEFAULT;
348 if (kgetenv_int("mpt_nil_role", &bitmap)) {
349 if (bitmap & (1 << mpt->unit)) {
352 mpt->do_cfg_role = 1;
355 if (kgetenv_int("mpt_tgt_role", &bitmap)) {
356 if (bitmap & (1 << mpt->unit)) {
357 mpt->cfg_role |= MPT_ROLE_TARGET;
359 mpt->do_cfg_role = 1;
362 if (kgetenv_int("mpt_ini_role", &bitmap)) {
363 if (bitmap & (1 << mpt->unit)) {
364 mpt->cfg_role |= MPT_ROLE_INITIATOR;
366 mpt->do_cfg_role = 1;
373 mpt_link_peer(struct mpt_softc *mpt)
375 struct mpt_softc *mpt2;
377 if (mpt->unit == 0) {
381 * XXX: depends on probe order
383 mpt2 = (struct mpt_softc *)devclass_get_softc(mpt_devclass,mpt->unit-1);
388 if (pci_get_vendor(mpt2->dev) != pci_get_vendor(mpt->dev)) {
391 if (pci_get_device(mpt2->dev) != pci_get_device(mpt->dev)) {
396 if (mpt->verbose >= MPT_PRT_DEBUG) {
397 mpt_prt(mpt, "linking with peer (mpt%d)\n",
398 device_get_unit(mpt2->dev));
403 mpt_unlink_peer(struct mpt_softc *mpt)
406 mpt->mpt2->mpt2 = NULL;
412 mpt_pci_attach(device_t dev)
414 struct mpt_softc *mpt;
417 int mpt_io_bar, mpt_mem_bar;
419 /* Allocate the softc structure */
420 mpt = (struct mpt_softc*)device_get_softc(dev);
422 device_printf(dev, "cannot allocate softc\n");
425 memset(mpt, 0, sizeof(struct mpt_softc));
426 switch (pci_get_device(dev)) {
427 case PCI_PRODUCT_LSI_FC909:
428 case PCI_PRODUCT_LSI_FC909A:
429 case PCI_PRODUCT_LSI_FC919:
430 case PCI_PRODUCT_LSI_FC919_LAN:
431 case PCI_PRODUCT_LSI_FC929:
432 case PCI_PRODUCT_LSI_FC929_LAN:
433 case PCI_PRODUCT_LSI_FC929X:
434 case PCI_PRODUCT_LSI_FC929X_LAN:
435 case PCI_PRODUCT_LSI_FC919X:
436 case PCI_PRODUCT_LSI_FC919X_LAN:
437 case PCI_PRODUCT_LSI_FC646:
438 case PCI_PRODUCT_LSI_FC7X04X:
441 case PCI_PRODUCT_LSI_SAS1064:
442 case PCI_PRODUCT_LSI_SAS1064A:
443 case PCI_PRODUCT_LSI_SAS1064E:
444 case PCI_PRODUCT_LSI_SAS1066:
445 case PCI_PRODUCT_LSI_SAS1066E:
446 case PCI_PRODUCT_LSI_SAS1068:
447 case PCI_PRODUCT_LSI_SAS1068A:
448 case PCI_PRODUCT_LSI_SAS1068E:
449 case PCI_PRODUCT_LSI_SAS1078:
450 case PCI_PRODUCT_LSI_SAS1078DE:
458 mpt->unit = device_get_unit(dev);
459 mpt->raid_resync_rate = MPT_RAID_RESYNC_RATE_DEFAULT;
460 mpt->raid_mwce_setting = MPT_RAID_MWCE_DEFAULT;
461 mpt->raid_queue_depth = MPT_RAID_QUEUE_DEPTH_DEFAULT;
462 mpt->verbose = MPT_PRT_NONE;
463 mpt->role = MPT_ROLE_NONE;
464 mpt->mpt_ini_id = MPT_INI_ID_NONE;
465 mpt_set_options(mpt);
466 if (mpt->verbose == MPT_PRT_NONE) {
467 mpt->verbose = MPT_PRT_WARN;
468 /* Print INFO level (if any) if bootverbose is set */
469 mpt->verbose += (bootverbose != 0)? 1 : 0;
471 /* Make sure memory access decoders are enabled */
472 cmd = pci_read_config(dev, PCIR_COMMAND, 2);
473 if ((cmd & PCIM_CMD_MEMEN) == 0) {
474 device_printf(dev, "Memory accesses disabled");
479 * Make sure that SERR, PERR, WRITE INVALIDATE and BUSMASTER are set.
482 PCIM_CMD_SERRESPEN | PCIM_CMD_PERRESPEN |
483 PCIM_CMD_BUSMASTEREN | PCIM_CMD_MWRICEN;
484 pci_write_config(dev, PCIR_COMMAND, cmd, 2);
487 * Make sure we've disabled the ROM.
489 data = pci_read_config(dev, PCIR_BIOS, 4);
490 data &= ~PCIM_BIOS_ENABLE;
491 pci_write_config(dev, PCIR_BIOS, data, 4);
494 * Is this part a dual?
495 * If so, link with our partner (around yet)
497 switch (pci_get_device(dev)) {
498 case PCI_PRODUCT_LSI_FC929:
499 case PCI_PRODUCT_LSI_FC929_LAN:
500 case PCI_PRODUCT_LSI_FC646:
501 case PCI_PRODUCT_LSI_FC7X04X:
502 case PCI_PRODUCT_LSI_1030:
503 case PCI_PRODUCT_LSI_1030ZC:
511 * Figure out which are the I/O and MEM Bars
513 data = pci_read_config(dev, PCIR_BAR(0), 4);
514 if (PCI_BAR_IO(data)) {
515 /* BAR0 is IO, BAR1 is memory */
519 /* BAR0 is memory, BAR1 is IO */
525 * Set up register access. PIO mode is required for
526 * certain reset operations (but must be disabled for
527 * some cards otherwise).
529 mpt->pci_pio_rid = PCIR_BAR(mpt_io_bar);
530 mpt->pci_pio_reg = bus_alloc_resource_any(dev, SYS_RES_IOPORT,
531 &mpt->pci_pio_rid, RF_ACTIVE);
532 if (mpt->pci_pio_reg == NULL) {
533 device_printf(dev, "unable to map registers in PIO mode\n");
536 mpt->pci_pio_st = rman_get_bustag(mpt->pci_pio_reg);
537 mpt->pci_pio_sh = rman_get_bushandle(mpt->pci_pio_reg);
539 /* Allocate kernel virtual memory for the 9x9's Mem0 region */
540 mpt->pci_mem_rid = PCIR_BAR(mpt_mem_bar);
541 mpt->pci_reg = bus_alloc_resource_any(dev, SYS_RES_MEMORY,
542 &mpt->pci_mem_rid, RF_ACTIVE);
543 if (mpt->pci_reg == NULL) {
544 device_printf(dev, "Unable to memory map registers.\n");
546 device_printf(dev, "Giving Up.\n");
549 device_printf(dev, "Falling back to PIO mode.\n");
550 mpt->pci_st = mpt->pci_pio_st;
551 mpt->pci_sh = mpt->pci_pio_sh;
553 mpt->pci_st = rman_get_bustag(mpt->pci_reg);
554 mpt->pci_sh = rman_get_bushandle(mpt->pci_reg);
557 /* Get a handle to the interrupt */
560 if (mpt->msi_enable) {
562 * First try to alloc an MSI-X message. If that
563 * fails, then try to alloc an MSI message instead.
565 if (pci_msix_count(dev) == 1) {
566 mpt->pci_msi_count = 1;
567 if (pci_alloc_msix(dev, &mpt->pci_msi_count) == 0) {
570 mpt->pci_msi_count = 0;
573 if (iqd == 0 && pci_msi_count(dev) == 1) {
574 mpt->pci_msi_count = 1;
575 if (pci_alloc_msi(dev, &mpt->pci_msi_count) == 0) {
578 mpt->pci_msi_count = 0;
583 mpt->pci_irq = bus_alloc_resource_any(dev, SYS_RES_IRQ, &iqd,
584 RF_ACTIVE | RF_SHAREABLE);
585 if (mpt->pci_irq == NULL) {
586 device_printf(dev, "could not allocate interrupt\n");
592 /* Disable interrupts at the part */
593 mpt_disable_ints(mpt);
595 /* Register the interrupt handler */
596 if (mpt_setup_intr(dev, mpt->pci_irq, MPT_IFLAGS, NULL, mpt_pci_intr,
598 device_printf(dev, "could not setup interrupt\n");
602 /* Allocate dma memory */
603 /* XXX JGibbs -Should really be done based on IOCFacts. */
604 if (mpt_dma_mem_alloc(mpt)) {
605 mpt_prt(mpt, "Could not allocate DMA memory\n");
610 * Save the PCI config register values
612 * Hard resets are known to screw up the BAR for diagnostic
613 * memory accesses (Mem1).
615 * Using Mem1 is known to make the chip stop responding to
616 * configuration space transfers, so we need to save it now
619 mpt_read_config_regs(mpt);
622 * Disable PIO until we need it
625 pci_disable_io(dev, SYS_RES_IOPORT);
628 /* Initialize the hardware */
629 if (mpt->disabled == 0) {
630 if (mpt_attach(mpt) != 0) {
634 mpt_prt(mpt, "device disabled at user request\n");
638 mpt->eh = EVENTHANDLER_REGISTER(shutdown_post_sync, mpt_pci_shutdown,
639 dev, SHUTDOWN_PRI_DEFAULT);
641 if (mpt->eh == NULL) {
642 mpt_prt(mpt, "shutdown event registration failed\n");
643 (void) mpt_detach(mpt);
649 mpt_dma_mem_free(mpt);
650 mpt_free_bus_resources(mpt);
651 mpt_unlink_peer(mpt);
653 MPT_LOCK_DESTROY(mpt);
656 * but return zero to preserve unit numbering
665 mpt_free_bus_resources(struct mpt_softc *mpt)
668 bus_teardown_intr(mpt->dev, mpt->pci_irq, mpt->ih);
673 bus_release_resource(mpt->dev, SYS_RES_IRQ,
674 mpt->pci_msi_count ? 1 : 0, mpt->pci_irq);
678 if (mpt->pci_msi_count) {
679 pci_release_msi(mpt->dev);
680 mpt->pci_msi_count = 0;
683 if (mpt->pci_pio_reg) {
684 bus_release_resource(mpt->dev, SYS_RES_IOPORT, mpt->pci_pio_rid,
686 mpt->pci_pio_reg = 0;
689 bus_release_resource(mpt->dev, SYS_RES_MEMORY, mpt->pci_mem_rid,
693 MPT_LOCK_DESTROY(mpt);
698 * Disconnect ourselves from the system.
701 mpt_pci_detach(device_t dev)
703 struct mpt_softc *mpt;
705 mpt = (struct mpt_softc*)device_get_softc(dev);
708 mpt_disable_ints(mpt);
710 mpt_reset(mpt, /*reinit*/FALSE);
711 mpt_dma_mem_free(mpt);
712 mpt_free_bus_resources(mpt);
713 mpt_raid_free_mem(mpt);
714 if (mpt->eh != NULL) {
715 EVENTHANDLER_DEREGISTER(shutdown_post_sync, mpt->eh);
723 * Disable the hardware
726 mpt_pci_shutdown(device_t dev)
728 struct mpt_softc *mpt;
730 mpt = (struct mpt_softc *)device_get_softc(dev);
733 r = mpt_shutdown(mpt);
740 mpt_dma_mem_alloc(struct mpt_softc *mpt)
743 struct mpt_map_info mi;
745 /* Check if we alreay have allocated the reply memory */
746 if (mpt->reply_phys != 0) {
750 len = sizeof (request_t) * MPT_MAX_REQUESTS(mpt);
751 mpt->request_pool = (request_t *)kmalloc(len, M_DEVBUF, M_WAITOK|M_ZERO);
752 if (mpt->request_pool == NULL) {
753 mpt_prt(mpt, "cannot allocate request pool\n");
758 * Create a parent dma tag for this device.
760 * Align at byte boundaries,
761 * Limit to 32-bit addressing for request/reply queues.
763 if (mpt_dma_tag_create(mpt, /*parent*/NULL,
764 /*alignment*/1, /*boundary*/0, /*lowaddr*/BUS_SPACE_MAXADDR,
765 /*highaddr*/BUS_SPACE_MAXADDR, /*filter*/NULL, /*filterarg*/NULL,
766 /*maxsize*/BUS_SPACE_MAXSIZE_32BIT,
767 /*nsegments*/BUS_SPACE_UNRESTRICTED,
768 /*maxsegsz*/BUS_SPACE_MAXSIZE_32BIT, /*flags*/0,
769 &mpt->parent_dmat) != 0) {
770 mpt_prt(mpt, "cannot create parent dma tag\n");
774 /* Create a child tag for reply buffers */
775 if (mpt_dma_tag_create(mpt, mpt->parent_dmat, PAGE_SIZE, 0,
776 BUS_SPACE_MAXADDR_32BIT, BUS_SPACE_MAXADDR,
777 NULL, NULL, 2 * PAGE_SIZE, 1, BUS_SPACE_MAXSIZE_32BIT, 0,
778 &mpt->reply_dmat) != 0) {
779 mpt_prt(mpt, "cannot create a dma tag for replies\n");
783 /* Allocate some DMA accessible memory for replies */
784 if (bus_dmamem_alloc(mpt->reply_dmat, (void **)&mpt->reply,
785 BUS_DMA_NOWAIT, &mpt->reply_dmap) != 0) {
786 mpt_prt(mpt, "cannot allocate %lu bytes of reply memory\n",
787 (u_long) (2 * PAGE_SIZE));
794 /* Load and lock it into "bus space" */
795 bus_dmamap_load(mpt->reply_dmat, mpt->reply_dmap, mpt->reply,
796 2 * PAGE_SIZE, mpt_map_rquest, &mi, 0);
799 mpt_prt(mpt, "error %d loading dma map for DMA reply queue\n",
803 mpt->reply_phys = mi.phys;
810 /* Deallocate memory that was allocated by mpt_dma_mem_alloc
813 mpt_dma_mem_free(struct mpt_softc *mpt)
816 /* Make sure we aren't double destroying */
817 if (mpt->reply_dmat == 0) {
818 mpt_lprt(mpt, MPT_PRT_DEBUG, "already released dma memory\n");
822 bus_dmamap_unload(mpt->reply_dmat, mpt->reply_dmap);
823 bus_dmamem_free(mpt->reply_dmat, mpt->reply, mpt->reply_dmap);
824 bus_dma_tag_destroy(mpt->reply_dmat);
825 bus_dma_tag_destroy(mpt->parent_dmat);
827 kfree(mpt->request_pool, M_DEVBUF);
828 mpt->request_pool = 0;
834 /* Reads modifiable (via PCI transactions) config registers */
836 mpt_read_config_regs(struct mpt_softc *mpt)
838 mpt->pci_cfg.Command = pci_read_config(mpt->dev, PCIR_COMMAND, 2);
839 mpt->pci_cfg.LatencyTimer_LineSize =
840 pci_read_config(mpt->dev, PCIR_CACHELNSZ, 2);
841 mpt->pci_cfg.IO_BAR = pci_read_config(mpt->dev, PCIR_BAR(0), 4);
842 mpt->pci_cfg.Mem0_BAR[0] = pci_read_config(mpt->dev, PCIR_BAR(1), 4);
843 mpt->pci_cfg.Mem0_BAR[1] = pci_read_config(mpt->dev, PCIR_BAR(2), 4);
844 mpt->pci_cfg.Mem1_BAR[0] = pci_read_config(mpt->dev, PCIR_BAR(3), 4);
845 mpt->pci_cfg.Mem1_BAR[1] = pci_read_config(mpt->dev, PCIR_BAR(4), 4);
846 mpt->pci_cfg.ROM_BAR = pci_read_config(mpt->dev, PCIR_BIOS, 4);
847 mpt->pci_cfg.IntLine = pci_read_config(mpt->dev, PCIR_INTLINE, 1);
848 mpt->pci_cfg.PMCSR = pci_read_config(mpt->dev, 0x44, 4);
851 /* Sets modifiable config registers */
853 mpt_set_config_regs(struct mpt_softc *mpt)
857 #define MPT_CHECK(reg, offset, size) \
858 val = pci_read_config(mpt->dev, offset, size); \
859 if (mpt->pci_cfg.reg != val) { \
861 "Restoring " #reg " to 0x%X from 0x%X\n", \
862 mpt->pci_cfg.reg, val); \
865 if (mpt->verbose >= MPT_PRT_DEBUG) {
866 MPT_CHECK(Command, PCIR_COMMAND, 2);
867 MPT_CHECK(LatencyTimer_LineSize, PCIR_CACHELNSZ, 2);
868 MPT_CHECK(IO_BAR, PCIR_BAR(0), 4);
869 MPT_CHECK(Mem0_BAR[0], PCIR_BAR(1), 4);
870 MPT_CHECK(Mem0_BAR[1], PCIR_BAR(2), 4);
871 MPT_CHECK(Mem1_BAR[0], PCIR_BAR(3), 4);
872 MPT_CHECK(Mem1_BAR[1], PCIR_BAR(4), 4);
873 MPT_CHECK(ROM_BAR, PCIR_BIOS, 4);
874 MPT_CHECK(IntLine, PCIR_INTLINE, 1);
875 MPT_CHECK(PMCSR, 0x44, 4);
879 pci_write_config(mpt->dev, PCIR_COMMAND, mpt->pci_cfg.Command, 2);
880 pci_write_config(mpt->dev, PCIR_CACHELNSZ,
881 mpt->pci_cfg.LatencyTimer_LineSize, 2);
882 pci_write_config(mpt->dev, PCIR_BAR(0), mpt->pci_cfg.IO_BAR, 4);
883 pci_write_config(mpt->dev, PCIR_BAR(1), mpt->pci_cfg.Mem0_BAR[0], 4);
884 pci_write_config(mpt->dev, PCIR_BAR(2), mpt->pci_cfg.Mem0_BAR[1], 4);
885 pci_write_config(mpt->dev, PCIR_BAR(3), mpt->pci_cfg.Mem1_BAR[0], 4);
886 pci_write_config(mpt->dev, PCIR_BAR(4), mpt->pci_cfg.Mem1_BAR[1], 4);
887 pci_write_config(mpt->dev, PCIR_BIOS, mpt->pci_cfg.ROM_BAR, 4);
888 pci_write_config(mpt->dev, PCIR_INTLINE, mpt->pci_cfg.IntLine, 1);
889 pci_write_config(mpt->dev, 0x44, mpt->pci_cfg.PMCSR, 4);
893 mpt_pci_intr(void *arg)
895 struct mpt_softc *mpt;
897 mpt = (struct mpt_softc *)arg;