sys/dev/drm/savage/savage_bci.c

   1 /* savage_bci.c -- BCI support for Savage
   2  *
   3  * Copyright 2004  Felix Kuehling
   4  * All Rights Reserved.
   5  *
   6  * Permission is hereby granted, free of charge, to any person obtaining a
   7  * copy of this software and associated documentation files (the "Software"),
   8  * to deal in the Software without restriction, including without limitation
   9  * the rights to use, copy, modify, merge, publish, distribute, sub license,
  10  * and/or sell copies of the Software, and to permit persons to whom the
  11  * Software is furnished to do so, subject to the following conditions:
  12  *
  13  * The above copyright notice and this permission notice (including the
  14  * next paragraph) shall be included in all copies or substantial portions
  15  * of the Software.
  16  *
  17  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
  18  * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
  19  * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
  20  * NON-INFRINGEMENT. IN NO EVENT SHALL FELIX KUEHLING BE LIABLE FOR
  21  * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF
  22  * CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION
  23  * WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
  24  */
  25
  26 #include "dev/drm/drmP.h"
  27 #include "dev/drm/savage_drm.h"
  28 #include "savage_drv.h"
  29
  30 /* Need a long timeout for shadow status updates can take a while
  31  * and so can waiting for events when the queue is full. */
  32 #define SAVAGE_DEFAULT_USEC_TIMEOUT     1000000 /* 1s */
  33 #define SAVAGE_EVENT_USEC_TIMEOUT       5000000 /* 5s */
  34 #define SAVAGE_FREELIST_DEBUG           0
  35
  36 static int savage_do_cleanup_bci(struct drm_device *dev);
  37
  38 static int
  39 savage_bci_wait_fifo_shadow(drm_savage_private_t *dev_priv, unsigned int n)
  40 {
  41         uint32_t mask = dev_priv->status_used_mask;
  42         uint32_t threshold = dev_priv->bci_threshold_hi;
  43         uint32_t status;
  44         int i;
  45
  46 #if SAVAGE_BCI_DEBUG
  47         if (n > dev_priv->cob_size + SAVAGE_BCI_FIFO_SIZE - threshold)
  48                 DRM_ERROR("Trying to emit %d words "
  49                           "(more than guaranteed space in COB)\n", n);
  50 #endif
  51
  52         for (i = 0; i < SAVAGE_DEFAULT_USEC_TIMEOUT; i++) {
  53                 DRM_MEMORYBARRIER();
  54                 status = dev_priv->status_ptr[0];
  55                 if ((status & mask) < threshold)
  56                         return 0;
  57                 DRM_UDELAY(1);
  58         }
  59
  60 #if SAVAGE_BCI_DEBUG
  61         DRM_ERROR("failed!\n");
  62         DRM_INFO("   status=0x%08x, threshold=0x%08x\n", status, threshold);
  63 #endif
  64         return -EBUSY;
  65 }
  66
  67 static int
  68 savage_bci_wait_fifo_s3d(drm_savage_private_t *dev_priv, unsigned int n)
  69 {
  70         uint32_t maxUsed = dev_priv->cob_size + SAVAGE_BCI_FIFO_SIZE - n;
  71         uint32_t status;
  72         int i;
  73
  74         for (i = 0; i < SAVAGE_DEFAULT_USEC_TIMEOUT; i++) {
  75                 status = SAVAGE_READ(SAVAGE_STATUS_WORD0);
  76                 if ((status & SAVAGE_FIFO_USED_MASK_S3D) <= maxUsed)
  77                         return 0;
  78                 DRM_UDELAY(1);
  79         }
  80
  81 #if SAVAGE_BCI_DEBUG
  82         DRM_ERROR("failed!\n");
  83         DRM_INFO("   status=0x%08x\n", status);
  84 #endif
  85         return -EBUSY;
  86 }
  87
  88 static int
  89 savage_bci_wait_fifo_s4(drm_savage_private_t *dev_priv, unsigned int n)
  90 {
  91         uint32_t maxUsed = dev_priv->cob_size + SAVAGE_BCI_FIFO_SIZE - n;
  92         uint32_t status;
  93         int i;
  94
  95         for (i = 0; i < SAVAGE_DEFAULT_USEC_TIMEOUT; i++) {
  96                 status = SAVAGE_READ(SAVAGE_ALT_STATUS_WORD0);
  97                 if ((status & SAVAGE_FIFO_USED_MASK_S4) <= maxUsed)
  98                         return 0;
  99                 DRM_UDELAY(1);
 100         }
 101
 102 #if SAVAGE_BCI_DEBUG
 103         DRM_ERROR("failed!\n");
 104         DRM_INFO("   status=0x%08x\n", status);
 105 #endif
 106         return -EBUSY;
 107 }
 108
 109 /*
 110  * Waiting for events.
 111  *
 112  * The BIOSresets the event tag to 0 on mode changes. Therefore we
 113  * never emit 0 to the event tag. If we find a 0 event tag we know the
 114  * BIOS stomped on it and return success assuming that the BIOS waited
 115  * for engine idle.
 116  *
 117  * Note: if the Xserver uses the event tag it has to follow the same
 118  * rule. Otherwise there may be glitches every 2^16 events.
 119  */
 120 static int
 121 savage_bci_wait_event_shadow(drm_savage_private_t *dev_priv, uint16_t e)
 122 {
 123         uint32_t status;
 124         int i;
 125
 126         for (i = 0; i < SAVAGE_EVENT_USEC_TIMEOUT; i++) {
 127                 DRM_MEMORYBARRIER();
 128                 status = dev_priv->status_ptr[1];
 129                 if ((((status & 0xffff) - e) & 0xffff) <= 0x7fff ||
 130                     (status & 0xffff) == 0)
 131                         return 0;
 132                 DRM_UDELAY(1);
 133         }
 134
 135 #if SAVAGE_BCI_DEBUG
 136         DRM_ERROR("failed!\n");
 137         DRM_INFO("   status=0x%08x, e=0x%04x\n", status, e);
 138 #endif
 139
 140         return -EBUSY;
 141 }
 142
 143 static int
 144 savage_bci_wait_event_reg(drm_savage_private_t *dev_priv, uint16_t e)
 145 {
 146         uint32_t status;
 147         int i;
 148
 149         for (i = 0; i < SAVAGE_EVENT_USEC_TIMEOUT; i++) {
 150                 status = SAVAGE_READ(SAVAGE_STATUS_WORD1);
 151                 if ((((status & 0xffff) - e) & 0xffff) <= 0x7fff ||
 152                     (status & 0xffff) == 0)
 153                         return 0;
 154                 DRM_UDELAY(1);
 155         }
 156
 157 #if SAVAGE_BCI_DEBUG
 158         DRM_ERROR("failed!\n");
 159         DRM_INFO("   status=0x%08x, e=0x%04x\n", status, e);
 160 #endif
 161
 162         return -EBUSY;
 163 }
 164
 165 uint16_t savage_bci_emit_event(drm_savage_private_t *dev_priv,
 166                                unsigned int flags)
 167 {
 168         uint16_t count;
 169         BCI_LOCALS;
 170
 171         if (dev_priv->status_ptr) {
 172                 /* coordinate with Xserver */
 173                 count = dev_priv->status_ptr[1023];
 174                 if (count < dev_priv->event_counter)
 175                         dev_priv->event_wrap++;
 176         } else {
 177                 count = dev_priv->event_counter;
 178         }
 179         count = (count + 1) & 0xffff;
 180         if (count == 0) {
 181                 count++; /* See the comment above savage_wait_event_*. */
 182                 dev_priv->event_wrap++;
 183         }
 184         dev_priv->event_counter = count;
 185         if (dev_priv->status_ptr)
 186                 dev_priv->status_ptr[1023] = (uint32_t)count;
 187
 188         if ((flags & (SAVAGE_WAIT_2D | SAVAGE_WAIT_3D))) {
 189                 unsigned int wait_cmd = BCI_CMD_WAIT;
 190                 if ((flags & SAVAGE_WAIT_2D))
 191                         wait_cmd |= BCI_CMD_WAIT_2D;
 192                 if ((flags & SAVAGE_WAIT_3D))
 193                         wait_cmd |= BCI_CMD_WAIT_3D;
 194                 BEGIN_BCI(2);
 195                 BCI_WRITE(wait_cmd);
 196         } else {
 197                 BEGIN_BCI(1);
 198         }
 199         BCI_WRITE(BCI_CMD_UPDATE_EVENT_TAG | (uint32_t)count);
 200
 201         return count;
 202 }
 203
 204 /*
 205  * Freelist management
 206  */
 207 static int savage_freelist_init(struct drm_device *dev)
 208 {
 209         drm_savage_private_t *dev_priv = dev->dev_private;
 210         struct drm_device_dma *dma = dev->dma;
 211         struct drm_buf *buf;
 212         drm_savage_buf_priv_t *entry;
 213         int i;
 214         DRM_DEBUG("count=%d\n", dma->buf_count);
 215
 216         dev_priv->head.next = &dev_priv->tail;
 217         dev_priv->head.prev = NULL;
 218         dev_priv->head.buf = NULL;
 219
 220         dev_priv->tail.next = NULL;
 221         dev_priv->tail.prev = &dev_priv->head;
 222         dev_priv->tail.buf = NULL;
 223
 224         for (i = 0; i < dma->buf_count; i++) {
 225                 buf = dma->buflist[i];
 226                 entry = buf->dev_private;
 227
 228                 SET_AGE(&entry->age, 0, 0);
 229                 entry->buf = buf;
 230
 231                 entry->next = dev_priv->head.next;
 232                 entry->prev = &dev_priv->head;
 233                 dev_priv->head.next->prev = entry;
 234                 dev_priv->head.next = entry;
 235         }
 236
 237         return 0;
 238 }
 239
 240 static struct drm_buf *savage_freelist_get(struct drm_device *dev)
 241 {
 242         drm_savage_private_t *dev_priv = dev->dev_private;
 243         drm_savage_buf_priv_t *tail = dev_priv->tail.prev;
 244         uint16_t event;
 245         unsigned int wrap;
 246         DRM_DEBUG("\n");
 247
 248         UPDATE_EVENT_COUNTER();
 249         if (dev_priv->status_ptr)
 250                 event = dev_priv->status_ptr[1] & 0xffff;
 251         else
 252                 event = SAVAGE_READ(SAVAGE_STATUS_WORD1) & 0xffff;
 253         wrap = dev_priv->event_wrap;
 254         if (event > dev_priv->event_counter)
 255                 wrap--; /* hardware hasn't passed the last wrap yet */
 256
 257         DRM_DEBUG("   tail=0x%04x %d\n", tail->age.event, tail->age.wrap);
 258         DRM_DEBUG("   head=0x%04x %d\n", event, wrap);
 259
 260         if (tail->buf && (TEST_AGE(&tail->age, event, wrap) || event == 0)) {
 261                 drm_savage_buf_priv_t *next = tail->next;
 262                 drm_savage_buf_priv_t *prev = tail->prev;
 263                 prev->next = next;
 264                 next->prev = prev;
 265                 tail->next = tail->prev = NULL;
 266                 return tail->buf;
 267         }
 268
 269         DRM_DEBUG("returning NULL, tail->buf=%p!\n", tail->buf);
 270         return NULL;
 271 }
 272
 273 void savage_freelist_put(struct drm_device *dev, struct drm_buf *buf)
 274 {
 275         drm_savage_private_t *dev_priv = dev->dev_private;
 276         drm_savage_buf_priv_t *entry = buf->dev_private, *prev, *next;
 277
 278         DRM_DEBUG("age=0x%04x wrap=%d\n", entry->age.event, entry->age.wrap);
 279
 280         if (entry->next != NULL || entry->prev != NULL) {
 281                 DRM_ERROR("entry already on freelist.\n");
 282                 return;
 283         }
 284
 285         prev = &dev_priv->head;
 286         next = prev->next;
 287         prev->next = entry;
 288         next->prev = entry;
 289         entry->prev = prev;
 290         entry->next = next;
 291 }
 292
 293 /*
 294  * Command DMA
 295  */
 296 static int savage_dma_init(drm_savage_private_t *dev_priv)
 297 {
 298         unsigned int i;
 299
 300         dev_priv->nr_dma_pages = dev_priv->cmd_dma->size /
 301                 (SAVAGE_DMA_PAGE_SIZE*4);
 302         dev_priv->dma_pages = drm_alloc(sizeof(drm_savage_dma_page_t) *
 303                                         dev_priv->nr_dma_pages, DRM_MEM_DRIVER);
 304         if (dev_priv->dma_pages == NULL)
 305                 return -ENOMEM;
 306
 307         for (i = 0; i < dev_priv->nr_dma_pages; ++i) {
 308                 SET_AGE(&dev_priv->dma_pages[i].age, 0, 0);
 309                 dev_priv->dma_pages[i].used = 0;
 310                 dev_priv->dma_pages[i].flushed = 0;
 311         }
 312         SET_AGE(&dev_priv->last_dma_age, 0, 0);
 313
 314         dev_priv->first_dma_page = 0;
 315         dev_priv->current_dma_page = 0;
 316
 317         return 0;
 318 }
 319
 320 void savage_dma_reset(drm_savage_private_t *dev_priv)
 321 {
 322         uint16_t event;
 323         unsigned int wrap, i;
 324         event = savage_bci_emit_event(dev_priv, 0);
 325         wrap = dev_priv->event_wrap;
 326         for (i = 0; i < dev_priv->nr_dma_pages; ++i) {
 327                 SET_AGE(&dev_priv->dma_pages[i].age, event, wrap);
 328                 dev_priv->dma_pages[i].used = 0;
 329                 dev_priv->dma_pages[i].flushed = 0;
 330         }
 331         SET_AGE(&dev_priv->last_dma_age, event, wrap);
 332         dev_priv->first_dma_page = dev_priv->current_dma_page = 0;
 333 }
 334
 335 void savage_dma_wait(drm_savage_private_t *dev_priv, unsigned int page)
 336 {
 337         uint16_t event;
 338         unsigned int wrap;
 339
 340         /* Faked DMA buffer pages don't age. */
 341         if (dev_priv->cmd_dma == &dev_priv->fake_dma)
 342                 return;
 343
 344         UPDATE_EVENT_COUNTER();
 345         if (dev_priv->status_ptr)
 346                 event = dev_priv->status_ptr[1] & 0xffff;
 347         else
 348                 event = SAVAGE_READ(SAVAGE_STATUS_WORD1) & 0xffff;
 349         wrap = dev_priv->event_wrap;
 350         if (event > dev_priv->event_counter)
 351                 wrap--; /* hardware hasn't passed the last wrap yet */
 352
 353         if (dev_priv->dma_pages[page].age.wrap > wrap ||
 354             (dev_priv->dma_pages[page].age.wrap == wrap &&
 355              dev_priv->dma_pages[page].age.event > event)) {
 356                 if (dev_priv->wait_evnt(dev_priv,
 357                                         dev_priv->dma_pages[page].age.event)
 358                     < 0)
 359                         DRM_ERROR("wait_evnt failed!\n");
 360         }
 361 }
 362
 363 uint32_t *savage_dma_alloc(drm_savage_private_t *dev_priv, unsigned int n)
 364 {
 365         unsigned int cur = dev_priv->current_dma_page;
 366         unsigned int rest = SAVAGE_DMA_PAGE_SIZE -
 367                 dev_priv->dma_pages[cur].used;
 368         unsigned int nr_pages = (n - rest + SAVAGE_DMA_PAGE_SIZE - 1) /
 369                 SAVAGE_DMA_PAGE_SIZE;
 370         uint32_t *dma_ptr;
 371         unsigned int i;
 372
 373         DRM_DEBUG("cur=%u, cur->used=%u, n=%u, rest=%u, nr_pages=%u\n",
 374                   cur, dev_priv->dma_pages[cur].used, n, rest, nr_pages);
 375
 376         if (cur + nr_pages < dev_priv->nr_dma_pages) {
 377                 dma_ptr = (uint32_t *)dev_priv->cmd_dma->handle +
 378                     cur * SAVAGE_DMA_PAGE_SIZE + dev_priv->dma_pages[cur].used;
 379                 if (n < rest)
 380                         rest = n;
 381                 dev_priv->dma_pages[cur].used += rest;
 382                 n -= rest;
 383                 cur++;
 384         } else {
 385                 dev_priv->dma_flush(dev_priv);
 386                 nr_pages =
 387                     (n + SAVAGE_DMA_PAGE_SIZE - 1) / SAVAGE_DMA_PAGE_SIZE;
 388                 for (i = cur; i < dev_priv->nr_dma_pages; ++i) {
 389                         dev_priv->dma_pages[i].age = dev_priv->last_dma_age;
 390                         dev_priv->dma_pages[i].used = 0;
 391                         dev_priv->dma_pages[i].flushed = 0;
 392                 }
 393                 dma_ptr = (uint32_t *)dev_priv->cmd_dma->handle;
 394                 dev_priv->first_dma_page = cur = 0;
 395         }
 396         for (i = cur; nr_pages > 0; ++i, --nr_pages) {
 397 #if SAVAGE_DMA_DEBUG
 398                 if (dev_priv->dma_pages[i].used) {
 399                         DRM_ERROR("unflushed page %u: used=%u\n",
 400                                   i, dev_priv->dma_pages[i].used);
 401                 }
 402 #endif
 403                 if (n > SAVAGE_DMA_PAGE_SIZE)
 404                         dev_priv->dma_pages[i].used = SAVAGE_DMA_PAGE_SIZE;
 405                 else
 406                         dev_priv->dma_pages[i].used = n;
 407                 n -= SAVAGE_DMA_PAGE_SIZE;
 408         }
 409         dev_priv->current_dma_page = --i;
 410
 411         DRM_DEBUG("cur=%u, cur->used=%u, n=%u\n",
 412                   i, dev_priv->dma_pages[i].used, n);
 413
 414         savage_dma_wait(dev_priv, dev_priv->current_dma_page);
 415
 416         return dma_ptr;
 417 }
 418
 419 static void savage_dma_flush(drm_savage_private_t *dev_priv)
 420 {
 421         unsigned int first = dev_priv->first_dma_page;
 422         unsigned int cur = dev_priv->current_dma_page;
 423         uint16_t event;
 424         unsigned int wrap, pad, align, len, i;
 425         unsigned long phys_addr;
 426         BCI_LOCALS;
 427
 428         if (first == cur &&
 429             dev_priv->dma_pages[cur].used == dev_priv->dma_pages[cur].flushed)
 430                 return;
 431
 432         /* pad length to multiples of 2 entries
 433          * align start of next DMA block to multiles of 8 entries */
 434         pad = -dev_priv->dma_pages[cur].used & 1;
 435         align = -(dev_priv->dma_pages[cur].used + pad) & 7;
 436
 437         DRM_DEBUG("first=%u, cur=%u, first->flushed=%u, cur->used=%u, "
 438                   "pad=%u, align=%u\n",
 439                   first, cur, dev_priv->dma_pages[first].flushed,
 440                   dev_priv->dma_pages[cur].used, pad, align);
 441
 442         /* pad with noops */
 443         if (pad) {
 444                 uint32_t *dma_ptr = (uint32_t *)dev_priv->cmd_dma->handle +
 445                     cur * SAVAGE_DMA_PAGE_SIZE + dev_priv->dma_pages[cur].used;
 446                 dev_priv->dma_pages[cur].used += pad;
 447                 while (pad != 0) {
 448                         *dma_ptr++ = BCI_CMD_WAIT;
 449                         pad--;
 450                 }
 451         }
 452
 453         DRM_MEMORYBARRIER();
 454
 455         /* do flush ... */
 456         phys_addr = dev_priv->cmd_dma->offset +
 457                 (first * SAVAGE_DMA_PAGE_SIZE +
 458                  dev_priv->dma_pages[first].flushed) * 4;
 459         len = (cur - first) * SAVAGE_DMA_PAGE_SIZE +
 460             dev_priv->dma_pages[cur].used - dev_priv->dma_pages[first].flushed;
 461
 462         DRM_DEBUG("phys_addr=%lx, len=%u\n",
 463                   phys_addr | dev_priv->dma_type, len);
 464
 465         BEGIN_BCI(3);
 466         BCI_SET_REGISTERS(SAVAGE_DMABUFADDR, 1);
 467         BCI_WRITE(phys_addr | dev_priv->dma_type);
 468         BCI_DMA(len);
 469
 470         /* fix alignment of the start of the next block */
 471         dev_priv->dma_pages[cur].used += align;
 472
 473         /* age DMA pages */
 474         event = savage_bci_emit_event(dev_priv, 0);
 475         wrap = dev_priv->event_wrap;
 476         for (i = first; i < cur; ++i) {
 477                 SET_AGE(&dev_priv->dma_pages[i].age, event, wrap);
 478                 dev_priv->dma_pages[i].used = 0;
 479                 dev_priv->dma_pages[i].flushed = 0;
 480         }
 481         /* age the current page only when it's full */
 482         if (dev_priv->dma_pages[cur].used == SAVAGE_DMA_PAGE_SIZE) {
 483                 SET_AGE(&dev_priv->dma_pages[cur].age, event, wrap);
 484                 dev_priv->dma_pages[cur].used = 0;
 485                 dev_priv->dma_pages[cur].flushed = 0;
 486                 /* advance to next page */
 487                 cur++;
 488                 if (cur == dev_priv->nr_dma_pages)
 489                         cur = 0;
 490                 dev_priv->first_dma_page = dev_priv->current_dma_page = cur;
 491         } else {
 492                 dev_priv->first_dma_page = cur;
 493                 dev_priv->dma_pages[cur].flushed = dev_priv->dma_pages[i].used;
 494         }
 495         SET_AGE(&dev_priv->last_dma_age, event, wrap);
 496
 497         DRM_DEBUG("first=cur=%u, cur->used=%u, cur->flushed=%u\n", cur,
 498                   dev_priv->dma_pages[cur].used,
 499                   dev_priv->dma_pages[cur].flushed);
 500 }
 501
 502 static void savage_fake_dma_flush(drm_savage_private_t *dev_priv)
 503 {
 504         unsigned int i, j;
 505         BCI_LOCALS;
 506
 507         if (dev_priv->first_dma_page == dev_priv->current_dma_page &&
 508             dev_priv->dma_pages[dev_priv->current_dma_page].used == 0)
 509                 return;
 510
 511         DRM_DEBUG("first=%u, cur=%u, cur->used=%u\n",
 512                   dev_priv->first_dma_page, dev_priv->current_dma_page,
 513                   dev_priv->dma_pages[dev_priv->current_dma_page].used);
 514
 515         for (i = dev_priv->first_dma_page;
 516              i <= dev_priv->current_dma_page && dev_priv->dma_pages[i].used;
 517              ++i) {
 518                 uint32_t *dma_ptr = (uint32_t *)dev_priv->cmd_dma->handle +
 519                         i * SAVAGE_DMA_PAGE_SIZE;
 520 #if SAVAGE_DMA_DEBUG
 521                 /* Sanity check: all pages except the last one must be full. */
 522                 if (i < dev_priv->current_dma_page &&
 523                     dev_priv->dma_pages[i].used != SAVAGE_DMA_PAGE_SIZE) {
 524                         DRM_ERROR("partial DMA page %u: used=%u",
 525                                   i, dev_priv->dma_pages[i].used);
 526                 }
 527 #endif
 528                 BEGIN_BCI(dev_priv->dma_pages[i].used);
 529                 for (j = 0; j < dev_priv->dma_pages[i].used; ++j) {
 530                         BCI_WRITE(dma_ptr[j]);
 531                 }
 532                 dev_priv->dma_pages[i].used = 0;
 533         }
 534
 535         /* reset to first page */
 536         dev_priv->first_dma_page = dev_priv->current_dma_page = 0;
 537 }
 538
 539 int savage_driver_load(struct drm_device *dev, unsigned long chipset)
 540 {
 541         drm_savage_private_t *dev_priv;
 542
 543         dev_priv = drm_alloc(sizeof(drm_savage_private_t), DRM_MEM_DRIVER);
 544         if (dev_priv == NULL)
 545                 return -ENOMEM;
 546
 547         memset(dev_priv, 0, sizeof(drm_savage_private_t));
 548         dev->dev_private = (void *)dev_priv;
 549
 550         dev_priv->chipset = (enum savage_family)chipset;
 551
 552         return 0;
 553 }
 554
 555 /*
 556  * Initalize mappings. On Savage4 and SavageIX the alignment
 557  * and size of the aperture is not suitable for automatic MTRR setup
 558  * in drm_addmap. Therefore we add them manually before the maps are
 559  * initialized, and tear them down on last close.
 560  */
 561 int savage_driver_firstopen(struct drm_device *dev)
 562 {
 563         drm_savage_private_t *dev_priv = dev->dev_private;
 564         unsigned long mmio_base, fb_base, fb_size, aperture_base;
 565         /* fb_rsrc and aper_rsrc aren't really used currently, but still exist
 566          * in case we decide we need information on the BAR for BSD in the
 567          * future.
 568          */
 569 #if 0
 570         unsigned int fb_rsrc, aper_rsrc;
 571 #endif
 572         int ret = 0;
 573
 574         dev_priv->mtrr[0].handle = -1;
 575         dev_priv->mtrr[1].handle = -1;
 576         dev_priv->mtrr[2].handle = -1;
 577         if (S3_SAVAGE3D_SERIES(dev_priv->chipset)) {
 578 #if 0
 579                 fb_rsrc = 0;
 580 #endif
 581                 fb_base = drm_get_resource_start(dev, 0);
 582                 fb_size = SAVAGE_FB_SIZE_S3;
 583                 mmio_base = fb_base + SAVAGE_FB_SIZE_S3;
 584 #if 0
 585                 aper_rsrc = 0;
 586 #endif
 587                 aperture_base = fb_base + SAVAGE_APERTURE_OFFSET;
 588                 /* this should always be true */
 589                 if (drm_get_resource_len(dev, 0) == 0x08000000) {
 590                         /* Don't make MMIO write-cobining! We need 3
 591                          * MTRRs. */
 592                         dev_priv->mtrr[0].base = fb_base;
 593                         dev_priv->mtrr[0].size = 0x01000000;
 594                         dev_priv->mtrr[0].handle =
 595                             drm_mtrr_add(dev_priv->mtrr[0].base,
 596                                          dev_priv->mtrr[0].size, DRM_MTRR_WC);
 597                         dev_priv->mtrr[1].base = fb_base + 0x02000000;
 598                         dev_priv->mtrr[1].size = 0x02000000;
 599                         dev_priv->mtrr[1].handle =
 600                             drm_mtrr_add(dev_priv->mtrr[1].base,
 601                                          dev_priv->mtrr[1].size, DRM_MTRR_WC);
 602                         dev_priv->mtrr[2].base = fb_base + 0x04000000;
 603                         dev_priv->mtrr[2].size = 0x04000000;
 604                         dev_priv->mtrr[2].handle =
 605                             drm_mtrr_add(dev_priv->mtrr[2].base,
 606                                          dev_priv->mtrr[2].size, DRM_MTRR_WC);
 607                 } else {
 608                         DRM_ERROR("strange pci_resource_len %08lx\n",
 609                                   drm_get_resource_len(dev, 0));
 610                 }
 611         } else if (dev_priv->chipset != S3_SUPERSAVAGE &&
 612                    dev_priv->chipset != S3_SAVAGE2000) {
 613                 mmio_base = drm_get_resource_start(dev, 0);
 614 #if 0
 615                 fb_rsrc = 1;
 616 #endif
 617                 fb_base = drm_get_resource_start(dev, 1);
 618                 fb_size = SAVAGE_FB_SIZE_S4;
 619 #if 0
 620                 aper_rsrc = 1;
 621 #endif
 622                 aperture_base = fb_base + SAVAGE_APERTURE_OFFSET;
 623                 /* this should always be true */
 624                 if (drm_get_resource_len(dev, 1) == 0x08000000) {
 625                         /* Can use one MTRR to cover both fb and
 626                          * aperture. */
 627                         dev_priv->mtrr[0].base = fb_base;
 628                         dev_priv->mtrr[0].size = 0x08000000;
 629                         dev_priv->mtrr[0].handle =
 630                             drm_mtrr_add(dev_priv->mtrr[0].base,
 631                                          dev_priv->mtrr[0].size, DRM_MTRR_WC);
 632                 } else {
 633                         DRM_ERROR("strange pci_resource_len %08lx\n",
 634                                   drm_get_resource_len(dev, 1));
 635                 }
 636         } else {
 637                 mmio_base = drm_get_resource_start(dev, 0);
 638 #if 0
 639                 fb_rsrc = 1;
 640 #endif
 641                 fb_base = drm_get_resource_start(dev, 1);
 642                 fb_size = drm_get_resource_len(dev, 1);
 643 #if 0
 644                 aper_rsrc = 2;
 645 #endif
 646                 aperture_base = drm_get_resource_start(dev, 2);
 647                 /* Automatic MTRR setup will do the right thing. */
 648         }
 649
 650         ret = drm_addmap(dev, mmio_base, SAVAGE_MMIO_SIZE, _DRM_REGISTERS,
 651                          _DRM_READ_ONLY, &dev_priv->mmio);
 652         if (ret)
 653                 return ret;
 654
 655         ret = drm_addmap(dev, fb_base, fb_size, _DRM_FRAME_BUFFER,
 656                          _DRM_WRITE_COMBINING, &dev_priv->fb);
 657         if (ret)
 658                 return ret;
 659
 660         ret = drm_addmap(dev, aperture_base, SAVAGE_APERTURE_SIZE,
 661                          _DRM_FRAME_BUFFER, _DRM_WRITE_COMBINING,
 662                          &dev_priv->aperture);
 663
 664         return ret;
 665 }
 666
 667 /*
 668  * Delete MTRRs and free device-private data.
 669  */
 670 void savage_driver_lastclose(struct drm_device *dev)
 671 {
 672         drm_savage_private_t *dev_priv = dev->dev_private;
 673         int i;
 674
 675         for (i = 0; i < 3; ++i)
 676                 if (dev_priv->mtrr[i].handle >= 0)
 677                         drm_mtrr_del(dev_priv->mtrr[i].handle,
 678                                      dev_priv->mtrr[i].base,
 679                                      dev_priv->mtrr[i].size, DRM_MTRR_WC);
 680 }
 681
 682 int savage_driver_unload(struct drm_device *dev)
 683 {
 684         drm_savage_private_t *dev_priv = dev->dev_private;
 685
 686         drm_free(dev_priv, sizeof(drm_savage_private_t), DRM_MEM_DRIVER);
 687
 688         return 0;
 689 }
 690
 691 static int savage_do_init_bci(struct drm_device *dev, drm_savage_init_t *init)
 692 {
 693         drm_savage_private_t *dev_priv = dev->dev_private;
 694
 695         if (init->fb_bpp != 16 && init->fb_bpp != 32) {
 696                 DRM_ERROR("invalid frame buffer bpp %d!\n", init->fb_bpp);
 697                 return -EINVAL;
 698         }
 699         if (init->depth_bpp != 16 && init->depth_bpp != 32) {
 700                 DRM_ERROR("invalid depth buffer bpp %d!\n", init->fb_bpp);
 701                 return -EINVAL;
 702         }
 703         if (init->dma_type != SAVAGE_DMA_AGP &&
 704             init->dma_type != SAVAGE_DMA_PCI) {
 705                 DRM_ERROR("invalid dma memory type %d!\n", init->dma_type);
 706                 return -EINVAL;
 707         }
 708
 709         dev_priv->cob_size = init->cob_size;
 710         dev_priv->bci_threshold_lo = init->bci_threshold_lo;
 711         dev_priv->bci_threshold_hi = init->bci_threshold_hi;
 712         dev_priv->dma_type = init->dma_type;
 713
 714         dev_priv->fb_bpp = init->fb_bpp;
 715         dev_priv->front_offset = init->front_offset;
 716         dev_priv->front_pitch = init->front_pitch;
 717         dev_priv->back_offset = init->back_offset;
 718         dev_priv->back_pitch = init->back_pitch;
 719         dev_priv->depth_bpp = init->depth_bpp;
 720         dev_priv->depth_offset = init->depth_offset;
 721         dev_priv->depth_pitch = init->depth_pitch;
 722
 723         dev_priv->texture_offset = init->texture_offset;
 724         dev_priv->texture_size = init->texture_size;
 725
 726         dev_priv->sarea = drm_getsarea(dev);
 727         if (!dev_priv->sarea) {
 728                 DRM_ERROR("could not find sarea!\n");
 729                 savage_do_cleanup_bci(dev);
 730                 return -EINVAL;
 731         }
 732         if (init->status_offset != 0) {
 733                 dev_priv->status = drm_core_findmap(dev, init->status_offset);
 734                 if (!dev_priv->status) {
 735                         DRM_ERROR("could not find shadow status region!\n");
 736                         savage_do_cleanup_bci(dev);
 737                         return -EINVAL;
 738                 }
 739         } else {
 740                 dev_priv->status = NULL;
 741         }
 742         if (dev_priv->dma_type == SAVAGE_DMA_AGP && init->buffers_offset) {
 743                 dev->agp_buffer_token = init->buffers_offset;
 744                 dev->agp_buffer_map = drm_core_findmap(dev,
 745                                                        init->buffers_offset);
 746                 if (!dev->agp_buffer_map) {
 747                         DRM_ERROR("could not find DMA buffer region!\n");
 748                         savage_do_cleanup_bci(dev);
 749                         return -EINVAL;
 750                 }
 751                 drm_core_ioremap(dev->agp_buffer_map, dev);
 752                 if (!dev->agp_buffer_map) {
 753                         DRM_ERROR("failed to ioremap DMA buffer region!\n");
 754                         savage_do_cleanup_bci(dev);
 755                         return -ENOMEM;
 756                 }
 757         }
 758         if (init->agp_textures_offset) {
 759                 dev_priv->agp_textures =
 760                         drm_core_findmap(dev, init->agp_textures_offset);
 761                 if (!dev_priv->agp_textures) {
 762                         DRM_ERROR("could not find agp texture region!\n");
 763                         savage_do_cleanup_bci(dev);
 764                         return -EINVAL;
 765                 }
 766         } else {
 767                 dev_priv->agp_textures = NULL;
 768         }
 769
 770         if (init->cmd_dma_offset) {
 771                 if (S3_SAVAGE3D_SERIES(dev_priv->chipset)) {
 772                         DRM_ERROR("command DMA not supported on "
 773                                   "Savage3D/MX/IX.\n");
 774                         savage_do_cleanup_bci(dev);
 775                         return -EINVAL;
 776                 }
 777                 if (dev->dma && dev->dma->buflist) {
 778                         DRM_ERROR("command and vertex DMA not supported "
 779                                   "at the same time.\n");
 780                         savage_do_cleanup_bci(dev);
 781                         return -EINVAL;
 782                 }
 783                 dev_priv->cmd_dma = drm_core_findmap(dev, init->cmd_dma_offset);
 784                 if (!dev_priv->cmd_dma) {
 785                         DRM_ERROR("could not find command DMA region!\n");
 786                         savage_do_cleanup_bci(dev);
 787                         return -EINVAL;
 788                 }
 789                 if (dev_priv->dma_type == SAVAGE_DMA_AGP) {
 790                         if (dev_priv->cmd_dma->type != _DRM_AGP) {
 791                                 DRM_ERROR("AGP command DMA region is not a "
 792                                           "_DRM_AGP map!\n");
 793                                 savage_do_cleanup_bci(dev);
 794                                 return -EINVAL;
 795                         }
 796                         drm_core_ioremap(dev_priv->cmd_dma, dev);
 797                         if (!dev_priv->cmd_dma->handle) {
 798                                 DRM_ERROR("failed to ioremap command "
 799                                           "DMA region!\n");
 800                                 savage_do_cleanup_bci(dev);
 801                                 return -ENOMEM;
 802                         }
 803                 } else if (dev_priv->cmd_dma->type != _DRM_CONSISTENT) {
 804                         DRM_ERROR("PCI command DMA region is not a "
 805                                   "_DRM_CONSISTENT map!\n");
 806                         savage_do_cleanup_bci(dev);
 807                         return -EINVAL;
 808                 }
 809         } else {
 810                 dev_priv->cmd_dma = NULL;
 811         }
 812
 813         dev_priv->dma_flush = savage_dma_flush;
 814         if (!dev_priv->cmd_dma) {
 815                 DRM_DEBUG("falling back to faked command DMA.\n");
 816                 dev_priv->fake_dma.offset = 0;
 817                 dev_priv->fake_dma.size = SAVAGE_FAKE_DMA_SIZE;
 818                 dev_priv->fake_dma.type = _DRM_SHM;
 819                 dev_priv->fake_dma.handle = drm_alloc(SAVAGE_FAKE_DMA_SIZE,
 820                                                       DRM_MEM_DRIVER);
 821                 if (!dev_priv->fake_dma.handle) {
 822                         DRM_ERROR("could not allocate faked DMA buffer!\n");
 823                         savage_do_cleanup_bci(dev);
 824                         return -ENOMEM;
 825                 }
 826                 dev_priv->cmd_dma = &dev_priv->fake_dma;
 827                 dev_priv->dma_flush = savage_fake_dma_flush;
 828         }
 829
 830         dev_priv->sarea_priv =
 831                 (drm_savage_sarea_t *)((uint8_t *)dev_priv->sarea->handle +
 832                                        init->sarea_priv_offset);
 833
 834         /* setup bitmap descriptors */
 835         {
 836                 unsigned int color_tile_format;
 837                 unsigned int depth_tile_format;
 838                 unsigned int front_stride, back_stride, depth_stride;
 839                 if (dev_priv->chipset <= S3_SAVAGE4) {
 840                         color_tile_format = dev_priv->fb_bpp == 16 ?
 841                                 SAVAGE_BD_TILE_16BPP : SAVAGE_BD_TILE_32BPP;
 842                         depth_tile_format = dev_priv->depth_bpp == 16 ?
 843                                 SAVAGE_BD_TILE_16BPP : SAVAGE_BD_TILE_32BPP;
 844                 } else {
 845                         color_tile_format = SAVAGE_BD_TILE_DEST;
 846                         depth_tile_format = SAVAGE_BD_TILE_DEST;
 847                 }
 848                 front_stride = dev_priv->front_pitch / (dev_priv->fb_bpp / 8);
 849                 back_stride = dev_priv->back_pitch / (dev_priv->fb_bpp / 8);
 850                 depth_stride =
 851                     dev_priv->depth_pitch / (dev_priv->depth_bpp / 8);
 852
 853                 dev_priv->front_bd = front_stride | SAVAGE_BD_BW_DISABLE |
 854                         (dev_priv->fb_bpp << SAVAGE_BD_BPP_SHIFT) |
 855                         (color_tile_format << SAVAGE_BD_TILE_SHIFT);
 856
 857                 dev_priv-> back_bd =  back_stride | SAVAGE_BD_BW_DISABLE |
 858                         (dev_priv->fb_bpp << SAVAGE_BD_BPP_SHIFT) |
 859                         (color_tile_format << SAVAGE_BD_TILE_SHIFT);
 860
 861                 dev_priv->depth_bd = depth_stride | SAVAGE_BD_BW_DISABLE |
 862                         (dev_priv->depth_bpp << SAVAGE_BD_BPP_SHIFT) |
 863                         (depth_tile_format << SAVAGE_BD_TILE_SHIFT);
 864         }
 865
 866         /* setup status and bci ptr */
 867         dev_priv->event_counter = 0;
 868         dev_priv->event_wrap = 0;
 869         dev_priv->bci_ptr = (volatile uint32_t *)
 870             ((uint8_t *)dev_priv->mmio->handle + SAVAGE_BCI_OFFSET);
 871         if (S3_SAVAGE3D_SERIES(dev_priv->chipset)) {
 872                 dev_priv->status_used_mask = SAVAGE_FIFO_USED_MASK_S3D;
 873         } else {
 874                 dev_priv->status_used_mask = SAVAGE_FIFO_USED_MASK_S4;
 875         }
 876         if (dev_priv->status != NULL) {
 877                 dev_priv->status_ptr =
 878                         (volatile uint32_t *)dev_priv->status->handle;
 879                 dev_priv->wait_fifo = savage_bci_wait_fifo_shadow;
 880                 dev_priv->wait_evnt = savage_bci_wait_event_shadow;
 881                 dev_priv->status_ptr[1023] = dev_priv->event_counter;
 882         } else {
 883                 dev_priv->status_ptr = NULL;
 884                 if (S3_SAVAGE3D_SERIES(dev_priv->chipset)) {
 885                         dev_priv->wait_fifo = savage_bci_wait_fifo_s3d;
 886                 } else {
 887                         dev_priv->wait_fifo = savage_bci_wait_fifo_s4;
 888                 }
 889                 dev_priv->wait_evnt = savage_bci_wait_event_reg;
 890         }
 891
 892         /* cliprect functions */
 893         if (S3_SAVAGE3D_SERIES(dev_priv->chipset))
 894                 dev_priv->emit_clip_rect = savage_emit_clip_rect_s3d;
 895         else
 896                 dev_priv->emit_clip_rect = savage_emit_clip_rect_s4;
 897
 898         if (savage_freelist_init(dev) < 0) {
 899                 DRM_ERROR("could not initialize freelist\n");
 900                 savage_do_cleanup_bci(dev);
 901                 return -ENOMEM;
 902         }
 903
 904         if (savage_dma_init(dev_priv) < 0) {
 905                 DRM_ERROR("could not initialize command DMA\n");
 906                 savage_do_cleanup_bci(dev);
 907                 return -ENOMEM;
 908         }
 909
 910         return 0;
 911 }
 912
 913 static int savage_do_cleanup_bci(struct drm_device *dev)
 914 {
 915         drm_savage_private_t *dev_priv = dev->dev_private;
 916
 917         if (dev_priv->cmd_dma == &dev_priv->fake_dma) {
 918                 if (dev_priv->fake_dma.handle)
 919                         drm_free(dev_priv->fake_dma.handle,
 920                                  SAVAGE_FAKE_DMA_SIZE, DRM_MEM_DRIVER);
 921         } else if (dev_priv->cmd_dma && dev_priv->cmd_dma->handle &&
 922                    dev_priv->cmd_dma->type == _DRM_AGP &&
 923                    dev_priv->dma_type == SAVAGE_DMA_AGP)
 924                 drm_core_ioremapfree(dev_priv->cmd_dma, dev);
 925
 926         if (dev_priv->dma_type == SAVAGE_DMA_AGP &&
 927             dev->agp_buffer_map && dev->agp_buffer_map->handle) {
 928                 drm_core_ioremapfree(dev->agp_buffer_map, dev);
 929                 /* make sure the next instance (which may be running
 930                  * in PCI mode) doesn't try to use an old
 931                  * agp_buffer_map. */
 932                 dev->agp_buffer_map = NULL;
 933         }
 934
 935         if (dev_priv->dma_pages)
 936                 drm_free(dev_priv->dma_pages,
 937                          sizeof(drm_savage_dma_page_t)*dev_priv->nr_dma_pages,
 938                          DRM_MEM_DRIVER);
 939
 940         return 0;
 941 }
 942
 943 static int savage_bci_init(struct drm_device *dev, void *data, struct drm_file *file_priv)
 944 {
 945         drm_savage_init_t *init = data;
 946
 947         LOCK_TEST_WITH_RETURN(dev, file_priv);
 948
 949         switch (init->func) {
 950         case SAVAGE_INIT_BCI:
 951                 return savage_do_init_bci(dev, init);
 952         case SAVAGE_CLEANUP_BCI:
 953                 return savage_do_cleanup_bci(dev);
 954         }
 955
 956         return -EINVAL;
 957 }
 958
 959 static int savage_bci_event_emit(struct drm_device *dev, void *data, struct drm_file *file_priv)
 960 {
 961         drm_savage_private_t *dev_priv = dev->dev_private;
 962         drm_savage_event_emit_t *event = data;
 963
 964         DRM_DEBUG("\n");
 965
 966         LOCK_TEST_WITH_RETURN(dev, file_priv);
 967
 968         event->count = savage_bci_emit_event(dev_priv, event->flags);
 969         event->count |= dev_priv->event_wrap << 16;
 970
 971         return 0;
 972 }
 973
 974 static int savage_bci_event_wait(struct drm_device *dev, void *data, struct drm_file *file_priv)
 975 {
 976         drm_savage_private_t *dev_priv = dev->dev_private;
 977         drm_savage_event_wait_t *event = data;
 978         unsigned int event_e, hw_e;
 979         unsigned int event_w, hw_w;
 980
 981         DRM_DEBUG("\n");
 982
 983         UPDATE_EVENT_COUNTER();
 984         if (dev_priv->status_ptr)
 985                 hw_e = dev_priv->status_ptr[1] & 0xffff;
 986         else
 987                 hw_e = SAVAGE_READ(SAVAGE_STATUS_WORD1) & 0xffff;
 988         hw_w = dev_priv->event_wrap;
 989         if (hw_e > dev_priv->event_counter)
 990                 hw_w--; /* hardware hasn't passed the last wrap yet */
 991
 992         event_e = event->count & 0xffff;
 993         event_w = event->count >> 16;
 994
 995         /* Don't need to wait if
 996          * - event counter wrapped since the event was emitted or
 997          * - the hardware has advanced up to or over the event to wait for.
 998          */
 999         if (event_w < hw_w || (event_w == hw_w && event_e <= hw_e))
1000                 return 0;
1001         else
1002                 return dev_priv->wait_evnt(dev_priv, event_e);
1003 }
1004
1005 /*
1006  * DMA buffer management
1007  */
1008
1009 static int savage_bci_get_buffers(struct drm_device *dev,
1010                                   struct drm_file *file_priv,
1011                                   struct drm_dma *d)
1012 {
1013         struct drm_buf *buf;
1014         int i;
1015
1016         for (i = d->granted_count; i < d->request_count; i++) {
1017                 buf = savage_freelist_get(dev);
1018                 if (!buf)
1019                         return -EAGAIN;
1020
1021                 buf->file_priv = file_priv;
1022
1023                 if (DRM_COPY_TO_USER(&d->request_indices[i],
1024                                      &buf->idx, sizeof(buf->idx)))
1025                         return -EFAULT;
1026                 if (DRM_COPY_TO_USER(&d->request_sizes[i],
1027                                      &buf->total, sizeof(buf->total)))
1028                         return -EFAULT;
1029
1030                 d->granted_count++;
1031         }
1032         return 0;
1033 }
1034
1035 int savage_bci_buffers(struct drm_device *dev, void *data, struct drm_file *file_priv)
1036 {
1037         struct drm_device_dma *dma = dev->dma;
1038         struct drm_dma *d = data;
1039         int ret = 0;
1040
1041         LOCK_TEST_WITH_RETURN(dev, file_priv);
1042
1043         /* Please don't send us buffers.
1044          */
1045         if (d->send_count != 0) {
1046                 DRM_ERROR("Process %d trying to send %d buffers via drmDMA\n",
1047                           DRM_CURRENTPID, d->send_count);
1048                 return -EINVAL;
1049         }
1050
1051         /* We'll send you buffers.
1052          */
1053         if (d->request_count < 0 || d->request_count > dma->buf_count) {
1054                 DRM_ERROR("Process %d trying to get %d buffers (of %d max)\n",
1055                           DRM_CURRENTPID, d->request_count, dma->buf_count);
1056                 return -EINVAL;
1057         }
1058
1059         d->granted_count = 0;
1060
1061         if (d->request_count) {
1062                 ret = savage_bci_get_buffers(dev, file_priv, d);
1063         }
1064
1065         return ret;
1066 }
1067
1068 void savage_reclaim_buffers(struct drm_device *dev, struct drm_file *file_priv)
1069 {
1070         struct drm_device_dma *dma = dev->dma;
1071         drm_savage_private_t *dev_priv = dev->dev_private;
1072         int i;
1073
1074         if (!dma)
1075                 return;
1076         if (!dev_priv)
1077                 return;
1078         if (!dma->buflist)
1079                 return;
1080
1081         for (i = 0; i < dma->buf_count; i++) {
1082                 struct drm_buf *buf = dma->buflist[i];
1083                 drm_savage_buf_priv_t *buf_priv = buf->dev_private;
1084
1085                 if (buf->file_priv == file_priv && buf_priv &&
1086                     buf_priv->next == NULL && buf_priv->prev == NULL) {
1087                         uint16_t event;
1088                         DRM_DEBUG("reclaimed from client\n");
1089                         event = savage_bci_emit_event(dev_priv, SAVAGE_WAIT_3D);
1090                         SET_AGE(&buf_priv->age, event, dev_priv->event_wrap);
1091                         savage_freelist_put(dev, buf);
1092                 }
1093         }
1094
1095         drm_core_reclaim_buffers(dev, file_priv);
1096 }
1097
1098 struct drm_ioctl_desc savage_ioctls[] = {
1099         DRM_IOCTL_DEF(DRM_SAVAGE_BCI_INIT, savage_bci_init, DRM_AUTH|DRM_MASTER|DRM_ROOT_ONLY),
1100         DRM_IOCTL_DEF(DRM_SAVAGE_BCI_CMDBUF, savage_bci_cmdbuf, DRM_AUTH),
1101         DRM_IOCTL_DEF(DRM_SAVAGE_BCI_EVENT_EMIT, savage_bci_event_emit, DRM_AUTH),
1102         DRM_IOCTL_DEF(DRM_SAVAGE_BCI_EVENT_WAIT, savage_bci_event_wait, DRM_AUTH),
1103 };
1104
1105 int savage_max_ioctl = DRM_ARRAY_SIZE(savage_ioctls);