Another terrible hack to leave interrupts disabled until the USB bus
[dragonfly.git] / sys / bus / usb / ohci.c
1 /*
2  * $NetBSD: ohci.c,v 1.138 2003/02/08 03:32:50 ichiro Exp $
3  * $FreeBSD: src/sys/dev/usb/ohci.c,v 1.141 2003/12/22 15:40:10 shiba Exp $
4  * $DragonFly: src/sys/bus/usb/ohci.c,v 1.11 2005/06/10 18:33:04 dillon Exp $
5  */
6 /* Also, already ported:
7  *      $NetBSD: ohci.c,v 1.140 2003/05/13 04:42:00 gson Exp $
8  *      $NetBSD: ohci.c,v 1.141 2003/09/10 20:08:29 mycroft Exp $
9  *      $NetBSD: ohci.c,v 1.142 2003/10/11 03:04:26 toshii Exp $
10  *      $NetBSD: ohci.c,v 1.143 2003/10/18 04:50:35 simonb Exp $
11  *      $NetBSD: 1.144 - 1.150 ported
12  */
13
14 /*
15  * Copyright (c) 1998 The NetBSD Foundation, Inc.
16  * All rights reserved.
17  *
18  * This code is derived from software contributed to The NetBSD Foundation
19  * by Lennart Augustsson (lennart@augustsson.net) at
20  * Carlstedt Research & Technology.
21  *
22  * Redistribution and use in source and binary forms, with or without
23  * modification, are permitted provided that the following conditions
24  * are met:
25  * 1. Redistributions of source code must retain the above copyright
26  *    notice, this list of conditions and the following disclaimer.
27  * 2. Redistributions in binary form must reproduce the above copyright
28  *    notice, this list of conditions and the following disclaimer in the
29  *    documentation and/or other materials provided with the distribution.
30  * 3. All advertising materials mentioning features or use of this software
31  *    must display the following acknowledgement:
32  *        This product includes software developed by the NetBSD
33  *        Foundation, Inc. and its contributors.
34  * 4. Neither the name of The NetBSD Foundation nor the names of its
35  *    contributors may be used to endorse or promote products derived
36  *    from this software without specific prior written permission.
37  *
38  * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
39  * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
40  * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
41  * PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
42  * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
43  * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
44  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
45  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
46  * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
47  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
48  * POSSIBILITY OF SUCH DAMAGE.
49  */
50
51 /*
52  * USB Open Host Controller driver.
53  *
54  * OHCI spec: http://www.compaq.com/productinfo/development/openhci.html
55  * USB spec: http://www.usb.org/developers/docs/usbspec.zip
56  */
57
58 #include <sys/param.h>
59 #include <sys/systm.h>
60 #include <sys/malloc.h>
61 #include <sys/kernel.h>
62 #if defined(__NetBSD__) || defined(__OpenBSD__)
63 #include <sys/device.h>
64 #include <sys/select.h>
65 #elif defined(__FreeBSD__) || defined(__DragonFly__)
66 #include <sys/endian.h>
67 #include <sys/module.h>
68 #include <sys/bus.h>
69 #include <machine/bus_pio.h>
70 #include <machine/bus_memio.h>
71 #if defined(DIAGNOSTIC) && defined(__i386__)
72 #include <machine/cpu.h>
73 #endif
74 #endif
75 #include <sys/proc.h>
76 #include <sys/queue.h>
77 #include <sys/sysctl.h>
78
79 #include <sys/thread2.h>
80
81 #include <machine/bus.h>
82 #include <machine/endian.h>
83
84 #include "usb.h"
85 #include "usbdi.h"
86 #include "usbdivar.h"
87 #include "usb_mem.h"
88 #include "usb_quirks.h"
89
90 #include "ohcireg.h"
91 #include "ohcivar.h"
92
93 #if defined(__FreeBSD__) || defined(__DragonFly__)
94 #include <machine/clock.h>
95
96 #define delay(d)                DELAY(d)
97 #endif
98
99 #if defined(__OpenBSD__)
100 struct cfdriver ohci_cd = {
101         NULL, "ohci", DV_DULL
102 };
103 #endif
104
105 #ifdef USB_DEBUG
106 #define DPRINTF(x)      if (ohcidebug) logprintf x
107 #define DPRINTFN(n,x)   if (ohcidebug>(n)) logprintf x
108 int ohcidebug = 0;
109 SYSCTL_NODE(_hw_usb, OID_AUTO, ohci, CTLFLAG_RW, 0, "USB ohci");
110 SYSCTL_INT(_hw_usb_ohci, OID_AUTO, debug, CTLFLAG_RW,
111            &ohcidebug, 0, "ohci debug level");
112 #ifndef __NetBSD__
113 #define bitmask_snprintf(q,f,b,l) snprintf((b), (l), "%b", (q), (f))
114 #endif
115 #else
116 #define DPRINTF(x)
117 #define DPRINTFN(n,x)
118 #endif
119
120 /*
121  * The OHCI controller is little endian, so on big endian machines
122  * the data strored in memory needs to be swapped.
123  */
124 #if defined(__OpenBSD__)
125 #if BYTE_ORDER == BIG_ENDIAN
126 #define htole32(x) (bswap32(x))
127 #define le32toh(x) (bswap32(x))
128 #else
129 #define htole32(x) (x)
130 #define le32toh(x) (x)
131 #endif
132 #endif
133
134 struct ohci_pipe;
135
136 Static ohci_soft_ed_t  *ohci_alloc_sed(ohci_softc_t *);
137 Static void             ohci_free_sed(ohci_softc_t *, ohci_soft_ed_t *);
138
139 Static ohci_soft_td_t  *ohci_alloc_std(ohci_softc_t *);
140 Static void             ohci_free_std(ohci_softc_t *, ohci_soft_td_t *);
141
142 Static ohci_soft_itd_t *ohci_alloc_sitd(ohci_softc_t *);
143 Static void             ohci_free_sitd(ohci_softc_t *,ohci_soft_itd_t *);
144
145 #if 0
146 Static void             ohci_free_std_chain(ohci_softc_t *, ohci_soft_td_t *,
147                                             ohci_soft_td_t *);
148 #endif
149 Static usbd_status      ohci_alloc_std_chain(struct ohci_pipe *,
150                             ohci_softc_t *, int, int, usbd_xfer_handle,
151                             ohci_soft_td_t *, ohci_soft_td_t **);
152
153 #if defined(__NetBSD__) || defined(__OpenBSD__)
154 Static void             ohci_shutdown(void *v);
155 Static void             ohci_power(int, void *);
156 #endif
157 Static usbd_status      ohci_open(usbd_pipe_handle);
158 Static void             ohci_poll(struct usbd_bus *);
159 Static void             ohci_softintr(void *);
160 Static void             ohci_waitintr(ohci_softc_t *, usbd_xfer_handle);
161 Static void             ohci_add_done(ohci_softc_t *, ohci_physaddr_t);
162 Static void             ohci_rhsc(ohci_softc_t *, usbd_xfer_handle);
163
164 Static usbd_status      ohci_device_request(usbd_xfer_handle xfer);
165 Static void             ohci_add_ed(ohci_soft_ed_t *, ohci_soft_ed_t *);
166 Static void             ohci_rem_ed(ohci_soft_ed_t *, ohci_soft_ed_t *);
167 Static void             ohci_hash_add_td(ohci_softc_t *, ohci_soft_td_t *);
168 Static void             ohci_hash_rem_td(ohci_softc_t *, ohci_soft_td_t *);
169 Static ohci_soft_td_t  *ohci_hash_find_td(ohci_softc_t *, ohci_physaddr_t);
170 Static void             ohci_hash_add_itd(ohci_softc_t *, ohci_soft_itd_t *);
171 Static void             ohci_hash_rem_itd(ohci_softc_t *, ohci_soft_itd_t *);
172 Static ohci_soft_itd_t *ohci_hash_find_itd(ohci_softc_t *, ohci_physaddr_t);
173
174 Static usbd_status      ohci_setup_isoc(usbd_pipe_handle pipe);
175 Static void             ohci_device_isoc_enter(usbd_xfer_handle);
176
177 Static usbd_status      ohci_allocm(struct usbd_bus *, usb_dma_t *, u_int32_t);
178 Static void             ohci_freem(struct usbd_bus *, usb_dma_t *);
179
180 Static usbd_xfer_handle ohci_allocx(struct usbd_bus *);
181 Static void             ohci_freex(struct usbd_bus *, usbd_xfer_handle);
182
183 Static usbd_status      ohci_root_ctrl_transfer(usbd_xfer_handle);
184 Static usbd_status      ohci_root_ctrl_start(usbd_xfer_handle);
185 Static void             ohci_root_ctrl_abort(usbd_xfer_handle);
186 Static void             ohci_root_ctrl_close(usbd_pipe_handle);
187 Static void             ohci_root_ctrl_done(usbd_xfer_handle);
188
189 Static usbd_status      ohci_root_intr_transfer(usbd_xfer_handle);
190 Static usbd_status      ohci_root_intr_start(usbd_xfer_handle);
191 Static void             ohci_root_intr_abort(usbd_xfer_handle);
192 Static void             ohci_root_intr_close(usbd_pipe_handle);
193 Static void             ohci_root_intr_done(usbd_xfer_handle);
194
195 Static usbd_status      ohci_device_ctrl_transfer(usbd_xfer_handle);
196 Static usbd_status      ohci_device_ctrl_start(usbd_xfer_handle);
197 Static void             ohci_device_ctrl_abort(usbd_xfer_handle);
198 Static void             ohci_device_ctrl_close(usbd_pipe_handle);
199 Static void             ohci_device_ctrl_done(usbd_xfer_handle);
200
201 Static usbd_status      ohci_device_bulk_transfer(usbd_xfer_handle);
202 Static usbd_status      ohci_device_bulk_start(usbd_xfer_handle);
203 Static void             ohci_device_bulk_abort(usbd_xfer_handle);
204 Static void             ohci_device_bulk_close(usbd_pipe_handle);
205 Static void             ohci_device_bulk_done(usbd_xfer_handle);
206
207 Static usbd_status      ohci_device_intr_transfer(usbd_xfer_handle);
208 Static usbd_status      ohci_device_intr_start(usbd_xfer_handle);
209 Static void             ohci_device_intr_abort(usbd_xfer_handle);
210 Static void             ohci_device_intr_close(usbd_pipe_handle);
211 Static void             ohci_device_intr_done(usbd_xfer_handle);
212
213 Static usbd_status      ohci_device_isoc_transfer(usbd_xfer_handle);
214 Static usbd_status      ohci_device_isoc_start(usbd_xfer_handle);
215 Static void             ohci_device_isoc_abort(usbd_xfer_handle);
216 Static void             ohci_device_isoc_close(usbd_pipe_handle);
217 Static void             ohci_device_isoc_done(usbd_xfer_handle);
218
219 Static usbd_status      ohci_device_setintr(ohci_softc_t *sc,
220                             struct ohci_pipe *pipe, int ival);
221
222 Static int              ohci_str(usb_string_descriptor_t *, int, const char *);
223
224 Static void             ohci_timeout(void *);
225 Static void             ohci_timeout_task(void *);
226 Static void             ohci_rhsc_able(ohci_softc_t *, int);
227 Static void             ohci_rhsc_enable(void *);
228
229 Static void             ohci_close_pipe(usbd_pipe_handle, ohci_soft_ed_t *);
230 Static void             ohci_abort_xfer(usbd_xfer_handle, usbd_status);
231
232 Static void             ohci_device_clear_toggle(usbd_pipe_handle pipe);
233 Static void             ohci_noop(usbd_pipe_handle pipe);
234
235 Static usbd_status ohci_controller_init(ohci_softc_t *sc);
236
237 #ifdef USB_DEBUG
238 Static void             ohci_dumpregs(ohci_softc_t *);
239 Static void             ohci_dump_tds(ohci_soft_td_t *);
240 Static void             ohci_dump_td(ohci_soft_td_t *);
241 Static void             ohci_dump_ed(ohci_soft_ed_t *);
242 Static void             ohci_dump_itd(ohci_soft_itd_t *);
243 Static void             ohci_dump_itds(ohci_soft_itd_t *);
244 #endif
245
246 #define OBARR(sc) bus_space_barrier((sc)->iot, (sc)->ioh, 0, (sc)->sc_size, \
247                         BUS_SPACE_BARRIER_READ|BUS_SPACE_BARRIER_WRITE)
248 #define OWRITE1(sc, r, x) \
249  do { OBARR(sc); bus_space_write_1((sc)->iot, (sc)->ioh, (r), (x)); } while (0)
250 #define OWRITE2(sc, r, x) \
251  do { OBARR(sc); bus_space_write_2((sc)->iot, (sc)->ioh, (r), (x)); } while (0)
252 #define OWRITE4(sc, r, x) \
253  do { OBARR(sc); bus_space_write_4((sc)->iot, (sc)->ioh, (r), (x)); } while (0)
254 #define OREAD1(sc, r) (OBARR(sc), bus_space_read_1((sc)->iot, (sc)->ioh, (r)))
255 #define OREAD2(sc, r) (OBARR(sc), bus_space_read_2((sc)->iot, (sc)->ioh, (r)))
256 #define OREAD4(sc, r) (OBARR(sc), bus_space_read_4((sc)->iot, (sc)->ioh, (r)))
257
258 /* Reverse the bits in a value 0 .. 31 */
259 Static u_int8_t revbits[OHCI_NO_INTRS] =
260   { 0x00, 0x10, 0x08, 0x18, 0x04, 0x14, 0x0c, 0x1c,
261     0x02, 0x12, 0x0a, 0x1a, 0x06, 0x16, 0x0e, 0x1e,
262     0x01, 0x11, 0x09, 0x19, 0x05, 0x15, 0x0d, 0x1d,
263     0x03, 0x13, 0x0b, 0x1b, 0x07, 0x17, 0x0f, 0x1f };
264
265 struct ohci_pipe {
266         struct usbd_pipe pipe;
267         ohci_soft_ed_t *sed;
268         u_int32_t aborting;
269         union {
270                 ohci_soft_td_t *td;
271                 ohci_soft_itd_t *itd;
272         } tail;
273         /* Info needed for different pipe kinds. */
274         union {
275                 /* Control pipe */
276                 struct {
277                         usb_dma_t reqdma;
278                         u_int length;
279                         ohci_soft_td_t *setup, *data, *stat;
280                 } ctl;
281                 /* Interrupt pipe */
282                 struct {
283                         int nslots;
284                         int pos;
285                 } intr;
286                 /* Bulk pipe */
287                 struct {
288                         u_int length;
289                         int isread;
290                 } bulk;
291                 /* Iso pipe */
292                 struct iso {
293                         int next, inuse;
294                 } iso;
295         } u;
296 };
297
298 #define OHCI_INTR_ENDPT 1
299
300 Static struct usbd_bus_methods ohci_bus_methods = {
301         ohci_open,
302         ohci_softintr,
303         ohci_poll,
304         ohci_allocm,
305         ohci_freem,
306         ohci_allocx,
307         ohci_freex,
308 };
309
310 Static struct usbd_pipe_methods ohci_root_ctrl_methods = {
311         ohci_root_ctrl_transfer,
312         ohci_root_ctrl_start,
313         ohci_root_ctrl_abort,
314         ohci_root_ctrl_close,
315         ohci_noop,
316         ohci_root_ctrl_done,
317 };
318
319 Static struct usbd_pipe_methods ohci_root_intr_methods = {
320         ohci_root_intr_transfer,
321         ohci_root_intr_start,
322         ohci_root_intr_abort,
323         ohci_root_intr_close,
324         ohci_noop,
325         ohci_root_intr_done,
326 };
327
328 Static struct usbd_pipe_methods ohci_device_ctrl_methods = {
329         ohci_device_ctrl_transfer,
330         ohci_device_ctrl_start,
331         ohci_device_ctrl_abort,
332         ohci_device_ctrl_close,
333         ohci_noop,
334         ohci_device_ctrl_done,
335 };
336
337 Static struct usbd_pipe_methods ohci_device_intr_methods = {
338         ohci_device_intr_transfer,
339         ohci_device_intr_start,
340         ohci_device_intr_abort,
341         ohci_device_intr_close,
342         ohci_device_clear_toggle,
343         ohci_device_intr_done,
344 };
345
346 Static struct usbd_pipe_methods ohci_device_bulk_methods = {
347         ohci_device_bulk_transfer,
348         ohci_device_bulk_start,
349         ohci_device_bulk_abort,
350         ohci_device_bulk_close,
351         ohci_device_clear_toggle,
352         ohci_device_bulk_done,
353 };
354
355 Static struct usbd_pipe_methods ohci_device_isoc_methods = {
356         ohci_device_isoc_transfer,
357         ohci_device_isoc_start,
358         ohci_device_isoc_abort,
359         ohci_device_isoc_close,
360         ohci_noop,
361         ohci_device_isoc_done,
362 };
363
364 #if defined(__NetBSD__) || defined(__OpenBSD__)
365 int
366 ohci_activate(device_ptr_t self, enum devact act)
367 {
368         struct ohci_softc *sc = (struct ohci_softc *)self;
369         int rv = 0;
370
371         switch (act) {
372         case DVACT_ACTIVATE:
373                 return (EOPNOTSUPP);
374
375         case DVACT_DEACTIVATE:
376                 if (sc->sc_child != NULL)
377                         rv = config_deactivate(sc->sc_child);
378                 sc->sc_dying = 1;
379                 break;
380         }
381         return (rv);
382 }
383
384 int
385 ohci_detach(struct ohci_softc *sc, int flags)
386 {
387         int rv = 0;
388
389         if (sc->sc_child != NULL)
390                 rv = config_detach(sc->sc_child, flags);
391
392         if (rv != 0)
393                 return (rv);
394
395         usb_uncallout(sc->sc_tmo_rhsc, ohci_rhsc_enable, sc);
396
397 #if defined(__NetBSD__) || defined(__OpenBSD__)
398         powerhook_disestablish(sc->sc_powerhook);
399         shutdownhook_disestablish(sc->sc_shutdownhook);
400 #endif
401
402         usb_delay_ms(&sc->sc_bus, 300); /* XXX let stray task complete */
403
404         /* free data structures XXX */
405
406         return (rv);
407 }
408 #endif
409
410 ohci_soft_ed_t *
411 ohci_alloc_sed(ohci_softc_t *sc)
412 {
413         ohci_soft_ed_t *sed;
414         usbd_status err;
415         int i, offs;
416         usb_dma_t dma;
417
418         if (sc->sc_freeeds == NULL) {
419                 DPRINTFN(2, ("ohci_alloc_sed: allocating chunk\n"));
420                 err = usb_allocmem(&sc->sc_bus, OHCI_SED_SIZE * OHCI_SED_CHUNK,
421                           OHCI_ED_ALIGN, &dma);
422                 if (err)
423                         return (NULL);
424                 for(i = 0; i < OHCI_SED_CHUNK; i++) {
425                         offs = i * OHCI_SED_SIZE;
426                         sed = KERNADDR(&dma, offs);
427                         sed->physaddr = DMAADDR(&dma, offs);
428                         sed->next = sc->sc_freeeds;
429                         sc->sc_freeeds = sed;
430                 }
431         }
432         sed = sc->sc_freeeds;
433         sc->sc_freeeds = sed->next;
434         memset(&sed->ed, 0, sizeof(ohci_ed_t));
435         sed->next = 0;
436         return (sed);
437 }
438
439 void
440 ohci_free_sed(ohci_softc_t *sc, ohci_soft_ed_t *sed)
441 {
442         sed->next = sc->sc_freeeds;
443         sc->sc_freeeds = sed;
444 }
445
446 ohci_soft_td_t *
447 ohci_alloc_std(ohci_softc_t *sc)
448 {
449         ohci_soft_td_t *std;
450         usbd_status err;
451         int i, offs;
452         usb_dma_t dma;
453
454         if (sc->sc_freetds == NULL) {
455                 DPRINTFN(2, ("ohci_alloc_std: allocating chunk\n"));
456                 err = usb_allocmem(&sc->sc_bus, OHCI_STD_SIZE * OHCI_STD_CHUNK,
457                           OHCI_TD_ALIGN, &dma);
458                 if (err)
459                         return (NULL);
460                 crit_enter();
461                 for(i = 0; i < OHCI_STD_CHUNK; i++) {
462                         offs = i * OHCI_STD_SIZE;
463                         std = KERNADDR(&dma, offs);
464                         std->physaddr = DMAADDR(&dma, offs);
465                         std->nexttd = sc->sc_freetds;
466                         sc->sc_freetds = std;
467                 }
468                 crit_exit();
469         }
470
471         crit_enter();
472         std = sc->sc_freetds;
473         sc->sc_freetds = std->nexttd;
474         memset(&std->td, 0, sizeof(ohci_td_t));
475         std->nexttd = NULL;
476         std->xfer = NULL;
477         ohci_hash_add_td(sc, std);
478         crit_exit();
479
480         return (std);
481 }
482
483 void
484 ohci_free_std(ohci_softc_t *sc, ohci_soft_td_t *std)
485 {
486         crit_enter();
487         ohci_hash_rem_td(sc, std);
488         std->nexttd = sc->sc_freetds;
489         sc->sc_freetds = std;
490         crit_exit();
491 }
492
493 usbd_status
494 ohci_alloc_std_chain(struct ohci_pipe *opipe, ohci_softc_t *sc,
495                      int alen, int rd, usbd_xfer_handle xfer,
496                      ohci_soft_td_t *sp, ohci_soft_td_t **ep)
497 {
498         ohci_soft_td_t *next, *cur;
499         ohci_physaddr_t dataphys;
500         u_int32_t tdflags;
501         int offset = 0;
502         int len, curlen;
503         usb_dma_t *dma = &xfer->dmabuf;
504         u_int16_t flags = xfer->flags;
505
506         DPRINTFN(alen < 4096,("ohci_alloc_std_chain: start len=%d\n", alen));
507
508         len = alen;
509         cur = sp;
510
511         tdflags = htole32(
512             (rd ? OHCI_TD_IN : OHCI_TD_OUT) |
513             (flags & USBD_SHORT_XFER_OK ? OHCI_TD_R : 0) |
514             OHCI_TD_NOCC | OHCI_TD_TOGGLE_CARRY | OHCI_TD_NOINTR);
515
516         for (;;) {
517                 next = ohci_alloc_std(sc);
518                 if (next == NULL)
519                         goto nomem;
520
521                 dataphys = DMAADDR(dma, offset);
522
523                 /*
524                  * The OHCI hardware can handle at most one 4k crossing.
525                  * XXX - currently we only allocate contigous buffers, but
526                  * the OHCI spec says: If during the data transfer the buffer
527                  * address contained in the HC's working copy of
528                  * CurrentBufferPointer crosses a 4K boundary, the upper 20
529                  * bits of Buffer End are copied to the working value of
530                  * CurrentBufferPointer causing the next buffer address to
531                  * be the 0th byte in the same 4K page that contains the
532                  * last byte of the buffer (the 4K boundary crossing may
533                  * occur within a data packet transfer.)
534                  *
535                  * If/when dma has multiple segments, this will need to
536                  * properly handle fragmenting TD's.
537                  *
538                  * We can describe the above using maxsegsz = 4k and nsegs = 2
539                  * in the future.
540                  */
541                 if (OHCI_PAGE(dataphys) == OHCI_PAGE(DMAADDR(dma, offset +
542                     len - 1)) || len - (OHCI_PAGE_SIZE -
543                     OHCI_PAGE_OFFSET(dataphys)) <= OHCI_PAGE_SIZE) {
544                         /* we can handle it in this TD */
545                         curlen = len;
546                 } else {
547                         /* XXX The calculation below is wrong and could
548                          * result in a packet that is not a multiple of the
549                          * MaxPacketSize in the case where the buffer does not
550                          * start on an appropriate address (like for example in
551                          * the case of an mbuf cluster). You'll get an early
552                          * short packet.
553                          */
554                         /* must use multiple TDs, fill as much as possible. */
555                         curlen = 2 * OHCI_PAGE_SIZE -
556                                  OHCI_PAGE_OFFSET(dataphys);
557                         /* the length must be a multiple of the max size */
558                         curlen -= curlen %
559                             UGETW(opipe->pipe.endpoint->edesc->wMaxPacketSize);
560 #ifdef DIAGNOSTIC
561                         if (curlen == 0)
562                                 panic("ohci_alloc_std: curlen == 0");
563 #endif
564                 }
565                 DPRINTFN(4,("ohci_alloc_std_chain: dataphys=0x%08x "
566                             "len=%d curlen=%d\n",
567                             dataphys, len, curlen));
568                 len -= curlen;
569
570                 cur->td.td_flags = tdflags;
571                 cur->td.td_cbp = htole32(dataphys);
572                 cur->nexttd = next;
573                 cur->td.td_nexttd = htole32(next->physaddr);
574                 cur->td.td_be = htole32(DMAADDR(dma, offset + curlen - 1));
575                 cur->len = curlen;
576                 cur->flags = OHCI_ADD_LEN;
577                 cur->xfer = xfer;
578                 DPRINTFN(10,("ohci_alloc_std_chain: cbp=0x%08x be=0x%08x\n",
579                             dataphys, dataphys + curlen - 1));
580                 if (len == 0)
581                         break;
582                 if (len < 0)
583                         panic("Length went negative: %d curlen %d dma %p offset %08x", len, curlen, dma, (int)0);
584
585                 DPRINTFN(10,("ohci_alloc_std_chain: extend chain\n"));
586                 offset += curlen;
587                 cur = next;
588         }
589         if ((flags & USBD_FORCE_SHORT_XFER) &&
590             alen % UGETW(opipe->pipe.endpoint->edesc->wMaxPacketSize) == 0) {
591                 /* Force a 0 length transfer at the end. */
592
593                 cur = next;
594
595                 next = ohci_alloc_std(sc);
596                 if (next == NULL)
597                         goto nomem;
598
599                 cur->td.td_flags = tdflags;
600                 cur->td.td_cbp = 0; /* indicate 0 length packet */
601                 cur->nexttd = next;
602                 cur->td.td_nexttd = htole32(next->physaddr);
603                 cur->td.td_be = ~0;
604                 cur->len = 0;
605                 cur->flags = 0;
606                 cur->xfer = xfer;
607                 DPRINTFN(2,("ohci_alloc_std_chain: add 0 xfer\n"));
608         }
609         *ep = cur;
610
611         return (USBD_NORMAL_COMPLETION);
612
613  nomem:
614         /* XXX free chain */
615         return (USBD_NOMEM);
616 }
617
618 #if 0
619 Static void
620 ohci_free_std_chain(ohci_softc_t *sc, ohci_soft_td_t *std,
621                     ohci_soft_td_t *stdend)
622 {
623         ohci_soft_td_t *p;
624
625         for (; std != stdend; std = p) {
626                 p = std->nexttd;
627                 ohci_free_std(sc, std);
628         }
629 }
630 #endif
631
632 ohci_soft_itd_t *
633 ohci_alloc_sitd(ohci_softc_t *sc)
634 {
635         ohci_soft_itd_t *sitd;
636         usbd_status err;
637         int i, offs;
638         usb_dma_t dma;
639
640         if (sc->sc_freeitds == NULL) {
641                 DPRINTFN(2, ("ohci_alloc_sitd: allocating chunk\n"));
642                 err = usb_allocmem(&sc->sc_bus, OHCI_SITD_SIZE * OHCI_SITD_CHUNK,
643                           OHCI_ITD_ALIGN, &dma);
644                 if (err)
645                         return (NULL);
646                 crit_enter();
647                 for(i = 0; i < OHCI_SITD_CHUNK; i++) {
648                         offs = i * OHCI_SITD_SIZE;
649                         sitd = KERNADDR(&dma, offs);
650                         sitd->physaddr = DMAADDR(&dma, offs);
651                         sitd->nextitd = sc->sc_freeitds;
652                         sc->sc_freeitds = sitd;
653                 }
654                 crit_exit();
655         }
656
657         crit_enter();
658         sitd = sc->sc_freeitds;
659         sc->sc_freeitds = sitd->nextitd;
660         memset(&sitd->itd, 0, sizeof(ohci_itd_t));
661         sitd->nextitd = NULL;
662         sitd->xfer = NULL;
663         ohci_hash_add_itd(sc, sitd);
664         crit_exit();
665
666 #ifdef DIAGNOSTIC
667         sitd->isdone = 0;
668 #endif
669
670         return (sitd);
671 }
672
673 void
674 ohci_free_sitd(ohci_softc_t *sc, ohci_soft_itd_t *sitd)
675 {
676         DPRINTFN(10,("ohci_free_sitd: sitd=%p\n", sitd));
677
678 #ifdef DIAGNOSTIC
679         if (!sitd->isdone) {
680                 panic("ohci_free_sitd: sitd=%p not done", sitd);
681                 return;
682         }
683         /* Warn double free */
684         sitd->isdone = 0;
685 #endif
686
687         crit_enter();
688         ohci_hash_rem_itd(sc, sitd);
689         sitd->nextitd = sc->sc_freeitds;
690         sc->sc_freeitds = sitd;
691         crit_exit();
692 }
693
694 usbd_status
695 ohci_init(ohci_softc_t *sc)
696 {
697         ohci_soft_ed_t *sed, *psed;
698         usbd_status err;
699         int i;
700         u_int32_t rev;
701
702         DPRINTF(("ohci_init: start\n"));
703 #if defined(__OpenBSD__)
704         printf(",");
705 #else
706         printf("%s:", USBDEVNAME(sc->sc_bus.bdev));
707 #endif
708         rev = OREAD4(sc, OHCI_REVISION);
709         printf(" OHCI version %d.%d%s\n", OHCI_REV_HI(rev), OHCI_REV_LO(rev),
710                OHCI_REV_LEGACY(rev) ? ", legacy support" : "");
711
712         if (OHCI_REV_HI(rev) != 1 || OHCI_REV_LO(rev) != 0) {
713                 printf("%s: unsupported OHCI revision\n",
714                        USBDEVNAME(sc->sc_bus.bdev));
715                 sc->sc_bus.usbrev = USBREV_UNKNOWN;
716                 return (USBD_INVAL);
717         }
718         sc->sc_bus.usbrev = USBREV_1_0;
719
720         for (i = 0; i < OHCI_HASH_SIZE; i++)
721                 LIST_INIT(&sc->sc_hash_tds[i]);
722         for (i = 0; i < OHCI_HASH_SIZE; i++)
723                 LIST_INIT(&sc->sc_hash_itds[i]);
724
725         SIMPLEQ_INIT(&sc->sc_free_xfers);
726
727         /* XXX determine alignment by R/W */
728         /* Allocate the HCCA area. */
729         err = usb_allocmem(&sc->sc_bus, OHCI_HCCA_SIZE,
730                          OHCI_HCCA_ALIGN, &sc->sc_hccadma);
731         if (err)
732                 return (err);
733         sc->sc_hcca = KERNADDR(&sc->sc_hccadma, 0);
734         memset(sc->sc_hcca, 0, OHCI_HCCA_SIZE);
735
736         sc->sc_eintrs = OHCI_NORMAL_INTRS;
737
738         /* Allocate dummy ED that starts the control list. */
739         sc->sc_ctrl_head = ohci_alloc_sed(sc);
740         if (sc->sc_ctrl_head == NULL) {
741                 err = USBD_NOMEM;
742                 goto bad1;
743         }
744         sc->sc_ctrl_head->ed.ed_flags |= htole32(OHCI_ED_SKIP);
745
746         /* Allocate dummy ED that starts the bulk list. */
747         sc->sc_bulk_head = ohci_alloc_sed(sc);
748         if (sc->sc_bulk_head == NULL) {
749                 err = USBD_NOMEM;
750                 goto bad2;
751         }
752         sc->sc_bulk_head->ed.ed_flags |= htole32(OHCI_ED_SKIP);
753
754         /* Allocate dummy ED that starts the isochronous list. */
755         sc->sc_isoc_head = ohci_alloc_sed(sc);
756         if (sc->sc_isoc_head == NULL) {
757                 err = USBD_NOMEM;
758                 goto bad3;
759         }
760         sc->sc_isoc_head->ed.ed_flags |= htole32(OHCI_ED_SKIP);
761
762         /* Allocate all the dummy EDs that make up the interrupt tree. */
763         for (i = 0; i < OHCI_NO_EDS; i++) {
764                 sed = ohci_alloc_sed(sc);
765                 if (sed == NULL) {
766                         while (--i >= 0)
767                                 ohci_free_sed(sc, sc->sc_eds[i]);
768                         err = USBD_NOMEM;
769                         goto bad4;
770                 }
771                 /* All ED fields are set to 0. */
772                 sc->sc_eds[i] = sed;
773                 sed->ed.ed_flags |= htole32(OHCI_ED_SKIP);
774                 if (i != 0)
775                         psed = sc->sc_eds[(i-1) / 2];
776                 else
777                         psed= sc->sc_isoc_head;
778                 sed->next = psed;
779                 sed->ed.ed_nexted = htole32(psed->physaddr);
780         }
781         /*
782          * Fill HCCA interrupt table.  The bit reversal is to get
783          * the tree set up properly to spread the interrupts.
784          */
785         for (i = 0; i < OHCI_NO_INTRS; i++)
786                 sc->sc_hcca->hcca_interrupt_table[revbits[i]] =
787                     htole32(sc->sc_eds[OHCI_NO_EDS-OHCI_NO_INTRS+i]->physaddr);
788
789 #ifdef USB_DEBUG
790         if (ohcidebug > 15) {
791                 for (i = 0; i < OHCI_NO_EDS; i++) {
792                         printf("ed#%d ", i);
793                         ohci_dump_ed(sc->sc_eds[i]);
794                 }
795                 printf("iso ");
796                 ohci_dump_ed(sc->sc_isoc_head);
797         }
798 #endif
799
800         err = ohci_controller_init(sc);
801         if (err != USBD_NORMAL_COMPLETION)
802                 goto bad5;
803
804         /* Set up the bus struct. */
805         sc->sc_bus.methods = &ohci_bus_methods;
806         sc->sc_bus.pipe_size = sizeof(struct ohci_pipe);
807
808 #if defined(__NetBSD__) || defined(__OpenBSD__)
809         sc->sc_control = sc->sc_intre = 0;
810         sc->sc_powerhook = powerhook_establish(ohci_power, sc);
811         sc->sc_shutdownhook = shutdownhook_establish(ohci_shutdown, sc);
812 #endif
813
814         usb_callout_init(sc->sc_tmo_rhsc);
815
816         return (USBD_NORMAL_COMPLETION);
817
818  bad5:
819         for (i = 0; i < OHCI_NO_EDS; i++)
820                 ohci_free_sed(sc, sc->sc_eds[i]);
821  bad4:
822         ohci_free_sed(sc, sc->sc_isoc_head);
823  bad3:
824         ohci_free_sed(sc, sc->sc_bulk_head);
825  bad2:
826         ohci_free_sed(sc, sc->sc_ctrl_head);
827  bad1:
828         usb_freemem(&sc->sc_bus, &sc->sc_hccadma);
829         return (err);
830 }
831
832 void
833 ohci_init_intrs(ohci_softc_t *sc)
834 {
835         OWRITE4(sc, OHCI_INTERRUPT_ENABLE, sc->sc_eintrs | OHCI_MIE);
836 }
837
838 Static usbd_status
839 ohci_controller_init(ohci_softc_t *sc)
840 {
841         int i;
842         u_int32_t s, ctl, ival, hcr, fm, per, desca;
843
844         /* Determine in what context we are running. */
845         ctl = OREAD4(sc, OHCI_CONTROL);
846         if (ctl & OHCI_IR) {
847                 /* SMM active, request change */
848                 DPRINTF(("ohci_init: SMM active, request owner change\n"));
849                 s = OREAD4(sc, OHCI_COMMAND_STATUS);
850                 OWRITE4(sc, OHCI_COMMAND_STATUS, s | OHCI_OCR);
851                 for (i = 0; i < 100 && (ctl & OHCI_IR); i++) {
852                         usb_delay_ms(&sc->sc_bus, 1);
853                         ctl = OREAD4(sc, OHCI_CONTROL);
854                 }
855                 if ((ctl & OHCI_IR) == 0) {
856                         printf("%s: SMM does not respond, resetting\n",
857                                USBDEVNAME(sc->sc_bus.bdev));
858                         OWRITE4(sc, OHCI_CONTROL, OHCI_HCFS_RESET);
859                         goto reset;
860                 }
861 #if 0
862 /* Don't bother trying to reuse the BIOS init, we'll reset it anyway. */
863         } else if ((ctl & OHCI_HCFS_MASK) != OHCI_HCFS_RESET) {
864                 /* BIOS started controller. */
865                 DPRINTF(("ohci_init: BIOS active\n"));
866                 if ((ctl & OHCI_HCFS_MASK) != OHCI_HCFS_OPERATIONAL) {
867                         OWRITE4(sc, OHCI_CONTROL, OHCI_HCFS_OPERATIONAL);
868                         usb_delay_ms(&sc->sc_bus, USB_RESUME_DELAY);
869                 }
870 #endif
871         } else {
872                 DPRINTF(("ohci_init: cold started\n"));
873         reset:
874                 /* Controller was cold started. */
875                 usb_delay_ms(&sc->sc_bus, USB_BUS_RESET_DELAY);
876         }
877
878         /*
879          * This reset should not be necessary according to the OHCI spec, but
880          * without it some controllers do not start.
881          */
882         DPRINTF(("%s: resetting\n", USBDEVNAME(sc->sc_bus.bdev)));
883         OWRITE4(sc, OHCI_CONTROL, OHCI_HCFS_RESET);
884         usb_delay_ms(&sc->sc_bus, USB_BUS_RESET_DELAY);
885
886         /* We now own the host controller and the bus has been reset. */
887         ival = OHCI_GET_IVAL(OREAD4(sc, OHCI_FM_INTERVAL));
888
889         OWRITE4(sc, OHCI_COMMAND_STATUS, OHCI_HCR); /* Reset HC */
890         /* Nominal time for a reset is 10 us. */
891         for (i = 0; i < 10; i++) {
892                 delay(10);
893                 hcr = OREAD4(sc, OHCI_COMMAND_STATUS) & OHCI_HCR;
894                 if (!hcr)
895                         break;
896         }
897         if (hcr) {
898                 printf("%s: reset timeout\n", USBDEVNAME(sc->sc_bus.bdev));
899                 return (USBD_IOERROR);
900         }
901 #ifdef USB_DEBUG
902         if (ohcidebug > 15)
903                 ohci_dumpregs(sc);
904 #endif
905
906         /* The controller is now in SUSPEND state, we have 2ms to finish. */
907
908         /* Set up HC registers. */
909         OWRITE4(sc, OHCI_HCCA, DMAADDR(&sc->sc_hccadma, 0));
910         OWRITE4(sc, OHCI_CONTROL_HEAD_ED, sc->sc_ctrl_head->physaddr);
911         OWRITE4(sc, OHCI_BULK_HEAD_ED, sc->sc_bulk_head->physaddr);
912
913         /*
914          * disable all interrupts to avoid events while we are initializing
915          * the device.
916          */
917         OWRITE4(sc, OHCI_INTERRUPT_DISABLE, OHCI_ALL_INTRS);
918         /* switch on desired functional features */
919         ctl = OREAD4(sc, OHCI_CONTROL);
920         ctl &= ~(OHCI_CBSR_MASK | OHCI_LES | OHCI_HCFS_MASK | OHCI_IR);
921         ctl |= OHCI_PLE | OHCI_IE | OHCI_CLE | OHCI_BLE |
922                 OHCI_RATIO_1_4 | OHCI_HCFS_OPERATIONAL;
923         /* And finally start it! */
924         OWRITE4(sc, OHCI_CONTROL, ctl);
925
926         /*
927          * The controller is now OPERATIONAL.  Set a some final
928          * registers that should be set earlier, but that the
929          * controller ignores when in the SUSPEND state.
930          */
931         fm = (OREAD4(sc, OHCI_FM_INTERVAL) & OHCI_FIT) ^ OHCI_FIT;
932         fm |= OHCI_FSMPS(ival) | ival;
933         OWRITE4(sc, OHCI_FM_INTERVAL, fm);
934         per = OHCI_PERIODIC(ival); /* 90% periodic */
935         OWRITE4(sc, OHCI_PERIODIC_START, per);
936
937         /* Fiddle the No OverCurrent Protection bit to avoid chip bug. */
938         desca = OREAD4(sc, OHCI_RH_DESCRIPTOR_A);
939         OWRITE4(sc, OHCI_RH_DESCRIPTOR_A, desca | OHCI_NOCP);
940         OWRITE4(sc, OHCI_RH_STATUS, OHCI_LPSC); /* Enable port power */
941         usb_delay_ms(&sc->sc_bus, OHCI_ENABLE_POWER_DELAY);
942         OWRITE4(sc, OHCI_RH_DESCRIPTOR_A, desca);
943
944         /*
945          * The AMD756 requires a delay before re-reading the register,
946          * otherwise it will occasionally report 0 ports.
947          */
948         sc->sc_noport = 0;
949         for (i = 0; i < 10 && sc->sc_noport == 0; i++) {
950                 usb_delay_ms(&sc->sc_bus, OHCI_READ_DESC_DELAY);
951                 sc->sc_noport = OHCI_GET_NDP(OREAD4(sc, OHCI_RH_DESCRIPTOR_A));
952         }
953
954 #ifdef USB_DEBUG
955         if (ohcidebug > 5)
956                 ohci_dumpregs(sc);
957 #endif
958         return (USBD_NORMAL_COMPLETION);
959 }
960
961 usbd_status
962 ohci_allocm(struct usbd_bus *bus, usb_dma_t *dma, u_int32_t size)
963 {
964         return (usb_allocmem(bus, size, 0, dma));
965 }
966
967 void
968 ohci_freem(struct usbd_bus *bus, usb_dma_t *dma)
969 {
970         usb_freemem(bus, dma);
971 }
972
973 usbd_xfer_handle
974 ohci_allocx(struct usbd_bus *bus)
975 {
976         struct ohci_softc *sc = (struct ohci_softc *)bus;
977         usbd_xfer_handle xfer;
978
979         xfer = SIMPLEQ_FIRST(&sc->sc_free_xfers);
980         if (xfer != NULL) {
981                 SIMPLEQ_REMOVE_HEAD(&sc->sc_free_xfers, next);
982 #ifdef DIAGNOSTIC
983                 if (xfer->busy_free != XFER_FREE) {
984                         printf("ohci_allocx: xfer=%p not free, 0x%08x\n", xfer,
985                                xfer->busy_free);
986                 }
987 #endif
988         } else {
989                 xfer = malloc(sizeof(struct ohci_xfer), M_USB, M_INTWAIT);
990         }
991         if (xfer != NULL) {
992                 memset(xfer, 0, sizeof (struct ohci_xfer));
993 #ifdef DIAGNOSTIC
994                 xfer->busy_free = XFER_BUSY;
995 #endif
996         }
997         return (xfer);
998 }
999
1000 void
1001 ohci_freex(struct usbd_bus *bus, usbd_xfer_handle xfer)
1002 {
1003         struct ohci_softc *sc = (struct ohci_softc *)bus;
1004         struct ohci_xfer *oxfer = (struct ohci_xfer *)xfer;
1005         ohci_soft_itd_t *sitd;
1006
1007         if (oxfer->ohci_xfer_flags & OHCI_ISOC_DIRTY) {
1008                 for (sitd = xfer->hcpriv; sitd != NULL && sitd->xfer == xfer;
1009                     sitd = sitd->nextitd)
1010                         ohci_free_sitd(sc, sitd);
1011         }
1012
1013 #ifdef DIAGNOSTIC
1014         if (xfer->busy_free != XFER_BUSY) {
1015                 printf("ohci_freex: xfer=%p not busy, 0x%08x\n", xfer,
1016                        xfer->busy_free);
1017                 return;
1018         }
1019         xfer->busy_free = XFER_FREE;
1020 #endif
1021         SIMPLEQ_INSERT_HEAD(&sc->sc_free_xfers, xfer, next);
1022 }
1023
1024 /*
1025  * Shut down the controller when the system is going down.
1026  */
1027 void
1028 ohci_shutdown(void *v)
1029 {
1030         ohci_softc_t *sc = v;
1031
1032         DPRINTF(("ohci_shutdown: stopping the HC\n"));
1033         OWRITE4(sc, OHCI_CONTROL, OHCI_HCFS_RESET);
1034 }
1035
1036 /*
1037  * Handle suspend/resume.
1038  *
1039  * We need to switch to polling mode here, because this routine is
1040  * called from an intterupt context.  This is all right since we
1041  * are almost suspended anyway.
1042  */
1043 void
1044 ohci_power(int why, void *v)
1045 {
1046         ohci_softc_t *sc = v;
1047         u_int32_t ctl;
1048
1049 #ifdef USB_DEBUG
1050         DPRINTF(("ohci_power: sc=%p, why=%d\n", sc, why));
1051         ohci_dumpregs(sc);
1052 #endif
1053
1054         crit_enter();
1055         if (why != PWR_RESUME) {
1056                 sc->sc_bus.use_polling++;
1057                 ctl = OREAD4(sc, OHCI_CONTROL) & ~OHCI_HCFS_MASK;
1058                 if (sc->sc_control == 0) {
1059                         /*
1060                          * Preserve register values, in case that APM BIOS
1061                          * does not recover them.
1062                          */
1063                         sc->sc_control = ctl;
1064                         sc->sc_intre = OREAD4(sc, OHCI_INTERRUPT_ENABLE);
1065                 }
1066                 ctl |= OHCI_HCFS_SUSPEND;
1067                 OWRITE4(sc, OHCI_CONTROL, ctl);
1068                 usb_delay_ms(&sc->sc_bus, USB_RESUME_WAIT);
1069                 sc->sc_bus.use_polling--;
1070         } else {
1071                 sc->sc_bus.use_polling++;
1072
1073                 /* Some broken BIOSes never initialize Controller chip */
1074                 ohci_controller_init(sc);
1075
1076                 if (sc->sc_intre)
1077                         OWRITE4(sc, OHCI_INTERRUPT_ENABLE,
1078                                 sc->sc_intre & (OHCI_ALL_INTRS | OHCI_MIE));
1079                 if (sc->sc_control)
1080                         ctl = sc->sc_control;
1081                 else
1082                         ctl = OREAD4(sc, OHCI_CONTROL);
1083                 ctl |= OHCI_HCFS_RESUME;
1084                 OWRITE4(sc, OHCI_CONTROL, ctl);
1085                 usb_delay_ms(&sc->sc_bus, USB_RESUME_DELAY);
1086                 ctl = (ctl & ~OHCI_HCFS_MASK) | OHCI_HCFS_OPERATIONAL;
1087                 OWRITE4(sc, OHCI_CONTROL, ctl);
1088                 usb_delay_ms(&sc->sc_bus, USB_RESUME_RECOVERY);
1089                 sc->sc_control = sc->sc_intre = 0;
1090                 sc->sc_bus.use_polling--;
1091                 ohci_init_intrs(sc);
1092
1093         }
1094         crit_exit();
1095 }
1096
1097 #ifdef USB_DEBUG
1098 void
1099 ohci_dumpregs(ohci_softc_t *sc)
1100 {
1101         DPRINTF(("ohci_dumpregs: rev=0x%08x control=0x%08x command=0x%08x\n",
1102                  OREAD4(sc, OHCI_REVISION),
1103                  OREAD4(sc, OHCI_CONTROL),
1104                  OREAD4(sc, OHCI_COMMAND_STATUS)));
1105         DPRINTF(("               intrstat=0x%08x intre=0x%08x intrd=0x%08x\n",
1106                  OREAD4(sc, OHCI_INTERRUPT_STATUS),
1107                  OREAD4(sc, OHCI_INTERRUPT_ENABLE),
1108                  OREAD4(sc, OHCI_INTERRUPT_DISABLE)));
1109         DPRINTF(("               hcca=0x%08x percur=0x%08x ctrlhd=0x%08x\n",
1110                  OREAD4(sc, OHCI_HCCA),
1111                  OREAD4(sc, OHCI_PERIOD_CURRENT_ED),
1112                  OREAD4(sc, OHCI_CONTROL_HEAD_ED)));
1113         DPRINTF(("               ctrlcur=0x%08x bulkhd=0x%08x bulkcur=0x%08x\n",
1114                  OREAD4(sc, OHCI_CONTROL_CURRENT_ED),
1115                  OREAD4(sc, OHCI_BULK_HEAD_ED),
1116                  OREAD4(sc, OHCI_BULK_CURRENT_ED)));
1117         DPRINTF(("               done=0x%08x fmival=0x%08x fmrem=0x%08x\n",
1118                  OREAD4(sc, OHCI_DONE_HEAD),
1119                  OREAD4(sc, OHCI_FM_INTERVAL),
1120                  OREAD4(sc, OHCI_FM_REMAINING)));
1121         DPRINTF(("               fmnum=0x%08x perst=0x%08x lsthrs=0x%08x\n",
1122                  OREAD4(sc, OHCI_FM_NUMBER),
1123                  OREAD4(sc, OHCI_PERIODIC_START),
1124                  OREAD4(sc, OHCI_LS_THRESHOLD)));
1125         DPRINTF(("               desca=0x%08x descb=0x%08x stat=0x%08x\n",
1126                  OREAD4(sc, OHCI_RH_DESCRIPTOR_A),
1127                  OREAD4(sc, OHCI_RH_DESCRIPTOR_B),
1128                  OREAD4(sc, OHCI_RH_STATUS)));
1129         DPRINTF(("               port1=0x%08x port2=0x%08x\n",
1130                  OREAD4(sc, OHCI_RH_PORT_STATUS(1)),
1131                  OREAD4(sc, OHCI_RH_PORT_STATUS(2))));
1132         DPRINTF(("         HCCA: frame_number=0x%04x done_head=0x%08x\n",
1133                  le32toh(sc->sc_hcca->hcca_frame_number),
1134                  le32toh(sc->sc_hcca->hcca_done_head)));
1135 }
1136 #endif
1137
1138 Static int ohci_intr1(ohci_softc_t *);
1139
1140 int
1141 ohci_intr(void *p)
1142 {
1143         ohci_softc_t *sc = p;
1144
1145         if (sc == NULL || sc->sc_dying)
1146                 return (0);
1147
1148         /* If we get an interrupt while polling, then just ignore it. */
1149         if (sc->sc_bus.use_polling) {
1150 #ifdef DIAGNOSTIC
1151                 DPRINTFN(16, ("ohci_intr: ignored interrupt while polling\n"));
1152 #endif
1153                 return (0);
1154         }
1155
1156         return (ohci_intr1(sc));
1157 }
1158
1159 Static int
1160 ohci_intr1(ohci_softc_t *sc)
1161 {
1162         u_int32_t intrs, eintrs;
1163         ohci_physaddr_t done;
1164
1165         DPRINTFN(14,("ohci_intr1: enter\n"));
1166
1167         /* In case the interrupt occurs before initialization has completed. */
1168         if (sc == NULL || sc->sc_hcca == NULL) {
1169 #ifdef DIAGNOSTIC
1170                 printf("ohci_intr: sc->sc_hcca == NULL\n");
1171 #endif
1172                 return (0);
1173         }
1174
1175         intrs = 0;
1176         done = le32toh(sc->sc_hcca->hcca_done_head);
1177
1178         /* The LSb of done is used to inform the HC Driver that an interrupt
1179          * condition exists for both the Done list and for another event
1180          * recorded in HcInterruptStatus. On an interrupt from the HC, the HC
1181          * Driver checks the HccaDoneHead Value. If this value is 0, then the
1182          * interrupt was caused by other than the HccaDoneHead update and the
1183          * HcInterruptStatus register needs to be accessed to determine that
1184          * exact interrupt cause. If HccaDoneHead is nonzero, then a Done list
1185          * update interrupt is indicated and if the LSb of done is nonzero,
1186          * then an additional interrupt event is indicated and
1187          * HcInterruptStatus should be checked to determine its cause.
1188          */
1189         if (done != 0) {
1190                 if (done & ~OHCI_DONE_INTRS)
1191                         intrs = OHCI_WDH;
1192                 if (done & OHCI_DONE_INTRS) {
1193                         intrs |= OREAD4(sc, OHCI_INTERRUPT_STATUS);
1194                         done &= ~OHCI_DONE_INTRS;
1195                 }
1196                 sc->sc_hcca->hcca_done_head = 0;
1197         } else
1198                 intrs = OREAD4(sc, OHCI_INTERRUPT_STATUS) & ~OHCI_WDH;
1199
1200         if (intrs == 0)         /* nothing to be done (PCI shared interrupt) */
1201                 return (0);
1202
1203         intrs &= ~OHCI_MIE;
1204         OWRITE4(sc, OHCI_INTERRUPT_STATUS, intrs); /* Acknowledge */
1205         eintrs = intrs & sc->sc_eintrs;
1206         if (!eintrs)
1207                 return (0);
1208
1209         sc->sc_bus.intr_context++;
1210         sc->sc_bus.no_intrs++;
1211         DPRINTFN(7, ("ohci_intr: sc=%p intrs=0x%x(0x%x) eintrs=0x%x\n",
1212                      sc, (u_int)intrs, OREAD4(sc, OHCI_INTERRUPT_STATUS),
1213                      (u_int)eintrs));
1214
1215         if (eintrs & OHCI_SO) {
1216                 sc->sc_overrun_cnt++;
1217                 if (usbd_ratecheck(&sc->sc_overrun_ntc)) {
1218                         printf("%s: %u scheduling overruns\n",
1219                             USBDEVNAME(sc->sc_bus.bdev), sc->sc_overrun_cnt);
1220                         sc->sc_overrun_cnt = 0;
1221                 }
1222                 /* XXX do what */
1223                 eintrs &= ~OHCI_SO;
1224         }
1225         if (eintrs & OHCI_WDH) {
1226                 ohci_add_done(sc, done &~ OHCI_DONE_INTRS);
1227                 usb_schedsoftintr(&sc->sc_bus);
1228                 eintrs &= ~OHCI_WDH;
1229         }
1230         if (eintrs & OHCI_RD) {
1231                 printf("%s: resume detect\n", USBDEVNAME(sc->sc_bus.bdev));
1232                 /* XXX process resume detect */
1233         }
1234         if (eintrs & OHCI_UE) {
1235                 printf("%s: unrecoverable error, controller halted\n",
1236                        USBDEVNAME(sc->sc_bus.bdev));
1237                 OWRITE4(sc, OHCI_CONTROL, OHCI_HCFS_RESET);
1238                 /* XXX what else */
1239         }
1240         if (eintrs & OHCI_RHSC) {
1241                 ohci_rhsc(sc, sc->sc_intrxfer);
1242                 /*
1243                  * Disable RHSC interrupt for now, because it will be
1244                  * on until the port has been reset.
1245                  */
1246                 ohci_rhsc_able(sc, 0);
1247                 /* Do not allow RHSC interrupts > 1 per second */
1248                 usb_callout(sc->sc_tmo_rhsc, hz, ohci_rhsc_enable, sc);
1249                 eintrs &= ~OHCI_RHSC;
1250         }
1251
1252         sc->sc_bus.intr_context--;
1253
1254         if (eintrs != 0) {
1255                 /* Block unprocessed interrupts. XXX */
1256                 OWRITE4(sc, OHCI_INTERRUPT_DISABLE, eintrs);
1257                 sc->sc_eintrs &= ~eintrs;
1258                 printf("%s: blocking intrs 0x%x\n",
1259                        USBDEVNAME(sc->sc_bus.bdev), eintrs);
1260         }
1261
1262         return (1);
1263 }
1264
1265 void
1266 ohci_rhsc_able(ohci_softc_t *sc, int on)
1267 {
1268         DPRINTFN(4, ("ohci_rhsc_able: on=%d\n", on));
1269         if (on) {
1270                 sc->sc_eintrs |= OHCI_RHSC;
1271                 OWRITE4(sc, OHCI_INTERRUPT_ENABLE, OHCI_RHSC);
1272         } else {
1273                 sc->sc_eintrs &= ~OHCI_RHSC;
1274                 OWRITE4(sc, OHCI_INTERRUPT_DISABLE, OHCI_RHSC);
1275         }
1276 }
1277
1278 void
1279 ohci_rhsc_enable(void *v_sc)
1280 {
1281         ohci_softc_t *sc = v_sc;
1282
1283         crit_enter();
1284         ohci_rhsc_able(sc, 1);
1285         crit_exit();
1286 }
1287
1288 #ifdef USB_DEBUG
1289 char *ohci_cc_strs[] = {
1290         "NO_ERROR",
1291         "CRC",
1292         "BIT_STUFFING",
1293         "DATA_TOGGLE_MISMATCH",
1294         "STALL",
1295         "DEVICE_NOT_RESPONDING",
1296         "PID_CHECK_FAILURE",
1297         "UNEXPECTED_PID",
1298         "DATA_OVERRUN",
1299         "DATA_UNDERRUN",
1300         "BUFFER_OVERRUN",
1301         "BUFFER_UNDERRUN",
1302         "reserved",
1303         "reserved",
1304         "NOT_ACCESSED",
1305         "NOT_ACCESSED"
1306 };
1307 #endif
1308
1309 void
1310 ohci_add_done(ohci_softc_t *sc, ohci_physaddr_t done)
1311 {
1312         ohci_soft_itd_t *sitd, *sidone, **ip;
1313         ohci_soft_td_t  *std,  *sdone,  **p;
1314
1315         /* Reverse the done list. */
1316         for (sdone = NULL, sidone = NULL; done != 0; ) {
1317                 std = ohci_hash_find_td(sc, done);
1318                 if (std != NULL) {
1319                         std->dnext = sdone;
1320                         done = le32toh(std->td.td_nexttd);
1321                         sdone = std;
1322                         DPRINTFN(10,("add TD %p\n", std));
1323                         continue;
1324                 }
1325                 sitd = ohci_hash_find_itd(sc, done);
1326                 if (sitd != NULL) {
1327                         sitd->dnext = sidone;
1328                         done = le32toh(sitd->itd.itd_nextitd);
1329                         sidone = sitd;
1330                         DPRINTFN(5,("add ITD %p\n", sitd));
1331                         continue;
1332                 }
1333                 panic("ohci_add_done: addr 0x%08lx not found", (u_long)done);
1334         }
1335
1336         /* sdone & sidone now hold the done lists. */
1337         /* Put them on the already processed lists. */
1338         for (p = &sc->sc_sdone; *p != NULL; p = &(*p)->dnext)
1339                 ;
1340         *p = sdone;
1341         for (ip = &sc->sc_sidone; *ip != NULL; ip = &(*ip)->dnext)
1342                 ;
1343         *ip = sidone;
1344 }
1345
1346 void
1347 ohci_softintr(void *v)
1348 {
1349         ohci_softc_t *sc = v;
1350         ohci_soft_itd_t *sitd, *sidone, *sitdnext;
1351         ohci_soft_td_t  *std,  *sdone,  *stdnext;
1352         usbd_xfer_handle xfer;
1353         struct ohci_pipe *opipe;
1354         int len, cc;
1355
1356         DPRINTFN(10,("ohci_softintr: enter\n"));
1357
1358         sc->sc_bus.intr_context++;
1359
1360         crit_enter();
1361         sdone = sc->sc_sdone;
1362         sc->sc_sdone = NULL;
1363         sidone = sc->sc_sidone;
1364         sc->sc_sidone = NULL;
1365         crit_exit();
1366
1367         DPRINTFN(10,("ohci_softintr: sdone=%p sidone=%p\n", sdone, sidone));
1368
1369 #ifdef USB_DEBUG
1370         if (ohcidebug > 10) {
1371                 DPRINTF(("ohci_process_done: TD done:\n"));
1372                 ohci_dump_tds(sdone);
1373         }
1374 #endif
1375
1376         for (std = sdone; std; std = stdnext) {
1377                 xfer = std->xfer;
1378                 stdnext = std->dnext;
1379                 DPRINTFN(10, ("ohci_process_done: std=%p xfer=%p hcpriv=%p\n",
1380                                 std, xfer, (xfer ? xfer->hcpriv : NULL)));
1381                 if (xfer == NULL || (std->flags & OHCI_TD_HANDLED)) {
1382                         /*
1383                          * xfer == NULL: There seems to be no xfer associated
1384                          * with this TD. It is tailp that happened to end up on
1385                          * the done queue.
1386                          * flags & OHCI_TD_HANDLED: The TD has already been
1387                          * handled by process_done and should not be done again.
1388                          * Shouldn't happen, but some chips are broken(?).
1389                          */
1390                         continue;
1391                 }
1392                 if (xfer->status == USBD_CANCELLED ||
1393                     xfer->status == USBD_TIMEOUT) {
1394                         DPRINTF(("ohci_process_done: cancel/timeout %p\n",
1395                                  xfer));
1396                         /* Handled by abort routine. */
1397                         continue;
1398                 }
1399                 usb_uncallout(xfer->timeout_handle, ohci_timeout, xfer);
1400
1401                 len = std->len;
1402                 if (std->td.td_cbp != 0)
1403                         len -= le32toh(std->td.td_be) -
1404                                le32toh(std->td.td_cbp) + 1;
1405                 DPRINTFN(10, ("ohci_process_done: len=%d, flags=0x%x\n", len,
1406                     std->flags));
1407                 if (std->flags & OHCI_ADD_LEN)
1408                         xfer->actlen += len;
1409
1410                 cc = OHCI_TD_GET_CC(le32toh(std->td.td_flags));
1411                 if (cc == OHCI_CC_NO_ERROR) {
1412                         if (std->flags & OHCI_CALL_DONE) {
1413                                 xfer->status = USBD_NORMAL_COMPLETION;
1414                                 crit_enter();
1415                                 usb_transfer_complete(xfer);
1416                                 crit_exit();
1417                         }
1418                         ohci_free_std(sc, std);
1419                 } else {
1420                         /*
1421                          * Endpoint is halted.  First unlink all the TDs
1422                          * belonging to the failed transfer, and then restart
1423                          * the endpoint.
1424                          */
1425                         ohci_soft_td_t *p, *n;
1426                         opipe = (struct ohci_pipe *)xfer->pipe;
1427
1428                         DPRINTFN(15,("ohci_process_done: error cc=%d (%s)\n",
1429                           OHCI_TD_GET_CC(le32toh(std->td.td_flags)),
1430                           ohci_cc_strs[OHCI_TD_GET_CC(le32toh(std->td.td_flags))]));
1431
1432
1433                         /* Mark all the TDs in the done queue for the current
1434                          * xfer as handled
1435                          */
1436                         for (p = stdnext; p; p = p->dnext) {
1437                                 if (p->xfer == xfer)
1438                                         p->flags |= OHCI_TD_HANDLED;
1439                         }
1440
1441                         /* remove TDs */
1442                         for (p = std; p->xfer == xfer; p = n) {
1443                                 n = p->nexttd;
1444                                 ohci_free_std(sc, p);
1445                         }
1446
1447                         /* clear halt */
1448                         opipe->sed->ed.ed_headp = htole32(p->physaddr);
1449                         OWRITE4(sc, OHCI_COMMAND_STATUS, OHCI_CLF);
1450
1451                         if (cc == OHCI_CC_STALL)
1452                                 xfer->status = USBD_STALLED;
1453                         else
1454                                 xfer->status = USBD_IOERROR;
1455                         crit_enter();
1456                         usb_transfer_complete(xfer);
1457                         crit_exit();
1458                 }
1459         }
1460
1461 #ifdef USB_DEBUG
1462         if (ohcidebug > 10) {
1463                 DPRINTF(("ohci_softintr: ITD done:\n"));
1464                 ohci_dump_itds(sidone);
1465         }
1466 #endif
1467
1468         for (sitd = sidone; sitd != NULL; sitd = sitdnext) {
1469                 xfer = sitd->xfer;
1470                 sitdnext = sitd->dnext;
1471                 sitd->flags |= OHCI_ITD_INTFIN;
1472                 DPRINTFN(1, ("ohci_process_done: sitd=%p xfer=%p hcpriv=%p\n",
1473                              sitd, xfer, xfer ? xfer->hcpriv : 0));
1474                 if (xfer == NULL)
1475                         continue;
1476                 if (xfer->status == USBD_CANCELLED ||
1477                     xfer->status == USBD_TIMEOUT) {
1478                         DPRINTF(("ohci_process_done: cancel/timeout %p\n",
1479                                  xfer));
1480                         /* Handled by abort routine. */
1481                         continue;
1482                 }
1483                 if (xfer->pipe)
1484                         if (xfer->pipe->aborting)
1485                                 continue; /*Ignore.*/
1486 #ifdef DIAGNOSTIC
1487                 if (sitd->isdone)
1488                         printf("ohci_softintr: sitd=%p is done\n", sitd);
1489                 sitd->isdone = 1;
1490 #endif
1491                 opipe = (struct ohci_pipe *)xfer->pipe;
1492                 if (opipe->aborting)
1493                         continue;
1494  
1495                 cc = OHCI_ITD_GET_CC(le32toh(sitd->itd.itd_flags));
1496                 if (cc == OHCI_CC_NO_ERROR) {
1497                         /* XXX compute length for input */
1498                         if (sitd->flags & OHCI_CALL_DONE) {
1499                                 opipe->u.iso.inuse -= xfer->nframes;
1500                                 /* XXX update frlengths with actual length */
1501                                 /* XXX xfer->actlen = actlen; */
1502                                 xfer->status = USBD_NORMAL_COMPLETION;
1503                                 crit_enter();
1504                                 usb_transfer_complete(xfer);
1505                                 crit_exit();
1506                         }
1507                 } else {
1508                         /* XXX Do more */
1509                         xfer->status = USBD_IOERROR;
1510                         crit_enter();
1511                         usb_transfer_complete(xfer);
1512                         crit_exit();
1513                 }
1514         }
1515
1516 #ifdef USB_USE_SOFTINTR
1517         if (sc->sc_softwake) {
1518                 sc->sc_softwake = 0;
1519                 wakeup(&sc->sc_softwake);
1520         }
1521 #endif /* USB_USE_SOFTINTR */
1522
1523         sc->sc_bus.intr_context--;
1524         DPRINTFN(10,("ohci_softintr: done:\n"));
1525 }
1526
1527 void
1528 ohci_device_ctrl_done(usbd_xfer_handle xfer)
1529 {
1530         DPRINTFN(10,("ohci_device_ctrl_done: xfer=%p\n", xfer));
1531
1532 #ifdef DIAGNOSTIC
1533         if (!(xfer->rqflags & URQ_REQUEST)) {
1534                 panic("ohci_device_ctrl_done: not a request");
1535         }
1536 #endif
1537         xfer->hcpriv = NULL;
1538 }
1539
1540 void
1541 ohci_device_intr_done(usbd_xfer_handle xfer)
1542 {
1543         struct ohci_pipe *opipe = (struct ohci_pipe *)xfer->pipe;
1544         ohci_softc_t *sc = (ohci_softc_t *)opipe->pipe.device->bus;
1545         ohci_soft_ed_t *sed = opipe->sed;
1546         ohci_soft_td_t *data, *tail;
1547
1548
1549         DPRINTFN(10,("ohci_device_intr_done: xfer=%p, actlen=%d\n",
1550                      xfer, xfer->actlen));
1551
1552         xfer->hcpriv = NULL;
1553
1554         if (xfer->pipe->repeat) {
1555                 data = opipe->tail.td;
1556                 tail = ohci_alloc_std(sc); /* XXX should reuse TD */
1557                 if (tail == NULL) {
1558                         xfer->status = USBD_NOMEM;
1559                         return;
1560                 }
1561                 tail->xfer = NULL;
1562
1563                 data->td.td_flags = htole32(
1564                         OHCI_TD_IN | OHCI_TD_NOCC |
1565                         OHCI_TD_SET_DI(1) | OHCI_TD_TOGGLE_CARRY);
1566                 if (xfer->flags & USBD_SHORT_XFER_OK)
1567                         data->td.td_flags |= htole32(OHCI_TD_R);
1568                 data->td.td_cbp = htole32(DMAADDR(&xfer->dmabuf, 0));
1569                 data->nexttd = tail;
1570                 data->td.td_nexttd = htole32(tail->physaddr);
1571                 data->td.td_be = htole32(le32toh(data->td.td_cbp) +
1572                         xfer->length - 1);
1573                 data->len = xfer->length;
1574                 data->xfer = xfer;
1575                 data->flags = OHCI_CALL_DONE | OHCI_ADD_LEN;
1576                 xfer->hcpriv = data;
1577                 xfer->actlen = 0;
1578
1579                 sed->ed.ed_tailp = htole32(tail->physaddr);
1580                 opipe->tail.td = tail;
1581         }
1582 }
1583
1584 void
1585 ohci_device_bulk_done(usbd_xfer_handle xfer)
1586 {
1587         DPRINTFN(10,("ohci_device_bulk_done: xfer=%p, actlen=%d\n",
1588                      xfer, xfer->actlen));
1589
1590         xfer->hcpriv = NULL;
1591 }
1592
1593 void
1594 ohci_rhsc(ohci_softc_t *sc, usbd_xfer_handle xfer)
1595 {
1596         usbd_pipe_handle pipe;
1597         u_char *p;
1598         int i, m;
1599         int hstatus;
1600
1601         hstatus = OREAD4(sc, OHCI_RH_STATUS);
1602         DPRINTF(("ohci_rhsc: sc=%p xfer=%p hstatus=0x%08x\n",
1603                  sc, xfer, hstatus));
1604
1605         if (xfer == NULL) {
1606                 /* Just ignore the change. */
1607                 return;
1608         }
1609
1610         pipe = xfer->pipe;
1611
1612         p = KERNADDR(&xfer->dmabuf, 0);
1613         m = min(sc->sc_noport, xfer->length * 8 - 1);
1614         memset(p, 0, xfer->length);
1615         for (i = 1; i <= m; i++) {
1616                 /* Pick out CHANGE bits from the status reg. */
1617                 if (OREAD4(sc, OHCI_RH_PORT_STATUS(i)) >> 16)
1618                         p[i/8] |= 1 << (i%8);
1619         }
1620         DPRINTF(("ohci_rhsc: change=0x%02x\n", *p));
1621         xfer->actlen = xfer->length;
1622         xfer->status = USBD_NORMAL_COMPLETION;
1623
1624         usb_transfer_complete(xfer);
1625 }
1626
1627 void
1628 ohci_root_intr_done(usbd_xfer_handle xfer)
1629 {
1630         xfer->hcpriv = NULL;
1631 }
1632
1633 void
1634 ohci_root_ctrl_done(usbd_xfer_handle xfer)
1635 {
1636         xfer->hcpriv = NULL;
1637 }
1638
1639 /*
1640  * Wait here until controller claims to have an interrupt.
1641  * Then call ohci_intr and return.  Use timeout to avoid waiting
1642  * too long.
1643  */
1644 void
1645 ohci_waitintr(ohci_softc_t *sc, usbd_xfer_handle xfer)
1646 {
1647         int timo = xfer->timeout;
1648         int usecs;
1649         u_int32_t intrs;
1650
1651         xfer->status = USBD_IN_PROGRESS;
1652         for (usecs = timo * 1000000 / hz; usecs > 0; usecs -= 1000) {
1653                 usb_delay_ms(&sc->sc_bus, 1);
1654                 if (sc->sc_dying)
1655                         break;
1656                 intrs = OREAD4(sc, OHCI_INTERRUPT_STATUS) & sc->sc_eintrs;
1657                 DPRINTFN(15,("ohci_waitintr: 0x%04x\n", intrs));
1658 #ifdef USB_DEBUG
1659                 if (ohcidebug > 15)
1660                         ohci_dumpregs(sc);
1661 #endif
1662                 if (intrs) {
1663                         ohci_intr1(sc);
1664                         if (xfer->status != USBD_IN_PROGRESS)
1665                                 return;
1666                 }
1667         }
1668
1669         /* Timeout */
1670         DPRINTF(("ohci_waitintr: timeout\n"));
1671         xfer->status = USBD_TIMEOUT;
1672         usb_transfer_complete(xfer);
1673         /* XXX should free TD */
1674 }
1675
1676 void
1677 ohci_poll(struct usbd_bus *bus)
1678 {
1679         ohci_softc_t *sc = (ohci_softc_t *)bus;
1680 #ifdef USB_DEBUG
1681         static int last;
1682         int new;
1683         new = OREAD4(sc, OHCI_INTERRUPT_STATUS);
1684         if (new != last) {
1685                 DPRINTFN(10,("ohci_poll: intrs=0x%04x\n", new));
1686                 last = new;
1687         }
1688 #endif
1689
1690         if (OREAD4(sc, OHCI_INTERRUPT_STATUS) & sc->sc_eintrs)
1691                 ohci_intr1(sc);
1692 }
1693
1694 usbd_status
1695 ohci_device_request(usbd_xfer_handle xfer)
1696 {
1697         struct ohci_pipe *opipe = (struct ohci_pipe *)xfer->pipe;
1698         usb_device_request_t *req = &xfer->request;
1699         usbd_device_handle dev = opipe->pipe.device;
1700         ohci_softc_t *sc = (ohci_softc_t *)dev->bus;
1701         int addr = dev->address;
1702         ohci_soft_td_t *setup, *stat, *next, *tail;
1703         ohci_soft_ed_t *sed;
1704         int isread;
1705         int len;
1706         usbd_status err;
1707
1708         isread = req->bmRequestType & UT_READ;
1709         len = UGETW(req->wLength);
1710
1711         DPRINTFN(3,("ohci_device_control type=0x%02x, request=0x%02x, "
1712                     "wValue=0x%04x, wIndex=0x%04x len=%d, addr=%d, endpt=%d\n",
1713                     req->bmRequestType, req->bRequest, UGETW(req->wValue),
1714                     UGETW(req->wIndex), len, addr,
1715                     opipe->pipe.endpoint->edesc->bEndpointAddress));
1716
1717         setup = opipe->tail.td;
1718         stat = ohci_alloc_std(sc);
1719         if (stat == NULL) {
1720                 err = USBD_NOMEM;
1721                 goto bad1;
1722         }
1723         tail = ohci_alloc_std(sc);
1724         if (tail == NULL) {
1725                 err = USBD_NOMEM;
1726                 goto bad2;
1727         }
1728         tail->xfer = NULL;
1729
1730         sed = opipe->sed;
1731         opipe->u.ctl.length = len;
1732
1733         /* Update device address and length since they may have changed
1734            during the setup of the control pipe in usbd_new_device(). */
1735         /* XXX This only needs to be done once, but it's too early in open. */
1736         /* XXXX Should not touch ED here! */
1737         sed->ed.ed_flags = htole32(
1738          (le32toh(sed->ed.ed_flags) & ~(OHCI_ED_ADDRMASK | OHCI_ED_MAXPMASK)) |
1739          OHCI_ED_SET_FA(addr) |
1740          OHCI_ED_SET_MAXP(UGETW(opipe->pipe.endpoint->edesc->wMaxPacketSize)));
1741
1742         next = stat;
1743
1744         /* Set up data transaction */
1745         if (len != 0) {
1746                 ohci_soft_td_t *std = stat;
1747
1748                 err = ohci_alloc_std_chain(opipe, sc, len, isread, xfer,
1749                           std, &stat);
1750                 stat = stat->nexttd; /* point at free TD */
1751                 if (err)
1752                         goto bad3;
1753                 /* Start toggle at 1 and then use the carried toggle. */
1754                 std->td.td_flags &= htole32(~OHCI_TD_TOGGLE_MASK);
1755                 std->td.td_flags |= htole32(OHCI_TD_TOGGLE_1);
1756         }
1757
1758         memcpy(KERNADDR(&opipe->u.ctl.reqdma, 0), req, sizeof *req);
1759
1760         setup->td.td_flags = htole32(OHCI_TD_SETUP | OHCI_TD_NOCC |
1761                                      OHCI_TD_TOGGLE_0 | OHCI_TD_NOINTR);
1762         setup->td.td_cbp = htole32(DMAADDR(&opipe->u.ctl.reqdma, 0));
1763         setup->nexttd = next;
1764         setup->td.td_nexttd = htole32(next->physaddr);
1765         setup->td.td_be = htole32(le32toh(setup->td.td_cbp) + sizeof *req - 1);
1766         setup->len = 0;
1767         setup->xfer = xfer;
1768         setup->flags = 0;
1769         xfer->hcpriv = setup;
1770
1771         stat->td.td_flags = htole32(
1772                 (isread ? OHCI_TD_OUT : OHCI_TD_IN) |
1773                 OHCI_TD_NOCC | OHCI_TD_TOGGLE_1 | OHCI_TD_SET_DI(1));
1774         stat->td.td_cbp = 0;
1775         stat->nexttd = tail;
1776         stat->td.td_nexttd = htole32(tail->physaddr);
1777         stat->td.td_be = 0;
1778         stat->flags = OHCI_CALL_DONE;
1779         stat->len = 0;
1780         stat->xfer = xfer;
1781
1782 #ifdef USB_DEBUG
1783         if (ohcidebug > 5) {
1784                 DPRINTF(("ohci_device_request:\n"));
1785                 ohci_dump_ed(sed);
1786                 ohci_dump_tds(setup);
1787         }
1788 #endif
1789
1790         /* Insert ED in schedule */
1791         crit_enter();
1792         sed->ed.ed_tailp = htole32(tail->physaddr);
1793         opipe->tail.td = tail;
1794         OWRITE4(sc, OHCI_COMMAND_STATUS, OHCI_CLF);
1795         if (xfer->timeout && !sc->sc_bus.use_polling) {
1796                 usb_callout(xfer->timeout_handle, MS_TO_TICKS(xfer->timeout),
1797                             ohci_timeout, xfer);
1798         }
1799         crit_exit();
1800
1801 #ifdef USB_DEBUG
1802         if (ohcidebug > 20) {
1803                 delay(10000);
1804                 DPRINTF(("ohci_device_request: status=%x\n",
1805                          OREAD4(sc, OHCI_COMMAND_STATUS)));
1806                 ohci_dumpregs(sc);
1807                 printf("ctrl head:\n");
1808                 ohci_dump_ed(sc->sc_ctrl_head);
1809                 printf("sed:\n");
1810                 ohci_dump_ed(sed);
1811                 ohci_dump_tds(setup);
1812         }
1813 #endif
1814
1815         return (USBD_NORMAL_COMPLETION);
1816
1817  bad3:
1818         ohci_free_std(sc, tail);
1819  bad2:
1820         ohci_free_std(sc, stat);
1821  bad1:
1822         return (err);
1823 }
1824
1825 /*
1826  * Add an ED to the schedule.  Called from a critical section.
1827  */
1828 void
1829 ohci_add_ed(ohci_soft_ed_t *sed, ohci_soft_ed_t *head)
1830 {
1831         DPRINTFN(8,("ohci_add_ed: sed=%p head=%p\n", sed, head));
1832
1833         sed->next = head->next;
1834         sed->ed.ed_nexted = head->ed.ed_nexted;
1835         head->next = sed;
1836         head->ed.ed_nexted = htole32(sed->physaddr);
1837 }
1838
1839 /*
1840  * Remove an ED from the schedule.  Called from a critical section.
1841  */
1842 void
1843 ohci_rem_ed(ohci_soft_ed_t *sed, ohci_soft_ed_t *head)
1844 {
1845         ohci_soft_ed_t *p;
1846
1847
1848         /* XXX */
1849         for (p = head; p != NULL && p->next != sed; p = p->next)
1850                 ;
1851         if (p == NULL)
1852                 panic("ohci_rem_ed: ED not found");
1853         p->next = sed->next;
1854         p->ed.ed_nexted = sed->ed.ed_nexted;
1855 }
1856
1857 /*
1858  * When a transfer is completed the TD is added to the done queue by
1859  * the host controller.  This queue is the processed by software.
1860  * Unfortunately the queue contains the physical address of the TD
1861  * and we have no simple way to translate this back to a kernel address.
1862  * To make the translation possible (and fast) we use a hash table of
1863  * TDs currently in the schedule.  The physical address is used as the
1864  * hash value.
1865  */
1866
1867 #define HASH(a) (((a) >> 4) % OHCI_HASH_SIZE)
1868 /*
1869  * Called from a critical section 
1870  */
1871 void
1872 ohci_hash_add_td(ohci_softc_t *sc, ohci_soft_td_t *std)
1873 {
1874         int h = HASH(std->physaddr);
1875
1876         LIST_INSERT_HEAD(&sc->sc_hash_tds[h], std, hnext);
1877 }
1878
1879 /*
1880  * Called from a critical section 
1881  */
1882 void
1883 ohci_hash_rem_td(ohci_softc_t *sc, ohci_soft_td_t *std)
1884 {
1885         LIST_REMOVE(std, hnext);
1886 }
1887
1888 ohci_soft_td_t *
1889 ohci_hash_find_td(ohci_softc_t *sc, ohci_physaddr_t a)
1890 {
1891         int h = HASH(a);
1892         ohci_soft_td_t *std;
1893
1894         /* if these are present they should be masked out at an earlier
1895          * stage.
1896          */
1897         KASSERT((a&~OHCI_HEADMASK) == 0, ("%s: 0x%b has lower bits set\n",
1898                                       USBDEVNAME(sc->sc_bus.bdev),
1899                                       (int) a, "\20\1HALT\2TOGGLE"));
1900
1901         for (std = LIST_FIRST(&sc->sc_hash_tds[h]);
1902              std != NULL;
1903              std = LIST_NEXT(std, hnext))
1904                 if (std->physaddr == a)
1905                         return (std);
1906
1907         DPRINTF(("%s: ohci_hash_find_td: addr 0x%08lx not found\n",
1908                 USBDEVNAME(sc->sc_bus.bdev), (u_long) a));
1909         return (NULL);
1910 }
1911
1912 /*
1913  * Called from a critical section 
1914  */
1915 void
1916 ohci_hash_add_itd(ohci_softc_t *sc, ohci_soft_itd_t *sitd)
1917 {
1918         int h = HASH(sitd->physaddr);
1919
1920         DPRINTFN(10,("ohci_hash_add_itd: sitd=%p physaddr=0x%08lx\n",
1921                     sitd, (u_long)sitd->physaddr));
1922
1923         LIST_INSERT_HEAD(&sc->sc_hash_itds[h], sitd, hnext);
1924 }
1925
1926 /*
1927  * Called from a critical section 
1928  */
1929 void
1930 ohci_hash_rem_itd(ohci_softc_t *sc, ohci_soft_itd_t *sitd)
1931 {
1932         DPRINTFN(10,("ohci_hash_rem_itd: sitd=%p physaddr=0x%08lx\n",
1933                     sitd, (u_long)sitd->physaddr));
1934
1935         LIST_REMOVE(sitd, hnext);
1936 }
1937
1938 ohci_soft_itd_t *
1939 ohci_hash_find_itd(ohci_softc_t *sc, ohci_physaddr_t a)
1940 {
1941         int h = HASH(a);
1942         ohci_soft_itd_t *sitd;
1943
1944         for (sitd = LIST_FIRST(&sc->sc_hash_itds[h]);
1945              sitd != NULL;
1946              sitd = LIST_NEXT(sitd, hnext))
1947                 if (sitd->physaddr == a)
1948                         return (sitd);
1949         return (NULL);
1950 }
1951
1952 void
1953 ohci_timeout(void *addr)
1954 {
1955         struct ohci_xfer *oxfer = addr;
1956         struct ohci_pipe *opipe = (struct ohci_pipe *)oxfer->xfer.pipe;
1957         ohci_softc_t *sc = (ohci_softc_t *)opipe->pipe.device->bus;
1958
1959         DPRINTF(("ohci_timeout: oxfer=%p\n", oxfer));
1960
1961         if (sc->sc_dying) {
1962                 ohci_abort_xfer(&oxfer->xfer, USBD_TIMEOUT);
1963                 return;
1964         }
1965
1966         /* Execute the abort in a process context. */
1967         usb_init_task(&oxfer->abort_task, ohci_timeout_task, addr);
1968         usb_add_task(oxfer->xfer.pipe->device, &oxfer->abort_task);
1969 }
1970
1971 void
1972 ohci_timeout_task(void *addr)
1973 {
1974         usbd_xfer_handle xfer = addr;
1975
1976         DPRINTF(("ohci_timeout_task: xfer=%p\n", xfer));
1977
1978         crit_enter();
1979         ohci_abort_xfer(xfer, USBD_TIMEOUT);
1980         crit_exit();
1981 }
1982
1983 #ifdef USB_DEBUG
1984 void
1985 ohci_dump_tds(ohci_soft_td_t *std)
1986 {
1987         for (; std; std = std->nexttd)
1988                 ohci_dump_td(std);
1989 }
1990
1991 void
1992 ohci_dump_td(ohci_soft_td_t *std)
1993 {
1994         char sbuf[128];
1995
1996         bitmask_snprintf((u_int32_t)le32toh(std->td.td_flags),
1997                          "\20\23R\24OUT\25IN\31TOG1\32SETTOGGLE",
1998                          sbuf, sizeof(sbuf));
1999
2000         printf("TD(%p) at %08lx: %s delay=%d ec=%d cc=%d\ncbp=0x%08lx "
2001                "nexttd=0x%08lx be=0x%08lx\n",
2002                std, (u_long)std->physaddr, sbuf,
2003                OHCI_TD_GET_DI(le32toh(std->td.td_flags)),
2004                OHCI_TD_GET_EC(le32toh(std->td.td_flags)),
2005                OHCI_TD_GET_CC(le32toh(std->td.td_flags)),
2006                (u_long)le32toh(std->td.td_cbp),
2007                (u_long)le32toh(std->td.td_nexttd),
2008                (u_long)le32toh(std->td.td_be));
2009 }
2010
2011 void
2012 ohci_dump_itd(ohci_soft_itd_t *sitd)
2013 {
2014         int i;
2015
2016         printf("ITD(%p) at %08lx: sf=%d di=%d fc=%d cc=%d\n"
2017                "bp0=0x%08lx next=0x%08lx be=0x%08lx\n",
2018                sitd, (u_long)sitd->physaddr,
2019                OHCI_ITD_GET_SF(le32toh(sitd->itd.itd_flags)),
2020                OHCI_ITD_GET_DI(le32toh(sitd->itd.itd_flags)),
2021                OHCI_ITD_GET_FC(le32toh(sitd->itd.itd_flags)),
2022                OHCI_ITD_GET_CC(le32toh(sitd->itd.itd_flags)),
2023                (u_long)le32toh(sitd->itd.itd_bp0),
2024                (u_long)le32toh(sitd->itd.itd_nextitd),
2025                (u_long)le32toh(sitd->itd.itd_be));
2026         for (i = 0; i < OHCI_ITD_NOFFSET; i++)
2027                 printf("offs[%d]=0x%04x ", i,
2028                        (u_int)le16toh(sitd->itd.itd_offset[i]));
2029         printf("\n");
2030 }
2031
2032 void
2033 ohci_dump_itds(ohci_soft_itd_t *sitd)
2034 {
2035         for (; sitd; sitd = sitd->nextitd)
2036                 ohci_dump_itd(sitd);
2037 }
2038
2039 void
2040 ohci_dump_ed(ohci_soft_ed_t *sed)
2041 {
2042         char sbuf[128], sbuf2[128];
2043
2044         bitmask_snprintf((u_int32_t)le32toh(sed->ed.ed_flags),
2045                          "\20\14OUT\15IN\16LOWSPEED\17SKIP\20ISO",
2046                          sbuf, sizeof(sbuf));
2047         bitmask_snprintf((u_int32_t)le32toh(sed->ed.ed_headp),
2048                          "\20\1HALT\2CARRY", sbuf2, sizeof(sbuf2));
2049
2050         printf("ED(%p) at 0x%08lx: addr=%d endpt=%d maxp=%d flags=%s\ntailp=0x%08lx "
2051                  "headflags=%s headp=0x%08lx nexted=0x%08lx\n",
2052                  sed, (u_long)sed->physaddr,
2053                  OHCI_ED_GET_FA(le32toh(sed->ed.ed_flags)),
2054                  OHCI_ED_GET_EN(le32toh(sed->ed.ed_flags)),
2055                  OHCI_ED_GET_MAXP(le32toh(sed->ed.ed_flags)), sbuf,
2056                  (u_long)le32toh(sed->ed.ed_tailp), sbuf2,
2057                  (u_long)le32toh(sed->ed.ed_headp),
2058                  (u_long)le32toh(sed->ed.ed_nexted));
2059 }
2060 #endif
2061
2062 usbd_status
2063 ohci_open(usbd_pipe_handle pipe)
2064 {
2065         usbd_device_handle dev = pipe->device;
2066         ohci_softc_t *sc = (ohci_softc_t *)dev->bus;
2067         usb_endpoint_descriptor_t *ed = pipe->endpoint->edesc;
2068         struct ohci_pipe *opipe = (struct ohci_pipe *)pipe;
2069         u_int8_t addr = dev->address;
2070         u_int8_t xfertype = ed->bmAttributes & UE_XFERTYPE;
2071         ohci_soft_ed_t *sed;
2072         ohci_soft_td_t *std;
2073         ohci_soft_itd_t *sitd;
2074         ohci_physaddr_t tdphys;
2075         u_int32_t fmt;
2076         usbd_status err;
2077         int ival;
2078
2079         DPRINTFN(1, ("ohci_open: pipe=%p, addr=%d, endpt=%d (%d)\n",
2080                      pipe, addr, ed->bEndpointAddress, sc->sc_addr));
2081
2082         if (sc->sc_dying)
2083                 return (USBD_IOERROR);
2084
2085         std = NULL;
2086         sed = NULL;
2087
2088         if (addr == sc->sc_addr) {
2089                 switch (ed->bEndpointAddress) {
2090                 case USB_CONTROL_ENDPOINT:
2091                         pipe->methods = &ohci_root_ctrl_methods;
2092                         break;
2093                 case UE_DIR_IN | OHCI_INTR_ENDPT:
2094                         pipe->methods = &ohci_root_intr_methods;
2095                         break;
2096                 default:
2097                         return (USBD_INVAL);
2098                 }
2099         } else {
2100                 sed = ohci_alloc_sed(sc);
2101                 if (sed == NULL)
2102                         goto bad0;
2103                 opipe->sed = sed;
2104                 if (xfertype == UE_ISOCHRONOUS) {
2105                         sitd = ohci_alloc_sitd(sc);
2106                         if (sitd == NULL)
2107                                 goto bad1;
2108                         opipe->tail.itd = sitd;
2109                         opipe->aborting = 0;
2110                         tdphys = sitd->physaddr;
2111                         fmt = OHCI_ED_FORMAT_ISO;
2112                         if (UE_GET_DIR(ed->bEndpointAddress) == UE_DIR_IN)
2113                                 fmt |= OHCI_ED_DIR_IN;
2114                         else
2115                                 fmt |= OHCI_ED_DIR_OUT;
2116                 } else {
2117                         std = ohci_alloc_std(sc);
2118                         if (std == NULL)
2119                                 goto bad1;
2120                         opipe->tail.td = std;
2121                         tdphys = std->physaddr;
2122                         fmt = OHCI_ED_FORMAT_GEN | OHCI_ED_DIR_TD;
2123                 }
2124                 sed->ed.ed_flags = htole32(
2125                         OHCI_ED_SET_FA(addr) |
2126                         OHCI_ED_SET_EN(UE_GET_ADDR(ed->bEndpointAddress)) |
2127                         (dev->speed == USB_SPEED_LOW ? OHCI_ED_SPEED : 0) |
2128                         fmt |
2129                         OHCI_ED_SET_MAXP(UGETW(ed->wMaxPacketSize)));
2130                 sed->ed.ed_headp = sed->ed.ed_tailp = htole32(tdphys);
2131
2132                 switch (xfertype) {
2133                 case UE_CONTROL:
2134                         pipe->methods = &ohci_device_ctrl_methods;
2135                         err = usb_allocmem(&sc->sc_bus,
2136                                   sizeof(usb_device_request_t),
2137                                   0, &opipe->u.ctl.reqdma);
2138                         if (err)
2139                                 goto bad;
2140                         crit_enter();
2141                         ohci_add_ed(sed, sc->sc_ctrl_head);
2142                         crit_exit();
2143                         break;
2144                 case UE_INTERRUPT:
2145                         pipe->methods = &ohci_device_intr_methods;
2146                         ival = pipe->interval;
2147                         if (ival == USBD_DEFAULT_INTERVAL)
2148                                 ival = ed->bInterval;
2149                         return (ohci_device_setintr(sc, opipe, ival));
2150                 case UE_ISOCHRONOUS:
2151                         pipe->methods = &ohci_device_isoc_methods;
2152                         return (ohci_setup_isoc(pipe));
2153                 case UE_BULK:
2154                         pipe->methods = &ohci_device_bulk_methods;
2155                         crit_enter();
2156                         ohci_add_ed(sed, sc->sc_bulk_head);
2157                         crit_exit();
2158                         break;
2159                 }
2160         }
2161         return (USBD_NORMAL_COMPLETION);
2162
2163  bad:
2164         if (std != NULL)
2165                 ohci_free_std(sc, std);
2166  bad1:
2167         if (sed != NULL)
2168                 ohci_free_sed(sc, sed);
2169  bad0:
2170         return (USBD_NOMEM);
2171
2172 }
2173
2174 /*
2175  * Close a reqular pipe.
2176  * Assumes that there are no pending transactions.
2177  */
2178 void
2179 ohci_close_pipe(usbd_pipe_handle pipe, ohci_soft_ed_t *head)
2180 {
2181         struct ohci_pipe *opipe = (struct ohci_pipe *)pipe;
2182         ohci_softc_t *sc = (ohci_softc_t *)pipe->device->bus;
2183         ohci_soft_ed_t *sed = opipe->sed;
2184
2185         crit_enter();
2186 #ifdef DIAGNOSTIC
2187         sed->ed.ed_flags |= htole32(OHCI_ED_SKIP);
2188         if ((le32toh(sed->ed.ed_tailp) & OHCI_HEADMASK) !=
2189             (le32toh(sed->ed.ed_headp) & OHCI_HEADMASK)) {
2190                 ohci_soft_td_t *std;
2191                 std = ohci_hash_find_td(sc, le32toh(sed->ed.ed_headp));
2192                 printf("ohci_close_pipe: pipe not empty sed=%p hd=0x%x "
2193                        "tl=0x%x pipe=%p, std=%p\n", sed,
2194                        (int)le32toh(sed->ed.ed_headp),
2195                        (int)le32toh(sed->ed.ed_tailp),
2196                        pipe, std);
2197 #ifdef USB_DEBUG
2198                 usbd_dump_pipe(&opipe->pipe);
2199 #endif
2200 #ifdef USB_DEBUG
2201                 ohci_dump_ed(sed);
2202                 if (std)
2203                         ohci_dump_td(std);
2204 #endif
2205                 usb_delay_ms(&sc->sc_bus, 2);
2206                 if ((le32toh(sed->ed.ed_tailp) & OHCI_HEADMASK) !=
2207                     (le32toh(sed->ed.ed_headp) & OHCI_HEADMASK))
2208                         printf("ohci_close_pipe: pipe still not empty\n");
2209         }
2210 #endif
2211         ohci_rem_ed(sed, head);
2212         /* Make sure the host controller is not touching this ED */
2213         usb_delay_ms(&sc->sc_bus, 1);
2214         crit_exit();
2215         ohci_free_sed(sc, opipe->sed);
2216 }
2217
2218 /*
2219  * Abort a device request.
2220  * If this routine is called from a critical section it guarantees that
2221  * the request will be removed from the hardware scheduling and that 
2222  * the callback for it will be called with USBD_CANCELLED status.
2223  * It's impossible to guarantee that the requested transfer will not
2224  * have happened since the hardware runs concurrently.
2225  * If the transaction has already happened we rely on the ordinary
2226  * interrupt processing to process it.
2227  */
2228 void
2229 ohci_abort_xfer(usbd_xfer_handle xfer, usbd_status status)
2230 {
2231         struct ohci_pipe *opipe = (struct ohci_pipe *)xfer->pipe;
2232         ohci_softc_t *sc = (ohci_softc_t *)opipe->pipe.device->bus;
2233         ohci_soft_ed_t *sed = opipe->sed;
2234         ohci_soft_td_t *p, *n;
2235         ohci_physaddr_t headp;
2236         int hit;
2237
2238         DPRINTF(("ohci_abort_xfer: xfer=%p pipe=%p sed=%p\n", xfer, opipe,sed));
2239
2240         if (sc->sc_dying) {
2241                 /* If we're dying, just do the software part. */
2242                 crit_enter();
2243                 xfer->status = status;  /* make software ignore it */
2244                 usb_uncallout(xfer->timeout_handle, ohci_timeout, xfer);
2245                 usb_transfer_complete(xfer);
2246                 crit_exit();
2247         }
2248
2249         if (xfer->device->bus->intr_context /* || !curproc REMOVED DFly */)
2250                 panic("ohci_abort_xfer: not in process context");
2251
2252         /*
2253          * Step 1: Make interrupt routine and hardware ignore xfer.
2254          */
2255         crit_enter();
2256         xfer->status = status;  /* make software ignore it */
2257         usb_uncallout(xfer->timeout_handle, ohci_timeout, xfer);
2258         crit_exit();
2259         DPRINTFN(1,("ohci_abort_xfer: stop ed=%p\n", sed));
2260         sed->ed.ed_flags |= htole32(OHCI_ED_SKIP); /* force hardware skip */
2261
2262         /*
2263          * Step 2: Wait until we know hardware has finished any possible
2264          * use of the xfer.  Also make sure the soft interrupt routine
2265          * has run.
2266          */
2267         usb_delay_ms(opipe->pipe.device->bus, 20); /* Hardware finishes in 1ms */
2268         crit_enter();
2269 #ifdef USB_USE_SOFTINTR
2270         sc->sc_softwake = 1;
2271 #endif /* USB_USE_SOFTINTR */
2272         usb_schedsoftintr(&sc->sc_bus);
2273 #ifdef USB_USE_SOFTINTR
2274         tsleep(&sc->sc_softwake, 0, "ohciab", 0);
2275 #endif /* USB_USE_SOFTINTR */
2276         crit_exit();
2277
2278         /*
2279          * Step 3: Remove any vestiges of the xfer from the hardware.
2280          * The complication here is that the hardware may have executed
2281          * beyond the xfer we're trying to abort.  So as we're scanning
2282          * the TDs of this xfer we check if the hardware points to
2283          * any of them.
2284          */
2285         crit_enter();
2286         p = xfer->hcpriv;
2287 #ifdef DIAGNOSTIC
2288         if (p == NULL) {
2289                 crit_exit();
2290                 printf("ohci_abort_xfer: hcpriv is NULL\n");
2291                 return;
2292         }
2293 #endif
2294 #ifdef USB_DEBUG
2295         if (ohcidebug > 1) {
2296                 DPRINTF(("ohci_abort_xfer: sed=\n"));
2297                 ohci_dump_ed(sed);
2298                 ohci_dump_tds(p);
2299         }
2300 #endif
2301         headp = le32toh(sed->ed.ed_headp) & OHCI_HEADMASK;
2302         hit = 0;
2303         for (; p->xfer == xfer; p = n) {
2304                 hit |= headp == p->physaddr;
2305                 n = p->nexttd;
2306                 ohci_free_std(sc, p);
2307         }
2308         /* Zap headp register if hardware pointed inside the xfer. */
2309         if (hit) {
2310                 DPRINTFN(1,("ohci_abort_xfer: set hd=0x%08x, tl=0x%08x\n",
2311                             (int)p->physaddr, (int)le32toh(sed->ed.ed_tailp)));
2312                 sed->ed.ed_headp = htole32(p->physaddr); /* unlink TDs */
2313         } else {
2314                 DPRINTFN(1,("ohci_abort_xfer: no hit\n"));
2315         }
2316
2317         /*
2318          * Step 4: Turn on hardware again.
2319          */
2320         sed->ed.ed_flags &= htole32(~OHCI_ED_SKIP); /* remove hardware skip */
2321
2322         /*
2323          * Step 5: Execute callback.
2324          */
2325         usb_transfer_complete(xfer);
2326
2327         crit_exit();
2328 }
2329
2330 /*
2331  * Data structures and routines to emulate the root hub.
2332  */
2333 Static usb_device_descriptor_t ohci_devd = {
2334         USB_DEVICE_DESCRIPTOR_SIZE,
2335         UDESC_DEVICE,           /* type */
2336         {0x00, 0x01},           /* USB version */
2337         UDCLASS_HUB,            /* class */
2338         UDSUBCLASS_HUB,         /* subclass */
2339         UDPROTO_FSHUB,          /* protocol */
2340         64,                     /* max packet */
2341         {0},{0},{0x00,0x01},    /* device id */
2342         1,2,0,                  /* string indicies */
2343         1                       /* # of configurations */
2344 };
2345
2346 Static usb_config_descriptor_t ohci_confd = {
2347         USB_CONFIG_DESCRIPTOR_SIZE,
2348         UDESC_CONFIG,
2349         {USB_CONFIG_DESCRIPTOR_SIZE +
2350          USB_INTERFACE_DESCRIPTOR_SIZE +
2351          USB_ENDPOINT_DESCRIPTOR_SIZE},
2352         1,
2353         1,
2354         0,
2355         UC_SELF_POWERED,
2356         0                       /* max power */
2357 };
2358
2359 Static usb_interface_descriptor_t ohci_ifcd = {
2360         USB_INTERFACE_DESCRIPTOR_SIZE,
2361         UDESC_INTERFACE,
2362         0,
2363         0,
2364         1,
2365         UICLASS_HUB,
2366         UISUBCLASS_HUB,
2367         UIPROTO_FSHUB,
2368         0
2369 };
2370
2371 Static usb_endpoint_descriptor_t ohci_endpd = {
2372         USB_ENDPOINT_DESCRIPTOR_SIZE,
2373         UDESC_ENDPOINT,
2374         UE_DIR_IN | OHCI_INTR_ENDPT,
2375         UE_INTERRUPT,
2376         {8, 0},                 /* max packet */
2377         255
2378 };
2379
2380 Static usb_hub_descriptor_t ohci_hubd = {
2381         USB_HUB_DESCRIPTOR_SIZE,
2382         UDESC_HUB,
2383         0,
2384         {0,0},
2385         0,
2386         0,
2387         {0},
2388 };
2389
2390 Static int
2391 ohci_str(usb_string_descriptor_t *p, int l, const char *s)
2392 {
2393         int i;
2394
2395         if (l == 0)
2396                 return (0);
2397         p->bLength = 2 * strlen(s) + 2;
2398         if (l == 1)
2399                 return (1);
2400         p->bDescriptorType = UDESC_STRING;
2401         l -= 2;
2402         for (i = 0; s[i] && l > 1; i++, l -= 2)
2403                 USETW2(p->bString[i], 0, s[i]);
2404         return (2*i+2);
2405 }
2406
2407 /*
2408  * Simulate a hardware hub by handling all the necessary requests.
2409  */
2410 Static usbd_status
2411 ohci_root_ctrl_transfer(usbd_xfer_handle xfer)
2412 {
2413         usbd_status err;
2414
2415         /* Insert last in queue. */
2416         err = usb_insert_transfer(xfer);
2417         if (err)
2418                 return (err);
2419
2420         /* Pipe isn't running, start first */
2421         return (ohci_root_ctrl_start(SIMPLEQ_FIRST(&xfer->pipe->queue)));
2422 }
2423
2424 Static usbd_status
2425 ohci_root_ctrl_start(usbd_xfer_handle xfer)
2426 {
2427         ohci_softc_t *sc = (ohci_softc_t *)xfer->pipe->device->bus;
2428         usb_device_request_t *req;
2429         void *buf = NULL;
2430         int port, i;
2431         int len, value, index, l, totlen = 0;
2432         usb_port_status_t ps;
2433         usb_hub_descriptor_t hubd;
2434         usbd_status err;
2435         u_int32_t v;
2436
2437         if (sc->sc_dying)
2438                 return (USBD_IOERROR);
2439
2440 #ifdef DIAGNOSTIC
2441         if (!(xfer->rqflags & URQ_REQUEST))
2442                 /* XXX panic */
2443                 return (USBD_INVAL);
2444 #endif
2445         req = &xfer->request;
2446
2447         DPRINTFN(4,("ohci_root_ctrl_control type=0x%02x request=%02x\n",
2448                     req->bmRequestType, req->bRequest));
2449
2450         len = UGETW(req->wLength);
2451         value = UGETW(req->wValue);
2452         index = UGETW(req->wIndex);
2453
2454         if (len != 0)
2455                 buf = KERNADDR(&xfer->dmabuf, 0);
2456
2457 #define C(x,y) ((x) | ((y) << 8))
2458         switch(C(req->bRequest, req->bmRequestType)) {
2459         case C(UR_CLEAR_FEATURE, UT_WRITE_DEVICE):
2460         case C(UR_CLEAR_FEATURE, UT_WRITE_INTERFACE):
2461         case C(UR_CLEAR_FEATURE, UT_WRITE_ENDPOINT):
2462                 /*
2463                  * DEVICE_REMOTE_WAKEUP and ENDPOINT_HALT are no-ops
2464                  * for the integrated root hub.
2465                  */
2466                 break;
2467         case C(UR_GET_CONFIG, UT_READ_DEVICE):
2468                 if (len > 0) {
2469                         *(u_int8_t *)buf = sc->sc_conf;
2470                         totlen = 1;
2471                 }
2472                 break;
2473         case C(UR_GET_DESCRIPTOR, UT_READ_DEVICE):
2474                 DPRINTFN(8,("ohci_root_ctrl_control wValue=0x%04x\n", value));
2475                 switch(value >> 8) {
2476                 case UDESC_DEVICE:
2477                         if ((value & 0xff) != 0) {
2478                                 err = USBD_IOERROR;
2479                                 goto ret;
2480                         }
2481                         totlen = l = min(len, USB_DEVICE_DESCRIPTOR_SIZE);
2482                         USETW(ohci_devd.idVendor, sc->sc_id_vendor);
2483                         memcpy(buf, &ohci_devd, l);
2484                         break;
2485                 case UDESC_CONFIG:
2486                         if ((value & 0xff) != 0) {
2487                                 err = USBD_IOERROR;
2488                                 goto ret;
2489                         }
2490                         totlen = l = min(len, USB_CONFIG_DESCRIPTOR_SIZE);
2491                         memcpy(buf, &ohci_confd, l);
2492                         buf = (char *)buf + l;
2493                         len -= l;
2494                         l = min(len, USB_INTERFACE_DESCRIPTOR_SIZE);
2495                         totlen += l;
2496                         memcpy(buf, &ohci_ifcd, l);
2497                         buf = (char *)buf + l;
2498                         len -= l;
2499                         l = min(len, USB_ENDPOINT_DESCRIPTOR_SIZE);
2500                         totlen += l;
2501                         memcpy(buf, &ohci_endpd, l);
2502                         break;
2503                 case UDESC_STRING:
2504                         if (len == 0)
2505                                 break;
2506                         *(u_int8_t *)buf = 0;
2507                         totlen = 1;
2508                         switch (value & 0xff) {
2509                         case 1: /* Vendor */
2510                                 totlen = ohci_str(buf, len, sc->sc_vendor);
2511                                 break;
2512                         case 2: /* Product */
2513                                 totlen = ohci_str(buf, len, "OHCI root hub");
2514                                 break;
2515                         }
2516                         break;
2517                 default:
2518                         err = USBD_IOERROR;
2519                         goto ret;
2520                 }
2521                 break;
2522         case C(UR_GET_INTERFACE, UT_READ_INTERFACE):
2523                 if (len > 0) {
2524                         *(u_int8_t *)buf = 0;
2525                         totlen = 1;
2526                 }
2527                 break;
2528         case C(UR_GET_STATUS, UT_READ_DEVICE):
2529                 if (len > 1) {
2530                         USETW(((usb_status_t *)buf)->wStatus,UDS_SELF_POWERED);
2531                         totlen = 2;
2532                 }
2533                 break;
2534         case C(UR_GET_STATUS, UT_READ_INTERFACE):
2535         case C(UR_GET_STATUS, UT_READ_ENDPOINT):
2536                 if (len > 1) {
2537                         USETW(((usb_status_t *)buf)->wStatus, 0);
2538                         totlen = 2;
2539                 }
2540                 break;
2541         case C(UR_SET_ADDRESS, UT_WRITE_DEVICE):
2542                 if (value >= USB_MAX_DEVICES) {
2543                         err = USBD_IOERROR;
2544                         goto ret;
2545                 }
2546                 sc->sc_addr = value;
2547                 break;
2548         case C(UR_SET_CONFIG, UT_WRITE_DEVICE):
2549                 if (value != 0 && value != 1) {
2550                         err = USBD_IOERROR;
2551                         goto ret;
2552                 }
2553                 sc->sc_conf = value;
2554                 break;
2555         case C(UR_SET_DESCRIPTOR, UT_WRITE_DEVICE):
2556                 break;
2557         case C(UR_SET_FEATURE, UT_WRITE_DEVICE):
2558         case C(UR_SET_FEATURE, UT_WRITE_INTERFACE):
2559         case C(UR_SET_FEATURE, UT_WRITE_ENDPOINT):
2560                 err = USBD_IOERROR;
2561                 goto ret;
2562         case C(UR_SET_INTERFACE, UT_WRITE_INTERFACE):
2563                 break;
2564         case C(UR_SYNCH_FRAME, UT_WRITE_ENDPOINT):
2565                 break;
2566         /* Hub requests */
2567         case C(UR_CLEAR_FEATURE, UT_WRITE_CLASS_DEVICE):
2568                 break;
2569         case C(UR_CLEAR_FEATURE, UT_WRITE_CLASS_OTHER):
2570                 DPRINTFN(8, ("ohci_root_ctrl_control: UR_CLEAR_PORT_FEATURE "
2571                              "port=%d feature=%d\n",
2572                              index, value));
2573                 if (index < 1 || index > sc->sc_noport) {
2574                         err = USBD_IOERROR;
2575                         goto ret;
2576                 }
2577                 port = OHCI_RH_PORT_STATUS(index);
2578                 switch(value) {
2579                 case UHF_PORT_ENABLE:
2580                         OWRITE4(sc, port, UPS_CURRENT_CONNECT_STATUS);
2581                         break;
2582                 case UHF_PORT_SUSPEND:
2583                         OWRITE4(sc, port, UPS_OVERCURRENT_INDICATOR);
2584                         break;
2585                 case UHF_PORT_POWER:
2586                         /* Yes, writing to the LOW_SPEED bit clears power. */
2587                         OWRITE4(sc, port, UPS_LOW_SPEED);
2588                         break;
2589                 case UHF_C_PORT_CONNECTION:
2590                         OWRITE4(sc, port, UPS_C_CONNECT_STATUS << 16);
2591                         break;
2592                 case UHF_C_PORT_ENABLE:
2593                         OWRITE4(sc, port, UPS_C_PORT_ENABLED << 16);
2594                         break;
2595                 case UHF_C_PORT_SUSPEND:
2596                         OWRITE4(sc, port, UPS_C_SUSPEND << 16);
2597                         break;
2598                 case UHF_C_PORT_OVER_CURRENT:
2599                         OWRITE4(sc, port, UPS_C_OVERCURRENT_INDICATOR << 16);
2600                         break;
2601                 case UHF_C_PORT_RESET:
2602                         OWRITE4(sc, port, UPS_C_PORT_RESET << 16);
2603                         break;
2604                 default:
2605                         err = USBD_IOERROR;
2606                         goto ret;
2607                 }
2608                 switch(value) {
2609                 case UHF_C_PORT_CONNECTION:
2610                 case UHF_C_PORT_ENABLE:
2611                 case UHF_C_PORT_SUSPEND:
2612                 case UHF_C_PORT_OVER_CURRENT:
2613                 case UHF_C_PORT_RESET:
2614                         /* Enable RHSC interrupt if condition is cleared. */
2615                         if ((OREAD4(sc, port) >> 16) == 0)
2616                                 ohci_rhsc_able(sc, 1);
2617                         break;
2618                 default:
2619                         break;
2620                 }
2621                 break;
2622         case C(UR_GET_DESCRIPTOR, UT_READ_CLASS_DEVICE):
2623                 if ((value & 0xff) != 0) {
2624                         err = USBD_IOERROR;
2625                         goto ret;
2626                 }
2627                 v = OREAD4(sc, OHCI_RH_DESCRIPTOR_A);
2628                 hubd = ohci_hubd;
2629                 hubd.bNbrPorts = sc->sc_noport;
2630                 USETW(hubd.wHubCharacteristics,
2631                       (v & OHCI_NPS ? UHD_PWR_NO_SWITCH :
2632                        v & OHCI_PSM ? UHD_PWR_GANGED : UHD_PWR_INDIVIDUAL)
2633                       /* XXX overcurrent */
2634                       );
2635                 hubd.bPwrOn2PwrGood = OHCI_GET_POTPGT(v);
2636                 v = OREAD4(sc, OHCI_RH_DESCRIPTOR_B);
2637                 for (i = 0, l = sc->sc_noport; l > 0; i++, l -= 8, v >>= 8)
2638                         hubd.DeviceRemovable[i++] = (u_int8_t)v;
2639                 hubd.bDescLength = USB_HUB_DESCRIPTOR_SIZE + i;
2640                 l = min(len, hubd.bDescLength);
2641                 totlen = l;
2642                 memcpy(buf, &hubd, l);
2643                 break;
2644         case C(UR_GET_STATUS, UT_READ_CLASS_DEVICE):
2645                 if (len != 4) {
2646                         err = USBD_IOERROR;
2647                         goto ret;
2648                 }
2649                 memset(buf, 0, len); /* ? XXX */
2650                 totlen = len;
2651                 break;
2652         case C(UR_GET_STATUS, UT_READ_CLASS_OTHER):
2653                 DPRINTFN(8,("ohci_root_ctrl_transfer: get port status i=%d\n",
2654                             index));
2655                 if (index < 1 || index > sc->sc_noport) {
2656                         err = USBD_IOERROR;
2657                         goto ret;
2658                 }
2659                 if (len != 4) {
2660                         err = USBD_IOERROR;
2661                         goto ret;
2662                 }
2663                 v = OREAD4(sc, OHCI_RH_PORT_STATUS(index));
2664                 DPRINTFN(8,("ohci_root_ctrl_transfer: port status=0x%04x\n",
2665                             v));
2666                 USETW(ps.wPortStatus, v);
2667                 USETW(ps.wPortChange, v >> 16);
2668                 l = min(len, sizeof ps);
2669                 memcpy(buf, &ps, l);
2670                 totlen = l;
2671                 break;
2672         case C(UR_SET_DESCRIPTOR, UT_WRITE_CLASS_DEVICE):
2673                 err = USBD_IOERROR;
2674                 goto ret;
2675         case C(UR_SET_FEATURE, UT_WRITE_CLASS_DEVICE):
2676                 break;
2677         case C(UR_SET_FEATURE, UT_WRITE_CLASS_OTHER):
2678                 if (index < 1 || index > sc->sc_noport) {
2679                         err = USBD_IOERROR;
2680                         goto ret;
2681                 }
2682                 port = OHCI_RH_PORT_STATUS(index);
2683                 switch(value) {
2684                 case UHF_PORT_ENABLE:
2685                         OWRITE4(sc, port, UPS_PORT_ENABLED);
2686                         break;
2687                 case UHF_PORT_SUSPEND:
2688                         OWRITE4(sc, port, UPS_SUSPEND);
2689                         break;
2690                 case UHF_PORT_RESET:
2691                         DPRINTFN(5,("ohci_root_ctrl_transfer: reset port %d\n",
2692                                     index));
2693                         OWRITE4(sc, port, UPS_RESET);
2694                         for (i = 0; i < 5; i++) {
2695                                 usb_delay_ms(&sc->sc_bus,
2696                                              USB_PORT_ROOT_RESET_DELAY);
2697                                 if (sc->sc_dying) {
2698                                         err = USBD_IOERROR;
2699                                         goto ret;
2700                                 }
2701                                 if ((OREAD4(sc, port) & UPS_RESET) == 0)
2702                                         break;
2703                         }
2704                         DPRINTFN(8,("ohci port %d reset, status = 0x%04x\n",
2705                                     index, OREAD4(sc, port)));
2706                         break;
2707                 case UHF_PORT_POWER:
2708                         DPRINTFN(2,("ohci_root_ctrl_transfer: set port power "
2709                                     "%d\n", index));
2710                         OWRITE4(sc, port, UPS_PORT_POWER);
2711                         break;
2712                 default:
2713                         err = USBD_IOERROR;
2714                         goto ret;
2715                 }
2716                 break;
2717         default:
2718                 err = USBD_IOERROR;
2719                 goto ret;
2720         }
2721         xfer->actlen = totlen;
2722         err = USBD_NORMAL_COMPLETION;
2723  ret:
2724         xfer->status = err;
2725         crit_enter();
2726         usb_transfer_complete(xfer);
2727         crit_exit();
2728         return (USBD_IN_PROGRESS);
2729 }
2730
2731 /* Abort a root control request. */
2732 Static void
2733 ohci_root_ctrl_abort(usbd_xfer_handle xfer)
2734 {
2735         /* Nothing to do, all transfers are synchronous. */
2736 }
2737
2738 /* Close the root pipe. */
2739 Static void
2740 ohci_root_ctrl_close(usbd_pipe_handle pipe)
2741 {
2742         DPRINTF(("ohci_root_ctrl_close\n"));
2743         /* Nothing to do. */
2744 }
2745
2746 Static usbd_status
2747 ohci_root_intr_transfer(usbd_xfer_handle xfer)
2748 {
2749         usbd_status err;
2750
2751         /* Insert last in queue. */
2752         err = usb_insert_transfer(xfer);
2753         if (err)
2754                 return (err);
2755
2756         /* Pipe isn't running, start first */
2757         return (ohci_root_intr_start(SIMPLEQ_FIRST(&xfer->pipe->queue)));
2758 }
2759
2760 Static usbd_status
2761 ohci_root_intr_start(usbd_xfer_handle xfer)
2762 {
2763         usbd_pipe_handle pipe = xfer->pipe;
2764         ohci_softc_t *sc = (ohci_softc_t *)pipe->device->bus;
2765
2766         if (sc->sc_dying)
2767                 return (USBD_IOERROR);
2768
2769         sc->sc_intrxfer = xfer;
2770
2771         return (USBD_IN_PROGRESS);
2772 }
2773
2774 /* Abort a root interrupt request. */
2775 Static void
2776 ohci_root_intr_abort(usbd_xfer_handle xfer)
2777 {
2778         if (xfer->pipe->intrxfer == xfer) {
2779                 DPRINTF(("ohci_root_intr_abort: remove\n"));
2780                 xfer->pipe->intrxfer = NULL;
2781         }
2782         xfer->status = USBD_CANCELLED;
2783         crit_enter();
2784         usb_transfer_complete(xfer);
2785         crit_exit();
2786 }
2787
2788 /* Close the root pipe. */
2789 Static void
2790 ohci_root_intr_close(usbd_pipe_handle pipe)
2791 {
2792         ohci_softc_t *sc = (ohci_softc_t *)pipe->device->bus;
2793
2794         DPRINTF(("ohci_root_intr_close\n"));
2795
2796         sc->sc_intrxfer = NULL;
2797 }
2798
2799 /************************/
2800
2801 Static usbd_status
2802 ohci_device_ctrl_transfer(usbd_xfer_handle xfer)
2803 {
2804         usbd_status err;
2805
2806         /* Insert last in queue. */
2807         err = usb_insert_transfer(xfer);
2808         if (err)
2809                 return (err);
2810
2811         /* Pipe isn't running, start first */
2812         return (ohci_device_ctrl_start(SIMPLEQ_FIRST(&xfer->pipe->queue)));
2813 }
2814
2815 Static usbd_status
2816 ohci_device_ctrl_start(usbd_xfer_handle xfer)
2817 {
2818         ohci_softc_t *sc = (ohci_softc_t *)xfer->pipe->device->bus;
2819         usbd_status err;
2820
2821         if (sc->sc_dying)
2822                 return (USBD_IOERROR);
2823
2824 #ifdef DIAGNOSTIC
2825         if (!(xfer->rqflags & URQ_REQUEST)) {
2826                 /* XXX panic */
2827                 printf("ohci_device_ctrl_transfer: not a request\n");
2828                 return (USBD_INVAL);
2829         }
2830 #endif
2831
2832         err = ohci_device_request(xfer);
2833         if (err)
2834                 return (err);
2835
2836         if (sc->sc_bus.use_polling)
2837                 ohci_waitintr(sc, xfer);
2838         return (USBD_IN_PROGRESS);
2839 }
2840
2841 /* Abort a device control request. */
2842 Static void
2843 ohci_device_ctrl_abort(usbd_xfer_handle xfer)
2844 {
2845         DPRINTF(("ohci_device_ctrl_abort: xfer=%p\n", xfer));
2846         ohci_abort_xfer(xfer, USBD_CANCELLED);
2847 }
2848
2849 /* Close a device control pipe. */
2850 Static void
2851 ohci_device_ctrl_close(usbd_pipe_handle pipe)
2852 {
2853         struct ohci_pipe *opipe = (struct ohci_pipe *)pipe;
2854         ohci_softc_t *sc = (ohci_softc_t *)pipe->device->bus;
2855
2856         DPRINTF(("ohci_device_ctrl_close: pipe=%p\n", pipe));
2857         ohci_close_pipe(pipe, sc->sc_ctrl_head);
2858         ohci_free_std(sc, opipe->tail.td);
2859 }
2860
2861 /************************/
2862
2863 Static void
2864 ohci_device_clear_toggle(usbd_pipe_handle pipe)
2865 {
2866         struct ohci_pipe *opipe = (struct ohci_pipe *)pipe;
2867
2868         opipe->sed->ed.ed_headp &= htole32(~OHCI_TOGGLECARRY);
2869 }
2870
2871 Static void
2872 ohci_noop(usbd_pipe_handle pipe)
2873 {
2874 }
2875
2876 Static usbd_status
2877 ohci_device_bulk_transfer(usbd_xfer_handle xfer)
2878 {
2879         usbd_status err;
2880
2881         /* Insert last in queue. */
2882         err = usb_insert_transfer(xfer);
2883         if (err)
2884                 return (err);
2885
2886         /* Pipe isn't running, start first */
2887         return (ohci_device_bulk_start(SIMPLEQ_FIRST(&xfer->pipe->queue)));
2888 }
2889
2890 Static usbd_status
2891 ohci_device_bulk_start(usbd_xfer_handle xfer)
2892 {
2893         struct ohci_pipe *opipe = (struct ohci_pipe *)xfer->pipe;
2894         usbd_device_handle dev = opipe->pipe.device;
2895         ohci_softc_t *sc = (ohci_softc_t *)dev->bus;
2896         int addr = dev->address;
2897         ohci_soft_td_t *data, *tail, *tdp;
2898         ohci_soft_ed_t *sed;
2899         int len, isread, endpt;
2900         usbd_status err;
2901
2902         if (sc->sc_dying)
2903                 return (USBD_IOERROR);
2904
2905 #ifdef DIAGNOSTIC
2906         if (xfer->rqflags & URQ_REQUEST) {
2907                 /* XXX panic */
2908                 printf("ohci_device_bulk_start: a request\n");
2909                 return (USBD_INVAL);
2910         }
2911 #endif
2912
2913         len = xfer->length;
2914         endpt = xfer->pipe->endpoint->edesc->bEndpointAddress;
2915         isread = UE_GET_DIR(endpt) == UE_DIR_IN;
2916         sed = opipe->sed;
2917
2918         DPRINTFN(4,("ohci_device_bulk_start: xfer=%p len=%d isread=%d "
2919                     "flags=%d endpt=%d\n", xfer, len, isread, xfer->flags,
2920                     endpt));
2921
2922         opipe->u.bulk.isread = isread;
2923         opipe->u.bulk.length = len;
2924
2925         /* Update device address */
2926         sed->ed.ed_flags = htole32(
2927                 (le32toh(sed->ed.ed_flags) & ~OHCI_ED_ADDRMASK) |
2928                 OHCI_ED_SET_FA(addr));
2929
2930         /* Allocate a chain of new TDs (including a new tail). */
2931         data = opipe->tail.td;
2932         err = ohci_alloc_std_chain(opipe, sc, len, isread, xfer,
2933                   data, &tail);
2934         /* We want interrupt at the end of the transfer. */
2935         tail->td.td_flags &= htole32(~OHCI_TD_INTR_MASK);
2936         tail->td.td_flags |= htole32(OHCI_TD_SET_DI(1));
2937         tail->flags |= OHCI_CALL_DONE;
2938         tail = tail->nexttd;    /* point at sentinel */
2939         if (err)
2940                 return (err);
2941
2942         tail->xfer = NULL;
2943         xfer->hcpriv = data;
2944
2945         DPRINTFN(4,("ohci_device_bulk_start: ed_flags=0x%08x td_flags=0x%08x "
2946                     "td_cbp=0x%08x td_be=0x%08x\n",
2947                     (int)le32toh(sed->ed.ed_flags),
2948                     (int)le32toh(data->td.td_flags),
2949                     (int)le32toh(data->td.td_cbp),
2950                     (int)le32toh(data->td.td_be)));
2951
2952 #ifdef USB_DEBUG
2953         if (ohcidebug > 5) {
2954                 ohci_dump_ed(sed);
2955                 ohci_dump_tds(data);
2956         }
2957 #endif
2958
2959         /* Insert ED in schedule */
2960         crit_enter();
2961         for (tdp = data; tdp != tail; tdp = tdp->nexttd) {
2962                 tdp->xfer = xfer;
2963         }
2964         sed->ed.ed_tailp = htole32(tail->physaddr);
2965         opipe->tail.td = tail;
2966         sed->ed.ed_flags &= htole32(~OHCI_ED_SKIP);
2967         OWRITE4(sc, OHCI_COMMAND_STATUS, OHCI_BLF);
2968         if (xfer->timeout && !sc->sc_bus.use_polling) {
2969                 usb_callout(xfer->timeout_handle, MS_TO_TICKS(xfer->timeout),
2970                             ohci_timeout, xfer);
2971         }
2972
2973 #if 0
2974 /* This goes wrong if we are too slow. */
2975         if (ohcidebug > 10) {
2976                 delay(10000);
2977                 DPRINTF(("ohci_device_intr_transfer: status=%x\n",
2978                          OREAD4(sc, OHCI_COMMAND_STATUS)));
2979                 ohci_dump_ed(sed);
2980                 ohci_dump_tds(data);
2981         }
2982 #endif
2983
2984         crit_exit();
2985
2986         return (USBD_IN_PROGRESS);
2987 }
2988
2989 Static void
2990 ohci_device_bulk_abort(usbd_xfer_handle xfer)
2991 {
2992         DPRINTF(("ohci_device_bulk_abort: xfer=%p\n", xfer));
2993         ohci_abort_xfer(xfer, USBD_CANCELLED);
2994 }
2995
2996 /*
2997  * Close a device bulk pipe.
2998  */
2999 Static void
3000 ohci_device_bulk_close(usbd_pipe_handle pipe)
3001 {
3002         struct ohci_pipe *opipe = (struct ohci_pipe *)pipe;
3003         ohci_softc_t *sc = (ohci_softc_t *)pipe->device->bus;
3004
3005         DPRINTF(("ohci_device_bulk_close: pipe=%p\n", pipe));
3006         ohci_close_pipe(pipe, sc->sc_bulk_head);
3007         ohci_free_std(sc, opipe->tail.td);
3008 }
3009
3010 /************************/
3011
3012 Static usbd_status
3013 ohci_device_intr_transfer(usbd_xfer_handle xfer)
3014 {
3015         usbd_status err;
3016
3017         /* Insert last in queue. */
3018         err = usb_insert_transfer(xfer);
3019         if (err)
3020                 return (err);
3021
3022         /* Pipe isn't running, start first */
3023         return (ohci_device_intr_start(SIMPLEQ_FIRST(&xfer->pipe->queue)));
3024 }
3025
3026 Static usbd_status
3027 ohci_device_intr_start(usbd_xfer_handle xfer)
3028 {
3029         struct ohci_pipe *opipe = (struct ohci_pipe *)xfer->pipe;
3030         usbd_device_handle dev = opipe->pipe.device;
3031         ohci_softc_t *sc = (ohci_softc_t *)dev->bus;
3032         ohci_soft_ed_t *sed = opipe->sed;
3033         ohci_soft_td_t *data, *tail;
3034         int len;
3035
3036         if (sc->sc_dying)
3037                 return (USBD_IOERROR);
3038
3039         DPRINTFN(3, ("ohci_device_intr_transfer: xfer=%p len=%d "
3040                      "flags=%d priv=%p\n",
3041                      xfer, xfer->length, xfer->flags, xfer->priv));
3042
3043 #ifdef DIAGNOSTIC
3044         if (xfer->rqflags & URQ_REQUEST)
3045                 panic("ohci_device_intr_transfer: a request");
3046 #endif
3047
3048         len = xfer->length;
3049
3050         data = opipe->tail.td;
3051         tail = ohci_alloc_std(sc);
3052         if (tail == NULL)
3053                 return (USBD_NOMEM);
3054         tail->xfer = NULL;
3055
3056         data->td.td_flags = htole32(
3057                 OHCI_TD_IN | OHCI_TD_NOCC |
3058                 OHCI_TD_SET_DI(1) | OHCI_TD_TOGGLE_CARRY);
3059         if (xfer->flags & USBD_SHORT_XFER_OK)
3060                 data->td.td_flags |= htole32(OHCI_TD_R);
3061         data->td.td_cbp = htole32(DMAADDR(&xfer->dmabuf, 0));
3062         data->nexttd = tail;
3063         data->td.td_nexttd = htole32(tail->physaddr);
3064         data->td.td_be = htole32(le32toh(data->td.td_cbp) + len - 1);
3065         data->len = len;
3066         data->xfer = xfer;
3067         data->flags = OHCI_CALL_DONE | OHCI_ADD_LEN;
3068         xfer->hcpriv = data;
3069
3070 #ifdef USB_DEBUG
3071         if (ohcidebug > 5) {
3072                 DPRINTF(("ohci_device_intr_transfer:\n"));
3073                 ohci_dump_ed(sed);
3074                 ohci_dump_tds(data);
3075         }
3076 #endif
3077
3078         /* Insert ED in schedule */
3079         crit_enter();
3080         sed->ed.ed_tailp = htole32(tail->physaddr);
3081         opipe->tail.td = tail;
3082         sed->ed.ed_flags &= htole32(~OHCI_ED_SKIP);
3083
3084 #if 0
3085 /*
3086  * This goes horribly wrong, printing thousands of descriptors,
3087  * because false references are followed due to the fact that the
3088  * TD is gone.
3089  */
3090         if (ohcidebug > 5) {
3091                 usb_delay_ms(&sc->sc_bus, 5);
3092                 DPRINTF(("ohci_device_intr_transfer: status=%x\n",
3093                          OREAD4(sc, OHCI_COMMAND_STATUS)));
3094                 ohci_dump_ed(sed);
3095                 ohci_dump_tds(data);
3096         }
3097 #endif
3098         crit_exit();
3099
3100         return (USBD_IN_PROGRESS);
3101 }
3102
3103 /* Abort a device control request. */
3104 Static void
3105 ohci_device_intr_abort(usbd_xfer_handle xfer)
3106 {
3107         if (xfer->pipe->intrxfer == xfer) {
3108                 DPRINTF(("ohci_device_intr_abort: remove\n"));
3109                 xfer->pipe->intrxfer = NULL;
3110         }
3111         ohci_abort_xfer(xfer, USBD_CANCELLED);
3112 }
3113
3114 /* Close a device interrupt pipe. */
3115 Static void
3116 ohci_device_intr_close(usbd_pipe_handle pipe)
3117 {
3118         struct ohci_pipe *opipe = (struct ohci_pipe *)pipe;
3119         ohci_softc_t *sc = (ohci_softc_t *)pipe->device->bus;
3120         int nslots = opipe->u.intr.nslots;
3121         int pos = opipe->u.intr.pos;
3122         int j;
3123         ohci_soft_ed_t *p, *sed = opipe->sed;
3124
3125         DPRINTFN(1,("ohci_device_intr_close: pipe=%p nslots=%d pos=%d\n",
3126                     pipe, nslots, pos));
3127         crit_enter();
3128         sed->ed.ed_flags |= htole32(OHCI_ED_SKIP);
3129         if ((le32toh(sed->ed.ed_tailp) & OHCI_HEADMASK) !=
3130             (le32toh(sed->ed.ed_headp) & OHCI_HEADMASK))
3131                 usb_delay_ms(&sc->sc_bus, 2);
3132 #ifdef DIAGNOSTIC
3133         if ((le32toh(sed->ed.ed_tailp) & OHCI_HEADMASK) !=
3134             (le32toh(sed->ed.ed_headp) & OHCI_HEADMASK))
3135                 panic("%s: Intr pipe %p still has TDs queued",
3136                         USBDEVNAME(sc->sc_bus.bdev), pipe);
3137 #endif
3138
3139         for (p = sc->sc_eds[pos]; p && p->next != sed; p = p->next)
3140                 ;
3141 #ifdef DIAGNOSTIC
3142         if (p == NULL)
3143                 panic("ohci_device_intr_close: ED not found");
3144 #endif
3145         p->next = sed->next;
3146         p->ed.ed_nexted = sed->ed.ed_nexted;
3147         crit_exit();
3148
3149         for (j = 0; j < nslots; j++)
3150                 --sc->sc_bws[(pos * nslots + j) % OHCI_NO_INTRS];
3151
3152         ohci_free_std(sc, opipe->tail.td);
3153         ohci_free_sed(sc, opipe->sed);
3154 }
3155
3156 Static usbd_status
3157 ohci_device_setintr(ohci_softc_t *sc, struct ohci_pipe *opipe, int ival)
3158 {
3159         int i, j, best;
3160         u_int npoll, slow, shigh, nslots;
3161         u_int bestbw, bw;
3162         ohci_soft_ed_t *hsed, *sed = opipe->sed;
3163
3164         DPRINTFN(2, ("ohci_setintr: pipe=%p\n", opipe));
3165         if (ival == 0) {
3166                 printf("ohci_setintr: 0 interval\n");
3167                 return (USBD_INVAL);
3168         }
3169
3170         npoll = OHCI_NO_INTRS;
3171         while (npoll > ival)
3172                 npoll /= 2;
3173         DPRINTFN(2, ("ohci_setintr: ival=%d npoll=%d\n", ival, npoll));
3174
3175         /*
3176          * We now know which level in the tree the ED must go into.
3177          * Figure out which slot has most bandwidth left over.
3178          * Slots to examine:
3179          * npoll
3180          * 1    0
3181          * 2    1 2
3182          * 4    3 4 5 6
3183          * 8    7 8 9 10 11 12 13 14
3184          * N    (N-1) .. (N-1+N-1)
3185          */
3186         slow = npoll-1;
3187         shigh = slow + npoll;
3188         nslots = OHCI_NO_INTRS / npoll;
3189         for (best = i = slow, bestbw = ~0; i < shigh; i++) {
3190                 bw = 0;
3191                 for (j = 0; j < nslots; j++)
3192                         bw += sc->sc_bws[(i * nslots + j) % OHCI_NO_INTRS];
3193                 if (bw < bestbw) {
3194                         best = i;
3195                         bestbw = bw;
3196                 }
3197         }
3198         DPRINTFN(2, ("ohci_setintr: best=%d(%d..%d) bestbw=%d\n",
3199                      best, slow, shigh, bestbw));
3200
3201         crit_enter();
3202         hsed = sc->sc_eds[best];
3203         sed->next = hsed->next;
3204         sed->ed.ed_nexted = hsed->ed.ed_nexted;
3205         hsed->next = sed;
3206         hsed->ed.ed_nexted = htole32(sed->physaddr);
3207         crit_exit();
3208
3209         for (j = 0; j < nslots; j++)
3210                 ++sc->sc_bws[(best * nslots + j) % OHCI_NO_INTRS];
3211         opipe->u.intr.nslots = nslots;
3212         opipe->u.intr.pos = best;
3213
3214         DPRINTFN(5, ("ohci_setintr: returns %p\n", opipe));
3215         return (USBD_NORMAL_COMPLETION);
3216 }
3217
3218 /***********************/
3219
3220 usbd_status
3221 ohci_device_isoc_transfer(usbd_xfer_handle xfer)
3222 {
3223         usbd_status err;
3224
3225         DPRINTFN(5,("ohci_device_isoc_transfer: xfer=%p\n", xfer));
3226
3227         /* Put it on our queue, */
3228         err = usb_insert_transfer(xfer);
3229
3230         /* bail out on error, */
3231         if (err && err != USBD_IN_PROGRESS)
3232                 return (err);
3233
3234         /* XXX should check inuse here */
3235
3236         /* insert into schedule, */
3237         ohci_device_isoc_enter(xfer);
3238
3239         /* and start if the pipe wasn't running */
3240         if (!err)
3241                 ohci_device_isoc_start(SIMPLEQ_FIRST(&xfer->pipe->queue));
3242
3243         return (err);
3244 }
3245
3246 void
3247 ohci_device_isoc_enter(usbd_xfer_handle xfer)
3248 {
3249         struct ohci_pipe *opipe = (struct ohci_pipe *)xfer->pipe;
3250         usbd_device_handle dev = opipe->pipe.device;
3251         ohci_softc_t *sc = (ohci_softc_t *)dev->bus;
3252         ohci_soft_ed_t *sed = opipe->sed;
3253         struct iso *iso = &opipe->u.iso;
3254         struct ohci_xfer *oxfer = (struct ohci_xfer *)xfer;
3255         ohci_soft_itd_t *sitd, *nsitd;
3256         ohci_physaddr_t buf, offs, noffs, bp0, tdphys;
3257         int i, ncur, nframes;
3258
3259         DPRINTFN(1,("ohci_device_isoc_enter: used=%d next=%d xfer=%p "
3260                     "nframes=%d\n",
3261                     iso->inuse, iso->next, xfer, xfer->nframes));
3262
3263         if (sc->sc_dying)
3264                 return;
3265
3266         if (iso->next == -1) {
3267                 /* Not in use yet, schedule it a few frames ahead. */
3268                 iso->next = le32toh(sc->sc_hcca->hcca_frame_number) + 5;
3269                 DPRINTFN(2,("ohci_device_isoc_enter: start next=%d\n",
3270                             iso->next));
3271         }
3272
3273         if (xfer->hcpriv) {
3274                 for (sitd = xfer->hcpriv; sitd != NULL && sitd->xfer == xfer;
3275                     sitd = sitd->nextitd)
3276                         ohci_free_sitd(sc, sitd); /* Free ITDs in prev xfer*/
3277
3278                 if (sitd == NULL) {
3279                         sitd = ohci_alloc_sitd(sc);
3280                         if (sitd == NULL)
3281                                 panic("cant alloc isoc");
3282                         opipe->tail.itd = sitd;
3283                         tdphys = sitd->physaddr;
3284                         sed->ed.ed_flags |= htole32(OHCI_ED_SKIP); /* Stop*/
3285                         sed->ed.ed_headp =
3286                         sed->ed.ed_tailp = htole32(tdphys);
3287                         sed->ed.ed_flags &= htole32(~OHCI_ED_SKIP); /* Start.*/
3288                 }
3289         }
3290
3291         sitd = opipe->tail.itd;
3292         buf = DMAADDR(&xfer->dmabuf, 0);
3293         bp0 = OHCI_PAGE(buf);
3294         offs = OHCI_PAGE_OFFSET(buf);
3295         nframes = xfer->nframes;
3296         xfer->hcpriv = sitd;
3297         for (i = ncur = 0; i < nframes; i++, ncur++) {
3298                 noffs = offs + xfer->frlengths[i];
3299                 if (ncur == OHCI_ITD_NOFFSET || /* all offsets used */
3300                     OHCI_PAGE(buf + noffs) > bp0 + OHCI_PAGE_SIZE) { /* too many page crossings */
3301
3302                         /* Allocate next ITD */
3303                         nsitd = ohci_alloc_sitd(sc);
3304                         if (nsitd == NULL) {
3305                                 /* XXX what now? */
3306                                 printf("%s: isoc TD alloc failed\n",
3307                                        USBDEVNAME(sc->sc_bus.bdev));
3308                                 return;
3309                         }
3310
3311                         /* Fill current ITD */
3312                         sitd->itd.itd_flags = htole32(
3313                                 OHCI_ITD_NOCC |
3314                                 OHCI_ITD_SET_SF(iso->next) |
3315                                 OHCI_ITD_SET_DI(6) | /* delay intr a little */
3316                                 OHCI_ITD_SET_FC(ncur));
3317                         sitd->itd.itd_bp0 = htole32(bp0);
3318                         sitd->nextitd = nsitd;
3319                         sitd->itd.itd_nextitd = htole32(nsitd->physaddr);
3320                         sitd->itd.itd_be = htole32(bp0 + offs - 1);
3321                         sitd->xfer = xfer;
3322                         sitd->flags = OHCI_ITD_ACTIVE;
3323
3324                         sitd = nsitd;
3325                         iso->next = iso->next + ncur;
3326                         bp0 = OHCI_PAGE(buf + offs);
3327                         ncur = 0;
3328                 }
3329                 sitd->itd.itd_offset[ncur] = htole16(OHCI_ITD_MK_OFFS(offs));
3330                 offs = noffs;
3331         }
3332         nsitd = ohci_alloc_sitd(sc);
3333         if (nsitd == NULL) {
3334                 /* XXX what now? */
3335                 printf("%s: isoc TD alloc failed\n",
3336                        USBDEVNAME(sc->sc_bus.bdev));
3337                 return;
3338         }
3339         /* Fixup last used ITD */
3340         sitd->itd.itd_flags = htole32(
3341                 OHCI_ITD_NOCC |
3342                 OHCI_ITD_SET_SF(iso->next) |
3343                 OHCI_ITD_SET_DI(0) |
3344                 OHCI_ITD_SET_FC(ncur));
3345         sitd->itd.itd_bp0 = htole32(bp0);
3346         sitd->nextitd = nsitd;
3347         sitd->itd.itd_nextitd = htole32(nsitd->physaddr);
3348         sitd->itd.itd_be = htole32(bp0 + offs - 1);
3349         sitd->xfer = xfer;
3350         sitd->flags = OHCI_CALL_DONE | OHCI_ITD_ACTIVE;
3351
3352         iso->next = iso->next + ncur;
3353         iso->inuse += nframes;
3354
3355         xfer->actlen = offs;    /* XXX pretend we did it all */
3356
3357         xfer->status = USBD_IN_PROGRESS;
3358
3359         oxfer->ohci_xfer_flags |= OHCI_ISOC_DIRTY;
3360
3361 #ifdef USB_DEBUG
3362         if (ohcidebug > 5) {
3363                 DPRINTF(("ohci_device_isoc_enter: frame=%d\n",
3364                          le32toh(sc->sc_hcca->hcca_frame_number)));
3365                 ohci_dump_itds(xfer->hcpriv);
3366                 ohci_dump_ed(sed);
3367         }
3368 #endif
3369
3370         crit_enter();
3371         sed->ed.ed_tailp = htole32(nsitd->physaddr);
3372         opipe->tail.itd = nsitd;
3373         sed->ed.ed_flags &= htole32(~OHCI_ED_SKIP);
3374         crit_exit();
3375
3376 #ifdef USB_DEBUG
3377         if (ohcidebug > 5) {
3378                 delay(150000);
3379                 DPRINTF(("ohci_device_isoc_enter: after frame=%d\n",
3380                          le32toh(sc->sc_hcca->hcca_frame_number)));
3381                 ohci_dump_itds(xfer->hcpriv);
3382                 ohci_dump_ed(sed);
3383         }
3384 #endif
3385 }
3386
3387 usbd_status
3388 ohci_device_isoc_start(usbd_xfer_handle xfer)
3389 {
3390         struct ohci_pipe *opipe = (struct ohci_pipe *)xfer->pipe;
3391         ohci_softc_t *sc = (ohci_softc_t *)opipe->pipe.device->bus;
3392         ohci_soft_ed_t *sed;
3393
3394         DPRINTFN(5,("ohci_device_isoc_start: xfer=%p\n", xfer));
3395
3396         if (sc->sc_dying)
3397                 return (USBD_IOERROR);
3398
3399 #ifdef DIAGNOSTIC
3400         if (xfer->status != USBD_IN_PROGRESS)
3401                 printf("ohci_device_isoc_start: not in progress %p\n", xfer);
3402 #endif
3403
3404         /* XXX anything to do? */
3405
3406         crit_enter();
3407         sed = opipe->sed;  /*  Turn off ED skip-bit to start processing */
3408         sed->ed.ed_flags &= htole32(~OHCI_ED_SKIP);    /* ED's ITD list.*/
3409         crit_exit();
3410
3411         return (USBD_IN_PROGRESS);
3412 }
3413
3414 void
3415 ohci_device_isoc_abort(usbd_xfer_handle xfer)
3416 {
3417         struct ohci_pipe *opipe = (struct ohci_pipe *)xfer->pipe;
3418         ohci_softc_t *sc = (ohci_softc_t *)opipe->pipe.device->bus;
3419         ohci_soft_ed_t *sed;
3420         ohci_soft_itd_t *sitd, *tmp_sitd;
3421         int undone,num_sitds;
3422
3423         crit_enter();
3424         opipe->aborting = 1;
3425
3426         DPRINTFN(1,("ohci_device_isoc_abort: xfer=%p\n", xfer));
3427
3428         /* Transfer is already done. */
3429         if (xfer->status != USBD_NOT_STARTED &&
3430             xfer->status != USBD_IN_PROGRESS) {
3431                 crit_exit();
3432                 printf("ohci_device_isoc_abort: early return\n");
3433                 return;
3434         }
3435
3436         /* Give xfer the requested abort code. */
3437         xfer->status = USBD_CANCELLED;
3438
3439         sed = opipe->sed;
3440         sed->ed.ed_flags |= htole32(OHCI_ED_SKIP); /* force hardware skip */
3441
3442         num_sitds = 0;
3443         sitd = xfer->hcpriv;
3444 #ifdef DIAGNOSTIC
3445         if (sitd == NULL) {
3446                 crit_exit();
3447                 printf("ohci_device_isoc_abort: hcpriv==0\n");
3448                 return;
3449         }
3450 #endif
3451         for (; sitd != NULL && sitd->xfer == xfer; sitd = sitd->nextitd) {
3452                 num_sitds++;
3453 #ifdef DIAGNOSTIC
3454                 DPRINTFN(1,("abort sets done sitd=%p\n", sitd));
3455                 sitd->isdone = 1;
3456 #endif
3457         }
3458
3459         crit_exit();
3460
3461         /*
3462          * Each sitd has up to OHCI_ITD_NOFFSET transfers, each can
3463          * take a usb 1ms cycle. Conservatively wait for it to drain.
3464          * Even with DMA done, it can take awhile for the "batch"
3465          * delivery of completion interrupts to occur thru the controller.
3466          */
3467  
3468         do {
3469                 usb_delay_ms(&sc->sc_bus, 2*(num_sitds*OHCI_ITD_NOFFSET));
3470
3471                 undone   = 0;
3472                 tmp_sitd = xfer->hcpriv;
3473                 for (; tmp_sitd != NULL && tmp_sitd->xfer == xfer;
3474                     tmp_sitd = tmp_sitd->nextitd) {
3475                         if (OHCI_CC_NO_ERROR ==
3476                             OHCI_ITD_GET_CC(le32toh(tmp_sitd->itd.itd_flags)) &&
3477                             tmp_sitd->flags & OHCI_ITD_ACTIVE &&
3478                             (tmp_sitd->flags & OHCI_ITD_INTFIN) == 0)
3479                                 undone++;
3480                 }
3481         } while( undone != 0 );
3482
3483         crit_enter();
3484
3485         /* Run callback. */
3486         usb_transfer_complete(xfer);
3487
3488         if (sitd != NULL)
3489                 /*
3490                  * Only if there is a `next' sitd in next xfer...
3491                  * unlink this xfer's sitds.
3492                  */
3493                 sed->ed.ed_headp = htole32(sitd->physaddr);
3494         else
3495                 sed->ed.ed_headp = 0;
3496
3497         sed->ed.ed_flags &= htole32(~OHCI_ED_SKIP); /* remove hardware skip */
3498
3499         crit_exit();
3500 }
3501
3502 void
3503 ohci_device_isoc_done(usbd_xfer_handle xfer)
3504 {
3505         /* This null routine corresponds to non-isoc "done()" routines
3506          * that free the stds associated with an xfer after a completed
3507          * xfer interrupt. However, in the case of isoc transfers, the
3508          * sitds associated with the transfer have already been processed
3509          * and reallocated for the next iteration by
3510          * "ohci_device_isoc_transfer()".
3511          *
3512          * Routine "usb_transfer_complete()" is called at the end of every
3513          * relevant usb interrupt. "usb_transfer_complete()" indirectly
3514          * calls 1) "ohci_device_isoc_transfer()" (which keeps pumping the
3515          * pipeline by setting up the next transfer iteration) and 2) then 
3516          * calls "ohci_device_isoc_done()". Isoc transfers have not been 
3517          * working for the ohci usb because this routine was trashing the
3518          * xfer set up for the next iteration (thus, only the first 
3519          * UGEN_NISOREQS xfers outstanding on an open would work). Perhaps
3520          * this could all be re-factored, but that's another pass...
3521          */
3522 }
3523
3524 usbd_status
3525 ohci_setup_isoc(usbd_pipe_handle pipe)
3526 {
3527         struct ohci_pipe *opipe = (struct ohci_pipe *)pipe;
3528         ohci_softc_t *sc = (ohci_softc_t *)pipe->device->bus;
3529         struct iso *iso = &opipe->u.iso;
3530
3531         iso->next = -1;
3532         iso->inuse = 0;
3533
3534         crit_enter();
3535         ohci_add_ed(opipe->sed, sc->sc_isoc_head);
3536         crit_exit();
3537
3538         return (USBD_NORMAL_COMPLETION);
3539 }
3540
3541 void
3542 ohci_device_isoc_close(usbd_pipe_handle pipe)
3543 {
3544         struct ohci_pipe *opipe = (struct ohci_pipe *)pipe;
3545         ohci_softc_t *sc = (ohci_softc_t *)pipe->device->bus;
3546         ohci_soft_ed_t *sed;
3547
3548         DPRINTF(("ohci_device_isoc_close: pipe=%p\n", pipe));
3549
3550         sed = opipe->sed;
3551         sed->ed.ed_flags |= htole32(OHCI_ED_SKIP); /* Stop device. */
3552
3553         ohci_close_pipe(pipe, sc->sc_isoc_head); /* Stop isoc list, free ED.*/
3554
3555         /* up to NISOREQs xfers still outstanding. */
3556
3557 #ifdef DIAGNOSTIC
3558         opipe->tail.itd->isdone = 1;
3559 #endif
3560         ohci_free_sitd(sc, opipe->tail.itd);    /* Next `avail free' sitd.*/
3561 }