2 * $NetBSD: ohci.c,v 1.138 2003/02/08 03:32:50 ichiro Exp $
3 * $FreeBSD: src/sys/dev/usb/ohci.c,v 1.141 2003/12/22 15:40:10 shiba Exp $
4 * $DragonFly: src/sys/bus/usb/ohci.c,v 1.11 2005/06/10 18:33:04 dillon Exp $
6 /* Also, already ported:
7 * $NetBSD: ohci.c,v 1.140 2003/05/13 04:42:00 gson Exp $
8 * $NetBSD: ohci.c,v 1.141 2003/09/10 20:08:29 mycroft Exp $
9 * $NetBSD: ohci.c,v 1.142 2003/10/11 03:04:26 toshii Exp $
10 * $NetBSD: ohci.c,v 1.143 2003/10/18 04:50:35 simonb Exp $
11 * $NetBSD: 1.144 - 1.150 ported
15 * Copyright (c) 1998 The NetBSD Foundation, Inc.
16 * All rights reserved.
18 * This code is derived from software contributed to The NetBSD Foundation
19 * by Lennart Augustsson (lennart@augustsson.net) at
20 * Carlstedt Research & Technology.
22 * Redistribution and use in source and binary forms, with or without
23 * modification, are permitted provided that the following conditions
25 * 1. Redistributions of source code must retain the above copyright
26 * notice, this list of conditions and the following disclaimer.
27 * 2. Redistributions in binary form must reproduce the above copyright
28 * notice, this list of conditions and the following disclaimer in the
29 * documentation and/or other materials provided with the distribution.
30 * 3. All advertising materials mentioning features or use of this software
31 * must display the following acknowledgement:
32 * This product includes software developed by the NetBSD
33 * Foundation, Inc. and its contributors.
34 * 4. Neither the name of The NetBSD Foundation nor the names of its
35 * contributors may be used to endorse or promote products derived
36 * from this software without specific prior written permission.
38 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
39 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
40 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
41 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
42 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
43 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
44 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
45 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
46 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
47 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
48 * POSSIBILITY OF SUCH DAMAGE.
52 * USB Open Host Controller driver.
54 * OHCI spec: http://www.compaq.com/productinfo/development/openhci.html
55 * USB spec: http://www.usb.org/developers/docs/usbspec.zip
58 #include <sys/param.h>
59 #include <sys/systm.h>
60 #include <sys/malloc.h>
61 #include <sys/kernel.h>
62 #if defined(__NetBSD__) || defined(__OpenBSD__)
63 #include <sys/device.h>
64 #include <sys/select.h>
65 #elif defined(__FreeBSD__) || defined(__DragonFly__)
66 #include <sys/endian.h>
67 #include <sys/module.h>
69 #include <machine/bus_pio.h>
70 #include <machine/bus_memio.h>
71 #if defined(DIAGNOSTIC) && defined(__i386__)
72 #include <machine/cpu.h>
76 #include <sys/queue.h>
77 #include <sys/sysctl.h>
79 #include <sys/thread2.h>
81 #include <machine/bus.h>
82 #include <machine/endian.h>
88 #include "usb_quirks.h"
93 #if defined(__FreeBSD__) || defined(__DragonFly__)
94 #include <machine/clock.h>
96 #define delay(d) DELAY(d)
99 #if defined(__OpenBSD__)
100 struct cfdriver ohci_cd = {
101 NULL, "ohci", DV_DULL
106 #define DPRINTF(x) if (ohcidebug) logprintf x
107 #define DPRINTFN(n,x) if (ohcidebug>(n)) logprintf x
109 SYSCTL_NODE(_hw_usb, OID_AUTO, ohci, CTLFLAG_RW, 0, "USB ohci");
110 SYSCTL_INT(_hw_usb_ohci, OID_AUTO, debug, CTLFLAG_RW,
111 &ohcidebug, 0, "ohci debug level");
113 #define bitmask_snprintf(q,f,b,l) snprintf((b), (l), "%b", (q), (f))
117 #define DPRINTFN(n,x)
121 * The OHCI controller is little endian, so on big endian machines
122 * the data strored in memory needs to be swapped.
124 #if defined(__OpenBSD__)
125 #if BYTE_ORDER == BIG_ENDIAN
126 #define htole32(x) (bswap32(x))
127 #define le32toh(x) (bswap32(x))
129 #define htole32(x) (x)
130 #define le32toh(x) (x)
136 Static ohci_soft_ed_t *ohci_alloc_sed(ohci_softc_t *);
137 Static void ohci_free_sed(ohci_softc_t *, ohci_soft_ed_t *);
139 Static ohci_soft_td_t *ohci_alloc_std(ohci_softc_t *);
140 Static void ohci_free_std(ohci_softc_t *, ohci_soft_td_t *);
142 Static ohci_soft_itd_t *ohci_alloc_sitd(ohci_softc_t *);
143 Static void ohci_free_sitd(ohci_softc_t *,ohci_soft_itd_t *);
146 Static void ohci_free_std_chain(ohci_softc_t *, ohci_soft_td_t *,
149 Static usbd_status ohci_alloc_std_chain(struct ohci_pipe *,
150 ohci_softc_t *, int, int, usbd_xfer_handle,
151 ohci_soft_td_t *, ohci_soft_td_t **);
153 #if defined(__NetBSD__) || defined(__OpenBSD__)
154 Static void ohci_shutdown(void *v);
155 Static void ohci_power(int, void *);
157 Static usbd_status ohci_open(usbd_pipe_handle);
158 Static void ohci_poll(struct usbd_bus *);
159 Static void ohci_softintr(void *);
160 Static void ohci_waitintr(ohci_softc_t *, usbd_xfer_handle);
161 Static void ohci_add_done(ohci_softc_t *, ohci_physaddr_t);
162 Static void ohci_rhsc(ohci_softc_t *, usbd_xfer_handle);
164 Static usbd_status ohci_device_request(usbd_xfer_handle xfer);
165 Static void ohci_add_ed(ohci_soft_ed_t *, ohci_soft_ed_t *);
166 Static void ohci_rem_ed(ohci_soft_ed_t *, ohci_soft_ed_t *);
167 Static void ohci_hash_add_td(ohci_softc_t *, ohci_soft_td_t *);
168 Static void ohci_hash_rem_td(ohci_softc_t *, ohci_soft_td_t *);
169 Static ohci_soft_td_t *ohci_hash_find_td(ohci_softc_t *, ohci_physaddr_t);
170 Static void ohci_hash_add_itd(ohci_softc_t *, ohci_soft_itd_t *);
171 Static void ohci_hash_rem_itd(ohci_softc_t *, ohci_soft_itd_t *);
172 Static ohci_soft_itd_t *ohci_hash_find_itd(ohci_softc_t *, ohci_physaddr_t);
174 Static usbd_status ohci_setup_isoc(usbd_pipe_handle pipe);
175 Static void ohci_device_isoc_enter(usbd_xfer_handle);
177 Static usbd_status ohci_allocm(struct usbd_bus *, usb_dma_t *, u_int32_t);
178 Static void ohci_freem(struct usbd_bus *, usb_dma_t *);
180 Static usbd_xfer_handle ohci_allocx(struct usbd_bus *);
181 Static void ohci_freex(struct usbd_bus *, usbd_xfer_handle);
183 Static usbd_status ohci_root_ctrl_transfer(usbd_xfer_handle);
184 Static usbd_status ohci_root_ctrl_start(usbd_xfer_handle);
185 Static void ohci_root_ctrl_abort(usbd_xfer_handle);
186 Static void ohci_root_ctrl_close(usbd_pipe_handle);
187 Static void ohci_root_ctrl_done(usbd_xfer_handle);
189 Static usbd_status ohci_root_intr_transfer(usbd_xfer_handle);
190 Static usbd_status ohci_root_intr_start(usbd_xfer_handle);
191 Static void ohci_root_intr_abort(usbd_xfer_handle);
192 Static void ohci_root_intr_close(usbd_pipe_handle);
193 Static void ohci_root_intr_done(usbd_xfer_handle);
195 Static usbd_status ohci_device_ctrl_transfer(usbd_xfer_handle);
196 Static usbd_status ohci_device_ctrl_start(usbd_xfer_handle);
197 Static void ohci_device_ctrl_abort(usbd_xfer_handle);
198 Static void ohci_device_ctrl_close(usbd_pipe_handle);
199 Static void ohci_device_ctrl_done(usbd_xfer_handle);
201 Static usbd_status ohci_device_bulk_transfer(usbd_xfer_handle);
202 Static usbd_status ohci_device_bulk_start(usbd_xfer_handle);
203 Static void ohci_device_bulk_abort(usbd_xfer_handle);
204 Static void ohci_device_bulk_close(usbd_pipe_handle);
205 Static void ohci_device_bulk_done(usbd_xfer_handle);
207 Static usbd_status ohci_device_intr_transfer(usbd_xfer_handle);
208 Static usbd_status ohci_device_intr_start(usbd_xfer_handle);
209 Static void ohci_device_intr_abort(usbd_xfer_handle);
210 Static void ohci_device_intr_close(usbd_pipe_handle);
211 Static void ohci_device_intr_done(usbd_xfer_handle);
213 Static usbd_status ohci_device_isoc_transfer(usbd_xfer_handle);
214 Static usbd_status ohci_device_isoc_start(usbd_xfer_handle);
215 Static void ohci_device_isoc_abort(usbd_xfer_handle);
216 Static void ohci_device_isoc_close(usbd_pipe_handle);
217 Static void ohci_device_isoc_done(usbd_xfer_handle);
219 Static usbd_status ohci_device_setintr(ohci_softc_t *sc,
220 struct ohci_pipe *pipe, int ival);
222 Static int ohci_str(usb_string_descriptor_t *, int, const char *);
224 Static void ohci_timeout(void *);
225 Static void ohci_timeout_task(void *);
226 Static void ohci_rhsc_able(ohci_softc_t *, int);
227 Static void ohci_rhsc_enable(void *);
229 Static void ohci_close_pipe(usbd_pipe_handle, ohci_soft_ed_t *);
230 Static void ohci_abort_xfer(usbd_xfer_handle, usbd_status);
232 Static void ohci_device_clear_toggle(usbd_pipe_handle pipe);
233 Static void ohci_noop(usbd_pipe_handle pipe);
235 Static usbd_status ohci_controller_init(ohci_softc_t *sc);
238 Static void ohci_dumpregs(ohci_softc_t *);
239 Static void ohci_dump_tds(ohci_soft_td_t *);
240 Static void ohci_dump_td(ohci_soft_td_t *);
241 Static void ohci_dump_ed(ohci_soft_ed_t *);
242 Static void ohci_dump_itd(ohci_soft_itd_t *);
243 Static void ohci_dump_itds(ohci_soft_itd_t *);
246 #define OBARR(sc) bus_space_barrier((sc)->iot, (sc)->ioh, 0, (sc)->sc_size, \
247 BUS_SPACE_BARRIER_READ|BUS_SPACE_BARRIER_WRITE)
248 #define OWRITE1(sc, r, x) \
249 do { OBARR(sc); bus_space_write_1((sc)->iot, (sc)->ioh, (r), (x)); } while (0)
250 #define OWRITE2(sc, r, x) \
251 do { OBARR(sc); bus_space_write_2((sc)->iot, (sc)->ioh, (r), (x)); } while (0)
252 #define OWRITE4(sc, r, x) \
253 do { OBARR(sc); bus_space_write_4((sc)->iot, (sc)->ioh, (r), (x)); } while (0)
254 #define OREAD1(sc, r) (OBARR(sc), bus_space_read_1((sc)->iot, (sc)->ioh, (r)))
255 #define OREAD2(sc, r) (OBARR(sc), bus_space_read_2((sc)->iot, (sc)->ioh, (r)))
256 #define OREAD4(sc, r) (OBARR(sc), bus_space_read_4((sc)->iot, (sc)->ioh, (r)))
258 /* Reverse the bits in a value 0 .. 31 */
259 Static u_int8_t revbits[OHCI_NO_INTRS] =
260 { 0x00, 0x10, 0x08, 0x18, 0x04, 0x14, 0x0c, 0x1c,
261 0x02, 0x12, 0x0a, 0x1a, 0x06, 0x16, 0x0e, 0x1e,
262 0x01, 0x11, 0x09, 0x19, 0x05, 0x15, 0x0d, 0x1d,
263 0x03, 0x13, 0x0b, 0x1b, 0x07, 0x17, 0x0f, 0x1f };
266 struct usbd_pipe pipe;
271 ohci_soft_itd_t *itd;
273 /* Info needed for different pipe kinds. */
279 ohci_soft_td_t *setup, *data, *stat;
298 #define OHCI_INTR_ENDPT 1
300 Static struct usbd_bus_methods ohci_bus_methods = {
310 Static struct usbd_pipe_methods ohci_root_ctrl_methods = {
311 ohci_root_ctrl_transfer,
312 ohci_root_ctrl_start,
313 ohci_root_ctrl_abort,
314 ohci_root_ctrl_close,
319 Static struct usbd_pipe_methods ohci_root_intr_methods = {
320 ohci_root_intr_transfer,
321 ohci_root_intr_start,
322 ohci_root_intr_abort,
323 ohci_root_intr_close,
328 Static struct usbd_pipe_methods ohci_device_ctrl_methods = {
329 ohci_device_ctrl_transfer,
330 ohci_device_ctrl_start,
331 ohci_device_ctrl_abort,
332 ohci_device_ctrl_close,
334 ohci_device_ctrl_done,
337 Static struct usbd_pipe_methods ohci_device_intr_methods = {
338 ohci_device_intr_transfer,
339 ohci_device_intr_start,
340 ohci_device_intr_abort,
341 ohci_device_intr_close,
342 ohci_device_clear_toggle,
343 ohci_device_intr_done,
346 Static struct usbd_pipe_methods ohci_device_bulk_methods = {
347 ohci_device_bulk_transfer,
348 ohci_device_bulk_start,
349 ohci_device_bulk_abort,
350 ohci_device_bulk_close,
351 ohci_device_clear_toggle,
352 ohci_device_bulk_done,
355 Static struct usbd_pipe_methods ohci_device_isoc_methods = {
356 ohci_device_isoc_transfer,
357 ohci_device_isoc_start,
358 ohci_device_isoc_abort,
359 ohci_device_isoc_close,
361 ohci_device_isoc_done,
364 #if defined(__NetBSD__) || defined(__OpenBSD__)
366 ohci_activate(device_ptr_t self, enum devact act)
368 struct ohci_softc *sc = (struct ohci_softc *)self;
375 case DVACT_DEACTIVATE:
376 if (sc->sc_child != NULL)
377 rv = config_deactivate(sc->sc_child);
385 ohci_detach(struct ohci_softc *sc, int flags)
389 if (sc->sc_child != NULL)
390 rv = config_detach(sc->sc_child, flags);
395 usb_uncallout(sc->sc_tmo_rhsc, ohci_rhsc_enable, sc);
397 #if defined(__NetBSD__) || defined(__OpenBSD__)
398 powerhook_disestablish(sc->sc_powerhook);
399 shutdownhook_disestablish(sc->sc_shutdownhook);
402 usb_delay_ms(&sc->sc_bus, 300); /* XXX let stray task complete */
404 /* free data structures XXX */
411 ohci_alloc_sed(ohci_softc_t *sc)
418 if (sc->sc_freeeds == NULL) {
419 DPRINTFN(2, ("ohci_alloc_sed: allocating chunk\n"));
420 err = usb_allocmem(&sc->sc_bus, OHCI_SED_SIZE * OHCI_SED_CHUNK,
421 OHCI_ED_ALIGN, &dma);
424 for(i = 0; i < OHCI_SED_CHUNK; i++) {
425 offs = i * OHCI_SED_SIZE;
426 sed = KERNADDR(&dma, offs);
427 sed->physaddr = DMAADDR(&dma, offs);
428 sed->next = sc->sc_freeeds;
429 sc->sc_freeeds = sed;
432 sed = sc->sc_freeeds;
433 sc->sc_freeeds = sed->next;
434 memset(&sed->ed, 0, sizeof(ohci_ed_t));
440 ohci_free_sed(ohci_softc_t *sc, ohci_soft_ed_t *sed)
442 sed->next = sc->sc_freeeds;
443 sc->sc_freeeds = sed;
447 ohci_alloc_std(ohci_softc_t *sc)
454 if (sc->sc_freetds == NULL) {
455 DPRINTFN(2, ("ohci_alloc_std: allocating chunk\n"));
456 err = usb_allocmem(&sc->sc_bus, OHCI_STD_SIZE * OHCI_STD_CHUNK,
457 OHCI_TD_ALIGN, &dma);
461 for(i = 0; i < OHCI_STD_CHUNK; i++) {
462 offs = i * OHCI_STD_SIZE;
463 std = KERNADDR(&dma, offs);
464 std->physaddr = DMAADDR(&dma, offs);
465 std->nexttd = sc->sc_freetds;
466 sc->sc_freetds = std;
472 std = sc->sc_freetds;
473 sc->sc_freetds = std->nexttd;
474 memset(&std->td, 0, sizeof(ohci_td_t));
477 ohci_hash_add_td(sc, std);
484 ohci_free_std(ohci_softc_t *sc, ohci_soft_td_t *std)
487 ohci_hash_rem_td(sc, std);
488 std->nexttd = sc->sc_freetds;
489 sc->sc_freetds = std;
494 ohci_alloc_std_chain(struct ohci_pipe *opipe, ohci_softc_t *sc,
495 int alen, int rd, usbd_xfer_handle xfer,
496 ohci_soft_td_t *sp, ohci_soft_td_t **ep)
498 ohci_soft_td_t *next, *cur;
499 ohci_physaddr_t dataphys;
503 usb_dma_t *dma = &xfer->dmabuf;
504 u_int16_t flags = xfer->flags;
506 DPRINTFN(alen < 4096,("ohci_alloc_std_chain: start len=%d\n", alen));
512 (rd ? OHCI_TD_IN : OHCI_TD_OUT) |
513 (flags & USBD_SHORT_XFER_OK ? OHCI_TD_R : 0) |
514 OHCI_TD_NOCC | OHCI_TD_TOGGLE_CARRY | OHCI_TD_NOINTR);
517 next = ohci_alloc_std(sc);
521 dataphys = DMAADDR(dma, offset);
524 * The OHCI hardware can handle at most one 4k crossing.
525 * XXX - currently we only allocate contigous buffers, but
526 * the OHCI spec says: If during the data transfer the buffer
527 * address contained in the HC's working copy of
528 * CurrentBufferPointer crosses a 4K boundary, the upper 20
529 * bits of Buffer End are copied to the working value of
530 * CurrentBufferPointer causing the next buffer address to
531 * be the 0th byte in the same 4K page that contains the
532 * last byte of the buffer (the 4K boundary crossing may
533 * occur within a data packet transfer.)
535 * If/when dma has multiple segments, this will need to
536 * properly handle fragmenting TD's.
538 * We can describe the above using maxsegsz = 4k and nsegs = 2
541 if (OHCI_PAGE(dataphys) == OHCI_PAGE(DMAADDR(dma, offset +
542 len - 1)) || len - (OHCI_PAGE_SIZE -
543 OHCI_PAGE_OFFSET(dataphys)) <= OHCI_PAGE_SIZE) {
544 /* we can handle it in this TD */
547 /* XXX The calculation below is wrong and could
548 * result in a packet that is not a multiple of the
549 * MaxPacketSize in the case where the buffer does not
550 * start on an appropriate address (like for example in
551 * the case of an mbuf cluster). You'll get an early
554 /* must use multiple TDs, fill as much as possible. */
555 curlen = 2 * OHCI_PAGE_SIZE -
556 OHCI_PAGE_OFFSET(dataphys);
557 /* the length must be a multiple of the max size */
559 UGETW(opipe->pipe.endpoint->edesc->wMaxPacketSize);
562 panic("ohci_alloc_std: curlen == 0");
565 DPRINTFN(4,("ohci_alloc_std_chain: dataphys=0x%08x "
566 "len=%d curlen=%d\n",
567 dataphys, len, curlen));
570 cur->td.td_flags = tdflags;
571 cur->td.td_cbp = htole32(dataphys);
573 cur->td.td_nexttd = htole32(next->physaddr);
574 cur->td.td_be = htole32(DMAADDR(dma, offset + curlen - 1));
576 cur->flags = OHCI_ADD_LEN;
578 DPRINTFN(10,("ohci_alloc_std_chain: cbp=0x%08x be=0x%08x\n",
579 dataphys, dataphys + curlen - 1));
583 panic("Length went negative: %d curlen %d dma %p offset %08x", len, curlen, dma, (int)0);
585 DPRINTFN(10,("ohci_alloc_std_chain: extend chain\n"));
589 if ((flags & USBD_FORCE_SHORT_XFER) &&
590 alen % UGETW(opipe->pipe.endpoint->edesc->wMaxPacketSize) == 0) {
591 /* Force a 0 length transfer at the end. */
595 next = ohci_alloc_std(sc);
599 cur->td.td_flags = tdflags;
600 cur->td.td_cbp = 0; /* indicate 0 length packet */
602 cur->td.td_nexttd = htole32(next->physaddr);
607 DPRINTFN(2,("ohci_alloc_std_chain: add 0 xfer\n"));
611 return (USBD_NORMAL_COMPLETION);
620 ohci_free_std_chain(ohci_softc_t *sc, ohci_soft_td_t *std,
621 ohci_soft_td_t *stdend)
625 for (; std != stdend; std = p) {
627 ohci_free_std(sc, std);
633 ohci_alloc_sitd(ohci_softc_t *sc)
635 ohci_soft_itd_t *sitd;
640 if (sc->sc_freeitds == NULL) {
641 DPRINTFN(2, ("ohci_alloc_sitd: allocating chunk\n"));
642 err = usb_allocmem(&sc->sc_bus, OHCI_SITD_SIZE * OHCI_SITD_CHUNK,
643 OHCI_ITD_ALIGN, &dma);
647 for(i = 0; i < OHCI_SITD_CHUNK; i++) {
648 offs = i * OHCI_SITD_SIZE;
649 sitd = KERNADDR(&dma, offs);
650 sitd->physaddr = DMAADDR(&dma, offs);
651 sitd->nextitd = sc->sc_freeitds;
652 sc->sc_freeitds = sitd;
658 sitd = sc->sc_freeitds;
659 sc->sc_freeitds = sitd->nextitd;
660 memset(&sitd->itd, 0, sizeof(ohci_itd_t));
661 sitd->nextitd = NULL;
663 ohci_hash_add_itd(sc, sitd);
674 ohci_free_sitd(ohci_softc_t *sc, ohci_soft_itd_t *sitd)
676 DPRINTFN(10,("ohci_free_sitd: sitd=%p\n", sitd));
680 panic("ohci_free_sitd: sitd=%p not done", sitd);
683 /* Warn double free */
688 ohci_hash_rem_itd(sc, sitd);
689 sitd->nextitd = sc->sc_freeitds;
690 sc->sc_freeitds = sitd;
695 ohci_init(ohci_softc_t *sc)
697 ohci_soft_ed_t *sed, *psed;
702 DPRINTF(("ohci_init: start\n"));
703 #if defined(__OpenBSD__)
706 printf("%s:", USBDEVNAME(sc->sc_bus.bdev));
708 rev = OREAD4(sc, OHCI_REVISION);
709 printf(" OHCI version %d.%d%s\n", OHCI_REV_HI(rev), OHCI_REV_LO(rev),
710 OHCI_REV_LEGACY(rev) ? ", legacy support" : "");
712 if (OHCI_REV_HI(rev) != 1 || OHCI_REV_LO(rev) != 0) {
713 printf("%s: unsupported OHCI revision\n",
714 USBDEVNAME(sc->sc_bus.bdev));
715 sc->sc_bus.usbrev = USBREV_UNKNOWN;
718 sc->sc_bus.usbrev = USBREV_1_0;
720 for (i = 0; i < OHCI_HASH_SIZE; i++)
721 LIST_INIT(&sc->sc_hash_tds[i]);
722 for (i = 0; i < OHCI_HASH_SIZE; i++)
723 LIST_INIT(&sc->sc_hash_itds[i]);
725 SIMPLEQ_INIT(&sc->sc_free_xfers);
727 /* XXX determine alignment by R/W */
728 /* Allocate the HCCA area. */
729 err = usb_allocmem(&sc->sc_bus, OHCI_HCCA_SIZE,
730 OHCI_HCCA_ALIGN, &sc->sc_hccadma);
733 sc->sc_hcca = KERNADDR(&sc->sc_hccadma, 0);
734 memset(sc->sc_hcca, 0, OHCI_HCCA_SIZE);
736 sc->sc_eintrs = OHCI_NORMAL_INTRS;
738 /* Allocate dummy ED that starts the control list. */
739 sc->sc_ctrl_head = ohci_alloc_sed(sc);
740 if (sc->sc_ctrl_head == NULL) {
744 sc->sc_ctrl_head->ed.ed_flags |= htole32(OHCI_ED_SKIP);
746 /* Allocate dummy ED that starts the bulk list. */
747 sc->sc_bulk_head = ohci_alloc_sed(sc);
748 if (sc->sc_bulk_head == NULL) {
752 sc->sc_bulk_head->ed.ed_flags |= htole32(OHCI_ED_SKIP);
754 /* Allocate dummy ED that starts the isochronous list. */
755 sc->sc_isoc_head = ohci_alloc_sed(sc);
756 if (sc->sc_isoc_head == NULL) {
760 sc->sc_isoc_head->ed.ed_flags |= htole32(OHCI_ED_SKIP);
762 /* Allocate all the dummy EDs that make up the interrupt tree. */
763 for (i = 0; i < OHCI_NO_EDS; i++) {
764 sed = ohci_alloc_sed(sc);
767 ohci_free_sed(sc, sc->sc_eds[i]);
771 /* All ED fields are set to 0. */
773 sed->ed.ed_flags |= htole32(OHCI_ED_SKIP);
775 psed = sc->sc_eds[(i-1) / 2];
777 psed= sc->sc_isoc_head;
779 sed->ed.ed_nexted = htole32(psed->physaddr);
782 * Fill HCCA interrupt table. The bit reversal is to get
783 * the tree set up properly to spread the interrupts.
785 for (i = 0; i < OHCI_NO_INTRS; i++)
786 sc->sc_hcca->hcca_interrupt_table[revbits[i]] =
787 htole32(sc->sc_eds[OHCI_NO_EDS-OHCI_NO_INTRS+i]->physaddr);
790 if (ohcidebug > 15) {
791 for (i = 0; i < OHCI_NO_EDS; i++) {
793 ohci_dump_ed(sc->sc_eds[i]);
796 ohci_dump_ed(sc->sc_isoc_head);
800 err = ohci_controller_init(sc);
801 if (err != USBD_NORMAL_COMPLETION)
804 /* Set up the bus struct. */
805 sc->sc_bus.methods = &ohci_bus_methods;
806 sc->sc_bus.pipe_size = sizeof(struct ohci_pipe);
808 #if defined(__NetBSD__) || defined(__OpenBSD__)
809 sc->sc_control = sc->sc_intre = 0;
810 sc->sc_powerhook = powerhook_establish(ohci_power, sc);
811 sc->sc_shutdownhook = shutdownhook_establish(ohci_shutdown, sc);
814 usb_callout_init(sc->sc_tmo_rhsc);
816 return (USBD_NORMAL_COMPLETION);
819 for (i = 0; i < OHCI_NO_EDS; i++)
820 ohci_free_sed(sc, sc->sc_eds[i]);
822 ohci_free_sed(sc, sc->sc_isoc_head);
824 ohci_free_sed(sc, sc->sc_bulk_head);
826 ohci_free_sed(sc, sc->sc_ctrl_head);
828 usb_freemem(&sc->sc_bus, &sc->sc_hccadma);
833 ohci_init_intrs(ohci_softc_t *sc)
835 OWRITE4(sc, OHCI_INTERRUPT_ENABLE, sc->sc_eintrs | OHCI_MIE);
839 ohci_controller_init(ohci_softc_t *sc)
842 u_int32_t s, ctl, ival, hcr, fm, per, desca;
844 /* Determine in what context we are running. */
845 ctl = OREAD4(sc, OHCI_CONTROL);
847 /* SMM active, request change */
848 DPRINTF(("ohci_init: SMM active, request owner change\n"));
849 s = OREAD4(sc, OHCI_COMMAND_STATUS);
850 OWRITE4(sc, OHCI_COMMAND_STATUS, s | OHCI_OCR);
851 for (i = 0; i < 100 && (ctl & OHCI_IR); i++) {
852 usb_delay_ms(&sc->sc_bus, 1);
853 ctl = OREAD4(sc, OHCI_CONTROL);
855 if ((ctl & OHCI_IR) == 0) {
856 printf("%s: SMM does not respond, resetting\n",
857 USBDEVNAME(sc->sc_bus.bdev));
858 OWRITE4(sc, OHCI_CONTROL, OHCI_HCFS_RESET);
862 /* Don't bother trying to reuse the BIOS init, we'll reset it anyway. */
863 } else if ((ctl & OHCI_HCFS_MASK) != OHCI_HCFS_RESET) {
864 /* BIOS started controller. */
865 DPRINTF(("ohci_init: BIOS active\n"));
866 if ((ctl & OHCI_HCFS_MASK) != OHCI_HCFS_OPERATIONAL) {
867 OWRITE4(sc, OHCI_CONTROL, OHCI_HCFS_OPERATIONAL);
868 usb_delay_ms(&sc->sc_bus, USB_RESUME_DELAY);
872 DPRINTF(("ohci_init: cold started\n"));
874 /* Controller was cold started. */
875 usb_delay_ms(&sc->sc_bus, USB_BUS_RESET_DELAY);
879 * This reset should not be necessary according to the OHCI spec, but
880 * without it some controllers do not start.
882 DPRINTF(("%s: resetting\n", USBDEVNAME(sc->sc_bus.bdev)));
883 OWRITE4(sc, OHCI_CONTROL, OHCI_HCFS_RESET);
884 usb_delay_ms(&sc->sc_bus, USB_BUS_RESET_DELAY);
886 /* We now own the host controller and the bus has been reset. */
887 ival = OHCI_GET_IVAL(OREAD4(sc, OHCI_FM_INTERVAL));
889 OWRITE4(sc, OHCI_COMMAND_STATUS, OHCI_HCR); /* Reset HC */
890 /* Nominal time for a reset is 10 us. */
891 for (i = 0; i < 10; i++) {
893 hcr = OREAD4(sc, OHCI_COMMAND_STATUS) & OHCI_HCR;
898 printf("%s: reset timeout\n", USBDEVNAME(sc->sc_bus.bdev));
899 return (USBD_IOERROR);
906 /* The controller is now in SUSPEND state, we have 2ms to finish. */
908 /* Set up HC registers. */
909 OWRITE4(sc, OHCI_HCCA, DMAADDR(&sc->sc_hccadma, 0));
910 OWRITE4(sc, OHCI_CONTROL_HEAD_ED, sc->sc_ctrl_head->physaddr);
911 OWRITE4(sc, OHCI_BULK_HEAD_ED, sc->sc_bulk_head->physaddr);
914 * disable all interrupts to avoid events while we are initializing
917 OWRITE4(sc, OHCI_INTERRUPT_DISABLE, OHCI_ALL_INTRS);
918 /* switch on desired functional features */
919 ctl = OREAD4(sc, OHCI_CONTROL);
920 ctl &= ~(OHCI_CBSR_MASK | OHCI_LES | OHCI_HCFS_MASK | OHCI_IR);
921 ctl |= OHCI_PLE | OHCI_IE | OHCI_CLE | OHCI_BLE |
922 OHCI_RATIO_1_4 | OHCI_HCFS_OPERATIONAL;
923 /* And finally start it! */
924 OWRITE4(sc, OHCI_CONTROL, ctl);
927 * The controller is now OPERATIONAL. Set a some final
928 * registers that should be set earlier, but that the
929 * controller ignores when in the SUSPEND state.
931 fm = (OREAD4(sc, OHCI_FM_INTERVAL) & OHCI_FIT) ^ OHCI_FIT;
932 fm |= OHCI_FSMPS(ival) | ival;
933 OWRITE4(sc, OHCI_FM_INTERVAL, fm);
934 per = OHCI_PERIODIC(ival); /* 90% periodic */
935 OWRITE4(sc, OHCI_PERIODIC_START, per);
937 /* Fiddle the No OverCurrent Protection bit to avoid chip bug. */
938 desca = OREAD4(sc, OHCI_RH_DESCRIPTOR_A);
939 OWRITE4(sc, OHCI_RH_DESCRIPTOR_A, desca | OHCI_NOCP);
940 OWRITE4(sc, OHCI_RH_STATUS, OHCI_LPSC); /* Enable port power */
941 usb_delay_ms(&sc->sc_bus, OHCI_ENABLE_POWER_DELAY);
942 OWRITE4(sc, OHCI_RH_DESCRIPTOR_A, desca);
945 * The AMD756 requires a delay before re-reading the register,
946 * otherwise it will occasionally report 0 ports.
949 for (i = 0; i < 10 && sc->sc_noport == 0; i++) {
950 usb_delay_ms(&sc->sc_bus, OHCI_READ_DESC_DELAY);
951 sc->sc_noport = OHCI_GET_NDP(OREAD4(sc, OHCI_RH_DESCRIPTOR_A));
958 return (USBD_NORMAL_COMPLETION);
962 ohci_allocm(struct usbd_bus *bus, usb_dma_t *dma, u_int32_t size)
964 return (usb_allocmem(bus, size, 0, dma));
968 ohci_freem(struct usbd_bus *bus, usb_dma_t *dma)
970 usb_freemem(bus, dma);
974 ohci_allocx(struct usbd_bus *bus)
976 struct ohci_softc *sc = (struct ohci_softc *)bus;
977 usbd_xfer_handle xfer;
979 xfer = SIMPLEQ_FIRST(&sc->sc_free_xfers);
981 SIMPLEQ_REMOVE_HEAD(&sc->sc_free_xfers, next);
983 if (xfer->busy_free != XFER_FREE) {
984 printf("ohci_allocx: xfer=%p not free, 0x%08x\n", xfer,
989 xfer = malloc(sizeof(struct ohci_xfer), M_USB, M_INTWAIT);
992 memset(xfer, 0, sizeof (struct ohci_xfer));
994 xfer->busy_free = XFER_BUSY;
1001 ohci_freex(struct usbd_bus *bus, usbd_xfer_handle xfer)
1003 struct ohci_softc *sc = (struct ohci_softc *)bus;
1004 struct ohci_xfer *oxfer = (struct ohci_xfer *)xfer;
1005 ohci_soft_itd_t *sitd;
1007 if (oxfer->ohci_xfer_flags & OHCI_ISOC_DIRTY) {
1008 for (sitd = xfer->hcpriv; sitd != NULL && sitd->xfer == xfer;
1009 sitd = sitd->nextitd)
1010 ohci_free_sitd(sc, sitd);
1014 if (xfer->busy_free != XFER_BUSY) {
1015 printf("ohci_freex: xfer=%p not busy, 0x%08x\n", xfer,
1019 xfer->busy_free = XFER_FREE;
1021 SIMPLEQ_INSERT_HEAD(&sc->sc_free_xfers, xfer, next);
1025 * Shut down the controller when the system is going down.
1028 ohci_shutdown(void *v)
1030 ohci_softc_t *sc = v;
1032 DPRINTF(("ohci_shutdown: stopping the HC\n"));
1033 OWRITE4(sc, OHCI_CONTROL, OHCI_HCFS_RESET);
1037 * Handle suspend/resume.
1039 * We need to switch to polling mode here, because this routine is
1040 * called from an intterupt context. This is all right since we
1041 * are almost suspended anyway.
1044 ohci_power(int why, void *v)
1046 ohci_softc_t *sc = v;
1050 DPRINTF(("ohci_power: sc=%p, why=%d\n", sc, why));
1055 if (why != PWR_RESUME) {
1056 sc->sc_bus.use_polling++;
1057 ctl = OREAD4(sc, OHCI_CONTROL) & ~OHCI_HCFS_MASK;
1058 if (sc->sc_control == 0) {
1060 * Preserve register values, in case that APM BIOS
1061 * does not recover them.
1063 sc->sc_control = ctl;
1064 sc->sc_intre = OREAD4(sc, OHCI_INTERRUPT_ENABLE);
1066 ctl |= OHCI_HCFS_SUSPEND;
1067 OWRITE4(sc, OHCI_CONTROL, ctl);
1068 usb_delay_ms(&sc->sc_bus, USB_RESUME_WAIT);
1069 sc->sc_bus.use_polling--;
1071 sc->sc_bus.use_polling++;
1073 /* Some broken BIOSes never initialize Controller chip */
1074 ohci_controller_init(sc);
1077 OWRITE4(sc, OHCI_INTERRUPT_ENABLE,
1078 sc->sc_intre & (OHCI_ALL_INTRS | OHCI_MIE));
1080 ctl = sc->sc_control;
1082 ctl = OREAD4(sc, OHCI_CONTROL);
1083 ctl |= OHCI_HCFS_RESUME;
1084 OWRITE4(sc, OHCI_CONTROL, ctl);
1085 usb_delay_ms(&sc->sc_bus, USB_RESUME_DELAY);
1086 ctl = (ctl & ~OHCI_HCFS_MASK) | OHCI_HCFS_OPERATIONAL;
1087 OWRITE4(sc, OHCI_CONTROL, ctl);
1088 usb_delay_ms(&sc->sc_bus, USB_RESUME_RECOVERY);
1089 sc->sc_control = sc->sc_intre = 0;
1090 sc->sc_bus.use_polling--;
1091 ohci_init_intrs(sc);
1099 ohci_dumpregs(ohci_softc_t *sc)
1101 DPRINTF(("ohci_dumpregs: rev=0x%08x control=0x%08x command=0x%08x\n",
1102 OREAD4(sc, OHCI_REVISION),
1103 OREAD4(sc, OHCI_CONTROL),
1104 OREAD4(sc, OHCI_COMMAND_STATUS)));
1105 DPRINTF((" intrstat=0x%08x intre=0x%08x intrd=0x%08x\n",
1106 OREAD4(sc, OHCI_INTERRUPT_STATUS),
1107 OREAD4(sc, OHCI_INTERRUPT_ENABLE),
1108 OREAD4(sc, OHCI_INTERRUPT_DISABLE)));
1109 DPRINTF((" hcca=0x%08x percur=0x%08x ctrlhd=0x%08x\n",
1110 OREAD4(sc, OHCI_HCCA),
1111 OREAD4(sc, OHCI_PERIOD_CURRENT_ED),
1112 OREAD4(sc, OHCI_CONTROL_HEAD_ED)));
1113 DPRINTF((" ctrlcur=0x%08x bulkhd=0x%08x bulkcur=0x%08x\n",
1114 OREAD4(sc, OHCI_CONTROL_CURRENT_ED),
1115 OREAD4(sc, OHCI_BULK_HEAD_ED),
1116 OREAD4(sc, OHCI_BULK_CURRENT_ED)));
1117 DPRINTF((" done=0x%08x fmival=0x%08x fmrem=0x%08x\n",
1118 OREAD4(sc, OHCI_DONE_HEAD),
1119 OREAD4(sc, OHCI_FM_INTERVAL),
1120 OREAD4(sc, OHCI_FM_REMAINING)));
1121 DPRINTF((" fmnum=0x%08x perst=0x%08x lsthrs=0x%08x\n",
1122 OREAD4(sc, OHCI_FM_NUMBER),
1123 OREAD4(sc, OHCI_PERIODIC_START),
1124 OREAD4(sc, OHCI_LS_THRESHOLD)));
1125 DPRINTF((" desca=0x%08x descb=0x%08x stat=0x%08x\n",
1126 OREAD4(sc, OHCI_RH_DESCRIPTOR_A),
1127 OREAD4(sc, OHCI_RH_DESCRIPTOR_B),
1128 OREAD4(sc, OHCI_RH_STATUS)));
1129 DPRINTF((" port1=0x%08x port2=0x%08x\n",
1130 OREAD4(sc, OHCI_RH_PORT_STATUS(1)),
1131 OREAD4(sc, OHCI_RH_PORT_STATUS(2))));
1132 DPRINTF((" HCCA: frame_number=0x%04x done_head=0x%08x\n",
1133 le32toh(sc->sc_hcca->hcca_frame_number),
1134 le32toh(sc->sc_hcca->hcca_done_head)));
1138 Static int ohci_intr1(ohci_softc_t *);
1143 ohci_softc_t *sc = p;
1145 if (sc == NULL || sc->sc_dying)
1148 /* If we get an interrupt while polling, then just ignore it. */
1149 if (sc->sc_bus.use_polling) {
1151 DPRINTFN(16, ("ohci_intr: ignored interrupt while polling\n"));
1156 return (ohci_intr1(sc));
1160 ohci_intr1(ohci_softc_t *sc)
1162 u_int32_t intrs, eintrs;
1163 ohci_physaddr_t done;
1165 DPRINTFN(14,("ohci_intr1: enter\n"));
1167 /* In case the interrupt occurs before initialization has completed. */
1168 if (sc == NULL || sc->sc_hcca == NULL) {
1170 printf("ohci_intr: sc->sc_hcca == NULL\n");
1176 done = le32toh(sc->sc_hcca->hcca_done_head);
1178 /* The LSb of done is used to inform the HC Driver that an interrupt
1179 * condition exists for both the Done list and for another event
1180 * recorded in HcInterruptStatus. On an interrupt from the HC, the HC
1181 * Driver checks the HccaDoneHead Value. If this value is 0, then the
1182 * interrupt was caused by other than the HccaDoneHead update and the
1183 * HcInterruptStatus register needs to be accessed to determine that
1184 * exact interrupt cause. If HccaDoneHead is nonzero, then a Done list
1185 * update interrupt is indicated and if the LSb of done is nonzero,
1186 * then an additional interrupt event is indicated and
1187 * HcInterruptStatus should be checked to determine its cause.
1190 if (done & ~OHCI_DONE_INTRS)
1192 if (done & OHCI_DONE_INTRS) {
1193 intrs |= OREAD4(sc, OHCI_INTERRUPT_STATUS);
1194 done &= ~OHCI_DONE_INTRS;
1196 sc->sc_hcca->hcca_done_head = 0;
1198 intrs = OREAD4(sc, OHCI_INTERRUPT_STATUS) & ~OHCI_WDH;
1200 if (intrs == 0) /* nothing to be done (PCI shared interrupt) */
1204 OWRITE4(sc, OHCI_INTERRUPT_STATUS, intrs); /* Acknowledge */
1205 eintrs = intrs & sc->sc_eintrs;
1209 sc->sc_bus.intr_context++;
1210 sc->sc_bus.no_intrs++;
1211 DPRINTFN(7, ("ohci_intr: sc=%p intrs=0x%x(0x%x) eintrs=0x%x\n",
1212 sc, (u_int)intrs, OREAD4(sc, OHCI_INTERRUPT_STATUS),
1215 if (eintrs & OHCI_SO) {
1216 sc->sc_overrun_cnt++;
1217 if (usbd_ratecheck(&sc->sc_overrun_ntc)) {
1218 printf("%s: %u scheduling overruns\n",
1219 USBDEVNAME(sc->sc_bus.bdev), sc->sc_overrun_cnt);
1220 sc->sc_overrun_cnt = 0;
1225 if (eintrs & OHCI_WDH) {
1226 ohci_add_done(sc, done &~ OHCI_DONE_INTRS);
1227 usb_schedsoftintr(&sc->sc_bus);
1228 eintrs &= ~OHCI_WDH;
1230 if (eintrs & OHCI_RD) {
1231 printf("%s: resume detect\n", USBDEVNAME(sc->sc_bus.bdev));
1232 /* XXX process resume detect */
1234 if (eintrs & OHCI_UE) {
1235 printf("%s: unrecoverable error, controller halted\n",
1236 USBDEVNAME(sc->sc_bus.bdev));
1237 OWRITE4(sc, OHCI_CONTROL, OHCI_HCFS_RESET);
1240 if (eintrs & OHCI_RHSC) {
1241 ohci_rhsc(sc, sc->sc_intrxfer);
1243 * Disable RHSC interrupt for now, because it will be
1244 * on until the port has been reset.
1246 ohci_rhsc_able(sc, 0);
1247 /* Do not allow RHSC interrupts > 1 per second */
1248 usb_callout(sc->sc_tmo_rhsc, hz, ohci_rhsc_enable, sc);
1249 eintrs &= ~OHCI_RHSC;
1252 sc->sc_bus.intr_context--;
1255 /* Block unprocessed interrupts. XXX */
1256 OWRITE4(sc, OHCI_INTERRUPT_DISABLE, eintrs);
1257 sc->sc_eintrs &= ~eintrs;
1258 printf("%s: blocking intrs 0x%x\n",
1259 USBDEVNAME(sc->sc_bus.bdev), eintrs);
1266 ohci_rhsc_able(ohci_softc_t *sc, int on)
1268 DPRINTFN(4, ("ohci_rhsc_able: on=%d\n", on));
1270 sc->sc_eintrs |= OHCI_RHSC;
1271 OWRITE4(sc, OHCI_INTERRUPT_ENABLE, OHCI_RHSC);
1273 sc->sc_eintrs &= ~OHCI_RHSC;
1274 OWRITE4(sc, OHCI_INTERRUPT_DISABLE, OHCI_RHSC);
1279 ohci_rhsc_enable(void *v_sc)
1281 ohci_softc_t *sc = v_sc;
1284 ohci_rhsc_able(sc, 1);
1289 char *ohci_cc_strs[] = {
1293 "DATA_TOGGLE_MISMATCH",
1295 "DEVICE_NOT_RESPONDING",
1296 "PID_CHECK_FAILURE",
1310 ohci_add_done(ohci_softc_t *sc, ohci_physaddr_t done)
1312 ohci_soft_itd_t *sitd, *sidone, **ip;
1313 ohci_soft_td_t *std, *sdone, **p;
1315 /* Reverse the done list. */
1316 for (sdone = NULL, sidone = NULL; done != 0; ) {
1317 std = ohci_hash_find_td(sc, done);
1320 done = le32toh(std->td.td_nexttd);
1322 DPRINTFN(10,("add TD %p\n", std));
1325 sitd = ohci_hash_find_itd(sc, done);
1327 sitd->dnext = sidone;
1328 done = le32toh(sitd->itd.itd_nextitd);
1330 DPRINTFN(5,("add ITD %p\n", sitd));
1333 panic("ohci_add_done: addr 0x%08lx not found", (u_long)done);
1336 /* sdone & sidone now hold the done lists. */
1337 /* Put them on the already processed lists. */
1338 for (p = &sc->sc_sdone; *p != NULL; p = &(*p)->dnext)
1341 for (ip = &sc->sc_sidone; *ip != NULL; ip = &(*ip)->dnext)
1347 ohci_softintr(void *v)
1349 ohci_softc_t *sc = v;
1350 ohci_soft_itd_t *sitd, *sidone, *sitdnext;
1351 ohci_soft_td_t *std, *sdone, *stdnext;
1352 usbd_xfer_handle xfer;
1353 struct ohci_pipe *opipe;
1356 DPRINTFN(10,("ohci_softintr: enter\n"));
1358 sc->sc_bus.intr_context++;
1361 sdone = sc->sc_sdone;
1362 sc->sc_sdone = NULL;
1363 sidone = sc->sc_sidone;
1364 sc->sc_sidone = NULL;
1367 DPRINTFN(10,("ohci_softintr: sdone=%p sidone=%p\n", sdone, sidone));
1370 if (ohcidebug > 10) {
1371 DPRINTF(("ohci_process_done: TD done:\n"));
1372 ohci_dump_tds(sdone);
1376 for (std = sdone; std; std = stdnext) {
1378 stdnext = std->dnext;
1379 DPRINTFN(10, ("ohci_process_done: std=%p xfer=%p hcpriv=%p\n",
1380 std, xfer, (xfer ? xfer->hcpriv : NULL)));
1381 if (xfer == NULL || (std->flags & OHCI_TD_HANDLED)) {
1383 * xfer == NULL: There seems to be no xfer associated
1384 * with this TD. It is tailp that happened to end up on
1386 * flags & OHCI_TD_HANDLED: The TD has already been
1387 * handled by process_done and should not be done again.
1388 * Shouldn't happen, but some chips are broken(?).
1392 if (xfer->status == USBD_CANCELLED ||
1393 xfer->status == USBD_TIMEOUT) {
1394 DPRINTF(("ohci_process_done: cancel/timeout %p\n",
1396 /* Handled by abort routine. */
1399 usb_uncallout(xfer->timeout_handle, ohci_timeout, xfer);
1402 if (std->td.td_cbp != 0)
1403 len -= le32toh(std->td.td_be) -
1404 le32toh(std->td.td_cbp) + 1;
1405 DPRINTFN(10, ("ohci_process_done: len=%d, flags=0x%x\n", len,
1407 if (std->flags & OHCI_ADD_LEN)
1408 xfer->actlen += len;
1410 cc = OHCI_TD_GET_CC(le32toh(std->td.td_flags));
1411 if (cc == OHCI_CC_NO_ERROR) {
1412 if (std->flags & OHCI_CALL_DONE) {
1413 xfer->status = USBD_NORMAL_COMPLETION;
1415 usb_transfer_complete(xfer);
1418 ohci_free_std(sc, std);
1421 * Endpoint is halted. First unlink all the TDs
1422 * belonging to the failed transfer, and then restart
1425 ohci_soft_td_t *p, *n;
1426 opipe = (struct ohci_pipe *)xfer->pipe;
1428 DPRINTFN(15,("ohci_process_done: error cc=%d (%s)\n",
1429 OHCI_TD_GET_CC(le32toh(std->td.td_flags)),
1430 ohci_cc_strs[OHCI_TD_GET_CC(le32toh(std->td.td_flags))]));
1433 /* Mark all the TDs in the done queue for the current
1436 for (p = stdnext; p; p = p->dnext) {
1437 if (p->xfer == xfer)
1438 p->flags |= OHCI_TD_HANDLED;
1442 for (p = std; p->xfer == xfer; p = n) {
1444 ohci_free_std(sc, p);
1448 opipe->sed->ed.ed_headp = htole32(p->physaddr);
1449 OWRITE4(sc, OHCI_COMMAND_STATUS, OHCI_CLF);
1451 if (cc == OHCI_CC_STALL)
1452 xfer->status = USBD_STALLED;
1454 xfer->status = USBD_IOERROR;
1456 usb_transfer_complete(xfer);
1462 if (ohcidebug > 10) {
1463 DPRINTF(("ohci_softintr: ITD done:\n"));
1464 ohci_dump_itds(sidone);
1468 for (sitd = sidone; sitd != NULL; sitd = sitdnext) {
1470 sitdnext = sitd->dnext;
1471 sitd->flags |= OHCI_ITD_INTFIN;
1472 DPRINTFN(1, ("ohci_process_done: sitd=%p xfer=%p hcpriv=%p\n",
1473 sitd, xfer, xfer ? xfer->hcpriv : 0));
1476 if (xfer->status == USBD_CANCELLED ||
1477 xfer->status == USBD_TIMEOUT) {
1478 DPRINTF(("ohci_process_done: cancel/timeout %p\n",
1480 /* Handled by abort routine. */
1484 if (xfer->pipe->aborting)
1485 continue; /*Ignore.*/
1488 printf("ohci_softintr: sitd=%p is done\n", sitd);
1491 opipe = (struct ohci_pipe *)xfer->pipe;
1492 if (opipe->aborting)
1495 cc = OHCI_ITD_GET_CC(le32toh(sitd->itd.itd_flags));
1496 if (cc == OHCI_CC_NO_ERROR) {
1497 /* XXX compute length for input */
1498 if (sitd->flags & OHCI_CALL_DONE) {
1499 opipe->u.iso.inuse -= xfer->nframes;
1500 /* XXX update frlengths with actual length */
1501 /* XXX xfer->actlen = actlen; */
1502 xfer->status = USBD_NORMAL_COMPLETION;
1504 usb_transfer_complete(xfer);
1509 xfer->status = USBD_IOERROR;
1511 usb_transfer_complete(xfer);
1516 #ifdef USB_USE_SOFTINTR
1517 if (sc->sc_softwake) {
1518 sc->sc_softwake = 0;
1519 wakeup(&sc->sc_softwake);
1521 #endif /* USB_USE_SOFTINTR */
1523 sc->sc_bus.intr_context--;
1524 DPRINTFN(10,("ohci_softintr: done:\n"));
1528 ohci_device_ctrl_done(usbd_xfer_handle xfer)
1530 DPRINTFN(10,("ohci_device_ctrl_done: xfer=%p\n", xfer));
1533 if (!(xfer->rqflags & URQ_REQUEST)) {
1534 panic("ohci_device_ctrl_done: not a request");
1537 xfer->hcpriv = NULL;
1541 ohci_device_intr_done(usbd_xfer_handle xfer)
1543 struct ohci_pipe *opipe = (struct ohci_pipe *)xfer->pipe;
1544 ohci_softc_t *sc = (ohci_softc_t *)opipe->pipe.device->bus;
1545 ohci_soft_ed_t *sed = opipe->sed;
1546 ohci_soft_td_t *data, *tail;
1549 DPRINTFN(10,("ohci_device_intr_done: xfer=%p, actlen=%d\n",
1550 xfer, xfer->actlen));
1552 xfer->hcpriv = NULL;
1554 if (xfer->pipe->repeat) {
1555 data = opipe->tail.td;
1556 tail = ohci_alloc_std(sc); /* XXX should reuse TD */
1558 xfer->status = USBD_NOMEM;
1563 data->td.td_flags = htole32(
1564 OHCI_TD_IN | OHCI_TD_NOCC |
1565 OHCI_TD_SET_DI(1) | OHCI_TD_TOGGLE_CARRY);
1566 if (xfer->flags & USBD_SHORT_XFER_OK)
1567 data->td.td_flags |= htole32(OHCI_TD_R);
1568 data->td.td_cbp = htole32(DMAADDR(&xfer->dmabuf, 0));
1569 data->nexttd = tail;
1570 data->td.td_nexttd = htole32(tail->physaddr);
1571 data->td.td_be = htole32(le32toh(data->td.td_cbp) +
1573 data->len = xfer->length;
1575 data->flags = OHCI_CALL_DONE | OHCI_ADD_LEN;
1576 xfer->hcpriv = data;
1579 sed->ed.ed_tailp = htole32(tail->physaddr);
1580 opipe->tail.td = tail;
1585 ohci_device_bulk_done(usbd_xfer_handle xfer)
1587 DPRINTFN(10,("ohci_device_bulk_done: xfer=%p, actlen=%d\n",
1588 xfer, xfer->actlen));
1590 xfer->hcpriv = NULL;
1594 ohci_rhsc(ohci_softc_t *sc, usbd_xfer_handle xfer)
1596 usbd_pipe_handle pipe;
1601 hstatus = OREAD4(sc, OHCI_RH_STATUS);
1602 DPRINTF(("ohci_rhsc: sc=%p xfer=%p hstatus=0x%08x\n",
1603 sc, xfer, hstatus));
1606 /* Just ignore the change. */
1612 p = KERNADDR(&xfer->dmabuf, 0);
1613 m = min(sc->sc_noport, xfer->length * 8 - 1);
1614 memset(p, 0, xfer->length);
1615 for (i = 1; i <= m; i++) {
1616 /* Pick out CHANGE bits from the status reg. */
1617 if (OREAD4(sc, OHCI_RH_PORT_STATUS(i)) >> 16)
1618 p[i/8] |= 1 << (i%8);
1620 DPRINTF(("ohci_rhsc: change=0x%02x\n", *p));
1621 xfer->actlen = xfer->length;
1622 xfer->status = USBD_NORMAL_COMPLETION;
1624 usb_transfer_complete(xfer);
1628 ohci_root_intr_done(usbd_xfer_handle xfer)
1630 xfer->hcpriv = NULL;
1634 ohci_root_ctrl_done(usbd_xfer_handle xfer)
1636 xfer->hcpriv = NULL;
1640 * Wait here until controller claims to have an interrupt.
1641 * Then call ohci_intr and return. Use timeout to avoid waiting
1645 ohci_waitintr(ohci_softc_t *sc, usbd_xfer_handle xfer)
1647 int timo = xfer->timeout;
1651 xfer->status = USBD_IN_PROGRESS;
1652 for (usecs = timo * 1000000 / hz; usecs > 0; usecs -= 1000) {
1653 usb_delay_ms(&sc->sc_bus, 1);
1656 intrs = OREAD4(sc, OHCI_INTERRUPT_STATUS) & sc->sc_eintrs;
1657 DPRINTFN(15,("ohci_waitintr: 0x%04x\n", intrs));
1664 if (xfer->status != USBD_IN_PROGRESS)
1670 DPRINTF(("ohci_waitintr: timeout\n"));
1671 xfer->status = USBD_TIMEOUT;
1672 usb_transfer_complete(xfer);
1673 /* XXX should free TD */
1677 ohci_poll(struct usbd_bus *bus)
1679 ohci_softc_t *sc = (ohci_softc_t *)bus;
1683 new = OREAD4(sc, OHCI_INTERRUPT_STATUS);
1685 DPRINTFN(10,("ohci_poll: intrs=0x%04x\n", new));
1690 if (OREAD4(sc, OHCI_INTERRUPT_STATUS) & sc->sc_eintrs)
1695 ohci_device_request(usbd_xfer_handle xfer)
1697 struct ohci_pipe *opipe = (struct ohci_pipe *)xfer->pipe;
1698 usb_device_request_t *req = &xfer->request;
1699 usbd_device_handle dev = opipe->pipe.device;
1700 ohci_softc_t *sc = (ohci_softc_t *)dev->bus;
1701 int addr = dev->address;
1702 ohci_soft_td_t *setup, *stat, *next, *tail;
1703 ohci_soft_ed_t *sed;
1708 isread = req->bmRequestType & UT_READ;
1709 len = UGETW(req->wLength);
1711 DPRINTFN(3,("ohci_device_control type=0x%02x, request=0x%02x, "
1712 "wValue=0x%04x, wIndex=0x%04x len=%d, addr=%d, endpt=%d\n",
1713 req->bmRequestType, req->bRequest, UGETW(req->wValue),
1714 UGETW(req->wIndex), len, addr,
1715 opipe->pipe.endpoint->edesc->bEndpointAddress));
1717 setup = opipe->tail.td;
1718 stat = ohci_alloc_std(sc);
1723 tail = ohci_alloc_std(sc);
1731 opipe->u.ctl.length = len;
1733 /* Update device address and length since they may have changed
1734 during the setup of the control pipe in usbd_new_device(). */
1735 /* XXX This only needs to be done once, but it's too early in open. */
1736 /* XXXX Should not touch ED here! */
1737 sed->ed.ed_flags = htole32(
1738 (le32toh(sed->ed.ed_flags) & ~(OHCI_ED_ADDRMASK | OHCI_ED_MAXPMASK)) |
1739 OHCI_ED_SET_FA(addr) |
1740 OHCI_ED_SET_MAXP(UGETW(opipe->pipe.endpoint->edesc->wMaxPacketSize)));
1744 /* Set up data transaction */
1746 ohci_soft_td_t *std = stat;
1748 err = ohci_alloc_std_chain(opipe, sc, len, isread, xfer,
1750 stat = stat->nexttd; /* point at free TD */
1753 /* Start toggle at 1 and then use the carried toggle. */
1754 std->td.td_flags &= htole32(~OHCI_TD_TOGGLE_MASK);
1755 std->td.td_flags |= htole32(OHCI_TD_TOGGLE_1);
1758 memcpy(KERNADDR(&opipe->u.ctl.reqdma, 0), req, sizeof *req);
1760 setup->td.td_flags = htole32(OHCI_TD_SETUP | OHCI_TD_NOCC |
1761 OHCI_TD_TOGGLE_0 | OHCI_TD_NOINTR);
1762 setup->td.td_cbp = htole32(DMAADDR(&opipe->u.ctl.reqdma, 0));
1763 setup->nexttd = next;
1764 setup->td.td_nexttd = htole32(next->physaddr);
1765 setup->td.td_be = htole32(le32toh(setup->td.td_cbp) + sizeof *req - 1);
1769 xfer->hcpriv = setup;
1771 stat->td.td_flags = htole32(
1772 (isread ? OHCI_TD_OUT : OHCI_TD_IN) |
1773 OHCI_TD_NOCC | OHCI_TD_TOGGLE_1 | OHCI_TD_SET_DI(1));
1774 stat->td.td_cbp = 0;
1775 stat->nexttd = tail;
1776 stat->td.td_nexttd = htole32(tail->physaddr);
1778 stat->flags = OHCI_CALL_DONE;
1783 if (ohcidebug > 5) {
1784 DPRINTF(("ohci_device_request:\n"));
1786 ohci_dump_tds(setup);
1790 /* Insert ED in schedule */
1792 sed->ed.ed_tailp = htole32(tail->physaddr);
1793 opipe->tail.td = tail;
1794 OWRITE4(sc, OHCI_COMMAND_STATUS, OHCI_CLF);
1795 if (xfer->timeout && !sc->sc_bus.use_polling) {
1796 usb_callout(xfer->timeout_handle, MS_TO_TICKS(xfer->timeout),
1797 ohci_timeout, xfer);
1802 if (ohcidebug > 20) {
1804 DPRINTF(("ohci_device_request: status=%x\n",
1805 OREAD4(sc, OHCI_COMMAND_STATUS)));
1807 printf("ctrl head:\n");
1808 ohci_dump_ed(sc->sc_ctrl_head);
1811 ohci_dump_tds(setup);
1815 return (USBD_NORMAL_COMPLETION);
1818 ohci_free_std(sc, tail);
1820 ohci_free_std(sc, stat);
1826 * Add an ED to the schedule. Called from a critical section.
1829 ohci_add_ed(ohci_soft_ed_t *sed, ohci_soft_ed_t *head)
1831 DPRINTFN(8,("ohci_add_ed: sed=%p head=%p\n", sed, head));
1833 sed->next = head->next;
1834 sed->ed.ed_nexted = head->ed.ed_nexted;
1836 head->ed.ed_nexted = htole32(sed->physaddr);
1840 * Remove an ED from the schedule. Called from a critical section.
1843 ohci_rem_ed(ohci_soft_ed_t *sed, ohci_soft_ed_t *head)
1849 for (p = head; p != NULL && p->next != sed; p = p->next)
1852 panic("ohci_rem_ed: ED not found");
1853 p->next = sed->next;
1854 p->ed.ed_nexted = sed->ed.ed_nexted;
1858 * When a transfer is completed the TD is added to the done queue by
1859 * the host controller. This queue is the processed by software.
1860 * Unfortunately the queue contains the physical address of the TD
1861 * and we have no simple way to translate this back to a kernel address.
1862 * To make the translation possible (and fast) we use a hash table of
1863 * TDs currently in the schedule. The physical address is used as the
1867 #define HASH(a) (((a) >> 4) % OHCI_HASH_SIZE)
1869 * Called from a critical section
1872 ohci_hash_add_td(ohci_softc_t *sc, ohci_soft_td_t *std)
1874 int h = HASH(std->physaddr);
1876 LIST_INSERT_HEAD(&sc->sc_hash_tds[h], std, hnext);
1880 * Called from a critical section
1883 ohci_hash_rem_td(ohci_softc_t *sc, ohci_soft_td_t *std)
1885 LIST_REMOVE(std, hnext);
1889 ohci_hash_find_td(ohci_softc_t *sc, ohci_physaddr_t a)
1892 ohci_soft_td_t *std;
1894 /* if these are present they should be masked out at an earlier
1897 KASSERT((a&~OHCI_HEADMASK) == 0, ("%s: 0x%b has lower bits set\n",
1898 USBDEVNAME(sc->sc_bus.bdev),
1899 (int) a, "\20\1HALT\2TOGGLE"));
1901 for (std = LIST_FIRST(&sc->sc_hash_tds[h]);
1903 std = LIST_NEXT(std, hnext))
1904 if (std->physaddr == a)
1907 DPRINTF(("%s: ohci_hash_find_td: addr 0x%08lx not found\n",
1908 USBDEVNAME(sc->sc_bus.bdev), (u_long) a));
1913 * Called from a critical section
1916 ohci_hash_add_itd(ohci_softc_t *sc, ohci_soft_itd_t *sitd)
1918 int h = HASH(sitd->physaddr);
1920 DPRINTFN(10,("ohci_hash_add_itd: sitd=%p physaddr=0x%08lx\n",
1921 sitd, (u_long)sitd->physaddr));
1923 LIST_INSERT_HEAD(&sc->sc_hash_itds[h], sitd, hnext);
1927 * Called from a critical section
1930 ohci_hash_rem_itd(ohci_softc_t *sc, ohci_soft_itd_t *sitd)
1932 DPRINTFN(10,("ohci_hash_rem_itd: sitd=%p physaddr=0x%08lx\n",
1933 sitd, (u_long)sitd->physaddr));
1935 LIST_REMOVE(sitd, hnext);
1939 ohci_hash_find_itd(ohci_softc_t *sc, ohci_physaddr_t a)
1942 ohci_soft_itd_t *sitd;
1944 for (sitd = LIST_FIRST(&sc->sc_hash_itds[h]);
1946 sitd = LIST_NEXT(sitd, hnext))
1947 if (sitd->physaddr == a)
1953 ohci_timeout(void *addr)
1955 struct ohci_xfer *oxfer = addr;
1956 struct ohci_pipe *opipe = (struct ohci_pipe *)oxfer->xfer.pipe;
1957 ohci_softc_t *sc = (ohci_softc_t *)opipe->pipe.device->bus;
1959 DPRINTF(("ohci_timeout: oxfer=%p\n", oxfer));
1962 ohci_abort_xfer(&oxfer->xfer, USBD_TIMEOUT);
1966 /* Execute the abort in a process context. */
1967 usb_init_task(&oxfer->abort_task, ohci_timeout_task, addr);
1968 usb_add_task(oxfer->xfer.pipe->device, &oxfer->abort_task);
1972 ohci_timeout_task(void *addr)
1974 usbd_xfer_handle xfer = addr;
1976 DPRINTF(("ohci_timeout_task: xfer=%p\n", xfer));
1979 ohci_abort_xfer(xfer, USBD_TIMEOUT);
1985 ohci_dump_tds(ohci_soft_td_t *std)
1987 for (; std; std = std->nexttd)
1992 ohci_dump_td(ohci_soft_td_t *std)
1996 bitmask_snprintf((u_int32_t)le32toh(std->td.td_flags),
1997 "\20\23R\24OUT\25IN\31TOG1\32SETTOGGLE",
1998 sbuf, sizeof(sbuf));
2000 printf("TD(%p) at %08lx: %s delay=%d ec=%d cc=%d\ncbp=0x%08lx "
2001 "nexttd=0x%08lx be=0x%08lx\n",
2002 std, (u_long)std->physaddr, sbuf,
2003 OHCI_TD_GET_DI(le32toh(std->td.td_flags)),
2004 OHCI_TD_GET_EC(le32toh(std->td.td_flags)),
2005 OHCI_TD_GET_CC(le32toh(std->td.td_flags)),
2006 (u_long)le32toh(std->td.td_cbp),
2007 (u_long)le32toh(std->td.td_nexttd),
2008 (u_long)le32toh(std->td.td_be));
2012 ohci_dump_itd(ohci_soft_itd_t *sitd)
2016 printf("ITD(%p) at %08lx: sf=%d di=%d fc=%d cc=%d\n"
2017 "bp0=0x%08lx next=0x%08lx be=0x%08lx\n",
2018 sitd, (u_long)sitd->physaddr,
2019 OHCI_ITD_GET_SF(le32toh(sitd->itd.itd_flags)),
2020 OHCI_ITD_GET_DI(le32toh(sitd->itd.itd_flags)),
2021 OHCI_ITD_GET_FC(le32toh(sitd->itd.itd_flags)),
2022 OHCI_ITD_GET_CC(le32toh(sitd->itd.itd_flags)),
2023 (u_long)le32toh(sitd->itd.itd_bp0),
2024 (u_long)le32toh(sitd->itd.itd_nextitd),
2025 (u_long)le32toh(sitd->itd.itd_be));
2026 for (i = 0; i < OHCI_ITD_NOFFSET; i++)
2027 printf("offs[%d]=0x%04x ", i,
2028 (u_int)le16toh(sitd->itd.itd_offset[i]));
2033 ohci_dump_itds(ohci_soft_itd_t *sitd)
2035 for (; sitd; sitd = sitd->nextitd)
2036 ohci_dump_itd(sitd);
2040 ohci_dump_ed(ohci_soft_ed_t *sed)
2042 char sbuf[128], sbuf2[128];
2044 bitmask_snprintf((u_int32_t)le32toh(sed->ed.ed_flags),
2045 "\20\14OUT\15IN\16LOWSPEED\17SKIP\20ISO",
2046 sbuf, sizeof(sbuf));
2047 bitmask_snprintf((u_int32_t)le32toh(sed->ed.ed_headp),
2048 "\20\1HALT\2CARRY", sbuf2, sizeof(sbuf2));
2050 printf("ED(%p) at 0x%08lx: addr=%d endpt=%d maxp=%d flags=%s\ntailp=0x%08lx "
2051 "headflags=%s headp=0x%08lx nexted=0x%08lx\n",
2052 sed, (u_long)sed->physaddr,
2053 OHCI_ED_GET_FA(le32toh(sed->ed.ed_flags)),
2054 OHCI_ED_GET_EN(le32toh(sed->ed.ed_flags)),
2055 OHCI_ED_GET_MAXP(le32toh(sed->ed.ed_flags)), sbuf,
2056 (u_long)le32toh(sed->ed.ed_tailp), sbuf2,
2057 (u_long)le32toh(sed->ed.ed_headp),
2058 (u_long)le32toh(sed->ed.ed_nexted));
2063 ohci_open(usbd_pipe_handle pipe)
2065 usbd_device_handle dev = pipe->device;
2066 ohci_softc_t *sc = (ohci_softc_t *)dev->bus;
2067 usb_endpoint_descriptor_t *ed = pipe->endpoint->edesc;
2068 struct ohci_pipe *opipe = (struct ohci_pipe *)pipe;
2069 u_int8_t addr = dev->address;
2070 u_int8_t xfertype = ed->bmAttributes & UE_XFERTYPE;
2071 ohci_soft_ed_t *sed;
2072 ohci_soft_td_t *std;
2073 ohci_soft_itd_t *sitd;
2074 ohci_physaddr_t tdphys;
2079 DPRINTFN(1, ("ohci_open: pipe=%p, addr=%d, endpt=%d (%d)\n",
2080 pipe, addr, ed->bEndpointAddress, sc->sc_addr));
2083 return (USBD_IOERROR);
2088 if (addr == sc->sc_addr) {
2089 switch (ed->bEndpointAddress) {
2090 case USB_CONTROL_ENDPOINT:
2091 pipe->methods = &ohci_root_ctrl_methods;
2093 case UE_DIR_IN | OHCI_INTR_ENDPT:
2094 pipe->methods = &ohci_root_intr_methods;
2097 return (USBD_INVAL);
2100 sed = ohci_alloc_sed(sc);
2104 if (xfertype == UE_ISOCHRONOUS) {
2105 sitd = ohci_alloc_sitd(sc);
2108 opipe->tail.itd = sitd;
2109 opipe->aborting = 0;
2110 tdphys = sitd->physaddr;
2111 fmt = OHCI_ED_FORMAT_ISO;
2112 if (UE_GET_DIR(ed->bEndpointAddress) == UE_DIR_IN)
2113 fmt |= OHCI_ED_DIR_IN;
2115 fmt |= OHCI_ED_DIR_OUT;
2117 std = ohci_alloc_std(sc);
2120 opipe->tail.td = std;
2121 tdphys = std->physaddr;
2122 fmt = OHCI_ED_FORMAT_GEN | OHCI_ED_DIR_TD;
2124 sed->ed.ed_flags = htole32(
2125 OHCI_ED_SET_FA(addr) |
2126 OHCI_ED_SET_EN(UE_GET_ADDR(ed->bEndpointAddress)) |
2127 (dev->speed == USB_SPEED_LOW ? OHCI_ED_SPEED : 0) |
2129 OHCI_ED_SET_MAXP(UGETW(ed->wMaxPacketSize)));
2130 sed->ed.ed_headp = sed->ed.ed_tailp = htole32(tdphys);
2134 pipe->methods = &ohci_device_ctrl_methods;
2135 err = usb_allocmem(&sc->sc_bus,
2136 sizeof(usb_device_request_t),
2137 0, &opipe->u.ctl.reqdma);
2141 ohci_add_ed(sed, sc->sc_ctrl_head);
2145 pipe->methods = &ohci_device_intr_methods;
2146 ival = pipe->interval;
2147 if (ival == USBD_DEFAULT_INTERVAL)
2148 ival = ed->bInterval;
2149 return (ohci_device_setintr(sc, opipe, ival));
2150 case UE_ISOCHRONOUS:
2151 pipe->methods = &ohci_device_isoc_methods;
2152 return (ohci_setup_isoc(pipe));
2154 pipe->methods = &ohci_device_bulk_methods;
2156 ohci_add_ed(sed, sc->sc_bulk_head);
2161 return (USBD_NORMAL_COMPLETION);
2165 ohci_free_std(sc, std);
2168 ohci_free_sed(sc, sed);
2170 return (USBD_NOMEM);
2175 * Close a reqular pipe.
2176 * Assumes that there are no pending transactions.
2179 ohci_close_pipe(usbd_pipe_handle pipe, ohci_soft_ed_t *head)
2181 struct ohci_pipe *opipe = (struct ohci_pipe *)pipe;
2182 ohci_softc_t *sc = (ohci_softc_t *)pipe->device->bus;
2183 ohci_soft_ed_t *sed = opipe->sed;
2187 sed->ed.ed_flags |= htole32(OHCI_ED_SKIP);
2188 if ((le32toh(sed->ed.ed_tailp) & OHCI_HEADMASK) !=
2189 (le32toh(sed->ed.ed_headp) & OHCI_HEADMASK)) {
2190 ohci_soft_td_t *std;
2191 std = ohci_hash_find_td(sc, le32toh(sed->ed.ed_headp));
2192 printf("ohci_close_pipe: pipe not empty sed=%p hd=0x%x "
2193 "tl=0x%x pipe=%p, std=%p\n", sed,
2194 (int)le32toh(sed->ed.ed_headp),
2195 (int)le32toh(sed->ed.ed_tailp),
2198 usbd_dump_pipe(&opipe->pipe);
2205 usb_delay_ms(&sc->sc_bus, 2);
2206 if ((le32toh(sed->ed.ed_tailp) & OHCI_HEADMASK) !=
2207 (le32toh(sed->ed.ed_headp) & OHCI_HEADMASK))
2208 printf("ohci_close_pipe: pipe still not empty\n");
2211 ohci_rem_ed(sed, head);
2212 /* Make sure the host controller is not touching this ED */
2213 usb_delay_ms(&sc->sc_bus, 1);
2215 ohci_free_sed(sc, opipe->sed);
2219 * Abort a device request.
2220 * If this routine is called from a critical section it guarantees that
2221 * the request will be removed from the hardware scheduling and that
2222 * the callback for it will be called with USBD_CANCELLED status.
2223 * It's impossible to guarantee that the requested transfer will not
2224 * have happened since the hardware runs concurrently.
2225 * If the transaction has already happened we rely on the ordinary
2226 * interrupt processing to process it.
2229 ohci_abort_xfer(usbd_xfer_handle xfer, usbd_status status)
2231 struct ohci_pipe *opipe = (struct ohci_pipe *)xfer->pipe;
2232 ohci_softc_t *sc = (ohci_softc_t *)opipe->pipe.device->bus;
2233 ohci_soft_ed_t *sed = opipe->sed;
2234 ohci_soft_td_t *p, *n;
2235 ohci_physaddr_t headp;
2238 DPRINTF(("ohci_abort_xfer: xfer=%p pipe=%p sed=%p\n", xfer, opipe,sed));
2241 /* If we're dying, just do the software part. */
2243 xfer->status = status; /* make software ignore it */
2244 usb_uncallout(xfer->timeout_handle, ohci_timeout, xfer);
2245 usb_transfer_complete(xfer);
2249 if (xfer->device->bus->intr_context /* || !curproc REMOVED DFly */)
2250 panic("ohci_abort_xfer: not in process context");
2253 * Step 1: Make interrupt routine and hardware ignore xfer.
2256 xfer->status = status; /* make software ignore it */
2257 usb_uncallout(xfer->timeout_handle, ohci_timeout, xfer);
2259 DPRINTFN(1,("ohci_abort_xfer: stop ed=%p\n", sed));
2260 sed->ed.ed_flags |= htole32(OHCI_ED_SKIP); /* force hardware skip */
2263 * Step 2: Wait until we know hardware has finished any possible
2264 * use of the xfer. Also make sure the soft interrupt routine
2267 usb_delay_ms(opipe->pipe.device->bus, 20); /* Hardware finishes in 1ms */
2269 #ifdef USB_USE_SOFTINTR
2270 sc->sc_softwake = 1;
2271 #endif /* USB_USE_SOFTINTR */
2272 usb_schedsoftintr(&sc->sc_bus);
2273 #ifdef USB_USE_SOFTINTR
2274 tsleep(&sc->sc_softwake, 0, "ohciab", 0);
2275 #endif /* USB_USE_SOFTINTR */
2279 * Step 3: Remove any vestiges of the xfer from the hardware.
2280 * The complication here is that the hardware may have executed
2281 * beyond the xfer we're trying to abort. So as we're scanning
2282 * the TDs of this xfer we check if the hardware points to
2290 printf("ohci_abort_xfer: hcpriv is NULL\n");
2295 if (ohcidebug > 1) {
2296 DPRINTF(("ohci_abort_xfer: sed=\n"));
2301 headp = le32toh(sed->ed.ed_headp) & OHCI_HEADMASK;
2303 for (; p->xfer == xfer; p = n) {
2304 hit |= headp == p->physaddr;
2306 ohci_free_std(sc, p);
2308 /* Zap headp register if hardware pointed inside the xfer. */
2310 DPRINTFN(1,("ohci_abort_xfer: set hd=0x%08x, tl=0x%08x\n",
2311 (int)p->physaddr, (int)le32toh(sed->ed.ed_tailp)));
2312 sed->ed.ed_headp = htole32(p->physaddr); /* unlink TDs */
2314 DPRINTFN(1,("ohci_abort_xfer: no hit\n"));
2318 * Step 4: Turn on hardware again.
2320 sed->ed.ed_flags &= htole32(~OHCI_ED_SKIP); /* remove hardware skip */
2323 * Step 5: Execute callback.
2325 usb_transfer_complete(xfer);
2331 * Data structures and routines to emulate the root hub.
2333 Static usb_device_descriptor_t ohci_devd = {
2334 USB_DEVICE_DESCRIPTOR_SIZE,
2335 UDESC_DEVICE, /* type */
2336 {0x00, 0x01}, /* USB version */
2337 UDCLASS_HUB, /* class */
2338 UDSUBCLASS_HUB, /* subclass */
2339 UDPROTO_FSHUB, /* protocol */
2340 64, /* max packet */
2341 {0},{0},{0x00,0x01}, /* device id */
2342 1,2,0, /* string indicies */
2343 1 /* # of configurations */
2346 Static usb_config_descriptor_t ohci_confd = {
2347 USB_CONFIG_DESCRIPTOR_SIZE,
2349 {USB_CONFIG_DESCRIPTOR_SIZE +
2350 USB_INTERFACE_DESCRIPTOR_SIZE +
2351 USB_ENDPOINT_DESCRIPTOR_SIZE},
2359 Static usb_interface_descriptor_t ohci_ifcd = {
2360 USB_INTERFACE_DESCRIPTOR_SIZE,
2371 Static usb_endpoint_descriptor_t ohci_endpd = {
2372 USB_ENDPOINT_DESCRIPTOR_SIZE,
2374 UE_DIR_IN | OHCI_INTR_ENDPT,
2376 {8, 0}, /* max packet */
2380 Static usb_hub_descriptor_t ohci_hubd = {
2381 USB_HUB_DESCRIPTOR_SIZE,
2391 ohci_str(usb_string_descriptor_t *p, int l, const char *s)
2397 p->bLength = 2 * strlen(s) + 2;
2400 p->bDescriptorType = UDESC_STRING;
2402 for (i = 0; s[i] && l > 1; i++, l -= 2)
2403 USETW2(p->bString[i], 0, s[i]);
2408 * Simulate a hardware hub by handling all the necessary requests.
2411 ohci_root_ctrl_transfer(usbd_xfer_handle xfer)
2415 /* Insert last in queue. */
2416 err = usb_insert_transfer(xfer);
2420 /* Pipe isn't running, start first */
2421 return (ohci_root_ctrl_start(SIMPLEQ_FIRST(&xfer->pipe->queue)));
2425 ohci_root_ctrl_start(usbd_xfer_handle xfer)
2427 ohci_softc_t *sc = (ohci_softc_t *)xfer->pipe->device->bus;
2428 usb_device_request_t *req;
2431 int len, value, index, l, totlen = 0;
2432 usb_port_status_t ps;
2433 usb_hub_descriptor_t hubd;
2438 return (USBD_IOERROR);
2441 if (!(xfer->rqflags & URQ_REQUEST))
2443 return (USBD_INVAL);
2445 req = &xfer->request;
2447 DPRINTFN(4,("ohci_root_ctrl_control type=0x%02x request=%02x\n",
2448 req->bmRequestType, req->bRequest));
2450 len = UGETW(req->wLength);
2451 value = UGETW(req->wValue);
2452 index = UGETW(req->wIndex);
2455 buf = KERNADDR(&xfer->dmabuf, 0);
2457 #define C(x,y) ((x) | ((y) << 8))
2458 switch(C(req->bRequest, req->bmRequestType)) {
2459 case C(UR_CLEAR_FEATURE, UT_WRITE_DEVICE):
2460 case C(UR_CLEAR_FEATURE, UT_WRITE_INTERFACE):
2461 case C(UR_CLEAR_FEATURE, UT_WRITE_ENDPOINT):
2463 * DEVICE_REMOTE_WAKEUP and ENDPOINT_HALT are no-ops
2464 * for the integrated root hub.
2467 case C(UR_GET_CONFIG, UT_READ_DEVICE):
2469 *(u_int8_t *)buf = sc->sc_conf;
2473 case C(UR_GET_DESCRIPTOR, UT_READ_DEVICE):
2474 DPRINTFN(8,("ohci_root_ctrl_control wValue=0x%04x\n", value));
2475 switch(value >> 8) {
2477 if ((value & 0xff) != 0) {
2481 totlen = l = min(len, USB_DEVICE_DESCRIPTOR_SIZE);
2482 USETW(ohci_devd.idVendor, sc->sc_id_vendor);
2483 memcpy(buf, &ohci_devd, l);
2486 if ((value & 0xff) != 0) {
2490 totlen = l = min(len, USB_CONFIG_DESCRIPTOR_SIZE);
2491 memcpy(buf, &ohci_confd, l);
2492 buf = (char *)buf + l;
2494 l = min(len, USB_INTERFACE_DESCRIPTOR_SIZE);
2496 memcpy(buf, &ohci_ifcd, l);
2497 buf = (char *)buf + l;
2499 l = min(len, USB_ENDPOINT_DESCRIPTOR_SIZE);
2501 memcpy(buf, &ohci_endpd, l);
2506 *(u_int8_t *)buf = 0;
2508 switch (value & 0xff) {
2509 case 1: /* Vendor */
2510 totlen = ohci_str(buf, len, sc->sc_vendor);
2512 case 2: /* Product */
2513 totlen = ohci_str(buf, len, "OHCI root hub");
2522 case C(UR_GET_INTERFACE, UT_READ_INTERFACE):
2524 *(u_int8_t *)buf = 0;
2528 case C(UR_GET_STATUS, UT_READ_DEVICE):
2530 USETW(((usb_status_t *)buf)->wStatus,UDS_SELF_POWERED);
2534 case C(UR_GET_STATUS, UT_READ_INTERFACE):
2535 case C(UR_GET_STATUS, UT_READ_ENDPOINT):
2537 USETW(((usb_status_t *)buf)->wStatus, 0);
2541 case C(UR_SET_ADDRESS, UT_WRITE_DEVICE):
2542 if (value >= USB_MAX_DEVICES) {
2546 sc->sc_addr = value;
2548 case C(UR_SET_CONFIG, UT_WRITE_DEVICE):
2549 if (value != 0 && value != 1) {
2553 sc->sc_conf = value;
2555 case C(UR_SET_DESCRIPTOR, UT_WRITE_DEVICE):
2557 case C(UR_SET_FEATURE, UT_WRITE_DEVICE):
2558 case C(UR_SET_FEATURE, UT_WRITE_INTERFACE):
2559 case C(UR_SET_FEATURE, UT_WRITE_ENDPOINT):
2562 case C(UR_SET_INTERFACE, UT_WRITE_INTERFACE):
2564 case C(UR_SYNCH_FRAME, UT_WRITE_ENDPOINT):
2567 case C(UR_CLEAR_FEATURE, UT_WRITE_CLASS_DEVICE):
2569 case C(UR_CLEAR_FEATURE, UT_WRITE_CLASS_OTHER):
2570 DPRINTFN(8, ("ohci_root_ctrl_control: UR_CLEAR_PORT_FEATURE "
2571 "port=%d feature=%d\n",
2573 if (index < 1 || index > sc->sc_noport) {
2577 port = OHCI_RH_PORT_STATUS(index);
2579 case UHF_PORT_ENABLE:
2580 OWRITE4(sc, port, UPS_CURRENT_CONNECT_STATUS);
2582 case UHF_PORT_SUSPEND:
2583 OWRITE4(sc, port, UPS_OVERCURRENT_INDICATOR);
2585 case UHF_PORT_POWER:
2586 /* Yes, writing to the LOW_SPEED bit clears power. */
2587 OWRITE4(sc, port, UPS_LOW_SPEED);
2589 case UHF_C_PORT_CONNECTION:
2590 OWRITE4(sc, port, UPS_C_CONNECT_STATUS << 16);
2592 case UHF_C_PORT_ENABLE:
2593 OWRITE4(sc, port, UPS_C_PORT_ENABLED << 16);
2595 case UHF_C_PORT_SUSPEND:
2596 OWRITE4(sc, port, UPS_C_SUSPEND << 16);
2598 case UHF_C_PORT_OVER_CURRENT:
2599 OWRITE4(sc, port, UPS_C_OVERCURRENT_INDICATOR << 16);
2601 case UHF_C_PORT_RESET:
2602 OWRITE4(sc, port, UPS_C_PORT_RESET << 16);
2609 case UHF_C_PORT_CONNECTION:
2610 case UHF_C_PORT_ENABLE:
2611 case UHF_C_PORT_SUSPEND:
2612 case UHF_C_PORT_OVER_CURRENT:
2613 case UHF_C_PORT_RESET:
2614 /* Enable RHSC interrupt if condition is cleared. */
2615 if ((OREAD4(sc, port) >> 16) == 0)
2616 ohci_rhsc_able(sc, 1);
2622 case C(UR_GET_DESCRIPTOR, UT_READ_CLASS_DEVICE):
2623 if ((value & 0xff) != 0) {
2627 v = OREAD4(sc, OHCI_RH_DESCRIPTOR_A);
2629 hubd.bNbrPorts = sc->sc_noport;
2630 USETW(hubd.wHubCharacteristics,
2631 (v & OHCI_NPS ? UHD_PWR_NO_SWITCH :
2632 v & OHCI_PSM ? UHD_PWR_GANGED : UHD_PWR_INDIVIDUAL)
2633 /* XXX overcurrent */
2635 hubd.bPwrOn2PwrGood = OHCI_GET_POTPGT(v);
2636 v = OREAD4(sc, OHCI_RH_DESCRIPTOR_B);
2637 for (i = 0, l = sc->sc_noport; l > 0; i++, l -= 8, v >>= 8)
2638 hubd.DeviceRemovable[i++] = (u_int8_t)v;
2639 hubd.bDescLength = USB_HUB_DESCRIPTOR_SIZE + i;
2640 l = min(len, hubd.bDescLength);
2642 memcpy(buf, &hubd, l);
2644 case C(UR_GET_STATUS, UT_READ_CLASS_DEVICE):
2649 memset(buf, 0, len); /* ? XXX */
2652 case C(UR_GET_STATUS, UT_READ_CLASS_OTHER):
2653 DPRINTFN(8,("ohci_root_ctrl_transfer: get port status i=%d\n",
2655 if (index < 1 || index > sc->sc_noport) {
2663 v = OREAD4(sc, OHCI_RH_PORT_STATUS(index));
2664 DPRINTFN(8,("ohci_root_ctrl_transfer: port status=0x%04x\n",
2666 USETW(ps.wPortStatus, v);
2667 USETW(ps.wPortChange, v >> 16);
2668 l = min(len, sizeof ps);
2669 memcpy(buf, &ps, l);
2672 case C(UR_SET_DESCRIPTOR, UT_WRITE_CLASS_DEVICE):
2675 case C(UR_SET_FEATURE, UT_WRITE_CLASS_DEVICE):
2677 case C(UR_SET_FEATURE, UT_WRITE_CLASS_OTHER):
2678 if (index < 1 || index > sc->sc_noport) {
2682 port = OHCI_RH_PORT_STATUS(index);
2684 case UHF_PORT_ENABLE:
2685 OWRITE4(sc, port, UPS_PORT_ENABLED);
2687 case UHF_PORT_SUSPEND:
2688 OWRITE4(sc, port, UPS_SUSPEND);
2690 case UHF_PORT_RESET:
2691 DPRINTFN(5,("ohci_root_ctrl_transfer: reset port %d\n",
2693 OWRITE4(sc, port, UPS_RESET);
2694 for (i = 0; i < 5; i++) {
2695 usb_delay_ms(&sc->sc_bus,
2696 USB_PORT_ROOT_RESET_DELAY);
2701 if ((OREAD4(sc, port) & UPS_RESET) == 0)
2704 DPRINTFN(8,("ohci port %d reset, status = 0x%04x\n",
2705 index, OREAD4(sc, port)));
2707 case UHF_PORT_POWER:
2708 DPRINTFN(2,("ohci_root_ctrl_transfer: set port power "
2710 OWRITE4(sc, port, UPS_PORT_POWER);
2721 xfer->actlen = totlen;
2722 err = USBD_NORMAL_COMPLETION;
2726 usb_transfer_complete(xfer);
2728 return (USBD_IN_PROGRESS);
2731 /* Abort a root control request. */
2733 ohci_root_ctrl_abort(usbd_xfer_handle xfer)
2735 /* Nothing to do, all transfers are synchronous. */
2738 /* Close the root pipe. */
2740 ohci_root_ctrl_close(usbd_pipe_handle pipe)
2742 DPRINTF(("ohci_root_ctrl_close\n"));
2743 /* Nothing to do. */
2747 ohci_root_intr_transfer(usbd_xfer_handle xfer)
2751 /* Insert last in queue. */
2752 err = usb_insert_transfer(xfer);
2756 /* Pipe isn't running, start first */
2757 return (ohci_root_intr_start(SIMPLEQ_FIRST(&xfer->pipe->queue)));
2761 ohci_root_intr_start(usbd_xfer_handle xfer)
2763 usbd_pipe_handle pipe = xfer->pipe;
2764 ohci_softc_t *sc = (ohci_softc_t *)pipe->device->bus;
2767 return (USBD_IOERROR);
2769 sc->sc_intrxfer = xfer;
2771 return (USBD_IN_PROGRESS);
2774 /* Abort a root interrupt request. */
2776 ohci_root_intr_abort(usbd_xfer_handle xfer)
2778 if (xfer->pipe->intrxfer == xfer) {
2779 DPRINTF(("ohci_root_intr_abort: remove\n"));
2780 xfer->pipe->intrxfer = NULL;
2782 xfer->status = USBD_CANCELLED;
2784 usb_transfer_complete(xfer);
2788 /* Close the root pipe. */
2790 ohci_root_intr_close(usbd_pipe_handle pipe)
2792 ohci_softc_t *sc = (ohci_softc_t *)pipe->device->bus;
2794 DPRINTF(("ohci_root_intr_close\n"));
2796 sc->sc_intrxfer = NULL;
2799 /************************/
2802 ohci_device_ctrl_transfer(usbd_xfer_handle xfer)
2806 /* Insert last in queue. */
2807 err = usb_insert_transfer(xfer);
2811 /* Pipe isn't running, start first */
2812 return (ohci_device_ctrl_start(SIMPLEQ_FIRST(&xfer->pipe->queue)));
2816 ohci_device_ctrl_start(usbd_xfer_handle xfer)
2818 ohci_softc_t *sc = (ohci_softc_t *)xfer->pipe->device->bus;
2822 return (USBD_IOERROR);
2825 if (!(xfer->rqflags & URQ_REQUEST)) {
2827 printf("ohci_device_ctrl_transfer: not a request\n");
2828 return (USBD_INVAL);
2832 err = ohci_device_request(xfer);
2836 if (sc->sc_bus.use_polling)
2837 ohci_waitintr(sc, xfer);
2838 return (USBD_IN_PROGRESS);
2841 /* Abort a device control request. */
2843 ohci_device_ctrl_abort(usbd_xfer_handle xfer)
2845 DPRINTF(("ohci_device_ctrl_abort: xfer=%p\n", xfer));
2846 ohci_abort_xfer(xfer, USBD_CANCELLED);
2849 /* Close a device control pipe. */
2851 ohci_device_ctrl_close(usbd_pipe_handle pipe)
2853 struct ohci_pipe *opipe = (struct ohci_pipe *)pipe;
2854 ohci_softc_t *sc = (ohci_softc_t *)pipe->device->bus;
2856 DPRINTF(("ohci_device_ctrl_close: pipe=%p\n", pipe));
2857 ohci_close_pipe(pipe, sc->sc_ctrl_head);
2858 ohci_free_std(sc, opipe->tail.td);
2861 /************************/
2864 ohci_device_clear_toggle(usbd_pipe_handle pipe)
2866 struct ohci_pipe *opipe = (struct ohci_pipe *)pipe;
2868 opipe->sed->ed.ed_headp &= htole32(~OHCI_TOGGLECARRY);
2872 ohci_noop(usbd_pipe_handle pipe)
2877 ohci_device_bulk_transfer(usbd_xfer_handle xfer)
2881 /* Insert last in queue. */
2882 err = usb_insert_transfer(xfer);
2886 /* Pipe isn't running, start first */
2887 return (ohci_device_bulk_start(SIMPLEQ_FIRST(&xfer->pipe->queue)));
2891 ohci_device_bulk_start(usbd_xfer_handle xfer)
2893 struct ohci_pipe *opipe = (struct ohci_pipe *)xfer->pipe;
2894 usbd_device_handle dev = opipe->pipe.device;
2895 ohci_softc_t *sc = (ohci_softc_t *)dev->bus;
2896 int addr = dev->address;
2897 ohci_soft_td_t *data, *tail, *tdp;
2898 ohci_soft_ed_t *sed;
2899 int len, isread, endpt;
2903 return (USBD_IOERROR);
2906 if (xfer->rqflags & URQ_REQUEST) {
2908 printf("ohci_device_bulk_start: a request\n");
2909 return (USBD_INVAL);
2914 endpt = xfer->pipe->endpoint->edesc->bEndpointAddress;
2915 isread = UE_GET_DIR(endpt) == UE_DIR_IN;
2918 DPRINTFN(4,("ohci_device_bulk_start: xfer=%p len=%d isread=%d "
2919 "flags=%d endpt=%d\n", xfer, len, isread, xfer->flags,
2922 opipe->u.bulk.isread = isread;
2923 opipe->u.bulk.length = len;
2925 /* Update device address */
2926 sed->ed.ed_flags = htole32(
2927 (le32toh(sed->ed.ed_flags) & ~OHCI_ED_ADDRMASK) |
2928 OHCI_ED_SET_FA(addr));
2930 /* Allocate a chain of new TDs (including a new tail). */
2931 data = opipe->tail.td;
2932 err = ohci_alloc_std_chain(opipe, sc, len, isread, xfer,
2934 /* We want interrupt at the end of the transfer. */
2935 tail->td.td_flags &= htole32(~OHCI_TD_INTR_MASK);
2936 tail->td.td_flags |= htole32(OHCI_TD_SET_DI(1));
2937 tail->flags |= OHCI_CALL_DONE;
2938 tail = tail->nexttd; /* point at sentinel */
2943 xfer->hcpriv = data;
2945 DPRINTFN(4,("ohci_device_bulk_start: ed_flags=0x%08x td_flags=0x%08x "
2946 "td_cbp=0x%08x td_be=0x%08x\n",
2947 (int)le32toh(sed->ed.ed_flags),
2948 (int)le32toh(data->td.td_flags),
2949 (int)le32toh(data->td.td_cbp),
2950 (int)le32toh(data->td.td_be)));
2953 if (ohcidebug > 5) {
2955 ohci_dump_tds(data);
2959 /* Insert ED in schedule */
2961 for (tdp = data; tdp != tail; tdp = tdp->nexttd) {
2964 sed->ed.ed_tailp = htole32(tail->physaddr);
2965 opipe->tail.td = tail;
2966 sed->ed.ed_flags &= htole32(~OHCI_ED_SKIP);
2967 OWRITE4(sc, OHCI_COMMAND_STATUS, OHCI_BLF);
2968 if (xfer->timeout && !sc->sc_bus.use_polling) {
2969 usb_callout(xfer->timeout_handle, MS_TO_TICKS(xfer->timeout),
2970 ohci_timeout, xfer);
2974 /* This goes wrong if we are too slow. */
2975 if (ohcidebug > 10) {
2977 DPRINTF(("ohci_device_intr_transfer: status=%x\n",
2978 OREAD4(sc, OHCI_COMMAND_STATUS)));
2980 ohci_dump_tds(data);
2986 return (USBD_IN_PROGRESS);
2990 ohci_device_bulk_abort(usbd_xfer_handle xfer)
2992 DPRINTF(("ohci_device_bulk_abort: xfer=%p\n", xfer));
2993 ohci_abort_xfer(xfer, USBD_CANCELLED);
2997 * Close a device bulk pipe.
3000 ohci_device_bulk_close(usbd_pipe_handle pipe)
3002 struct ohci_pipe *opipe = (struct ohci_pipe *)pipe;
3003 ohci_softc_t *sc = (ohci_softc_t *)pipe->device->bus;
3005 DPRINTF(("ohci_device_bulk_close: pipe=%p\n", pipe));
3006 ohci_close_pipe(pipe, sc->sc_bulk_head);
3007 ohci_free_std(sc, opipe->tail.td);
3010 /************************/
3013 ohci_device_intr_transfer(usbd_xfer_handle xfer)
3017 /* Insert last in queue. */
3018 err = usb_insert_transfer(xfer);
3022 /* Pipe isn't running, start first */
3023 return (ohci_device_intr_start(SIMPLEQ_FIRST(&xfer->pipe->queue)));
3027 ohci_device_intr_start(usbd_xfer_handle xfer)
3029 struct ohci_pipe *opipe = (struct ohci_pipe *)xfer->pipe;
3030 usbd_device_handle dev = opipe->pipe.device;
3031 ohci_softc_t *sc = (ohci_softc_t *)dev->bus;
3032 ohci_soft_ed_t *sed = opipe->sed;
3033 ohci_soft_td_t *data, *tail;
3037 return (USBD_IOERROR);
3039 DPRINTFN(3, ("ohci_device_intr_transfer: xfer=%p len=%d "
3040 "flags=%d priv=%p\n",
3041 xfer, xfer->length, xfer->flags, xfer->priv));
3044 if (xfer->rqflags & URQ_REQUEST)
3045 panic("ohci_device_intr_transfer: a request");
3050 data = opipe->tail.td;
3051 tail = ohci_alloc_std(sc);
3053 return (USBD_NOMEM);
3056 data->td.td_flags = htole32(
3057 OHCI_TD_IN | OHCI_TD_NOCC |
3058 OHCI_TD_SET_DI(1) | OHCI_TD_TOGGLE_CARRY);
3059 if (xfer->flags & USBD_SHORT_XFER_OK)
3060 data->td.td_flags |= htole32(OHCI_TD_R);
3061 data->td.td_cbp = htole32(DMAADDR(&xfer->dmabuf, 0));
3062 data->nexttd = tail;
3063 data->td.td_nexttd = htole32(tail->physaddr);
3064 data->td.td_be = htole32(le32toh(data->td.td_cbp) + len - 1);
3067 data->flags = OHCI_CALL_DONE | OHCI_ADD_LEN;
3068 xfer->hcpriv = data;
3071 if (ohcidebug > 5) {
3072 DPRINTF(("ohci_device_intr_transfer:\n"));
3074 ohci_dump_tds(data);
3078 /* Insert ED in schedule */
3080 sed->ed.ed_tailp = htole32(tail->physaddr);
3081 opipe->tail.td = tail;
3082 sed->ed.ed_flags &= htole32(~OHCI_ED_SKIP);
3086 * This goes horribly wrong, printing thousands of descriptors,
3087 * because false references are followed due to the fact that the
3090 if (ohcidebug > 5) {
3091 usb_delay_ms(&sc->sc_bus, 5);
3092 DPRINTF(("ohci_device_intr_transfer: status=%x\n",
3093 OREAD4(sc, OHCI_COMMAND_STATUS)));
3095 ohci_dump_tds(data);
3100 return (USBD_IN_PROGRESS);
3103 /* Abort a device control request. */
3105 ohci_device_intr_abort(usbd_xfer_handle xfer)
3107 if (xfer->pipe->intrxfer == xfer) {
3108 DPRINTF(("ohci_device_intr_abort: remove\n"));
3109 xfer->pipe->intrxfer = NULL;
3111 ohci_abort_xfer(xfer, USBD_CANCELLED);
3114 /* Close a device interrupt pipe. */
3116 ohci_device_intr_close(usbd_pipe_handle pipe)
3118 struct ohci_pipe *opipe = (struct ohci_pipe *)pipe;
3119 ohci_softc_t *sc = (ohci_softc_t *)pipe->device->bus;
3120 int nslots = opipe->u.intr.nslots;
3121 int pos = opipe->u.intr.pos;
3123 ohci_soft_ed_t *p, *sed = opipe->sed;
3125 DPRINTFN(1,("ohci_device_intr_close: pipe=%p nslots=%d pos=%d\n",
3126 pipe, nslots, pos));
3128 sed->ed.ed_flags |= htole32(OHCI_ED_SKIP);
3129 if ((le32toh(sed->ed.ed_tailp) & OHCI_HEADMASK) !=
3130 (le32toh(sed->ed.ed_headp) & OHCI_HEADMASK))
3131 usb_delay_ms(&sc->sc_bus, 2);
3133 if ((le32toh(sed->ed.ed_tailp) & OHCI_HEADMASK) !=
3134 (le32toh(sed->ed.ed_headp) & OHCI_HEADMASK))
3135 panic("%s: Intr pipe %p still has TDs queued",
3136 USBDEVNAME(sc->sc_bus.bdev), pipe);
3139 for (p = sc->sc_eds[pos]; p && p->next != sed; p = p->next)
3143 panic("ohci_device_intr_close: ED not found");
3145 p->next = sed->next;
3146 p->ed.ed_nexted = sed->ed.ed_nexted;
3149 for (j = 0; j < nslots; j++)
3150 --sc->sc_bws[(pos * nslots + j) % OHCI_NO_INTRS];
3152 ohci_free_std(sc, opipe->tail.td);
3153 ohci_free_sed(sc, opipe->sed);
3157 ohci_device_setintr(ohci_softc_t *sc, struct ohci_pipe *opipe, int ival)
3160 u_int npoll, slow, shigh, nslots;
3162 ohci_soft_ed_t *hsed, *sed = opipe->sed;
3164 DPRINTFN(2, ("ohci_setintr: pipe=%p\n", opipe));
3166 printf("ohci_setintr: 0 interval\n");
3167 return (USBD_INVAL);
3170 npoll = OHCI_NO_INTRS;
3171 while (npoll > ival)
3173 DPRINTFN(2, ("ohci_setintr: ival=%d npoll=%d\n", ival, npoll));
3176 * We now know which level in the tree the ED must go into.
3177 * Figure out which slot has most bandwidth left over.
3183 * 8 7 8 9 10 11 12 13 14
3184 * N (N-1) .. (N-1+N-1)
3187 shigh = slow + npoll;
3188 nslots = OHCI_NO_INTRS / npoll;
3189 for (best = i = slow, bestbw = ~0; i < shigh; i++) {
3191 for (j = 0; j < nslots; j++)
3192 bw += sc->sc_bws[(i * nslots + j) % OHCI_NO_INTRS];
3198 DPRINTFN(2, ("ohci_setintr: best=%d(%d..%d) bestbw=%d\n",
3199 best, slow, shigh, bestbw));
3202 hsed = sc->sc_eds[best];
3203 sed->next = hsed->next;
3204 sed->ed.ed_nexted = hsed->ed.ed_nexted;
3206 hsed->ed.ed_nexted = htole32(sed->physaddr);
3209 for (j = 0; j < nslots; j++)
3210 ++sc->sc_bws[(best * nslots + j) % OHCI_NO_INTRS];
3211 opipe->u.intr.nslots = nslots;
3212 opipe->u.intr.pos = best;
3214 DPRINTFN(5, ("ohci_setintr: returns %p\n", opipe));
3215 return (USBD_NORMAL_COMPLETION);
3218 /***********************/
3221 ohci_device_isoc_transfer(usbd_xfer_handle xfer)
3225 DPRINTFN(5,("ohci_device_isoc_transfer: xfer=%p\n", xfer));
3227 /* Put it on our queue, */
3228 err = usb_insert_transfer(xfer);
3230 /* bail out on error, */
3231 if (err && err != USBD_IN_PROGRESS)
3234 /* XXX should check inuse here */
3236 /* insert into schedule, */
3237 ohci_device_isoc_enter(xfer);
3239 /* and start if the pipe wasn't running */
3241 ohci_device_isoc_start(SIMPLEQ_FIRST(&xfer->pipe->queue));
3247 ohci_device_isoc_enter(usbd_xfer_handle xfer)
3249 struct ohci_pipe *opipe = (struct ohci_pipe *)xfer->pipe;
3250 usbd_device_handle dev = opipe->pipe.device;
3251 ohci_softc_t *sc = (ohci_softc_t *)dev->bus;
3252 ohci_soft_ed_t *sed = opipe->sed;
3253 struct iso *iso = &opipe->u.iso;
3254 struct ohci_xfer *oxfer = (struct ohci_xfer *)xfer;
3255 ohci_soft_itd_t *sitd, *nsitd;
3256 ohci_physaddr_t buf, offs, noffs, bp0, tdphys;
3257 int i, ncur, nframes;
3259 DPRINTFN(1,("ohci_device_isoc_enter: used=%d next=%d xfer=%p "
3261 iso->inuse, iso->next, xfer, xfer->nframes));
3266 if (iso->next == -1) {
3267 /* Not in use yet, schedule it a few frames ahead. */
3268 iso->next = le32toh(sc->sc_hcca->hcca_frame_number) + 5;
3269 DPRINTFN(2,("ohci_device_isoc_enter: start next=%d\n",
3274 for (sitd = xfer->hcpriv; sitd != NULL && sitd->xfer == xfer;
3275 sitd = sitd->nextitd)
3276 ohci_free_sitd(sc, sitd); /* Free ITDs in prev xfer*/
3279 sitd = ohci_alloc_sitd(sc);
3281 panic("cant alloc isoc");
3282 opipe->tail.itd = sitd;
3283 tdphys = sitd->physaddr;
3284 sed->ed.ed_flags |= htole32(OHCI_ED_SKIP); /* Stop*/
3286 sed->ed.ed_tailp = htole32(tdphys);
3287 sed->ed.ed_flags &= htole32(~OHCI_ED_SKIP); /* Start.*/
3291 sitd = opipe->tail.itd;
3292 buf = DMAADDR(&xfer->dmabuf, 0);
3293 bp0 = OHCI_PAGE(buf);
3294 offs = OHCI_PAGE_OFFSET(buf);
3295 nframes = xfer->nframes;
3296 xfer->hcpriv = sitd;
3297 for (i = ncur = 0; i < nframes; i++, ncur++) {
3298 noffs = offs + xfer->frlengths[i];
3299 if (ncur == OHCI_ITD_NOFFSET || /* all offsets used */
3300 OHCI_PAGE(buf + noffs) > bp0 + OHCI_PAGE_SIZE) { /* too many page crossings */
3302 /* Allocate next ITD */
3303 nsitd = ohci_alloc_sitd(sc);
3304 if (nsitd == NULL) {
3306 printf("%s: isoc TD alloc failed\n",
3307 USBDEVNAME(sc->sc_bus.bdev));
3311 /* Fill current ITD */
3312 sitd->itd.itd_flags = htole32(
3314 OHCI_ITD_SET_SF(iso->next) |
3315 OHCI_ITD_SET_DI(6) | /* delay intr a little */
3316 OHCI_ITD_SET_FC(ncur));
3317 sitd->itd.itd_bp0 = htole32(bp0);
3318 sitd->nextitd = nsitd;
3319 sitd->itd.itd_nextitd = htole32(nsitd->physaddr);
3320 sitd->itd.itd_be = htole32(bp0 + offs - 1);
3322 sitd->flags = OHCI_ITD_ACTIVE;
3325 iso->next = iso->next + ncur;
3326 bp0 = OHCI_PAGE(buf + offs);
3329 sitd->itd.itd_offset[ncur] = htole16(OHCI_ITD_MK_OFFS(offs));
3332 nsitd = ohci_alloc_sitd(sc);
3333 if (nsitd == NULL) {
3335 printf("%s: isoc TD alloc failed\n",
3336 USBDEVNAME(sc->sc_bus.bdev));
3339 /* Fixup last used ITD */
3340 sitd->itd.itd_flags = htole32(
3342 OHCI_ITD_SET_SF(iso->next) |
3343 OHCI_ITD_SET_DI(0) |
3344 OHCI_ITD_SET_FC(ncur));
3345 sitd->itd.itd_bp0 = htole32(bp0);
3346 sitd->nextitd = nsitd;
3347 sitd->itd.itd_nextitd = htole32(nsitd->physaddr);
3348 sitd->itd.itd_be = htole32(bp0 + offs - 1);
3350 sitd->flags = OHCI_CALL_DONE | OHCI_ITD_ACTIVE;
3352 iso->next = iso->next + ncur;
3353 iso->inuse += nframes;
3355 xfer->actlen = offs; /* XXX pretend we did it all */
3357 xfer->status = USBD_IN_PROGRESS;
3359 oxfer->ohci_xfer_flags |= OHCI_ISOC_DIRTY;
3362 if (ohcidebug > 5) {
3363 DPRINTF(("ohci_device_isoc_enter: frame=%d\n",
3364 le32toh(sc->sc_hcca->hcca_frame_number)));
3365 ohci_dump_itds(xfer->hcpriv);
3371 sed->ed.ed_tailp = htole32(nsitd->physaddr);
3372 opipe->tail.itd = nsitd;
3373 sed->ed.ed_flags &= htole32(~OHCI_ED_SKIP);
3377 if (ohcidebug > 5) {
3379 DPRINTF(("ohci_device_isoc_enter: after frame=%d\n",
3380 le32toh(sc->sc_hcca->hcca_frame_number)));
3381 ohci_dump_itds(xfer->hcpriv);
3388 ohci_device_isoc_start(usbd_xfer_handle xfer)
3390 struct ohci_pipe *opipe = (struct ohci_pipe *)xfer->pipe;
3391 ohci_softc_t *sc = (ohci_softc_t *)opipe->pipe.device->bus;
3392 ohci_soft_ed_t *sed;
3394 DPRINTFN(5,("ohci_device_isoc_start: xfer=%p\n", xfer));
3397 return (USBD_IOERROR);
3400 if (xfer->status != USBD_IN_PROGRESS)
3401 printf("ohci_device_isoc_start: not in progress %p\n", xfer);
3404 /* XXX anything to do? */
3407 sed = opipe->sed; /* Turn off ED skip-bit to start processing */
3408 sed->ed.ed_flags &= htole32(~OHCI_ED_SKIP); /* ED's ITD list.*/
3411 return (USBD_IN_PROGRESS);
3415 ohci_device_isoc_abort(usbd_xfer_handle xfer)
3417 struct ohci_pipe *opipe = (struct ohci_pipe *)xfer->pipe;
3418 ohci_softc_t *sc = (ohci_softc_t *)opipe->pipe.device->bus;
3419 ohci_soft_ed_t *sed;
3420 ohci_soft_itd_t *sitd, *tmp_sitd;
3421 int undone,num_sitds;
3424 opipe->aborting = 1;
3426 DPRINTFN(1,("ohci_device_isoc_abort: xfer=%p\n", xfer));
3428 /* Transfer is already done. */
3429 if (xfer->status != USBD_NOT_STARTED &&
3430 xfer->status != USBD_IN_PROGRESS) {
3432 printf("ohci_device_isoc_abort: early return\n");
3436 /* Give xfer the requested abort code. */
3437 xfer->status = USBD_CANCELLED;
3440 sed->ed.ed_flags |= htole32(OHCI_ED_SKIP); /* force hardware skip */
3443 sitd = xfer->hcpriv;
3447 printf("ohci_device_isoc_abort: hcpriv==0\n");
3451 for (; sitd != NULL && sitd->xfer == xfer; sitd = sitd->nextitd) {
3454 DPRINTFN(1,("abort sets done sitd=%p\n", sitd));
3462 * Each sitd has up to OHCI_ITD_NOFFSET transfers, each can
3463 * take a usb 1ms cycle. Conservatively wait for it to drain.
3464 * Even with DMA done, it can take awhile for the "batch"
3465 * delivery of completion interrupts to occur thru the controller.
3469 usb_delay_ms(&sc->sc_bus, 2*(num_sitds*OHCI_ITD_NOFFSET));
3472 tmp_sitd = xfer->hcpriv;
3473 for (; tmp_sitd != NULL && tmp_sitd->xfer == xfer;
3474 tmp_sitd = tmp_sitd->nextitd) {
3475 if (OHCI_CC_NO_ERROR ==
3476 OHCI_ITD_GET_CC(le32toh(tmp_sitd->itd.itd_flags)) &&
3477 tmp_sitd->flags & OHCI_ITD_ACTIVE &&
3478 (tmp_sitd->flags & OHCI_ITD_INTFIN) == 0)
3481 } while( undone != 0 );
3486 usb_transfer_complete(xfer);
3490 * Only if there is a `next' sitd in next xfer...
3491 * unlink this xfer's sitds.
3493 sed->ed.ed_headp = htole32(sitd->physaddr);
3495 sed->ed.ed_headp = 0;
3497 sed->ed.ed_flags &= htole32(~OHCI_ED_SKIP); /* remove hardware skip */
3503 ohci_device_isoc_done(usbd_xfer_handle xfer)
3505 /* This null routine corresponds to non-isoc "done()" routines
3506 * that free the stds associated with an xfer after a completed
3507 * xfer interrupt. However, in the case of isoc transfers, the
3508 * sitds associated with the transfer have already been processed
3509 * and reallocated for the next iteration by
3510 * "ohci_device_isoc_transfer()".
3512 * Routine "usb_transfer_complete()" is called at the end of every
3513 * relevant usb interrupt. "usb_transfer_complete()" indirectly
3514 * calls 1) "ohci_device_isoc_transfer()" (which keeps pumping the
3515 * pipeline by setting up the next transfer iteration) and 2) then
3516 * calls "ohci_device_isoc_done()". Isoc transfers have not been
3517 * working for the ohci usb because this routine was trashing the
3518 * xfer set up for the next iteration (thus, only the first
3519 * UGEN_NISOREQS xfers outstanding on an open would work). Perhaps
3520 * this could all be re-factored, but that's another pass...
3525 ohci_setup_isoc(usbd_pipe_handle pipe)
3527 struct ohci_pipe *opipe = (struct ohci_pipe *)pipe;
3528 ohci_softc_t *sc = (ohci_softc_t *)pipe->device->bus;
3529 struct iso *iso = &opipe->u.iso;
3535 ohci_add_ed(opipe->sed, sc->sc_isoc_head);
3538 return (USBD_NORMAL_COMPLETION);
3542 ohci_device_isoc_close(usbd_pipe_handle pipe)
3544 struct ohci_pipe *opipe = (struct ohci_pipe *)pipe;
3545 ohci_softc_t *sc = (ohci_softc_t *)pipe->device->bus;
3546 ohci_soft_ed_t *sed;
3548 DPRINTF(("ohci_device_isoc_close: pipe=%p\n", pipe));
3551 sed->ed.ed_flags |= htole32(OHCI_ED_SKIP); /* Stop device. */
3553 ohci_close_pipe(pipe, sc->sc_isoc_head); /* Stop isoc list, free ED.*/
3555 /* up to NISOREQs xfers still outstanding. */
3558 opipe->tail.itd->isdone = 1;
3560 ohci_free_sitd(sc, opipe->tail.itd); /* Next `avail free' sitd.*/