2 * Copyright (c) 2001 Cubical Solutions Ltd. All rights reserved.
4 * Redistribution and use in source and binary forms, with or without
5 * modification, are permitted provided that the following conditions
7 * 1. Redistributions of source code must retain the above copyright
8 * notice, this list of conditions and the following disclaimer.
9 * 2. Redistributions in binary form must reproduce the above copyright
10 * notice, this list of conditions and the following disclaimer in the
11 * documentation and/or other materials provided with the distribution.
13 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
14 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
15 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
16 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
17 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
18 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
19 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
20 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
21 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
22 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
25 * capi/iavc/iavc_lli.c
26 * The AVM ISDN controllers' Low Level Interface.
28 * $FreeBSD: src/sys/i4b/capi/iavc/iavc_lli.c,v 1.2.2.1 2001/08/10 14:08:34 obrien Exp $
31 #include <sys/param.h>
32 #include <sys/kernel.h>
33 #include <sys/systm.h>
35 #include <sys/socket.h>
36 #include <sys/malloc.h>
39 #include <sys/thread2.h>
41 #include <machine/clock.h>
47 #include <net/i4b/include/machine/i4b_debug.h>
48 #include <net/i4b/include/machine/i4b_ioctl.h>
49 #include <net/i4b/include/machine/i4b_trace.h>
51 #include "../../include/i4b_global.h"
52 #include "../../include/i4b_l3l4.h"
53 #include "../../include/i4b_mbuf.h"
55 #include "../capi_msgs.h"
59 /* Forward declarations of local subroutines... */
61 static int iavc_send_init(iavc_softc_t *);
63 static void iavc_handle_rx(iavc_softc_t *);
64 static void iavc_start_tx(iavc_softc_t *);
67 // Callbacks from the upper (capi) layer:
68 // --------------------------------------
71 // Resets the board and loads the firmware, then initiates
75 // Registers a CAPI application id.
78 // Releases a CAPI application id.
81 // Sends a capi message.
85 iavc_load(capi_softc_t *capi_sc, int len, u_int8_t *cp)
87 iavc_softc_t *sc = (iavc_softc_t*) capi_sc->ctx;
91 kprintf("iavc%d: reset card ....\n", sc->sc_unit);
94 b1dma_reset(sc); /* PCI cards */
96 t1_reset(sc); /* ISA attachment T1 */
98 b1_reset(sc); /* ISA attachment B1 */
103 kprintf("iavc%d: start loading %d bytes firmware ....\n", sc->sc_unit, len);
105 while (len && b1io_save_put_byte(sc, *cp++) == 0)
109 kprintf("iavc%d: loading failed, can't write to card, len = %d\n",
115 kprintf("iavc%d: firmware loaded, wait for ACK ....\n", sc->sc_unit);
117 if(sc->sc_capi.card_type == CARD_TYPEC_AVM_B1_ISA)
118 iavc_put_byte(sc, SEND_POLL);
120 iavc_put_byte(sc, SEND_POLLACK);
122 for (len = 0; len < 1000 && !iavc_rx_full(sc); len++)
125 if (!iavc_rx_full(sc)) {
126 kprintf("iavc%d: loading failed, no ack\n", sc->sc_unit);
130 val = iavc_get_byte(sc);
132 if ((sc->sc_dma && val != RECEIVE_POLLDWORD) ||
133 (!sc->sc_dma && val != RECEIVE_POLL)) {
134 kprintf("iavc%d: loading failed, bad ack = %02x\n", sc->sc_unit, val);
139 kprintf("iavc%d: got ACK = 0x%02x\n", sc->sc_unit, val);
142 /* Start the DMA engine */
146 sc->sc_csr = AVM_FLAG;
147 AMCC_WRITE(sc, AMCC_INTCSR, sc->sc_csr);
148 AMCC_WRITE(sc, AMCC_MCSR, (EN_A2P_TRANSFERS|EN_P2A_TRANSFERS|
149 A2P_HI_PRIORITY|P2A_HI_PRIORITY|
150 RESET_A2P_FLAGS|RESET_P2A_FLAGS));
152 iavc_write_port(sc, 0x07, 0x30); /* XXX magic numbers from */
153 iavc_write_port(sc, 0x10, 0xf0); /* XXX the linux driver */
156 AMCC_WRITE(sc, AMCC_RXPTR, vtophys(&sc->sc_recvbuf[0]));
157 AMCC_WRITE(sc, AMCC_RXLEN, 4);
158 sc->sc_csr |= EN_RX_TC_INT|EN_TX_TC_INT;
159 AMCC_WRITE(sc, AMCC_INTCSR, sc->sc_csr);
164 if(sc->sc_capi.card_type == CARD_TYPEC_AVM_B1_ISA)
173 iavc_register(capi_softc_t *capi_sc, int applid, int nchan)
175 iavc_softc_t *sc = (iavc_softc_t*) capi_sc->ctx;
176 struct mbuf *m = i4b_Dgetmbuf(23);
180 kprintf("iavc%d: can't get memory\n", sc->sc_unit);
185 * byte 0x12 = SEND_REGISTER
188 * dword NumB3Connections 0..nbch
193 p = amcc_put_byte(mtod(m, u_int8_t*), 0);
194 p = amcc_put_byte(p, 0);
195 p = amcc_put_byte(p, SEND_REGISTER);
196 p = amcc_put_word(p, applid);
198 p = amcc_put_word(p, 1024 + (nchan + 1));
200 p = amcc_put_word(p, 1024 * (nchan + 1));
202 p = amcc_put_word(p, nchan);
203 p = amcc_put_word(p, 8);
204 p = amcc_put_word(p, 2048);
206 IF_ENQUEUE(&sc->sc_txq, m);
214 iavc_release(capi_softc_t *capi_sc, int applid)
216 iavc_softc_t *sc = (iavc_softc_t*) capi_sc->ctx;
217 struct mbuf *m = i4b_Dgetmbuf(7);
221 kprintf("iavc%d: can't get memory\n", sc->sc_unit);
226 * byte 0x14 = SEND_RELEASE
230 p = amcc_put_byte(mtod(m, u_int8_t*), 0);
231 p = amcc_put_byte(p, 0);
232 p = amcc_put_byte(p, SEND_RELEASE);
233 p = amcc_put_word(p, applid);
235 IF_ENQUEUE(&sc->sc_txq, m);
242 iavc_send(capi_softc_t *capi_sc, struct mbuf *m)
244 iavc_softc_t *sc = (iavc_softc_t*) capi_sc->ctx;
246 if (sc->sc_state != IAVC_UP) {
247 kprintf("iavc%d: attempt to send before device up\n", sc->sc_unit);
249 if (m->m_next) i4b_Bfreembuf(m->m_next);
255 if (IF_QFULL(&sc->sc_txq)) {
256 IF_DROP(&sc->sc_txq);
258 kprintf("iavc%d: tx overflow, message dropped\n", sc->sc_unit);
260 if (m->m_next) i4b_Bfreembuf(m->m_next);
264 IF_ENQUEUE(&sc->sc_txq, m);
273 // Functions called by ourself during the initialization sequence:
274 // ---------------------------------------------------------------
277 // Sends the system initialization message to a newly loaded
278 // board, and sets state to INIT.
282 iavc_send_init(iavc_softc_t *sc)
284 struct mbuf *m = i4b_Dgetmbuf(15);
288 kprintf("iavc%d: can't get memory\n", sc->sc_unit);
293 * byte 0x11 = SEND_INIT
294 * dword NumApplications
299 p = amcc_put_byte(mtod(m, u_int8_t*), 0);
300 p = amcc_put_byte(p, 0);
301 p = amcc_put_byte(p, SEND_INIT);
302 p = amcc_put_word(p, 1); /* XXX MaxAppl XXX */
303 p = amcc_put_word(p, sc->sc_capi.sc_nbch);
304 p = amcc_put_word(p, sc->sc_unit);
307 IF_ENQUEUE(&sc->sc_txq, m);
311 sc->sc_state = IAVC_INIT;
317 // Functions called during normal operation:
318 // -----------------------------------------
321 // Reads the initialization reply and calls capi_ll_control().
323 // iavc_receive_new_ncci
324 // Reads a new NCCI notification and calls capi_ll_control().
326 // iavc_receive_free_ncci
327 // Reads a freed NCCI notification and calls capi_ll_control().
329 // iavc_receive_task_ready
330 // Reads a task ready message -- which should not occur XXX.
332 // iavc_receive_debugmsg
333 // Reads a debug message -- which should not occur XXX.
335 // iavc_receive_start
336 // Reads a START TRANSMIT message and unblocks device.
339 // Reads a STOP TRANSMIT message and blocks device.
342 // Reads an incoming message and calls capi_ll_receive().
346 iavc_receive_init(iavc_softc_t *sc, u_int8_t *dmabuf)
350 u_int8_t *cardtype, *serial, *profile, *version, *caps, *prot;
353 p = amcc_get_word(dmabuf, &Length);
355 Length = iavc_get_slice(sc, sc->sc_recvbuf);
362 kprintf("iavc%d: rx_init: ", sc->sc_unit);
363 while (len < Length) {
364 kprintf(" %02x", p[len]);
365 if (len && (len % 16) == 0) kprintf("\n");
368 if (len % 16) kprintf("\n");
373 p += (*p + 1); /* driver version */
375 p += (*p + 1); /* card type */
376 p += (*p + 1); /* hardware ID */
378 p += (*p + 1); /* serial number */
380 p += (*p + 1); /* supported options */
382 p += (*p + 1); /* supported protocols */
385 if (cardtype && serial && profile) {
386 int nbch = ((profile[3]<<8) | profile[2]);
388 kprintf("iavc%d: AVM %s, s/n %s, %d chans, f/w rev %s, prot %s\n",
389 sc->sc_unit, cardtype, serial, nbch, version, prot);
392 kprintf("iavc%d: %s\n", sc->sc_unit, caps);
394 capi_ll_control(&sc->sc_capi, CAPI_CTRL_PROFILE, (int) profile);
397 kprintf("iavc%d: no profile data in info response?\n", sc->sc_unit);
400 sc->sc_blocked = TRUE; /* controller will send START when ready */
405 iavc_receive_start(iavc_softc_t *sc, u_int8_t *dmabuf)
407 struct mbuf *m = i4b_Dgetmbuf(3);
410 if (sc->sc_blocked && sc->sc_state == IAVC_UP)
411 kprintf("iavc%d: receive_start\n", sc->sc_unit);
414 kprintf("iavc%d: can't get memory\n", sc->sc_unit);
419 * byte 0x73 = SEND_POLLACK
422 p = amcc_put_byte(mtod(m, u_int8_t*), 0);
423 p = amcc_put_byte(p, 0);
424 p = amcc_put_byte(p, SEND_POLLACK);
426 IF_PREPEND(&sc->sc_txq, m);
428 NDBGL4(L4_IAVCDBG, "iavc%d: blocked = %d, state = %d",
429 sc->sc_unit, sc->sc_blocked, sc->sc_state);
431 sc->sc_blocked = FALSE;
434 /* If this was our first START, register our readiness */
436 if (sc->sc_state != IAVC_UP) {
437 sc->sc_state = IAVC_UP;
438 capi_ll_control(&sc->sc_capi, CAPI_CTRL_READY, TRUE);
445 iavc_receive_stop(iavc_softc_t *sc, u_int8_t *dmabuf)
447 kprintf("iavc%d: receive_stop\n", sc->sc_unit);
448 sc->sc_blocked = TRUE;
453 iavc_receive_new_ncci(iavc_softc_t *sc, u_int8_t *dmabuf)
455 u_int32_t ApplId, NCCI, WindowSize;
458 dmabuf = amcc_get_word(dmabuf, &ApplId);
459 dmabuf = amcc_get_word(dmabuf, &NCCI);
460 dmabuf = amcc_get_word(dmabuf, &WindowSize);
462 ApplId = iavc_get_word(sc);
463 NCCI = iavc_get_word(sc);
464 WindowSize = iavc_get_word(sc);
467 capi_ll_control(&sc->sc_capi, CAPI_CTRL_NEW_NCCI, NCCI);
472 iavc_receive_free_ncci(iavc_softc_t *sc, u_int8_t *dmabuf)
474 u_int32_t ApplId, NCCI;
477 dmabuf = amcc_get_word(dmabuf, &ApplId);
478 dmabuf = amcc_get_word(dmabuf, &NCCI);
480 ApplId = iavc_get_word(sc);
481 NCCI = iavc_get_word(sc);
484 capi_ll_control(&sc->sc_capi, CAPI_CTRL_FREE_NCCI, NCCI);
489 iavc_receive_task_ready(iavc_softc_t *sc, u_int8_t *dmabuf)
491 u_int32_t TaskId, Length;
493 kprintf("iavc%d: receive_task_ready\n", sc->sc_unit);
496 p = amcc_get_word(dmabuf, &TaskId);
497 p = amcc_get_word(p, &Length);
499 TaskId = iavc_get_word(sc);
500 Length = iavc_get_slice(sc, sc->sc_recvbuf);
504 /* XXX could show the message if trace enabled? XXX */
509 iavc_receive_debugmsg(iavc_softc_t *sc, u_int8_t *dmabuf)
513 kprintf("iavc%d: receive_debugmsg\n", sc->sc_unit);
516 p = amcc_get_word(dmabuf, &Length);
518 Length = iavc_get_slice(sc, sc->sc_recvbuf);
522 /* XXX could show the message if trace enabled? XXX */
527 iavc_receive(iavc_softc_t *sc, u_int8_t *dmabuf, int b3data)
530 u_int32_t ApplId, Length;
533 * byte 0x21 = RECEIVE_MESSAGE
540 * byte 0x22 = RECEIVE_DATA_B3_IND
549 dmabuf = amcc_get_word(dmabuf, &ApplId);
550 dmabuf = amcc_get_word(dmabuf, &Length);
552 ApplId = iavc_get_word(sc);
553 Length = iavc_get_slice(sc, sc->sc_recvbuf);
554 dmabuf = sc->sc_recvbuf;
557 m = i4b_Dgetmbuf(Length);
559 kprintf("iavc%d: can't get memory for receive\n", sc->sc_unit);
563 bcopy(dmabuf, mtod(m, u_int8_t*), Length);
567 u_int8_t *p = mtod(m, u_int8_t*);
569 kprintf("iavc%d: applid=%d, len=%d\n", sc->sc_unit, ApplId, Length);
570 while (len < m->m_len) {
571 kprintf(" %02x", p[len]);
572 if (len && (len % 16) == 0) kprintf("\n");
575 if (len % 16) kprintf("\n");
581 dmabuf = amcc_get_word(dmabuf + Length, &Length);
583 Length = iavc_get_slice(sc, sc->sc_recvbuf);
584 dmabuf = sc->sc_recvbuf;
587 m->m_next = i4b_Bgetmbuf(Length);
589 kprintf("iavc%d: can't get memory for receive\n", sc->sc_unit);
594 bcopy(dmabuf, mtod(m->m_next, u_int8_t*), Length);
597 capi_ll_receive(&sc->sc_capi, m);
603 // Checks device interrupt status and calls iavc_handle_{rx,tx}()
607 // Reads in the command byte and calls the subroutines above.
610 // Initiates DMA on the next queued message if possible.
614 iavc_handle_intr(iavc_softc_t *sc)
620 while (iavc_rx_full(sc))
625 status = AMCC_READ(sc, AMCC_INTCSR);
626 if ((status & ANY_S5933_INT) == 0)
629 newcsr = sc->sc_csr | (status & ALL_INT);
630 if (status & TX_TC_INT) newcsr &= ~EN_TX_TC_INT;
631 if (status & RX_TC_INT) newcsr &= ~EN_RX_TC_INT;
632 AMCC_WRITE(sc, AMCC_INTCSR, newcsr);
635 if (status & RX_TC_INT) {
638 if (sc->sc_recvlen == 0) {
639 sc->sc_recvlen = *((u_int32_t*)(&sc->sc_recvbuf[0]));
640 rxlen = (sc->sc_recvlen + 3) & ~3;
641 AMCC_WRITE(sc, AMCC_RXPTR, vtophys(&sc->sc_recvbuf[4]));
642 AMCC_WRITE(sc, AMCC_RXLEN, rxlen);
646 AMCC_WRITE(sc, AMCC_RXPTR, vtophys(&sc->sc_recvbuf[0]));
647 AMCC_WRITE(sc, AMCC_RXLEN, 4);
651 if (status & TX_TC_INT) {
652 sc->sc_csr &= ~EN_TX_TC_INT;
656 AMCC_WRITE(sc, AMCC_INTCSR, sc->sc_csr);
661 iavc_handle_rx(iavc_softc_t *sc)
663 u_int8_t *dmabuf = NULL, cmd;
666 dmabuf = amcc_get_byte(&sc->sc_recvbuf[4], &cmd);
668 cmd = iavc_get_byte(sc);
671 NDBGL4(L4_IAVCDBG, "iavc%d: command = 0x%02x", sc->sc_unit, cmd);
674 case RECEIVE_DATA_B3_IND:
675 iavc_receive(sc, dmabuf, TRUE);
678 case RECEIVE_MESSAGE:
679 iavc_receive(sc, dmabuf, FALSE);
682 case RECEIVE_NEW_NCCI:
683 iavc_receive_new_ncci(sc, dmabuf);
686 case RECEIVE_FREE_NCCI:
687 iavc_receive_free_ncci(sc, dmabuf);
691 iavc_receive_start(sc, dmabuf);
695 iavc_receive_stop(sc, dmabuf);
699 iavc_receive_init(sc, dmabuf);
702 case RECEIVE_TASK_READY:
703 iavc_receive_task_ready(sc, dmabuf);
706 case RECEIVE_DEBUGMSG:
707 iavc_receive_debugmsg(sc, dmabuf);
711 kprintf("iavc%d: unknown msg %02x\n", sc->sc_unit, cmd);
716 iavc_start_tx(iavc_softc_t *sc)
722 /* If device has put us on hold, punt. */
724 if (sc->sc_blocked) {
728 /* If using DMA and transmitter busy, punt. */
730 if (sc->sc_dma && (sc->sc_csr & EN_TX_TC_INT)) {
734 /* Else, see if we have messages to send. */
736 IF_DEQUEUE(&sc->sc_txq, m);
741 /* Have message, will send. */
743 if (CAPIMSG_LEN(m->m_data)) {
744 /* A proper CAPI message, possibly with B3 data */
747 /* Copy message to DMA buffer. */
750 dmabuf = amcc_put_byte(&sc->sc_sendbuf[0], SEND_DATA_B3_REQ);
752 dmabuf = amcc_put_byte(&sc->sc_sendbuf[0], SEND_MESSAGE);
755 dmabuf = amcc_put_word(dmabuf, m->m_len);
756 bcopy(m->m_data, dmabuf, m->m_len);
758 txlen = 5 + m->m_len;
761 dmabuf = amcc_put_word(dmabuf, m->m_next->m_len);
762 bcopy(m->m_next->m_data, dmabuf, m->m_next->m_len);
763 txlen += 4 + m->m_next->m_len;
770 iavc_put_byte(sc, SEND_DATA_B3_REQ);
771 NDBGL4(L4_IAVCDBG, "iavc%d: tx SDB3R msg, len = %d", sc->sc_unit, m->m_len);
773 iavc_put_byte(sc, SEND_MESSAGE);
774 NDBGL4(L4_IAVCDBG, "iavc%d: tx SM msg, len = %d", sc->sc_unit, m->m_len);
778 u_int8_t *p = mtod(m, u_int8_t*);
780 for (len = 0; len < m->m_len; len++) {
781 kprintf(" %02x", *p++);
782 if (len && (len % 16) == 0) kprintf("\n");
784 if (len % 16) kprintf("\n");
788 iavc_put_slice(sc, m->m_data, m->m_len);
791 iavc_put_slice(sc, m->m_next->m_data, m->m_next->m_len);
796 /* A board control message to be sent as is */
799 bcopy(m->m_data + 2, &sc->sc_sendbuf[0], m->m_len - 2);
800 txlen = m->m_len - 2;
805 u_int8_t *p = mtod(m, u_int8_t*) + 2;
807 kprintf("iavc%d: tx BDC msg, len = %d, msg =", sc->sc_unit, m->m_len-2);
808 for (len = 0; len < m->m_len-2; len++) {
809 kprintf(" %02x", *p++);
810 if (len && (len % 16) == 0) kprintf("\n");
812 if (len % 16) kprintf("\n");
816 txlen = m->m_len - 2;
817 dmabuf = mtod(m, char*) + 2;
819 b1io_put_byte(sc, *dmabuf++);
824 i4b_Bfreembuf(m->m_next);
830 /* Start transmitter */
832 txlen = (txlen + 3) & ~3;
833 AMCC_WRITE(sc, AMCC_TXPTR, vtophys(&sc->sc_sendbuf[0]));
834 AMCC_WRITE(sc, AMCC_TXLEN, txlen);
835 sc->sc_csr |= EN_TX_TC_INT;
838 AMCC_WRITE(sc, AMCC_INTCSR, sc->sc_csr);
843 t1io_get_slice(iavc_softc_t *sc, u_int8_t *dp)
846 len = i = b1io_get_word(sc);
847 if (t1io_isfastlink(sc)) {
850 status = t1io_fifostatus(sc) & (T1F_IREADY|T1F_IHALF);
851 if (i >= FIFO_INPBSIZE) status |= T1F_IFULL;
854 case T1F_IREADY|T1F_IHALF|T1F_IFULL:
855 bus_space_read_multi_1(sc->sc_io_bt, sc->sc_io_bh,
856 T1_READ, dp, FIFO_INPBSIZE);
861 case T1F_IREADY|T1F_IHALF:
862 bus_space_read_multi_1(sc->sc_io_bt, sc->sc_io_bh,
869 *dp++ = b1io_get_byte(sc);
873 } else { /* not fastlink */
874 if (i--) *dp++ = b1io_get_byte(sc);
880 t1io_put_slice(iavc_softc_t *sc, u_int8_t *dp, int len)
883 b1io_put_word(sc, i);
884 if (t1io_isfastlink(sc)) {
887 status = t1io_fifostatus(sc) & (T1F_OREADY|T1F_OHALF);
888 if (i >= FIFO_OUTBSIZE) status |= T1F_OFULL;
891 case T1F_OREADY|T1F_OHALF|T1F_OFULL:
892 bus_space_write_multi_1(sc->sc_io_bt, sc->sc_io_bh,
893 T1_WRITE, dp, FIFO_OUTBSIZE);
898 case T1F_OREADY|T1F_OHALF:
899 bus_space_write_multi_1(sc->sc_io_bt, sc->sc_io_bh,
906 b1io_put_byte(sc, *dp++);
911 while (i--) b1io_put_byte(sc, *dp++);
916 b1io_get_word(iavc_softc_t *sc)
919 val |= b1io_get_byte(sc);
920 val |= (b1io_get_byte(sc) << 8);
921 val |= (b1io_get_byte(sc) << 16);
922 val |= (b1io_get_byte(sc) << 24);
927 b1io_put_word(iavc_softc_t *sc, u_int32_t val)
929 b1io_put_byte(sc, (val & 0xff));
930 b1io_put_byte(sc, (val >> 8) & 0xff);
931 b1io_put_byte(sc, (val >> 16) & 0xff);
932 b1io_put_byte(sc, (val >> 24) & 0xff);
936 b1io_get_slice(iavc_softc_t *sc, u_int8_t *dp)
939 len = i = b1io_get_word(sc);
940 while (i--) *dp++ = b1io_get_byte(sc);
945 b1io_put_slice(iavc_softc_t *sc, u_int8_t *dp, int len)
947 b1io_put_word(sc, len);
948 while (len--) b1io_put_byte(sc, *dp++);
952 b1io_read_reg(iavc_softc_t *sc, int reg)
954 b1io_put_byte(sc, READ_REGISTER);
955 b1io_put_word(sc, reg);
956 return b1io_get_word(sc);
960 b1io_write_reg(iavc_softc_t *sc, int reg, u_int32_t val)
962 b1io_put_byte(sc, WRITE_REGISTER);
963 b1io_put_word(sc, reg);
964 b1io_put_word(sc, val);
965 return b1io_get_word(sc);
969 b1io_get_byte(iavc_softc_t *sc)
972 while (!b1io_rx_full(sc) && spin < B1IO_WAIT_MAX) {
973 spin++; DELAY(B1IO_WAIT_DLY);
975 if (b1io_rx_full(sc))
976 return bus_space_read_1(sc->sc_io_bt, sc->sc_io_bh, B1_READ);
977 kprintf("iavc%d: rx not completed\n", sc->sc_unit);
982 b1io_put_byte(iavc_softc_t *sc, u_int8_t val)
985 while (!b1io_tx_empty(sc) && spin < B1IO_WAIT_MAX) {
986 spin++; DELAY(B1IO_WAIT_DLY);
988 if (b1io_tx_empty(sc)) {
989 bus_space_write_1(sc->sc_io_bt, sc->sc_io_bh, B1_WRITE, val);
992 kprintf("iavc%d: tx not emptied\n", sc->sc_unit);
997 b1io_save_put_byte(iavc_softc_t *sc, u_int8_t val)
1000 while (!b1io_tx_empty(sc) && spin < B1IO_WAIT_MAX) {
1001 spin++; DELAY(B1IO_WAIT_DLY);
1003 if (b1io_tx_empty(sc)) {
1004 b1io_outp(sc, B1_WRITE, val);
1007 kprintf("iavc%d: tx not emptied\n", sc->sc_unit);