2 * Copyright (c) 2006 David Gwynne <dlg@openbsd.org>
4 * Permission to use, copy, modify, and distribute this software for any
5 * purpose with or without fee is hereby granted, provided that the above
6 * copyright notice and this permission notice appear in all copies.
8 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
9 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
10 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
11 * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
12 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
13 * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
14 * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
17 * Copyright (c) 2009 The DragonFly Project. All rights reserved.
19 * This code is derived from software contributed to The DragonFly Project
20 * by Matthew Dillon <dillon@backplane.com>
22 * Redistribution and use in source and binary forms, with or without
23 * modification, are permitted provided that the following conditions
26 * 1. Redistributions of source code must retain the above copyright
27 * notice, this list of conditions and the following disclaimer.
28 * 2. Redistributions in binary form must reproduce the above copyright
29 * notice, this list of conditions and the following disclaimer in
30 * the documentation and/or other materials provided with the
32 * 3. Neither the name of The DragonFly Project nor the names of its
33 * contributors may be used to endorse or promote products derived
34 * from this software without specific, prior written permission.
36 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
37 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
38 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
39 * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
40 * COPYRIGHT HOLDERS OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
41 * INCIDENTAL, SPECIAL, EXEMPLARY OR CONSEQUENTIAL DAMAGES (INCLUDING,
42 * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
43 * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
44 * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
45 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT
46 * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
49 * $OpenBSD: ahci.c,v 1.147 2009/02/16 21:19:07 miod Exp $
54 int ahci_port_start(struct ahci_port *, int);
55 int ahci_port_stop(struct ahci_port *, int);
56 int ahci_port_clo(struct ahci_port *);
57 int ahci_port_softreset(struct ahci_port *);
58 int ahci_port_portreset(struct ahci_port *);
60 int ahci_load_prdt(struct ahci_ccb *);
61 void ahci_unload_prdt(struct ahci_ccb *);
62 static void ahci_load_prdt_callback(void *info, bus_dma_segment_t *segs,
63 int nsegs, int error);
64 int ahci_poll(struct ahci_ccb *, int, void (*)(void *));
65 void ahci_start(struct ahci_ccb *);
67 static void ahci_ata_cmd_timeout_unserialized(void *arg);
68 static void ahci_ata_cmd_timeout(void *arg);
70 void ahci_issue_pending_ncq_commands(struct ahci_port *);
71 void ahci_issue_pending_commands(struct ahci_port *, int);
73 u_int32_t ahci_port_intr(struct ahci_port *, u_int32_t);
75 struct ahci_ccb *ahci_get_ccb(struct ahci_port *);
76 void ahci_put_ccb(struct ahci_ccb *);
78 struct ahci_ccb *ahci_get_err_ccb(struct ahci_port *);
79 void ahci_put_err_ccb(struct ahci_ccb *);
81 int ahci_port_read_ncq_error(struct ahci_port *, int *);
83 struct ahci_dmamem *ahci_dmamem_alloc(struct ahci_softc *, bus_dma_tag_t tag);
84 void ahci_dmamem_free(struct ahci_softc *, struct ahci_dmamem *);
85 static void ahci_dmamem_saveseg(void *info, bus_dma_segment_t *segs, int nsegs, int error);
87 void ahci_empty_done(struct ahci_ccb *ccb);
88 void ahci_ata_cmd_done(struct ahci_ccb *ccb);
90 /* Wait for all bits in _b to be cleared */
91 #define ahci_pwait_clr(_ap, _r, _b) ahci_pwait_eq((_ap), (_r), (_b), 0)
93 /* Wait for all bits in _b to be set */
94 #define ahci_pwait_set(_ap, _r, _b) ahci_pwait_eq((_ap), (_r), (_b), (_b))
97 ahci_init(struct ahci_softc *sc)
101 DPRINTF(AHCI_D_VERBOSE, " GHC 0x%b",
102 ahci_read(sc, AHCI_REG_GHC), AHCI_FMT_GHC);
104 /* save BIOS initialised parameters, enable staggered spin up */
105 cap = ahci_read(sc, AHCI_REG_CAP);
106 cap &= AHCI_REG_CAP_SMPS;
107 cap |= AHCI_REG_CAP_SSS;
108 pi = ahci_read(sc, AHCI_REG_PI);
110 if (AHCI_REG_GHC_AE & ahci_read(sc, AHCI_REG_GHC)) {
111 /* reset the controller */
112 ahci_write(sc, AHCI_REG_GHC, AHCI_REG_GHC_HR);
113 if (ahci_wait_ne(sc, AHCI_REG_GHC, AHCI_REG_GHC_HR,
114 AHCI_REG_GHC_HR) != 0) {
115 device_printf(sc->sc_dev,
116 "unable to reset controller\n");
121 /* enable ahci (global interrupts disabled) */
122 ahci_write(sc, AHCI_REG_GHC, AHCI_REG_GHC_AE);
124 /* restore parameters */
125 ahci_write(sc, AHCI_REG_CAP, cap);
126 ahci_write(sc, AHCI_REG_PI, pi);
132 ahci_port_alloc(struct ahci_softc *sc, u_int port)
134 struct ahci_port *ap;
135 struct ahci_ccb *ccb;
138 struct ahci_cmd_hdr *hdr;
139 struct ahci_cmd_table *table;
144 ap = kmalloc(sizeof(*ap), M_DEVBUF, M_WAITOK | M_ZERO);
146 device_printf(sc->sc_dev,
147 "unable to allocate memory for port %d\n",
152 ksnprintf(ap->ap_name, sizeof(ap->ap_name), "%s%d.%d",
153 device_get_name(sc->sc_dev),
154 device_get_unit(sc->sc_dev),
156 sc->sc_ports[port] = ap;
158 if (bus_space_subregion(sc->sc_iot, sc->sc_ioh,
159 AHCI_PORT_REGION(port), AHCI_PORT_SIZE, &ap->ap_ioh) != 0) {
160 device_printf(sc->sc_dev,
161 "unable to create register window for port %d\n",
168 TAILQ_INIT(&ap->ap_ccb_free);
169 TAILQ_INIT(&ap->ap_ccb_pending);
170 lockinit(&ap->ap_ccb_lock, "ahcipo", 0, 0);
172 /* Disable port interrupts */
173 ahci_pwrite(ap, AHCI_PREG_IE, 0);
175 /* Sec 10.1.2 - deinitialise port if it is already running */
176 cmd = ahci_pread(ap, AHCI_PREG_CMD);
177 if ((cmd & (AHCI_PREG_CMD_ST | AHCI_PREG_CMD_CR |
178 AHCI_PREG_CMD_FRE | AHCI_PREG_CMD_FR)) ||
179 (ahci_pread(ap, AHCI_PREG_SCTL) & AHCI_PREG_SCTL_DET)) {
182 r = ahci_port_stop(ap, 1);
184 device_printf(sc->sc_dev,
185 "unable to disable %s, ignoring port %d\n",
186 ((r == 2) ? "CR" : "FR"), port);
191 /* Write DET to zero */
192 ahci_pwrite(ap, AHCI_PREG_SCTL, 0);
196 ap->ap_dmamem_rfis = ahci_dmamem_alloc(sc, sc->sc_tag_rfis);
197 if (ap->ap_dmamem_rfis == NULL) {
202 /* Setup RFIS base address */
203 ap->ap_rfis = (struct ahci_rfis *) AHCI_DMA_KVA(ap->ap_dmamem_rfis);
204 dva = AHCI_DMA_DVA(ap->ap_dmamem_rfis);
205 ahci_pwrite(ap, AHCI_PREG_FBU, (u_int32_t)(dva >> 32));
206 ahci_pwrite(ap, AHCI_PREG_FB, (u_int32_t)dva);
208 /* Enable FIS reception and activate port. */
209 cmd = ahci_pread(ap, AHCI_PREG_CMD) & ~AHCI_PREG_CMD_ICC;
210 cmd |= AHCI_PREG_CMD_FRE | AHCI_PREG_CMD_POD | AHCI_PREG_CMD_SUD;
211 ahci_pwrite(ap, AHCI_PREG_CMD, cmd | AHCI_PREG_CMD_ICC_ACTIVE);
213 /* Check whether port activated. Skip it if not. */
214 cmd = ahci_pread(ap, AHCI_PREG_CMD) & ~AHCI_PREG_CMD_ICC;
215 if ((cmd & AHCI_PREG_CMD_FRE) == 0) {
216 kprintf("NOT-ACTIVATED\n");
221 /* Allocate a CCB for each command slot */
222 ap->ap_ccbs = kmalloc(sizeof(struct ahci_ccb) * sc->sc_ncmds, M_DEVBUF,
224 if (ap->ap_ccbs == NULL) {
225 device_printf(sc->sc_dev,
226 "unable to allocate command list for port %d\n",
231 /* Command List Structures and Command Tables */
232 ap->ap_dmamem_cmd_list = ahci_dmamem_alloc(sc, sc->sc_tag_cmdh);
233 ap->ap_dmamem_cmd_table = ahci_dmamem_alloc(sc, sc->sc_tag_cmdt);
234 if (ap->ap_dmamem_cmd_table == NULL ||
235 ap->ap_dmamem_cmd_list == NULL) {
237 device_printf(sc->sc_dev,
238 "unable to allocate DMA memory for port %d\n",
243 /* Setup command list base address */
244 dva = AHCI_DMA_DVA(ap->ap_dmamem_cmd_list);
245 ahci_pwrite(ap, AHCI_PREG_CLBU, (u_int32_t)(dva >> 32));
246 ahci_pwrite(ap, AHCI_PREG_CLB, (u_int32_t)dva);
248 /* Split CCB allocation into CCBs and assign to command header/table */
249 hdr = AHCI_DMA_KVA(ap->ap_dmamem_cmd_list);
250 table = AHCI_DMA_KVA(ap->ap_dmamem_cmd_table);
251 for (i = 0; i < sc->sc_ncmds; i++) {
252 ccb = &ap->ap_ccbs[i];
254 error = bus_dmamap_create(sc->sc_tag_data, BUS_DMA_ALLOCNOW,
257 device_printf(sc->sc_dev,
258 "unable to create dmamap for port %d "
259 "ccb %d\n", port, i);
263 callout_init(&ccb->ccb_timeout);
266 ccb->ccb_cmd_hdr = &hdr[i];
267 ccb->ccb_cmd_table = &table[i];
268 dva = AHCI_DMA_DVA(ap->ap_dmamem_cmd_table) +
269 ccb->ccb_slot * sizeof(struct ahci_cmd_table);
270 ccb->ccb_cmd_hdr->ctba_hi = htole32((u_int32_t)(dva >> 32));
271 ccb->ccb_cmd_hdr->ctba_lo = htole32((u_int32_t)dva);
274 (struct ata_fis_h2d *)ccb->ccb_cmd_table->cfis;
275 ccb->ccb_xa.packetcmd = ccb->ccb_cmd_table->acmd;
278 ccb->ccb_xa.ata_put_xfer = ahci_ata_put_xfer;
280 ccb->ccb_xa.state = ATA_S_COMPLETE;
284 /* Wait for ICC change to complete */
285 ahci_pwait_clr(ap, AHCI_PREG_CMD, AHCI_PREG_CMD_ICC);
288 rc = ahci_port_portreset(ap);
291 switch (ahci_pread(ap, AHCI_PREG_SSTS) & AHCI_PREG_SSTS_DET) {
292 case AHCI_PREG_SSTS_DET_DEV_NE:
293 kprintf("%s: Device not communicating\n", PORTNAME(ap));
295 case AHCI_PREG_SSTS_DET_PHYOFFLINE:
296 kprintf("%s: PHY offline\n", PORTNAME(ap));
299 kprintf("%s: No device detected\n", PORTNAME(ap));
305 device_printf(sc->sc_dev,
306 "device on port %d didn't come ready, "
309 ahci_pread(ap, AHCI_PREG_TFD), AHCI_PFMT_TFD_STS);
311 /* Try a soft reset to clear busy */
312 rc = ahci_port_softreset(ap);
314 device_printf(sc->sc_dev,
315 "unable to communicate "
316 "with device on port %d\n",
327 * Enable command transfers on the port if a device was detected.
328 * Otherwise leave them disabled but leave the port structure
329 * intact so we get hot-plug interrupts.
332 DPRINTF(AHCI_D_VERBOSE, "%s: detected device on port %d\n",
333 device_get_name(sc->sc_dev), port);
334 if (ahci_port_start(ap, 0)) {
335 device_printf(sc->sc_dev,
336 "failed to start command DMA on port %d, "
337 "disabling\n", port);
338 rc = ENXIO; /* couldn't start port */
343 * A missing or busy device is not fatal for the purposes of
344 * port allocation. We still want to detect hot-plug
347 if (rc == ENODEV || rc == EBUSY) {
351 /* Flush interrupts for port */
352 ahci_pwrite(ap, AHCI_PREG_IS, ahci_pread(ap, AHCI_PREG_IS));
353 ahci_write(sc, AHCI_REG_IS, 1 << port);
355 /* Enable port interrupts */
356 ahci_pwrite(ap, AHCI_PREG_IE,
357 AHCI_PREG_IE_TFEE | AHCI_PREG_IE_HBFE |
358 AHCI_PREG_IE_IFE | AHCI_PREG_IE_OFE |
359 AHCI_PREG_IE_DPE | AHCI_PREG_IE_UFE |
360 AHCI_PREG_IE_PCE | AHCI_PREG_IE_PRCE |
362 ((sc->sc_ccc_ports & (1 << port)) ?
363 0 : (AHCI_PREG_IE_SDBE | AHCI_PREG_IE_DHRE))
365 AHCI_PREG_IE_SDBE | AHCI_PREG_IE_DHRE
371 ahci_port_free(sc, port);
377 ahci_port_free(struct ahci_softc *sc, u_int port)
379 struct ahci_port *ap = sc->sc_ports[port];
380 struct ahci_ccb *ccb;
382 /* Ensure port is disabled and its interrupts are flushed */
384 ahci_pwrite(ap, AHCI_PREG_CMD, 0);
385 ahci_pwrite(ap, AHCI_PREG_IE, 0);
386 ahci_pwrite(ap, AHCI_PREG_IS, ahci_pread(ap, AHCI_PREG_IS));
387 ahci_write(sc, AHCI_REG_IS, 1 << port);
391 while ((ccb = ahci_get_ccb(ap)) != NULL) {
392 if (ccb->ccb_dmamap) {
393 bus_dmamap_destroy(sc->sc_tag_data,
395 ccb->ccb_dmamap = NULL;
398 kfree(ap->ap_ccbs, M_DEVBUF);
402 if (ap->ap_dmamem_cmd_list) {
403 ahci_dmamem_free(sc, ap->ap_dmamem_cmd_list);
404 ap->ap_dmamem_cmd_list = NULL;
406 if (ap->ap_dmamem_rfis) {
407 ahci_dmamem_free(sc, ap->ap_dmamem_rfis);
408 ap->ap_dmamem_rfis = NULL;
410 if (ap->ap_dmamem_cmd_table) {
411 ahci_dmamem_free(sc, ap->ap_dmamem_cmd_table);
412 ap->ap_dmamem_cmd_table = NULL;
415 /* bus_space(9) says we dont free the subregions handle */
418 sc->sc_ports[port] = NULL;
422 ahci_port_start(struct ahci_port *ap, int fre_only)
426 /* Turn on FRE (and ST) */
427 r = ahci_pread(ap, AHCI_PREG_CMD) & ~AHCI_PREG_CMD_ICC;
428 r |= AHCI_PREG_CMD_FRE;
430 r |= AHCI_PREG_CMD_ST;
431 ahci_pwrite(ap, AHCI_PREG_CMD, r);
434 /* (Re-)enable coalescing on the port. */
435 if (ap->ap_sc->sc_ccc_ports & (1 << ap->ap_num)) {
436 ap->ap_sc->sc_ccc_ports_cur |= (1 << ap->ap_num);
437 ahci_write(ap->ap_sc, AHCI_REG_CCC_PORTS,
438 ap->ap_sc->sc_ccc_ports_cur);
442 if (!(ap->ap_sc->sc_flags & AHCI_F_IGN_FR)) {
443 /* Wait for FR to come on */
444 if (ahci_pwait_set(ap, AHCI_PREG_CMD, AHCI_PREG_CMD_FR))
448 /* Wait for CR to come on */
449 if (!fre_only && ahci_pwait_set(ap, AHCI_PREG_CMD, AHCI_PREG_CMD_CR))
456 ahci_port_stop(struct ahci_port *ap, int stop_fis_rx)
461 /* Disable coalescing on the port while it is stopped. */
462 if (ap->ap_sc->sc_ccc_ports & (1 << ap->ap_num)) {
463 ap->ap_sc->sc_ccc_ports_cur &= ~(1 << ap->ap_num);
464 ahci_write(ap->ap_sc, AHCI_REG_CCC_PORTS,
465 ap->ap_sc->sc_ccc_ports_cur);
469 /* Turn off ST (and FRE) */
470 r = ahci_pread(ap, AHCI_PREG_CMD) & ~AHCI_PREG_CMD_ICC;
471 r &= ~AHCI_PREG_CMD_ST;
473 r &= ~AHCI_PREG_CMD_FRE;
474 ahci_pwrite(ap, AHCI_PREG_CMD, r);
476 /* Wait for CR to go off */
477 if (ahci_pwait_clr(ap, AHCI_PREG_CMD, AHCI_PREG_CMD_CR))
480 /* Wait for FR to go off */
481 if (stop_fis_rx && ahci_pwait_clr(ap, AHCI_PREG_CMD, AHCI_PREG_CMD_FR))
487 /* AHCI command list override -> forcibly clear TFD.STS.{BSY,DRQ} */
489 ahci_port_clo(struct ahci_port *ap)
491 struct ahci_softc *sc = ap->ap_sc;
494 /* Only attempt CLO if supported by controller */
495 if ((ahci_read(sc, AHCI_REG_CAP) & AHCI_REG_CAP_SCLO) == 0)
499 cmd = ahci_pread(ap, AHCI_PREG_CMD) & ~AHCI_PREG_CMD_ICC;
501 if (cmd & AHCI_PREG_CMD_ST) {
502 kprintf("%s: CLO requested while port running\n",
506 ahci_pwrite(ap, AHCI_PREG_CMD, cmd | AHCI_PREG_CMD_CLO);
508 /* Wait for completion */
509 if (ahci_pwait_clr(ap, AHCI_PREG_CMD, AHCI_PREG_CMD_CLO)) {
510 kprintf("%s: CLO did not complete\n", PORTNAME(ap));
517 /* AHCI soft reset, Section 10.4.1 */
519 ahci_port_softreset(struct ahci_port *ap)
521 struct ahci_ccb *ccb = NULL;
522 struct ahci_cmd_hdr *cmd_slot;
527 DPRINTF(AHCI_D_VERBOSE, "%s: soft reset\n", PORTNAME(ap));
531 /* Save previous command register state */
532 cmd = ahci_pread(ap, AHCI_PREG_CMD) & ~AHCI_PREG_CMD_ICC;
535 if (ahci_port_stop(ap, 0)) {
536 kprintf("%s: failed to stop port, cannot softreset\n",
541 /* Request CLO if device appears hung */
542 if (ahci_pread(ap, AHCI_PREG_TFD) &
543 (AHCI_PREG_TFD_STS_BSY | AHCI_PREG_TFD_STS_DRQ)) {
547 /* Clear port errors to permit TFD transfer */
548 ahci_pwrite(ap, AHCI_PREG_SERR, ahci_pread(ap, AHCI_PREG_SERR));
551 if (ahci_port_start(ap, 0)) {
552 kprintf("%s: failed to start port, cannot softreset\n",
557 /* Check whether CLO worked */
558 if (ahci_pwait_clr(ap, AHCI_PREG_TFD,
559 AHCI_PREG_TFD_STS_BSY | AHCI_PREG_TFD_STS_DRQ)) {
560 kprintf("%s: CLO %s, need port reset\n",
562 (ahci_read(ap->ap_sc, AHCI_REG_CAP) & AHCI_REG_CAP_SCLO)
563 ? "failed" : "unsupported");
568 /* Prep first D2H command with SRST feature & clear busy/reset flags */
569 ccb = ahci_get_err_ccb(ap);
570 cmd_slot = ccb->ccb_cmd_hdr;
571 bzero(ccb->ccb_cmd_table, sizeof(struct ahci_cmd_table));
573 fis = ccb->ccb_cmd_table->cfis;
574 fis[0] = 0x27; /* Host to device */
575 fis[15] = 0x04; /* SRST DEVCTL */
578 cmd_slot->flags = htole16(5); /* FIS length: 5 DWORDS */
579 cmd_slot->flags |= htole16(AHCI_CMD_LIST_FLAG_C); /* Clear busy on OK */
580 cmd_slot->flags |= htole16(AHCI_CMD_LIST_FLAG_R); /* Reset */
581 cmd_slot->flags |= htole16(AHCI_CMD_LIST_FLAG_W); /* Write */
583 ccb->ccb_xa.state = ATA_S_PENDING;
584 if (ahci_poll(ccb, hz, NULL) != 0)
587 /* Prep second D2H command to read status and complete reset sequence */
588 fis[0] = 0x27; /* Host to device */
592 cmd_slot->flags = htole16(5); /* FIS length: 5 DWORDS */
593 cmd_slot->flags |= htole16(AHCI_CMD_LIST_FLAG_W);
595 ccb->ccb_xa.state = ATA_S_PENDING;
596 if (ahci_poll(ccb, hz, NULL) != 0)
599 if (ahci_pwait_clr(ap, AHCI_PREG_TFD, AHCI_PREG_TFD_STS_BSY |
600 AHCI_PREG_TFD_STS_DRQ | AHCI_PREG_TFD_STS_ERR)) {
601 kprintf("%s: device didn't come ready after reset, TFD: 0x%b\n",
603 ahci_pread(ap, AHCI_PREG_TFD), AHCI_PFMT_TFD_STS);
611 /* Abort our command, if it failed, by stopping command DMA. */
612 if (rc != 0 && (ap->ap_active & (1 << ccb->ccb_slot))) {
613 kprintf("%s: stopping the port, softreset slot "
614 "%d was still active.\n",
617 ahci_port_stop(ap, 0);
619 ccb->ccb_xa.state = ATA_S_ERROR;
620 ahci_put_err_ccb(ccb);
623 /* Restore saved CMD register state */
624 ahci_pwrite(ap, AHCI_PREG_CMD, cmd);
631 /* AHCI port reset, Section 10.4.2 */
633 ahci_port_portreset(struct ahci_port *ap)
638 DPRINTF(AHCI_D_VERBOSE, "%s: port reset\n", PORTNAME(ap));
640 /* Save previous command register state */
641 cmd = ahci_pread(ap, AHCI_PREG_CMD) & ~AHCI_PREG_CMD_ICC;
643 /* Clear ST, ignoring failure */
644 ahci_port_stop(ap, 0);
646 /* Perform device detection */
647 ap->ap_ata.ap_type = ATA_PORT_T_NONE;
648 ahci_pwrite(ap, AHCI_PREG_SCTL, 0);
650 r = AHCI_PREG_SCTL_IPM_DISABLED | AHCI_PREG_SCTL_DET_INIT;
652 if (AhciForceGen1 & (1 << ap->ap_num)) {
653 kprintf("%s: Force 1.5Gbits\n", PORTNAME(ap));
654 r |= AHCI_PREG_SCTL_SPD_GEN1;
656 r |= AHCI_PREG_SCTL_SPD_ANY;
658 ahci_pwrite(ap, AHCI_PREG_SCTL, r);
659 DELAY(10000); /* wait at least 1ms for COMRESET to be sent */
660 r &= ~AHCI_PREG_SCTL_DET_INIT;
661 r |= AHCI_PREG_SCTL_DET_NONE;
662 ahci_pwrite(ap, AHCI_PREG_SCTL, r);
665 /* Wait for device to be detected and communications established */
666 if (ahci_pwait_eq(ap, AHCI_PREG_SSTS, AHCI_PREG_SSTS_DET,
667 AHCI_PREG_SSTS_DET_DEV)) {
672 /* Clear SERR (incl X bit), so TFD can update */
673 ahci_pwrite(ap, AHCI_PREG_SERR, ahci_pread(ap, AHCI_PREG_SERR));
675 /* Wait for device to become ready */
676 /* XXX maybe more than the default wait is appropriate here? */
677 if (ahci_pwait_clr(ap, AHCI_PREG_TFD, AHCI_PREG_TFD_STS_BSY |
678 AHCI_PREG_TFD_STS_DRQ | AHCI_PREG_TFD_STS_ERR)) {
680 kprintf("%s: Device will not come ready 0x%b\n",
682 ahci_pread(ap, AHCI_PREG_TFD), AHCI_PFMT_TFD_STS);
687 * Figure out if we are a ATAPI or DISK device
690 sig = ahci_pread(ap, AHCI_PREG_SIG);
691 if ((sig & 0xffff0000) == (SATA_SIGNATURE_ATAPI & 0xffff0000)) {
692 ap->ap_ata.ap_type = ATA_PORT_T_ATAPI;
694 ap->ap_ata.ap_type = ATA_PORT_T_DISK;
698 /* Restore preserved port state */
699 ahci_pwrite(ap, AHCI_PREG_CMD, cmd);
705 ahci_load_prdt(struct ahci_ccb *ccb)
707 struct ahci_port *ap = ccb->ccb_port;
708 struct ahci_softc *sc = ap->ap_sc;
709 struct ata_xfer *xa = &ccb->ccb_xa;
710 struct ahci_prdt *prdt = ccb->ccb_cmd_table->prdt;
711 bus_dmamap_t dmap = ccb->ccb_dmamap;
712 struct ahci_cmd_hdr *cmd_slot = ccb->ccb_cmd_hdr;
715 if (xa->datalen == 0) {
716 ccb->ccb_cmd_hdr->prdtl = 0;
720 error = bus_dmamap_load(sc->sc_tag_data, dmap,
721 xa->data, xa->datalen,
722 ahci_load_prdt_callback,
724 ((xa->flags & ATA_F_NOWAIT) ?
725 BUS_DMA_NOWAIT : BUS_DMA_WAITOK));
727 kprintf("%s: error %d loading dmamap\n", PORTNAME(ap), error);
730 if (xa->flags & ATA_F_PIO)
731 prdt->flags |= htole32(AHCI_PRDT_FLAG_INTR);
733 cmd_slot->prdtl = htole16(prdt - ccb->ccb_cmd_table->prdt + 1);
735 bus_dmamap_sync(sc->sc_tag_data, dmap,
736 (xa->flags & ATA_F_READ) ?
737 BUS_DMASYNC_PREREAD : BUS_DMASYNC_PREWRITE);
743 bus_dmamap_unload(sc->sc_tag_data, dmap);
749 * Callback from BUSDMA system to load the segment list. The passed segment
750 * list is a temporary structure.
754 ahci_load_prdt_callback(void *info, bus_dma_segment_t *segs, int nsegs,
757 struct ahci_prdt *prd = *(void **)info;
760 KKASSERT(nsegs <= AHCI_MAX_PRDT);
763 addr = segs->ds_addr;
764 prd->dba_hi = htole32((u_int32_t)(addr >> 32));
765 prd->dba_lo = htole32((u_int32_t)addr);
767 KKASSERT((addr & 1) == 0);
768 KKASSERT((segs->ds_len & 1) == 0);
770 prd->flags = htole32(segs->ds_len - 1);
776 *(void **)info = prd; /* return last valid segment */
780 ahci_unload_prdt(struct ahci_ccb *ccb)
782 struct ahci_port *ap = ccb->ccb_port;
783 struct ahci_softc *sc = ap->ap_sc;
784 struct ata_xfer *xa = &ccb->ccb_xa;
785 bus_dmamap_t dmap = ccb->ccb_dmamap;
787 if (xa->datalen != 0) {
788 bus_dmamap_sync(sc->sc_tag_data, dmap,
789 (xa->flags & ATA_F_READ) ?
790 BUS_DMASYNC_POSTREAD : BUS_DMASYNC_POSTWRITE);
792 bus_dmamap_unload(sc->sc_tag_data, dmap);
794 if (ccb->ccb_xa.flags & ATA_F_NCQ)
797 xa->resid = xa->datalen -
798 le32toh(ccb->ccb_cmd_hdr->prdbc);
803 ahci_poll(struct ahci_ccb *ccb, int timeout, void (*timeout_fn)(void *))
805 struct ahci_port *ap = ccb->ccb_port;
810 if (ahci_port_intr(ap, AHCI_PREG_CI_ALL_SLOTS) &
811 (1 << ccb->ccb_slot)) {
816 } while (--timeout > 0);
817 kprintf("timeout ccb state %d\n", ccb->ccb_xa.state);
819 if (timeout_fn != NULL)
827 ahci_start(struct ahci_ccb *ccb)
829 struct ahci_port *ap = ccb->ccb_port;
830 struct ahci_softc *sc = ap->ap_sc;
832 KKASSERT(ccb->ccb_xa.state == ATA_S_PENDING);
834 /* Zero transferred byte count before transfer */
835 ccb->ccb_cmd_hdr->prdbc = 0;
837 /* Sync command list entry and corresponding command table entry */
838 bus_dmamap_sync(sc->sc_tag_cmdh,
839 AHCI_DMA_MAP(ap->ap_dmamem_cmd_list),
840 BUS_DMASYNC_PREWRITE);
841 bus_dmamap_sync(sc->sc_tag_cmdt,
842 AHCI_DMA_MAP(ap->ap_dmamem_cmd_table),
843 BUS_DMASYNC_PREWRITE);
845 /* Prepare RFIS area for write by controller */
846 bus_dmamap_sync(sc->sc_tag_rfis,
847 AHCI_DMA_MAP(ap->ap_dmamem_rfis),
848 BUS_DMASYNC_PREREAD);
850 if (ccb->ccb_xa.flags & ATA_F_NCQ) {
851 /* Issue NCQ commands only when there are no outstanding
852 * standard commands. */
853 if (ap->ap_active != 0 || !TAILQ_EMPTY(&ap->ap_ccb_pending))
854 TAILQ_INSERT_TAIL(&ap->ap_ccb_pending, ccb, ccb_entry);
856 KKASSERT(ap->ap_active_cnt == 0);
857 ap->ap_sactive |= (1 << ccb->ccb_slot);
858 ccb->ccb_xa.state = ATA_S_ONCHIP;
859 ahci_pwrite(ap, AHCI_PREG_SACT, 1 << ccb->ccb_slot);
860 ahci_pwrite(ap, AHCI_PREG_CI, 1 << ccb->ccb_slot);
863 /* Wait for all NCQ commands to finish before issuing standard
865 if (ap->ap_sactive != 0 || ap->ap_active_cnt == 2)
866 TAILQ_INSERT_TAIL(&ap->ap_ccb_pending, ccb, ccb_entry);
867 else if (ap->ap_active_cnt < 2) {
868 ap->ap_active |= 1 << ccb->ccb_slot;
869 ccb->ccb_xa.state = ATA_S_ONCHIP;
870 ahci_pwrite(ap, AHCI_PREG_CI, 1 << ccb->ccb_slot);
877 ahci_issue_pending_ncq_commands(struct ahci_port *ap)
879 struct ahci_ccb *nextccb;
880 u_int32_t sact_change = 0;
882 KKASSERT(ap->ap_active_cnt == 0);
884 nextccb = TAILQ_FIRST(&ap->ap_ccb_pending);
885 if (nextccb == NULL || !(nextccb->ccb_xa.flags & ATA_F_NCQ))
888 /* Start all the NCQ commands at the head of the pending list. */
890 TAILQ_REMOVE(&ap->ap_ccb_pending, nextccb, ccb_entry);
891 sact_change |= 1 << nextccb->ccb_slot;
892 nextccb->ccb_xa.state = ATA_S_ONCHIP;
893 nextccb = TAILQ_FIRST(&ap->ap_ccb_pending);
894 } while (nextccb && (nextccb->ccb_xa.flags & ATA_F_NCQ));
896 ap->ap_sactive |= sact_change;
897 ahci_pwrite(ap, AHCI_PREG_SACT, sact_change);
898 ahci_pwrite(ap, AHCI_PREG_CI, sact_change);
904 ahci_issue_pending_commands(struct ahci_port *ap, int last_was_ncq)
906 struct ahci_ccb *nextccb;
908 nextccb = TAILQ_FIRST(&ap->ap_ccb_pending);
909 if (nextccb && (nextccb->ccb_xa.flags & ATA_F_NCQ)) {
910 KKASSERT(last_was_ncq == 0); /* otherwise it should have
911 * been started already. */
913 /* Issue NCQ commands only when there are no outstanding
914 * standard commands. */
916 if (ap->ap_active == 0)
917 ahci_issue_pending_ncq_commands(ap);
919 KKASSERT(ap->ap_active_cnt == 1);
920 } else if (nextccb) {
921 if (ap->ap_sactive != 0 || last_was_ncq)
922 KKASSERT(ap->ap_active_cnt == 0);
924 /* Wait for all NCQ commands to finish before issuing standard
926 if (ap->ap_sactive != 0)
929 /* Keep up to 2 standard commands on-chip at a time. */
931 TAILQ_REMOVE(&ap->ap_ccb_pending, nextccb, ccb_entry);
932 ap->ap_active |= 1 << nextccb->ccb_slot;
933 nextccb->ccb_xa.state = ATA_S_ONCHIP;
934 ahci_pwrite(ap, AHCI_PREG_CI, 1 << nextccb->ccb_slot);
937 if (ap->ap_active_cnt == 2)
939 KKASSERT(ap->ap_active_cnt == 1);
940 nextccb = TAILQ_FIRST(&ap->ap_ccb_pending);
941 } while (nextccb && !(nextccb->ccb_xa.flags & ATA_F_NCQ));
942 } else if (!last_was_ncq) {
943 KKASSERT(ap->ap_active_cnt == 1 || ap->ap_active_cnt == 2);
945 /* Standard command finished, none waiting to start. */
948 KKASSERT(ap->ap_active_cnt == 0);
950 /* NCQ command finished. */
957 struct ahci_softc *sc = arg;
958 u_int32_t is, ack = 0;
961 /* Read global interrupt status */
962 is = ahci_read(sc, AHCI_REG_IS);
963 if (is == 0 || is == 0xffffffff)
968 /* Check coalescing interrupt first */
969 if (is & sc->sc_ccc_mask) {
970 DPRINTF(AHCI_D_INTR, "%s: command coalescing interrupt\n",
972 is &= ~sc->sc_ccc_mask;
973 is |= sc->sc_ccc_ports_cur;
977 /* Process interrupts for each port */
980 if (sc->sc_ports[port]) {
981 ahci_port_intr(sc->sc_ports[port],
982 AHCI_PREG_CI_ALL_SLOTS);
987 /* Finally, acknowledge global interrupt */
988 ahci_write(sc, AHCI_REG_IS, ack);
992 ahci_port_intr(struct ahci_port *ap, u_int32_t ci_mask)
994 struct ahci_softc *sc = ap->ap_sc;
995 u_int32_t is, ci_saved, ci_masked, processed = 0;
996 int slot, need_restart = 0;
997 struct ahci_ccb *ccb = NULL;
998 volatile u_int32_t *active;
1003 is = ahci_pread(ap, AHCI_PREG_IS);
1005 /* Ack port interrupt only if checking all command slots. */
1006 if (ci_mask == AHCI_PREG_CI_ALL_SLOTS)
1007 ahci_pwrite(ap, AHCI_PREG_IS, is);
1010 DPRINTF(AHCI_D_INTR, "%s: interrupt: %b\n", PORTNAME(ap),
1013 if (ap->ap_sactive) {
1014 /* Active NCQ commands - use SActive instead of CI */
1015 KKASSERT(ap->ap_active == 0);
1016 KKASSERT(ap->ap_active_cnt == 0);
1017 ci_saved = ahci_pread(ap, AHCI_PREG_SACT);
1018 active = &ap->ap_sactive;
1021 ci_saved = ahci_pread(ap, AHCI_PREG_CI);
1022 active = &ap->ap_active;
1025 /* Command failed. See AHCI 1.1 spec 6.2.2.1 and 6.2.2.2. */
1026 if (is & AHCI_PREG_IS_TFES) {
1027 u_int32_t tfd, serr;
1030 tfd = ahci_pread(ap, AHCI_PREG_TFD);
1031 serr = ahci_pread(ap, AHCI_PREG_SERR);
1033 if (ap->ap_sactive == 0) {
1034 /* Errored slot is easy to determine from CMD. */
1035 err_slot = AHCI_PREG_CMD_CCS(ahci_pread(ap,
1037 ccb = &ap->ap_ccbs[err_slot];
1039 /* Preserve received taskfile data from the RFIS. */
1040 memcpy(&ccb->ccb_xa.rfis, ap->ap_rfis->rfis,
1041 sizeof(struct ata_fis_d2h));
1043 err_slot = -1; /* Must extract error from log page */
1045 DPRINTF(AHCI_D_VERBOSE, "%s: errored slot %d, TFD: %b, SERR:"
1046 " %b, DIAG: %b\n", PORTNAME(ap), err_slot, tfd,
1047 AHCI_PFMT_TFD_STS, AHCI_PREG_SERR_ERR(serr),
1048 AHCI_PFMT_SERR_ERR, AHCI_PREG_SERR_DIAG(serr),
1049 AHCI_PFMT_SERR_DIAG);
1051 /* Turn off ST to clear CI and SACT. */
1052 ahci_port_stop(ap, 0);
1055 /* Clear SERR to enable capturing new errors. */
1056 ahci_pwrite(ap, AHCI_PREG_SERR, serr);
1058 /* Acknowledge the interrupts we can recover from. */
1059 ahci_pwrite(ap, AHCI_PREG_IS, AHCI_PREG_IS_TFES |
1061 is = ahci_pread(ap, AHCI_PREG_IS);
1063 /* If device hasn't cleared its busy status, try to idle it. */
1064 if (tfd & (AHCI_PREG_TFD_STS_BSY | AHCI_PREG_TFD_STS_DRQ)) {
1065 kprintf("%s: attempting to idle device\n",
1067 if (ahci_port_softreset(ap)) {
1068 kprintf("%s: failed to soft reset device\n",
1070 if (ahci_port_portreset(ap)) {
1071 kprintf("%s: failed to port reset "
1072 "device, give up on it\n",
1078 /* Had to reset device, can't gather extended info. */
1079 } else if (ap->ap_sactive) {
1080 /* Recover the NCQ error from log page 10h. */
1081 ahci_port_read_ncq_error(ap, &err_slot);
1085 DPRINTF(AHCI_D_VERBOSE, "%s: NCQ errored slot %d\n",
1086 PORTNAME(ap), err_slot);
1088 ccb = &ap->ap_ccbs[err_slot];
1090 /* Didn't reset, could gather extended info from log. */
1094 * If we couldn't determine the errored slot, reset the port
1095 * and fail all the active slots.
1097 if (err_slot == -1) {
1098 if (ahci_port_softreset(ap) != 0 &&
1099 ahci_port_portreset(ap) != 0) {
1100 kprintf("%s: couldn't reset after NCQ error, "
1101 "disabling device.\n",
1105 kprintf("%s: couldn't recover NCQ error, failing "
1106 "all outstanding commands.\n",
1111 /* Clear the failed command in saved CI so completion runs. */
1112 ci_saved &= ~(1 << err_slot);
1114 /* Note the error in the ata_xfer. */
1115 KKASSERT(ccb->ccb_xa.state == ATA_S_ONCHIP);
1116 ccb->ccb_xa.state = ATA_S_ERROR;
1119 /* There may only be one outstanding standard command now. */
1120 if (ap->ap_sactive == 0) {
1123 slot = ffs(tmp) - 1;
1124 tmp &= ~(1 << slot);
1132 * Port change (hot-plug).
1134 * A PCS interrupt will occur on hot-plug once communication is
1137 * A PRCS interrupt will occur on hot-unplug (and possibly also
1140 * We can then check the CPS (Cold Presence State) bit to determine
1141 * if a device is plugged in or not and do the right thing.
1143 if (is & (AHCI_PREG_IS_PCS | AHCI_PREG_IS_PRCS)) {
1144 ahci_pwrite(ap, AHCI_PREG_SERR,
1145 (AHCI_PREG_SERR_DIAG_N | AHCI_PREG_SERR_DIAG_X) << 16);
1146 switch (ahci_pread(ap, AHCI_PREG_SSTS) & AHCI_PREG_SSTS_DET) {
1147 case AHCI_PREG_SSTS_DET_DEV:
1148 if (ap->ap_ata.ap_type == ATA_PORT_T_NONE) {
1149 kprintf("%s: HOTPLUG - Device added\n",
1151 if (ahci_port_portreset(ap) == 0)
1152 ahci_cam_changed(ap);
1156 if (ap->ap_ata.ap_type != ATA_PORT_T_NONE) {
1157 kprintf("%s: HOTPLUG - Device removed\n",
1159 ahci_port_portreset(ap);
1160 ahci_cam_changed(ap);
1166 /* Check for remaining errors - they are fatal. */
1167 if (is & (AHCI_PREG_IS_TFES | AHCI_PREG_IS_HBFS | AHCI_PREG_IS_IFS |
1168 AHCI_PREG_IS_OFS | AHCI_PREG_IS_UFS)) {
1169 u_int32_t serr = ahci_pread(ap, AHCI_PREG_SERR);
1170 kprintf("%s: unrecoverable errors (IS: %b, SERR: %b %b), "
1171 "disabling port.\n",
1174 AHCI_PREG_SERR_ERR(serr), AHCI_PFMT_SERR_ERR,
1175 AHCI_PREG_SERR_DIAG(serr), AHCI_PFMT_SERR_DIAG
1177 /* XXX try recovery first */
1181 /* Fail all outstanding commands if we know the port won't recover. */
1182 if (ap->ap_state == AP_S_FATAL_ERROR) {
1184 ap->ap_state = AP_S_FATAL_ERROR;
1187 /* Ensure port is shut down. */
1188 ahci_port_stop(ap, 1);
1190 /* Error all the active slots. */
1191 ci_masked = ci_saved & *active;
1193 slot = ffs(ci_masked) - 1;
1194 ccb = &ap->ap_ccbs[slot];
1195 ci_masked &= ~(1 << slot);
1196 ccb->ccb_xa.state = ATA_S_ERROR;
1199 /* Run completion for all active slots. */
1200 ci_saved &= ~*active;
1203 * Don't restart the port if our problems were deemed fatal.
1205 * Also acknowlege all fatal interrupt sources to prevent
1208 if (ap->ap_state == AP_S_FATAL_ERROR) {
1210 ahci_pwrite(ap, AHCI_PREG_IS,
1211 AHCI_PREG_IS_TFES | AHCI_PREG_IS_HBFS |
1212 AHCI_PREG_IS_IFS | AHCI_PREG_IS_OFS |
1218 * CCB completion is detected by noticing its slot's bit in CI has
1219 * changed to zero some time after we activated it.
1220 * If we are polling, we may only be interested in particular slot(s).
1222 ci_masked = ~ci_saved & *active & ci_mask;
1224 slot = ffs(ci_masked) - 1;
1225 ccb = &ap->ap_ccbs[slot];
1226 ci_masked &= ~(1 << slot);
1228 DPRINTF(AHCI_D_INTR, "%s: slot %d is complete%s\n",
1229 PORTNAME(ap), slot, ccb->ccb_xa.state == ATA_S_ERROR ?
1232 bus_dmamap_sync(sc->sc_tag_cmdh,
1233 AHCI_DMA_MAP(ap->ap_dmamem_cmd_list),
1234 BUS_DMASYNC_POSTWRITE);
1236 bus_dmamap_sync(sc->sc_tag_cmdt,
1237 AHCI_DMA_MAP(ap->ap_dmamem_cmd_table),
1238 BUS_DMASYNC_POSTWRITE);
1240 bus_dmamap_sync(sc->sc_tag_rfis,
1241 AHCI_DMA_MAP(ap->ap_dmamem_rfis),
1242 BUS_DMASYNC_POSTREAD);
1244 *active &= ~(1 << ccb->ccb_slot);
1247 processed |= 1 << ccb->ccb_slot;
1251 /* Restart command DMA on the port */
1252 ahci_port_start(ap, 0);
1254 /* Re-enable outstanding commands on port. */
1259 slot = ffs(tmp) - 1;
1260 tmp &= ~(1 << slot);
1261 ccb = &ap->ap_ccbs[slot];
1262 KKASSERT(ccb->ccb_xa.state == ATA_S_ONCHIP);
1263 KKASSERT((!!(ccb->ccb_xa.flags & ATA_F_NCQ)) ==
1264 (!!ap->ap_sactive));
1267 DPRINTF(AHCI_D_VERBOSE, "%s: ahci_port_intr "
1268 "re-enabling%s slots %08x\n", PORTNAME(ap),
1269 ap->ap_sactive ? " NCQ" : "", ci_saved);
1272 ahci_pwrite(ap, AHCI_PREG_SACT, ci_saved);
1273 ahci_pwrite(ap, AHCI_PREG_CI, ci_saved);
1281 ahci_get_ccb(struct ahci_port *ap)
1283 struct ahci_ccb *ccb;
1285 lockmgr(&ap->ap_ccb_lock, LK_EXCLUSIVE);
1286 ccb = TAILQ_FIRST(&ap->ap_ccb_free);
1288 KKASSERT(ccb->ccb_xa.state == ATA_S_PUT);
1289 TAILQ_REMOVE(&ap->ap_ccb_free, ccb, ccb_entry);
1290 ccb->ccb_xa.state = ATA_S_SETUP;
1292 lockmgr(&ap->ap_ccb_lock, LK_RELEASE);
1298 ahci_put_ccb(struct ahci_ccb *ccb)
1300 struct ahci_port *ap = ccb->ccb_port;
1303 if (ccb->ccb_xa.state != ATA_S_COMPLETE &&
1304 ccb->ccb_xa.state != ATA_S_TIMEOUT &&
1305 ccb->ccb_xa.state != ATA_S_ERROR) {
1306 kprintf("%s: invalid ata_xfer state %02x in ahci_put_ccb, "
1308 PORTNAME(ccb->ccb_port), ccb->ccb_xa.state,
1313 ccb->ccb_xa.state = ATA_S_PUT;
1314 lockmgr(&ap->ap_ccb_lock, LK_EXCLUSIVE);
1315 TAILQ_INSERT_TAIL(&ap->ap_ccb_free, ccb, ccb_entry);
1316 lockmgr(&ap->ap_ccb_lock, LK_RELEASE);
1320 ahci_get_err_ccb(struct ahci_port *ap)
1322 struct ahci_ccb *err_ccb;
1325 /* No commands may be active on the chip. */
1326 sact = ahci_pread(ap, AHCI_PREG_SACT);
1328 kprintf("ahci_get_err_ccb but SACT %08x != 0?\n", sact);
1329 KKASSERT(ahci_pread(ap, AHCI_PREG_CI) == 0);
1332 KKASSERT(ap->ap_err_busy == 0);
1333 ap->ap_err_busy = 1;
1335 /* Save outstanding command state. */
1336 ap->ap_err_saved_active = ap->ap_active;
1337 ap->ap_err_saved_active_cnt = ap->ap_active_cnt;
1338 ap->ap_err_saved_sactive = ap->ap_sactive;
1341 * Pretend we have no commands outstanding, so that completions won't
1344 ap->ap_active = ap->ap_active_cnt = ap->ap_sactive = 0;
1347 * Grab a CCB to use for error recovery. This should never fail, as
1348 * we ask atascsi to reserve one for us at init time.
1350 err_ccb = ahci_get_ccb(ap);
1351 KKASSERT(err_ccb != NULL);
1352 err_ccb->ccb_xa.flags = 0;
1353 err_ccb->ccb_done = ahci_empty_done;
1359 ahci_put_err_ccb(struct ahci_ccb *ccb)
1361 struct ahci_port *ap = ccb->ccb_port;
1365 KKASSERT(ap->ap_err_busy);
1367 /* No commands may be active on the chip */
1368 sact = ahci_pread(ap, AHCI_PREG_SACT);
1370 kprintf("ahci_port_err_ccb_restore but SACT %08x != 0?\n",
1373 KKASSERT(ahci_pread(ap, AHCI_PREG_CI) == 0);
1375 /* Done with the CCB */
1378 /* Restore outstanding command state */
1379 ap->ap_sactive = ap->ap_err_saved_sactive;
1380 ap->ap_active_cnt = ap->ap_err_saved_active_cnt;
1381 ap->ap_active = ap->ap_err_saved_active;
1384 ap->ap_err_busy = 0;
1389 ahci_port_read_ncq_error(struct ahci_port *ap, int *err_slotp)
1391 struct ahci_ccb *ccb;
1392 struct ahci_cmd_hdr *cmd_slot;
1394 struct ata_fis_h2d *fis;
1397 DPRINTF(AHCI_D_VERBOSE, "%s: read log page\n", PORTNAME(ap));
1399 /* Save command register state. */
1400 cmd = ahci_pread(ap, AHCI_PREG_CMD) & ~AHCI_PREG_CMD_ICC;
1402 /* Port should have been idled already. Start it. */
1403 KKASSERT((cmd & AHCI_PREG_CMD_CR) == 0);
1404 ahci_port_start(ap, 0);
1406 /* Prep error CCB for READ LOG EXT, page 10h, 1 sector. */
1407 ccb = ahci_get_err_ccb(ap);
1408 ccb->ccb_xa.flags = ATA_F_NOWAIT | ATA_F_READ | ATA_F_POLL;
1409 ccb->ccb_xa.data = ap->ap_err_scratch;
1410 ccb->ccb_xa.datalen = 512;
1411 cmd_slot = ccb->ccb_cmd_hdr;
1412 bzero(ccb->ccb_cmd_table, sizeof(struct ahci_cmd_table));
1414 fis = (struct ata_fis_h2d *)ccb->ccb_cmd_table->cfis;
1415 fis->type = ATA_FIS_TYPE_H2D;
1416 fis->flags = ATA_H2D_FLAGS_CMD;
1417 fis->command = ATA_C_READ_LOG_EXT;
1418 fis->lba_low = 0x10; /* queued error log page (10h) */
1419 fis->sector_count = 1; /* number of sectors (1) */
1420 fis->sector_count_exp = 0;
1421 fis->lba_mid = 0; /* starting offset */
1422 fis->lba_mid_exp = 0;
1425 cmd_slot->flags = htole16(5); /* FIS length: 5 DWORDS */
1427 if (ahci_load_prdt(ccb) != 0) {
1428 rc = ENOMEM; /* XXX caller must abort all commands */
1432 ccb->ccb_xa.state = ATA_S_PENDING;
1433 if (ahci_poll(ccb, hz, NULL) != 0)
1438 /* Abort our command, if it failed, by stopping command DMA. */
1439 if (rc != 0 && (ap->ap_active & (1 << ccb->ccb_slot))) {
1440 kprintf("%s: log page read failed, slot %d was still active.\n",
1441 PORTNAME(ap), ccb->ccb_slot);
1442 ahci_port_stop(ap, 0);
1445 /* Done with the error CCB now. */
1446 ahci_unload_prdt(ccb);
1447 ahci_put_err_ccb(ccb);
1449 /* Extract failed register set and tags from the scratch space. */
1451 struct ata_log_page_10h *log;
1454 log = (struct ata_log_page_10h *)ap->ap_err_scratch;
1455 if (log->err_regs.type & ATA_LOG_10H_TYPE_NOTQUEUED) {
1456 /* Not queued bit was set - wasn't an NCQ error? */
1457 kprintf("%s: read NCQ error page, but not an NCQ "
1462 /* Copy back the log record as a D2H register FIS. */
1463 *err_slotp = err_slot = log->err_regs.type &
1464 ATA_LOG_10H_TYPE_TAG_MASK;
1466 ccb = &ap->ap_ccbs[err_slot];
1467 memcpy(&ccb->ccb_xa.rfis, &log->err_regs,
1468 sizeof(struct ata_fis_d2h));
1469 ccb->ccb_xa.rfis.type = ATA_FIS_TYPE_D2H;
1470 ccb->ccb_xa.rfis.flags = 0;
1474 /* Restore saved CMD register state */
1475 ahci_pwrite(ap, AHCI_PREG_CMD, cmd);
1481 * Allocate memory for various structures DMAd by hardware. The maximum
1482 * number of segments for these tags is 1 so the DMA memory will have a
1483 * single physical base address.
1485 struct ahci_dmamem *
1486 ahci_dmamem_alloc(struct ahci_softc *sc, bus_dma_tag_t tag)
1488 struct ahci_dmamem *adm;
1491 adm = kmalloc(sizeof(*adm), M_DEVBUF, M_INTWAIT | M_ZERO);
1493 error = bus_dmamem_alloc(tag, (void **)&adm->adm_kva,
1494 BUS_DMA_ZERO, &adm->adm_map);
1497 error = bus_dmamap_load(tag, adm->adm_map,
1499 bus_dma_tag_getmaxsize(tag),
1500 ahci_dmamem_saveseg, &adm->adm_busaddr,
1505 bus_dmamap_destroy(tag, adm->adm_map);
1506 adm->adm_map = NULL;
1507 adm->adm_tag = NULL;
1508 adm->adm_kva = NULL;
1510 kfree(adm, M_DEVBUF);
1518 ahci_dmamem_saveseg(void *info, bus_dma_segment_t *segs, int nsegs, int error)
1520 KKASSERT(error == 0);
1521 KKASSERT(nsegs == 1);
1522 *(bus_addr_t *)info = segs->ds_addr;
1527 ahci_dmamem_free(struct ahci_softc *sc, struct ahci_dmamem *adm)
1530 bus_dmamap_unload(adm->adm_tag, adm->adm_map);
1531 bus_dmamap_destroy(adm->adm_tag, adm->adm_map);
1532 adm->adm_map = NULL;
1533 adm->adm_tag = NULL;
1534 adm->adm_kva = NULL;
1536 kfree(adm, M_DEVBUF);
1540 ahci_read(struct ahci_softc *sc, bus_size_t r)
1542 bus_space_barrier(sc->sc_iot, sc->sc_ioh, r, 4,
1543 BUS_SPACE_BARRIER_READ);
1544 return (bus_space_read_4(sc->sc_iot, sc->sc_ioh, r));
1548 ahci_write(struct ahci_softc *sc, bus_size_t r, u_int32_t v)
1550 bus_space_write_4(sc->sc_iot, sc->sc_ioh, r, v);
1551 bus_space_barrier(sc->sc_iot, sc->sc_ioh, r, 4,
1552 BUS_SPACE_BARRIER_WRITE);
1556 ahci_wait_ne(struct ahci_softc *sc, bus_size_t r, u_int32_t mask,
1561 for (i = 0; i < 1000; i++) {
1562 if ((ahci_read(sc, r) & mask) != target)
1571 ahci_pread(struct ahci_port *ap, bus_size_t r)
1573 bus_space_barrier(ap->ap_sc->sc_iot, ap->ap_ioh, r, 4,
1574 BUS_SPACE_BARRIER_READ);
1575 return (bus_space_read_4(ap->ap_sc->sc_iot, ap->ap_ioh, r));
1579 ahci_pwrite(struct ahci_port *ap, bus_size_t r, u_int32_t v)
1581 bus_space_write_4(ap->ap_sc->sc_iot, ap->ap_ioh, r, v);
1582 bus_space_barrier(ap->ap_sc->sc_iot, ap->ap_ioh, r, 4,
1583 BUS_SPACE_BARRIER_WRITE);
1587 ahci_pwait_eq(struct ahci_port *ap, bus_size_t r, u_int32_t mask,
1592 for (i = 0; i < 1000; i++) {
1593 if ((ahci_pread(ap, r) & mask) == target)
1602 ahci_ata_get_xfer(struct ahci_port *ap)
1604 /*struct ahci_softc *sc = ap->ap_sc;*/
1605 struct ahci_ccb *ccb;
1607 ccb = ahci_get_ccb(ap);
1609 DPRINTF(AHCI_D_XFER, "%s: ahci_ata_get_xfer: NULL ccb\n",
1614 DPRINTF(AHCI_D_XFER, "%s: ahci_ata_get_xfer got slot %d\n",
1615 PORTNAME(ap), ccb->ccb_slot);
1617 ccb->ccb_xa.fis->type = ATA_FIS_TYPE_H2D;
1619 return (&ccb->ccb_xa);
1623 ahci_ata_put_xfer(struct ata_xfer *xa)
1625 struct ahci_ccb *ccb = (struct ahci_ccb *)xa;
1627 DPRINTF(AHCI_D_XFER, "ahci_ata_put_xfer slot %d\n", ccb->ccb_slot);
1633 ahci_ata_cmd(struct ata_xfer *xa)
1635 struct ahci_ccb *ccb = (struct ahci_ccb *)xa;
1636 struct ahci_cmd_hdr *cmd_slot;
1638 KKASSERT(xa->state == ATA_S_SETUP);
1641 kprintf("ahci_ata_cmd xa->flags %08x type %08x cmd=%08x\n",
1647 if (ccb->ccb_port->ap_state == AP_S_FATAL_ERROR)
1650 ccb->ccb_done = ahci_ata_cmd_done;
1652 cmd_slot = ccb->ccb_cmd_hdr;
1653 cmd_slot->flags = htole16(5); /* FIS length (in DWORDs) */
1655 if (xa->flags & ATA_F_WRITE)
1656 cmd_slot->flags |= htole16(AHCI_CMD_LIST_FLAG_W);
1658 if (xa->flags & ATA_F_PACKET)
1659 cmd_slot->flags |= htole16(AHCI_CMD_LIST_FLAG_A);
1661 if (ahci_load_prdt(ccb) != 0)
1664 xa->state = ATA_S_PENDING;
1666 if (xa->flags & ATA_F_POLL) {
1667 ahci_poll(ccb, xa->timeout, ahci_ata_cmd_timeout);
1668 return (ATA_COMPLETE);
1672 xa->flags |= ATA_F_TIMEOUT_RUNNING;
1673 callout_reset(&ccb->ccb_timeout, xa->timeout,
1674 ahci_ata_cmd_timeout_unserialized, ccb);
1677 return (ATA_QUEUED);
1681 xa->state = ATA_S_ERROR;
1688 ahci_ata_cmd_done(struct ahci_ccb *ccb)
1690 struct ata_xfer *xa = &ccb->ccb_xa;
1692 if (xa->flags & ATA_F_TIMEOUT_RUNNING) {
1693 xa->flags &= ~ATA_F_TIMEOUT_RUNNING;
1694 callout_stop(&ccb->ccb_timeout);
1697 if (xa->state == ATA_S_ONCHIP || xa->state == ATA_S_ERROR)
1698 ahci_issue_pending_commands(ccb->ccb_port,
1699 xa->flags & ATA_F_NCQ);
1701 ahci_unload_prdt(ccb);
1703 if (xa->state == ATA_S_ONCHIP)
1704 xa->state = ATA_S_COMPLETE;
1706 else if (xa->state != ATA_S_ERROR && xa->state != ATA_S_TIMEOUT)
1707 kprintf("%s: invalid ata_xfer state %02x in ahci_ata_cmd_done, "
1709 PORTNAME(ccb->ccb_port), xa->state, ccb->ccb_slot);
1711 if (xa->state != ATA_S_TIMEOUT)
1716 ahci_ata_cmd_timeout_unserialized(void *arg)
1718 struct ahci_ccb *ccb = arg;
1719 struct ahci_port *ap = ccb->ccb_port;
1721 lwkt_serialize_enter(&ap->ap_sc->sc_serializer);
1722 ahci_ata_cmd_timeout(arg);
1723 lwkt_serialize_exit(&ap->ap_sc->sc_serializer);
1727 ahci_ata_cmd_timeout(void *arg)
1729 struct ahci_ccb *ccb = arg;
1730 struct ata_xfer *xa = &ccb->ccb_xa;
1731 struct ahci_port *ap = ccb->ccb_port;
1732 volatile u_int32_t *active;
1733 int ccb_was_started, ncq_cmd;
1736 kprintf("CMD TIMEOUT port-cmd-reg 0x%b\n"
1737 "\tactive=%08x sactive=%08x\n"
1738 "\t sact=%08x ci=%08x\n",
1739 ahci_pread(ap, AHCI_PREG_CMD), AHCI_PFMT_CMD,
1740 ap->ap_active, ap->ap_sactive,
1741 ahci_pread(ap, AHCI_PREG_SACT),
1742 ahci_pread(ap, AHCI_PREG_CI));
1744 KKASSERT(xa->flags & ATA_F_TIMEOUT_RUNNING);
1745 xa->flags &= ~ATA_F_TIMEOUT_RUNNING;
1746 ncq_cmd = (xa->flags & ATA_F_NCQ);
1747 active = ncq_cmd ? &ap->ap_sactive : &ap->ap_active;
1749 if (ccb->ccb_xa.state == ATA_S_PENDING) {
1750 DPRINTF(AHCI_D_TIMEOUT, "%s: command for slot %d timed out "
1751 "before it got on chip\n", PORTNAME(ap), ccb->ccb_slot);
1752 TAILQ_REMOVE(&ap->ap_ccb_pending, ccb, ccb_entry);
1753 ccb_was_started = 0;
1754 } else if (ccb->ccb_xa.state == ATA_S_ONCHIP && ahci_port_intr(ap,
1755 1 << ccb->ccb_slot)) {
1756 DPRINTF(AHCI_D_TIMEOUT, "%s: final poll of port completed "
1757 "command in slot %d\n", PORTNAME(ap), ccb->ccb_slot);
1759 } else if (ccb->ccb_xa.state != ATA_S_ONCHIP) {
1760 DPRINTF(AHCI_D_TIMEOUT, "%s: command slot %d already "
1761 "handled%s\n", PORTNAME(ap), ccb->ccb_slot,
1762 (*active & (1 << ccb->ccb_slot)) ?
1763 " but slot is still active?" : ".");
1765 } else if ((ahci_pread(ap, ncq_cmd ? AHCI_PREG_SACT : AHCI_PREG_CI) &
1766 (1 << ccb->ccb_slot)) == 0 &&
1767 (*active & (1 << ccb->ccb_slot))) {
1768 DPRINTF(AHCI_D_TIMEOUT, "%s: command slot %d completed but "
1769 "IRQ handler didn't detect it. Why?\n", PORTNAME(ap),
1771 *active &= ~(1 << ccb->ccb_slot);
1775 ccb_was_started = 1;
1778 /* Complete the slot with a timeout error. */
1779 ccb->ccb_xa.state = ATA_S_TIMEOUT;
1780 *active &= ~(1 << ccb->ccb_slot);
1781 DPRINTF(AHCI_D_TIMEOUT, "%s: run completion (1)\n", PORTNAME(ap));
1782 ccb->ccb_done(ccb); /* This won't issue pending commands or run the
1783 atascsi completion. */
1785 /* Reset port to abort running command. */
1786 if (ccb_was_started) {
1787 DPRINTF(AHCI_D_TIMEOUT, "%s: resetting port to abort%s command "
1788 "in slot %d, active %08x\n", PORTNAME(ap), ncq_cmd ? " NCQ"
1789 : "", ccb->ccb_slot, *active);
1790 if (ahci_port_softreset(ap) != 0 && ahci_port_portreset(ap)
1792 kprintf("%s: failed to reset port during timeout "
1793 "handling, disabling it\n",
1795 ap->ap_state = AP_S_FATAL_ERROR;
1798 /* Restart any other commands that were aborted by the reset. */
1800 DPRINTF(AHCI_D_TIMEOUT, "%s: re-enabling%s slots "
1801 "%08x\n", PORTNAME(ap), ncq_cmd ? " NCQ" : "",
1804 ahci_pwrite(ap, AHCI_PREG_SACT, *active);
1805 ahci_pwrite(ap, AHCI_PREG_CI, *active);
1809 /* Issue any pending commands now. */
1810 DPRINTF(AHCI_D_TIMEOUT, "%s: issue pending\n", PORTNAME(ap));
1811 if (ccb_was_started)
1812 ahci_issue_pending_commands(ap, ncq_cmd);
1813 else if (ap->ap_active == 0)
1814 ahci_issue_pending_ncq_commands(ap);
1816 /* Complete the timed out ata_xfer I/O (may generate new I/O). */
1817 DPRINTF(AHCI_D_TIMEOUT, "%s: run completion (2)\n", PORTNAME(ap));
1820 DPRINTF(AHCI_D_TIMEOUT, "%s: splx\n", PORTNAME(ap));
1826 ahci_empty_done(struct ahci_ccb *ccb)
1828 ccb->ccb_xa.state = ATA_S_COMPLETE;