2 * Copyright (c) 1991 The Regents of the University of California.
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33 * $FreeBSD: src/sys/i386/isa/intr_machdep.h,v 1.19.2.2 2001/10/14 20:05:50 luigi Exp $
34 * $DragonFly: src/sys/i386/isa/Attic/intr_machdep.h,v 1.17 2005/09/10 06:48:08 dillon Exp $
37 #ifndef _I386_ISA_INTR_MACHDEP_H_
38 #define _I386_ISA_INTR_MACHDEP_H_
41 #ifndef _SYS_INTERRUPT_H_
42 #include <sys/interrupt.h>
44 #ifndef _SYS_SERIALIZE_H_
45 #include <sys/serialize.h>
50 * Low level interrupt code.
55 #if defined(SMP) || defined(APIC_IO)
57 * XXX FIXME: rethink location for all IPI vectors.
61 APIC TPR priority vector levels:
63 0xff (255) +-------------+
64 | | 15 (IPIs: Xspuriousint)
65 0xf0 (240) +-------------+
67 0xe0 (224) +-------------+
69 0xd0 (208) +-------------+
71 0xc0 (192) +-------------+
73 0xb0 (176) +-------------+
74 | | 10 (IPIs: Xcpustop)
75 0xa0 (160) +-------------+
76 | | 9 (IPIs: Xinvltlb)
77 0x90 (144) +-------------+
78 | | 8 (linux/BSD syscall, IGNORE FAST HW INTS)
79 0x80 (128) +-------------+
80 | | 7 (FAST_INTR 16-23)
81 0x70 (112) +-------------+
82 | | 6 (FAST_INTR 0-15)
83 0x60 (96) +-------------+
84 | | 5 (IGNORE HW INTS)
85 0x50 (80) +-------------+
87 0x40 (64) +------+------+
88 | | | 3 (upper APIC hardware INTs: PCI)
89 0x30 (48) +------+------+
90 | | 2 (start of hardware INTs: ISA)
91 0x20 (32) +-------------+
92 | | 1 (exceptions, traps, etc.)
93 0x10 (16) +-------------+
94 | | 0 (exceptions, traps, etc.)
95 0x00 (0) +-------------+
98 /* IDT vector base for regular (aka. slow) and fast interrupts */
99 #define TPR_SLOW_INTS 0x20
100 #define TPR_FAST_INTS 0x60
102 /* blocking values for local APIC Task Priority Register */
103 #define TPR_BLOCK_HWI 0x4f /* hardware INTs */
104 #define TPR_IGNORE_HWI 0x5f /* ignore INTs */
105 #define TPR_BLOCK_FHWI 0x7f /* hardware FAST INTs */
106 #define TPR_IGNORE_FHWI 0x8f /* ignore FAST INTs */
107 #define TPR_IPI_ONLY 0x8f /* ignore FAST INTs */
108 #define TPR_BLOCK_XINVLTLB 0x9f /* */
109 #define TPR_BLOCK_XCPUSTOP 0xaf /* */
110 #define TPR_BLOCK_ALL 0xff /* all INTs */
114 /* put a 'fake' HWI in top of APIC prio 0x3x, 32 + 31 = 63 = 0x3f */
115 #define XTEST1_OFFSET (ICU_OFFSET + 31)
116 #endif /** TEST_TEST1 */
119 #define XINVLTLB_OFFSET (ICU_OFFSET + 112)
121 /* unused/open (was inter-cpu clock handling) */
122 #define XUNUSED113_OFFSET (ICU_OFFSET + 113)
124 /* inter-CPU rendezvous */
125 #define XUNUSED114_OFFSET (ICU_OFFSET + 114)
127 /* IPIQ rendezvous */
128 #define XIPIQ_OFFSET (ICU_OFFSET + 115)
130 /* IPI to signal CPUs to stop and wait for another CPU to restart them */
131 #define XCPUSTOP_OFFSET (ICU_OFFSET + 128)
134 * Note: this vector MUST be xxxx1111, 32 + 223 = 255 = 0xff:
136 #define XSPURIOUSINT_OFFSET (ICU_OFFSET + 223)
138 #endif /* SMP || APIC_IO */
143 * Type of the first (asm) part of an interrupt handler.
145 typedef void inthand_t(u_int cs, u_int ef, u_int esp, u_int ss);
146 typedef void unpendhand_t(void);
148 #define IDTVEC(name) __CONCAT(X,name)
150 extern u_long *intr_countp[]; /* pointers into intrcnt[] */
151 extern inthand2_t *intr_handler[]; /* C entry points for FAST ints */
152 extern void *intr_unit[]; /* cookies to pass to intr handlers */
155 IDTVEC(fastintr0), IDTVEC(fastintr1),
156 IDTVEC(fastintr2), IDTVEC(fastintr3),
157 IDTVEC(fastintr4), IDTVEC(fastintr5),
158 IDTVEC(fastintr6), IDTVEC(fastintr7),
159 IDTVEC(fastintr8), IDTVEC(fastintr9),
160 IDTVEC(fastintr10), IDTVEC(fastintr11),
161 IDTVEC(fastintr12), IDTVEC(fastintr13),
162 IDTVEC(fastintr14), IDTVEC(fastintr15);
165 IDTVEC(fastintr16), IDTVEC(fastintr17),
166 IDTVEC(fastintr18), IDTVEC(fastintr19),
167 IDTVEC(fastintr20), IDTVEC(fastintr21),
168 IDTVEC(fastintr22), IDTVEC(fastintr23);
172 IDTVEC(intr0), IDTVEC(intr1), IDTVEC(intr2), IDTVEC(intr3),
173 IDTVEC(intr4), IDTVEC(intr5), IDTVEC(intr6), IDTVEC(intr7),
174 IDTVEC(intr8), IDTVEC(intr9), IDTVEC(intr10), IDTVEC(intr11),
175 IDTVEC(intr12), IDTVEC(intr13), IDTVEC(intr14), IDTVEC(intr15);
178 IDTVEC(intr16), IDTVEC(intr17), IDTVEC(intr18), IDTVEC(intr19),
179 IDTVEC(intr20), IDTVEC(intr21), IDTVEC(intr22), IDTVEC(intr23);
183 IDTVEC(fastunpend0), IDTVEC(fastunpend1),
184 IDTVEC(fastunpend2), IDTVEC(fastunpend3),
185 IDTVEC(fastunpend4), IDTVEC(fastunpend5),
186 IDTVEC(fastunpend6), IDTVEC(fastunpend7),
187 IDTVEC(fastunpend8), IDTVEC(fastunpend9),
188 IDTVEC(fastunpend10), IDTVEC(fastunpend11),
189 IDTVEC(fastunpend12), IDTVEC(fastunpend13),
190 IDTVEC(fastunpend14), IDTVEC(fastunpend15);
193 IDTVEC(fastunpend16), IDTVEC(fastunpend17),
194 IDTVEC(fastunpend18), IDTVEC(fastunpend19),
195 IDTVEC(fastunpend20), IDTVEC(fastunpend21),
196 IDTVEC(fastunpend22), IDTVEC(fastunpend23);
201 IDTVEC(wrongintr0), IDTVEC(wrongintr1),
202 IDTVEC(wrongintr2), IDTVEC(wrongintr3),
203 IDTVEC(wrongintr4), IDTVEC(wrongintr5),
204 IDTVEC(wrongintr6), IDTVEC(wrongintr7),
205 IDTVEC(wrongintr8), IDTVEC(wrongintr9),
206 IDTVEC(wrongintr10), IDTVEC(wrongintr11),
207 IDTVEC(wrongintr12), IDTVEC(wrongintr13),
208 IDTVEC(wrongintr14), IDTVEC(wrongintr15),
209 IDTVEC(wrongintr16), IDTVEC(wrongintr17),
210 IDTVEC(wrongintr18), IDTVEC(wrongintr19),
211 IDTVEC(wrongintr20), IDTVEC(wrongintr21),
212 IDTVEC(wrongintr22), IDTVEC(wrongintr23);
217 Xinvltlb, /* TLB shootdowns */
218 Xcpuast, /* Additional software trap on other cpu */
219 Xforward_irq, /* Forward irq to cpu holding ISR lock */
220 Xcpustop, /* CPU stops & waits for another CPU to restart it */
221 Xspuriousint, /* handle APIC "spurious INTs" */
222 Xipiq; /* handle lwkt_send_ipiq() requests */
226 Xtest1; /* 'fake' HWI at top of APIC prio 0x3x, 32+31 = 0x3f */
227 #endif /** TEST_TEST1 */
230 void call_fast_unpend(int irq);
231 void isa_defaultirq (void);
232 int isa_nmi (int cd);
233 int icu_setup (int intr, inthand2_t *func, void *arg, int flags);
234 int icu_unset (int intr, inthand2_t *handler);
235 void icu_reinit (void);
238 * WARNING: These are internal functions and not to be used by device drivers!
239 * They are subject to change without notice.
241 struct intrec *inthand_add(const char *name, int irq, inthand2_t handler,
242 void *arg, int flags, lwkt_serialize_t serializer);
244 int inthand_remove(struct intrec *idesc);
245 void forward_fastint_remote(void *arg);
251 #endif /* !_I386_ISA_INTR_MACHDEP_H_ */