1 /******************************************************************************
3 * Module Name: dmtbinfo - Table info for non-AML tables
5 *****************************************************************************/
7 /******************************************************************************
11 * Some or all of this work - Copyright (c) 1999 - 2011, Intel Corp.
12 * All rights reserved.
16 * 2.1. This is your license from Intel Corp. under its intellectual property
17 * rights. You may have additional license terms from the party that provided
18 * you this software, covering your right to use that party's intellectual
21 * 2.2. Intel grants, free of charge, to any person ("Licensee") obtaining a
22 * copy of the source code appearing in this file ("Covered Code") an
23 * irrevocable, perpetual, worldwide license under Intel's copyrights in the
24 * base code distributed originally by Intel ("Original Intel Code") to copy,
25 * make derivatives, distribute, use and display any portion of the Covered
26 * Code in any form, with the right to sublicense such rights; and
28 * 2.3. Intel grants Licensee a non-exclusive and non-transferable patent
29 * license (with the right to sublicense), under only those claims of Intel
30 * patents that are infringed by the Original Intel Code, to make, use, sell,
31 * offer to sell, and import the Covered Code and derivative works thereof
32 * solely to the minimum extent necessary to exercise the above copyright
33 * license, and in no event shall the patent license extend to any additions
34 * to or modifications of the Original Intel Code. No other license or right
35 * is granted directly or by implication, estoppel or otherwise;
37 * The above copyright and patent license is granted only if the following
42 * 3.1. Redistribution of Source with Rights to Further Distribute Source.
43 * Redistribution of source code of any substantial portion of the Covered
44 * Code or modification with rights to further distribute source must include
45 * the above Copyright Notice, the above License, this list of Conditions,
46 * and the following Disclaimer and Export Compliance provision. In addition,
47 * Licensee must cause all Covered Code to which Licensee contributes to
48 * contain a file documenting the changes Licensee made to create that Covered
49 * Code and the date of any change. Licensee must include in that file the
50 * documentation of any changes made by any predecessor Licensee. Licensee
51 * must include a prominent statement that the modification is derived,
52 * directly or indirectly, from Original Intel Code.
54 * 3.2. Redistribution of Source with no Rights to Further Distribute Source.
55 * Redistribution of source code of any substantial portion of the Covered
56 * Code or modification without rights to further distribute source must
57 * include the following Disclaimer and Export Compliance provision in the
58 * documentation and/or other materials provided with distribution. In
59 * addition, Licensee may not authorize further sublicense of source of any
60 * portion of the Covered Code, and must include terms to the effect that the
61 * license from Licensee to its licensee is limited to the intellectual
62 * property embodied in the software Licensee provides to its licensee, and
63 * not to intellectual property embodied in modifications its licensee may
66 * 3.3. Redistribution of Executable. Redistribution in executable form of any
67 * substantial portion of the Covered Code or modification must reproduce the
68 * above Copyright Notice, and the following Disclaimer and Export Compliance
69 * provision in the documentation and/or other materials provided with the
72 * 3.4. Intel retains all right, title, and interest in and to the Original
75 * 3.5. Neither the name Intel nor any other trademark owned or controlled by
76 * Intel shall be used in advertising or otherwise to promote the sale, use or
77 * other dealings in products derived from or relating to the Covered Code
78 * without prior written authorization from Intel.
80 * 4. Disclaimer and Export Compliance
82 * 4.1. INTEL MAKES NO WARRANTY OF ANY KIND REGARDING ANY SOFTWARE PROVIDED
83 * HERE. ANY SOFTWARE ORIGINATING FROM INTEL OR DERIVED FROM INTEL SOFTWARE
84 * IS PROVIDED "AS IS," AND INTEL WILL NOT PROVIDE ANY SUPPORT, ASSISTANCE,
85 * INSTALLATION, TRAINING OR OTHER SERVICES. INTEL WILL NOT PROVIDE ANY
86 * UPDATES, ENHANCEMENTS OR EXTENSIONS. INTEL SPECIFICALLY DISCLAIMS ANY
87 * IMPLIED WARRANTIES OF MERCHANTABILITY, NONINFRINGEMENT AND FITNESS FOR A
90 * 4.2. IN NO EVENT SHALL INTEL HAVE ANY LIABILITY TO LICENSEE, ITS LICENSEES
91 * OR ANY OTHER THIRD PARTY, FOR ANY LOST PROFITS, LOST DATA, LOSS OF USE OR
92 * COSTS OF PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES, OR FOR ANY INDIRECT,
93 * SPECIAL OR CONSEQUENTIAL DAMAGES ARISING OUT OF THIS AGREEMENT, UNDER ANY
94 * CAUSE OF ACTION OR THEORY OF LIABILITY, AND IRRESPECTIVE OF WHETHER INTEL
95 * HAS ADVANCE NOTICE OF THE POSSIBILITY OF SUCH DAMAGES. THESE LIMITATIONS
96 * SHALL APPLY NOTWITHSTANDING THE FAILURE OF THE ESSENTIAL PURPOSE OF ANY
99 * 4.3. Licensee shall not export, either directly or indirectly, any of this
100 * software or system incorporating such software without first obtaining any
101 * required license or other approval from the U. S. Department of Commerce or
102 * any other agency or department of the United States Government. In the
103 * event Licensee exports any such software from the United States or
104 * re-exports any such software from a foreign destination, Licensee shall
105 * ensure that the distribution and export/re-export of the software is in
106 * compliance with all laws, regulations, orders, or other restrictions of the
107 * U.S. Export Administration Regulations. Licensee agrees that neither it nor
108 * any of its subsidiaries will export/re-export any technical data, process,
109 * software, or service, directly or indirectly, to any country for which the
110 * United States government or any agency thereof requires an export license,
111 * other governmental approval, or letter of assurance, without first obtaining
112 * such license, approval or letter.
114 *****************************************************************************/
117 #include "accommon.h"
118 #include "acdisasm.h"
120 /* This module used for application-level code only */
122 #define _COMPONENT ACPI_CA_DISASSEMBLER
123 ACPI_MODULE_NAME ("dmtbinfo")
126 * Macros used to generate offsets to specific table fields
128 #define ACPI_FACS_OFFSET(f) (UINT8) ACPI_OFFSET (ACPI_TABLE_FACS,f)
129 #define ACPI_GAS_OFFSET(f) (UINT8) ACPI_OFFSET (ACPI_GENERIC_ADDRESS,f)
130 #define ACPI_HDR_OFFSET(f) (UINT8) ACPI_OFFSET (ACPI_TABLE_HEADER,f)
131 #define ACPI_RSDP_OFFSET(f) (UINT8) ACPI_OFFSET (ACPI_TABLE_RSDP,f)
132 #define ACPI_BOOT_OFFSET(f) (UINT8) ACPI_OFFSET (ACPI_TABLE_BOOT,f)
133 #define ACPI_BERT_OFFSET(f) (UINT8) ACPI_OFFSET (ACPI_TABLE_BERT,f)
134 #define ACPI_CPEP_OFFSET(f) (UINT8) ACPI_OFFSET (ACPI_TABLE_CPEP,f)
135 #define ACPI_DBGP_OFFSET(f) (UINT8) ACPI_OFFSET (ACPI_TABLE_DBGP,f)
136 #define ACPI_DMAR_OFFSET(f) (UINT8) ACPI_OFFSET (ACPI_TABLE_DMAR,f)
137 #define ACPI_ECDT_OFFSET(f) (UINT8) ACPI_OFFSET (ACPI_TABLE_ECDT,f)
138 #define ACPI_EINJ_OFFSET(f) (UINT8) ACPI_OFFSET (ACPI_TABLE_EINJ,f)
139 #define ACPI_ERST_OFFSET(f) (UINT8) ACPI_OFFSET (ACPI_TABLE_ERST,f)
140 #define ACPI_HEST_OFFSET(f) (UINT8) ACPI_OFFSET (ACPI_TABLE_HEST,f)
141 #define ACPI_HPET_OFFSET(f) (UINT8) ACPI_OFFSET (ACPI_TABLE_HPET,f)
142 #define ACPI_IVRS_OFFSET(f) (UINT8) ACPI_OFFSET (ACPI_TABLE_IVRS,f)
143 #define ACPI_MADT_OFFSET(f) (UINT8) ACPI_OFFSET (ACPI_TABLE_MADT,f)
144 #define ACPI_MCFG_OFFSET(f) (UINT8) ACPI_OFFSET (ACPI_TABLE_MCFG,f)
145 #define ACPI_MCHI_OFFSET(f) (UINT8) ACPI_OFFSET (ACPI_TABLE_MCHI,f)
146 #define ACPI_MSCT_OFFSET(f) (UINT8) ACPI_OFFSET (ACPI_TABLE_MSCT,f)
147 #define ACPI_SBST_OFFSET(f) (UINT8) ACPI_OFFSET (ACPI_TABLE_SBST,f)
148 #define ACPI_SLIT_OFFSET(f) (UINT8) ACPI_OFFSET (ACPI_TABLE_SLIT,f)
149 #define ACPI_SPCR_OFFSET(f) (UINT8) ACPI_OFFSET (ACPI_TABLE_SPCR,f)
150 #define ACPI_SPMI_OFFSET(f) (UINT8) ACPI_OFFSET (ACPI_TABLE_SPMI,f)
151 #define ACPI_SRAT_OFFSET(f) (UINT8) ACPI_OFFSET (ACPI_TABLE_SRAT,f)
152 #define ACPI_TCPA_OFFSET(f) (UINT8) ACPI_OFFSET (ACPI_TABLE_TCPA,f)
153 #define ACPI_UEFI_OFFSET(f) (UINT8) ACPI_OFFSET (ACPI_TABLE_UEFI,f)
154 #define ACPI_WAET_OFFSET(f) (UINT8) ACPI_OFFSET (ACPI_TABLE_WAET,f)
155 #define ACPI_WDAT_OFFSET(f) (UINT8) ACPI_OFFSET (ACPI_TABLE_WDAT,f)
156 #define ACPI_WDDT_OFFSET(f) (UINT8) ACPI_OFFSET (ACPI_TABLE_WDDT,f)
157 #define ACPI_WDRT_OFFSET(f) (UINT8) ACPI_OFFSET (ACPI_TABLE_WDRT,f)
161 #define ACPI_ASF0_OFFSET(f) (UINT8) ACPI_OFFSET (ACPI_ASF_INFO,f)
162 #define ACPI_ASF1_OFFSET(f) (UINT8) ACPI_OFFSET (ACPI_ASF_ALERT,f)
163 #define ACPI_ASF1a_OFFSET(f) (UINT8) ACPI_OFFSET (ACPI_ASF_ALERT_DATA,f)
164 #define ACPI_ASF2_OFFSET(f) (UINT8) ACPI_OFFSET (ACPI_ASF_REMOTE,f)
165 #define ACPI_ASF2a_OFFSET(f) (UINT8) ACPI_OFFSET (ACPI_ASF_CONTROL_DATA,f)
166 #define ACPI_ASF3_OFFSET(f) (UINT8) ACPI_OFFSET (ACPI_ASF_RMCP,f)
167 #define ACPI_ASF4_OFFSET(f) (UINT8) ACPI_OFFSET (ACPI_ASF_ADDRESS,f)
168 #define ACPI_CPEP0_OFFSET(f) (UINT8) ACPI_OFFSET (ACPI_CPEP_POLLING,f)
169 #define ACPI_DMARS_OFFSET(f) (UINT8) ACPI_OFFSET (ACPI_DMAR_DEVICE_SCOPE,f)
170 #define ACPI_DMAR0_OFFSET(f) (UINT8) ACPI_OFFSET (ACPI_DMAR_HARDWARE_UNIT,f)
171 #define ACPI_DMAR1_OFFSET(f) (UINT8) ACPI_OFFSET (ACPI_DMAR_RESERVED_MEMORY,f)
172 #define ACPI_DMAR2_OFFSET(f) (UINT8) ACPI_OFFSET (ACPI_DMAR_ATSR,f)
173 #define ACPI_DMAR3_OFFSET(f) (UINT8) ACPI_OFFSET (ACPI_DMAR_RHSA,f)
174 #define ACPI_EINJ0_OFFSET(f) (UINT8) ACPI_OFFSET (ACPI_WHEA_HEADER,f)
175 #define ACPI_ERST0_OFFSET(f) (UINT8) ACPI_OFFSET (ACPI_WHEA_HEADER,f)
176 #define ACPI_HEST0_OFFSET(f) (UINT8) ACPI_OFFSET (ACPI_HEST_IA_MACHINE_CHECK,f)
177 #define ACPI_HEST1_OFFSET(f) (UINT8) ACPI_OFFSET (ACPI_HEST_IA_CORRECTED,f)
178 #define ACPI_HEST2_OFFSET(f) (UINT8) ACPI_OFFSET (ACPI_HEST_IA_NMI,f)
179 #define ACPI_HEST6_OFFSET(f) (UINT8) ACPI_OFFSET (ACPI_HEST_AER_ROOT,f)
180 #define ACPI_HEST7_OFFSET(f) (UINT8) ACPI_OFFSET (ACPI_HEST_AER,f)
181 #define ACPI_HEST8_OFFSET(f) (UINT8) ACPI_OFFSET (ACPI_HEST_AER_BRIDGE,f)
182 #define ACPI_HEST9_OFFSET(f) (UINT8) ACPI_OFFSET (ACPI_HEST_GENERIC,f)
183 #define ACPI_HESTN_OFFSET(f) (UINT8) ACPI_OFFSET (ACPI_HEST_NOTIFY,f)
184 #define ACPI_HESTB_OFFSET(f) (UINT8) ACPI_OFFSET (ACPI_HEST_IA_ERROR_BANK,f)
185 #define ACPI_IVRSH_OFFSET(f) (UINT8) ACPI_OFFSET (ACPI_IVRS_HEADER,f)
186 #define ACPI_IVRS0_OFFSET(f) (UINT8) ACPI_OFFSET (ACPI_IVRS_HARDWARE,f)
187 #define ACPI_IVRS1_OFFSET(f) (UINT8) ACPI_OFFSET (ACPI_IVRS_MEMORY,f)
188 #define ACPI_IVRSD_OFFSET(f) (UINT8) ACPI_OFFSET (ACPI_IVRS_DE_HEADER,f)
189 #define ACPI_IVRS8A_OFFSET(f) (UINT8) ACPI_OFFSET (ACPI_IVRS_DEVICE8A,f)
190 #define ACPI_IVRS8B_OFFSET(f) (UINT8) ACPI_OFFSET (ACPI_IVRS_DEVICE8B,f)
191 #define ACPI_IVRS8C_OFFSET(f) (UINT8) ACPI_OFFSET (ACPI_IVRS_DEVICE8C,f)
192 #define ACPI_MADT0_OFFSET(f) (UINT8) ACPI_OFFSET (ACPI_MADT_LOCAL_APIC,f)
193 #define ACPI_MADT1_OFFSET(f) (UINT8) ACPI_OFFSET (ACPI_MADT_IO_APIC,f)
194 #define ACPI_MADT2_OFFSET(f) (UINT8) ACPI_OFFSET (ACPI_MADT_INTERRUPT_OVERRIDE,f)
195 #define ACPI_MADT3_OFFSET(f) (UINT8) ACPI_OFFSET (ACPI_MADT_NMI_SOURCE,f)
196 #define ACPI_MADT4_OFFSET(f) (UINT8) ACPI_OFFSET (ACPI_MADT_LOCAL_APIC_NMI,f)
197 #define ACPI_MADT5_OFFSET(f) (UINT8) ACPI_OFFSET (ACPI_MADT_LOCAL_APIC_OVERRIDE,f)
198 #define ACPI_MADT6_OFFSET(f) (UINT8) ACPI_OFFSET (ACPI_MADT_IO_SAPIC,f)
199 #define ACPI_MADT7_OFFSET(f) (UINT8) ACPI_OFFSET (ACPI_MADT_LOCAL_SAPIC,f)
200 #define ACPI_MADT8_OFFSET(f) (UINT8) ACPI_OFFSET (ACPI_MADT_INTERRUPT_SOURCE,f)
201 #define ACPI_MADT9_OFFSET(f) (UINT8) ACPI_OFFSET (ACPI_MADT_LOCAL_X2APIC,f)
202 #define ACPI_MADT10_OFFSET(f) (UINT8) ACPI_OFFSET (ACPI_MADT_LOCAL_X2APIC_NMI,f)
203 #define ACPI_MADTH_OFFSET(f) (UINT8) ACPI_OFFSET (ACPI_SUBTABLE_HEADER,f)
204 #define ACPI_MCFG0_OFFSET(f) (UINT8) ACPI_OFFSET (ACPI_MCFG_ALLOCATION,f)
205 #define ACPI_MSCT0_OFFSET(f) (UINT8) ACPI_OFFSET (ACPI_MSCT_PROXIMITY,f)
206 #define ACPI_SRATH_OFFSET(f) (UINT8) ACPI_OFFSET (ACPI_SUBTABLE_HEADER,f)
207 #define ACPI_SRAT0_OFFSET(f) (UINT8) ACPI_OFFSET (ACPI_SRAT_CPU_AFFINITY,f)
208 #define ACPI_SRAT1_OFFSET(f) (UINT8) ACPI_OFFSET (ACPI_SRAT_MEM_AFFINITY,f)
209 #define ACPI_SRAT2_OFFSET(f) (UINT8) ACPI_OFFSET (ACPI_SRAT_X2APIC_CPU_AFFINITY,f)
210 #define ACPI_WDAT0_OFFSET(f) (UINT8) ACPI_OFFSET (ACPI_WDAT_ENTRY,f)
213 * Simplify access to flag fields by breaking them up into bytes
215 #define ACPI_FLAG_OFFSET(d,f,o) (UINT8) (ACPI_OFFSET (d,f) + o)
219 #define ACPI_FADT_FLAG_OFFSET(f,o) ACPI_FLAG_OFFSET (ACPI_TABLE_FADT,f,o)
220 #define ACPI_FACS_FLAG_OFFSET(f,o) ACPI_FLAG_OFFSET (ACPI_TABLE_FACS,f,o)
221 #define ACPI_HPET_FLAG_OFFSET(f,o) ACPI_FLAG_OFFSET (ACPI_TABLE_HPET,f,o)
222 #define ACPI_SRAT0_FLAG_OFFSET(f,o) ACPI_FLAG_OFFSET (ACPI_SRAT_CPU_AFFINITY,f,o)
223 #define ACPI_SRAT1_FLAG_OFFSET(f,o) ACPI_FLAG_OFFSET (ACPI_SRAT_MEM_AFFINITY,f,o)
224 #define ACPI_SRAT2_FLAG_OFFSET(f,o) ACPI_FLAG_OFFSET (ACPI_SRAT_X2APIC_CPU_AFFINITY,f,o)
225 #define ACPI_MADT_FLAG_OFFSET(f,o) ACPI_FLAG_OFFSET (ACPI_TABLE_MADT,f,o)
226 #define ACPI_MADT0_FLAG_OFFSET(f,o) ACPI_FLAG_OFFSET (ACPI_MADT_LOCAL_APIC,f,o)
227 #define ACPI_MADT2_FLAG_OFFSET(f,o) ACPI_FLAG_OFFSET (ACPI_MADT_INTERRUPT_OVERRIDE,f,o)
228 #define ACPI_MADT3_FLAG_OFFSET(f,o) ACPI_FLAG_OFFSET (ACPI_MADT_NMI_SOURCE,f,o)
229 #define ACPI_MADT4_FLAG_OFFSET(f,o) ACPI_FLAG_OFFSET (ACPI_MADT_LOCAL_APIC_NMI,f,o)
230 #define ACPI_MADT7_FLAG_OFFSET(f,o) ACPI_FLAG_OFFSET (ACPI_MADT_LOCAL_SAPIC,f,o)
231 #define ACPI_MADT8_FLAG_OFFSET(f,o) ACPI_FLAG_OFFSET (ACPI_MADT_INTERRUPT_SOURCE,f,o)
232 #define ACPI_MADT9_FLAG_OFFSET(f,o) ACPI_FLAG_OFFSET (ACPI_MADT_LOCAL_X2APIC,f,o)
233 #define ACPI_MADT10_FLAG_OFFSET(f,o) ACPI_FLAG_OFFSET (ACPI_MADT_LOCAL_X2APIC_NMI,f,o)
234 #define ACPI_WDDT_FLAG_OFFSET(f,o) ACPI_FLAG_OFFSET (ACPI_TABLE_WDDT,f,o)
235 #define ACPI_EINJ0_FLAG_OFFSET(f,o) ACPI_FLAG_OFFSET (ACPI_WHEA_HEADER,f,o)
236 #define ACPI_ERST0_FLAG_OFFSET(f,o) ACPI_FLAG_OFFSET (ACPI_WHEA_HEADER,f,o)
237 #define ACPI_HEST0_FLAG_OFFSET(f,o) ACPI_FLAG_OFFSET (ACPI_HEST_IA_MACHINE_CHECK,f,o)
238 #define ACPI_HEST1_FLAG_OFFSET(f,o) ACPI_FLAG_OFFSET (ACPI_HEST_IA_CORRECTED,f,o)
239 #define ACPI_HEST6_FLAG_OFFSET(f,o) ACPI_FLAG_OFFSET (ACPI_HEST_AER_ROOT,f,o)
242 * Required terminator for all tables below
244 #define ACPI_DMT_TERMINATOR {ACPI_DMT_EXIT, 0, NULL, 0}
248 * ACPI Table Information, used to dump formatted ACPI tables
250 * Each entry is of the form: <Field Type, Field Offset, Field Name>
253 /*******************************************************************************
255 * Common ACPI table header
257 ******************************************************************************/
259 ACPI_DMTABLE_INFO AcpiDmTableInfoHeader[] =
261 {ACPI_DMT_SIG, ACPI_HDR_OFFSET (Signature[0]), "Signature", 0},
262 {ACPI_DMT_UINT32, ACPI_HDR_OFFSET (Length), "Table Length", DT_LENGTH},
263 {ACPI_DMT_UINT8, ACPI_HDR_OFFSET (Revision), "Revision", 0},
264 {ACPI_DMT_CHKSUM, ACPI_HDR_OFFSET (Checksum), "Checksum", 0},
265 {ACPI_DMT_NAME6, ACPI_HDR_OFFSET (OemId[0]), "Oem ID", 0},
266 {ACPI_DMT_NAME8, ACPI_HDR_OFFSET (OemTableId[0]), "Oem Table ID", 0},
267 {ACPI_DMT_UINT32, ACPI_HDR_OFFSET (OemRevision), "Oem Revision", 0},
268 {ACPI_DMT_NAME4, ACPI_HDR_OFFSET (AslCompilerId[0]), "Asl Compiler ID", 0},
269 {ACPI_DMT_UINT32, ACPI_HDR_OFFSET (AslCompilerRevision), "Asl Compiler Revision", 0},
274 /*******************************************************************************
276 * GAS - Generic Address Structure
278 ******************************************************************************/
280 ACPI_DMTABLE_INFO AcpiDmTableInfoGas[] =
282 {ACPI_DMT_SPACEID, ACPI_GAS_OFFSET (SpaceId), "Space ID", 0},
283 {ACPI_DMT_UINT8, ACPI_GAS_OFFSET (BitWidth), "Bit Width", 0},
284 {ACPI_DMT_UINT8, ACPI_GAS_OFFSET (BitOffset), "Bit Offset", 0},
285 {ACPI_DMT_ACCWIDTH, ACPI_GAS_OFFSET (AccessWidth), "Encoded Access Width", 0},
286 {ACPI_DMT_UINT64, ACPI_GAS_OFFSET (Address), "Address", 0},
291 /*******************************************************************************
293 * RSDP - Root System Description Pointer (Signature is "RSD PTR ")
295 ******************************************************************************/
297 ACPI_DMTABLE_INFO AcpiDmTableInfoRsdp1[] =
299 {ACPI_DMT_NAME8, ACPI_RSDP_OFFSET (Signature[0]), "Signature", 0},
300 {ACPI_DMT_UINT8, ACPI_RSDP_OFFSET (Checksum), "Checksum", 0},
301 {ACPI_DMT_NAME6, ACPI_RSDP_OFFSET (OemId[0]), "Oem ID", 0},
302 {ACPI_DMT_UINT8, ACPI_RSDP_OFFSET (Revision), "Revision", 0},
303 {ACPI_DMT_UINT32, ACPI_RSDP_OFFSET (RsdtPhysicalAddress), "RSDT Address", 0},
307 /* ACPI 2.0+ Extensions */
309 ACPI_DMTABLE_INFO AcpiDmTableInfoRsdp2[] =
311 {ACPI_DMT_UINT32, ACPI_RSDP_OFFSET (Length), "Length", DT_LENGTH},
312 {ACPI_DMT_UINT64, ACPI_RSDP_OFFSET (XsdtPhysicalAddress), "XSDT Address", 0},
313 {ACPI_DMT_UINT8, ACPI_RSDP_OFFSET (ExtendedChecksum), "Extended Checksum", 0},
314 {ACPI_DMT_UINT24, ACPI_RSDP_OFFSET (Reserved[0]), "Reserved", 0},
319 /*******************************************************************************
321 * FACS - Firmware ACPI Control Structure
323 ******************************************************************************/
325 ACPI_DMTABLE_INFO AcpiDmTableInfoFacs[] =
327 {ACPI_DMT_NAME4, ACPI_FACS_OFFSET (Signature[0]), "Signature", 0},
328 {ACPI_DMT_UINT32, ACPI_FACS_OFFSET (Length), "Length", DT_LENGTH},
329 {ACPI_DMT_UINT32, ACPI_FACS_OFFSET (HardwareSignature), "Hardware Signature", 0},
330 {ACPI_DMT_UINT32, ACPI_FACS_OFFSET (FirmwareWakingVector), "32 Firmware Waking Vector", 0},
331 {ACPI_DMT_UINT32, ACPI_FACS_OFFSET (GlobalLock), "Global Lock", 0},
332 {ACPI_DMT_UINT32, ACPI_FACS_OFFSET (Flags), "Flags (decoded below)", DT_FLAG},
333 {ACPI_DMT_FLAG0, ACPI_FACS_FLAG_OFFSET (Flags,0), "S4BIOS Support Present", 0},
334 {ACPI_DMT_FLAG1, ACPI_FACS_FLAG_OFFSET (Flags,0), "64-bit Wake Supported (V2)", 0},
335 {ACPI_DMT_UINT64, ACPI_FACS_OFFSET (XFirmwareWakingVector), "64 Firmware Waking Vector", 0},
336 {ACPI_DMT_UINT8, ACPI_FACS_OFFSET (Version), "Version", 0},
337 {ACPI_DMT_UINT24, ACPI_FACS_OFFSET (Reserved[0]), "Reserved", 0},
338 {ACPI_DMT_UINT32, ACPI_FACS_OFFSET (OspmFlags), "OspmFlags (decoded below)", DT_FLAG},
339 {ACPI_DMT_FLAG0, ACPI_FACS_FLAG_OFFSET (OspmFlags,0), "64-bit Wake Env Required (V2)", 0},
344 /*******************************************************************************
346 * FADT - Fixed ACPI Description Table (Signature is FACP)
348 ******************************************************************************/
350 /* ACPI 1.0 FADT (Version 1) */
352 ACPI_DMTABLE_INFO AcpiDmTableInfoFadt1[] =
354 {ACPI_DMT_UINT32, ACPI_FADT_OFFSET (Facs), "FACS Address", 0},
355 {ACPI_DMT_UINT32, ACPI_FADT_OFFSET (Dsdt), "DSDT Address", DT_NON_ZERO},
356 {ACPI_DMT_UINT8, ACPI_FADT_OFFSET (Model), "Model", 0},
357 {ACPI_DMT_FADTPM, ACPI_FADT_OFFSET (PreferredProfile), "PM Profile", 0},
358 {ACPI_DMT_UINT16, ACPI_FADT_OFFSET (SciInterrupt), "SCI Interrupt", 0},
359 {ACPI_DMT_UINT32, ACPI_FADT_OFFSET (SmiCommand), "SMI Command Port", 0},
360 {ACPI_DMT_UINT8, ACPI_FADT_OFFSET (AcpiEnable), "ACPI Enable Value", 0},
361 {ACPI_DMT_UINT8, ACPI_FADT_OFFSET (AcpiDisable), "ACPI Disable Value", 0},
362 {ACPI_DMT_UINT8, ACPI_FADT_OFFSET (S4BiosRequest), "S4BIOS Command", 0},
363 {ACPI_DMT_UINT8, ACPI_FADT_OFFSET (PstateControl), "P-State Control", 0},
364 {ACPI_DMT_UINT32, ACPI_FADT_OFFSET (Pm1aEventBlock), "PM1A Event Block Address", 0},
365 {ACPI_DMT_UINT32, ACPI_FADT_OFFSET (Pm1bEventBlock), "PM1B Event Block Address", 0},
366 {ACPI_DMT_UINT32, ACPI_FADT_OFFSET (Pm1aControlBlock), "PM1A Control Block Address", 0},
367 {ACPI_DMT_UINT32, ACPI_FADT_OFFSET (Pm1bControlBlock), "PM1B Control Block Address", 0},
368 {ACPI_DMT_UINT32, ACPI_FADT_OFFSET (Pm2ControlBlock), "PM2 Control Block Address", 0},
369 {ACPI_DMT_UINT32, ACPI_FADT_OFFSET (PmTimerBlock), "PM Timer Block Address", 0},
370 {ACPI_DMT_UINT32, ACPI_FADT_OFFSET (Gpe0Block), "GPE0 Block Address", 0},
371 {ACPI_DMT_UINT32, ACPI_FADT_OFFSET (Gpe1Block), "GPE1 Block Address", 0},
372 {ACPI_DMT_UINT8, ACPI_FADT_OFFSET (Pm1EventLength), "PM1 Event Block Length", 0},
373 {ACPI_DMT_UINT8, ACPI_FADT_OFFSET (Pm1ControlLength), "PM1 Control Block Length", 0},
374 {ACPI_DMT_UINT8, ACPI_FADT_OFFSET (Pm2ControlLength), "PM2 Control Block Length", 0},
375 {ACPI_DMT_UINT8, ACPI_FADT_OFFSET (PmTimerLength), "PM Timer Block Length", 0},
376 {ACPI_DMT_UINT8, ACPI_FADT_OFFSET (Gpe0BlockLength), "GPE0 Block Length", 0},
377 {ACPI_DMT_UINT8, ACPI_FADT_OFFSET (Gpe1BlockLength), "GPE1 Block Length", 0},
378 {ACPI_DMT_UINT8, ACPI_FADT_OFFSET (Gpe1Base), "GPE1 Base Offset", 0},
379 {ACPI_DMT_UINT8, ACPI_FADT_OFFSET (CstControl), "_CST Support", 0},
380 {ACPI_DMT_UINT16, ACPI_FADT_OFFSET (C2Latency), "C2 Latency", 0},
381 {ACPI_DMT_UINT16, ACPI_FADT_OFFSET (C3Latency), "C3 Latency", 0},
382 {ACPI_DMT_UINT16, ACPI_FADT_OFFSET (FlushSize), "CPU Cache Size", 0},
383 {ACPI_DMT_UINT16, ACPI_FADT_OFFSET (FlushStride), "Cache Flush Stride", 0},
384 {ACPI_DMT_UINT8, ACPI_FADT_OFFSET (DutyOffset), "Duty Cycle Offset", 0},
385 {ACPI_DMT_UINT8, ACPI_FADT_OFFSET (DutyWidth), "Duty Cycle Width", 0},
386 {ACPI_DMT_UINT8, ACPI_FADT_OFFSET (DayAlarm), "RTC Day Alarm Index", 0},
387 {ACPI_DMT_UINT8, ACPI_FADT_OFFSET (MonthAlarm), "RTC Month Alarm Index", 0},
388 {ACPI_DMT_UINT8, ACPI_FADT_OFFSET (Century), "RTC Century Index", 0},
389 {ACPI_DMT_UINT16, ACPI_FADT_OFFSET (BootFlags), "Boot Flags (decoded below)", DT_FLAG},
391 /* Boot Architecture Flags byte 0 */
393 {ACPI_DMT_FLAG0, ACPI_FADT_FLAG_OFFSET (BootFlags,0), "Legacy Devices Supported (V2)", 0},
394 {ACPI_DMT_FLAG1, ACPI_FADT_FLAG_OFFSET (BootFlags,0), "8042 Present on ports 60/64 (V2)", 0},
395 {ACPI_DMT_FLAG2, ACPI_FADT_FLAG_OFFSET (BootFlags,0), "VGA Not Present (V4)", 0},
396 {ACPI_DMT_FLAG3, ACPI_FADT_FLAG_OFFSET (BootFlags,0), "MSI Not Supported (V4)", 0},
397 {ACPI_DMT_FLAG4, ACPI_FADT_FLAG_OFFSET (BootFlags,0), "PCIe ASPM Not Supported (V4)", 0},
399 {ACPI_DMT_UINT8, ACPI_FADT_OFFSET (Reserved), "Reserved", 0},
400 {ACPI_DMT_UINT32, ACPI_FADT_OFFSET (Flags), "Flags (decoded below)", DT_FLAG},
404 {ACPI_DMT_FLAG0, ACPI_FADT_FLAG_OFFSET (Flags,0), "WBINVD instruction is operational (V1)", 0},
405 {ACPI_DMT_FLAG1, ACPI_FADT_FLAG_OFFSET (Flags,0), "WBINVD flushes all caches (V1)", 0},
406 {ACPI_DMT_FLAG2, ACPI_FADT_FLAG_OFFSET (Flags,0), "All CPUs support C1 (V1)", 0},
407 {ACPI_DMT_FLAG3, ACPI_FADT_FLAG_OFFSET (Flags,0), "C2 works on MP system (V1)", 0},
408 {ACPI_DMT_FLAG4, ACPI_FADT_FLAG_OFFSET (Flags,0), "Control Method Power Button (V1)", 0},
409 {ACPI_DMT_FLAG5, ACPI_FADT_FLAG_OFFSET (Flags,0), "Control Method Sleep Button (V1)", 0},
410 {ACPI_DMT_FLAG6, ACPI_FADT_FLAG_OFFSET (Flags,0), "RTC wake not in fixed reg space (V1)", 0},
411 {ACPI_DMT_FLAG7, ACPI_FADT_FLAG_OFFSET (Flags,0), "RTC can wake system from S4 (V1)", 0},
415 {ACPI_DMT_FLAG0, ACPI_FADT_FLAG_OFFSET (Flags,1), "32-bit PM Timer (V1)", 0},
416 {ACPI_DMT_FLAG1, ACPI_FADT_FLAG_OFFSET (Flags,1), "Docking Supported (V1)", 0},
417 {ACPI_DMT_FLAG2, ACPI_FADT_FLAG_OFFSET (Flags,1), "Reset Register Supported (V2)", 0},
418 {ACPI_DMT_FLAG3, ACPI_FADT_FLAG_OFFSET (Flags,1), "Sealed Case (V3)", 0},
419 {ACPI_DMT_FLAG4, ACPI_FADT_FLAG_OFFSET (Flags,1), "Headless - No Video (V3)", 0},
420 {ACPI_DMT_FLAG5, ACPI_FADT_FLAG_OFFSET (Flags,1), "Use native instr after SLP_TYPx (V3)", 0},
421 {ACPI_DMT_FLAG6, ACPI_FADT_FLAG_OFFSET (Flags,1), "PCIEXP_WAK Bits Supported (V4)", 0},
422 {ACPI_DMT_FLAG7, ACPI_FADT_FLAG_OFFSET (Flags,1), "Use Platform Timer (V4)", 0},
426 {ACPI_DMT_FLAG0, ACPI_FADT_FLAG_OFFSET (Flags,2), "RTC_STS valid on S4 wake (V4)", 0},
427 {ACPI_DMT_FLAG1, ACPI_FADT_FLAG_OFFSET (Flags,2), "Remote Power-on capable (V4)", 0},
428 {ACPI_DMT_FLAG2, ACPI_FADT_FLAG_OFFSET (Flags,2), "Use APIC Cluster Model (V4)", 0},
429 {ACPI_DMT_FLAG3, ACPI_FADT_FLAG_OFFSET (Flags,2), "Use APIC Physical Destination Mode (V4)", 0},
433 /* ACPI 1.0 MS Extensions (FADT version 2) */
435 ACPI_DMTABLE_INFO AcpiDmTableInfoFadt2[] =
437 {ACPI_DMT_GAS, ACPI_FADT_OFFSET (ResetRegister), "Reset Register", 0},
438 {ACPI_DMT_UINT8, ACPI_FADT_OFFSET (ResetValue), "Value to cause reset", 0},
439 {ACPI_DMT_UINT24, ACPI_FADT_OFFSET (Reserved4[0]), "Reserved", 0},
443 /* ACPI 2.0+ Extensions (FADT version 3+) */
445 ACPI_DMTABLE_INFO AcpiDmTableInfoFadt3[] =
447 {ACPI_DMT_GAS, ACPI_FADT_OFFSET (ResetRegister), "Reset Register", 0},
448 {ACPI_DMT_UINT8, ACPI_FADT_OFFSET (ResetValue), "Value to cause reset", 0},
449 {ACPI_DMT_UINT24, ACPI_FADT_OFFSET (Reserved4[0]), "Reserved", 0},
450 {ACPI_DMT_UINT64, ACPI_FADT_OFFSET (XFacs), "FACS Address", 0},
451 {ACPI_DMT_UINT64, ACPI_FADT_OFFSET (XDsdt), "DSDT Address", 0},
452 {ACPI_DMT_GAS, ACPI_FADT_OFFSET (XPm1aEventBlock), "PM1A Event Block", 0},
453 {ACPI_DMT_GAS, ACPI_FADT_OFFSET (XPm1bEventBlock), "PM1B Event Block", 0},
454 {ACPI_DMT_GAS, ACPI_FADT_OFFSET (XPm1aControlBlock), "PM1A Control Block", 0},
455 {ACPI_DMT_GAS, ACPI_FADT_OFFSET (XPm1bControlBlock), "PM1B Control Block", 0},
456 {ACPI_DMT_GAS, ACPI_FADT_OFFSET (XPm2ControlBlock), "PM2 Control Block", 0},
457 {ACPI_DMT_GAS, ACPI_FADT_OFFSET (XPmTimerBlock), "PM Timer Block", 0},
458 {ACPI_DMT_GAS, ACPI_FADT_OFFSET (XGpe0Block), "GPE0 Block", 0},
459 {ACPI_DMT_GAS, ACPI_FADT_OFFSET (XGpe1Block), "GPE1 Block", 0},
465 * Remaining tables are not consumed directly by the ACPICA subsystem
468 /*******************************************************************************
470 * ASF - Alert Standard Format table (Signature "ASF!")
472 ******************************************************************************/
474 /* Common Subtable header (one per Subtable) */
476 ACPI_DMTABLE_INFO AcpiDmTableInfoAsfHdr[] =
478 {ACPI_DMT_ASF, ACPI_ASF0_OFFSET (Header.Type), "Subtable Type", 0},
479 {ACPI_DMT_UINT8, ACPI_ASF0_OFFSET (Header.Reserved), "Reserved", 0},
480 {ACPI_DMT_UINT16, ACPI_ASF0_OFFSET (Header.Length), "Length", DT_LENGTH},
484 /* 0: ASF Information */
486 ACPI_DMTABLE_INFO AcpiDmTableInfoAsf0[] =
488 {ACPI_DMT_UINT8, ACPI_ASF0_OFFSET (MinResetValue), "Minimum Reset Value", 0},
489 {ACPI_DMT_UINT8, ACPI_ASF0_OFFSET (MinPollInterval), "Minimum Polling Interval", 0},
490 {ACPI_DMT_UINT16, ACPI_ASF0_OFFSET (SystemId), "System ID", 0},
491 {ACPI_DMT_UINT32, ACPI_ASF0_OFFSET (MfgId), "Manufacturer ID", 0},
492 {ACPI_DMT_UINT8, ACPI_ASF0_OFFSET (Flags), "Flags", 0},
493 {ACPI_DMT_UINT24, ACPI_ASF0_OFFSET (Reserved2[0]), "Reserved", 0},
499 ACPI_DMTABLE_INFO AcpiDmTableInfoAsf1[] =
501 {ACPI_DMT_UINT8, ACPI_ASF1_OFFSET (AssertMask), "AssertMask", 0},
502 {ACPI_DMT_UINT8, ACPI_ASF1_OFFSET (DeassertMask), "DeassertMask", 0},
503 {ACPI_DMT_UINT8, ACPI_ASF1_OFFSET (Alerts), "Alert Count", 0},
504 {ACPI_DMT_UINT8, ACPI_ASF1_OFFSET (DataLength), "Alert Data Length", 0},
508 /* 1a: ASF Alert data */
510 ACPI_DMTABLE_INFO AcpiDmTableInfoAsf1a[] =
512 {ACPI_DMT_UINT8, ACPI_ASF1a_OFFSET (Address), "Address", 0},
513 {ACPI_DMT_UINT8, ACPI_ASF1a_OFFSET (Command), "Command", 0},
514 {ACPI_DMT_UINT8, ACPI_ASF1a_OFFSET (Mask), "Mask", 0},
515 {ACPI_DMT_UINT8, ACPI_ASF1a_OFFSET (Value), "Value", 0},
516 {ACPI_DMT_UINT8, ACPI_ASF1a_OFFSET (SensorType), "SensorType", 0},
517 {ACPI_DMT_UINT8, ACPI_ASF1a_OFFSET (Type), "Type", 0},
518 {ACPI_DMT_UINT8, ACPI_ASF1a_OFFSET (Offset), "Offset", 0},
519 {ACPI_DMT_UINT8, ACPI_ASF1a_OFFSET (SourceType), "SourceType", 0},
520 {ACPI_DMT_UINT8, ACPI_ASF1a_OFFSET (Severity), "Severity", 0},
521 {ACPI_DMT_UINT8, ACPI_ASF1a_OFFSET (SensorNumber), "SensorNumber", 0},
522 {ACPI_DMT_UINT8, ACPI_ASF1a_OFFSET (Entity), "Entity", 0},
523 {ACPI_DMT_UINT8, ACPI_ASF1a_OFFSET (Instance), "Instance", 0},
527 /* 2: ASF Remote Control */
529 ACPI_DMTABLE_INFO AcpiDmTableInfoAsf2[] =
531 {ACPI_DMT_UINT8, ACPI_ASF2_OFFSET (Controls), "Control Count", 0},
532 {ACPI_DMT_UINT8, ACPI_ASF2_OFFSET (DataLength), "Control Data Length", 0},
533 {ACPI_DMT_UINT16, ACPI_ASF2_OFFSET (Reserved2), "Reserved", 0},
537 /* 2a: ASF Control data */
539 ACPI_DMTABLE_INFO AcpiDmTableInfoAsf2a[] =
541 {ACPI_DMT_UINT8, ACPI_ASF2a_OFFSET (Function), "Function", 0},
542 {ACPI_DMT_UINT8, ACPI_ASF2a_OFFSET (Address), "Address", 0},
543 {ACPI_DMT_UINT8, ACPI_ASF2a_OFFSET (Command), "Command", 0},
544 {ACPI_DMT_UINT8, ACPI_ASF2a_OFFSET (Value), "Value", 0},
548 /* 3: ASF RMCP Boot Options */
550 ACPI_DMTABLE_INFO AcpiDmTableInfoAsf3[] =
552 {ACPI_DMT_BUF7, ACPI_ASF3_OFFSET (Capabilities[0]), "Capabilities", 0},
553 {ACPI_DMT_UINT8, ACPI_ASF3_OFFSET (CompletionCode), "Completion Code", 0},
554 {ACPI_DMT_UINT32, ACPI_ASF3_OFFSET (EnterpriseId), "Enterprise ID", 0},
555 {ACPI_DMT_UINT8, ACPI_ASF3_OFFSET (Command), "Command", 0},
556 {ACPI_DMT_UINT16, ACPI_ASF3_OFFSET (Parameter), "Parameter", 0},
557 {ACPI_DMT_UINT16, ACPI_ASF3_OFFSET (BootOptions), "Boot Options", 0},
558 {ACPI_DMT_UINT16, ACPI_ASF3_OFFSET (OemParameters), "Oem Parameters", 0},
564 ACPI_DMTABLE_INFO AcpiDmTableInfoAsf4[] =
566 {ACPI_DMT_UINT8, ACPI_ASF4_OFFSET (EpromAddress), "Eprom Address", 0},
567 {ACPI_DMT_UINT8, ACPI_ASF4_OFFSET (Devices), "Device Count", DT_COUNT},
572 /*******************************************************************************
574 * BERT - Boot Error Record table
576 ******************************************************************************/
578 ACPI_DMTABLE_INFO AcpiDmTableInfoBert[] =
580 {ACPI_DMT_UINT32, ACPI_BERT_OFFSET (RegionLength), "Boot Error Region Length", 0},
581 {ACPI_DMT_UINT64, ACPI_BERT_OFFSET (Address), "Boot Error Region Address", 0},
586 /*******************************************************************************
588 * BOOT - Simple Boot Flag Table
590 ******************************************************************************/
592 ACPI_DMTABLE_INFO AcpiDmTableInfoBoot[] =
594 {ACPI_DMT_UINT8, ACPI_BOOT_OFFSET (CmosIndex), "Boot Register Index", 0},
595 {ACPI_DMT_UINT24, ACPI_BOOT_OFFSET (Reserved[0]), "Reserved", 0},
600 /*******************************************************************************
602 * CPEP - Corrected Platform Error Polling table
604 ******************************************************************************/
606 ACPI_DMTABLE_INFO AcpiDmTableInfoCpep[] =
608 {ACPI_DMT_UINT64, ACPI_CPEP_OFFSET (Reserved), "Reserved", 0},
612 ACPI_DMTABLE_INFO AcpiDmTableInfoCpep0[] =
614 {ACPI_DMT_UINT8, ACPI_CPEP0_OFFSET (Header.Type), "Subtable Type", 0},
615 {ACPI_DMT_UINT8, ACPI_CPEP0_OFFSET (Header.Length), "Length", DT_LENGTH},
616 {ACPI_DMT_UINT8, ACPI_CPEP0_OFFSET (Id), "Processor ID", 0},
617 {ACPI_DMT_UINT8, ACPI_CPEP0_OFFSET (Eid), "Processor EID", 0},
618 {ACPI_DMT_UINT32, ACPI_CPEP0_OFFSET (Interval), "Polling Interval", 0},
623 /*******************************************************************************
627 ******************************************************************************/
629 ACPI_DMTABLE_INFO AcpiDmTableInfoDbgp[] =
631 {ACPI_DMT_UINT8, ACPI_DBGP_OFFSET (Type), "Interface Type", 0},
632 {ACPI_DMT_UINT24, ACPI_DBGP_OFFSET (Reserved[0]), "Reserved", 0},
633 {ACPI_DMT_GAS, ACPI_DBGP_OFFSET (DebugPort), "Debug Port Register", 0},
638 /*******************************************************************************
640 * DMAR - DMA Remapping table
642 ******************************************************************************/
644 ACPI_DMTABLE_INFO AcpiDmTableInfoDmar[] =
646 {ACPI_DMT_UINT8, ACPI_DMAR_OFFSET (Width), "Host Address Width", 0},
647 {ACPI_DMT_UINT8, ACPI_DMAR_OFFSET (Flags), "Flags", 0},
651 /* Common Subtable header (one per Subtable) */
653 ACPI_DMTABLE_INFO AcpiDmTableInfoDmarHdr[] =
655 {ACPI_DMT_DMAR, ACPI_DMAR0_OFFSET (Header.Type), "Subtable Type", 0},
656 {ACPI_DMT_UINT16, ACPI_DMAR0_OFFSET (Header.Length), "Length", DT_LENGTH},
660 /* Common device scope entry */
662 ACPI_DMTABLE_INFO AcpiDmTableInfoDmarScope[] =
664 {ACPI_DMT_UINT8, ACPI_DMARS_OFFSET (EntryType), "Device Scope Entry Type", 0},
665 {ACPI_DMT_UINT8, ACPI_DMARS_OFFSET (Length), "Entry Length", DT_LENGTH},
666 {ACPI_DMT_UINT16, ACPI_DMARS_OFFSET (Reserved), "Reserved", 0},
667 {ACPI_DMT_UINT8, ACPI_DMARS_OFFSET (EnumerationId), "Enumeration ID", 0},
668 {ACPI_DMT_UINT8, ACPI_DMARS_OFFSET (Bus), "PCI Bus Number", 0},
674 /* 0: Hardware Unit Definition */
676 ACPI_DMTABLE_INFO AcpiDmTableInfoDmar0[] =
678 {ACPI_DMT_UINT8, ACPI_DMAR0_OFFSET (Flags), "Flags", 0},
679 {ACPI_DMT_UINT8, ACPI_DMAR0_OFFSET (Reserved), "Reserved", 0},
680 {ACPI_DMT_UINT16, ACPI_DMAR0_OFFSET (Segment), "PCI Segment Number", 0},
681 {ACPI_DMT_UINT64, ACPI_DMAR0_OFFSET (Address), "Register Base Address", 0},
685 /* 1: Reserved Memory Definition */
687 ACPI_DMTABLE_INFO AcpiDmTableInfoDmar1[] =
689 {ACPI_DMT_UINT16, ACPI_DMAR1_OFFSET (Reserved), "Reserved", 0},
690 {ACPI_DMT_UINT16, ACPI_DMAR1_OFFSET (Segment), "PCI Segment Number", 0},
691 {ACPI_DMT_UINT64, ACPI_DMAR1_OFFSET (BaseAddress), "Base Address", 0},
692 {ACPI_DMT_UINT64, ACPI_DMAR1_OFFSET (EndAddress), "End Address (limit)", 0},
696 /* 2: Root Port ATS Capability Definition */
698 ACPI_DMTABLE_INFO AcpiDmTableInfoDmar2[] =
700 {ACPI_DMT_UINT8, ACPI_DMAR2_OFFSET (Flags), "Flags", 0},
701 {ACPI_DMT_UINT8, ACPI_DMAR2_OFFSET (Reserved), "Reserved", 0},
702 {ACPI_DMT_UINT16, ACPI_DMAR2_OFFSET (Segment), "PCI Segment Number", 0},
706 /* 3: Remapping Hardware Static Affinity Structure */
708 ACPI_DMTABLE_INFO AcpiDmTableInfoDmar3[] =
710 {ACPI_DMT_UINT32, ACPI_DMAR3_OFFSET (Reserved), "Reserved", 0},
711 {ACPI_DMT_UINT64, ACPI_DMAR3_OFFSET (BaseAddress), "Base Address", 0},
712 {ACPI_DMT_UINT32, ACPI_DMAR3_OFFSET (ProximityDomain), "Proximity Domain", 0},
717 /*******************************************************************************
719 * ECDT - Embedded Controller Boot Resources Table
721 ******************************************************************************/
723 ACPI_DMTABLE_INFO AcpiDmTableInfoEcdt[] =
725 {ACPI_DMT_GAS, ACPI_ECDT_OFFSET (Control), "Command/Status Register", 0},
726 {ACPI_DMT_GAS, ACPI_ECDT_OFFSET (Data), "Data Register", 0},
727 {ACPI_DMT_UINT32, ACPI_ECDT_OFFSET (Uid), "UID", 0},
728 {ACPI_DMT_UINT8, ACPI_ECDT_OFFSET (Gpe), "GPE Number", 0},
729 {ACPI_DMT_STRING, ACPI_ECDT_OFFSET (Id[0]), "Namepath", 0},
734 /*******************************************************************************
736 * EINJ - Error Injection table
738 ******************************************************************************/
740 ACPI_DMTABLE_INFO AcpiDmTableInfoEinj[] =
742 {ACPI_DMT_UINT32, ACPI_EINJ_OFFSET (HeaderLength), "Injection Header Length", 0},
743 {ACPI_DMT_UINT8, ACPI_EINJ_OFFSET (Flags), "Flags", 0},
744 {ACPI_DMT_UINT24, ACPI_EINJ_OFFSET (Reserved[0]), "Reserved", 0},
745 {ACPI_DMT_UINT32, ACPI_EINJ_OFFSET (Entries), "Injection Entry Count", 0},
749 ACPI_DMTABLE_INFO AcpiDmTableInfoEinj0[] =
751 {ACPI_DMT_EINJACT, ACPI_EINJ0_OFFSET (Action), "Action", 0},
752 {ACPI_DMT_EINJINST, ACPI_EINJ0_OFFSET (Instruction), "Instruction", 0},
753 {ACPI_DMT_UINT8, ACPI_EINJ0_OFFSET (Flags), "Flags (decoded below)", DT_FLAG},
754 {ACPI_DMT_FLAG0, ACPI_EINJ0_FLAG_OFFSET (Flags,0), "Preserve Register Bits", 0},
756 {ACPI_DMT_UINT8, ACPI_EINJ0_OFFSET (Reserved), "Reserved", 0},
757 {ACPI_DMT_GAS, ACPI_EINJ0_OFFSET (RegisterRegion), "Register Region", 0},
758 {ACPI_DMT_UINT64, ACPI_EINJ0_OFFSET (Value), "Value", 0},
759 {ACPI_DMT_UINT64, ACPI_EINJ0_OFFSET (Mask), "Mask", 0},
764 /*******************************************************************************
766 * ERST - Error Record Serialization table
768 ******************************************************************************/
770 ACPI_DMTABLE_INFO AcpiDmTableInfoErst[] =
772 {ACPI_DMT_UINT32, ACPI_ERST_OFFSET (HeaderLength), "Serialization Header Length", 0},
773 {ACPI_DMT_UINT32, ACPI_ERST_OFFSET (Reserved), "Reserved", 0},
774 {ACPI_DMT_UINT32, ACPI_ERST_OFFSET (Entries), "Instruction Entry Count", 0},
778 ACPI_DMTABLE_INFO AcpiDmTableInfoErst0[] =
780 {ACPI_DMT_ERSTACT, ACPI_ERST0_OFFSET (Action), "Action", 0},
781 {ACPI_DMT_ERSTINST, ACPI_ERST0_OFFSET (Instruction), "Instruction", 0},
782 {ACPI_DMT_UINT8, ACPI_ERST0_OFFSET (Flags), "Flags (decoded below)", DT_FLAG},
783 {ACPI_DMT_FLAG0, ACPI_ERST0_FLAG_OFFSET (Flags,0), "Preserve Register Bits", 0},
785 {ACPI_DMT_UINT8, ACPI_ERST0_OFFSET (Reserved), "Reserved", 0},
786 {ACPI_DMT_GAS, ACPI_ERST0_OFFSET (RegisterRegion), "Register Region", 0},
787 {ACPI_DMT_UINT64, ACPI_ERST0_OFFSET (Value), "Value", 0},
788 {ACPI_DMT_UINT64, ACPI_ERST0_OFFSET (Mask), "Mask", 0},
793 /*******************************************************************************
795 * HEST - Hardware Error Source table
797 ******************************************************************************/
799 ACPI_DMTABLE_INFO AcpiDmTableInfoHest[] =
801 {ACPI_DMT_UINT32, ACPI_HEST_OFFSET (ErrorSourceCount), "Error Source Count", 0},
805 /* Common HEST structures for subtables */
807 #define ACPI_DM_HEST_HEADER \
808 {ACPI_DMT_HEST, ACPI_HEST0_OFFSET (Header.Type), "Subtable Type", 0}, \
809 {ACPI_DMT_UINT16, ACPI_HEST0_OFFSET (Header.SourceId), "Source Id", 0}
811 #define ACPI_DM_HEST_AER \
812 {ACPI_DMT_UINT16, ACPI_HEST6_OFFSET (Aer.Reserved1), "Reserved", 0}, \
813 {ACPI_DMT_UINT8, ACPI_HEST6_OFFSET (Aer.Flags), "Flags (decoded below)", DT_FLAG}, \
814 {ACPI_DMT_FLAG0, ACPI_HEST6_FLAG_OFFSET (Aer.Flags,0), "Firmware First", 0}, \
815 {ACPI_DMT_UINT8, ACPI_HEST6_OFFSET (Aer.Enabled), "Enabled", 0}, \
816 {ACPI_DMT_UINT32, ACPI_HEST6_OFFSET (Aer.RecordsToPreallocate), "Records To Preallocate", 0}, \
817 {ACPI_DMT_UINT32, ACPI_HEST6_OFFSET (Aer.MaxSectionsPerRecord), "Max Sections Per Record", 0}, \
818 {ACPI_DMT_UINT32, ACPI_HEST6_OFFSET (Aer.Bus), "Bus", 0}, \
819 {ACPI_DMT_UINT16, ACPI_HEST6_OFFSET (Aer.Device), "Device", 0}, \
820 {ACPI_DMT_UINT16, ACPI_HEST6_OFFSET (Aer.Function), "Function", 0}, \
821 {ACPI_DMT_UINT16, ACPI_HEST6_OFFSET (Aer.DeviceControl), "DeviceControl", 0}, \
822 {ACPI_DMT_UINT16, ACPI_HEST6_OFFSET (Aer.Reserved2), "Reserved", 0}, \
823 {ACPI_DMT_UINT32, ACPI_HEST6_OFFSET (Aer.UncorrectableMask), "Uncorrectable Mask", 0}, \
824 {ACPI_DMT_UINT32, ACPI_HEST6_OFFSET (Aer.UncorrectableSeverity), "Uncorrectable Severity", 0}, \
825 {ACPI_DMT_UINT32, ACPI_HEST6_OFFSET (Aer.CorrectableMask), "Correctable Mask", 0}, \
826 {ACPI_DMT_UINT32, ACPI_HEST6_OFFSET (Aer.AdvancedCapabilities), "Advanced Capabilities", 0}
831 /* 0: IA32 Machine Check Exception */
833 ACPI_DMTABLE_INFO AcpiDmTableInfoHest0[] =
836 {ACPI_DMT_UINT16, ACPI_HEST0_OFFSET (Reserved1), "Reserved1", 0},
837 {ACPI_DMT_UINT8, ACPI_HEST0_OFFSET (Flags), "Flags (decoded below)", DT_FLAG},
838 {ACPI_DMT_FLAG0, ACPI_HEST0_FLAG_OFFSET (Flags,0), "Firmware First", 0},
840 {ACPI_DMT_UINT8, ACPI_HEST0_OFFSET (Enabled), "Enabled", 0},
841 {ACPI_DMT_UINT32, ACPI_HEST0_OFFSET (RecordsToPreallocate), "Records To Preallocate", 0},
842 {ACPI_DMT_UINT32, ACPI_HEST0_OFFSET (MaxSectionsPerRecord), "Max Sections Per Record", 0},
843 {ACPI_DMT_UINT64, ACPI_HEST0_OFFSET (GlobalCapabilityData), "Global Capability Data", 0},
844 {ACPI_DMT_UINT64, ACPI_HEST0_OFFSET (GlobalControlData), "Global Control Data", 0},
845 {ACPI_DMT_UINT8, ACPI_HEST0_OFFSET (NumHardwareBanks), "Num Hardware Banks", 0},
846 {ACPI_DMT_UINT56, ACPI_HEST0_OFFSET (Reserved3[0]), "Reserved2", 0},
850 /* 1: IA32 Corrected Machine Check */
852 ACPI_DMTABLE_INFO AcpiDmTableInfoHest1[] =
855 {ACPI_DMT_UINT16, ACPI_HEST1_OFFSET (Reserved1), "Reserved1", 0},
856 {ACPI_DMT_UINT8, ACPI_HEST1_OFFSET (Flags), "Flags (decoded below)", DT_FLAG},
857 {ACPI_DMT_FLAG0, ACPI_HEST1_FLAG_OFFSET (Flags,0), "Firmware First", 0},
859 {ACPI_DMT_UINT8, ACPI_HEST1_OFFSET (Enabled), "Enabled", 0},
860 {ACPI_DMT_UINT32, ACPI_HEST1_OFFSET (RecordsToPreallocate), "Records To Preallocate", 0},
861 {ACPI_DMT_UINT32, ACPI_HEST1_OFFSET (MaxSectionsPerRecord), "Max Sections Per Record", 0},
862 {ACPI_DMT_HESTNTFY, ACPI_HEST1_OFFSET (Notify), "Notify", 0},
863 {ACPI_DMT_UINT8, ACPI_HEST1_OFFSET (NumHardwareBanks), "Num Hardware Banks", 0},
864 {ACPI_DMT_UINT24, ACPI_HEST1_OFFSET (Reserved2[0]), "Reserved2", 0},
868 /* 2: IA32 Non-Maskable Interrupt */
870 ACPI_DMTABLE_INFO AcpiDmTableInfoHest2[] =
873 {ACPI_DMT_UINT32, ACPI_HEST2_OFFSET (Reserved), "Reserved", 0},
874 {ACPI_DMT_UINT32, ACPI_HEST2_OFFSET (RecordsToPreallocate), "Records To Preallocate", 0},
875 {ACPI_DMT_UINT32, ACPI_HEST2_OFFSET (MaxSectionsPerRecord), "Max Sections Per Record", 0},
876 {ACPI_DMT_UINT32, ACPI_HEST2_OFFSET (MaxRawDataLength), "Max Raw Data Length", 0},
880 /* 6: PCI Express Root Port AER */
882 ACPI_DMTABLE_INFO AcpiDmTableInfoHest6[] =
886 {ACPI_DMT_UINT32, ACPI_HEST6_OFFSET (RootErrorCommand), "Root Error Command", 0},
890 /* 7: PCI Express AER (AER Endpoint) */
892 ACPI_DMTABLE_INFO AcpiDmTableInfoHest7[] =
899 /* 8: PCI Express/PCI-X Bridge AER */
901 ACPI_DMTABLE_INFO AcpiDmTableInfoHest8[] =
905 {ACPI_DMT_UINT32, ACPI_HEST8_OFFSET (UncorrectableMask2), "2nd Uncorrectable Mask", 0},
906 {ACPI_DMT_UINT32, ACPI_HEST8_OFFSET (UncorrectableSeverity2), "2nd Uncorrectable Severity", 0},
907 {ACPI_DMT_UINT32, ACPI_HEST8_OFFSET (AdvancedCapabilities2), "2nd Advanced Capabilities", 0},
911 /* 9: Generic Hardware Error Source */
913 ACPI_DMTABLE_INFO AcpiDmTableInfoHest9[] =
916 {ACPI_DMT_UINT16, ACPI_HEST9_OFFSET (RelatedSourceId), "Related Source Id", 0},
917 {ACPI_DMT_UINT8, ACPI_HEST9_OFFSET (Reserved), "Reserved", 0},
918 {ACPI_DMT_UINT8, ACPI_HEST9_OFFSET (Enabled), "Enabled", 0},
919 {ACPI_DMT_UINT32, ACPI_HEST9_OFFSET (RecordsToPreallocate), "Records To Preallocate", 0},
920 {ACPI_DMT_UINT32, ACPI_HEST9_OFFSET (MaxSectionsPerRecord), "Max Sections Per Record", 0},
921 {ACPI_DMT_UINT32, ACPI_HEST9_OFFSET (MaxRawDataLength), "Max Raw Data Length", 0},
922 {ACPI_DMT_GAS, ACPI_HEST9_OFFSET (ErrorStatusAddress), "Error Status Address", 0},
923 {ACPI_DMT_HESTNTFY, ACPI_HEST9_OFFSET (Notify), "Notify", 0},
924 {ACPI_DMT_UINT32, ACPI_HEST9_OFFSET (ErrorBlockLength), "Error Status Block Length", 0},
928 ACPI_DMTABLE_INFO AcpiDmTableInfoHestNotify[] =
930 {ACPI_DMT_HESTNTYP, ACPI_HESTN_OFFSET (Type), "Notify Type", 0},
931 {ACPI_DMT_UINT8, ACPI_HESTN_OFFSET (Length), "Notify Length", DT_LENGTH},
932 {ACPI_DMT_UINT16, ACPI_HESTN_OFFSET (ConfigWriteEnable), "Configuration Write Enable", 0},
933 {ACPI_DMT_UINT32, ACPI_HESTN_OFFSET (PollInterval), "PollInterval", 0},
934 {ACPI_DMT_UINT32, ACPI_HESTN_OFFSET (Vector), "Vector", 0},
935 {ACPI_DMT_UINT32, ACPI_HESTN_OFFSET (PollingThresholdValue), "Polling Threshold Value", 0},
936 {ACPI_DMT_UINT32, ACPI_HESTN_OFFSET (PollingThresholdWindow), "Polling Threshold Window", 0},
937 {ACPI_DMT_UINT32, ACPI_HESTN_OFFSET (ErrorThresholdValue), "Error Threshold Value", 0},
938 {ACPI_DMT_UINT32, ACPI_HESTN_OFFSET (ErrorThresholdWindow), "Error Threshold Window", 0},
944 * IA32 Error Bank(s) - Follows the ACPI_HEST_IA_MACHINE_CHECK and
945 * ACPI_HEST_IA_CORRECTED structures.
947 ACPI_DMTABLE_INFO AcpiDmTableInfoHestBank[] =
949 {ACPI_DMT_UINT8, ACPI_HESTB_OFFSET (BankNumber), "Bank Number", 0},
950 {ACPI_DMT_UINT8, ACPI_HESTB_OFFSET (ClearStatusOnInit), "Clear Status On Init", 0},
951 {ACPI_DMT_UINT8, ACPI_HESTB_OFFSET (StatusFormat), "Status Format", 0},
952 {ACPI_DMT_UINT8, ACPI_HESTB_OFFSET (Reserved), "Reserved", 0},
953 {ACPI_DMT_UINT32, ACPI_HESTB_OFFSET (ControlRegister), "Control Register", 0},
954 {ACPI_DMT_UINT64, ACPI_HESTB_OFFSET (ControlData), "Control Data", 0},
955 {ACPI_DMT_UINT32, ACPI_HESTB_OFFSET (StatusRegister), "Status Register", 0},
956 {ACPI_DMT_UINT32, ACPI_HESTB_OFFSET (AddressRegister), "Address Register", 0},
957 {ACPI_DMT_UINT32, ACPI_HESTB_OFFSET (MiscRegister), "Misc Register", 0},
962 /*******************************************************************************
964 * HPET - High Precision Event Timer table
966 ******************************************************************************/
968 ACPI_DMTABLE_INFO AcpiDmTableInfoHpet[] =
970 {ACPI_DMT_UINT32, ACPI_HPET_OFFSET (Id), "Hardware Block ID", 0},
971 {ACPI_DMT_GAS, ACPI_HPET_OFFSET (Address), "Timer Block Register", 0},
972 {ACPI_DMT_UINT8, ACPI_HPET_OFFSET (Sequence), "Sequence Number", 0},
973 {ACPI_DMT_UINT16, ACPI_HPET_OFFSET (MinimumTick), "Minimum Clock Ticks", 0},
974 {ACPI_DMT_UINT8, ACPI_HPET_OFFSET (Flags), "Flags (decoded below)", DT_FLAG},
975 {ACPI_DMT_FLAG0, ACPI_HPET_FLAG_OFFSET (Flags,0), "4K Page Protect", 0},
976 {ACPI_DMT_FLAG1, ACPI_HPET_FLAG_OFFSET (Flags,0), "64K Page Protect", 0},
981 /*******************************************************************************
983 * IVRS - I/O Virtualization Reporting Structure
985 ******************************************************************************/
987 ACPI_DMTABLE_INFO AcpiDmTableInfoIvrs[] =
989 {ACPI_DMT_UINT32, ACPI_IVRS_OFFSET (Info), "Virtualization Info", 0},
990 {ACPI_DMT_UINT64, ACPI_IVRS_OFFSET (Reserved), "Reserved", 0},
994 /* Common Subtable header (one per Subtable) */
996 ACPI_DMTABLE_INFO AcpiDmTableInfoIvrsHdr[] =
998 {ACPI_DMT_IVRS, ACPI_IVRSH_OFFSET (Type), "Subtable Type", 0},
999 {ACPI_DMT_UINT8, ACPI_IVRSH_OFFSET (Flags), "Flags", 0},
1000 {ACPI_DMT_UINT16, ACPI_IVRSH_OFFSET (Length), "Length", DT_LENGTH},
1001 {ACPI_DMT_UINT16, ACPI_IVRSH_OFFSET (DeviceId), "DeviceId", 0},
1005 /* IVRS subtables */
1007 /* 0x10: I/O Virtualization Hardware Definition (IVHD) Block */
1009 ACPI_DMTABLE_INFO AcpiDmTableInfoIvrs0[] =
1011 {ACPI_DMT_UINT16, ACPI_IVRS0_OFFSET (CapabilityOffset), "Capability Offset", 0},
1012 {ACPI_DMT_UINT64, ACPI_IVRS0_OFFSET (BaseAddress), "Base Address", 0},
1013 {ACPI_DMT_UINT16, ACPI_IVRS0_OFFSET (PciSegmentGroup), "PCI Segment Group", 0},
1014 {ACPI_DMT_UINT16, ACPI_IVRS0_OFFSET (Info), "Virtualization Info", 0},
1015 {ACPI_DMT_UINT32, ACPI_IVRS0_OFFSET (Reserved), "Reserved", 0},
1019 /* 0x20, 0x21, 0x22: I/O Virtualization Memory Definition (IVMD) Block */
1021 ACPI_DMTABLE_INFO AcpiDmTableInfoIvrs1[] =
1023 {ACPI_DMT_UINT16, ACPI_IVRS1_OFFSET (AuxData), "Auxiliary Data", 0},
1024 {ACPI_DMT_UINT64, ACPI_IVRS1_OFFSET (Reserved), "Reserved", 0},
1025 {ACPI_DMT_UINT64, ACPI_IVRS1_OFFSET (StartAddress), "Start Address", 0},
1026 {ACPI_DMT_UINT64, ACPI_IVRS1_OFFSET (MemoryLength), "Memory Length", 0},
1030 /* Device entry header for IVHD block */
1032 #define ACPI_DMT_IVRS_DE_HEADER \
1033 {ACPI_DMT_UINT8, ACPI_IVRSD_OFFSET (Type), "Entry Type", 0}, \
1034 {ACPI_DMT_UINT16, ACPI_IVRSD_OFFSET (Id), "Device ID", 0}, \
1035 {ACPI_DMT_UINT8, ACPI_IVRSD_OFFSET (DataSetting), "Data Setting", 0}
1037 /* 4-byte device entry */
1039 ACPI_DMTABLE_INFO AcpiDmTableInfoIvrs4[] =
1041 ACPI_DMT_IVRS_DE_HEADER,
1042 {ACPI_DMT_EXIT, 0, NULL, 0},
1045 /* 8-byte device entry */
1047 ACPI_DMTABLE_INFO AcpiDmTableInfoIvrs8a[] =
1049 ACPI_DMT_IVRS_DE_HEADER,
1050 {ACPI_DMT_UINT8, ACPI_IVRS8A_OFFSET (Reserved1), "Reserved", 0},
1051 {ACPI_DMT_UINT16, ACPI_IVRS8A_OFFSET (UsedId), "Source Used Device ID", 0},
1052 {ACPI_DMT_UINT8, ACPI_IVRS8A_OFFSET (Reserved2), "Reserved", 0},
1056 /* 8-byte device entry */
1058 ACPI_DMTABLE_INFO AcpiDmTableInfoIvrs8b[] =
1060 ACPI_DMT_IVRS_DE_HEADER,
1061 {ACPI_DMT_UINT32, ACPI_IVRS8B_OFFSET (ExtendedData), "Extended Data", 0},
1065 /* 8-byte device entry */
1067 ACPI_DMTABLE_INFO AcpiDmTableInfoIvrs8c[] =
1069 ACPI_DMT_IVRS_DE_HEADER,
1070 {ACPI_DMT_UINT8, ACPI_IVRS8C_OFFSET (Handle), "Handle", 0},
1071 {ACPI_DMT_UINT16, ACPI_IVRS8C_OFFSET (UsedId), "Source Used Device ID", 0},
1072 {ACPI_DMT_UINT8, ACPI_IVRS8C_OFFSET (Variety), "Variety", 0},
1077 /*******************************************************************************
1079 * MADT - Multiple APIC Description Table and subtables
1081 ******************************************************************************/
1083 ACPI_DMTABLE_INFO AcpiDmTableInfoMadt[] =
1085 {ACPI_DMT_UINT32, ACPI_MADT_OFFSET (Address), "Local Apic Address", 0},
1086 {ACPI_DMT_UINT32, ACPI_MADT_OFFSET (Flags), "Flags (decoded below)", DT_FLAG},
1087 {ACPI_DMT_FLAG0, ACPI_MADT_FLAG_OFFSET (Flags,0), "PC-AT Compatibility", 0},
1091 /* Common Subtable header (one per Subtable) */
1093 ACPI_DMTABLE_INFO AcpiDmTableInfoMadtHdr[] =
1095 {ACPI_DMT_MADT, ACPI_MADTH_OFFSET (Type), "Subtable Type", 0},
1096 {ACPI_DMT_UINT8, ACPI_MADTH_OFFSET (Length), "Length", DT_LENGTH},
1100 /* MADT Subtables */
1102 /* 0: processor APIC */
1104 ACPI_DMTABLE_INFO AcpiDmTableInfoMadt0[] =
1106 {ACPI_DMT_UINT8, ACPI_MADT0_OFFSET (ProcessorId), "Processor ID", 0},
1107 {ACPI_DMT_UINT8, ACPI_MADT0_OFFSET (Id), "Local Apic ID", 0},
1108 {ACPI_DMT_UINT32, ACPI_MADT0_OFFSET (LapicFlags), "Flags (decoded below)", DT_FLAG},
1109 {ACPI_DMT_FLAG0, ACPI_MADT0_FLAG_OFFSET (LapicFlags,0), "Processor Enabled", 0},
1115 ACPI_DMTABLE_INFO AcpiDmTableInfoMadt1[] =
1117 {ACPI_DMT_UINT8, ACPI_MADT1_OFFSET (Id), "I/O Apic ID", 0},
1118 {ACPI_DMT_UINT8, ACPI_MADT1_OFFSET (Reserved), "Reserved", 0},
1119 {ACPI_DMT_UINT32, ACPI_MADT1_OFFSET (Address), "Address", 0},
1120 {ACPI_DMT_UINT32, ACPI_MADT1_OFFSET (GlobalIrqBase), "Interrupt", 0},
1124 /* 2: Interrupt Override */
1126 ACPI_DMTABLE_INFO AcpiDmTableInfoMadt2[] =
1128 {ACPI_DMT_UINT8, ACPI_MADT2_OFFSET (Bus), "Bus", 0},
1129 {ACPI_DMT_UINT8, ACPI_MADT2_OFFSET (SourceIrq), "Source", 0},
1130 {ACPI_DMT_UINT32, ACPI_MADT2_OFFSET (GlobalIrq), "Interrupt", 0},
1131 {ACPI_DMT_UINT16, ACPI_MADT2_OFFSET (IntiFlags), "Flags (decoded below)", DT_FLAG},
1132 {ACPI_DMT_FLAGS0, ACPI_MADT2_FLAG_OFFSET (IntiFlags,0), "Polarity", 0},
1133 {ACPI_DMT_FLAGS2, ACPI_MADT2_FLAG_OFFSET (IntiFlags,0), "Trigger Mode", 0},
1137 /* 3: NMI Sources */
1139 ACPI_DMTABLE_INFO AcpiDmTableInfoMadt3[] =
1141 {ACPI_DMT_UINT16, ACPI_MADT3_OFFSET (IntiFlags), "Flags (decoded below)", DT_FLAG},
1142 {ACPI_DMT_FLAGS0, ACPI_MADT3_FLAG_OFFSET (IntiFlags,0), "Polarity", 0},
1143 {ACPI_DMT_FLAGS2, ACPI_MADT3_FLAG_OFFSET (IntiFlags,0), "Trigger Mode", 0},
1144 {ACPI_DMT_UINT32, ACPI_MADT3_OFFSET (GlobalIrq), "Interrupt", 0},
1148 /* 4: Local APIC NMI */
1150 ACPI_DMTABLE_INFO AcpiDmTableInfoMadt4[] =
1152 {ACPI_DMT_UINT8, ACPI_MADT4_OFFSET (ProcessorId), "Processor ID", 0},
1153 {ACPI_DMT_UINT16, ACPI_MADT4_OFFSET (IntiFlags), "Flags (decoded below)", DT_FLAG},
1154 {ACPI_DMT_FLAGS0, ACPI_MADT4_FLAG_OFFSET (IntiFlags,0), "Polarity", 0},
1155 {ACPI_DMT_FLAGS2, ACPI_MADT4_FLAG_OFFSET (IntiFlags,0), "Trigger Mode", 0},
1156 {ACPI_DMT_UINT8, ACPI_MADT4_OFFSET (Lint), "Interrupt Input LINT", 0},
1160 /* 5: Address Override */
1162 ACPI_DMTABLE_INFO AcpiDmTableInfoMadt5[] =
1164 {ACPI_DMT_UINT16, ACPI_MADT5_OFFSET (Reserved), "Reserved", 0},
1165 {ACPI_DMT_UINT64, ACPI_MADT5_OFFSET (Address), "APIC Address", 0},
1171 ACPI_DMTABLE_INFO AcpiDmTableInfoMadt6[] =
1173 {ACPI_DMT_UINT8, ACPI_MADT6_OFFSET (Id), "I/O Sapic ID", 0},
1174 {ACPI_DMT_UINT8, ACPI_MADT6_OFFSET (Reserved), "Reserved", 0},
1175 {ACPI_DMT_UINT32, ACPI_MADT6_OFFSET (GlobalIrqBase), "Interrupt Base", 0},
1176 {ACPI_DMT_UINT64, ACPI_MADT6_OFFSET (Address), "Address", 0},
1180 /* 7: Local Sapic */
1182 ACPI_DMTABLE_INFO AcpiDmTableInfoMadt7[] =
1184 {ACPI_DMT_UINT8, ACPI_MADT7_OFFSET (ProcessorId), "Processor ID", 0},
1185 {ACPI_DMT_UINT8, ACPI_MADT7_OFFSET (Id), "Local Sapic ID", 0},
1186 {ACPI_DMT_UINT8, ACPI_MADT7_OFFSET (Eid), "Local Sapic EID", 0},
1187 {ACPI_DMT_UINT24, ACPI_MADT7_OFFSET (Reserved[0]), "Reserved", 0},
1188 {ACPI_DMT_UINT32, ACPI_MADT7_OFFSET (LapicFlags), "Flags (decoded below)", DT_FLAG},
1189 {ACPI_DMT_FLAG0, ACPI_MADT7_FLAG_OFFSET (LapicFlags,0), "Processor Enabled", 0},
1190 {ACPI_DMT_UINT32, ACPI_MADT7_OFFSET (Uid), "Processor UID", 0},
1191 {ACPI_DMT_STRING, ACPI_MADT7_OFFSET (UidString[0]), "Processor UID String", 0},
1195 /* 8: Platform Interrupt Source */
1197 ACPI_DMTABLE_INFO AcpiDmTableInfoMadt8[] =
1199 {ACPI_DMT_UINT16, ACPI_MADT8_OFFSET (IntiFlags), "Flags (decoded below)", DT_FLAG},
1200 {ACPI_DMT_FLAGS0, ACPI_MADT8_FLAG_OFFSET (IntiFlags,0), "Polarity", 0},
1201 {ACPI_DMT_FLAGS2, ACPI_MADT8_FLAG_OFFSET (IntiFlags,0), "Trigger Mode", 0},
1202 {ACPI_DMT_UINT8, ACPI_MADT8_OFFSET (Type), "InterruptType", 0},
1203 {ACPI_DMT_UINT8, ACPI_MADT8_OFFSET (Id), "Processor ID", 0},
1204 {ACPI_DMT_UINT8, ACPI_MADT8_OFFSET (Eid), "Processor EID", 0},
1205 {ACPI_DMT_UINT8, ACPI_MADT8_OFFSET (IoSapicVector), "I/O Sapic Vector", 0},
1206 {ACPI_DMT_UINT32, ACPI_MADT8_OFFSET (GlobalIrq), "Interrupt", 0},
1207 {ACPI_DMT_UINT32, ACPI_MADT8_OFFSET (Flags), "Flags (decoded below)", DT_FLAG},
1208 {ACPI_DMT_FLAG0, ACPI_MADT8_OFFSET (Flags), "CPEI Override", 0},
1212 /* 9: Processor Local X2_APIC (ACPI 4.0) */
1214 ACPI_DMTABLE_INFO AcpiDmTableInfoMadt9[] =
1216 {ACPI_DMT_UINT16, ACPI_MADT9_OFFSET (Reserved), "Reserved", 0},
1217 {ACPI_DMT_UINT32, ACPI_MADT9_OFFSET (LocalApicId), "Processor x2Apic ID", 0},
1218 {ACPI_DMT_UINT32, ACPI_MADT9_OFFSET (LapicFlags), "Flags (decoded below)", DT_FLAG},
1219 {ACPI_DMT_FLAG0, ACPI_MADT9_FLAG_OFFSET (LapicFlags,0), "Processor Enabled", 0},
1220 {ACPI_DMT_UINT32, ACPI_MADT9_OFFSET (Uid), "Processor UID", 0},
1224 /* 10: Local X2_APIC NMI (ACPI 4.0) */
1226 ACPI_DMTABLE_INFO AcpiDmTableInfoMadt10[] =
1228 {ACPI_DMT_UINT16, ACPI_MADT10_OFFSET (IntiFlags), "Flags (decoded below)", DT_FLAG},
1229 {ACPI_DMT_FLAGS0, ACPI_MADT10_FLAG_OFFSET (IntiFlags,0), "Polarity", 0},
1230 {ACPI_DMT_FLAGS2, ACPI_MADT10_FLAG_OFFSET (IntiFlags,0), "Trigger Mode", 0},
1231 {ACPI_DMT_UINT32, ACPI_MADT10_OFFSET (Uid), "Processor UID", 0},
1232 {ACPI_DMT_UINT8, ACPI_MADT10_OFFSET (Lint), "Interrupt Input LINT", 0},
1233 {ACPI_DMT_UINT24, ACPI_MADT10_OFFSET (Reserved[0]), "Reserved", 0},
1238 /*******************************************************************************
1240 * MCFG - PCI Memory Mapped Configuration table and Subtable
1242 ******************************************************************************/
1244 ACPI_DMTABLE_INFO AcpiDmTableInfoMcfg[] =
1246 {ACPI_DMT_UINT64, ACPI_MCFG_OFFSET (Reserved[0]), "Reserved", 0},
1250 ACPI_DMTABLE_INFO AcpiDmTableInfoMcfg0[] =
1252 {ACPI_DMT_UINT64, ACPI_MCFG0_OFFSET (Address), "Base Address", 0},
1253 {ACPI_DMT_UINT16, ACPI_MCFG0_OFFSET (PciSegment), "Segment Group Number", 0},
1254 {ACPI_DMT_UINT8, ACPI_MCFG0_OFFSET (StartBusNumber), "Start Bus Number", 0},
1255 {ACPI_DMT_UINT8, ACPI_MCFG0_OFFSET (EndBusNumber), "End Bus Number", 0},
1256 {ACPI_DMT_UINT32, ACPI_MCFG0_OFFSET (Reserved), "Reserved", 0},
1261 /*******************************************************************************
1263 * MCHI - Management Controller Host Interface table
1265 ******************************************************************************/
1267 ACPI_DMTABLE_INFO AcpiDmTableInfoMchi[] =
1269 {ACPI_DMT_UINT8, ACPI_MCHI_OFFSET (InterfaceType), "Interface Type", 0},
1270 {ACPI_DMT_UINT8, ACPI_MCHI_OFFSET (Protocol), "Protocol", 0},
1271 {ACPI_DMT_UINT64, ACPI_MCHI_OFFSET (ProtocolData), "Protocol Data", 0},
1272 {ACPI_DMT_UINT8, ACPI_MCHI_OFFSET (InterruptType), "Interrupt Type", 0},
1273 {ACPI_DMT_UINT8, ACPI_MCHI_OFFSET (Gpe), "Gpe", 0},
1274 {ACPI_DMT_UINT8, ACPI_MCHI_OFFSET (PciDeviceFlag), "Pci Device Flag", 0},
1275 {ACPI_DMT_UINT32, ACPI_MCHI_OFFSET (GlobalInterrupt), "Global Interrupt", 0},
1276 {ACPI_DMT_GAS, ACPI_MCHI_OFFSET (ControlRegister), "Control Register", 0},
1277 {ACPI_DMT_UINT8, ACPI_MCHI_OFFSET (PciSegment), "Pci Segment", 0},
1278 {ACPI_DMT_UINT8, ACPI_MCHI_OFFSET (PciBus), "Pci Bus", 0},
1279 {ACPI_DMT_UINT8, ACPI_MCHI_OFFSET (PciDevice), "Pci Device", 0},
1280 {ACPI_DMT_UINT8, ACPI_MCHI_OFFSET (PciFunction), "Pci Function", 0},
1285 /*******************************************************************************
1287 * MSCT - Maximum System Characteristics Table (ACPI 4.0)
1289 ******************************************************************************/
1291 ACPI_DMTABLE_INFO AcpiDmTableInfoMsct[] =
1293 {ACPI_DMT_UINT32, ACPI_MSCT_OFFSET (ProximityOffset), "Proximity Offset", 0},
1294 {ACPI_DMT_UINT32, ACPI_MSCT_OFFSET (MaxProximityDomains), "Max Proximity Domains", 0},
1295 {ACPI_DMT_UINT32, ACPI_MSCT_OFFSET (MaxClockDomains), "Max Clock Domains", 0},
1296 {ACPI_DMT_UINT64, ACPI_MSCT_OFFSET (MaxAddress), "Max Physical Address", 0},
1300 /* Subtable - Maximum Proximity Domain Information. Version 1 */
1302 ACPI_DMTABLE_INFO AcpiDmTableInfoMsct0[] =
1304 {ACPI_DMT_UINT8, ACPI_MSCT0_OFFSET (Revision), "Revision", 0},
1305 {ACPI_DMT_UINT8, ACPI_MSCT0_OFFSET (Length), "Length", DT_LENGTH},
1306 {ACPI_DMT_UINT32, ACPI_MSCT0_OFFSET (RangeStart), "Domain Range Start", 0},
1307 {ACPI_DMT_UINT32, ACPI_MSCT0_OFFSET (RangeEnd), "Domain Range End", 0},
1308 {ACPI_DMT_UINT32, ACPI_MSCT0_OFFSET (ProcessorCapacity), "Processor Capacity", 0},
1309 {ACPI_DMT_UINT64, ACPI_MSCT0_OFFSET (MemoryCapacity), "Memory Capacity", 0},
1314 /*******************************************************************************
1316 * SBST - Smart Battery Specification Table
1318 ******************************************************************************/
1320 ACPI_DMTABLE_INFO AcpiDmTableInfoSbst[] =
1322 {ACPI_DMT_UINT32, ACPI_SBST_OFFSET (WarningLevel), "Warning Level", 0},
1323 {ACPI_DMT_UINT32, ACPI_SBST_OFFSET (LowLevel), "Low Level", 0},
1324 {ACPI_DMT_UINT32, ACPI_SBST_OFFSET (CriticalLevel), "Critical Level", 0},
1329 /*******************************************************************************
1331 * SLIC - Software Licensing Description Table. NOT FULLY IMPLEMENTED, do not
1332 * have the table definition.
1334 ******************************************************************************/
1336 ACPI_DMTABLE_INFO AcpiDmTableInfoSlic[] =
1342 /*******************************************************************************
1344 * SLIT - System Locality Information Table
1346 ******************************************************************************/
1348 ACPI_DMTABLE_INFO AcpiDmTableInfoSlit[] =
1350 {ACPI_DMT_UINT64, ACPI_SLIT_OFFSET (LocalityCount), "Localities", 0},
1355 /*******************************************************************************
1357 * SPCR - Serial Port Console Redirection table
1359 ******************************************************************************/
1361 ACPI_DMTABLE_INFO AcpiDmTableInfoSpcr[] =
1363 {ACPI_DMT_UINT8, ACPI_SPCR_OFFSET (InterfaceType), "Interface Type", 0},
1364 {ACPI_DMT_UINT24, ACPI_SPCR_OFFSET (Reserved[0]), "Reserved", 0},
1365 {ACPI_DMT_GAS, ACPI_SPCR_OFFSET (SerialPort), "Serial Port Register", 0},
1366 {ACPI_DMT_UINT8, ACPI_SPCR_OFFSET (InterruptType), "Interrupt Type", 0},
1367 {ACPI_DMT_UINT8, ACPI_SPCR_OFFSET (PcInterrupt), "PCAT-compatible IRQ", 0},
1368 {ACPI_DMT_UINT32, ACPI_SPCR_OFFSET (Interrupt), "Interrupt", 0},
1369 {ACPI_DMT_UINT8, ACPI_SPCR_OFFSET (BaudRate), "Baud Rate", 0},
1370 {ACPI_DMT_UINT8, ACPI_SPCR_OFFSET (Parity), "Parity", 0},
1371 {ACPI_DMT_UINT8, ACPI_SPCR_OFFSET (StopBits), "Stop Bits", 0},
1372 {ACPI_DMT_UINT8, ACPI_SPCR_OFFSET (FlowControl), "Flow Control", 0},
1373 {ACPI_DMT_UINT8, ACPI_SPCR_OFFSET (TerminalType), "Terminal Type", 0},
1374 {ACPI_DMT_UINT8, ACPI_SPCR_OFFSET (Reserved2), "Reserved", 0},
1375 {ACPI_DMT_UINT16, ACPI_SPCR_OFFSET (PciDeviceId), "PCI Device ID", 0},
1376 {ACPI_DMT_UINT16, ACPI_SPCR_OFFSET (PciVendorId), "PCI Vendor ID", 0},
1377 {ACPI_DMT_UINT8, ACPI_SPCR_OFFSET (PciBus), "PCI Bus", 0},
1378 {ACPI_DMT_UINT8, ACPI_SPCR_OFFSET (PciDevice), "PCI Device", 0},
1379 {ACPI_DMT_UINT8, ACPI_SPCR_OFFSET (PciFunction), "PCI Function", 0},
1380 {ACPI_DMT_UINT32, ACPI_SPCR_OFFSET (PciFlags), "PCI Flags", 0},
1381 {ACPI_DMT_UINT8, ACPI_SPCR_OFFSET (PciSegment), "PCI Segment", 0},
1382 {ACPI_DMT_UINT32, ACPI_SPCR_OFFSET (Reserved2), "Reserved", 0},
1387 /*******************************************************************************
1389 * SPMI - Server Platform Management Interface table
1391 ******************************************************************************/
1393 ACPI_DMTABLE_INFO AcpiDmTableInfoSpmi[] =
1395 {ACPI_DMT_UINT8, ACPI_SPMI_OFFSET (InterfaceType), "Interface Type", 0},
1396 {ACPI_DMT_UINT8, ACPI_SPMI_OFFSET (Reserved), "Reserved", 0},
1397 {ACPI_DMT_UINT16, ACPI_SPMI_OFFSET (SpecRevision), "IPMI Spec Version", 0},
1398 {ACPI_DMT_UINT8, ACPI_SPMI_OFFSET (InterruptType), "Interrupt Type", 0},
1399 {ACPI_DMT_UINT8, ACPI_SPMI_OFFSET (GpeNumber), "GPE Number", 0},
1400 {ACPI_DMT_UINT8, ACPI_SPMI_OFFSET (Reserved1), "Reserved", 0},
1401 {ACPI_DMT_UINT8, ACPI_SPMI_OFFSET (PciDeviceFlag), "PCI Device Flag", 0},
1402 {ACPI_DMT_UINT32, ACPI_SPMI_OFFSET (Interrupt), "Interrupt", 0},
1403 {ACPI_DMT_GAS, ACPI_SPMI_OFFSET (IpmiRegister), "IPMI Register", 0},
1404 {ACPI_DMT_UINT8, ACPI_SPMI_OFFSET (PciSegment), "PCI Segment", 0},
1405 {ACPI_DMT_UINT8, ACPI_SPMI_OFFSET (PciBus), "PCI Bus", 0},
1406 {ACPI_DMT_UINT8, ACPI_SPMI_OFFSET (PciDevice), "PCI Device", 0},
1407 {ACPI_DMT_UINT8, ACPI_SPMI_OFFSET (PciFunction), "PCI Function", 0},
1408 {ACPI_DMT_UINT8, ACPI_SPMI_OFFSET (Reserved2), "Reserved", 0},
1413 /*******************************************************************************
1415 * SRAT - System Resource Affinity Table and Subtables
1417 ******************************************************************************/
1419 ACPI_DMTABLE_INFO AcpiDmTableInfoSrat[] =
1421 {ACPI_DMT_UINT32, ACPI_SRAT_OFFSET (TableRevision), "Table Revision", 0},
1422 {ACPI_DMT_UINT64, ACPI_SRAT_OFFSET (Reserved), "Reserved", 0},
1426 /* Common Subtable header (one per Subtable) */
1428 ACPI_DMTABLE_INFO AcpiDmTableInfoSratHdr[] =
1430 {ACPI_DMT_SRAT, ACPI_SRATH_OFFSET (Type), "Subtable Type", 0},
1431 {ACPI_DMT_UINT8, ACPI_SRATH_OFFSET (Length), "Length", DT_LENGTH},
1435 /* SRAT Subtables */
1437 /* 0: Processor Local APIC/SAPIC Affinity */
1439 ACPI_DMTABLE_INFO AcpiDmTableInfoSrat0[] =
1441 {ACPI_DMT_UINT8, ACPI_SRAT0_OFFSET (ProximityDomainLo), "Proximity Domain Low(8)", 0},
1442 {ACPI_DMT_UINT8, ACPI_SRAT0_OFFSET (ApicId), "Apic ID", 0},
1443 {ACPI_DMT_UINT32, ACPI_SRAT0_OFFSET (Flags), "Flags (decoded below)", DT_FLAG},
1444 {ACPI_DMT_FLAG0, ACPI_SRAT0_FLAG_OFFSET (Flags,0), "Enabled", 0},
1445 {ACPI_DMT_UINT8, ACPI_SRAT0_OFFSET (LocalSapicEid), "Local Sapic EID", 0},
1446 {ACPI_DMT_UINT24, ACPI_SRAT0_OFFSET (ProximityDomainHi[0]), "Proximity Domain High(24)", 0},
1447 {ACPI_DMT_UINT32, ACPI_SRAT0_OFFSET (Reserved), "Reserved", 0},
1451 /* 1: Memory Affinity */
1453 ACPI_DMTABLE_INFO AcpiDmTableInfoSrat1[] =
1455 {ACPI_DMT_UINT32, ACPI_SRAT1_OFFSET (ProximityDomain), "Proximity Domain", 0},
1456 {ACPI_DMT_UINT16, ACPI_SRAT1_OFFSET (Reserved), "Reserved1", 0},
1457 {ACPI_DMT_UINT64, ACPI_SRAT1_OFFSET (BaseAddress), "Base Address", 0},
1458 {ACPI_DMT_UINT64, ACPI_SRAT1_OFFSET (Length), "Address Length", 0},
1459 {ACPI_DMT_UINT32, ACPI_SRAT1_OFFSET (Reserved1), "Reserved2", 0},
1460 {ACPI_DMT_UINT32, ACPI_SRAT1_OFFSET (Flags), "Flags (decoded below)", DT_FLAG},
1461 {ACPI_DMT_FLAG0, ACPI_SRAT1_FLAG_OFFSET (Flags,0), "Enabled", 0},
1462 {ACPI_DMT_FLAG1, ACPI_SRAT1_FLAG_OFFSET (Flags,0), "Hot Pluggable", 0},
1463 {ACPI_DMT_FLAG2, ACPI_SRAT1_FLAG_OFFSET (Flags,0), "Non-Volatile", 0},
1464 {ACPI_DMT_UINT64, ACPI_SRAT1_OFFSET (Reserved2), "Reserved3", 0},
1468 /* 2: Processor Local X2_APIC Affinity (ACPI 4.0) */
1470 ACPI_DMTABLE_INFO AcpiDmTableInfoSrat2[] =
1472 {ACPI_DMT_UINT16, ACPI_SRAT2_OFFSET (Reserved), "Reserved1", 0},
1473 {ACPI_DMT_UINT32, ACPI_SRAT2_OFFSET (ProximityDomain), "Proximity Domain", 0},
1474 {ACPI_DMT_UINT32, ACPI_SRAT2_OFFSET (ApicId), "Apic ID", 0},
1475 {ACPI_DMT_UINT32, ACPI_SRAT2_OFFSET (Flags), "Flags (decoded below)", DT_FLAG},
1476 {ACPI_DMT_FLAG0, ACPI_SRAT2_FLAG_OFFSET (Flags,0), "Enabled", 0},
1477 {ACPI_DMT_UINT32, ACPI_SRAT2_OFFSET (ClockDomain), "Clock Domain", 0},
1478 {ACPI_DMT_UINT32, ACPI_SRAT2_OFFSET (Reserved2), "Reserved2", 0},
1483 /*******************************************************************************
1485 * TCPA - Trusted Computing Platform Alliance table
1487 ******************************************************************************/
1489 ACPI_DMTABLE_INFO AcpiDmTableInfoTcpa[] =
1491 {ACPI_DMT_UINT16, ACPI_TCPA_OFFSET (Reserved), "Reserved", 0},
1492 {ACPI_DMT_UINT32, ACPI_TCPA_OFFSET (MaxLogLength), "Max Event Log Length", 0},
1493 {ACPI_DMT_UINT64, ACPI_TCPA_OFFSET (LogAddress), "Event Log Address", 0},
1498 /*******************************************************************************
1500 * UEFI - UEFI Boot optimization Table
1502 ******************************************************************************/
1504 ACPI_DMTABLE_INFO AcpiDmTableInfoUefi[] =
1506 {ACPI_DMT_UUID, ACPI_UEFI_OFFSET (Identifier[0]), "UUID Identifier", 0},
1507 {ACPI_DMT_UINT16, ACPI_UEFI_OFFSET (DataOffset), "Data Offset", 0},
1512 /*******************************************************************************
1514 * WAET - Windows ACPI Emulated devices Table
1516 ******************************************************************************/
1518 ACPI_DMTABLE_INFO AcpiDmTableInfoWaet[] =
1520 {ACPI_DMT_UINT32, ACPI_WAET_OFFSET (Flags), "Flags (decoded below)", DT_FLAG},
1521 {ACPI_DMT_FLAG0, ACPI_WAET_OFFSET (Flags), "RTC needs no INT ack", 0},
1522 {ACPI_DMT_FLAG1, ACPI_WAET_OFFSET (Flags), "PM timer, one read only", 0},
1527 /*******************************************************************************
1529 * WDAT - Watchdog Action Table
1531 ******************************************************************************/
1533 ACPI_DMTABLE_INFO AcpiDmTableInfoWdat[] =
1535 {ACPI_DMT_UINT32, ACPI_WDAT_OFFSET (HeaderLength), "Header Length", DT_LENGTH},
1536 {ACPI_DMT_UINT16, ACPI_WDAT_OFFSET (PciSegment), "PCI Segment", 0},
1537 {ACPI_DMT_UINT8, ACPI_WDAT_OFFSET (PciBus), "PCI Bus", 0},
1538 {ACPI_DMT_UINT8, ACPI_WDAT_OFFSET (PciDevice), "PCI Device", 0},
1539 {ACPI_DMT_UINT8, ACPI_WDAT_OFFSET (PciFunction), "PCI Function", 0},
1540 {ACPI_DMT_UINT24, ACPI_WDAT_OFFSET (Reserved[0]), "Reserved", 0},
1541 {ACPI_DMT_UINT32, ACPI_WDAT_OFFSET (TimerPeriod), "Timer Period", 0},
1542 {ACPI_DMT_UINT32, ACPI_WDAT_OFFSET (MaxCount), "Max Count", 0},
1543 {ACPI_DMT_UINT32, ACPI_WDAT_OFFSET (MinCount), "Min Count", 0},
1544 {ACPI_DMT_UINT8, ACPI_WDAT_OFFSET (Flags), "Flags (decoded below)", DT_FLAG},
1545 {ACPI_DMT_FLAG0, ACPI_WDAT_OFFSET (Flags), "Enabled", 0},
1546 {ACPI_DMT_FLAG7, ACPI_WDAT_OFFSET (Flags), "Stopped When Asleep", 0},
1547 {ACPI_DMT_UINT24, ACPI_WDAT_OFFSET (Reserved2[0]), "Reserved", 0},
1548 {ACPI_DMT_UINT32, ACPI_WDAT_OFFSET (Entries), "Watchdog Entry Count", 0},
1552 /* WDAT Subtables - Watchdog Instruction Entries */
1554 ACPI_DMTABLE_INFO AcpiDmTableInfoWdat0[] =
1556 {ACPI_DMT_UINT8, ACPI_WDAT0_OFFSET (Action), "Watchdog Action", 0},
1557 {ACPI_DMT_UINT8, ACPI_WDAT0_OFFSET (Instruction), "Instruction", 0},
1558 {ACPI_DMT_UINT16, ACPI_WDAT0_OFFSET (Reserved), "Reserved", 0},
1559 {ACPI_DMT_GAS, ACPI_WDAT0_OFFSET (RegisterRegion), "Register Region", 0},
1560 {ACPI_DMT_UINT32, ACPI_WDAT0_OFFSET (Value), "Value", 0},
1561 {ACPI_DMT_UINT32, ACPI_WDAT0_OFFSET (Mask), "Register Mask", 0},
1566 /*******************************************************************************
1568 * WDDT - Watchdog Description Table
1570 ******************************************************************************/
1572 ACPI_DMTABLE_INFO AcpiDmTableInfoWddt[] =
1574 {ACPI_DMT_UINT16, ACPI_WDDT_OFFSET (SpecVersion), "Specification Version", 0},
1575 {ACPI_DMT_UINT16, ACPI_WDDT_OFFSET (TableVersion), "Table Version", 0},
1576 {ACPI_DMT_UINT16, ACPI_WDDT_OFFSET (PciVendorId), "PCI Vendor ID", 0},
1577 {ACPI_DMT_GAS, ACPI_WDDT_OFFSET (Address), "Timer Register", 0},
1578 {ACPI_DMT_UINT16, ACPI_WDDT_OFFSET (MaxCount), "Max Count", 0},
1579 {ACPI_DMT_UINT16, ACPI_WDDT_OFFSET (MinCount), "Min Count", 0},
1580 {ACPI_DMT_UINT16, ACPI_WDDT_OFFSET (Period), "Period", 0},
1581 {ACPI_DMT_UINT16, ACPI_WDDT_OFFSET (Status), "Status (decoded below)", 0},
1583 /* Status Flags byte 0 */
1585 {ACPI_DMT_FLAG0, ACPI_WDDT_FLAG_OFFSET (Status,0), "Available", 0},
1586 {ACPI_DMT_FLAG1, ACPI_WDDT_FLAG_OFFSET (Status,0), "Active", 0},
1587 {ACPI_DMT_FLAG2, ACPI_WDDT_FLAG_OFFSET (Status,0), "OS Owns", 0},
1589 /* Status Flags byte 1 */
1591 {ACPI_DMT_FLAG3, ACPI_WDDT_FLAG_OFFSET (Status,1), "User Reset", 0},
1592 {ACPI_DMT_FLAG4, ACPI_WDDT_FLAG_OFFSET (Status,1), "Timeout Reset", 0},
1593 {ACPI_DMT_FLAG5, ACPI_WDDT_FLAG_OFFSET (Status,1), "Power Fail Reset", 0},
1594 {ACPI_DMT_FLAG6, ACPI_WDDT_FLAG_OFFSET (Status,1), "Unknown Reset", 0},
1596 {ACPI_DMT_UINT16, ACPI_WDDT_OFFSET (Capability), "Capability (decoded below)", 0},
1598 /* Capability Flags byte 0 */
1600 {ACPI_DMT_FLAG0, ACPI_WDDT_FLAG_OFFSET (Capability,0), "Auto Reset", 0},
1601 {ACPI_DMT_FLAG1, ACPI_WDDT_FLAG_OFFSET (Capability,0), "Timeout Alert", 0},
1606 /*******************************************************************************
1608 * WDRT - Watchdog Resource Table
1610 ******************************************************************************/
1612 ACPI_DMTABLE_INFO AcpiDmTableInfoWdrt[] =
1614 {ACPI_DMT_GAS, ACPI_WDRT_OFFSET (ControlRegister), "Control Register", 0},
1615 {ACPI_DMT_GAS, ACPI_WDRT_OFFSET (CountRegister), "Count Register", 0},
1616 {ACPI_DMT_UINT16, ACPI_WDRT_OFFSET (PciDeviceId), "PCI Device ID", 0},
1617 {ACPI_DMT_UINT16, ACPI_WDRT_OFFSET (PciVendorId), "PCI Vendor ID", 0},
1618 {ACPI_DMT_UINT8, ACPI_WDRT_OFFSET (PciBus), "PCI Bus", 0},
1619 {ACPI_DMT_UINT8, ACPI_WDRT_OFFSET (PciDevice), "PCI Device", 0},
1620 {ACPI_DMT_UINT8, ACPI_WDRT_OFFSET (PciFunction), "PCI Function", 0},
1621 {ACPI_DMT_UINT8, ACPI_WDRT_OFFSET (PciSegment), "PCI Segment", 0},
1622 {ACPI_DMT_UINT16, ACPI_WDRT_OFFSET (MaxCount), "Max Count", 0},
1623 {ACPI_DMT_UINT8, ACPI_WDRT_OFFSET (Units), "Counter Units", 0},
1628 * Generic types (used in UEFI)
1632 * Buffer : cc 04 ff bb
1637 * UINT56 : 11223344556677
1638 * UINT64 : 1122334455667788
1640 * String : "This is string"
1641 * Unicode : "This string encoded to Unicode"
1643 * GUID : 11223344-5566-7788-99aa-bbccddeeff00
1644 * DevicePath : "\PciRoot(0)\Pci(0x1f,1)\Usb(0,0)"
1647 #define ACPI_DM_GENERIC_ENTRY(FieldType, FieldName)\
1648 {{FieldType, 0, FieldName, 0}, ACPI_DMT_TERMINATOR}
1650 ACPI_DMTABLE_INFO AcpiDmTableInfoGeneric[][2] =
1652 ACPI_DM_GENERIC_ENTRY (ACPI_DMT_UINT8, "UINT8"),
1653 ACPI_DM_GENERIC_ENTRY (ACPI_DMT_UINT16, "UINT16"),
1654 ACPI_DM_GENERIC_ENTRY (ACPI_DMT_UINT24, "UINT24"),
1655 ACPI_DM_GENERIC_ENTRY (ACPI_DMT_UINT32, "UINT32"),
1656 ACPI_DM_GENERIC_ENTRY (ACPI_DMT_UINT56, "UINT56"),
1657 ACPI_DM_GENERIC_ENTRY (ACPI_DMT_UINT64, "UINT64"),
1658 ACPI_DM_GENERIC_ENTRY (ACPI_DMT_STRING, "String"),
1659 ACPI_DM_GENERIC_ENTRY (ACPI_DMT_UNICODE, "Unicode"),
1660 ACPI_DM_GENERIC_ENTRY (ACPI_DMT_BUFFER, "Buffer"),
1661 ACPI_DM_GENERIC_ENTRY (ACPI_DMT_UUID, "GUID"),
1662 ACPI_DM_GENERIC_ENTRY (ACPI_DMT_STRING, "DevicePath"),
1663 ACPI_DM_GENERIC_ENTRY (ACPI_DMT_LABEL, "Label"),
1664 {ACPI_DMT_TERMINATOR}