2 * Copyright (c) 2013 Cedric GROSS <c.gross@kreiz-it.fr>
3 * Copyright (c) 2011 Intel Corporation
4 * Copyright (c) 2007-2009
5 * Damien Bergamini <damien.bergamini@free.fr>
7 * Benjamin Close <benjsc@FreeBSD.org>
8 * Copyright (c) 2008 Sam Leffler, Errno Consulting
10 * Permission to use, copy, modify, and distribute this software for any
11 * purpose with or without fee is hereby granted, provided that the above
12 * copyright notice and this permission notice appear in all copies.
14 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
15 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
16 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
17 * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
18 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
19 * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
20 * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
22 * $FreeBSD: head/sys/dev/iwn/if_iwn.c 258118 2013-11-14 07:27:00Z adrian $
26 * Driver for Intel WiFi Link 4965 and 1000/5000/6000 Series 802.11 network
33 #include <sys/param.h>
34 #include <sys/sockio.h>
35 #include <sys/sysctl.h>
37 #include <sys/kernel.h>
38 #include <sys/socket.h>
39 #include <sys/systm.h>
40 #include <sys/malloc.h>
41 #include <sys/stdbool.h>
44 #include <sys/endian.h>
45 #include <sys/firmware.h>
46 #include <sys/limits.h>
47 #include <sys/module.h>
48 #include <sys/queue.h>
49 #include <sys/taskqueue.h>
50 #include <sys/libkern.h>
52 #include <sys/resource.h>
53 #include <machine/clock.h>
55 #include <bus/pci/pcireg.h>
56 #include <bus/pci/pcivar.h>
60 #include <net/if_var.h>
61 #include <net/if_arp.h>
62 #include <net/ifq_var.h>
63 #include <net/ethernet.h>
64 #include <net/if_dl.h>
65 #include <net/if_media.h>
66 #include <net/if_types.h>
68 #include <netinet/in.h>
69 #include <netinet/in_systm.h>
70 #include <netinet/in_var.h>
71 #include <netinet/if_ether.h>
72 #include <netinet/ip.h>
74 #include <netproto/802_11/ieee80211_var.h>
75 #include <netproto/802_11/ieee80211_radiotap.h>
76 #include <netproto/802_11/ieee80211_regdomain.h>
77 #include <netproto/802_11/ieee80211_ratectl.h>
79 #include "if_iwnreg.h"
80 #include "if_iwnvar.h"
81 #include "if_iwn_devid.h"
82 #include "if_iwn_chip_cfg.h"
83 #include "if_iwn_debug.h"
85 #define nitems(ary) (sizeof(ary) / sizeof((ary)[0]))
93 static const struct iwn_ident iwn_ident_table[] = {
94 { 0x8086, IWN_DID_6x05_1, "Intel Centrino Advanced-N 6205" },
95 { 0x8086, IWN_DID_1000_1, "Intel Centrino Wireless-N 1000" },
96 { 0x8086, IWN_DID_1000_2, "Intel Centrino Wireless-N 1000" },
97 { 0x8086, IWN_DID_6x05_2, "Intel Centrino Advanced-N 6205" },
98 { 0x8086, IWN_DID_6050_1, "Intel Centrino Advanced-N + WiMAX 6250" },
99 { 0x8086, IWN_DID_6050_2, "Intel Centrino Advanced-N + WiMAX 6250" },
100 { 0x8086, IWN_DID_x030_1, "Intel Centrino Wireless-N 1030" },
101 { 0x8086, IWN_DID_x030_2, "Intel Centrino Wireless-N 1030" },
102 { 0x8086, IWN_DID_x030_3, "Intel Centrino Advanced-N 6230" },
103 { 0x8086, IWN_DID_x030_4, "Intel Centrino Advanced-N 6230" },
104 { 0x8086, IWN_DID_6150_1, "Intel Centrino Wireless-N + WiMAX 6150" },
105 { 0x8086, IWN_DID_6150_2, "Intel Centrino Wireless-N + WiMAX 6150" },
106 { 0x8086, IWN_DID_2x00_1, "Intel(R) Centrino(R) Wireless-N 2200 BGN" },
107 { 0x8086, IWN_DID_2x00_2, "Intel(R) Centrino(R) Wireless-N 2200 BGN" },
108 /* XXX 2200D is IWN_SDID_2x00_4; there's no way to express this here! */
109 { 0x8086, IWN_DID_2x30_1, "Intel Centrino Wireless-N 2230" },
110 { 0x8086, IWN_DID_2x30_2, "Intel Centrino Wireless-N 2230" },
111 { 0x8086, IWN_DID_130_1, "Intel Centrino Wireless-N 130" },
112 { 0x8086, IWN_DID_130_2, "Intel Centrino Wireless-N 130" },
113 { 0x8086, IWN_DID_100_1, "Intel Centrino Wireless-N 100" },
114 { 0x8086, IWN_DID_100_2, "Intel Centrino Wireless-N 100" },
115 { 0x8086, IWN_DID_4965_1, "Intel Wireless WiFi Link 4965" },
116 { 0x8086, IWN_DID_6x00_1, "Intel Centrino Ultimate-N 6300" },
117 { 0x8086, IWN_DID_6x00_2, "Intel Centrino Advanced-N 6200" },
118 { 0x8086, IWN_DID_4965_2, "Intel Wireless WiFi Link 4965" },
119 { 0x8086, IWN_DID_4965_3, "Intel Wireless WiFi Link 4965" },
120 { 0x8086, IWN_DID_5x00_1, "Intel WiFi Link 5100" },
121 { 0x8086, IWN_DID_4965_4, "Intel Wireless WiFi Link 4965" },
122 { 0x8086, IWN_DID_5x00_3, "Intel Ultimate N WiFi Link 5300" },
123 { 0x8086, IWN_DID_5x00_4, "Intel Ultimate N WiFi Link 5300" },
124 { 0x8086, IWN_DID_5x00_2, "Intel WiFi Link 5100" },
125 { 0x8086, IWN_DID_6x00_3, "Intel Centrino Ultimate-N 6300" },
126 { 0x8086, IWN_DID_6x00_4, "Intel Centrino Advanced-N 6200" },
127 { 0x8086, IWN_DID_5x50_1, "Intel WiMAX/WiFi Link 5350" },
128 { 0x8086, IWN_DID_5x50_2, "Intel WiMAX/WiFi Link 5350" },
129 { 0x8086, IWN_DID_5x50_3, "Intel WiMAX/WiFi Link 5150" },
130 { 0x8086, IWN_DID_5x50_4, "Intel WiMAX/WiFi Link 5150" },
132 * These currently don't function; the firmware crashes during
133 * the startup calibration request.
136 { 0x8086, IWN_DID_6035_1, "Intel Centrino Advanced 6235" },
137 /* XXX TODO: figure out which ID this one is? */
138 { 0x8086, IWN_DID_6035_2, "Intel Centrino Advanced 6235" },
143 static int iwn_pci_probe(device_t);
144 static int iwn_pci_attach(device_t);
145 static int iwn4965_attach(struct iwn_softc *, uint16_t);
146 static int iwn5000_attach(struct iwn_softc *, uint16_t);
147 static int iwn_config_specific(struct iwn_softc *, uint16_t);
148 static void iwn_radiotap_attach(struct iwn_softc *);
149 static void iwn_sysctlattach(struct iwn_softc *);
150 static struct ieee80211vap *iwn_vap_create(struct ieee80211com *,
151 const char [IFNAMSIZ], int, enum ieee80211_opmode, int,
152 const uint8_t [IEEE80211_ADDR_LEN],
153 const uint8_t [IEEE80211_ADDR_LEN]);
154 static void iwn_vap_delete(struct ieee80211vap *);
155 static int iwn_pci_detach(device_t);
156 static int iwn_pci_shutdown(device_t);
157 static int iwn_pci_suspend(device_t);
158 static int iwn_pci_resume(device_t);
159 static int iwn_nic_lock(struct iwn_softc *);
160 static int iwn_eeprom_lock(struct iwn_softc *);
161 static int iwn_init_otprom(struct iwn_softc *);
162 static int iwn_read_prom_data(struct iwn_softc *, uint32_t, void *, int);
163 static void iwn_dma_map_addr(void *, bus_dma_segment_t *, int, int);
164 static int iwn_dma_contig_alloc(struct iwn_softc *, struct iwn_dma_info *,
165 void **, bus_size_t, bus_size_t);
166 static void iwn_dma_contig_free(struct iwn_dma_info *);
167 static int iwn_alloc_sched(struct iwn_softc *);
168 static void iwn_free_sched(struct iwn_softc *);
169 static int iwn_alloc_kw(struct iwn_softc *);
170 static void iwn_free_kw(struct iwn_softc *);
171 static int iwn_alloc_ict(struct iwn_softc *);
172 static void iwn_free_ict(struct iwn_softc *);
173 static int iwn_alloc_fwmem(struct iwn_softc *);
174 static void iwn_free_fwmem(struct iwn_softc *);
175 static int iwn_alloc_rx_ring(struct iwn_softc *, struct iwn_rx_ring *);
176 static void iwn_reset_rx_ring(struct iwn_softc *, struct iwn_rx_ring *);
177 static void iwn_free_rx_ring(struct iwn_softc *, struct iwn_rx_ring *);
178 static int iwn_alloc_tx_ring(struct iwn_softc *, struct iwn_tx_ring *,
180 static void iwn_reset_tx_ring(struct iwn_softc *, struct iwn_tx_ring *);
181 static void iwn_free_tx_ring(struct iwn_softc *, struct iwn_tx_ring *);
182 static void iwn5000_ict_reset(struct iwn_softc *);
183 static int iwn_read_eeprom(struct iwn_softc *,
184 uint8_t macaddr[IEEE80211_ADDR_LEN]);
185 static void iwn4965_read_eeprom(struct iwn_softc *);
187 static void iwn4965_print_power_group(struct iwn_softc *, int);
189 static void iwn5000_read_eeprom(struct iwn_softc *);
190 static uint32_t iwn_eeprom_channel_flags(struct iwn_eeprom_chan *);
191 static void iwn_read_eeprom_band(struct iwn_softc *, int);
192 static void iwn_read_eeprom_ht40(struct iwn_softc *, int);
193 static void iwn_read_eeprom_channels(struct iwn_softc *, int, uint32_t);
194 static struct iwn_eeprom_chan *iwn_find_eeprom_channel(struct iwn_softc *,
195 struct ieee80211_channel *);
196 static int iwn_setregdomain(struct ieee80211com *,
197 struct ieee80211_regdomain *, int,
198 struct ieee80211_channel[]);
199 static void iwn_read_eeprom_enhinfo(struct iwn_softc *);
200 static struct ieee80211_node *iwn_node_alloc(struct ieee80211vap *,
201 const uint8_t mac[IEEE80211_ADDR_LEN]);
202 static void iwn_newassoc(struct ieee80211_node *, int);
203 static int iwn_media_change(struct ifnet *);
204 static int iwn_newstate(struct ieee80211vap *, enum ieee80211_state, int);
205 static void iwn_calib_timeout(void *);
206 static void iwn_rx_phy(struct iwn_softc *, struct iwn_rx_desc *,
207 struct iwn_rx_data *);
208 static void iwn_rx_done(struct iwn_softc *, struct iwn_rx_desc *,
209 struct iwn_rx_data *);
210 static void iwn_rx_compressed_ba(struct iwn_softc *, struct iwn_rx_desc *,
211 struct iwn_rx_data *);
212 static void iwn5000_rx_calib_results(struct iwn_softc *,
213 struct iwn_rx_desc *, struct iwn_rx_data *);
214 static void iwn_rx_statistics(struct iwn_softc *, struct iwn_rx_desc *,
215 struct iwn_rx_data *);
216 static void iwn4965_tx_done(struct iwn_softc *, struct iwn_rx_desc *,
217 struct iwn_rx_data *);
218 static void iwn5000_tx_done(struct iwn_softc *, struct iwn_rx_desc *,
219 struct iwn_rx_data *);
220 static void iwn_tx_done(struct iwn_softc *, struct iwn_rx_desc *, int,
222 static void iwn_ampdu_tx_done(struct iwn_softc *, int, int, int, void *);
223 static void iwn_cmd_done(struct iwn_softc *, struct iwn_rx_desc *);
224 static void iwn_notif_intr(struct iwn_softc *);
225 static void iwn_wakeup_intr(struct iwn_softc *);
226 static void iwn_rftoggle_intr(struct iwn_softc *);
227 static void iwn_fatal_intr(struct iwn_softc *);
228 static void iwn_intr(void *);
229 static void iwn4965_update_sched(struct iwn_softc *, int, int, uint8_t,
231 static void iwn5000_update_sched(struct iwn_softc *, int, int, uint8_t,
234 static void iwn5000_reset_sched(struct iwn_softc *, int, int);
236 static int iwn_tx_data(struct iwn_softc *, struct mbuf *,
237 struct ieee80211_node *);
238 static int iwn_tx_data_raw(struct iwn_softc *, struct mbuf *,
239 struct ieee80211_node *,
240 const struct ieee80211_bpf_params *params);
241 static int iwn_raw_xmit(struct ieee80211_node *, struct mbuf *,
242 const struct ieee80211_bpf_params *);
243 static void iwn_start(struct ifnet *, struct ifaltq_subque *);
244 static void iwn_start_locked(struct ifnet *);
245 static void iwn_watchdog_timeout(void *);
246 static int iwn_ioctl(struct ifnet *, u_long, caddr_t, struct ucred *);
247 static int iwn_cmd(struct iwn_softc *, int, const void *, int, int);
248 static int iwn4965_add_node(struct iwn_softc *, struct iwn_node_info *,
250 static int iwn5000_add_node(struct iwn_softc *, struct iwn_node_info *,
252 static int iwn_set_link_quality(struct iwn_softc *,
253 struct ieee80211_node *);
254 static int iwn_add_broadcast_node(struct iwn_softc *, int);
255 static int iwn_updateedca(struct ieee80211com *);
256 static void iwn_update_mcast(struct ifnet *);
257 static void iwn_set_led(struct iwn_softc *, uint8_t, uint8_t, uint8_t);
258 static int iwn_set_critical_temp(struct iwn_softc *);
259 static int iwn_set_timing(struct iwn_softc *, struct ieee80211_node *);
260 static void iwn4965_power_calibration(struct iwn_softc *, int);
261 static int iwn4965_set_txpower(struct iwn_softc *,
262 struct ieee80211_channel *, int);
263 static int iwn5000_set_txpower(struct iwn_softc *,
264 struct ieee80211_channel *, int);
265 static int iwn4965_get_rssi(struct iwn_softc *, struct iwn_rx_stat *);
266 static int iwn5000_get_rssi(struct iwn_softc *, struct iwn_rx_stat *);
267 static int iwn_get_noise(const struct iwn_rx_general_stats *);
268 static int iwn4965_get_temperature(struct iwn_softc *);
269 static int iwn5000_get_temperature(struct iwn_softc *);
270 static int iwn_init_sensitivity(struct iwn_softc *);
271 static void iwn_collect_noise(struct iwn_softc *,
272 const struct iwn_rx_general_stats *);
273 static int iwn4965_init_gains(struct iwn_softc *);
274 static int iwn5000_init_gains(struct iwn_softc *);
275 static int iwn4965_set_gains(struct iwn_softc *);
276 static int iwn5000_set_gains(struct iwn_softc *);
277 static void iwn_tune_sensitivity(struct iwn_softc *,
278 const struct iwn_rx_stats *);
279 static int iwn_send_sensitivity(struct iwn_softc *);
280 static int iwn_set_pslevel(struct iwn_softc *, int, int, int);
281 static int iwn_send_btcoex(struct iwn_softc *);
282 static int iwn_send_advanced_btcoex(struct iwn_softc *);
283 static int iwn5000_runtime_calib(struct iwn_softc *);
284 static int iwn_config(struct iwn_softc *);
285 static uint8_t *ieee80211_add_ssid(uint8_t *, const uint8_t *, u_int);
286 static int iwn_scan(struct iwn_softc *);
287 static int iwn_auth(struct iwn_softc *, struct ieee80211vap *vap);
288 static int iwn_run(struct iwn_softc *, struct ieee80211vap *vap);
289 static int iwn_ampdu_rx_start(struct ieee80211_node *,
290 struct ieee80211_rx_ampdu *, int, int, int);
291 static void iwn_ampdu_rx_stop(struct ieee80211_node *,
292 struct ieee80211_rx_ampdu *);
293 static int iwn_addba_request(struct ieee80211_node *,
294 struct ieee80211_tx_ampdu *, int, int, int);
295 static int iwn_addba_response(struct ieee80211_node *,
296 struct ieee80211_tx_ampdu *, int, int, int);
297 static int iwn_ampdu_tx_start(struct ieee80211com *,
298 struct ieee80211_node *, uint8_t);
299 static void iwn_ampdu_tx_stop(struct ieee80211_node *,
300 struct ieee80211_tx_ampdu *);
301 static void iwn4965_ampdu_tx_start(struct iwn_softc *,
302 struct ieee80211_node *, int, uint8_t, uint16_t);
303 static void iwn4965_ampdu_tx_stop(struct iwn_softc *, int,
305 static void iwn5000_ampdu_tx_start(struct iwn_softc *,
306 struct ieee80211_node *, int, uint8_t, uint16_t);
307 static void iwn5000_ampdu_tx_stop(struct iwn_softc *, int,
309 static int iwn5000_query_calibration(struct iwn_softc *);
310 static int iwn5000_send_calibration(struct iwn_softc *);
311 static int iwn5000_send_wimax_coex(struct iwn_softc *);
312 static int iwn5000_crystal_calib(struct iwn_softc *);
313 static int iwn5000_temp_offset_calib(struct iwn_softc *);
314 static int iwn5000_temp_offset_calibv2(struct iwn_softc *);
315 static int iwn4965_post_alive(struct iwn_softc *);
316 static int iwn5000_post_alive(struct iwn_softc *);
317 static int iwn4965_load_bootcode(struct iwn_softc *, const uint8_t *,
319 static int iwn4965_load_firmware(struct iwn_softc *);
320 static int iwn5000_load_firmware_section(struct iwn_softc *, uint32_t,
321 const uint8_t *, int);
322 static int iwn5000_load_firmware(struct iwn_softc *);
323 static int iwn_read_firmware_leg(struct iwn_softc *,
324 struct iwn_fw_info *);
325 static int iwn_read_firmware_tlv(struct iwn_softc *,
326 struct iwn_fw_info *, uint16_t);
327 static int iwn_read_firmware(struct iwn_softc *);
328 static int iwn_clock_wait(struct iwn_softc *);
329 static int iwn_apm_init(struct iwn_softc *);
330 static void iwn_apm_stop_master(struct iwn_softc *);
331 static void iwn_apm_stop(struct iwn_softc *);
332 static int iwn4965_nic_config(struct iwn_softc *);
333 static int iwn5000_nic_config(struct iwn_softc *);
334 static int iwn_hw_prepare(struct iwn_softc *);
335 static int iwn_hw_init(struct iwn_softc *);
336 static void iwn_hw_stop(struct iwn_softc *);
337 static void iwn_radio_on_task(void *, int);
338 static void iwn_radio_off_task(void *, int);
339 static void iwn_init_locked(struct iwn_softc *);
340 static void iwn_init(void *);
341 static void iwn_stop_locked(struct iwn_softc *);
342 static void iwn_stop(struct iwn_softc *);
343 static void iwn_scan_start(struct ieee80211com *);
344 static void iwn_scan_end(struct ieee80211com *);
345 static void iwn_set_channel(struct ieee80211com *);
346 static void iwn_scan_curchan(struct ieee80211_scan_state *, unsigned long);
347 static void iwn_scan_mindwell(struct ieee80211_scan_state *);
348 static void iwn_hw_reset_task(void *, int);
350 static char *iwn_get_csr_string(int);
351 static void iwn_debug_register(struct iwn_softc *);
354 static device_method_t iwn_methods[] = {
355 /* Device interface */
356 DEVMETHOD(device_probe, iwn_pci_probe),
357 DEVMETHOD(device_attach, iwn_pci_attach),
358 DEVMETHOD(device_detach, iwn_pci_detach),
359 DEVMETHOD(device_shutdown, iwn_pci_shutdown),
360 DEVMETHOD(device_suspend, iwn_pci_suspend),
361 DEVMETHOD(device_resume, iwn_pci_resume),
365 static driver_t iwn_driver = {
368 sizeof(struct iwn_softc)
370 static devclass_t iwn_devclass;
372 DRIVER_MODULE(iwn, pci, iwn_driver, iwn_devclass, NULL, NULL);
374 MODULE_VERSION(iwn, 1);
376 MODULE_DEPEND(iwn, firmware, 1, 1, 1);
377 MODULE_DEPEND(iwn, pci, 1, 1, 1);
378 MODULE_DEPEND(iwn, wlan, 1, 1, 1);
379 MODULE_DEPEND(iwn, wlan_amrr, 1, 1, 1);
382 iwn_pci_probe(device_t dev)
384 const struct iwn_ident *ident;
386 /* no wlan serializer needed */
387 for (ident = iwn_ident_table; ident->name != NULL; ident++) {
388 if (pci_get_vendor(dev) == ident->vendor &&
389 pci_get_device(dev) == ident->device) {
390 device_set_desc(dev, ident->name);
398 iwn_pci_attach(device_t dev)
400 struct iwn_softc *sc = (struct iwn_softc *)device_get_softc(dev);
401 struct ieee80211com *ic;
408 uint8_t macaddr[IEEE80211_ADDR_LEN];
409 char ethstr[ETHER_ADDRSTRLEN + 1];
411 wlan_serialize_enter();
416 if (bus_dma_tag_create(sc->sc_dmat,
418 BUS_SPACE_MAXADDR_32BIT,
426 device_printf(dev, "cannot allocate DMA tag\n");
431 /* prepare sysctl tree for use in sub modules */
432 sysctl_ctx_init(&sc->sc_sysctl_ctx);
433 sc->sc_sysctl_tree = SYSCTL_ADD_NODE(&sc->sc_sysctl_ctx,
434 SYSCTL_STATIC_CHILDREN(_hw),
436 device_get_nameunit(sc->sc_dev),
440 error = resource_int_value(device_get_name(sc->sc_dev),
441 device_get_unit(sc->sc_dev), "debug", &(sc->sc_debug));
448 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s: begin\n",__func__);
451 * Get the offset of the PCI Express Capability Structure in PCI
452 * Configuration Space.
454 error = pci_find_extcap(dev, PCIY_EXPRESS, &sc->sc_cap_off);
456 device_printf(dev, "PCIe capability structure not found!\n");
460 /* Clear device-specific "PCI retry timeout" register (41h). */
461 pci_write_config(dev, 0x41, 0, 1);
463 /* Hardware bug workaround. */
464 reg = pci_read_config(dev, PCIR_COMMAND, 2);
465 if (reg & PCIM_CMD_INTxDIS) {
466 DPRINTF(sc, IWN_DEBUG_RESET, "%s: PCIe INTx Disable set\n",
468 reg &= ~PCIM_CMD_INTxDIS;
469 pci_write_config(dev, PCIR_COMMAND, reg, 2);
472 /* Enable bus-mastering. */
473 pci_enable_busmaster(dev);
475 sc->mem_rid = PCIR_BAR(0);
476 sc->mem = bus_alloc_resource_any(dev, SYS_RES_MEMORY, &sc->mem_rid,
478 if (sc->mem == NULL) {
479 device_printf(dev, "can't map mem space\n");
483 sc->sc_st = rman_get_bustag(sc->mem);
484 sc->sc_sh = rman_get_bushandle(sc->mem);
488 if ((result = pci_msi_count(dev)) == 1 &&
489 pci_alloc_msi(dev, &result) == 0)
492 /* Install interrupt handler. */
493 sc->irq = bus_alloc_resource_any(dev, SYS_RES_IRQ, &sc->irq_rid,
494 RF_ACTIVE | RF_SHAREABLE);
495 if (sc->irq == NULL) {
496 device_printf(dev, "can't map interrupt\n");
501 /* Read hardware revision and attach. */
502 sc->hw_type = (IWN_READ(sc, IWN_HW_REV) >> IWN_HW_REV_TYPE_SHIFT)
503 & IWN_HW_REV_TYPE_MASK;
504 sc->subdevice_id = pci_get_subdevice(dev);
507 * 4965 versus 5000 and later have different methods.
508 * Let's set those up first.
510 if (sc->hw_type == IWN_HW_REV_TYPE_4965)
511 error = iwn4965_attach(sc, pci_get_device(dev));
513 error = iwn5000_attach(sc, pci_get_device(dev));
515 device_printf(dev, "could not attach device, error %d\n",
521 * Next, let's setup the various parameters of each NIC.
523 error = iwn_config_specific(sc, pci_get_device(dev));
525 device_printf(dev, "could not attach device, error %d\n",
530 if ((error = iwn_hw_prepare(sc)) != 0) {
531 device_printf(dev, "hardware not ready, error %d\n", error);
535 /* Allocate DMA memory for firmware transfers. */
536 if ((error = iwn_alloc_fwmem(sc)) != 0) {
538 "could not allocate memory for firmware, error %d\n",
543 /* Allocate "Keep Warm" page. */
544 if ((error = iwn_alloc_kw(sc)) != 0) {
546 "could not allocate keep warm page, error %d\n", error);
550 /* Allocate ICT table for 5000 Series. */
551 if (sc->hw_type != IWN_HW_REV_TYPE_4965 &&
552 (error = iwn_alloc_ict(sc)) != 0) {
553 device_printf(dev, "could not allocate ICT table, error %d\n",
558 /* Allocate TX scheduler "rings". */
559 if ((error = iwn_alloc_sched(sc)) != 0) {
561 "could not allocate TX scheduler rings, error %d\n", error);
565 /* Allocate TX rings (16 on 4965AGN, 20 on >=5000). */
566 for (i = 0; i < sc->ntxqs; i++) {
567 if ((error = iwn_alloc_tx_ring(sc, &sc->txq[i], i)) != 0) {
569 "could not allocate TX ring %d, error %d\n", i,
575 /* Allocate RX ring. */
576 if ((error = iwn_alloc_rx_ring(sc, &sc->rxq)) != 0) {
577 device_printf(dev, "could not allocate RX ring, error %d\n",
582 /* Clear pending interrupts. */
583 IWN_WRITE(sc, IWN_INT, 0xffffffff);
585 ifp = sc->sc_ifp = if_alloc(IFT_IEEE80211);
587 device_printf(dev, "can not allocate ifnet structure\n");
593 ic->ic_phytype = IEEE80211_T_OFDM; /* not only, but not used */
594 ic->ic_opmode = IEEE80211_M_STA; /* default to BSS mode */
596 /* Set device capabilities. */
598 IEEE80211_C_STA /* station mode supported */
599 | IEEE80211_C_MONITOR /* monitor mode supported */
600 | IEEE80211_C_BGSCAN /* background scanning */
601 | IEEE80211_C_TXPMGT /* tx power management */
602 | IEEE80211_C_SHSLOT /* short slot time supported */
604 | IEEE80211_C_SHPREAMBLE /* short preamble supported */
606 | IEEE80211_C_IBSS /* ibss/adhoc mode */
608 | IEEE80211_C_WME /* WME */
609 | IEEE80211_C_PMGT /* Station-side power mgmt */
612 /* Read MAC address, channels, etc from EEPROM. */
613 if ((error = iwn_read_eeprom(sc, macaddr)) != 0) {
614 device_printf(dev, "could not read EEPROM, error %d\n",
619 /* Count the number of available chains. */
621 ((sc->txchainmask >> 2) & 1) +
622 ((sc->txchainmask >> 1) & 1) +
623 ((sc->txchainmask >> 0) & 1);
625 ((sc->rxchainmask >> 2) & 1) +
626 ((sc->rxchainmask >> 1) & 1) +
627 ((sc->rxchainmask >> 0) & 1);
629 device_printf(dev, "MIMO %dT%dR, %.4s, address %s\n",
630 sc->ntxchains, sc->nrxchains, sc->eeprom_domain,
631 kether_ntoa(macaddr, ethstr));
634 if (sc->sc_flags & IWN_FLAG_HAS_11N) {
636 ic->ic_rxstream = sc->nrxchains;
637 ic->ic_txstream = sc->ntxchains;
641 * The NICs we currently support cap out at 2x2 support
642 * separate from the chains being used.
644 * This is a total hack to work around that until some
645 * per-device method is implemented to return the
646 * actual stream support.
648 * XXX Note: the 5350 is a 3x3 device; so we shouldn't
649 * cap this! But, anything that touches rates in the
650 * driver needs to be audited first before 3x3 is enabled.
653 if (ic->ic_rxstream > 2)
655 if (ic->ic_txstream > 2)
660 IEEE80211_HTCAP_SMPS_OFF /* SMPS mode disabled */
661 | IEEE80211_HTCAP_SHORTGI20 /* short GI in 20MHz */
662 | IEEE80211_HTCAP_CHWIDTH40 /* 40MHz channel width*/
663 | IEEE80211_HTCAP_SHORTGI40 /* short GI in 40MHz */
665 | IEEE80211_HTCAP_GREENFIELD
666 #if IWN_RBUF_SIZE == 8192
667 | IEEE80211_HTCAP_MAXAMSDU_7935 /* max A-MSDU length */
669 | IEEE80211_HTCAP_MAXAMSDU_3839 /* max A-MSDU length */
672 /* s/w capabilities */
673 | IEEE80211_HTC_HT /* HT operation */
674 | IEEE80211_HTC_AMPDU /* tx A-MPDU */
676 | IEEE80211_HTC_AMSDU /* tx A-MSDU */
681 if_initname(ifp, device_get_name(dev), device_get_unit(dev));
683 ifp->if_flags = IFF_BROADCAST | IFF_SIMPLEX | IFF_MULTICAST;
684 ifp->if_init = iwn_init;
685 ifp->if_ioctl = iwn_ioctl;
686 ifp->if_start = iwn_start;
687 ifq_set_maxlen(&ifp->if_snd, IFQ_MAXLEN);
689 ifq_set_ready(&ifp->if_snd);
692 ieee80211_ifattach(ic, macaddr);
693 ic->ic_vap_create = iwn_vap_create;
694 ic->ic_vap_delete = iwn_vap_delete;
695 ic->ic_raw_xmit = iwn_raw_xmit;
696 ic->ic_node_alloc = iwn_node_alloc;
697 sc->sc_ampdu_rx_start = ic->ic_ampdu_rx_start;
698 ic->ic_ampdu_rx_start = iwn_ampdu_rx_start;
699 sc->sc_ampdu_rx_stop = ic->ic_ampdu_rx_stop;
700 ic->ic_ampdu_rx_stop = iwn_ampdu_rx_stop;
701 sc->sc_addba_request = ic->ic_addba_request;
702 ic->ic_addba_request = iwn_addba_request;
703 sc->sc_addba_response = ic->ic_addba_response;
704 ic->ic_addba_response = iwn_addba_response;
705 sc->sc_addba_stop = ic->ic_addba_stop;
706 ic->ic_addba_stop = iwn_ampdu_tx_stop;
707 ic->ic_newassoc = iwn_newassoc;
708 ic->ic_wme.wme_update = iwn_updateedca;
709 ic->ic_update_mcast = iwn_update_mcast;
710 ic->ic_scan_start = iwn_scan_start;
711 ic->ic_scan_end = iwn_scan_end;
712 ic->ic_set_channel = iwn_set_channel;
713 ic->ic_scan_curchan = iwn_scan_curchan;
714 ic->ic_scan_mindwell = iwn_scan_mindwell;
715 ic->ic_setregdomain = iwn_setregdomain;
717 iwn_radiotap_attach(sc);
719 callout_init(&sc->calib_to);
720 callout_init(&sc->watchdog_to);
721 TASK_INIT(&sc->sc_reinit_task, 0, iwn_hw_reset_task, sc);
722 TASK_INIT(&sc->sc_radioon_task, 0, iwn_radio_on_task, sc);
723 TASK_INIT(&sc->sc_radiooff_task, 0, iwn_radio_off_task, sc);
725 iwn_sysctlattach(sc);
728 * Hook our interrupt after all initialization is complete.
730 error = bus_setup_intr(dev, sc->irq, INTR_MPSAFE,
731 iwn_intr, sc, &sc->sc_ih,
732 &wlan_global_serializer);
734 device_printf(dev, "can't establish interrupt, error %d\n",
740 ieee80211_announce(ic);
741 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s: end\n",__func__);
742 wlan_serialize_exit();
745 wlan_serialize_exit();
747 wlan_serialize_enter();
749 wlan_serialize_exit();
750 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s: end in error\n",__func__);
755 * Define specific configuration based on device id and subdevice id
756 * pid : PCI device id
759 iwn_config_specific(struct iwn_softc *sc, uint16_t pid)
768 sc->base_params = &iwn4965_base_params;
769 sc->limits = &iwn4965_sensitivity_limits;
770 sc->fwname = "iwn4965fw";
771 /* Override chains masks, ROM is known to be broken. */
772 sc->txchainmask = IWN_ANT_AB;
773 sc->rxchainmask = IWN_ANT_ABC;
774 /* Enable normal btcoex */
775 sc->sc_flags |= IWN_FLAG_BTCOEX;
780 switch(sc->subdevice_id) {
781 case IWN_SDID_1000_1:
782 case IWN_SDID_1000_2:
783 case IWN_SDID_1000_3:
784 case IWN_SDID_1000_4:
785 case IWN_SDID_1000_5:
786 case IWN_SDID_1000_6:
787 case IWN_SDID_1000_7:
788 case IWN_SDID_1000_8:
789 case IWN_SDID_1000_9:
790 case IWN_SDID_1000_10:
791 case IWN_SDID_1000_11:
792 case IWN_SDID_1000_12:
793 sc->limits = &iwn1000_sensitivity_limits;
794 sc->base_params = &iwn1000_base_params;
795 sc->fwname = "iwn1000fw";
798 device_printf(sc->sc_dev, "adapter type id : 0x%04x sub id :"
799 "0x%04x rev %d not supported (subdevice)\n", pid,
800 sc->subdevice_id,sc->hw_type);
809 sc->fwname = "iwn6000fw";
810 sc->limits = &iwn6000_sensitivity_limits;
811 switch(sc->subdevice_id) {
812 case IWN_SDID_6x00_1:
813 case IWN_SDID_6x00_2:
814 case IWN_SDID_6x00_8:
816 sc->base_params = &iwn_6000_base_params;
818 case IWN_SDID_6x00_3:
819 case IWN_SDID_6x00_6:
820 case IWN_SDID_6x00_9:
822 case IWN_SDID_6x00_4:
823 case IWN_SDID_6x00_7:
824 case IWN_SDID_6x00_10:
826 case IWN_SDID_6x00_5:
828 sc->base_params = &iwn_6000i_base_params;
829 sc->sc_flags |= IWN_FLAG_INTERNAL_PA;
830 sc->txchainmask = IWN_ANT_BC;
831 sc->rxchainmask = IWN_ANT_BC;
834 device_printf(sc->sc_dev, "adapter type id : 0x%04x sub id :"
835 "0x%04x rev %d not supported (subdevice)\n", pid,
836 sc->subdevice_id,sc->hw_type);
843 switch(sc->subdevice_id) {
844 case IWN_SDID_6x05_1:
845 case IWN_SDID_6x05_4:
846 case IWN_SDID_6x05_6:
848 case IWN_SDID_6x05_2:
849 case IWN_SDID_6x05_5:
850 case IWN_SDID_6x05_7:
852 case IWN_SDID_6x05_3:
854 case IWN_SDID_6x05_8:
855 case IWN_SDID_6x05_9:
856 //iwl6005_2agn_sff_cfg
857 case IWN_SDID_6x05_10:
859 case IWN_SDID_6x05_11:
860 //iwl6005_2agn_mow1_cfg
861 case IWN_SDID_6x05_12:
862 //iwl6005_2agn_mow2_cfg
863 sc->fwname = "iwn6000g2afw";
864 sc->limits = &iwn6000_sensitivity_limits;
865 sc->base_params = &iwn_6000g2_base_params;
868 device_printf(sc->sc_dev, "adapter type id : 0x%04x sub id :"
869 "0x%04x rev %d not supported (subdevice)\n", pid,
870 sc->subdevice_id,sc->hw_type);
877 switch(sc->subdevice_id) {
878 case IWN_SDID_6035_1:
879 case IWN_SDID_6035_2:
880 case IWN_SDID_6035_3:
881 case IWN_SDID_6035_4:
882 sc->fwname = "iwn6000g2bfw";
883 sc->limits = &iwn6000_sensitivity_limits;
884 sc->base_params = &iwn_6000g2b_base_params;
887 device_printf(sc->sc_dev, "adapter type id : 0x%04x sub id :"
888 "0x%04x rev %d not supported (subdevice)\n", pid,
889 sc->subdevice_id,sc->hw_type);
893 /* 6x50 WiFi/WiMax Series */
896 switch(sc->subdevice_id) {
897 case IWN_SDID_6050_1:
898 case IWN_SDID_6050_3:
899 case IWN_SDID_6050_5:
901 case IWN_SDID_6050_2:
902 case IWN_SDID_6050_4:
903 case IWN_SDID_6050_6:
905 sc->fwname = "iwn6050fw";
906 sc->txchainmask = IWN_ANT_AB;
907 sc->rxchainmask = IWN_ANT_AB;
908 sc->limits = &iwn6000_sensitivity_limits;
909 sc->base_params = &iwn_6050_base_params;
912 device_printf(sc->sc_dev, "adapter type id : 0x%04x sub id :"
913 "0x%04x rev %d not supported (subdevice)\n", pid,
914 sc->subdevice_id,sc->hw_type);
918 /* 6150 WiFi/WiMax Series */
921 switch(sc->subdevice_id) {
922 case IWN_SDID_6150_1:
923 case IWN_SDID_6150_3:
924 case IWN_SDID_6150_5:
926 case IWN_SDID_6150_2:
927 case IWN_SDID_6150_4:
928 case IWN_SDID_6150_6:
930 sc->fwname = "iwn6050fw";
931 sc->limits = &iwn6000_sensitivity_limits;
932 sc->base_params = &iwn_6150_base_params;
935 device_printf(sc->sc_dev, "adapter type id : 0x%04x sub id :"
936 "0x%04x rev %d not supported (subdevice)\n", pid,
937 sc->subdevice_id,sc->hw_type);
941 /* 6030 Series and 1030 Series */
946 switch(sc->subdevice_id) {
947 case IWN_SDID_x030_1:
948 case IWN_SDID_x030_3:
949 case IWN_SDID_x030_5:
951 case IWN_SDID_x030_2:
952 case IWN_SDID_x030_4:
953 case IWN_SDID_x030_6:
955 case IWN_SDID_x030_7:
956 case IWN_SDID_x030_10:
957 case IWN_SDID_x030_14:
959 case IWN_SDID_x030_8:
960 case IWN_SDID_x030_11:
961 case IWN_SDID_x030_15:
963 case IWN_SDID_x030_9:
964 case IWN_SDID_x030_12:
965 case IWN_SDID_x030_16:
967 case IWN_SDID_x030_13:
969 sc->fwname = "iwn6000g2bfw";
970 sc->limits = &iwn6000_sensitivity_limits;
971 sc->base_params = &iwn_6000g2b_base_params;
974 device_printf(sc->sc_dev, "adapter type id : 0x%04x sub id :"
975 "0x%04x rev %d not supported (subdevice)\n", pid,
976 sc->subdevice_id,sc->hw_type);
980 /* 130 Series WiFi */
981 /* XXX: This series will need adjustment for rate.
982 * see rx_with_siso_diversity in linux kernel
986 switch(sc->subdevice_id) {
995 sc->fwname = "iwn6000g2bfw";
996 sc->limits = &iwn6000_sensitivity_limits;
997 sc->base_params = &iwn_6000g2b_base_params;
1000 device_printf(sc->sc_dev, "adapter type id : 0x%04x sub id :"
1001 "0x%04x rev %d not supported (subdevice)\n", pid,
1002 sc->subdevice_id,sc->hw_type);
1006 /* 100 Series WiFi */
1009 switch(sc->subdevice_id) {
1010 case IWN_SDID_100_1:
1011 case IWN_SDID_100_2:
1012 case IWN_SDID_100_3:
1013 case IWN_SDID_100_4:
1014 case IWN_SDID_100_5:
1015 case IWN_SDID_100_6:
1016 sc->limits = &iwn1000_sensitivity_limits;
1017 sc->base_params = &iwn1000_base_params;
1018 sc->fwname = "iwn100fw";
1021 device_printf(sc->sc_dev, "adapter type id : 0x%04x sub id :"
1022 "0x%04x rev %d not supported (subdevice)\n", pid,
1023 sc->subdevice_id,sc->hw_type);
1029 case IWN_DID_2x00_1:
1030 case IWN_DID_2x00_2:
1031 switch(sc->subdevice_id) {
1032 case IWN_SDID_2x00_1:
1033 case IWN_SDID_2x00_2:
1034 case IWN_SDID_2x00_3:
1036 case IWN_SDID_2x00_4:
1037 //iwl2000_2bgn_d_cfg
1038 sc->limits = &iwn2030_sensitivity_limits;
1039 sc->base_params = &iwn2000_base_params;
1040 sc->fwname = "iwn2000fw";
1043 device_printf(sc->sc_dev, "adapter type id : 0x%04x sub id :"
1044 "0x%04x rev %d not supported (subdevice) \n",
1045 pid, sc->subdevice_id, sc->hw_type);
1050 case IWN_DID_2x30_1:
1051 case IWN_DID_2x30_2:
1052 switch(sc->subdevice_id) {
1053 case IWN_SDID_2x30_1:
1054 case IWN_SDID_2x30_3:
1055 case IWN_SDID_2x30_5:
1057 case IWN_SDID_2x30_2:
1058 case IWN_SDID_2x30_4:
1059 case IWN_SDID_2x30_6:
1061 sc->limits = &iwn2030_sensitivity_limits;
1062 sc->base_params = &iwn2030_base_params;
1063 sc->fwname = "iwn2030fw";
1066 device_printf(sc->sc_dev, "adapter type id : 0x%04x sub id :"
1067 "0x%04x rev %d not supported (subdevice)\n", pid,
1068 sc->subdevice_id,sc->hw_type);
1073 case IWN_DID_5x00_1:
1074 case IWN_DID_5x00_2:
1075 case IWN_DID_5x00_3:
1076 case IWN_DID_5x00_4:
1077 sc->limits = &iwn5000_sensitivity_limits;
1078 sc->base_params = &iwn5000_base_params;
1079 sc->fwname = "iwn5000fw";
1080 switch(sc->subdevice_id) {
1081 case IWN_SDID_5x00_1:
1082 case IWN_SDID_5x00_2:
1083 case IWN_SDID_5x00_3:
1084 case IWN_SDID_5x00_4:
1085 case IWN_SDID_5x00_9:
1086 case IWN_SDID_5x00_10:
1087 case IWN_SDID_5x00_11:
1088 case IWN_SDID_5x00_12:
1089 case IWN_SDID_5x00_17:
1090 case IWN_SDID_5x00_18:
1091 case IWN_SDID_5x00_19:
1092 case IWN_SDID_5x00_20:
1094 sc->txchainmask = IWN_ANT_B;
1095 sc->rxchainmask = IWN_ANT_AB;
1097 case IWN_SDID_5x00_5:
1098 case IWN_SDID_5x00_6:
1099 case IWN_SDID_5x00_13:
1100 case IWN_SDID_5x00_14:
1101 case IWN_SDID_5x00_21:
1102 case IWN_SDID_5x00_22:
1104 sc->txchainmask = IWN_ANT_B;
1105 sc->rxchainmask = IWN_ANT_AB;
1107 case IWN_SDID_5x00_7:
1108 case IWN_SDID_5x00_8:
1109 case IWN_SDID_5x00_15:
1110 case IWN_SDID_5x00_16:
1111 case IWN_SDID_5x00_23:
1112 case IWN_SDID_5x00_24:
1114 sc->txchainmask = IWN_ANT_B;
1115 sc->rxchainmask = IWN_ANT_AB;
1117 case IWN_SDID_5x00_25:
1118 case IWN_SDID_5x00_26:
1119 case IWN_SDID_5x00_27:
1120 case IWN_SDID_5x00_28:
1121 case IWN_SDID_5x00_29:
1122 case IWN_SDID_5x00_30:
1123 case IWN_SDID_5x00_31:
1124 case IWN_SDID_5x00_32:
1125 case IWN_SDID_5x00_33:
1126 case IWN_SDID_5x00_34:
1127 case IWN_SDID_5x00_35:
1128 case IWN_SDID_5x00_36:
1130 sc->txchainmask = IWN_ANT_ABC;
1131 sc->rxchainmask = IWN_ANT_ABC;
1134 device_printf(sc->sc_dev, "adapter type id : 0x%04x sub id :"
1135 "0x%04x rev %d not supported (subdevice)\n", pid,
1136 sc->subdevice_id,sc->hw_type);
1141 case IWN_DID_5x50_1:
1142 case IWN_DID_5x50_2:
1143 case IWN_DID_5x50_3:
1144 case IWN_DID_5x50_4:
1145 sc->limits = &iwn5000_sensitivity_limits;
1146 sc->base_params = &iwn5000_base_params;
1147 sc->fwname = "iwn5000fw";
1148 switch(sc->subdevice_id) {
1149 case IWN_SDID_5x50_1:
1150 case IWN_SDID_5x50_2:
1151 case IWN_SDID_5x50_3:
1153 sc->limits = &iwn5000_sensitivity_limits;
1154 sc->base_params = &iwn5000_base_params;
1155 sc->fwname = "iwn5000fw";
1157 case IWN_SDID_5x50_4:
1158 case IWN_SDID_5x50_5:
1159 case IWN_SDID_5x50_8:
1160 case IWN_SDID_5x50_9:
1161 case IWN_SDID_5x50_10:
1162 case IWN_SDID_5x50_11:
1164 case IWN_SDID_5x50_6:
1165 case IWN_SDID_5x50_7:
1166 case IWN_SDID_5x50_12:
1167 case IWN_SDID_5x50_13:
1169 sc->limits = &iwn5000_sensitivity_limits;
1170 sc->fwname = "iwn5150fw";
1171 sc->base_params = &iwn_5x50_base_params;
1174 device_printf(sc->sc_dev, "adapter type id : 0x%04x sub id :"
1175 "0x%04x rev %d not supported (subdevice)\n", pid,
1176 sc->subdevice_id,sc->hw_type);
1181 device_printf(sc->sc_dev, "adapter type id : 0x%04x sub id : 0x%04x"
1182 "rev 0x%08x not supported (device)\n", pid, sc->subdevice_id,
1190 iwn4965_attach(struct iwn_softc *sc, uint16_t pid)
1192 struct iwn_ops *ops = &sc->ops;
1194 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s begin\n", __func__);
1195 ops->load_firmware = iwn4965_load_firmware;
1196 ops->read_eeprom = iwn4965_read_eeprom;
1197 ops->post_alive = iwn4965_post_alive;
1198 ops->nic_config = iwn4965_nic_config;
1199 ops->update_sched = iwn4965_update_sched;
1200 ops->get_temperature = iwn4965_get_temperature;
1201 ops->get_rssi = iwn4965_get_rssi;
1202 ops->set_txpower = iwn4965_set_txpower;
1203 ops->init_gains = iwn4965_init_gains;
1204 ops->set_gains = iwn4965_set_gains;
1205 ops->add_node = iwn4965_add_node;
1206 ops->tx_done = iwn4965_tx_done;
1207 ops->ampdu_tx_start = iwn4965_ampdu_tx_start;
1208 ops->ampdu_tx_stop = iwn4965_ampdu_tx_stop;
1209 sc->ntxqs = IWN4965_NTXQUEUES;
1210 sc->firstaggqueue = IWN4965_FIRSTAGGQUEUE;
1211 sc->ndmachnls = IWN4965_NDMACHNLS;
1212 sc->broadcast_id = IWN4965_ID_BROADCAST;
1213 sc->rxonsz = IWN4965_RXONSZ;
1214 sc->schedsz = IWN4965_SCHEDSZ;
1215 sc->fw_text_maxsz = IWN4965_FW_TEXT_MAXSZ;
1216 sc->fw_data_maxsz = IWN4965_FW_DATA_MAXSZ;
1217 sc->fwsz = IWN4965_FWSZ;
1218 sc->sched_txfact_addr = IWN4965_SCHED_TXFACT;
1219 sc->limits = &iwn4965_sensitivity_limits;
1220 sc->fwname = "iwn4965fw";
1221 /* Override chains masks, ROM is known to be broken. */
1222 sc->txchainmask = IWN_ANT_AB;
1223 sc->rxchainmask = IWN_ANT_ABC;
1224 /* Enable normal btcoex */
1225 sc->sc_flags |= IWN_FLAG_BTCOEX;
1227 DPRINTF(sc, IWN_DEBUG_TRACE, "%s: end\n",__func__);
1233 iwn5000_attach(struct iwn_softc *sc, uint16_t pid)
1235 struct iwn_ops *ops = &sc->ops;
1237 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s begin\n", __func__);
1239 ops->load_firmware = iwn5000_load_firmware;
1240 ops->read_eeprom = iwn5000_read_eeprom;
1241 ops->post_alive = iwn5000_post_alive;
1242 ops->nic_config = iwn5000_nic_config;
1243 ops->update_sched = iwn5000_update_sched;
1244 ops->get_temperature = iwn5000_get_temperature;
1245 ops->get_rssi = iwn5000_get_rssi;
1246 ops->set_txpower = iwn5000_set_txpower;
1247 ops->init_gains = iwn5000_init_gains;
1248 ops->set_gains = iwn5000_set_gains;
1249 ops->add_node = iwn5000_add_node;
1250 ops->tx_done = iwn5000_tx_done;
1251 ops->ampdu_tx_start = iwn5000_ampdu_tx_start;
1252 ops->ampdu_tx_stop = iwn5000_ampdu_tx_stop;
1253 sc->ntxqs = IWN5000_NTXQUEUES;
1254 sc->firstaggqueue = IWN5000_FIRSTAGGQUEUE;
1255 sc->ndmachnls = IWN5000_NDMACHNLS;
1256 sc->broadcast_id = IWN5000_ID_BROADCAST;
1257 sc->rxonsz = IWN5000_RXONSZ;
1258 sc->schedsz = IWN5000_SCHEDSZ;
1259 sc->fw_text_maxsz = IWN5000_FW_TEXT_MAXSZ;
1260 sc->fw_data_maxsz = IWN5000_FW_DATA_MAXSZ;
1261 sc->fwsz = IWN5000_FWSZ;
1262 sc->sched_txfact_addr = IWN5000_SCHED_TXFACT;
1263 sc->reset_noise_gain = IWN5000_PHY_CALIB_RESET_NOISE_GAIN;
1264 sc->noise_gain = IWN5000_PHY_CALIB_NOISE_GAIN;
1270 * Attach the interface to 802.11 radiotap.
1273 iwn_radiotap_attach(struct iwn_softc *sc)
1275 struct ifnet *ifp = sc->sc_ifp;
1276 struct ieee80211com *ic = ifp->if_l2com;
1277 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s begin\n", __func__);
1278 ieee80211_radiotap_attach(ic,
1279 &sc->sc_txtap.wt_ihdr, sizeof(sc->sc_txtap),
1280 IWN_TX_RADIOTAP_PRESENT,
1281 &sc->sc_rxtap.wr_ihdr, sizeof(sc->sc_rxtap),
1282 IWN_RX_RADIOTAP_PRESENT);
1283 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s end\n", __func__);
1287 iwn_sysctlattach(struct iwn_softc *sc)
1290 struct sysctl_ctx_list *ctx;
1291 struct sysctl_oid *tree;
1293 ctx = &sc->sc_sysctl_ctx;
1294 tree = sc->sc_sysctl_tree;
1297 device_printf(sc->sc_dev, "can't add sysctl node\n");
1300 SYSCTL_ADD_INT(ctx, SYSCTL_CHILDREN(tree), OID_AUTO,
1301 "debug", CTLFLAG_RW, &sc->sc_debug, sc->sc_debug,
1302 "control debugging printfs");
1306 static struct ieee80211vap *
1307 iwn_vap_create(struct ieee80211com *ic, const char name[IFNAMSIZ], int unit,
1308 enum ieee80211_opmode opmode, int flags,
1309 const uint8_t bssid[IEEE80211_ADDR_LEN],
1310 const uint8_t mac[IEEE80211_ADDR_LEN])
1312 struct iwn_vap *ivp;
1313 struct ieee80211vap *vap;
1314 uint8_t mac1[IEEE80211_ADDR_LEN];
1315 struct iwn_softc *sc = ic->ic_ifp->if_softc;
1317 if (!TAILQ_EMPTY(&ic->ic_vaps)) /* only one at a time */
1320 IEEE80211_ADDR_COPY(mac1, mac);
1322 ivp = kmalloc(sizeof(struct iwn_vap), M_80211_VAP, M_INTWAIT | M_ZERO);
1324 ieee80211_vap_setup(ic, vap, name, unit, opmode, flags, bssid, mac1);
1325 ivp->ctx = IWN_RXON_BSS_CTX;
1326 IEEE80211_ADDR_COPY(ivp->macaddr, mac1);
1327 vap->iv_bmissthreshold = 10; /* override default */
1328 /* Override with driver methods. */
1329 ivp->iv_newstate = vap->iv_newstate;
1330 vap->iv_newstate = iwn_newstate;
1331 sc->ivap[IWN_RXON_BSS_CTX] = vap;
1333 ieee80211_ratectl_init(vap);
1334 /* Complete setup. */
1335 ieee80211_vap_attach(vap, iwn_media_change, ieee80211_media_status);
1336 ic->ic_opmode = opmode;
1341 iwn_vap_delete(struct ieee80211vap *vap)
1343 struct iwn_vap *ivp = IWN_VAP(vap);
1345 ieee80211_ratectl_deinit(vap);
1346 ieee80211_vap_detach(vap);
1347 kfree(ivp, M_80211_VAP);
1351 iwn_pci_detach(device_t dev)
1353 struct iwn_softc *sc = device_get_softc(dev);
1354 struct ifnet *ifp = sc->sc_ifp;
1355 struct ieee80211com *ic;
1358 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s begin\n", __func__);
1360 wlan_serialize_enter();
1365 ieee80211_draintask(ic, &sc->sc_reinit_task);
1366 ieee80211_draintask(ic, &sc->sc_radioon_task);
1367 ieee80211_draintask(ic, &sc->sc_radiooff_task);
1370 callout_stop(&sc->watchdog_to);
1371 callout_stop(&sc->calib_to);
1372 ieee80211_ifdetach(ic);
1375 /* cleanup sysctl nodes */
1376 sysctl_ctx_free(&sc->sc_sysctl_ctx);
1378 /* Uninstall interrupt handler. */
1379 if (sc->irq != NULL) {
1380 bus_teardown_intr(dev, sc->irq, sc->sc_ih);
1381 bus_release_resource(dev, SYS_RES_IRQ, sc->irq_rid, sc->irq);
1382 if (sc->irq_rid == 1)
1383 pci_release_msi(dev);
1387 /* Free DMA resources. */
1388 iwn_free_rx_ring(sc, &sc->rxq);
1389 for (qid = 0; qid < sc->ntxqs; qid++)
1390 iwn_free_tx_ring(sc, &sc->txq[qid]);
1393 if (sc->ict != NULL) {
1399 if (sc->mem != NULL) {
1400 bus_release_resource(dev, SYS_RES_MEMORY, sc->mem_rid, sc->mem);
1409 bus_dma_tag_destroy(sc->sc_dmat);
1411 wlan_serialize_exit();
1412 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s: end\n", __func__);
1417 iwn_pci_shutdown(device_t dev)
1419 struct iwn_softc *sc = device_get_softc(dev);
1421 wlan_serialize_enter();
1422 iwn_stop_locked(sc);
1423 wlan_serialize_exit();
1429 iwn_pci_suspend(device_t dev)
1431 struct iwn_softc *sc = device_get_softc(dev);
1432 struct ieee80211com *ic = sc->sc_ifp->if_l2com;
1434 ieee80211_suspend_all(ic);
1439 iwn_pci_resume(device_t dev)
1441 struct iwn_softc *sc = device_get_softc(dev);
1442 struct ieee80211com *ic = sc->sc_ifp->if_l2com;
1444 /* Clear device-specific "PCI retry timeout" register (41h). */
1445 pci_write_config(dev, 0x41, 0, 1);
1447 ieee80211_resume_all(ic);
1452 iwn_nic_lock(struct iwn_softc *sc)
1456 /* Request exclusive access to NIC. */
1457 IWN_SETBITS(sc, IWN_GP_CNTRL, IWN_GP_CNTRL_MAC_ACCESS_REQ);
1459 /* Spin until we actually get the lock. */
1460 for (ntries = 0; ntries < 1000; ntries++) {
1461 if ((IWN_READ(sc, IWN_GP_CNTRL) &
1462 (IWN_GP_CNTRL_MAC_ACCESS_ENA | IWN_GP_CNTRL_SLEEP)) ==
1463 IWN_GP_CNTRL_MAC_ACCESS_ENA)
1470 static __inline void
1471 iwn_nic_unlock(struct iwn_softc *sc)
1473 IWN_CLRBITS(sc, IWN_GP_CNTRL, IWN_GP_CNTRL_MAC_ACCESS_REQ);
1476 static __inline uint32_t
1477 iwn_prph_read(struct iwn_softc *sc, uint32_t addr)
1479 IWN_WRITE(sc, IWN_PRPH_RADDR, IWN_PRPH_DWORD | addr);
1480 IWN_BARRIER_READ_WRITE(sc);
1481 return IWN_READ(sc, IWN_PRPH_RDATA);
1484 static __inline void
1485 iwn_prph_write(struct iwn_softc *sc, uint32_t addr, uint32_t data)
1487 IWN_WRITE(sc, IWN_PRPH_WADDR, IWN_PRPH_DWORD | addr);
1488 IWN_BARRIER_WRITE(sc);
1489 IWN_WRITE(sc, IWN_PRPH_WDATA, data);
1492 static __inline void
1493 iwn_prph_setbits(struct iwn_softc *sc, uint32_t addr, uint32_t mask)
1495 iwn_prph_write(sc, addr, iwn_prph_read(sc, addr) | mask);
1498 static __inline void
1499 iwn_prph_clrbits(struct iwn_softc *sc, uint32_t addr, uint32_t mask)
1501 iwn_prph_write(sc, addr, iwn_prph_read(sc, addr) & ~mask);
1504 static __inline void
1505 iwn_prph_write_region_4(struct iwn_softc *sc, uint32_t addr,
1506 const uint32_t *data, int count)
1508 for (; count > 0; count--, data++, addr += 4)
1509 iwn_prph_write(sc, addr, *data);
1512 static __inline uint32_t
1513 iwn_mem_read(struct iwn_softc *sc, uint32_t addr)
1515 IWN_WRITE(sc, IWN_MEM_RADDR, addr);
1516 IWN_BARRIER_READ_WRITE(sc);
1517 return IWN_READ(sc, IWN_MEM_RDATA);
1520 static __inline void
1521 iwn_mem_write(struct iwn_softc *sc, uint32_t addr, uint32_t data)
1523 IWN_WRITE(sc, IWN_MEM_WADDR, addr);
1524 IWN_BARRIER_WRITE(sc);
1525 IWN_WRITE(sc, IWN_MEM_WDATA, data);
1528 static __inline void
1529 iwn_mem_write_2(struct iwn_softc *sc, uint32_t addr, uint16_t data)
1533 tmp = iwn_mem_read(sc, addr & ~3);
1535 tmp = (tmp & 0x0000ffff) | data << 16;
1537 tmp = (tmp & 0xffff0000) | data;
1538 iwn_mem_write(sc, addr & ~3, tmp);
1541 static __inline void
1542 iwn_mem_read_region_4(struct iwn_softc *sc, uint32_t addr, uint32_t *data,
1545 for (; count > 0; count--, addr += 4)
1546 *data++ = iwn_mem_read(sc, addr);
1549 static __inline void
1550 iwn_mem_set_region_4(struct iwn_softc *sc, uint32_t addr, uint32_t val,
1553 for (; count > 0; count--, addr += 4)
1554 iwn_mem_write(sc, addr, val);
1558 iwn_eeprom_lock(struct iwn_softc *sc)
1562 for (i = 0; i < 100; i++) {
1563 /* Request exclusive access to EEPROM. */
1564 IWN_SETBITS(sc, IWN_HW_IF_CONFIG,
1565 IWN_HW_IF_CONFIG_EEPROM_LOCKED);
1567 /* Spin until we actually get the lock. */
1568 for (ntries = 0; ntries < 100; ntries++) {
1569 if (IWN_READ(sc, IWN_HW_IF_CONFIG) &
1570 IWN_HW_IF_CONFIG_EEPROM_LOCKED)
1575 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s end timeout\n", __func__);
1579 static __inline void
1580 iwn_eeprom_unlock(struct iwn_softc *sc)
1582 IWN_CLRBITS(sc, IWN_HW_IF_CONFIG, IWN_HW_IF_CONFIG_EEPROM_LOCKED);
1586 * Initialize access by host to One Time Programmable ROM.
1587 * NB: This kind of ROM can be found on 1000 or 6000 Series only.
1590 iwn_init_otprom(struct iwn_softc *sc)
1592 uint16_t prev, base, next;
1595 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s begin\n", __func__);
1597 /* Wait for clock stabilization before accessing prph. */
1598 if ((error = iwn_clock_wait(sc)) != 0)
1601 if ((error = iwn_nic_lock(sc)) != 0)
1603 iwn_prph_setbits(sc, IWN_APMG_PS, IWN_APMG_PS_RESET_REQ);
1605 iwn_prph_clrbits(sc, IWN_APMG_PS, IWN_APMG_PS_RESET_REQ);
1608 /* Set auto clock gate disable bit for HW with OTP shadow RAM. */
1609 if (sc->base_params->shadow_ram_support) {
1610 IWN_SETBITS(sc, IWN_DBG_LINK_PWR_MGMT,
1611 IWN_RESET_LINK_PWR_MGMT_DIS);
1613 IWN_CLRBITS(sc, IWN_EEPROM_GP, IWN_EEPROM_GP_IF_OWNER);
1614 /* Clear ECC status. */
1615 IWN_SETBITS(sc, IWN_OTP_GP,
1616 IWN_OTP_GP_ECC_CORR_STTS | IWN_OTP_GP_ECC_UNCORR_STTS);
1619 * Find the block before last block (contains the EEPROM image)
1620 * for HW without OTP shadow RAM.
1622 if (! sc->base_params->shadow_ram_support) {
1623 /* Switch to absolute addressing mode. */
1624 IWN_CLRBITS(sc, IWN_OTP_GP, IWN_OTP_GP_RELATIVE_ACCESS);
1626 for (count = 0; count < sc->base_params->max_ll_items;
1628 error = iwn_read_prom_data(sc, base, &next, 2);
1631 if (next == 0) /* End of linked-list. */
1634 base = le16toh(next);
1636 if (count == 0 || count == sc->base_params->max_ll_items)
1638 /* Skip "next" word. */
1639 sc->prom_base = prev + 1;
1642 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s end\n", __func__);
1648 iwn_read_prom_data(struct iwn_softc *sc, uint32_t addr, void *data, int count)
1650 uint8_t *out = data;
1654 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s begin\n", __func__);
1656 addr += sc->prom_base;
1657 for (; count > 0; count -= 2, addr++) {
1658 IWN_WRITE(sc, IWN_EEPROM, addr << 2);
1659 for (ntries = 0; ntries < 10; ntries++) {
1660 val = IWN_READ(sc, IWN_EEPROM);
1661 if (val & IWN_EEPROM_READ_VALID)
1666 device_printf(sc->sc_dev,
1667 "timeout reading ROM at 0x%x\n", addr);
1670 if (sc->sc_flags & IWN_FLAG_HAS_OTPROM) {
1671 /* OTPROM, check for ECC errors. */
1672 tmp = IWN_READ(sc, IWN_OTP_GP);
1673 if (tmp & IWN_OTP_GP_ECC_UNCORR_STTS) {
1674 device_printf(sc->sc_dev,
1675 "OTPROM ECC error at 0x%x\n", addr);
1678 if (tmp & IWN_OTP_GP_ECC_CORR_STTS) {
1679 /* Correctable ECC error, clear bit. */
1680 IWN_SETBITS(sc, IWN_OTP_GP,
1681 IWN_OTP_GP_ECC_CORR_STTS);
1689 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s end\n", __func__);
1695 iwn_dma_map_addr(void *arg, bus_dma_segment_t *segs, int nsegs, int error)
1699 KASSERT(nsegs == 1, ("too many DMA segments, %d should be 1", nsegs));
1700 *(bus_addr_t *)arg = segs[0].ds_addr;
1704 iwn_dma_contig_alloc(struct iwn_softc *sc, struct iwn_dma_info *dma,
1705 void **kvap, bus_size_t size, bus_size_t alignment)
1712 error = bus_dma_tag_create(sc->sc_dmat, alignment,
1713 0, BUS_SPACE_MAXADDR_32BIT, BUS_SPACE_MAXADDR, NULL, NULL, size,
1714 1, size, BUS_DMA_NOWAIT, &dma->tag);
1718 error = bus_dmamem_alloc(dma->tag, (void **)&dma->vaddr,
1719 BUS_DMA_NOWAIT | BUS_DMA_ZERO | BUS_DMA_COHERENT, &dma->map);
1723 error = bus_dmamap_load(dma->tag, dma->map, dma->vaddr, size,
1724 iwn_dma_map_addr, &dma->paddr, BUS_DMA_NOWAIT);
1728 bus_dmamap_sync(dma->tag, dma->map, BUS_DMASYNC_PREWRITE);
1735 fail: iwn_dma_contig_free(dma);
1740 iwn_dma_contig_free(struct iwn_dma_info *dma)
1742 if (dma->map != NULL) {
1743 if (dma->vaddr != NULL) {
1744 bus_dmamap_sync(dma->tag, dma->map,
1745 BUS_DMASYNC_POSTREAD | BUS_DMASYNC_POSTWRITE);
1746 bus_dmamap_unload(dma->tag, dma->map);
1747 bus_dmamem_free(dma->tag, dma->vaddr, dma->map);
1750 bus_dmamap_destroy(dma->tag, dma->map);
1753 if (dma->tag != NULL) {
1754 bus_dma_tag_destroy(dma->tag);
1760 iwn_alloc_sched(struct iwn_softc *sc)
1762 /* TX scheduler rings must be aligned on a 1KB boundary. */
1763 return iwn_dma_contig_alloc(sc, &sc->sched_dma, (void **)&sc->sched,
1768 iwn_free_sched(struct iwn_softc *sc)
1770 iwn_dma_contig_free(&sc->sched_dma);
1774 iwn_alloc_kw(struct iwn_softc *sc)
1776 /* "Keep Warm" page must be aligned on a 4KB boundary. */
1777 return iwn_dma_contig_alloc(sc, &sc->kw_dma, NULL, 4096, 4096);
1781 iwn_free_kw(struct iwn_softc *sc)
1783 iwn_dma_contig_free(&sc->kw_dma);
1787 iwn_alloc_ict(struct iwn_softc *sc)
1789 /* ICT table must be aligned on a 4KB boundary. */
1790 return iwn_dma_contig_alloc(sc, &sc->ict_dma, (void **)&sc->ict,
1791 IWN_ICT_SIZE, 4096);
1795 iwn_free_ict(struct iwn_softc *sc)
1797 iwn_dma_contig_free(&sc->ict_dma);
1801 iwn_alloc_fwmem(struct iwn_softc *sc)
1803 /* Must be aligned on a 16-byte boundary. */
1804 return iwn_dma_contig_alloc(sc, &sc->fw_dma, NULL, sc->fwsz, 16);
1808 iwn_free_fwmem(struct iwn_softc *sc)
1810 iwn_dma_contig_free(&sc->fw_dma);
1814 iwn_alloc_rx_ring(struct iwn_softc *sc, struct iwn_rx_ring *ring)
1821 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s begin\n", __func__);
1823 /* Allocate RX descriptors (256-byte aligned). */
1824 size = IWN_RX_RING_COUNT * sizeof (uint32_t);
1825 error = iwn_dma_contig_alloc(sc, &ring->desc_dma, (void **)&ring->desc,
1828 device_printf(sc->sc_dev,
1829 "%s: could not allocate RX ring DMA memory, error %d\n",
1834 /* Allocate RX status area (16-byte aligned). */
1835 error = iwn_dma_contig_alloc(sc, &ring->stat_dma, (void **)&ring->stat,
1836 sizeof (struct iwn_rx_status), 16);
1838 device_printf(sc->sc_dev,
1839 "%s: could not allocate RX status DMA memory, error %d\n",
1844 /* Create RX buffer DMA tag. */
1845 error = bus_dma_tag_create(sc->sc_dmat, 1, 0,
1846 BUS_SPACE_MAXADDR_32BIT, BUS_SPACE_MAXADDR, NULL, NULL,
1847 IWN_RBUF_SIZE, 1, IWN_RBUF_SIZE, BUS_DMA_NOWAIT, &ring->data_dmat);
1849 device_printf(sc->sc_dev,
1850 "%s: could not create RX buf DMA tag, error %d\n",
1856 * Allocate and map RX buffers.
1858 for (i = 0; i < IWN_RX_RING_COUNT; i++) {
1859 struct iwn_rx_data *data = &ring->data[i];
1862 error = bus_dmamap_create(ring->data_dmat, 0, &data->map);
1864 device_printf(sc->sc_dev,
1865 "%s: could not create RX buf DMA map, error %d\n",
1870 data->m = m_getjcl(MB_DONTWAIT, MT_DATA,
1871 M_PKTHDR, IWN_RBUF_SIZE);
1872 if (data->m == NULL) {
1873 device_printf(sc->sc_dev,
1874 "%s: could not allocate RX mbuf\n", __func__);
1879 error = bus_dmamap_load(ring->data_dmat, data->map,
1880 mtod(data->m, void *), IWN_RBUF_SIZE, iwn_dma_map_addr,
1881 &paddr, BUS_DMA_NOWAIT);
1882 if (error != 0 && error != EFBIG) {
1883 device_printf(sc->sc_dev,
1884 "%s: can't not map mbuf, error %d\n", __func__,
1889 /* Set physical address of RX buffer (256-byte aligned). */
1890 ring->desc[i] = htole32(paddr >> 8);
1893 bus_dmamap_sync(ring->desc_dma.tag, ring->desc_dma.map,
1894 BUS_DMASYNC_PREWRITE);
1896 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s: end\n",__func__);
1900 fail: iwn_free_rx_ring(sc, ring);
1902 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s: end in error\n",__func__);
1908 iwn_reset_rx_ring(struct iwn_softc *sc, struct iwn_rx_ring *ring)
1912 DPRINTF(sc, IWN_DEBUG_TRACE, "->Doing %s\n", __func__);
1914 if (iwn_nic_lock(sc) == 0) {
1915 IWN_WRITE(sc, IWN_FH_RX_CONFIG, 0);
1916 for (ntries = 0; ntries < 1000; ntries++) {
1917 if (IWN_READ(sc, IWN_FH_RX_STATUS) &
1918 IWN_FH_RX_STATUS_IDLE)
1925 sc->last_rx_valid = 0;
1929 iwn_free_rx_ring(struct iwn_softc *sc, struct iwn_rx_ring *ring)
1933 DPRINTF(sc, IWN_DEBUG_TRACE, "->Doing %s \n", __func__);
1935 iwn_dma_contig_free(&ring->desc_dma);
1936 iwn_dma_contig_free(&ring->stat_dma);
1938 for (i = 0; i < IWN_RX_RING_COUNT; i++) {
1939 struct iwn_rx_data *data = &ring->data[i];
1941 if (data->m != NULL) {
1942 bus_dmamap_sync(ring->data_dmat, data->map,
1943 BUS_DMASYNC_POSTREAD);
1944 bus_dmamap_unload(ring->data_dmat, data->map);
1948 if (data->map != NULL)
1949 bus_dmamap_destroy(ring->data_dmat, data->map);
1951 if (ring->data_dmat != NULL) {
1952 bus_dma_tag_destroy(ring->data_dmat);
1953 ring->data_dmat = NULL;
1958 iwn_alloc_tx_ring(struct iwn_softc *sc, struct iwn_tx_ring *ring, int qid)
1968 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s begin\n", __func__);
1970 /* Allocate TX descriptors (256-byte aligned). */
1971 size = IWN_TX_RING_COUNT * sizeof (struct iwn_tx_desc);
1972 error = iwn_dma_contig_alloc(sc, &ring->desc_dma, (void **)&ring->desc,
1975 device_printf(sc->sc_dev,
1976 "%s: could not allocate TX ring DMA memory, error %d\n",
1981 size = IWN_TX_RING_COUNT * sizeof (struct iwn_tx_cmd);
1982 error = iwn_dma_contig_alloc(sc, &ring->cmd_dma, (void **)&ring->cmd,
1985 device_printf(sc->sc_dev,
1986 "%s: could not allocate TX cmd DMA memory, error %d\n",
1991 error = bus_dma_tag_create(sc->sc_dmat, 1, 0,
1992 BUS_SPACE_MAXADDR_32BIT, BUS_SPACE_MAXADDR, NULL, NULL, MCLBYTES,
1993 IWN_MAX_SCATTER - 1, MCLBYTES, BUS_DMA_NOWAIT, &ring->data_dmat);
1995 device_printf(sc->sc_dev,
1996 "%s: could not create TX buf DMA tag, error %d\n",
2001 paddr = ring->cmd_dma.paddr;
2002 for (i = 0; i < IWN_TX_RING_COUNT; i++) {
2003 struct iwn_tx_data *data = &ring->data[i];
2005 data->cmd_paddr = paddr;
2006 data->scratch_paddr = paddr + 12;
2007 paddr += sizeof (struct iwn_tx_cmd);
2009 error = bus_dmamap_create(ring->data_dmat, 0, &data->map);
2011 device_printf(sc->sc_dev,
2012 "%s: could not create TX buf DMA map, error %d\n",
2018 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s end\n", __func__);
2022 fail: iwn_free_tx_ring(sc, ring);
2023 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s end in error\n", __func__);
2028 iwn_reset_tx_ring(struct iwn_softc *sc, struct iwn_tx_ring *ring)
2032 DPRINTF(sc, IWN_DEBUG_TRACE, "->doing %s \n", __func__);
2034 for (i = 0; i < IWN_TX_RING_COUNT; i++) {
2035 struct iwn_tx_data *data = &ring->data[i];
2037 if (data->m != NULL) {
2038 bus_dmamap_sync(ring->data_dmat, data->map,
2039 BUS_DMASYNC_POSTWRITE);
2040 bus_dmamap_unload(ring->data_dmat, data->map);
2045 /* Clear TX descriptors. */
2046 memset(ring->desc, 0, ring->desc_dma.size);
2047 bus_dmamap_sync(ring->desc_dma.tag, ring->desc_dma.map,
2048 BUS_DMASYNC_PREWRITE);
2049 sc->qfullmsk &= ~(1 << ring->qid);
2055 iwn_free_tx_ring(struct iwn_softc *sc, struct iwn_tx_ring *ring)
2059 DPRINTF(sc, IWN_DEBUG_TRACE, "->Doing %s \n", __func__);
2061 iwn_dma_contig_free(&ring->desc_dma);
2062 iwn_dma_contig_free(&ring->cmd_dma);
2064 for (i = 0; i < IWN_TX_RING_COUNT; i++) {
2065 struct iwn_tx_data *data = &ring->data[i];
2067 if (data->m != NULL) {
2068 bus_dmamap_sync(ring->data_dmat, data->map,
2069 BUS_DMASYNC_POSTWRITE);
2070 bus_dmamap_unload(ring->data_dmat, data->map);
2073 if (data->map != NULL)
2074 bus_dmamap_destroy(ring->data_dmat, data->map);
2076 if (ring->data_dmat != NULL) {
2077 bus_dma_tag_destroy(ring->data_dmat);
2078 ring->data_dmat = NULL;
2083 iwn5000_ict_reset(struct iwn_softc *sc)
2085 /* Disable interrupts. */
2086 IWN_WRITE(sc, IWN_INT_MASK, 0);
2088 /* Reset ICT table. */
2089 memset(sc->ict, 0, IWN_ICT_SIZE);
2092 /* Set physical address of ICT table (4KB aligned). */
2093 DPRINTF(sc, IWN_DEBUG_RESET, "%s: enabling ICT\n", __func__);
2094 IWN_WRITE(sc, IWN_DRAM_INT_TBL, IWN_DRAM_INT_TBL_ENABLE |
2095 IWN_DRAM_INT_TBL_WRAP_CHECK | sc->ict_dma.paddr >> 12);
2097 /* Enable periodic RX interrupt. */
2098 sc->int_mask |= IWN_INT_RX_PERIODIC;
2099 /* Switch to ICT interrupt mode in driver. */
2100 sc->sc_flags |= IWN_FLAG_USE_ICT;
2102 /* Re-enable interrupts. */
2103 IWN_WRITE(sc, IWN_INT, 0xffffffff);
2104 IWN_WRITE(sc, IWN_INT_MASK, sc->int_mask);
2108 iwn_read_eeprom(struct iwn_softc *sc, uint8_t macaddr[IEEE80211_ADDR_LEN])
2110 struct iwn_ops *ops = &sc->ops;
2114 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s begin\n", __func__);
2116 /* Check whether adapter has an EEPROM or an OTPROM. */
2117 if (sc->hw_type >= IWN_HW_REV_TYPE_1000 &&
2118 (IWN_READ(sc, IWN_OTP_GP) & IWN_OTP_GP_DEV_SEL_OTP))
2119 sc->sc_flags |= IWN_FLAG_HAS_OTPROM;
2120 DPRINTF(sc, IWN_DEBUG_RESET, "%s found\n",
2121 (sc->sc_flags & IWN_FLAG_HAS_OTPROM) ? "OTPROM" : "EEPROM");
2123 /* Adapter has to be powered on for EEPROM access to work. */
2124 if ((error = iwn_apm_init(sc)) != 0) {
2125 device_printf(sc->sc_dev,
2126 "%s: could not power ON adapter, error %d\n", __func__,
2131 if ((IWN_READ(sc, IWN_EEPROM_GP) & 0x7) == 0) {
2132 device_printf(sc->sc_dev, "%s: bad ROM signature\n", __func__);
2135 if ((error = iwn_eeprom_lock(sc)) != 0) {
2136 device_printf(sc->sc_dev, "%s: could not lock ROM, error %d\n",
2140 if (sc->sc_flags & IWN_FLAG_HAS_OTPROM) {
2141 if ((error = iwn_init_otprom(sc)) != 0) {
2142 device_printf(sc->sc_dev,
2143 "%s: could not initialize OTPROM, error %d\n",
2149 iwn_read_prom_data(sc, IWN_EEPROM_SKU_CAP, &val, 2);
2150 DPRINTF(sc, IWN_DEBUG_RESET, "SKU capabilities=0x%04x\n", le16toh(val));
2151 /* Check if HT support is bonded out. */
2152 if (val & htole16(IWN_EEPROM_SKU_CAP_11N))
2153 sc->sc_flags |= IWN_FLAG_HAS_11N;
2155 iwn_read_prom_data(sc, IWN_EEPROM_RFCFG, &val, 2);
2156 sc->rfcfg = le16toh(val);
2157 DPRINTF(sc, IWN_DEBUG_RESET, "radio config=0x%04x\n", sc->rfcfg);
2158 /* Read Tx/Rx chains from ROM unless it's known to be broken. */
2159 if (sc->txchainmask == 0)
2160 sc->txchainmask = IWN_RFCFG_TXANTMSK(sc->rfcfg);
2161 if (sc->rxchainmask == 0)
2162 sc->rxchainmask = IWN_RFCFG_RXANTMSK(sc->rfcfg);
2164 /* Read MAC address. */
2165 iwn_read_prom_data(sc, IWN_EEPROM_MAC, macaddr, 6);
2167 /* Read adapter-specific information from EEPROM. */
2168 ops->read_eeprom(sc);
2170 iwn_apm_stop(sc); /* Power OFF adapter. */
2172 iwn_eeprom_unlock(sc);
2174 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s end\n", __func__);
2180 iwn4965_read_eeprom(struct iwn_softc *sc)
2186 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s begin\n", __func__);
2188 /* Read regulatory domain (4 ASCII characters). */
2189 iwn_read_prom_data(sc, IWN4965_EEPROM_DOMAIN, sc->eeprom_domain, 4);
2191 /* Read the list of authorized channels (20MHz ones only). */
2192 for (i = 0; i < IWN_NBANDS - 1; i++) {
2193 addr = iwn4965_regulatory_bands[i];
2194 iwn_read_eeprom_channels(sc, i, addr);
2197 /* Read maximum allowed TX power for 2GHz and 5GHz bands. */
2198 iwn_read_prom_data(sc, IWN4965_EEPROM_MAXPOW, &val, 2);
2199 sc->maxpwr2GHz = val & 0xff;
2200 sc->maxpwr5GHz = val >> 8;
2201 /* Check that EEPROM values are within valid range. */
2202 if (sc->maxpwr5GHz < 20 || sc->maxpwr5GHz > 50)
2203 sc->maxpwr5GHz = 38;
2204 if (sc->maxpwr2GHz < 20 || sc->maxpwr2GHz > 50)
2205 sc->maxpwr2GHz = 38;
2206 DPRINTF(sc, IWN_DEBUG_RESET, "maxpwr 2GHz=%d 5GHz=%d\n",
2207 sc->maxpwr2GHz, sc->maxpwr5GHz);
2209 /* Read samples for each TX power group. */
2210 iwn_read_prom_data(sc, IWN4965_EEPROM_BANDS, sc->bands,
2213 /* Read voltage at which samples were taken. */
2214 iwn_read_prom_data(sc, IWN4965_EEPROM_VOLTAGE, &val, 2);
2215 sc->eeprom_voltage = (int16_t)le16toh(val);
2216 DPRINTF(sc, IWN_DEBUG_RESET, "voltage=%d (in 0.3V)\n",
2217 sc->eeprom_voltage);
2220 /* Print samples. */
2221 if (sc->sc_debug & IWN_DEBUG_ANY) {
2222 for (i = 0; i < IWN_NBANDS - 1; i++)
2223 iwn4965_print_power_group(sc, i);
2227 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s end\n", __func__);
2232 iwn4965_print_power_group(struct iwn_softc *sc, int i)
2234 struct iwn4965_eeprom_band *band = &sc->bands[i];
2235 struct iwn4965_eeprom_chan_samples *chans = band->chans;
2238 kprintf("===band %d===\n", i);
2239 kprintf("chan lo=%d, chan hi=%d\n", band->lo, band->hi);
2240 kprintf("chan1 num=%d\n", chans[0].num);
2241 for (c = 0; c < 2; c++) {
2242 for (j = 0; j < IWN_NSAMPLES; j++) {
2243 kprintf("chain %d, sample %d: temp=%d gain=%d "
2244 "power=%d pa_det=%d\n", c, j,
2245 chans[0].samples[c][j].temp,
2246 chans[0].samples[c][j].gain,
2247 chans[0].samples[c][j].power,
2248 chans[0].samples[c][j].pa_det);
2251 kprintf("chan2 num=%d\n", chans[1].num);
2252 for (c = 0; c < 2; c++) {
2253 for (j = 0; j < IWN_NSAMPLES; j++) {
2254 kprintf("chain %d, sample %d: temp=%d gain=%d "
2255 "power=%d pa_det=%d\n", c, j,
2256 chans[1].samples[c][j].temp,
2257 chans[1].samples[c][j].gain,
2258 chans[1].samples[c][j].power,
2259 chans[1].samples[c][j].pa_det);
2266 iwn5000_read_eeprom(struct iwn_softc *sc)
2268 struct iwn5000_eeprom_calib_hdr hdr;
2270 uint32_t base, addr;
2274 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s begin\n", __func__);
2276 /* Read regulatory domain (4 ASCII characters). */
2277 iwn_read_prom_data(sc, IWN5000_EEPROM_REG, &val, 2);
2278 base = le16toh(val);
2279 iwn_read_prom_data(sc, base + IWN5000_EEPROM_DOMAIN,
2280 sc->eeprom_domain, 4);
2282 /* Read the list of authorized channels (20MHz ones only). */
2283 for (i = 0; i < IWN_NBANDS - 1; i++) {
2284 addr = base + sc->base_params->regulatory_bands[i];
2285 iwn_read_eeprom_channels(sc, i, addr);
2288 /* Read enhanced TX power information for 6000 Series. */
2289 if (sc->base_params->enhanced_TX_power)
2290 iwn_read_eeprom_enhinfo(sc);
2292 iwn_read_prom_data(sc, IWN5000_EEPROM_CAL, &val, 2);
2293 base = le16toh(val);
2294 iwn_read_prom_data(sc, base, &hdr, sizeof hdr);
2295 DPRINTF(sc, IWN_DEBUG_CALIBRATE,
2296 "%s: calib version=%u pa type=%u voltage=%u\n", __func__,
2297 hdr.version, hdr.pa_type, le16toh(hdr.volt));
2298 sc->calib_ver = hdr.version;
2300 if (sc->base_params->calib_need & IWN_FLG_NEED_PHY_CALIB_TEMP_OFFSETv2) {
2301 sc->eeprom_voltage = le16toh(hdr.volt);
2302 iwn_read_prom_data(sc, base + IWN5000_EEPROM_TEMP, &val, 2);
2303 sc->eeprom_temp_high=le16toh(val);
2304 iwn_read_prom_data(sc, base + IWN5000_EEPROM_VOLT, &val, 2);
2305 sc->eeprom_temp = le16toh(val);
2308 if (sc->hw_type == IWN_HW_REV_TYPE_5150) {
2309 /* Compute temperature offset. */
2310 iwn_read_prom_data(sc, base + IWN5000_EEPROM_TEMP, &val, 2);
2311 sc->eeprom_temp = le16toh(val);
2312 iwn_read_prom_data(sc, base + IWN5000_EEPROM_VOLT, &val, 2);
2313 volt = le16toh(val);
2314 sc->temp_off = sc->eeprom_temp - (volt / -5);
2315 DPRINTF(sc, IWN_DEBUG_CALIBRATE, "temp=%d volt=%d offset=%dK\n",
2316 sc->eeprom_temp, volt, sc->temp_off);
2318 /* Read crystal calibration. */
2319 iwn_read_prom_data(sc, base + IWN5000_EEPROM_CRYSTAL,
2320 &sc->eeprom_crystal, sizeof (uint32_t));
2321 DPRINTF(sc, IWN_DEBUG_CALIBRATE, "crystal calibration 0x%08x\n",
2322 le32toh(sc->eeprom_crystal));
2325 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s end\n", __func__);
2330 * Translate EEPROM flags to net80211.
2333 iwn_eeprom_channel_flags(struct iwn_eeprom_chan *channel)
2338 if ((channel->flags & IWN_EEPROM_CHAN_ACTIVE) == 0)
2339 nflags |= IEEE80211_CHAN_PASSIVE;
2340 if ((channel->flags & IWN_EEPROM_CHAN_IBSS) == 0)
2341 nflags |= IEEE80211_CHAN_NOADHOC;
2342 if (channel->flags & IWN_EEPROM_CHAN_RADAR) {
2343 nflags |= IEEE80211_CHAN_DFS;
2344 /* XXX apparently IBSS may still be marked */
2345 nflags |= IEEE80211_CHAN_NOADHOC;
2352 iwn_read_eeprom_band(struct iwn_softc *sc, int n)
2354 struct ifnet *ifp = sc->sc_ifp;
2355 struct ieee80211com *ic = ifp->if_l2com;
2356 struct iwn_eeprom_chan *channels = sc->eeprom_channels[n];
2357 const struct iwn_chan_band *band = &iwn_bands[n];
2358 struct ieee80211_channel *c;
2362 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s begin\n", __func__);
2364 for (i = 0; i < band->nchan; i++) {
2365 if (!(channels[i].flags & IWN_EEPROM_CHAN_VALID)) {
2366 DPRINTF(sc, IWN_DEBUG_RESET,
2367 "skip chan %d flags 0x%x maxpwr %d\n",
2368 band->chan[i], channels[i].flags,
2369 channels[i].maxpwr);
2372 chan = band->chan[i];
2373 nflags = iwn_eeprom_channel_flags(&channels[i]);
2375 c = &ic->ic_channels[ic->ic_nchans++];
2377 c->ic_maxregpower = channels[i].maxpwr;
2378 c->ic_maxpower = 2*c->ic_maxregpower;
2380 if (n == 0) { /* 2GHz band */
2381 c->ic_freq = ieee80211_ieee2mhz(chan, IEEE80211_CHAN_G);
2382 /* G =>'s B is supported */
2383 c->ic_flags = IEEE80211_CHAN_B | nflags;
2384 c = &ic->ic_channels[ic->ic_nchans++];
2386 c->ic_flags = IEEE80211_CHAN_G | nflags;
2387 } else { /* 5GHz band */
2388 c->ic_freq = ieee80211_ieee2mhz(chan, IEEE80211_CHAN_A);
2389 c->ic_flags = IEEE80211_CHAN_A | nflags;
2392 /* Save maximum allowed TX power for this channel. */
2393 sc->maxpwr[chan] = channels[i].maxpwr;
2395 DPRINTF(sc, IWN_DEBUG_RESET,
2396 "add chan %d flags 0x%x maxpwr %d\n", chan,
2397 channels[i].flags, channels[i].maxpwr);
2399 if (sc->sc_flags & IWN_FLAG_HAS_11N) {
2400 /* add HT20, HT40 added separately */
2401 c = &ic->ic_channels[ic->ic_nchans++];
2403 c->ic_flags |= IEEE80211_CHAN_HT20;
2407 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s end\n", __func__);
2412 iwn_read_eeprom_ht40(struct iwn_softc *sc, int n)
2414 struct ifnet *ifp = sc->sc_ifp;
2415 struct ieee80211com *ic = ifp->if_l2com;
2416 struct iwn_eeprom_chan *channels = sc->eeprom_channels[n];
2417 const struct iwn_chan_band *band = &iwn_bands[n];
2418 struct ieee80211_channel *c, *cent, *extc;
2422 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s start\n", __func__);
2424 if (!(sc->sc_flags & IWN_FLAG_HAS_11N)) {
2425 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s end no 11n\n", __func__);
2429 for (i = 0; i < band->nchan; i++) {
2430 if (!(channels[i].flags & IWN_EEPROM_CHAN_VALID)) {
2431 DPRINTF(sc, IWN_DEBUG_RESET,
2432 "skip chan %d flags 0x%x maxpwr %d\n",
2433 band->chan[i], channels[i].flags,
2434 channels[i].maxpwr);
2437 chan = band->chan[i];
2438 nflags = iwn_eeprom_channel_flags(&channels[i]);
2441 * Each entry defines an HT40 channel pair; find the
2442 * center channel, then the extension channel above.
2444 cent = ieee80211_find_channel_byieee(ic, chan,
2445 (n == 5 ? IEEE80211_CHAN_G : IEEE80211_CHAN_A));
2446 if (cent == NULL) { /* XXX shouldn't happen */
2447 device_printf(sc->sc_dev,
2448 "%s: no entry for channel %d\n", __func__, chan);
2451 extc = ieee80211_find_channel(ic, cent->ic_freq+20,
2452 (n == 5 ? IEEE80211_CHAN_G : IEEE80211_CHAN_A));
2454 DPRINTF(sc, IWN_DEBUG_RESET,
2455 "%s: skip chan %d, extension channel not found\n",
2460 DPRINTF(sc, IWN_DEBUG_RESET,
2461 "add ht40 chan %d flags 0x%x maxpwr %d\n",
2462 chan, channels[i].flags, channels[i].maxpwr);
2464 c = &ic->ic_channels[ic->ic_nchans++];
2466 c->ic_extieee = extc->ic_ieee;
2467 c->ic_flags &= ~IEEE80211_CHAN_HT;
2468 c->ic_flags |= IEEE80211_CHAN_HT40U | nflags;
2469 c = &ic->ic_channels[ic->ic_nchans++];
2471 c->ic_extieee = cent->ic_ieee;
2472 c->ic_flags &= ~IEEE80211_CHAN_HT;
2473 c->ic_flags |= IEEE80211_CHAN_HT40D | nflags;
2476 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s end\n", __func__);
2481 iwn_read_eeprom_channels(struct iwn_softc *sc, int n, uint32_t addr)
2483 struct ifnet *ifp = sc->sc_ifp;
2484 struct ieee80211com *ic = ifp->if_l2com;
2486 iwn_read_prom_data(sc, addr, &sc->eeprom_channels[n],
2487 iwn_bands[n].nchan * sizeof (struct iwn_eeprom_chan));
2490 iwn_read_eeprom_band(sc, n);
2492 iwn_read_eeprom_ht40(sc, n);
2493 ieee80211_sort_channels(ic->ic_channels, ic->ic_nchans);
2496 static struct iwn_eeprom_chan *
2497 iwn_find_eeprom_channel(struct iwn_softc *sc, struct ieee80211_channel *c)
2499 int band, chan, i, j;
2501 if (IEEE80211_IS_CHAN_HT40(c)) {
2502 band = IEEE80211_IS_CHAN_5GHZ(c) ? 6 : 5;
2503 if (IEEE80211_IS_CHAN_HT40D(c))
2504 chan = c->ic_extieee;
2507 for (i = 0; i < iwn_bands[band].nchan; i++) {
2508 if (iwn_bands[band].chan[i] == chan)
2509 return &sc->eeprom_channels[band][i];
2512 for (j = 0; j < 5; j++) {
2513 for (i = 0; i < iwn_bands[j].nchan; i++) {
2514 if (iwn_bands[j].chan[i] == c->ic_ieee)
2515 return &sc->eeprom_channels[j][i];
2523 * Enforce flags read from EEPROM.
2526 iwn_setregdomain(struct ieee80211com *ic, struct ieee80211_regdomain *rd,
2527 int nchan, struct ieee80211_channel chans[])
2529 struct iwn_softc *sc = ic->ic_ifp->if_softc;
2532 for (i = 0; i < nchan; i++) {
2533 struct ieee80211_channel *c = &chans[i];
2534 struct iwn_eeprom_chan *channel;
2536 channel = iwn_find_eeprom_channel(sc, c);
2537 if (channel == NULL) {
2538 if_printf(ic->ic_ifp,
2539 "%s: invalid channel %u freq %u/0x%x\n",
2540 __func__, c->ic_ieee, c->ic_freq, c->ic_flags);
2543 c->ic_flags |= iwn_eeprom_channel_flags(channel);
2550 iwn_read_eeprom_enhinfo(struct iwn_softc *sc)
2552 struct iwn_eeprom_enhinfo enhinfo[35];
2553 struct ifnet *ifp = sc->sc_ifp;
2554 struct ieee80211com *ic = ifp->if_l2com;
2555 struct ieee80211_channel *c;
2561 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s begin\n", __func__);
2563 iwn_read_prom_data(sc, IWN5000_EEPROM_REG, &val, 2);
2564 base = le16toh(val);
2565 iwn_read_prom_data(sc, base + IWN6000_EEPROM_ENHINFO,
2566 enhinfo, sizeof enhinfo);
2568 for (i = 0; i < nitems(enhinfo); i++) {
2569 flags = enhinfo[i].flags;
2570 if (!(flags & IWN_ENHINFO_VALID))
2571 continue; /* Skip invalid entries. */
2574 if (sc->txchainmask & IWN_ANT_A)
2575 maxpwr = MAX(maxpwr, enhinfo[i].chain[0]);
2576 if (sc->txchainmask & IWN_ANT_B)
2577 maxpwr = MAX(maxpwr, enhinfo[i].chain[1]);
2578 if (sc->txchainmask & IWN_ANT_C)
2579 maxpwr = MAX(maxpwr, enhinfo[i].chain[2]);
2580 if (sc->ntxchains == 2)
2581 maxpwr = MAX(maxpwr, enhinfo[i].mimo2);
2582 else if (sc->ntxchains == 3)
2583 maxpwr = MAX(maxpwr, enhinfo[i].mimo3);
2585 for (j = 0; j < ic->ic_nchans; j++) {
2586 c = &ic->ic_channels[j];
2587 if ((flags & IWN_ENHINFO_5GHZ)) {
2588 if (!IEEE80211_IS_CHAN_A(c))
2590 } else if ((flags & IWN_ENHINFO_OFDM)) {
2591 if (!IEEE80211_IS_CHAN_G(c))
2593 } else if (!IEEE80211_IS_CHAN_B(c))
2595 if ((flags & IWN_ENHINFO_HT40)) {
2596 if (!IEEE80211_IS_CHAN_HT40(c))
2599 if (IEEE80211_IS_CHAN_HT40(c))
2602 if (enhinfo[i].chan != 0 &&
2603 enhinfo[i].chan != c->ic_ieee)
2606 DPRINTF(sc, IWN_DEBUG_RESET,
2607 "channel %d(%x), maxpwr %d\n", c->ic_ieee,
2608 c->ic_flags, maxpwr / 2);
2609 c->ic_maxregpower = maxpwr / 2;
2610 c->ic_maxpower = maxpwr;
2614 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s end\n", __func__);
2618 static struct ieee80211_node *
2619 iwn_node_alloc(struct ieee80211vap *vap, const uint8_t mac[IEEE80211_ADDR_LEN])
2621 return kmalloc(sizeof(struct iwn_node), M_80211_NODE,
2622 M_INTWAIT | M_ZERO);
2628 switch (rate & 0xff) {
2629 case 12: return 0xd;
2630 case 18: return 0xf;
2631 case 24: return 0x5;
2632 case 36: return 0x7;
2633 case 48: return 0x9;
2634 case 72: return 0xb;
2635 case 96: return 0x1;
2636 case 108: return 0x3;
2640 case 22: return 110;
2646 * Calculate the required PLCP value from the given rate,
2647 * to the given node.
2649 * This will take the node configuration (eg 11n, rate table
2650 * setup, etc) into consideration.
2653 iwn_rate_to_plcp(struct iwn_softc *sc, struct ieee80211_node *ni,
2656 #define RV(v) ((v) & IEEE80211_RATE_VAL)
2657 struct ieee80211com *ic = ni->ni_ic;
2658 uint8_t txant1, txant2;
2662 /* Use the first valid TX antenna. */
2663 txant1 = IWN_LSB(sc->txchainmask);
2664 txant2 = IWN_LSB(sc->txchainmask & ~txant1);
2667 * If it's an MCS rate, let's set the plcp correctly
2668 * and set the relevant flags based on the node config.
2670 if (rate & IEEE80211_RATE_MCS) {
2672 * Set the initial PLCP value to be between 0->31 for
2673 * MCS 0 -> MCS 31, then set the "I'm an MCS rate!"
2676 plcp = RV(rate) | IWN_RFLAG_MCS;
2679 * XXX the following should only occur if both
2680 * the local configuration _and_ the remote node
2681 * advertise these capabilities. Thus this code
2686 * Set the channel width and guard interval.
2688 if (IEEE80211_IS_CHAN_HT40(ni->ni_chan)) {
2689 plcp |= IWN_RFLAG_HT40;
2690 if (ni->ni_htcap & IEEE80211_HTCAP_SHORTGI40)
2691 plcp |= IWN_RFLAG_SGI;
2692 } else if (ni->ni_htcap & IEEE80211_HTCAP_SHORTGI20) {
2693 plcp |= IWN_RFLAG_SGI;
2697 * If it's a two stream rate, enable TX on both
2700 * XXX three stream rates?
2703 plcp |= IWN_RFLAG_ANT(txant1 | txant2);
2705 plcp |= IWN_RFLAG_ANT(txant1);
2708 * Set the initial PLCP - fine for both
2709 * OFDM and CCK rates.
2711 plcp = rate2plcp(rate);
2713 /* Set CCK flag if it's CCK */
2715 /* XXX It would be nice to have a method
2716 * to map the ridx -> phy table entry
2717 * so we could just query that, rather than
2718 * this hack to check against IWN_RIDX_OFDM6.
2720 ridx = ieee80211_legacy_rate_lookup(ic->ic_rt,
2721 rate & IEEE80211_RATE_VAL);
2722 if (ridx < IWN_RIDX_OFDM6 &&
2723 IEEE80211_IS_CHAN_2GHZ(ni->ni_chan))
2724 plcp |= IWN_RFLAG_CCK;
2726 /* Set antenna configuration */
2727 plcp |= IWN_RFLAG_ANT(txant1);
2730 DPRINTF(sc, IWN_DEBUG_TXRATE, "%s: rate=0x%02x, plcp=0x%08x\n",
2735 return (htole32(plcp));
2740 iwn_newassoc(struct ieee80211_node *ni, int isnew)
2742 /* Doesn't do anything at the moment */
2746 iwn_media_change(struct ifnet *ifp)
2750 error = ieee80211_media_change(ifp);
2751 /* NB: only the fixed rate can change and that doesn't need a reset */
2752 return (error == ENETRESET ? 0 : error);
2756 iwn_newstate(struct ieee80211vap *vap, enum ieee80211_state nstate, int arg)
2758 struct iwn_vap *ivp = IWN_VAP(vap);
2759 struct ieee80211com *ic = vap->iv_ic;
2760 struct iwn_softc *sc = ic->ic_ifp->if_softc;
2763 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s begin\n", __func__);
2765 DPRINTF(sc, IWN_DEBUG_STATE, "%s: %s -> %s\n", __func__,
2766 ieee80211_state_name[vap->iv_state], ieee80211_state_name[nstate]);
2768 callout_stop(&sc->calib_to);
2770 sc->rxon = &sc->rx_on[IWN_RXON_BSS_CTX];
2773 case IEEE80211_S_ASSOC:
2774 if (vap->iv_state != IEEE80211_S_RUN)
2777 case IEEE80211_S_AUTH:
2778 if (vap->iv_state == IEEE80211_S_AUTH)
2782 * !AUTH -> AUTH transition requires state reset to handle
2783 * reassociations correctly.
2785 sc->rxon->associd = 0;
2786 sc->rxon->filter &= ~htole32(IWN_FILTER_BSS);
2787 sc->calib.state = IWN_CALIB_STATE_INIT;
2789 if ((error = iwn_auth(sc, vap)) != 0) {
2790 device_printf(sc->sc_dev,
2791 "%s: could not move to auth state\n", __func__);
2795 case IEEE80211_S_RUN:
2797 * RUN -> RUN transition; Just restart the timers.
2799 if (vap->iv_state == IEEE80211_S_RUN) {
2805 * !RUN -> RUN requires setting the association id
2806 * which is done with a firmware cmd. We also defer
2807 * starting the timers until that work is done.
2809 if ((error = iwn_run(sc, vap)) != 0) {
2810 device_printf(sc->sc_dev,
2811 "%s: could not move to run state\n", __func__);
2815 case IEEE80211_S_INIT:
2816 sc->calib.state = IWN_CALIB_STATE_INIT;
2823 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s end in error\n", __func__);
2827 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s: end\n",__func__);
2829 return ivp->iv_newstate(vap, nstate, arg);
2833 iwn_calib_timeout(void *arg)
2835 struct iwn_softc *sc = arg;
2837 wlan_serialize_enter();
2839 /* Force automatic TX power calibration every 60 secs. */
2840 if (++sc->calib_cnt >= 120) {
2843 DPRINTF(sc, IWN_DEBUG_CALIBRATE, "%s\n",
2844 "sending request for statistics");
2845 (void)iwn_cmd(sc, IWN_CMD_GET_STATISTICS, &flags,
2849 callout_reset(&sc->calib_to, msecs_to_ticks(500), iwn_calib_timeout,
2851 wlan_serialize_exit();
2855 * Process an RX_PHY firmware notification. This is usually immediately
2856 * followed by an MPDU_RX_DONE notification.
2859 iwn_rx_phy(struct iwn_softc *sc, struct iwn_rx_desc *desc,
2860 struct iwn_rx_data *data)
2862 struct iwn_rx_stat *stat = (struct iwn_rx_stat *)(desc + 1);
2864 DPRINTF(sc, IWN_DEBUG_CALIBRATE, "%s: received PHY stats\n", __func__);
2865 bus_dmamap_sync(sc->rxq.data_dmat, data->map, BUS_DMASYNC_POSTREAD);
2867 /* Save RX statistics, they will be used on MPDU_RX_DONE. */
2868 memcpy(&sc->last_rx_stat, stat, sizeof (*stat));
2869 sc->last_rx_valid = 1;
2873 * Process an RX_DONE (4965AGN only) or MPDU_RX_DONE firmware notification.
2874 * Each MPDU_RX_DONE notification must be preceded by an RX_PHY one.
2877 iwn_rx_done(struct iwn_softc *sc, struct iwn_rx_desc *desc,
2878 struct iwn_rx_data *data)
2880 struct iwn_ops *ops = &sc->ops;
2881 struct ifnet *ifp = sc->sc_ifp;
2882 struct ieee80211com *ic = ifp->if_l2com;
2883 struct iwn_rx_ring *ring = &sc->rxq;
2884 struct ieee80211_frame *wh;
2885 struct ieee80211_node *ni;
2886 struct mbuf *m, *m1;
2887 struct iwn_rx_stat *stat;
2891 int error, len, rssi, nf;
2893 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s begin\n", __func__);
2895 if (desc->type == IWN_MPDU_RX_DONE) {
2896 /* Check for prior RX_PHY notification. */
2897 if (!sc->last_rx_valid) {
2898 DPRINTF(sc, IWN_DEBUG_ANY,
2899 "%s: missing RX_PHY\n", __func__);
2902 stat = &sc->last_rx_stat;
2904 stat = (struct iwn_rx_stat *)(desc + 1);
2906 bus_dmamap_sync(ring->data_dmat, data->map, BUS_DMASYNC_POSTREAD);
2908 if (stat->cfg_phy_len > IWN_STAT_MAXLEN) {
2909 device_printf(sc->sc_dev,
2910 "%s: invalid RX statistic header, len %d\n", __func__,
2914 if (desc->type == IWN_MPDU_RX_DONE) {
2915 struct iwn_rx_mpdu *mpdu = (struct iwn_rx_mpdu *)(desc + 1);
2916 head = (caddr_t)(mpdu + 1);
2917 len = le16toh(mpdu->len);
2919 head = (caddr_t)(stat + 1) + stat->cfg_phy_len;
2920 len = le16toh(stat->len);
2923 flags = le32toh(*(uint32_t *)(head + len));
2925 /* Discard frames with a bad FCS early. */
2926 if ((flags & IWN_RX_NOERROR) != IWN_RX_NOERROR) {
2927 DPRINTF(sc, IWN_DEBUG_RECV, "%s: RX flags error %x\n",
2929 IFNET_STAT_INC(ifp, ierrors, 1);
2932 /* Discard frames that are too short. */
2933 if (len < sizeof (*wh)) {
2934 DPRINTF(sc, IWN_DEBUG_RECV, "%s: frame too short: %d\n",
2936 IFNET_STAT_INC(ifp, ierrors, 1);
2940 m1 = m_getjcl(MB_DONTWAIT, MT_DATA, M_PKTHDR, IWN_RBUF_SIZE);
2942 DPRINTF(sc, IWN_DEBUG_ANY, "%s: no mbuf to restock ring\n",
2944 IFNET_STAT_INC(ifp, ierrors, 1);
2947 bus_dmamap_unload(ring->data_dmat, data->map);
2949 error = bus_dmamap_load(ring->data_dmat, data->map, mtod(m1, void *),
2950 IWN_RBUF_SIZE, iwn_dma_map_addr, &paddr, BUS_DMA_NOWAIT);
2951 if (error != 0 && error != EFBIG) {
2952 device_printf(sc->sc_dev,
2953 "%s: bus_dmamap_load failed, error %d\n", __func__, error);
2956 /* Try to reload the old mbuf. */
2957 error = bus_dmamap_load(ring->data_dmat, data->map,
2958 mtod(data->m, void *), IWN_RBUF_SIZE, iwn_dma_map_addr,
2959 &paddr, BUS_DMA_NOWAIT);
2960 if (error != 0 && error != EFBIG) {
2961 panic("%s: could not load old RX mbuf", __func__);
2963 /* Physical address may have changed. */
2964 ring->desc[ring->cur] = htole32(paddr >> 8);
2965 bus_dmamap_sync(ring->data_dmat, ring->desc_dma.map,
2966 BUS_DMASYNC_PREWRITE);
2967 IFNET_STAT_INC(ifp, ierrors, 1);
2973 /* Update RX descriptor. */
2974 ring->desc[ring->cur] = htole32(paddr >> 8);
2975 bus_dmamap_sync(ring->desc_dma.tag, ring->desc_dma.map,
2976 BUS_DMASYNC_PREWRITE);
2978 /* Finalize mbuf. */
2979 m->m_pkthdr.rcvif = ifp;
2981 m->m_pkthdr.len = m->m_len = len;
2983 /* Grab a reference to the source node. */
2984 wh = mtod(m, struct ieee80211_frame *);
2985 ni = ieee80211_find_rxnode(ic, (struct ieee80211_frame_min *)wh);
2986 nf = (ni != NULL && ni->ni_vap->iv_state == IEEE80211_S_RUN &&
2987 (ic->ic_flags & IEEE80211_F_SCAN) == 0) ? sc->noise : -95;
2989 rssi = ops->get_rssi(sc, stat);
2991 if (ieee80211_radiotap_active(ic)) {
2992 struct iwn_rx_radiotap_header *tap = &sc->sc_rxtap;
2995 if (stat->flags & htole16(IWN_STAT_FLAG_SHPREAMBLE))
2996 tap->wr_flags |= IEEE80211_RADIOTAP_F_SHORTPRE;
2997 tap->wr_dbm_antsignal = (int8_t)rssi;
2998 tap->wr_dbm_antnoise = (int8_t)nf;
2999 tap->wr_tsft = stat->tstamp;
3000 switch (stat->rate) {
3002 case 10: tap->wr_rate = 2; break;
3003 case 20: tap->wr_rate = 4; break;
3004 case 55: tap->wr_rate = 11; break;
3005 case 110: tap->wr_rate = 22; break;
3007 case 0xd: tap->wr_rate = 12; break;
3008 case 0xf: tap->wr_rate = 18; break;
3009 case 0x5: tap->wr_rate = 24; break;
3010 case 0x7: tap->wr_rate = 36; break;
3011 case 0x9: tap->wr_rate = 48; break;
3012 case 0xb: tap->wr_rate = 72; break;
3013 case 0x1: tap->wr_rate = 96; break;
3014 case 0x3: tap->wr_rate = 108; break;
3015 /* Unknown rate: should not happen. */
3016 default: tap->wr_rate = 0;
3020 /* Send the frame to the 802.11 layer. */
3022 if (ni->ni_flags & IEEE80211_NODE_HT)
3023 m->m_flags |= M_AMPDU;
3024 (void)ieee80211_input(ni, m, rssi - nf, nf);
3025 /* Node is no longer needed. */
3026 ieee80211_free_node(ni);
3028 (void)ieee80211_input_all(ic, m, rssi - nf, nf);
3031 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s: end\n",__func__);
3035 /* Process an incoming Compressed BlockAck. */
3037 iwn_rx_compressed_ba(struct iwn_softc *sc, struct iwn_rx_desc *desc,
3038 struct iwn_rx_data *data)
3040 struct iwn_ops *ops = &sc->ops;
3041 struct ifnet *ifp = sc->sc_ifp;
3042 struct iwn_node *wn;
3043 struct ieee80211_node *ni;
3044 struct iwn_compressed_ba *ba = (struct iwn_compressed_ba *)(desc + 1);
3045 struct iwn_tx_ring *txq;
3046 struct iwn_tx_data *txdata;
3047 struct ieee80211_tx_ampdu *tap;
3052 int ackfailcnt = 0, i, lastidx, qid, *res, shift;
3054 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s begin\n", __func__);
3056 bus_dmamap_sync(sc->rxq.data_dmat, data->map, BUS_DMASYNC_POSTREAD);
3058 qid = le16toh(ba->qid);
3059 txq = &sc->txq[ba->qid];
3060 tap = sc->qid2tap[ba->qid];
3062 wn = (void *)tap->txa_ni;
3066 if (!IEEE80211_AMPDU_RUNNING(tap)) {
3067 res = tap->txa_private;
3068 ssn = tap->txa_start & 0xfff;
3071 for (lastidx = le16toh(ba->ssn) & 0xff; txq->read != lastidx;) {
3072 txdata = &txq->data[txq->read];
3074 /* Unmap and free mbuf. */
3075 bus_dmamap_sync(txq->data_dmat, txdata->map,
3076 BUS_DMASYNC_POSTWRITE);
3077 bus_dmamap_unload(txq->data_dmat, txdata->map);
3078 m = txdata->m, txdata->m = NULL;
3079 ni = txdata->ni, txdata->ni = NULL;
3081 KASSERT(ni != NULL, ("no node"));
3082 KASSERT(m != NULL, ("no mbuf"));
3084 ieee80211_tx_complete(ni, m, 1);
3087 txq->read = (txq->read + 1) % IWN_TX_RING_COUNT;
3090 if (txq->queued == 0 && res != NULL) {
3092 ops->ampdu_tx_stop(sc, qid, tid, ssn);
3094 sc->qid2tap[qid] = NULL;
3095 kfree(res, M_DEVBUF);
3099 if (wn->agg[tid].bitmap == 0)
3102 shift = wn->agg[tid].startidx - ((le16toh(ba->seq) >> 4) & 0xff);
3106 if (wn->agg[tid].nframes > (64 - shift))
3110 bitmap = (le64toh(ba->bitmap) >> shift) & wn->agg[tid].bitmap;
3111 for (i = 0; bitmap; i++) {
3112 if ((bitmap & 1) == 0) {
3113 IFNET_STAT_INC(ifp, oerrors, 1);
3114 ieee80211_ratectl_tx_complete(ni->ni_vap, ni,
3115 IEEE80211_RATECTL_TX_FAILURE, &ackfailcnt, NULL);
3117 IFNET_STAT_INC(ifp, opackets, 1);
3118 ieee80211_ratectl_tx_complete(ni->ni_vap, ni,
3119 IEEE80211_RATECTL_TX_SUCCESS, &ackfailcnt, NULL);
3124 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s: end\n",__func__);
3129 * Process a CALIBRATION_RESULT notification sent by the initialization
3130 * firmware on response to a CMD_CALIB_CONFIG command (5000 only).
3133 iwn5000_rx_calib_results(struct iwn_softc *sc, struct iwn_rx_desc *desc,
3134 struct iwn_rx_data *data)
3136 struct iwn_phy_calib *calib = (struct iwn_phy_calib *)(desc + 1);
3139 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s begin\n", __func__);
3141 /* Runtime firmware should not send such a notification. */
3142 if (sc->sc_flags & IWN_FLAG_CALIB_DONE){
3143 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s received after clib done\n",
3147 len = (le32toh(desc->len) & 0x3fff) - 4;
3148 bus_dmamap_sync(sc->rxq.data_dmat, data->map, BUS_DMASYNC_POSTREAD);
3150 switch (calib->code) {
3151 case IWN5000_PHY_CALIB_DC:
3152 if (sc->base_params->calib_need & IWN_FLG_NEED_PHY_CALIB_DC)
3155 case IWN5000_PHY_CALIB_LO:
3156 if (sc->base_params->calib_need & IWN_FLG_NEED_PHY_CALIB_LO)
3159 case IWN5000_PHY_CALIB_TX_IQ:
3160 if (sc->base_params->calib_need & IWN_FLG_NEED_PHY_CALIB_TX_IQ)
3163 case IWN5000_PHY_CALIB_TX_IQ_PERIODIC:
3164 if (sc->base_params->calib_need & IWN_FLG_NEED_PHY_CALIB_TX_IQ_PERIODIC)
3167 case IWN5000_PHY_CALIB_BASE_BAND:
3168 if (sc->base_params->calib_need & IWN_FLG_NEED_PHY_CALIB_BASE_BAND)
3172 if (idx == -1) /* Ignore other results. */
3175 /* Save calibration result. */
3176 if (sc->calibcmd[idx].buf != NULL)
3177 kfree(sc->calibcmd[idx].buf, M_DEVBUF);
3178 sc->calibcmd[idx].buf = kmalloc(len, M_DEVBUF, M_INTWAIT);
3179 DPRINTF(sc, IWN_DEBUG_CALIBRATE,
3180 "saving calibration result idx=%d, code=%d len=%d\n", idx, calib->code, len);
3181 sc->calibcmd[idx].len = len;
3182 memcpy(sc->calibcmd[idx].buf, calib, len);
3186 * Process an RX_STATISTICS or BEACON_STATISTICS firmware notification.
3187 * The latter is sent by the firmware after each received beacon.
3190 iwn_rx_statistics(struct iwn_softc *sc, struct iwn_rx_desc *desc,
3191 struct iwn_rx_data *data)
3193 struct iwn_ops *ops = &sc->ops;
3194 struct ifnet *ifp = sc->sc_ifp;
3195 struct ieee80211com *ic = ifp->if_l2com;
3196 struct ieee80211vap *vap = TAILQ_FIRST(&ic->ic_vaps);
3197 struct iwn_calib_state *calib = &sc->calib;
3198 struct iwn_stats *stats = (struct iwn_stats *)(desc + 1);
3201 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s begin\n", __func__);
3203 /* Ignore statistics received during a scan. */
3204 if (vap->iv_state != IEEE80211_S_RUN ||
3205 (ic->ic_flags & IEEE80211_F_SCAN)){
3206 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s received during calib\n",
3211 bus_dmamap_sync(sc->rxq.data_dmat, data->map, BUS_DMASYNC_POSTREAD);
3213 DPRINTF(sc, IWN_DEBUG_CALIBRATE, "%s: received statistics, cmd %d\n",
3214 __func__, desc->type);
3215 sc->calib_cnt = 0; /* Reset TX power calibration timeout. */
3217 /* Test if temperature has changed. */
3218 if (stats->general.temp != sc->rawtemp) {
3219 /* Convert "raw" temperature to degC. */
3220 sc->rawtemp = stats->general.temp;
3221 temp = ops->get_temperature(sc);
3222 DPRINTF(sc, IWN_DEBUG_CALIBRATE, "%s: temperature %d\n",
3225 /* Update TX power if need be (4965AGN only). */
3226 if (sc->hw_type == IWN_HW_REV_TYPE_4965)
3227 iwn4965_power_calibration(sc, temp);
3230 if (desc->type != IWN_BEACON_STATISTICS)
3231 return; /* Reply to a statistics request. */
3233 sc->noise = iwn_get_noise(&stats->rx.general);
3234 DPRINTF(sc, IWN_DEBUG_CALIBRATE, "%s: noise %d\n", __func__, sc->noise);
3236 /* Test that RSSI and noise are present in stats report. */
3237 if (le32toh(stats->rx.general.flags) != 1) {
3238 DPRINTF(sc, IWN_DEBUG_ANY, "%s\n",
3239 "received statistics without RSSI");
3243 if (calib->state == IWN_CALIB_STATE_ASSOC)
3244 iwn_collect_noise(sc, &stats->rx.general);
3245 else if (calib->state == IWN_CALIB_STATE_RUN)
3246 iwn_tune_sensitivity(sc, &stats->rx);
3248 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s: end\n",__func__);
3252 * Process a TX_DONE firmware notification. Unfortunately, the 4965AGN
3253 * and 5000 adapters have different incompatible TX status formats.
3256 iwn4965_tx_done(struct iwn_softc *sc, struct iwn_rx_desc *desc,
3257 struct iwn_rx_data *data)
3259 struct iwn4965_tx_stat *stat = (struct iwn4965_tx_stat *)(desc + 1);
3260 struct iwn_tx_ring *ring;
3263 qid = desc->qid & 0xf;
3264 ring = &sc->txq[qid];
3266 DPRINTF(sc, IWN_DEBUG_XMIT, "%s: "
3267 "qid %d idx %d retries %d nkill %d rate %x duration %d status %x\n",
3268 __func__, desc->qid, desc->idx, stat->ackfailcnt,
3269 stat->btkillcnt, stat->rate, le16toh(stat->duration),
3270 le32toh(stat->status));
3272 bus_dmamap_sync(ring->data_dmat, data->map, BUS_DMASYNC_POSTREAD);
3273 if (qid >= sc->firstaggqueue) {
3274 iwn_ampdu_tx_done(sc, qid, desc->idx, stat->nframes,
3277 iwn_tx_done(sc, desc, stat->ackfailcnt,
3278 le32toh(stat->status) & 0xff);
3283 iwn5000_tx_done(struct iwn_softc *sc, struct iwn_rx_desc *desc,
3284 struct iwn_rx_data *data)
3286 struct iwn5000_tx_stat *stat = (struct iwn5000_tx_stat *)(desc + 1);
3287 struct iwn_tx_ring *ring;
3290 qid = desc->qid & 0xf;
3291 ring = &sc->txq[qid];
3293 DPRINTF(sc, IWN_DEBUG_XMIT, "%s: "
3294 "qid %d idx %d retries %d nkill %d rate %x duration %d status %x\n",
3295 __func__, desc->qid, desc->idx, stat->ackfailcnt,
3296 stat->btkillcnt, stat->rate, le16toh(stat->duration),
3297 le32toh(stat->status));
3300 /* Reset TX scheduler slot. */
3301 iwn5000_reset_sched(sc, desc->qid & 0xf, desc->idx);
3304 bus_dmamap_sync(ring->data_dmat, data->map, BUS_DMASYNC_POSTREAD);
3305 if (qid >= sc->firstaggqueue) {
3306 iwn_ampdu_tx_done(sc, qid, desc->idx, stat->nframes,
3309 iwn_tx_done(sc, desc, stat->ackfailcnt,
3310 le16toh(stat->status) & 0xff);
3315 * Adapter-independent backend for TX_DONE firmware notifications.
3318 iwn_tx_done(struct iwn_softc *sc, struct iwn_rx_desc *desc, int ackfailcnt,
3321 struct ifnet *ifp = sc->sc_ifp;
3322 struct iwn_tx_ring *ring = &sc->txq[desc->qid & 0xf];
3323 struct iwn_tx_data *data = &ring->data[desc->idx];
3325 struct ieee80211_node *ni;
3326 struct ieee80211vap *vap;
3328 KASSERT(data->ni != NULL, ("no node"));
3330 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s begin\n", __func__);
3332 /* Unmap and free mbuf. */
3333 bus_dmamap_sync(ring->data_dmat, data->map, BUS_DMASYNC_POSTWRITE);
3334 bus_dmamap_unload(ring->data_dmat, data->map);
3335 m = data->m, data->m = NULL;
3336 ni = data->ni, data->ni = NULL;
3340 * Update rate control statistics for the node.
3342 if (status & IWN_TX_FAIL) {
3343 IFNET_STAT_INC(ifp, oerrors, 1);
3344 ieee80211_ratectl_tx_complete(vap, ni,
3345 IEEE80211_RATECTL_TX_FAILURE, &ackfailcnt, NULL);
3347 IFNET_STAT_INC(ifp, opackets, 1);
3348 ieee80211_ratectl_tx_complete(vap, ni,
3349 IEEE80211_RATECTL_TX_SUCCESS, &ackfailcnt, NULL);
3353 * Channels marked for "radar" require traffic to be received
3354 * to unlock before we can transmit. Until traffic is seen
3355 * any attempt to transmit is returned immediately with status
3356 * set to IWN_TX_FAIL_TX_LOCKED. Unfortunately this can easily
3357 * happen on first authenticate after scanning. To workaround
3358 * this we ignore a failure of this sort in AUTH state so the
3359 * 802.11 layer will fall back to using a timeout to wait for
3360 * the AUTH reply. This allows the firmware time to see
3361 * traffic so a subsequent retry of AUTH succeeds. It's
3362 * unclear why the firmware does not maintain state for
3363 * channels recently visited as this would allow immediate
3364 * use of the channel after a scan (where we see traffic).
3366 if (status == IWN_TX_FAIL_TX_LOCKED &&
3367 ni->ni_vap->iv_state == IEEE80211_S_AUTH)
3368 ieee80211_tx_complete(ni, m, 0);
3370 ieee80211_tx_complete(ni, m,
3371 (status & IWN_TX_FAIL) != 0);
3373 sc->sc_tx_timer = 0;
3374 if (--ring->queued < IWN_TX_RING_LOMARK) {
3375 sc->qfullmsk &= ~(1 << ring->qid);
3376 if (sc->qfullmsk == 0 && ifq_is_oactive(&ifp->if_snd)) {
3377 ifq_clr_oactive(&ifp->if_snd);
3378 iwn_start_locked(ifp);
3382 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s: end\n",__func__);
3387 * Process a "command done" firmware notification. This is where we wakeup
3388 * processes waiting for a synchronous command completion.
3391 iwn_cmd_done(struct iwn_softc *sc, struct iwn_rx_desc *desc)
3393 struct iwn_tx_ring *ring;
3394 struct iwn_tx_data *data;
3397 if (sc->sc_flags & IWN_FLAG_PAN_SUPPORT)
3398 cmd_queue_num = IWN_PAN_CMD_QUEUE;
3400 cmd_queue_num = IWN_CMD_QUEUE_NUM;
3402 if ((desc->qid & IWN_RX_DESC_QID_MSK) != cmd_queue_num)
3403 return; /* Not a command ack. */
3405 ring = &sc->txq[cmd_queue_num];
3406 data = &ring->data[desc->idx];
3408 /* If the command was mapped in an mbuf, free it. */
3409 if (data->m != NULL) {
3410 bus_dmamap_sync(ring->data_dmat, data->map,
3411 BUS_DMASYNC_POSTWRITE);
3412 bus_dmamap_unload(ring->data_dmat, data->map);
3416 wakeup(&ring->desc[desc->idx]);
3420 iwn_ampdu_tx_done(struct iwn_softc *sc, int qid, int idx, int nframes,
3423 struct iwn_ops *ops = &sc->ops;
3424 struct ifnet *ifp = sc->sc_ifp;
3425 struct iwn_tx_ring *ring = &sc->txq[qid];
3426 struct iwn_tx_data *data;
3428 struct iwn_node *wn;
3429 struct ieee80211_node *ni;
3430 struct ieee80211_tx_ampdu *tap;
3432 uint32_t *status = stat;
3433 uint16_t *aggstatus = stat;
3436 int bit, i, lastidx, *res, seqno, shift, start;
3438 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s begin\n", __func__);
3441 if ((*status & 0xff) != 1 && (*status & 0xff) != 2) {
3443 kprintf("ieee80211_send_bar()\n");
3446 * If we completely fail a transmit, make sure a
3447 * notification is pushed up to the rate control
3450 tap = sc->qid2tap[qid];
3452 wn = (void *)tap->txa_ni;
3454 ieee80211_ratectl_tx_complete(ni->ni_vap, ni,
3455 IEEE80211_RATECTL_TX_FAILURE, &nframes, NULL);
3461 for (i = 0; i < nframes; i++) {
3462 if (le16toh(aggstatus[i * 2]) & 0xc)
3465 idx = le16toh(aggstatus[2*i + 1]) & 0xff;
3469 shift = 0x100 - idx + start;
3472 } else if (bit <= -64)
3473 bit = 0x100 - start + idx;
3475 shift = start - idx;
3479 bitmap = bitmap << shift;
3480 bitmap |= 1ULL << bit;
3482 tap = sc->qid2tap[qid];
3484 wn = (void *)tap->txa_ni;
3485 wn->agg[tid].bitmap = bitmap;
3486 wn->agg[tid].startidx = start;
3487 wn->agg[tid].nframes = nframes;
3491 if (!IEEE80211_AMPDU_RUNNING(tap)) {
3492 res = tap->txa_private;
3493 ssn = tap->txa_start & 0xfff;
3496 seqno = le32toh(*(status + nframes)) & 0xfff;
3497 for (lastidx = (seqno & 0xff); ring->read != lastidx;) {
3498 data = &ring->data[ring->read];
3500 /* Unmap and free mbuf. */
3501 bus_dmamap_sync(ring->data_dmat, data->map,
3502 BUS_DMASYNC_POSTWRITE);
3503 bus_dmamap_unload(ring->data_dmat, data->map);
3504 m = data->m, data->m = NULL;
3505 ni = data->ni, data->ni = NULL;
3507 KASSERT(ni != NULL, ("no node"));
3508 KASSERT(m != NULL, ("no mbuf"));
3510 ieee80211_tx_complete(ni, m, 1);
3513 ring->read = (ring->read + 1) % IWN_TX_RING_COUNT;
3516 if (ring->queued == 0 && res != NULL) {
3518 ops->ampdu_tx_stop(sc, qid, tid, ssn);
3520 sc->qid2tap[qid] = NULL;
3521 kfree(res, M_DEVBUF);
3525 sc->sc_tx_timer = 0;
3526 if (ring->queued < IWN_TX_RING_LOMARK) {
3527 sc->qfullmsk &= ~(1 << ring->qid);
3528 if (sc->qfullmsk == 0 && ifq_is_oactive(&ifp->if_snd)) {
3529 ifq_clr_oactive(&ifp->if_snd);
3530 iwn_start_locked(ifp);
3534 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s: end\n",__func__);
3539 * Process an INT_FH_RX or INT_SW_RX interrupt.
3542 iwn_notif_intr(struct iwn_softc *sc)
3544 struct iwn_ops *ops = &sc->ops;
3545 struct ifnet *ifp = sc->sc_ifp;
3546 struct ieee80211com *ic = ifp->if_l2com;
3547 struct ieee80211vap *vap = TAILQ_FIRST(&ic->ic_vaps);
3550 bus_dmamap_sync(sc->rxq.stat_dma.tag, sc->rxq.stat_dma.map,
3551 BUS_DMASYNC_POSTREAD);
3553 hw = le16toh(sc->rxq.stat->closed_count) & 0xfff;
3554 while (sc->rxq.cur != hw) {
3555 struct iwn_rx_data *data = &sc->rxq.data[sc->rxq.cur];
3556 struct iwn_rx_desc *desc;
3558 bus_dmamap_sync(sc->rxq.data_dmat, data->map,
3559 BUS_DMASYNC_POSTREAD);
3560 desc = mtod(data->m, struct iwn_rx_desc *);
3562 DPRINTF(sc, IWN_DEBUG_RECV,
3563 "%s: qid %x idx %d flags %x type %d(%s) len %d\n",
3564 __func__, desc->qid & 0xf, desc->idx, desc->flags,
3565 desc->type, iwn_intr_str(desc->type),
3566 le16toh(desc->len));
3568 if (!(desc->qid & IWN_UNSOLICITED_RX_NOTIF)) /* Reply to a command. */
3569 iwn_cmd_done(sc, desc);
3571 switch (desc->type) {
3573 iwn_rx_phy(sc, desc, data);
3576 case IWN_RX_DONE: /* 4965AGN only. */
3577 case IWN_MPDU_RX_DONE:
3578 /* An 802.11 frame has been received. */
3579 iwn_rx_done(sc, desc, data);
3582 case IWN_RX_COMPRESSED_BA:
3583 /* A Compressed BlockAck has been received. */
3584 iwn_rx_compressed_ba(sc, desc, data);
3588 /* An 802.11 frame has been transmitted. */
3589 ops->tx_done(sc, desc, data);
3592 case IWN_RX_STATISTICS:
3593 case IWN_BEACON_STATISTICS:
3594 iwn_rx_statistics(sc, desc, data);
3597 case IWN_BEACON_MISSED:
3599 struct iwn_beacon_missed *miss =
3600 (struct iwn_beacon_missed *)(desc + 1);
3603 bus_dmamap_sync(sc->rxq.data_dmat, data->map,
3604 BUS_DMASYNC_POSTREAD);
3605 misses = le32toh(miss->consecutive);
3607 DPRINTF(sc, IWN_DEBUG_STATE,
3608 "%s: beacons missed %d/%d\n", __func__,
3609 misses, le32toh(miss->total));
3611 * If more than 5 consecutive beacons are missed,
3612 * reinitialize the sensitivity state machine.
3614 if (vap->iv_state == IEEE80211_S_RUN &&
3615 (ic->ic_flags & IEEE80211_F_SCAN) == 0) {
3617 (void)iwn_init_sensitivity(sc);
3618 if (misses >= vap->iv_bmissthreshold) {
3619 ieee80211_beacon_miss(ic);
3626 struct iwn_ucode_info *uc =
3627 (struct iwn_ucode_info *)(desc + 1);
3629 /* The microcontroller is ready. */
3630 bus_dmamap_sync(sc->rxq.data_dmat, data->map,
3631 BUS_DMASYNC_POSTREAD);
3632 DPRINTF(sc, IWN_DEBUG_RESET,
3633 "microcode alive notification version=%d.%d "
3634 "subtype=%x alive=%x\n", uc->major, uc->minor,
3635 uc->subtype, le32toh(uc->valid));
3637 if (le32toh(uc->valid) != 1) {
3638 device_printf(sc->sc_dev,
3639 "microcontroller initialization failed");
3642 if (uc->subtype == IWN_UCODE_INIT) {
3643 /* Save microcontroller report. */
3644 memcpy(&sc->ucode_info, uc, sizeof (*uc));
3646 /* Save the address of the error log in SRAM. */
3647 sc->errptr = le32toh(uc->errptr);
3650 case IWN_STATE_CHANGED:
3653 * State change allows hardware switch change to be
3654 * noted. However, we handle this in iwn_intr as we
3655 * get both the enable/disble intr.
3657 bus_dmamap_sync(sc->rxq.data_dmat, data->map,
3658 BUS_DMASYNC_POSTREAD);
3660 uint32_t *status = (uint32_t *)(desc + 1);
3661 DPRINTF(sc, IWN_DEBUG_INTR, "state changed to %x\n",
3666 case IWN_START_SCAN:
3668 bus_dmamap_sync(sc->rxq.data_dmat, data->map,
3669 BUS_DMASYNC_POSTREAD);
3671 struct iwn_start_scan *scan =
3672 (struct iwn_start_scan *)(desc + 1);
3673 DPRINTF(sc, IWN_DEBUG_ANY,
3674 "%s: scanning channel %d status %x\n",
3675 __func__, scan->chan, le32toh(scan->status));
3681 bus_dmamap_sync(sc->rxq.data_dmat, data->map,
3682 BUS_DMASYNC_POSTREAD);
3684 struct iwn_stop_scan *scan =
3685 (struct iwn_stop_scan *)(desc + 1);
3686 DPRINTF(sc, IWN_DEBUG_STATE,
3687 "scan finished nchan=%d status=%d chan=%d\n",
3688 scan->nchan, scan->status, scan->chan);
3691 ieee80211_scan_next(vap);
3694 case IWN5000_CALIBRATION_RESULT:
3695 iwn5000_rx_calib_results(sc, desc, data);
3698 case IWN5000_CALIBRATION_DONE:
3699 sc->sc_flags |= IWN_FLAG_CALIB_DONE;
3704 sc->rxq.cur = (sc->rxq.cur + 1) % IWN_RX_RING_COUNT;
3707 /* Tell the firmware what we have processed. */
3708 hw = (hw == 0) ? IWN_RX_RING_COUNT - 1 : hw - 1;
3709 IWN_WRITE(sc, IWN_FH_RX_WPTR, hw & ~7);
3713 * Process an INT_WAKEUP interrupt raised when the microcontroller wakes up
3714 * from power-down sleep mode.
3717 iwn_wakeup_intr(struct iwn_softc *sc)
3721 DPRINTF(sc, IWN_DEBUG_RESET, "%s: ucode wakeup from power-down sleep\n",
3724 /* Wakeup RX and TX rings. */
3725 IWN_WRITE(sc, IWN_FH_RX_WPTR, sc->rxq.cur & ~7);
3726 for (qid = 0; qid < sc->ntxqs; qid++) {
3727 struct iwn_tx_ring *ring = &sc->txq[qid];
3728 IWN_WRITE(sc, IWN_HBUS_TARG_WRPTR, qid << 8 | ring->cur);
3733 iwn_rftoggle_intr(struct iwn_softc *sc)
3735 struct ifnet *ifp = sc->sc_ifp;
3736 struct ieee80211com *ic = ifp->if_l2com;
3737 uint32_t tmp = IWN_READ(sc, IWN_GP_CNTRL);
3739 device_printf(sc->sc_dev, "RF switch: radio %s\n",
3740 (tmp & IWN_GP_CNTRL_RFKILL) ? "enabled" : "disabled");
3741 if (tmp & IWN_GP_CNTRL_RFKILL)
3742 ieee80211_runtask(ic, &sc->sc_radioon_task);
3744 ieee80211_runtask(ic, &sc->sc_radiooff_task);
3748 * Dump the error log of the firmware when a firmware panic occurs. Although
3749 * we can't debug the firmware because it is neither open source nor free, it
3750 * can help us to identify certain classes of problems.
3753 iwn_fatal_intr(struct iwn_softc *sc)
3755 struct iwn_fw_dump dump;
3758 /* Force a complete recalibration on next init. */
3759 sc->sc_flags &= ~IWN_FLAG_CALIB_DONE;
3761 /* Check that the error log address is valid. */
3762 if (sc->errptr < IWN_FW_DATA_BASE ||
3763 sc->errptr + sizeof (dump) >
3764 IWN_FW_DATA_BASE + sc->fw_data_maxsz) {
3765 kprintf("%s: bad firmware error log address 0x%08x\n", __func__,
3769 if (iwn_nic_lock(sc) != 0) {
3770 kprintf("%s: could not read firmware error log\n", __func__);
3773 /* Read firmware error log from SRAM. */
3774 iwn_mem_read_region_4(sc, sc->errptr, (uint32_t *)&dump,
3775 sizeof (dump) / sizeof (uint32_t));
3778 if (dump.valid == 0) {
3779 kprintf("%s: firmware error log is empty\n", __func__);
3782 kprintf("firmware error log:\n");
3783 kprintf(" error type = \"%s\" (0x%08X)\n",
3784 (dump.id < nitems(iwn_fw_errmsg)) ?
3785 iwn_fw_errmsg[dump.id] : "UNKNOWN",
3787 kprintf(" program counter = 0x%08X\n", dump.pc);
3788 kprintf(" source line = 0x%08X\n", dump.src_line);
3789 kprintf(" error data = 0x%08X%08X\n",
3790 dump.error_data[0], dump.error_data[1]);
3791 kprintf(" branch link = 0x%08X%08X\n",
3792 dump.branch_link[0], dump.branch_link[1]);
3793 kprintf(" interrupt link = 0x%08X%08X\n",
3794 dump.interrupt_link[0], dump.interrupt_link[1]);
3795 kprintf(" time = %u\n", dump.time[0]);
3797 /* Dump driver status (TX and RX rings) while we're here. */
3798 kprintf("driver status:\n");
3799 for (i = 0; i < sc->ntxqs; i++) {
3800 struct iwn_tx_ring *ring = &sc->txq[i];
3801 kprintf(" tx ring %2d: qid=%-2d cur=%-3d queued=%-3d\n",
3802 i, ring->qid, ring->cur, ring->queued);
3804 kprintf(" rx ring: cur=%d\n", sc->rxq.cur);
3810 struct iwn_softc *sc = arg;
3811 struct ifnet *ifp = sc->sc_ifp;
3812 uint32_t r1, r2, tmp;
3814 /* Disable interrupts. */
3815 IWN_WRITE(sc, IWN_INT_MASK, 0);
3817 /* Read interrupts from ICT (fast) or from registers (slow). */
3818 if (sc->sc_flags & IWN_FLAG_USE_ICT) {
3820 while (sc->ict[sc->ict_cur] != 0) {
3821 tmp |= sc->ict[sc->ict_cur];
3822 sc->ict[sc->ict_cur] = 0; /* Acknowledge. */
3823 sc->ict_cur = (sc->ict_cur + 1) % IWN_ICT_COUNT;
3826 if (tmp == 0xffffffff) /* Shouldn't happen. */
3828 else if (tmp & 0xc0000) /* Workaround a HW bug. */
3830 r1 = (tmp & 0xff00) << 16 | (tmp & 0xff);
3831 r2 = 0; /* Unused. */
3833 r1 = IWN_READ(sc, IWN_INT);
3834 if (r1 == 0xffffffff || (r1 & 0xfffffff0) == 0xa5a5a5a0)
3835 return; /* Hardware gone! */
3836 r2 = IWN_READ(sc, IWN_FH_INT);
3839 DPRINTF(sc, IWN_DEBUG_INTR, "interrupt reg1=0x%08x reg2=0x%08x\n"
3842 if (r1 == 0 && r2 == 0)
3843 goto done; /* Interrupt not for us. */
3845 /* Acknowledge interrupts. */
3846 IWN_WRITE(sc, IWN_INT, r1);
3847 if (!(sc->sc_flags & IWN_FLAG_USE_ICT))
3848 IWN_WRITE(sc, IWN_FH_INT, r2);
3850 if (r1 & IWN_INT_RF_TOGGLED) {
3851 iwn_rftoggle_intr(sc);
3854 if (r1 & IWN_INT_CT_REACHED) {
3855 device_printf(sc->sc_dev, "%s: critical temperature reached!\n",
3858 if (r1 & (IWN_INT_SW_ERR | IWN_INT_HW_ERR)) {
3859 device_printf(sc->sc_dev, "%s: fatal firmware error\n",
3862 iwn_debug_register(sc);
3864 /* Dump firmware error log and stop. */
3866 ifp->if_flags &= ~IFF_UP;
3867 iwn_stop_locked(sc);
3870 if ((r1 & (IWN_INT_FH_RX | IWN_INT_SW_RX | IWN_INT_RX_PERIODIC)) ||
3871 (r2 & IWN_FH_INT_RX)) {
3872 if (sc->sc_flags & IWN_FLAG_USE_ICT) {
3873 if (r1 & (IWN_INT_FH_RX | IWN_INT_SW_RX))
3874 IWN_WRITE(sc, IWN_FH_INT, IWN_FH_INT_RX);
3875 IWN_WRITE_1(sc, IWN_INT_PERIODIC,
3876 IWN_INT_PERIODIC_DIS);
3878 if (r1 & (IWN_INT_FH_RX | IWN_INT_SW_RX)) {
3879 IWN_WRITE_1(sc, IWN_INT_PERIODIC,
3880 IWN_INT_PERIODIC_ENA);
3886 if ((r1 & IWN_INT_FH_TX) || (r2 & IWN_FH_INT_TX)) {
3887 if (sc->sc_flags & IWN_FLAG_USE_ICT)
3888 IWN_WRITE(sc, IWN_FH_INT, IWN_FH_INT_TX);
3889 wakeup(sc); /* FH DMA transfer completed. */
3892 if (r1 & IWN_INT_ALIVE)
3893 wakeup(sc); /* Firmware is alive. */
3895 if (r1 & IWN_INT_WAKEUP)
3896 iwn_wakeup_intr(sc);
3899 /* Re-enable interrupts. */
3900 if (ifp->if_flags & IFF_UP)
3901 IWN_WRITE(sc, IWN_INT_MASK, sc->int_mask);
3905 * Update TX scheduler ring when transmitting an 802.11 frame (4965AGN and
3906 * 5000 adapters use a slightly different format).
3909 iwn4965_update_sched(struct iwn_softc *sc, int qid, int idx, uint8_t id,
3912 uint16_t *w = &sc->sched[qid * IWN4965_SCHED_COUNT + idx];
3914 DPRINTF(sc, IWN_DEBUG_TRACE, "->Doing %s\n", __func__);
3916 *w = htole16(len + 8);
3917 bus_dmamap_sync(sc->sched_dma.tag, sc->sched_dma.map,
3918 BUS_DMASYNC_PREWRITE);
3919 if (idx < IWN_SCHED_WINSZ) {
3920 *(w + IWN_TX_RING_COUNT) = *w;
3921 bus_dmamap_sync(sc->sched_dma.tag, sc->sched_dma.map,
3922 BUS_DMASYNC_PREWRITE);
3927 iwn5000_update_sched(struct iwn_softc *sc, int qid, int idx, uint8_t id,
3930 uint16_t *w = &sc->sched[qid * IWN5000_SCHED_COUNT + idx];
3932 DPRINTF(sc, IWN_DEBUG_TRACE, "->Doing %s\n", __func__);
3934 *w = htole16(id << 12 | (len + 8));
3935 bus_dmamap_sync(sc->sched_dma.tag, sc->sched_dma.map,
3936 BUS_DMASYNC_PREWRITE);
3937 if (idx < IWN_SCHED_WINSZ) {
3938 *(w + IWN_TX_RING_COUNT) = *w;
3939 bus_dmamap_sync(sc->sched_dma.tag, sc->sched_dma.map,
3940 BUS_DMASYNC_PREWRITE);
3946 iwn5000_reset_sched(struct iwn_softc *sc, int qid, int idx)
3948 uint16_t *w = &sc->sched[qid * IWN5000_SCHED_COUNT + idx];
3950 DPRINTF(sc, IWN_DEBUG_TRACE, "->Doing %s\n", __func__);
3952 *w = (*w & htole16(0xf000)) | htole16(1);
3953 bus_dmamap_sync(sc->sched_dma.tag, sc->sched_dma.map,
3954 BUS_DMASYNC_PREWRITE);
3955 if (idx < IWN_SCHED_WINSZ) {
3956 *(w + IWN_TX_RING_COUNT) = *w;
3957 bus_dmamap_sync(sc->sched_dma.tag, sc->sched_dma.map,
3958 BUS_DMASYNC_PREWRITE);
3964 * Check whether OFDM 11g protection will be enabled for the given rate.
3966 * The original driver code only enabled protection for OFDM rates.
3967 * It didn't check to see whether it was operating in 11a or 11bg mode.
3970 iwn_check_rate_needs_protection(struct iwn_softc *sc,
3971 struct ieee80211vap *vap, uint8_t rate)
3973 struct ieee80211com *ic = vap->iv_ic;
3976 * Not in 2GHz mode? Then there's no need to enable OFDM
3979 if (! IEEE80211_IS_CHAN_2GHZ(ic->ic_curchan)) {
3984 * 11bg protection not enabled? Then don't use it.
3986 if ((ic->ic_flags & IEEE80211_F_USEPROT) == 0)
3990 * If it's an 11n rate, then for now we enable
3993 if (rate & IEEE80211_RATE_MCS) {
3998 * Do a rate table lookup. If the PHY is CCK,
3999 * don't do protection.
4001 if (ieee80211_rate2phytype(ic->ic_rt, rate) == IEEE80211_T_CCK)
4005 * Yup, enable protection.
4011 * return a value between 0 and IWN_MAX_TX_RETRIES-1 as an index into
4012 * the link quality table that reflects this particular entry.
4015 iwn_tx_rate_to_linkq_offset(struct iwn_softc *sc, struct ieee80211_node *ni,
4018 struct ieee80211_rateset *rs;
4025 * Figure out if we're using 11n or not here.
4027 if (IEEE80211_IS_CHAN_HT(ni->ni_chan) && ni->ni_htrates.rs_nrates > 0)
4033 * Use the correct rate table.
4036 rs = (struct ieee80211_rateset *) &ni->ni_htrates;
4037 nr = ni->ni_htrates.rs_nrates;
4044 * Find the relevant link quality entry in the table.
4046 for (i = 0; i < nr && i < IWN_MAX_TX_RETRIES - 1 ; i++) {
4048 * The link quality table index starts at 0 == highest
4049 * rate, so we walk the rate table backwards.
4051 cmp_rate = rs->rs_rates[(nr - 1) - i];
4052 if (rate & IEEE80211_RATE_MCS)
4053 cmp_rate |= IEEE80211_RATE_MCS;
4055 DPRINTF(sc, IWN_DEBUG_XMIT, "%s: idx %d: nr=%d, rate=0x%02x, rateentry=0x%02x\n",
4062 if (cmp_rate == rate)
4066 /* Failed? Start at the end */
4067 return (IWN_MAX_TX_RETRIES - 1);
4071 iwn_tx_data(struct iwn_softc *sc, struct mbuf *m, struct ieee80211_node *ni)
4073 struct iwn_ops *ops = &sc->ops;
4074 const struct ieee80211_txparam *tp;
4075 struct ieee80211vap *vap = ni->ni_vap;
4076 struct ieee80211com *ic = ni->ni_ic;
4077 struct iwn_node *wn = (void *)ni;
4078 struct iwn_tx_ring *ring;
4079 struct iwn_tx_desc *desc;
4080 struct iwn_tx_data *data;
4081 struct iwn_tx_cmd *cmd;
4082 struct iwn_cmd_data *tx;
4083 struct ieee80211_frame *wh;
4084 struct ieee80211_key *k = NULL;
4089 bus_dma_segment_t *seg, segs[IWN_MAX_SCATTER];
4091 int ac, i, totlen, error, pad, nsegs = 0, rate;
4093 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s begin\n", __func__);
4095 wh = mtod(m, struct ieee80211_frame *);
4096 hdrlen = ieee80211_anyhdrsize(wh);
4097 type = wh->i_fc[0] & IEEE80211_FC0_TYPE_MASK;
4099 /* Select EDCA Access Category and TX ring for this frame. */
4100 if (IEEE80211_QOS_HAS_SEQ(wh)) {
4101 qos = ((const struct ieee80211_qosframe *)wh)->i_qos[0];
4102 tid = qos & IEEE80211_QOS_TID;
4107 ac = M_WME_GETAC(m);
4108 if (m->m_flags & M_AMPDU_MPDU) {
4109 struct ieee80211_tx_ampdu *tap = &ni->ni_tx_ampdu[ac];
4111 if (!IEEE80211_AMPDU_RUNNING(tap)) {
4116 ac = *(int *)tap->txa_private;
4117 *(uint16_t *)wh->i_seq =
4118 htole16(ni->ni_txseqs[tid] << IEEE80211_SEQ_SEQ_SHIFT);
4119 ni->ni_txseqs[tid]++;
4121 ring = &sc->txq[ac];
4122 desc = &ring->desc[ring->cur];
4123 data = &ring->data[ring->cur];
4125 /* Choose a TX rate index. */
4126 tp = &vap->iv_txparms[ieee80211_chan2mode(ni->ni_chan)];
4127 if (type == IEEE80211_FC0_TYPE_MGT)
4128 rate = tp->mgmtrate;
4129 else if (IEEE80211_IS_MULTICAST(wh->i_addr1))
4130 rate = tp->mcastrate;
4131 else if (tp->ucastrate != IEEE80211_FIXED_RATE_NONE)
4132 rate = tp->ucastrate;
4133 else if (m->m_flags & M_EAPOL)
4134 rate = tp->mgmtrate;
4136 /* XXX pass pktlen */
4137 (void) ieee80211_ratectl_rate(ni, NULL, 0);
4138 rate = ni->ni_txrate;
4141 /* Encrypt the frame if need be. */
4142 if (wh->i_fc[1] & IEEE80211_FC1_WEP) {
4143 /* Retrieve key for TX. */
4144 k = ieee80211_crypto_encap(ni, m);
4149 /* 802.11 header may have moved. */
4150 wh = mtod(m, struct ieee80211_frame *);
4152 totlen = m->m_pkthdr.len;
4154 if (ieee80211_radiotap_active_vap(vap)) {
4155 struct iwn_tx_radiotap_header *tap = &sc->sc_txtap;
4158 tap->wt_rate = rate;
4160 tap->wt_flags |= IEEE80211_RADIOTAP_F_WEP;
4162 ieee80211_radiotap_tx(vap, m);
4165 /* Prepare TX firmware command. */
4166 cmd = &ring->cmd[ring->cur];
4167 cmd->code = IWN_CMD_TX_DATA;
4169 cmd->qid = ring->qid;
4170 cmd->idx = ring->cur;
4172 tx = (struct iwn_cmd_data *)cmd->data;
4173 /* NB: No need to clear tx, all fields are reinitialized here. */
4174 tx->scratch = 0; /* clear "scratch" area */
4177 if (!IEEE80211_IS_MULTICAST(wh->i_addr1)) {
4178 /* Unicast frame, check if an ACK is expected. */
4179 if (!qos || (qos & IEEE80211_QOS_ACKPOLICY) !=
4180 IEEE80211_QOS_ACKPOLICY_NOACK)
4181 flags |= IWN_TX_NEED_ACK;
4184 (IEEE80211_FC0_TYPE_MASK | IEEE80211_FC0_SUBTYPE_MASK)) ==
4185 (IEEE80211_FC0_TYPE_CTL | IEEE80211_FC0_SUBTYPE_BAR))
4186 flags |= IWN_TX_IMM_BA; /* Cannot happen yet. */
4188 if (wh->i_fc[1] & IEEE80211_FC1_MORE_FRAG)
4189 flags |= IWN_TX_MORE_FRAG; /* Cannot happen yet. */
4191 /* Check if frame must be protected using RTS/CTS or CTS-to-self. */
4192 if (!IEEE80211_IS_MULTICAST(wh->i_addr1)) {
4193 /* NB: Group frames are sent using CCK in 802.11b/g. */
4194 if (totlen + IEEE80211_CRC_LEN > vap->iv_rtsthreshold) {
4195 flags |= IWN_TX_NEED_RTS;
4196 } else if (iwn_check_rate_needs_protection(sc, vap, rate)) {
4197 if (ic->ic_protmode == IEEE80211_PROT_CTSONLY)
4198 flags |= IWN_TX_NEED_CTS;
4199 else if (ic->ic_protmode == IEEE80211_PROT_RTSCTS)
4200 flags |= IWN_TX_NEED_RTS;
4203 /* XXX HT protection? */
4205 if (flags & (IWN_TX_NEED_RTS | IWN_TX_NEED_CTS)) {
4206 if (sc->hw_type != IWN_HW_REV_TYPE_4965) {
4207 /* 5000 autoselects RTS/CTS or CTS-to-self. */
4208 flags &= ~(IWN_TX_NEED_RTS | IWN_TX_NEED_CTS);
4209 flags |= IWN_TX_NEED_PROTECTION;
4211 flags |= IWN_TX_FULL_TXOP;
4215 if (IEEE80211_IS_MULTICAST(wh->i_addr1) ||
4216 type != IEEE80211_FC0_TYPE_DATA)
4217 tx->id = sc->broadcast_id;
4221 if (type == IEEE80211_FC0_TYPE_MGT) {
4222 uint8_t subtype = wh->i_fc[0] & IEEE80211_FC0_SUBTYPE_MASK;
4224 /* Tell HW to set timestamp in probe responses. */
4225 if (subtype == IEEE80211_FC0_SUBTYPE_PROBE_RESP)
4226 flags |= IWN_TX_INSERT_TSTAMP;
4227 if (subtype == IEEE80211_FC0_SUBTYPE_ASSOC_REQ ||
4228 subtype == IEEE80211_FC0_SUBTYPE_REASSOC_REQ)
4229 tx->timeout = htole16(3);
4231 tx->timeout = htole16(2);
4233 tx->timeout = htole16(0);
4236 /* First segment length must be a multiple of 4. */
4237 flags |= IWN_TX_NEED_PADDING;
4238 pad = 4 - (hdrlen & 3);
4242 tx->len = htole16(totlen);
4244 tx->rts_ntries = 60;
4245 tx->data_ntries = 15;
4246 tx->lifetime = htole32(IWN_LIFETIME_INFINITE);
4247 tx->rate = iwn_rate_to_plcp(sc, ni, rate);
4248 if (tx->id == sc->broadcast_id) {
4249 /* Group or management frame. */
4252 tx->linkq = iwn_tx_rate_to_linkq_offset(sc, ni, rate);
4253 flags |= IWN_TX_LINKQ; /* enable MRR */
4256 /* Set physical address of "scratch area". */
4257 tx->loaddr = htole32(IWN_LOADDR(data->scratch_paddr));
4258 tx->hiaddr = IWN_HIADDR(data->scratch_paddr);
4260 /* Copy 802.11 header in TX command. */
4261 memcpy((uint8_t *)(tx + 1), wh, hdrlen);
4263 /* Trim 802.11 header. */
4266 tx->flags = htole32(flags);
4268 error = bus_dmamap_load_mbuf_segment(ring->data_dmat, data->map,
4269 m, segs, IWN_MAX_SCATTER - 1,
4270 &nsegs, BUS_DMA_NOWAIT);
4272 if (error != EFBIG) {
4273 device_printf(sc->sc_dev,
4274 "%s: can't map mbuf (error %d)\n", __func__, error);
4278 /* Too many DMA segments, linearize mbuf. */
4279 m1 = m_defrag(m, MB_DONTWAIT);
4281 device_printf(sc->sc_dev,
4282 "%s: could not defrag mbuf\n", __func__);
4288 error = bus_dmamap_load_mbuf_segment(ring->data_dmat,
4290 IWN_MAX_SCATTER - 1,
4291 &nsegs, BUS_DMA_NOWAIT);
4293 device_printf(sc->sc_dev,
4294 "%s: can't map mbuf (error %d)\n", __func__, error);
4303 DPRINTF(sc, IWN_DEBUG_XMIT,
4304 "%s: qid %d idx %d len %d nsegs %d rate %04x plcp 0x%08x\n",
4313 /* Fill TX descriptor. */
4316 desc->nsegs += nsegs;
4317 /* First DMA segment is used by the TX command. */
4318 desc->segs[0].addr = htole32(IWN_LOADDR(data->cmd_paddr));
4319 desc->segs[0].len = htole16(IWN_HIADDR(data->cmd_paddr) |
4320 (4 + sizeof (*tx) + hdrlen + pad) << 4);
4321 /* Other DMA segments are for data payload. */
4323 for (i = 1; i <= nsegs; i++) {
4324 desc->segs[i].addr = htole32(IWN_LOADDR(seg->ds_addr));
4325 desc->segs[i].len = htole16(IWN_HIADDR(seg->ds_addr) |
4330 bus_dmamap_sync(ring->data_dmat, data->map, BUS_DMASYNC_PREWRITE);
4331 bus_dmamap_sync(ring->data_dmat, ring->cmd_dma.map,
4332 BUS_DMASYNC_PREWRITE);
4333 bus_dmamap_sync(ring->desc_dma.tag, ring->desc_dma.map,
4334 BUS_DMASYNC_PREWRITE);
4336 /* Update TX scheduler. */
4337 if (ring->qid >= sc->firstaggqueue)
4338 ops->update_sched(sc, ring->qid, ring->cur, tx->id, totlen);
4341 ring->cur = (ring->cur + 1) % IWN_TX_RING_COUNT;
4342 IWN_WRITE(sc, IWN_HBUS_TARG_WRPTR, ring->qid << 8 | ring->cur);
4344 /* Mark TX ring as full if we reach a certain threshold. */
4345 if (++ring->queued > IWN_TX_RING_HIMARK)
4346 sc->qfullmsk |= 1 << ring->qid;
4348 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s: end\n",__func__);
4354 iwn_tx_data_raw(struct iwn_softc *sc, struct mbuf *m,
4355 struct ieee80211_node *ni, const struct ieee80211_bpf_params *params)
4357 struct iwn_ops *ops = &sc->ops;
4358 // struct ifnet *ifp = sc->sc_ifp;
4359 struct ieee80211vap *vap = ni->ni_vap;
4360 // struct ieee80211com *ic = ifp->if_l2com;
4361 struct iwn_tx_cmd *cmd;
4362 struct iwn_cmd_data *tx;
4363 struct ieee80211_frame *wh;
4364 struct iwn_tx_ring *ring;
4365 struct iwn_tx_desc *desc;
4366 struct iwn_tx_data *data;
4368 bus_dma_segment_t *seg, segs[IWN_MAX_SCATTER];
4371 int ac, totlen, error, pad, nsegs = 0, i, rate;
4374 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s begin\n", __func__);
4376 wh = mtod(m, struct ieee80211_frame *);
4377 hdrlen = ieee80211_anyhdrsize(wh);
4378 type = wh->i_fc[0] & IEEE80211_FC0_TYPE_MASK;
4380 ac = params->ibp_pri & 3;
4382 ring = &sc->txq[ac];
4383 desc = &ring->desc[ring->cur];
4384 data = &ring->data[ring->cur];
4386 /* Choose a TX rate. */
4387 rate = params->ibp_rate0;
4388 totlen = m->m_pkthdr.len;
4390 /* Prepare TX firmware command. */
4391 cmd = &ring->cmd[ring->cur];
4392 cmd->code = IWN_CMD_TX_DATA;
4394 cmd->qid = ring->qid;
4395 cmd->idx = ring->cur;
4397 tx = (struct iwn_cmd_data *)cmd->data;
4398 /* NB: No need to clear tx, all fields are reinitialized here. */
4399 tx->scratch = 0; /* clear "scratch" area */
4402 if ((params->ibp_flags & IEEE80211_BPF_NOACK) == 0)
4403 flags |= IWN_TX_NEED_ACK;
4404 if (params->ibp_flags & IEEE80211_BPF_RTS) {
4405 if (sc->hw_type != IWN_HW_REV_TYPE_4965) {
4406 /* 5000 autoselects RTS/CTS or CTS-to-self. */
4407 flags &= ~IWN_TX_NEED_RTS;
4408 flags |= IWN_TX_NEED_PROTECTION;
4410 flags |= IWN_TX_NEED_RTS | IWN_TX_FULL_TXOP;
4412 if (params->ibp_flags & IEEE80211_BPF_CTS) {
4413 if (sc->hw_type != IWN_HW_REV_TYPE_4965) {
4414 /* 5000 autoselects RTS/CTS or CTS-to-self. */
4415 flags &= ~IWN_TX_NEED_CTS;
4416 flags |= IWN_TX_NEED_PROTECTION;
4418 flags |= IWN_TX_NEED_CTS | IWN_TX_FULL_TXOP;
4420 if (type == IEEE80211_FC0_TYPE_MGT) {
4421 uint8_t subtype = wh->i_fc[0] & IEEE80211_FC0_SUBTYPE_MASK;
4423 /* Tell HW to set timestamp in probe responses. */
4424 if (subtype == IEEE80211_FC0_SUBTYPE_PROBE_RESP)
4425 flags |= IWN_TX_INSERT_TSTAMP;
4427 if (subtype == IEEE80211_FC0_SUBTYPE_ASSOC_REQ ||
4428 subtype == IEEE80211_FC0_SUBTYPE_REASSOC_REQ)
4429 tx->timeout = htole16(3);
4431 tx->timeout = htole16(2);
4433 tx->timeout = htole16(0);
4436 /* First segment length must be a multiple of 4. */
4437 flags |= IWN_TX_NEED_PADDING;
4438 pad = 4 - (hdrlen & 3);
4442 if (ieee80211_radiotap_active_vap(vap)) {
4443 struct iwn_tx_radiotap_header *tap = &sc->sc_txtap;
4446 tap->wt_rate = rate;
4448 ieee80211_radiotap_tx(vap, m);
4451 tx->len = htole16(totlen);
4453 tx->id = sc->broadcast_id;
4454 tx->rts_ntries = params->ibp_try1;
4455 tx->data_ntries = params->ibp_try0;
4456 tx->lifetime = htole32(IWN_LIFETIME_INFINITE);
4457 tx->rate = iwn_rate_to_plcp(sc, ni, rate);
4459 /* Group or management frame. */
4462 /* Set physical address of "scratch area". */
4463 tx->loaddr = htole32(IWN_LOADDR(data->scratch_paddr));
4464 tx->hiaddr = IWN_HIADDR(data->scratch_paddr);
4466 /* Copy 802.11 header in TX command. */
4467 memcpy((uint8_t *)(tx + 1), wh, hdrlen);
4469 /* Trim 802.11 header. */
4472 tx->flags = htole32(flags);
4474 error = bus_dmamap_load_mbuf_segment(ring->data_dmat, data->map,
4476 IWN_MAX_SCATTER - 1,
4477 &nsegs, BUS_DMA_NOWAIT);
4479 if (error != EFBIG) {
4480 device_printf(sc->sc_dev,
4481 "%s: can't map mbuf (error %d)\n", __func__, error);
4485 /* Too many DMA segments, linearize mbuf. */
4486 m1 = m_defrag(m, M_NOWAIT);
4488 device_printf(sc->sc_dev,
4489 "%s: could not defrag mbuf\n", __func__);
4495 error = bus_dmamap_load_mbuf_segment(ring->data_dmat,
4497 IWN_MAX_SCATTER - 1,
4498 &nsegs, BUS_DMA_NOWAIT);
4500 device_printf(sc->sc_dev,
4501 "%s: can't map mbuf (error %d)\n", __func__, error);
4510 DPRINTF(sc, IWN_DEBUG_XMIT, "%s: qid %d idx %d len %d nsegs %d\n",
4511 __func__, ring->qid, ring->cur, m->m_pkthdr.len, nsegs);
4513 /* Fill TX descriptor. */
4516 desc->nsegs += nsegs;
4517 /* First DMA segment is used by the TX command. */
4518 desc->segs[0].addr = htole32(IWN_LOADDR(data->cmd_paddr));
4519 desc->segs[0].len = htole16(IWN_HIADDR(data->cmd_paddr) |
4520 (4 + sizeof (*tx) + hdrlen + pad) << 4);
4521 /* Other DMA segments are for data payload. */
4523 for (i = 1; i <= nsegs; i++) {
4524 desc->segs[i].addr = htole32(IWN_LOADDR(seg->ds_addr));
4525 desc->segs[i].len = htole16(IWN_HIADDR(seg->ds_addr) |
4530 bus_dmamap_sync(ring->data_dmat, data->map, BUS_DMASYNC_PREWRITE);
4531 bus_dmamap_sync(ring->data_dmat, ring->cmd_dma.map,
4532 BUS_DMASYNC_PREWRITE);
4533 bus_dmamap_sync(ring->desc_dma.tag, ring->desc_dma.map,
4534 BUS_DMASYNC_PREWRITE);
4536 /* Update TX scheduler. */
4537 if (ring->qid >= sc->firstaggqueue)
4538 ops->update_sched(sc, ring->qid, ring->cur, tx->id, totlen);
4541 ring->cur = (ring->cur + 1) % IWN_TX_RING_COUNT;
4542 IWN_WRITE(sc, IWN_HBUS_TARG_WRPTR, ring->qid << 8 | ring->cur);
4544 /* Mark TX ring as full if we reach a certain threshold. */
4545 if (++ring->queued > IWN_TX_RING_HIMARK)
4546 sc->qfullmsk |= 1 << ring->qid;
4548 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s: end\n",__func__);
4554 iwn_raw_xmit(struct ieee80211_node *ni, struct mbuf *m,
4555 const struct ieee80211_bpf_params *params)
4557 struct ieee80211com *ic = ni->ni_ic;
4558 struct ifnet *ifp = ic->ic_ifp;
4559 struct iwn_softc *sc = ifp->if_softc;
4562 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s begin\n", __func__);
4564 if ((ifp->if_flags & IFF_RUNNING) == 0) {
4565 ieee80211_free_node(ni);
4570 if (params == NULL) {
4572 * Legacy path; interpret frame contents to decide
4573 * precisely how to send the frame.
4575 error = iwn_tx_data(sc, m, ni);
4578 * Caller supplied explicit parameters to use in
4579 * sending the frame.
4581 error = iwn_tx_data_raw(sc, m, ni, params);
4584 /* NB: m is reclaimed on tx failure */
4585 ieee80211_free_node(ni);
4586 IFNET_STAT_INC(ifp, oerrors, 1);
4588 sc->sc_tx_timer = 5;
4590 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s: end\n",__func__);
4596 iwn_start(struct ifnet *ifp, struct ifaltq_subque *ifsq)
4598 ASSERT_ALTQ_SQ_DEFAULT(ifp, ifsq);
4599 iwn_start_locked(ifp);
4603 iwn_start_locked(struct ifnet *ifp)
4605 struct iwn_softc *sc = ifp->if_softc;
4606 struct ieee80211_node *ni;
4609 wlan_assert_serialized();
4611 if ((ifp->if_flags & IFF_RUNNING) == 0 ||
4612 ifq_is_oactive(&ifp->if_snd))
4616 if (sc->qfullmsk != 0) {
4617 ifq_set_oactive(&ifp->if_snd);
4620 m = ifq_dequeue(&ifp->if_snd);
4623 KKASSERT(M_TRAILINGSPACE(m) >= 0);
4624 ni = (struct ieee80211_node *)m->m_pkthdr.rcvif;
4625 if (iwn_tx_data(sc, m, ni) != 0) {
4626 ieee80211_free_node(ni);
4627 IFNET_STAT_INC(ifp, oerrors, 1);
4630 sc->sc_tx_timer = 5;
4635 iwn_watchdog_timeout(void *arg)
4637 struct iwn_softc *sc = arg;
4638 struct ifnet *ifp = sc->sc_ifp;
4639 struct ieee80211com *ic = ifp->if_l2com;
4641 wlan_serialize_enter();
4643 KASSERT(ifp->if_flags & IFF_RUNNING, ("not running"));
4645 DPRINTF(sc, IWN_DEBUG_TRACE, "->Doing %s\n", __func__);
4647 if (sc->sc_tx_timer > 0) {
4648 if (--sc->sc_tx_timer == 0) {
4649 if_printf(ifp, "device timeout\n");
4650 ieee80211_runtask(ic, &sc->sc_reinit_task);
4654 callout_reset(&sc->watchdog_to, hz, iwn_watchdog_timeout, sc);
4655 wlan_serialize_exit();
4659 iwn_ioctl(struct ifnet *ifp, u_long cmd, caddr_t data, struct ucred *ucred)
4661 struct iwn_softc *sc = ifp->if_softc;
4662 struct ieee80211com *ic = ifp->if_l2com;
4663 struct ieee80211vap *vap = TAILQ_FIRST(&ic->ic_vaps);
4664 struct ifreq *ifr = (struct ifreq *) data;
4665 int error = 0, startall = 0, stop = 0;
4667 wlan_assert_serialized();
4671 error = ether_ioctl(ifp, cmd, data);
4674 if (ifp->if_flags & IFF_UP) {
4675 if (!(ifp->if_flags & IFF_RUNNING)) {
4676 iwn_init_locked(sc);
4677 if (IWN_READ(sc, IWN_GP_CNTRL) & IWN_GP_CNTRL_RFKILL)
4683 if (ifp->if_flags & IFF_RUNNING)
4684 iwn_stop_locked(sc);
4687 ieee80211_start_all(ic);
4688 else if (vap != NULL && stop)
4689 ieee80211_stop(vap);
4692 error = ifmedia_ioctl(ifp, ifr, &ic->ic_media, cmd);
4702 * Send a command to the firmware.
4705 iwn_cmd(struct iwn_softc *sc, int code, const void *buf, int size, int async)
4707 struct iwn_tx_ring *ring;
4708 struct iwn_tx_desc *desc;
4709 struct iwn_tx_data *data;
4710 struct iwn_tx_cmd *cmd;
4716 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s begin\n", __func__);
4718 if (sc->sc_flags & IWN_FLAG_PAN_SUPPORT)
4719 cmd_queue_num = IWN_PAN_CMD_QUEUE;
4721 cmd_queue_num = IWN_CMD_QUEUE_NUM;
4723 ring = &sc->txq[cmd_queue_num];
4724 desc = &ring->desc[ring->cur];
4725 data = &ring->data[ring->cur];
4728 if (size > sizeof cmd->data) {
4729 /* Command is too large to fit in a descriptor. */
4730 if (totlen > MJUMPAGESIZE)
4732 m = m_getjcl(MB_DONTWAIT, MT_DATA, M_PKTHDR, MJUMPAGESIZE);
4735 cmd = mtod(m, struct iwn_tx_cmd *);
4736 error = bus_dmamap_load(ring->data_dmat, data->map, cmd,
4737 totlen, iwn_dma_map_addr, &paddr, BUS_DMA_NOWAIT);
4744 cmd = &ring->cmd[ring->cur];
4745 paddr = data->cmd_paddr;
4750 cmd->qid = ring->qid;
4751 cmd->idx = ring->cur;
4752 memcpy(cmd->data, buf, size);
4755 desc->segs[0].addr = htole32(IWN_LOADDR(paddr));
4756 desc->segs[0].len = htole16(IWN_HIADDR(paddr) | totlen << 4);
4758 DPRINTF(sc, IWN_DEBUG_CMD, "%s: %s (0x%x) flags %d qid %d idx %d\n",
4759 __func__, iwn_intr_str(cmd->code), cmd->code,
4760 cmd->flags, cmd->qid, cmd->idx);
4762 if (size > sizeof cmd->data) {
4763 bus_dmamap_sync(ring->data_dmat, data->map,
4764 BUS_DMASYNC_PREWRITE);
4766 bus_dmamap_sync(ring->data_dmat, ring->cmd_dma.map,
4767 BUS_DMASYNC_PREWRITE);
4769 bus_dmamap_sync(ring->desc_dma.tag, ring->desc_dma.map,
4770 BUS_DMASYNC_PREWRITE);
4772 /* Kick command ring. */
4773 ring->cur = (ring->cur + 1) % IWN_TX_RING_COUNT;
4774 IWN_WRITE(sc, IWN_HBUS_TARG_WRPTR, ring->qid << 8 | ring->cur);
4776 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s: end\n",__func__);
4778 return async ? 0 : zsleep(desc, &wlan_global_serializer, 0, "iwncmd", hz);
4782 iwn4965_add_node(struct iwn_softc *sc, struct iwn_node_info *node, int async)
4784 struct iwn4965_node_info hnode;
4787 DPRINTF(sc, IWN_DEBUG_TRACE, "->Doing %s\n", __func__);
4790 * We use the node structure for 5000 Series internally (it is
4791 * a superset of the one for 4965AGN). We thus copy the common
4792 * fields before sending the command.
4794 src = (caddr_t)node;
4795 dst = (caddr_t)&hnode;
4796 memcpy(dst, src, 48);
4797 /* Skip TSC, RX MIC and TX MIC fields from ``src''. */
4798 memcpy(dst + 48, src + 72, 20);
4799 return iwn_cmd(sc, IWN_CMD_ADD_NODE, &hnode, sizeof hnode, async);
4803 iwn5000_add_node(struct iwn_softc *sc, struct iwn_node_info *node, int async)
4806 DPRINTF(sc, IWN_DEBUG_TRACE, "->Doing %s\n", __func__);
4808 /* Direct mapping. */
4809 return iwn_cmd(sc, IWN_CMD_ADD_NODE, node, sizeof (*node), async);
4813 iwn_set_link_quality(struct iwn_softc *sc, struct ieee80211_node *ni)
4815 #define RV(v) ((v) & IEEE80211_RATE_VAL)
4816 struct iwn_node *wn = (void *)ni;
4817 struct ieee80211_rateset *rs;
4818 struct iwn_cmd_link_quality linkq;
4820 int i, rate, txrate;
4823 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s begin\n", __func__);
4825 /* Use the first valid TX antenna. */
4826 txant = IWN_LSB(sc->txchainmask);
4828 memset(&linkq, 0, sizeof linkq);
4830 linkq.antmsk_1stream = txant;
4833 * The '2 stream' setup is a bit .. odd.
4835 * For NICs that support only 1 antenna, default to IWN_ANT_AB or
4836 * the firmware panics (eg Intel 5100.)
4838 * For NICs that support two antennas, we use ANT_AB.
4840 * For NICs that support three antennas, we use the two that
4841 * wasn't the default one.
4843 * XXX TODO: if bluetooth (full concurrent) is enabled, restrict
4844 * this to only one antenna.
4847 /* So - if there's no secondary antenna, assume IWN_ANT_AB */
4849 /* Default - transmit on the other antennas */
4850 linkq.antmsk_2stream = (sc->txchainmask & ~IWN_LSB(sc->txchainmask));
4852 /* Now, if it's zero, set it to IWN_ANT_AB, so to not panic firmware */
4853 if (linkq.antmsk_2stream == 0)
4854 linkq.antmsk_2stream = IWN_ANT_AB;
4857 * If the NIC is a two-stream TX NIC, configure the TX mask to
4858 * the default chainmask
4860 else if (sc->ntxchains == 2)
4861 linkq.antmsk_2stream = sc->txchainmask;
4863 linkq.ampdu_max = 32; /* XXX negotiated? */
4864 linkq.ampdu_threshold = 3;
4865 linkq.ampdu_limit = htole16(4000); /* 4ms */
4867 DPRINTF(sc, IWN_DEBUG_XMIT,
4868 "%s: 1stream antenna=0x%02x, 2stream antenna=0x%02x, ntxstreams=%d\n",
4870 linkq.antmsk_1stream,
4871 linkq.antmsk_2stream,
4875 * Are we using 11n rates? Ensure the channel is
4876 * 11n _and_ we have some 11n rates, or don't
4879 if (IEEE80211_IS_CHAN_HT(ni->ni_chan) && ni->ni_htrates.rs_nrates > 0) {
4880 rs = (struct ieee80211_rateset *) &ni->ni_htrates;
4887 /* Start at highest available bit-rate. */
4889 * XXX this is all very dirty!
4892 txrate = ni->ni_htrates.rs_nrates - 1;
4894 txrate = rs->rs_nrates - 1;
4895 for (i = 0; i < IWN_MAX_TX_RETRIES; i++) {
4899 rate = IEEE80211_RATE_MCS | rs->rs_rates[txrate];
4901 rate = RV(rs->rs_rates[txrate]);
4903 DPRINTF(sc, IWN_DEBUG_XMIT,
4904 "%s: i=%d, txrate=%d, rate=0x%02x\n",
4910 /* Do rate -> PLCP config mapping */
4911 plcp = iwn_rate_to_plcp(sc, ni, rate);
4912 linkq.retry[i] = plcp;
4915 * The mimo field is an index into the table which
4916 * indicates the first index where it and subsequent entries
4917 * will not be using MIMO.
4919 * Since we're filling linkq from 0..15 and we're filling
4920 * from the higest MCS rates to the lowest rates, if we
4921 * _are_ doing a dual-stream rate, set mimo to idx+1 (ie,
4922 * the next entry.) That way if the next entry is a non-MIMO
4923 * entry, we're already pointing at it.
4925 if ((le32toh(plcp) & IWN_RFLAG_MCS) &&
4926 RV(le32toh(plcp)) > 7)
4929 /* Next retry at immediate lower bit-rate. */
4934 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s: end\n",__func__);
4936 return iwn_cmd(sc, IWN_CMD_LINK_QUALITY, &linkq, sizeof linkq, 1);
4941 * Broadcast node is used to send group-addressed and management frames.
4944 iwn_add_broadcast_node(struct iwn_softc *sc, int async)
4946 struct iwn_ops *ops = &sc->ops;
4947 struct ifnet *ifp = sc->sc_ifp;
4948 struct ieee80211com *ic = ifp->if_l2com;
4949 struct iwn_node_info node;
4950 struct iwn_cmd_link_quality linkq;
4954 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s begin\n", __func__);
4956 sc->rxon = &sc->rx_on[IWN_RXON_BSS_CTX];
4958 memset(&node, 0, sizeof node);
4959 IEEE80211_ADDR_COPY(node.macaddr, ifp->if_broadcastaddr);
4960 node.id = sc->broadcast_id;
4961 DPRINTF(sc, IWN_DEBUG_RESET, "%s: adding broadcast node\n", __func__);
4962 if ((error = ops->add_node(sc, &node, async)) != 0)
4965 /* Use the first valid TX antenna. */
4966 txant = IWN_LSB(sc->txchainmask);
4968 memset(&linkq, 0, sizeof linkq);
4969 linkq.id = sc->broadcast_id;
4970 linkq.antmsk_1stream = txant;
4971 linkq.antmsk_2stream = IWN_ANT_AB;
4972 linkq.ampdu_max = 64;
4973 linkq.ampdu_threshold = 3;
4974 linkq.ampdu_limit = htole16(4000); /* 4ms */
4976 /* Use lowest mandatory bit-rate. */
4977 if (IEEE80211_IS_CHAN_5GHZ(ic->ic_curchan))
4978 linkq.retry[0] = htole32(0xd);
4980 linkq.retry[0] = htole32(10 | IWN_RFLAG_CCK);
4981 linkq.retry[0] |= htole32(IWN_RFLAG_ANT(txant));
4982 /* Use same bit-rate for all TX retries. */
4983 for (i = 1; i < IWN_MAX_TX_RETRIES; i++) {
4984 linkq.retry[i] = linkq.retry[0];
4987 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s: end\n",__func__);
4989 return iwn_cmd(sc, IWN_CMD_LINK_QUALITY, &linkq, sizeof linkq, async);
4993 iwn_updateedca(struct ieee80211com *ic)
4995 #define IWN_EXP2(x) ((1 << (x)) - 1) /* CWmin = 2^ECWmin - 1 */
4996 struct iwn_softc *sc = ic->ic_ifp->if_softc;
4997 struct iwn_edca_params cmd;
5000 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s begin\n", __func__);
5002 memset(&cmd, 0, sizeof cmd);
5003 cmd.flags = htole32(IWN_EDCA_UPDATE);
5004 for (aci = 0; aci < WME_NUM_AC; aci++) {
5005 const struct wmeParams *ac =
5006 &ic->ic_wme.wme_chanParams.cap_wmeParams[aci];
5007 cmd.ac[aci].aifsn = ac->wmep_aifsn;
5008 cmd.ac[aci].cwmin = htole16(IWN_EXP2(ac->wmep_logcwmin));
5009 cmd.ac[aci].cwmax = htole16(IWN_EXP2(ac->wmep_logcwmax));
5010 cmd.ac[aci].txoplimit =
5011 htole16(IEEE80211_TXOP_TO_US(ac->wmep_txopLimit));
5013 (void)iwn_cmd(sc, IWN_CMD_EDCA_PARAMS, &cmd, sizeof cmd, 1);
5015 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s: end\n",__func__);
5022 iwn_update_mcast(struct ifnet *ifp)
5028 iwn_set_led(struct iwn_softc *sc, uint8_t which, uint8_t off, uint8_t on)
5030 struct iwn_cmd_led led;
5032 DPRINTF(sc, IWN_DEBUG_TRACE, "->Doing %s\n", __func__);
5034 /* Clear microcode LED ownership. */
5035 IWN_CLRBITS(sc, IWN_LED, IWN_LED_BSM_CTRL);
5038 led.unit = htole32(10000); /* on/off in unit of 100ms */
5041 (void)iwn_cmd(sc, IWN_CMD_SET_LED, &led, sizeof led, 1);
5045 * Set the critical temperature at which the firmware will stop the radio
5049 iwn_set_critical_temp(struct iwn_softc *sc)
5051 struct iwn_critical_temp crit;
5054 DPRINTF(sc, IWN_DEBUG_TRACE, "->Doing %s\n", __func__);
5056 IWN_WRITE(sc, IWN_UCODE_GP1_CLR, IWN_UCODE_GP1_CTEMP_STOP_RF);
5058 if (sc->hw_type == IWN_HW_REV_TYPE_5150)
5059 temp = (IWN_CTOK(110) - sc->temp_off) * -5;
5060 else if (sc->hw_type == IWN_HW_REV_TYPE_4965)
5061 temp = IWN_CTOK(110);
5064 memset(&crit, 0, sizeof crit);
5065 crit.tempR = htole32(temp);
5066 DPRINTF(sc, IWN_DEBUG_RESET, "setting critical temp to %d\n", temp);
5067 return iwn_cmd(sc, IWN_CMD_SET_CRITICAL_TEMP, &crit, sizeof crit, 0);
5071 iwn_set_timing(struct iwn_softc *sc, struct ieee80211_node *ni)
5073 struct iwn_cmd_timing cmd;
5076 DPRINTF(sc, IWN_DEBUG_TRACE, "->Doing %s\n", __func__);
5078 memset(&cmd, 0, sizeof cmd);
5079 memcpy(&cmd.tstamp, ni->ni_tstamp.data, sizeof (uint64_t));
5080 cmd.bintval = htole16(ni->ni_intval);
5081 cmd.lintval = htole16(10);
5083 /* Compute remaining time until next beacon. */
5084 val = (uint64_t)ni->ni_intval * IEEE80211_DUR_TU;
5085 mod = le64toh(cmd.tstamp) % val;
5086 cmd.binitval = htole32((uint32_t)(val - mod));
5088 DPRINTF(sc, IWN_DEBUG_RESET, "timing bintval=%u tstamp=%ju, init=%u\n",
5089 ni->ni_intval, le64toh(cmd.tstamp), (uint32_t)(val - mod));
5091 return iwn_cmd(sc, IWN_CMD_TIMING, &cmd, sizeof cmd, 1);
5095 iwn4965_power_calibration(struct iwn_softc *sc, int temp)
5097 struct ifnet *ifp = sc->sc_ifp;
5098 struct ieee80211com *ic = ifp->if_l2com;
5100 DPRINTF(sc, IWN_DEBUG_TRACE, "->Doing %s\n", __func__);
5102 /* Adjust TX power if need be (delta >= 3 degC). */
5103 DPRINTF(sc, IWN_DEBUG_CALIBRATE, "%s: temperature %d->%d\n",
5104 __func__, sc->temp, temp);
5105 if (abs(temp - sc->temp) >= 3) {
5106 /* Record temperature of last calibration. */
5108 (void)iwn4965_set_txpower(sc, ic->ic_bsschan, 1);
5113 * Set TX power for current channel (each rate has its own power settings).
5114 * This function takes into account the regulatory information from EEPROM,
5115 * the current temperature and the current voltage.
5118 iwn4965_set_txpower(struct iwn_softc *sc, struct ieee80211_channel *ch,
5121 /* Fixed-point arithmetic division using a n-bit fractional part. */
5122 #define fdivround(a, b, n) \
5123 ((((1 << n) * (a)) / (b) + (1 << n) / 2) / (1 << n))
5124 /* Linear interpolation. */
5125 #define interpolate(x, x1, y1, x2, y2, n) \
5126 ((y1) + fdivround(((int)(x) - (x1)) * ((y2) - (y1)), (x2) - (x1), n))
5128 static const int tdiv[IWN_NATTEN_GROUPS] = { 9, 8, 8, 8, 6 };
5129 struct iwn_ucode_info *uc = &sc->ucode_info;
5130 struct iwn4965_cmd_txpower cmd;
5131 struct iwn4965_eeprom_chan_samples *chans;
5132 const uint8_t *rf_gain, *dsp_gain;
5133 int32_t vdiff, tdiff;
5134 int i, c, grp, maxpwr;
5137 sc->rxon = &sc->rx_on[IWN_RXON_BSS_CTX];
5138 /* Retrieve current channel from last RXON. */
5139 chan = sc->rxon->chan;
5140 DPRINTF(sc, IWN_DEBUG_RESET, "setting TX power for channel %d\n",
5143 memset(&cmd, 0, sizeof cmd);
5144 cmd.band = IEEE80211_IS_CHAN_5GHZ(ch) ? 0 : 1;
5147 if (IEEE80211_IS_CHAN_5GHZ(ch)) {
5148 maxpwr = sc->maxpwr5GHz;
5149 rf_gain = iwn4965_rf_gain_5ghz;
5150 dsp_gain = iwn4965_dsp_gain_5ghz;
5152 maxpwr = sc->maxpwr2GHz;
5153 rf_gain = iwn4965_rf_gain_2ghz;
5154 dsp_gain = iwn4965_dsp_gain_2ghz;
5157 /* Compute voltage compensation. */
5158 vdiff = ((int32_t)le32toh(uc->volt) - sc->eeprom_voltage) / 7;
5163 DPRINTF(sc, IWN_DEBUG_CALIBRATE | IWN_DEBUG_TXPOW,
5164 "%s: voltage compensation=%d (UCODE=%d, EEPROM=%d)\n",
5165 __func__, vdiff, le32toh(uc->volt), sc->eeprom_voltage);
5167 /* Get channel attenuation group. */
5168 if (chan <= 20) /* 1-20 */
5170 else if (chan <= 43) /* 34-43 */
5172 else if (chan <= 70) /* 44-70 */
5174 else if (chan <= 124) /* 71-124 */
5178 DPRINTF(sc, IWN_DEBUG_CALIBRATE | IWN_DEBUG_TXPOW,
5179 "%s: chan %d, attenuation group=%d\n", __func__, chan, grp);
5181 /* Get channel sub-band. */
5182 for (i = 0; i < IWN_NBANDS; i++)
5183 if (sc->bands[i].lo != 0 &&
5184 sc->bands[i].lo <= chan && chan <= sc->bands[i].hi)
5186 if (i == IWN_NBANDS) /* Can't happen in real-life. */
5188 chans = sc->bands[i].chans;
5189 DPRINTF(sc, IWN_DEBUG_CALIBRATE | IWN_DEBUG_TXPOW,
5190 "%s: chan %d sub-band=%d\n", __func__, chan, i);
5192 for (c = 0; c < 2; c++) {
5193 uint8_t power, gain, temp;
5194 int maxchpwr, pwr, ridx, idx;
5196 power = interpolate(chan,
5197 chans[0].num, chans[0].samples[c][1].power,
5198 chans[1].num, chans[1].samples[c][1].power, 1);
5199 gain = interpolate(chan,
5200 chans[0].num, chans[0].samples[c][1].gain,
5201 chans[1].num, chans[1].samples[c][1].gain, 1);
5202 temp = interpolate(chan,
5203 chans[0].num, chans[0].samples[c][1].temp,
5204 chans[1].num, chans[1].samples[c][1].temp, 1);
5205 DPRINTF(sc, IWN_DEBUG_CALIBRATE | IWN_DEBUG_TXPOW,
5206 "%s: Tx chain %d: power=%d gain=%d temp=%d\n",
5207 __func__, c, power, gain, temp);
5209 /* Compute temperature compensation. */
5210 tdiff = ((sc->temp - temp) * 2) / tdiv[grp];
5211 DPRINTF(sc, IWN_DEBUG_CALIBRATE | IWN_DEBUG_TXPOW,
5212 "%s: temperature compensation=%d (current=%d, EEPROM=%d)\n",
5213 __func__, tdiff, sc->temp, temp);
5215 for (ridx = 0; ridx <= IWN_RIDX_MAX; ridx++) {
5216 /* Convert dBm to half-dBm. */
5217 maxchpwr = sc->maxpwr[chan] * 2;
5219 maxchpwr -= 6; /* MIMO 2T: -3dB */
5223 /* Adjust TX power based on rate. */
5224 if ((ridx % 8) == 5)
5225 pwr -= 15; /* OFDM48: -7.5dB */
5226 else if ((ridx % 8) == 6)
5227 pwr -= 17; /* OFDM54: -8.5dB */
5228 else if ((ridx % 8) == 7)
5229 pwr -= 20; /* OFDM60: -10dB */
5231 pwr -= 10; /* Others: -5dB */
5233 /* Do not exceed channel max TX power. */
5237 idx = gain - (pwr - power) - tdiff - vdiff;
5238 if ((ridx / 8) & 1) /* MIMO */
5239 idx += (int32_t)le32toh(uc->atten[grp][c]);
5242 idx += 9; /* 5GHz */
5243 if (ridx == IWN_RIDX_MAX)
5246 /* Make sure idx stays in a valid range. */
5249 else if (idx > IWN4965_MAX_PWR_INDEX)
5250 idx = IWN4965_MAX_PWR_INDEX;
5252 DPRINTF(sc, IWN_DEBUG_CALIBRATE | IWN_DEBUG_TXPOW,
5253 "%s: Tx chain %d, rate idx %d: power=%d\n",
5254 __func__, c, ridx, idx);
5255 cmd.power[ridx].rf_gain[c] = rf_gain[idx];
5256 cmd.power[ridx].dsp_gain[c] = dsp_gain[idx];
5260 DPRINTF(sc, IWN_DEBUG_CALIBRATE | IWN_DEBUG_TXPOW,
5261 "%s: set tx power for chan %d\n", __func__, chan);
5262 return iwn_cmd(sc, IWN_CMD_TXPOWER, &cmd, sizeof cmd, async);
5269 iwn5000_set_txpower(struct iwn_softc *sc, struct ieee80211_channel *ch,
5272 struct iwn5000_cmd_txpower cmd;
5274 DPRINTF(sc, IWN_DEBUG_TRACE, "->Doing %s\n", __func__);
5277 * TX power calibration is handled automatically by the firmware
5280 memset(&cmd, 0, sizeof cmd);
5281 cmd.global_limit = 2 * IWN5000_TXPOWER_MAX_DBM; /* 16 dBm */
5282 cmd.flags = IWN5000_TXPOWER_NO_CLOSED;
5283 cmd.srv_limit = IWN5000_TXPOWER_AUTO;
5284 DPRINTF(sc, IWN_DEBUG_CALIBRATE, "%s: setting TX power\n", __func__);
5285 return iwn_cmd(sc, IWN_CMD_TXPOWER_DBM, &cmd, sizeof cmd, async);
5289 * Retrieve the maximum RSSI (in dBm) among receivers.
5292 iwn4965_get_rssi(struct iwn_softc *sc, struct iwn_rx_stat *stat)
5294 struct iwn4965_rx_phystat *phy = (void *)stat->phybuf;
5298 DPRINTF(sc, IWN_DEBUG_TRACE, "->Doing %s\n", __func__);
5300 mask = (le16toh(phy->antenna) >> 4) & IWN_ANT_ABC;
5301 agc = (le16toh(phy->agc) >> 7) & 0x7f;
5304 if (mask & IWN_ANT_A)
5305 rssi = MAX(rssi, phy->rssi[0]);
5306 if (mask & IWN_ANT_B)
5307 rssi = MAX(rssi, phy->rssi[2]);
5308 if (mask & IWN_ANT_C)
5309 rssi = MAX(rssi, phy->rssi[4]);
5311 DPRINTF(sc, IWN_DEBUG_RECV,
5312 "%s: agc %d mask 0x%x rssi %d %d %d result %d\n", __func__, agc,
5313 mask, phy->rssi[0], phy->rssi[2], phy->rssi[4],
5314 rssi - agc - IWN_RSSI_TO_DBM);
5315 return rssi - agc - IWN_RSSI_TO_DBM;
5319 iwn5000_get_rssi(struct iwn_softc *sc, struct iwn_rx_stat *stat)
5321 struct iwn5000_rx_phystat *phy = (void *)stat->phybuf;
5325 DPRINTF(sc, IWN_DEBUG_TRACE, "->Doing %s\n", __func__);
5327 agc = (le32toh(phy->agc) >> 9) & 0x7f;
5329 rssi = MAX(le16toh(phy->rssi[0]) & 0xff,
5330 le16toh(phy->rssi[1]) & 0xff);
5331 rssi = MAX(le16toh(phy->rssi[2]) & 0xff, rssi);
5333 DPRINTF(sc, IWN_DEBUG_RECV,
5334 "%s: agc %d rssi %d %d %d result %d\n", __func__, agc,
5335 phy->rssi[0], phy->rssi[1], phy->rssi[2],
5336 rssi - agc - IWN_RSSI_TO_DBM);
5337 return rssi - agc - IWN_RSSI_TO_DBM;
5341 * Retrieve the average noise (in dBm) among receivers.
5344 iwn_get_noise(const struct iwn_rx_general_stats *stats)
5346 int i, total, nbant, noise;
5349 for (i = 0; i < 3; i++) {
5350 if ((noise = le32toh(stats->noise[i]) & 0xff) == 0)
5355 /* There should be at least one antenna but check anyway. */
5356 return (nbant == 0) ? -127 : (total / nbant) - 107;
5360 * Compute temperature (in degC) from last received statistics.
5363 iwn4965_get_temperature(struct iwn_softc *sc)
5365 struct iwn_ucode_info *uc = &sc->ucode_info;
5366 int32_t r1, r2, r3, r4, temp;
5368 DPRINTF(sc, IWN_DEBUG_TRACE, "->Doing %s\n", __func__);
5370 r1 = le32toh(uc->temp[0].chan20MHz);
5371 r2 = le32toh(uc->temp[1].chan20MHz);
5372 r3 = le32toh(uc->temp[2].chan20MHz);
5373 r4 = le32toh(sc->rawtemp);
5375 if (r1 == r3) /* Prevents division by 0 (should not happen). */
5378 /* Sign-extend 23-bit R4 value to 32-bit. */
5379 r4 = ((r4 & 0xffffff) ^ 0x800000) - 0x800000;
5380 /* Compute temperature in Kelvin. */
5381 temp = (259 * (r4 - r2)) / (r3 - r1);
5382 temp = (temp * 97) / 100 + 8;
5384 DPRINTF(sc, IWN_DEBUG_ANY, "temperature %dK/%dC\n", temp,
5386 return IWN_KTOC(temp);
5390 iwn5000_get_temperature(struct iwn_softc *sc)
5394 DPRINTF(sc, IWN_DEBUG_TRACE, "->Doing %s\n", __func__);
5397 * Temperature is not used by the driver for 5000 Series because
5398 * TX power calibration is handled by firmware.
5400 temp = le32toh(sc->rawtemp);
5401 if (sc->hw_type == IWN_HW_REV_TYPE_5150) {
5402 temp = (temp / -5) + sc->temp_off;
5403 temp = IWN_KTOC(temp);
5409 * Initialize sensitivity calibration state machine.
5412 iwn_init_sensitivity(struct iwn_softc *sc)
5414 struct iwn_ops *ops = &sc->ops;
5415 struct iwn_calib_state *calib = &sc->calib;
5419 DPRINTF(sc, IWN_DEBUG_TRACE, "->Doing %s\n", __func__);
5421 /* Reset calibration state machine. */
5422 memset(calib, 0, sizeof (*calib));
5423 calib->state = IWN_CALIB_STATE_INIT;
5424 calib->cck_state = IWN_CCK_STATE_HIFA;
5425 /* Set initial correlation values. */
5426 calib->ofdm_x1 = sc->limits->min_ofdm_x1;
5427 calib->ofdm_mrc_x1 = sc->limits->min_ofdm_mrc_x1;
5428 calib->ofdm_x4 = sc->limits->min_ofdm_x4;
5429 calib->ofdm_mrc_x4 = sc->limits->min_ofdm_mrc_x4;
5430 calib->cck_x4 = 125;
5431 calib->cck_mrc_x4 = sc->limits->min_cck_mrc_x4;
5432 calib->energy_cck = sc->limits->energy_cck;
5434 /* Write initial sensitivity. */
5435 if ((error = iwn_send_sensitivity(sc)) != 0)
5438 /* Write initial gains. */
5439 if ((error = ops->init_gains(sc)) != 0)
5442 /* Request statistics at each beacon interval. */
5444 DPRINTF(sc, IWN_DEBUG_CALIBRATE, "%s: sending request for statistics\n",
5446 return iwn_cmd(sc, IWN_CMD_GET_STATISTICS, &flags, sizeof flags, 1);
5450 * Collect noise and RSSI statistics for the first 20 beacons received
5451 * after association and use them to determine connected antennas and
5452 * to set differential gains.
5455 iwn_collect_noise(struct iwn_softc *sc,
5456 const struct iwn_rx_general_stats *stats)
5458 struct iwn_ops *ops = &sc->ops;
5459 struct iwn_calib_state *calib = &sc->calib;
5460 struct ifnet *ifp = sc->sc_ifp;
5461 struct ieee80211com *ic = ifp->if_l2com;
5465 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s begin\n", __func__);
5467 /* Accumulate RSSI and noise for all 3 antennas. */
5468 for (i = 0; i < 3; i++) {
5469 calib->rssi[i] += le32toh(stats->rssi[i]) & 0xff;
5470 calib->noise[i] += le32toh(stats->noise[i]) & 0xff;
5472 /* NB: We update differential gains only once after 20 beacons. */
5473 if (++calib->nbeacons < 20)
5476 /* Determine highest average RSSI. */
5477 val = MAX(calib->rssi[0], calib->rssi[1]);
5478 val = MAX(calib->rssi[2], val);
5480 /* Determine which antennas are connected. */
5481 sc->chainmask = sc->rxchainmask;
5482 for (i = 0; i < 3; i++)
5483 if (val - calib->rssi[i] > 15 * 20)
5484 sc->chainmask &= ~(1 << i);
5485 DPRINTF(sc, IWN_DEBUG_CALIBRATE,
5486 "%s: RX chains mask: theoretical=0x%x, actual=0x%x\n",
5487 __func__, sc->rxchainmask, sc->chainmask);
5489 /* If none of the TX antennas are connected, keep at least one. */
5490 if ((sc->chainmask & sc->txchainmask) == 0)
5491 sc->chainmask |= IWN_LSB(sc->txchainmask);
5493 (void)ops->set_gains(sc);
5494 calib->state = IWN_CALIB_STATE_RUN;
5497 /* XXX Disable RX chains with no antennas connected. */
5498 sc->rxon->rxchain = htole16(IWN_RXCHAIN_SEL(sc->chainmask));
5499 (void)iwn_cmd(sc, IWN_CMD_RXON, sc->rxon, sc->rxonsz, 1);
5502 /* Enable power-saving mode if requested by user. */
5503 if (ic->ic_flags & IEEE80211_F_PMGTON)
5504 (void)iwn_set_pslevel(sc, 0, 3, 1);
5506 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s: end\n",__func__);
5511 iwn4965_init_gains(struct iwn_softc *sc)
5513 struct iwn_phy_calib_gain cmd;
5515 DPRINTF(sc, IWN_DEBUG_TRACE, "->Doing %s\n", __func__);
5517 memset(&cmd, 0, sizeof cmd);
5518 cmd.code = IWN4965_PHY_CALIB_DIFF_GAIN;
5519 /* Differential gains initially set to 0 for all 3 antennas. */
5520 DPRINTF(sc, IWN_DEBUG_CALIBRATE,
5521 "%s: setting initial differential gains\n", __func__);
5522 return iwn_cmd(sc, IWN_CMD_PHY_CALIB, &cmd, sizeof cmd, 1);
5526 iwn5000_init_gains(struct iwn_softc *sc)
5528 struct iwn_phy_calib cmd;
5530 DPRINTF(sc, IWN_DEBUG_TRACE, "->Doing %s\n", __func__);
5532 memset(&cmd, 0, sizeof cmd);
5533 cmd.code = sc->reset_noise_gain;
5536 DPRINTF(sc, IWN_DEBUG_CALIBRATE,
5537 "%s: setting initial differential gains\n", __func__);
5538 return iwn_cmd(sc, IWN_CMD_PHY_CALIB, &cmd, sizeof cmd, 1);
5542 iwn4965_set_gains(struct iwn_softc *sc)
5544 struct iwn_calib_state *calib = &sc->calib;
5545 struct iwn_phy_calib_gain cmd;
5546 int i, delta, noise;
5548 DPRINTF(sc, IWN_DEBUG_TRACE, "->Doing %s\n", __func__);
5550 /* Get minimal noise among connected antennas. */
5551 noise = INT_MAX; /* NB: There's at least one antenna. */
5552 for (i = 0; i < 3; i++)
5553 if (sc->chainmask & (1 << i))
5554 noise = MIN(calib->noise[i], noise);
5556 memset(&cmd, 0, sizeof cmd);
5557 cmd.code = IWN4965_PHY_CALIB_DIFF_GAIN;
5558 /* Set differential gains for connected antennas. */
5559 for (i = 0; i < 3; i++) {
5560 if (sc->chainmask & (1 << i)) {
5561 /* Compute attenuation (in unit of 1.5dB). */
5562 delta = (noise - (int32_t)calib->noise[i]) / 30;
5563 /* NB: delta <= 0 */
5564 /* Limit to [-4.5dB,0]. */
5565 cmd.gain[i] = MIN(abs(delta), 3);
5567 cmd.gain[i] |= 1 << 2; /* sign bit */
5570 DPRINTF(sc, IWN_DEBUG_CALIBRATE,
5571 "setting differential gains Ant A/B/C: %x/%x/%x (%x)\n",
5572 cmd.gain[0], cmd.gain[1], cmd.gain[2], sc->chainmask);
5573 return iwn_cmd(sc, IWN_CMD_PHY_CALIB, &cmd, sizeof cmd, 1);
5577 iwn5000_set_gains(struct iwn_softc *sc)
5579 struct iwn_calib_state *calib = &sc->calib;
5580 struct iwn_phy_calib_gain cmd;
5581 int i, ant, div, delta;
5583 DPRINTF(sc, IWN_DEBUG_TRACE, "->Doing %s\n", __func__);
5585 /* We collected 20 beacons and !=6050 need a 1.5 factor. */
5586 div = (sc->hw_type == IWN_HW_REV_TYPE_6050) ? 20 : 30;
5588 memset(&cmd, 0, sizeof cmd);
5589 cmd.code = sc->noise_gain;
5592 /* Get first available RX antenna as referential. */
5593 ant = IWN_LSB(sc->rxchainmask);
5594 /* Set differential gains for other antennas. */
5595 for (i = ant + 1; i < 3; i++) {
5596 if (sc->chainmask & (1 << i)) {
5597 /* The delta is relative to antenna "ant". */
5598 delta = ((int32_t)calib->noise[ant] -
5599 (int32_t)calib->noise[i]) / div;
5600 /* Limit to [-4.5dB,+4.5dB]. */
5601 cmd.gain[i - 1] = MIN(abs(delta), 3);
5603 cmd.gain[i - 1] |= 1 << 2; /* sign bit */
5606 DPRINTF(sc, IWN_DEBUG_CALIBRATE,
5607 "setting differential gains Ant B/C: %x/%x (%x)\n",
5608 cmd.gain[0], cmd.gain[1], sc->chainmask);
5609 return iwn_cmd(sc, IWN_CMD_PHY_CALIB, &cmd, sizeof cmd, 1);
5613 * Tune RF RX sensitivity based on the number of false alarms detected
5614 * during the last beacon period.
5617 iwn_tune_sensitivity(struct iwn_softc *sc, const struct iwn_rx_stats *stats)
5619 #define inc(val, inc, max) \
5620 if ((val) < (max)) { \
5621 if ((val) < (max) - (inc)) \
5627 #define dec(val, dec, min) \
5628 if ((val) > (min)) { \
5629 if ((val) > (min) + (dec)) \
5636 const struct iwn_sensitivity_limits *limits = sc->limits;
5637 struct iwn_calib_state *calib = &sc->calib;
5638 uint32_t val, rxena, fa;
5639 uint32_t energy[3], energy_min;
5640 uint8_t noise[3], noise_ref;
5641 int i, needs_update = 0;
5643 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s begin\n", __func__);
5645 /* Check that we've been enabled long enough. */
5646 if ((rxena = le32toh(stats->general.load)) == 0){
5647 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s end not so long\n", __func__);
5651 /* Compute number of false alarms since last call for OFDM. */
5652 fa = le32toh(stats->ofdm.bad_plcp) - calib->bad_plcp_ofdm;
5653 fa += le32toh(stats->ofdm.fa) - calib->fa_ofdm;
5654 fa *= 200 * IEEE80211_DUR_TU; /* 200TU */
5656 /* Save counters values for next call. */
5657 calib->bad_plcp_ofdm = le32toh(stats->ofdm.bad_plcp);
5658 calib->fa_ofdm = le32toh(stats->ofdm.fa);
5660 if (fa > 50 * rxena) {
5661 /* High false alarm count, decrease sensitivity. */
5662 DPRINTF(sc, IWN_DEBUG_CALIBRATE,
5663 "%s: OFDM high false alarm count: %u\n", __func__, fa);
5664 inc(calib->ofdm_x1, 1, limits->max_ofdm_x1);
5665 inc(calib->ofdm_mrc_x1, 1, limits->max_ofdm_mrc_x1);
5666 inc(calib->ofdm_x4, 1, limits->max_ofdm_x4);
5667 inc(calib->ofdm_mrc_x4, 1, limits->max_ofdm_mrc_x4);
5669 } else if (fa < 5 * rxena) {
5670 /* Low false alarm count, increase sensitivity. */
5671 DPRINTF(sc, IWN_DEBUG_CALIBRATE,
5672 "%s: OFDM low false alarm count: %u\n", __func__, fa);
5673 dec(calib->ofdm_x1, 1, limits->min_ofdm_x1);
5674 dec(calib->ofdm_mrc_x1, 1, limits->min_ofdm_mrc_x1);
5675 dec(calib->ofdm_x4, 1, limits->min_ofdm_x4);
5676 dec(calib->ofdm_mrc_x4, 1, limits->min_ofdm_mrc_x4);
5679 /* Compute maximum noise among 3 receivers. */
5680 for (i = 0; i < 3; i++)
5681 noise[i] = (le32toh(stats->general.noise[i]) >> 8) & 0xff;
5682 val = MAX(noise[0], noise[1]);
5683 val = MAX(noise[2], val);
5684 /* Insert it into our samples table. */
5685 calib->noise_samples[calib->cur_noise_sample] = val;
5686 calib->cur_noise_sample = (calib->cur_noise_sample + 1) % 20;
5688 /* Compute maximum noise among last 20 samples. */
5689 noise_ref = calib->noise_samples[0];
5690 for (i = 1; i < 20; i++)
5691 noise_ref = MAX(noise_ref, calib->noise_samples[i]);
5693 /* Compute maximum energy among 3 receivers. */
5694 for (i = 0; i < 3; i++)
5695 energy[i] = le32toh(stats->general.energy[i]);
5696 val = MIN(energy[0], energy[1]);
5697 val = MIN(energy[2], val);
5698 /* Insert it into our samples table. */
5699 calib->energy_samples[calib->cur_energy_sample] = val;
5700 calib->cur_energy_sample = (calib->cur_energy_sample + 1) % 10;
5702 /* Compute minimum energy among last 10 samples. */
5703 energy_min = calib->energy_samples[0];
5704 for (i = 1; i < 10; i++)
5705 energy_min = MAX(energy_min, calib->energy_samples[i]);
5708 /* Compute number of false alarms since last call for CCK. */
5709 fa = le32toh(stats->cck.bad_plcp) - calib->bad_plcp_cck;
5710 fa += le32toh(stats->cck.fa) - calib->fa_cck;
5711 fa *= 200 * IEEE80211_DUR_TU; /* 200TU */
5713 /* Save counters values for next call. */
5714 calib->bad_plcp_cck = le32toh(stats->cck.bad_plcp);
5715 calib->fa_cck = le32toh(stats->cck.fa);
5717 if (fa > 50 * rxena) {
5718 /* High false alarm count, decrease sensitivity. */
5719 DPRINTF(sc, IWN_DEBUG_CALIBRATE,
5720 "%s: CCK high false alarm count: %u\n", __func__, fa);
5721 calib->cck_state = IWN_CCK_STATE_HIFA;
5724 if (calib->cck_x4 > 160) {
5725 calib->noise_ref = noise_ref;
5726 if (calib->energy_cck > 2)
5727 dec(calib->energy_cck, 2, energy_min);
5729 if (calib->cck_x4 < 160) {
5730 calib->cck_x4 = 161;
5733 inc(calib->cck_x4, 3, limits->max_cck_x4);
5735 inc(calib->cck_mrc_x4, 3, limits->max_cck_mrc_x4);
5737 } else if (fa < 5 * rxena) {
5738 /* Low false alarm count, increase sensitivity. */
5739 DPRINTF(sc, IWN_DEBUG_CALIBRATE,
5740 "%s: CCK low false alarm count: %u\n", __func__, fa);
5741 calib->cck_state = IWN_CCK_STATE_LOFA;
5744 if (calib->cck_state != IWN_CCK_STATE_INIT &&
5745 (((int32_t)calib->noise_ref - (int32_t)noise_ref) > 2 ||
5746 calib->low_fa > 100)) {
5747 inc(calib->energy_cck, 2, limits->min_energy_cck);
5748 dec(calib->cck_x4, 3, limits->min_cck_x4);
5749 dec(calib->cck_mrc_x4, 3, limits->min_cck_mrc_x4);
5752 /* Not worth to increase or decrease sensitivity. */
5753 DPRINTF(sc, IWN_DEBUG_CALIBRATE,
5754 "%s: CCK normal false alarm count: %u\n", __func__, fa);
5756 calib->noise_ref = noise_ref;
5758 if (calib->cck_state == IWN_CCK_STATE_HIFA) {
5759 /* Previous interval had many false alarms. */
5760 dec(calib->energy_cck, 8, energy_min);
5762 calib->cck_state = IWN_CCK_STATE_INIT;
5766 (void)iwn_send_sensitivity(sc);
5768 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s: end\n",__func__);
5775 iwn_send_sensitivity(struct iwn_softc *sc)
5777 struct iwn_calib_state *calib = &sc->calib;
5778 struct iwn_enhanced_sensitivity_cmd cmd;
5781 memset(&cmd, 0, sizeof cmd);
5782 len = sizeof (struct iwn_sensitivity_cmd);
5783 cmd.which = IWN_SENSITIVITY_WORKTBL;
5784 /* OFDM modulation. */
5785 cmd.corr_ofdm_x1 = htole16(calib->ofdm_x1);
5786 cmd.corr_ofdm_mrc_x1 = htole16(calib->ofdm_mrc_x1);
5787 cmd.corr_ofdm_x4 = htole16(calib->ofdm_x4);
5788 cmd.corr_ofdm_mrc_x4 = htole16(calib->ofdm_mrc_x4);
5789 cmd.energy_ofdm = htole16(sc->limits->energy_ofdm);
5790 cmd.energy_ofdm_th = htole16(62);
5791 /* CCK modulation. */
5792 cmd.corr_cck_x4 = htole16(calib->cck_x4);
5793 cmd.corr_cck_mrc_x4 = htole16(calib->cck_mrc_x4);
5794 cmd.energy_cck = htole16(calib->energy_cck);
5795 /* Barker modulation: use default values. */
5796 cmd.corr_barker = htole16(190);
5797 cmd.corr_barker_mrc = htole16(390);
5799 DPRINTF(sc, IWN_DEBUG_CALIBRATE,
5800 "%s: set sensitivity %d/%d/%d/%d/%d/%d/%d\n", __func__,
5801 calib->ofdm_x1, calib->ofdm_mrc_x1, calib->ofdm_x4,
5802 calib->ofdm_mrc_x4, calib->cck_x4,
5803 calib->cck_mrc_x4, calib->energy_cck);
5805 if (!(sc->sc_flags & IWN_FLAG_ENH_SENS))
5807 /* Enhanced sensitivity settings. */
5808 len = sizeof (struct iwn_enhanced_sensitivity_cmd);
5809 cmd.ofdm_det_slope_mrc = htole16(668);
5810 cmd.ofdm_det_icept_mrc = htole16(4);
5811 cmd.ofdm_det_slope = htole16(486);
5812 cmd.ofdm_det_icept = htole16(37);
5813 cmd.cck_det_slope_mrc = htole16(853);
5814 cmd.cck_det_icept_mrc = htole16(4);
5815 cmd.cck_det_slope = htole16(476);
5816 cmd.cck_det_icept = htole16(99);
5818 return iwn_cmd(sc, IWN_CMD_SET_SENSITIVITY, &cmd, len, 1);
5822 * Set STA mode power saving level (between 0 and 5).
5823 * Level 0 is CAM (Continuously Aware Mode), 5 is for maximum power saving.
5826 iwn_set_pslevel(struct iwn_softc *sc, int dtim, int level, int async)
5828 struct iwn_pmgt_cmd cmd;
5829 const struct iwn_pmgt *pmgt;
5830 uint32_t max, skip_dtim;
5834 DPRINTF(sc, IWN_DEBUG_PWRSAVE,
5835 "%s: dtim=%d, level=%d, async=%d\n",
5841 /* Select which PS parameters to use. */
5843 pmgt = &iwn_pmgt[0][level];
5844 else if (dtim <= 10)
5845 pmgt = &iwn_pmgt[1][level];
5847 pmgt = &iwn_pmgt[2][level];
5849 memset(&cmd, 0, sizeof cmd);
5850 if (level != 0) /* not CAM */
5851 cmd.flags |= htole16(IWN_PS_ALLOW_SLEEP);
5853 cmd.flags |= htole16(IWN_PS_FAST_PD);
5854 /* Retrieve PCIe Active State Power Management (ASPM). */
5855 reg = pci_read_config(sc->sc_dev, sc->sc_cap_off + 0x10, 1);
5856 if (!(reg & 0x1)) /* L0s Entry disabled. */
5857 cmd.flags |= htole16(IWN_PS_PCI_PMGT);
5858 cmd.rxtimeout = htole32(pmgt->rxtimeout * 1024);
5859 cmd.txtimeout = htole32(pmgt->txtimeout * 1024);
5865 skip_dtim = pmgt->skip_dtim;
5866 if (skip_dtim != 0) {
5867 cmd.flags |= htole16(IWN_PS_SLEEP_OVER_DTIM);
5868 max = pmgt->intval[4];
5869 if (max == (uint32_t)-1)
5870 max = dtim * (skip_dtim + 1);
5871 else if (max > dtim)
5872 max = (max / dtim) * dtim;
5875 for (i = 0; i < 5; i++)
5876 cmd.intval[i] = htole32(MIN(max, pmgt->intval[i]));
5878 DPRINTF(sc, IWN_DEBUG_RESET, "setting power saving level to %d\n",
5880 return iwn_cmd(sc, IWN_CMD_SET_POWER_MODE, &cmd, sizeof cmd, async);
5884 iwn_send_btcoex(struct iwn_softc *sc)
5886 struct iwn_bluetooth cmd;
5888 memset(&cmd, 0, sizeof cmd);
5889 cmd.flags = IWN_BT_COEX_CHAN_ANN | IWN_BT_COEX_BT_PRIO;
5890 cmd.lead_time = IWN_BT_LEAD_TIME_DEF;
5891 cmd.max_kill = IWN_BT_MAX_KILL_DEF;
5892 DPRINTF(sc, IWN_DEBUG_RESET, "%s: configuring bluetooth coexistence\n",
5894 return iwn_cmd(sc, IWN_CMD_BT_COEX, &cmd, sizeof(cmd), 0);
5898 iwn_send_advanced_btcoex(struct iwn_softc *sc)
5900 static const uint32_t btcoex_3wire[12] = {
5901 0xaaaaaaaa, 0xaaaaaaaa, 0xaeaaaaaa, 0xaaaaaaaa,
5902 0xcc00ff28, 0x0000aaaa, 0xcc00aaaa, 0x0000aaaa,
5903 0xc0004000, 0x00004000, 0xf0005000, 0xf0005000,
5905 struct iwn6000_btcoex_config btconfig;
5906 struct iwn2000_btcoex_config btconfig2k;
5907 struct iwn_btcoex_priotable btprio;
5908 struct iwn_btcoex_prot btprot;
5912 memset(&btconfig, 0, sizeof btconfig);
5913 memset(&btconfig2k, 0, sizeof btconfig2k);
5915 flags = IWN_BT_FLAG_COEX6000_MODE_3W <<
5916 IWN_BT_FLAG_COEX6000_MODE_SHIFT; // Done as is in linux kernel 3.2
5918 if (sc->base_params->bt_sco_disable)
5919 flags &= ~IWN_BT_FLAG_SYNC_2_BT_DISABLE;
5921 flags |= IWN_BT_FLAG_SYNC_2_BT_DISABLE;
5923 flags |= IWN_BT_FLAG_COEX6000_CHAN_INHIBITION;
5925 /* Default flags result is 145 as old value */
5928 * Flags value has to be review. Values must change if we
5929 * which to disable it
5931 if (sc->base_params->bt_session_2) {
5932 btconfig2k.flags = flags;
5933 btconfig2k.max_kill = 5;
5934 btconfig2k.bt3_t7_timer = 1;
5935 btconfig2k.kill_ack = htole32(0xffff0000);
5936 btconfig2k.kill_cts = htole32(0xffff0000);
5937 btconfig2k.sample_time = 2;
5938 btconfig2k.bt3_t2_timer = 0xc;
5940 for (i = 0; i < 12; i++)
5941 btconfig2k.lookup_table[i] = htole32(btcoex_3wire[i]);
5942 btconfig2k.valid = htole16(0xff);
5943 btconfig2k.prio_boost = htole32(0xf0);
5944 DPRINTF(sc, IWN_DEBUG_RESET,
5945 "%s: configuring advanced bluetooth coexistence"
5946 " session 2, flags : 0x%x\n",
5949 error = iwn_cmd(sc, IWN_CMD_BT_COEX, &btconfig2k,
5950 sizeof(btconfig2k), 1);
5952 btconfig.flags = flags;
5953 btconfig.max_kill = 5;
5954 btconfig.bt3_t7_timer = 1;
5955 btconfig.kill_ack = htole32(0xffff0000);
5956 btconfig.kill_cts = htole32(0xffff0000);
5957 btconfig.sample_time = 2;
5958 btconfig.bt3_t2_timer = 0xc;
5960 for (i = 0; i < 12; i++)
5961 btconfig.lookup_table[i] = htole32(btcoex_3wire[i]);
5962 btconfig.valid = htole16(0xff);
5963 btconfig.prio_boost = 0xf0;
5964 DPRINTF(sc, IWN_DEBUG_RESET,
5965 "%s: configuring advanced bluetooth coexistence,"
5969 error = iwn_cmd(sc, IWN_CMD_BT_COEX, &btconfig,
5970 sizeof(btconfig), 1);
5977 memset(&btprio, 0, sizeof btprio);
5978 btprio.calib_init1 = 0x6;
5979 btprio.calib_init2 = 0x7;
5980 btprio.calib_periodic_low1 = 0x2;
5981 btprio.calib_periodic_low2 = 0x3;
5982 btprio.calib_periodic_high1 = 0x4;
5983 btprio.calib_periodic_high2 = 0x5;
5985 btprio.scan52 = 0x8;
5986 btprio.scan24 = 0xa;
5987 error = iwn_cmd(sc, IWN_CMD_BT_COEX_PRIOTABLE, &btprio, sizeof(btprio),
5992 /* Force BT state machine change. */
5993 memset(&btprot, 0, sizeof btprot);
5996 error = iwn_cmd(sc, IWN_CMD_BT_COEX_PROT, &btprot, sizeof(btprot), 1);
6000 return iwn_cmd(sc, IWN_CMD_BT_COEX_PROT, &btprot, sizeof(btprot), 1);
6004 iwn5000_runtime_calib(struct iwn_softc *sc)
6006 struct iwn5000_calib_config cmd;
6008 memset(&cmd, 0, sizeof cmd);
6009 cmd.ucode.once.enable = 0xffffffff;
6010 cmd.ucode.once.start = IWN5000_CALIB_DC;
6011 DPRINTF(sc, IWN_DEBUG_CALIBRATE,
6012 "%s: configuring runtime calibration\n", __func__);
6013 return iwn_cmd(sc, IWN5000_CMD_CALIB_CONFIG, &cmd, sizeof(cmd), 0);
6017 iwn_config(struct iwn_softc *sc)
6019 struct iwn_ops *ops = &sc->ops;
6020 struct ifnet *ifp = sc->sc_ifp;
6021 struct ieee80211com *ic = ifp->if_l2com;
6026 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s begin\n", __func__);
6028 if ((sc->base_params->calib_need & IWN_FLG_NEED_PHY_CALIB_TEMP_OFFSET)
6029 && (sc->base_params->calib_need & IWN_FLG_NEED_PHY_CALIB_TEMP_OFFSETv2)) {
6030 device_printf(sc->sc_dev,"%s: temp_offset and temp_offsetv2 are"
6031 " exclusive each together. Review NIC config file. Conf"
6032 " : 0x%08x Flags : 0x%08x \n", __func__,
6033 sc->base_params->calib_need,
6034 (IWN_FLG_NEED_PHY_CALIB_TEMP_OFFSET |
6035 IWN_FLG_NEED_PHY_CALIB_TEMP_OFFSETv2));
6039 /* Compute temperature calib if needed. Will be send by send calib */
6040 if (sc->base_params->calib_need & IWN_FLG_NEED_PHY_CALIB_TEMP_OFFSET) {
6041 error = iwn5000_temp_offset_calib(sc);
6043 device_printf(sc->sc_dev,
6044 "%s: could not set temperature offset\n", __func__);
6047 } else if (sc->base_params->calib_need & IWN_FLG_NEED_PHY_CALIB_TEMP_OFFSETv2) {
6048 error = iwn5000_temp_offset_calibv2(sc);
6050 device_printf(sc->sc_dev,
6051 "%s: could not compute temperature offset v2\n",
6057 if (sc->hw_type == IWN_HW_REV_TYPE_6050) {
6058 /* Configure runtime DC calibration. */
6059 error = iwn5000_runtime_calib(sc);
6061 device_printf(sc->sc_dev,
6062 "%s: could not configure runtime calibration\n",
6068 /* Configure valid TX chains for >=5000 Series. */
6069 if (sc->hw_type != IWN_HW_REV_TYPE_4965) {
6070 txmask = htole32(sc->txchainmask);
6071 DPRINTF(sc, IWN_DEBUG_RESET,
6072 "%s: configuring valid TX chains 0x%x\n", __func__, txmask);
6073 error = iwn_cmd(sc, IWN5000_CMD_TX_ANT_CONFIG, &txmask,
6076 device_printf(sc->sc_dev,
6077 "%s: could not configure valid TX chains, "
6078 "error %d\n", __func__, error);
6083 /* Configure bluetooth coexistence. */
6086 /* Configure bluetooth coexistence if needed. */
6087 if (sc->base_params->bt_mode == IWN_BT_ADVANCED)
6088 error = iwn_send_advanced_btcoex(sc);
6089 if (sc->base_params->bt_mode == IWN_BT_SIMPLE)
6090 error = iwn_send_btcoex(sc);
6093 device_printf(sc->sc_dev,
6094 "%s: could not configure bluetooth coexistence, error %d\n",
6099 /* Set mode, channel, RX filter and enable RX. */
6100 sc->rxon = &sc->rx_on[IWN_RXON_BSS_CTX];
6101 memset(sc->rxon, 0, sizeof (struct iwn_rxon));
6102 IEEE80211_ADDR_COPY(sc->rxon->myaddr, IF_LLADDR(ifp));
6103 IEEE80211_ADDR_COPY(sc->rxon->wlap, IF_LLADDR(ifp));
6104 sc->rxon->chan = ieee80211_chan2ieee(ic, ic->ic_curchan);
6105 sc->rxon->flags = htole32(IWN_RXON_TSF | IWN_RXON_CTS_TO_SELF);
6106 if (IEEE80211_IS_CHAN_2GHZ(ic->ic_curchan))
6107 sc->rxon->flags |= htole32(IWN_RXON_AUTO | IWN_RXON_24GHZ);
6108 switch (ic->ic_opmode) {
6109 case IEEE80211_M_STA:
6110 sc->rxon->mode = IWN_MODE_STA;
6111 sc->rxon->filter = htole32(IWN_FILTER_MULTICAST);
6113 case IEEE80211_M_MONITOR:
6114 sc->rxon->mode = IWN_MODE_MONITOR;
6115 sc->rxon->filter = htole32(IWN_FILTER_MULTICAST |
6116 IWN_FILTER_CTL | IWN_FILTER_PROMISC);
6119 /* Should not get there. */
6122 sc->rxon->cck_mask = 0x0f; /* not yet negotiated */
6123 sc->rxon->ofdm_mask = 0xff; /* not yet negotiated */
6124 sc->rxon->ht_single_mask = 0xff;
6125 sc->rxon->ht_dual_mask = 0xff;
6126 sc->rxon->ht_triple_mask = 0xff;
6128 IWN_RXCHAIN_VALID(sc->rxchainmask) |
6129 IWN_RXCHAIN_MIMO_COUNT(2) |
6130 IWN_RXCHAIN_IDLE_COUNT(2);
6131 sc->rxon->rxchain = htole16(rxchain);
6132 DPRINTF(sc, IWN_DEBUG_RESET, "%s: setting configuration\n", __func__);
6133 error = iwn_cmd(sc, IWN_CMD_RXON, sc->rxon, sc->rxonsz, 0);
6135 device_printf(sc->sc_dev, "%s: RXON command failed\n",
6140 if ((error = iwn_add_broadcast_node(sc, 0)) != 0) {
6141 device_printf(sc->sc_dev, "%s: could not add broadcast node\n",
6146 /* Configuration has changed, set TX power accordingly. */
6147 if ((error = ops->set_txpower(sc, ic->ic_curchan, 0)) != 0) {
6148 device_printf(sc->sc_dev, "%s: could not set TX power\n",
6153 if ((error = iwn_set_critical_temp(sc)) != 0) {
6154 device_printf(sc->sc_dev,
6155 "%s: could not set critical temperature\n", __func__);
6159 /* Set power saving level to CAM during initialization. */
6160 if ((error = iwn_set_pslevel(sc, 0, 0, 0)) != 0) {
6161 device_printf(sc->sc_dev,
6162 "%s: could not set power saving level\n", __func__);
6166 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s: end\n",__func__);
6172 * Add an ssid element to a frame.
6175 ieee80211_add_ssid(uint8_t *frm, const uint8_t *ssid, u_int len)
6177 *frm++ = IEEE80211_ELEMID_SSID;
6179 memcpy(frm, ssid, len);
6184 iwn_scan(struct iwn_softc *sc)
6186 struct ifnet *ifp = sc->sc_ifp;
6187 struct ieee80211com *ic = ifp->if_l2com;
6188 struct ieee80211_scan_state *ss = ic->ic_scan; /*XXX*/
6189 struct ieee80211_node *ni = ss->ss_vap->iv_bss;
6190 struct iwn_scan_hdr *hdr;
6191 struct iwn_cmd_data *tx;
6192 struct iwn_scan_essid *essid;
6193 struct iwn_scan_chan *chan;
6194 struct ieee80211_frame *wh;
6195 struct ieee80211_rateset *rs;
6196 struct ieee80211_channel *c;
6202 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s begin\n", __func__);
6204 sc->rxon = &sc->rx_on[IWN_RXON_BSS_CTX];
6205 buf = kmalloc(IWN_SCAN_MAXSZ, M_DEVBUF, M_INTWAIT | M_ZERO);
6206 hdr = (struct iwn_scan_hdr *)buf;
6208 * Move to the next channel if no frames are received within 10ms
6209 * after sending the probe request.
6211 hdr->quiet_time = htole16(10); /* timeout in milliseconds */
6212 hdr->quiet_threshold = htole16(1); /* min # of packets */
6214 * Max needs to be greater than active and passive and quiet!
6215 * It's also in microseconds!
6217 hdr->max_svc = htole32(250 * 1000);
6219 /* Select antennas for scanning. */
6221 IWN_RXCHAIN_VALID(sc->rxchainmask) |
6222 IWN_RXCHAIN_FORCE_MIMO_SEL(sc->rxchainmask) |
6223 IWN_RXCHAIN_DRIVER_FORCE;
6224 if (IEEE80211_IS_CHAN_A(ic->ic_curchan) &&
6225 sc->hw_type == IWN_HW_REV_TYPE_4965) {
6226 /* Ant A must be avoided in 5GHz because of an HW bug. */
6227 rxchain |= IWN_RXCHAIN_FORCE_SEL(IWN_ANT_B);
6228 } else /* Use all available RX antennas. */
6229 rxchain |= IWN_RXCHAIN_FORCE_SEL(sc->rxchainmask);
6230 hdr->rxchain = htole16(rxchain);
6231 hdr->filter = htole32(IWN_FILTER_MULTICAST | IWN_FILTER_BEACON);
6233 tx = (struct iwn_cmd_data *)(hdr + 1);
6234 tx->flags = htole32(IWN_TX_AUTO_SEQ);
6235 tx->id = sc->broadcast_id;
6236 tx->lifetime = htole32(IWN_LIFETIME_INFINITE);
6238 if (IEEE80211_IS_CHAN_5GHZ(ic->ic_curchan)) {
6239 /* Send probe requests at 6Mbps. */
6240 tx->rate = htole32(0xd);
6241 rs = &ic->ic_sup_rates[IEEE80211_MODE_11A];
6243 hdr->flags = htole32(IWN_RXON_24GHZ | IWN_RXON_AUTO);
6244 if (sc->hw_type == IWN_HW_REV_TYPE_4965 &&
6245 sc->rxon->associd && sc->rxon->chan > 14)
6246 tx->rate = htole32(0xd);
6248 /* Send probe requests at 1Mbps. */
6249 tx->rate = htole32(10 | IWN_RFLAG_CCK);
6251 rs = &ic->ic_sup_rates[IEEE80211_MODE_11G];
6253 /* Use the first valid TX antenna. */
6254 txant = IWN_LSB(sc->txchainmask);
6255 tx->rate |= htole32(IWN_RFLAG_ANT(txant));
6257 essid = (struct iwn_scan_essid *)(tx + 1);
6258 if (ss->ss_ssid[0].len != 0) {
6259 essid[0].id = IEEE80211_ELEMID_SSID;
6260 essid[0].len = ss->ss_ssid[0].len;
6261 memcpy(essid[0].data, ss->ss_ssid[0].ssid, ss->ss_ssid[0].len);
6264 * Build a probe request frame. Most of the following code is a
6265 * copy & paste of what is done in net80211.
6267 wh = (struct ieee80211_frame *)(essid + 20);
6268 wh->i_fc[0] = IEEE80211_FC0_VERSION_0 | IEEE80211_FC0_TYPE_MGT |
6269 IEEE80211_FC0_SUBTYPE_PROBE_REQ;
6270 wh->i_fc[1] = IEEE80211_FC1_DIR_NODS;
6271 IEEE80211_ADDR_COPY(wh->i_addr1, ifp->if_broadcastaddr);
6272 IEEE80211_ADDR_COPY(wh->i_addr2, IF_LLADDR(ifp));
6273 IEEE80211_ADDR_COPY(wh->i_addr3, ifp->if_broadcastaddr);
6274 *(uint16_t *)&wh->i_dur[0] = 0; /* filled by HW */
6275 *(uint16_t *)&wh->i_seq[0] = 0; /* filled by HW */
6277 frm = (uint8_t *)(wh + 1);
6278 frm = ieee80211_add_ssid(frm, NULL, 0);
6279 frm = ieee80211_add_rates(frm, rs);
6280 if (rs->rs_nrates > IEEE80211_RATE_SIZE)
6281 frm = ieee80211_add_xrates(frm, rs);
6282 if (ic->ic_htcaps & IEEE80211_HTC_HT)
6283 frm = ieee80211_add_htcap(frm, ni);
6285 /* Set length of probe request. */
6286 tx->len = htole16(frm - (uint8_t *)wh);
6289 chan = (struct iwn_scan_chan *)frm;
6290 chan->chan = htole16(ieee80211_chan2ieee(ic, c));
6292 if (ss->ss_nssid > 0)
6293 chan->flags |= htole32(IWN_CHAN_NPBREQS(1));
6294 chan->dsp_gain = 0x6e;
6295 if (IEEE80211_IS_CHAN_5GHZ(c) &&
6296 !(c->ic_flags & IEEE80211_CHAN_PASSIVE)) {
6297 chan->rf_gain = 0x3b;
6298 chan->active = htole16(24);
6299 chan->passive = htole16(110);
6300 chan->flags |= htole32(IWN_CHAN_ACTIVE);
6301 } else if (IEEE80211_IS_CHAN_5GHZ(c)) {
6302 chan->rf_gain = 0x3b;
6303 chan->active = htole16(24);
6304 if (sc->rxon->associd)
6305 chan->passive = htole16(78);
6307 chan->passive = htole16(110);
6308 hdr->crc_threshold = 0xffff;
6309 } else if (!(c->ic_flags & IEEE80211_CHAN_PASSIVE)) {
6310 chan->rf_gain = 0x28;
6311 chan->active = htole16(36);
6312 chan->passive = htole16(120);
6313 chan->flags |= htole32(IWN_CHAN_ACTIVE);
6315 chan->rf_gain = 0x28;
6316 chan->active = htole16(36);
6317 if (sc->rxon->associd)
6318 chan->passive = htole16(88);
6320 chan->passive = htole16(120);
6321 hdr->crc_threshold = 0xffff;
6324 DPRINTF(sc, IWN_DEBUG_STATE,
6325 "%s: chan %u flags 0x%x rf_gain 0x%x "
6326 "dsp_gain 0x%x active 0x%x passive 0x%x\n", __func__,
6327 chan->chan, chan->flags, chan->rf_gain, chan->dsp_gain,
6328 chan->active, chan->passive);
6332 buflen = (uint8_t *)chan - buf;
6333 hdr->len = htole16(buflen);
6335 DPRINTF(sc, IWN_DEBUG_STATE, "sending scan command nchan=%d\n",
6337 error = iwn_cmd(sc, IWN_CMD_SCAN, buf, buflen, 1);
6338 kfree(buf, M_DEVBUF);
6340 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s: end\n",__func__);
6346 iwn_auth(struct iwn_softc *sc, struct ieee80211vap *vap)
6348 struct iwn_ops *ops = &sc->ops;
6349 struct ifnet *ifp = sc->sc_ifp;
6350 struct ieee80211com *ic = ifp->if_l2com;
6351 struct ieee80211_node *ni = vap->iv_bss;
6354 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s begin\n", __func__);
6356 sc->rxon = &sc->rx_on[IWN_RXON_BSS_CTX];
6357 /* Update adapter configuration. */
6358 IEEE80211_ADDR_COPY(sc->rxon->bssid, ni->ni_bssid);
6359 sc->rxon->chan = ieee80211_chan2ieee(ic, ni->ni_chan);
6360 sc->rxon->flags = htole32(IWN_RXON_TSF | IWN_RXON_CTS_TO_SELF);
6361 if (IEEE80211_IS_CHAN_2GHZ(ni->ni_chan))
6362 sc->rxon->flags |= htole32(IWN_RXON_AUTO | IWN_RXON_24GHZ);
6363 if (ic->ic_flags & IEEE80211_F_SHSLOT)
6364 sc->rxon->flags |= htole32(IWN_RXON_SHSLOT);
6365 if (ic->ic_flags & IEEE80211_F_SHPREAMBLE)
6366 sc->rxon->flags |= htole32(IWN_RXON_SHPREAMBLE);
6367 if (IEEE80211_IS_CHAN_A(ni->ni_chan)) {
6368 sc->rxon->cck_mask = 0;
6369 sc->rxon->ofdm_mask = 0x15;
6370 } else if (IEEE80211_IS_CHAN_B(ni->ni_chan)) {
6371 sc->rxon->cck_mask = 0x03;
6372 sc->rxon->ofdm_mask = 0;
6374 /* Assume 802.11b/g. */
6375 sc->rxon->cck_mask = 0x0f;
6376 sc->rxon->ofdm_mask = 0x15;
6378 DPRINTF(sc, IWN_DEBUG_STATE, "rxon chan %d flags %x cck %x ofdm %x\n",
6379 sc->rxon->chan, sc->rxon->flags, sc->rxon->cck_mask,
6380 sc->rxon->ofdm_mask);
6381 error = iwn_cmd(sc, IWN_CMD_RXON, sc->rxon, sc->rxonsz, 1);
6383 device_printf(sc->sc_dev, "%s: RXON command failed, error %d\n",
6388 /* Configuration has changed, set TX power accordingly. */
6389 if ((error = ops->set_txpower(sc, ni->ni_chan, 1)) != 0) {
6390 device_printf(sc->sc_dev,
6391 "%s: could not set TX power, error %d\n", __func__, error);
6395 * Reconfiguring RXON clears the firmware nodes table so we must
6396 * add the broadcast node again.
6398 if ((error = iwn_add_broadcast_node(sc, 1)) != 0) {
6399 device_printf(sc->sc_dev,
6400 "%s: could not add broadcast node, error %d\n", __func__,
6405 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s: end\n",__func__);
6411 iwn_run(struct iwn_softc *sc, struct ieee80211vap *vap)
6413 struct iwn_ops *ops = &sc->ops;
6414 struct ifnet *ifp = sc->sc_ifp;
6415 struct ieee80211com *ic = ifp->if_l2com;
6416 struct ieee80211_node *ni = vap->iv_bss;
6417 struct iwn_node_info node;
6418 uint32_t htflags = 0;
6421 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s begin\n", __func__);
6423 sc->rxon = &sc->rx_on[IWN_RXON_BSS_CTX];
6424 if (ic->ic_opmode == IEEE80211_M_MONITOR) {
6425 /* Link LED blinks while monitoring. */
6426 iwn_set_led(sc, IWN_LED_LINK, 5, 5);
6429 if ((error = iwn_set_timing(sc, ni)) != 0) {
6430 device_printf(sc->sc_dev,
6431 "%s: could not set timing, error %d\n", __func__, error);
6435 /* Update adapter configuration. */
6436 IEEE80211_ADDR_COPY(sc->rxon->bssid, ni->ni_bssid);
6437 sc->rxon->associd = htole16(IEEE80211_AID(ni->ni_associd));
6438 sc->rxon->chan = ieee80211_chan2ieee(ic, ni->ni_chan);
6439 sc->rxon->flags = htole32(IWN_RXON_TSF | IWN_RXON_CTS_TO_SELF);
6440 if (IEEE80211_IS_CHAN_2GHZ(ni->ni_chan))
6441 sc->rxon->flags |= htole32(IWN_RXON_AUTO | IWN_RXON_24GHZ);
6442 if (ic->ic_flags & IEEE80211_F_SHSLOT)
6443 sc->rxon->flags |= htole32(IWN_RXON_SHSLOT);
6444 if (ic->ic_flags & IEEE80211_F_SHPREAMBLE)
6445 sc->rxon->flags |= htole32(IWN_RXON_SHPREAMBLE);
6446 if (IEEE80211_IS_CHAN_A(ni->ni_chan)) {
6447 sc->rxon->cck_mask = 0;
6448 sc->rxon->ofdm_mask = 0x15;
6449 } else if (IEEE80211_IS_CHAN_B(ni->ni_chan)) {
6450 sc->rxon->cck_mask = 0x03;
6451 sc->rxon->ofdm_mask = 0;
6453 /* Assume 802.11b/g. */
6454 sc->rxon->cck_mask = 0x0f;
6455 sc->rxon->ofdm_mask = 0x15;
6457 if (IEEE80211_IS_CHAN_HT(ni->ni_chan)) {
6458 htflags |= IWN_RXON_HT_PROTMODE(ic->ic_curhtprotmode);
6459 if (IEEE80211_IS_CHAN_HT40(ni->ni_chan)) {
6460 switch (ic->ic_curhtprotmode) {
6461 case IEEE80211_HTINFO_OPMODE_HT20PR:
6462 htflags |= IWN_RXON_HT_MODEPURE40;
6465 htflags |= IWN_RXON_HT_MODEMIXED;
6469 if (IEEE80211_IS_CHAN_HT40D(ni->ni_chan))
6470 htflags |= IWN_RXON_HT_HT40MINUS;
6472 sc->rxon->flags |= htole32(htflags);
6473 sc->rxon->filter |= htole32(IWN_FILTER_BSS);
6474 DPRINTF(sc, IWN_DEBUG_STATE, "rxon chan %d flags %x\n",
6475 sc->rxon->chan, sc->rxon->flags);
6476 error = iwn_cmd(sc, IWN_CMD_RXON, sc->rxon, sc->rxonsz, 1);
6478 device_printf(sc->sc_dev,
6479 "%s: could not update configuration, error %d\n", __func__,
6484 /* Configuration has changed, set TX power accordingly. */
6485 if ((error = ops->set_txpower(sc, ni->ni_chan, 1)) != 0) {
6486 device_printf(sc->sc_dev,
6487 "%s: could not set TX power, error %d\n", __func__, error);
6491 /* Fake a join to initialize the TX rate. */
6492 ((struct iwn_node *)ni)->id = IWN_ID_BSS;
6493 iwn_newassoc(ni, 1);
6496 memset(&node, 0, sizeof node);
6497 IEEE80211_ADDR_COPY(node.macaddr, ni->ni_macaddr);
6498 node.id = IWN_ID_BSS;
6499 if (IEEE80211_IS_CHAN_HT(ni->ni_chan)) {
6500 switch (ni->ni_htcap & IEEE80211_HTCAP_SMPS) {
6501 case IEEE80211_HTCAP_SMPS_ENA:
6502 node.htflags |= htole32(IWN_SMPS_MIMO_DIS);
6504 case IEEE80211_HTCAP_SMPS_DYNAMIC:
6505 node.htflags |= htole32(IWN_SMPS_MIMO_PROT);
6508 node.htflags |= htole32(IWN_AMDPU_SIZE_FACTOR(3) |
6509 IWN_AMDPU_DENSITY(5)); /* 4us */
6510 if (IEEE80211_IS_CHAN_HT40(ni->ni_chan))
6511 node.htflags |= htole32(IWN_NODE_HT40);
6513 DPRINTF(sc, IWN_DEBUG_STATE, "%s: adding BSS node\n", __func__);
6514 error = ops->add_node(sc, &node, 1);
6516 device_printf(sc->sc_dev,
6517 "%s: could not add BSS node, error %d\n", __func__, error);
6520 DPRINTF(sc, IWN_DEBUG_STATE, "%s: setting link quality for node %d\n",
6522 if ((error = iwn_set_link_quality(sc, ni)) != 0) {
6523 device_printf(sc->sc_dev,
6524 "%s: could not setup link quality for node %d, error %d\n",
6525 __func__, node.id, error);
6529 if ((error = iwn_init_sensitivity(sc)) != 0) {
6530 device_printf(sc->sc_dev,
6531 "%s: could not set sensitivity, error %d\n", __func__,
6535 /* Start periodic calibration timer. */
6536 sc->calib.state = IWN_CALIB_STATE_ASSOC;
6538 callout_reset(&sc->calib_to, msecs_to_ticks(500), iwn_calib_timeout,
6541 /* Link LED always on while associated. */
6542 iwn_set_led(sc, IWN_LED_LINK, 0, 1);
6544 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s: end\n",__func__);
6550 * This function is called by upper layer when an ADDBA request is received
6551 * from another STA and before the ADDBA response is sent.
6554 iwn_ampdu_rx_start(struct ieee80211_node *ni, struct ieee80211_rx_ampdu *rap,
6555 int baparamset, int batimeout, int baseqctl)
6557 #define MS(_v, _f) (((_v) & _f) >> _f##_S)
6558 struct iwn_softc *sc = ni->ni_ic->ic_ifp->if_softc;
6559 struct iwn_ops *ops = &sc->ops;
6560 struct iwn_node *wn = (void *)ni;
6561 struct iwn_node_info node;
6566 DPRINTF(sc, IWN_DEBUG_TRACE, "->Doing %s\n", __func__);
6568 tid = MS(le16toh(baparamset), IEEE80211_BAPS_TID);
6569 ssn = MS(le16toh(baseqctl), IEEE80211_BASEQ_START);
6571 memset(&node, 0, sizeof node);
6573 node.control = IWN_NODE_UPDATE;
6574 node.flags = IWN_FLAG_SET_ADDBA;
6575 node.addba_tid = tid;
6576 node.addba_ssn = htole16(ssn);
6577 DPRINTF(sc, IWN_DEBUG_RECV, "ADDBA RA=%d TID=%d SSN=%d\n",
6579 error = ops->add_node(sc, &node, 1);
6582 return sc->sc_ampdu_rx_start(ni, rap, baparamset, batimeout, baseqctl);
6587 * This function is called by upper layer on teardown of an HT-immediate
6588 * Block Ack agreement (eg. uppon receipt of a DELBA frame).
6591 iwn_ampdu_rx_stop(struct ieee80211_node *ni, struct ieee80211_rx_ampdu *rap)
6593 struct ieee80211com *ic = ni->ni_ic;
6594 struct iwn_softc *sc = ic->ic_ifp->if_softc;
6595 struct iwn_ops *ops = &sc->ops;
6596 struct iwn_node *wn = (void *)ni;
6597 struct iwn_node_info node;
6600 DPRINTF(sc, IWN_DEBUG_TRACE, "->Doing %s\n", __func__);
6602 /* XXX: tid as an argument */
6603 for (tid = 0; tid < WME_NUM_TID; tid++) {
6604 if (&ni->ni_rx_ampdu[tid] == rap)
6608 memset(&node, 0, sizeof node);
6610 node.control = IWN_NODE_UPDATE;
6611 node.flags = IWN_FLAG_SET_DELBA;
6612 node.delba_tid = tid;
6613 DPRINTF(sc, IWN_DEBUG_RECV, "DELBA RA=%d TID=%d\n", wn->id, tid);
6614 (void)ops->add_node(sc, &node, 1);
6615 sc->sc_ampdu_rx_stop(ni, rap);
6619 iwn_addba_request(struct ieee80211_node *ni, struct ieee80211_tx_ampdu *tap,
6620 int dialogtoken, int baparamset, int batimeout)
6622 struct iwn_softc *sc = ni->ni_ic->ic_ifp->if_softc;
6625 DPRINTF(sc, IWN_DEBUG_TRACE, "->Doing %s\n", __func__);
6627 for (qid = sc->firstaggqueue; qid < sc->ntxqs; qid++) {
6628 if (sc->qid2tap[qid] == NULL)
6631 if (qid == sc->ntxqs) {
6632 DPRINTF(sc, IWN_DEBUG_XMIT, "%s: not free aggregation queue\n",
6636 tap->txa_private = kmalloc(sizeof(int), M_DEVBUF, M_INTWAIT);
6637 sc->qid2tap[qid] = tap;
6638 *(int *)tap->txa_private = qid;
6639 return sc->sc_addba_request(ni, tap, dialogtoken, baparamset,
6644 iwn_addba_response(struct ieee80211_node *ni, struct ieee80211_tx_ampdu *tap,
6645 int code, int baparamset, int batimeout)
6647 struct iwn_softc *sc = ni->ni_ic->ic_ifp->if_softc;
6648 int qid = *(int *)tap->txa_private;
6649 uint8_t tid = tap->txa_ac;
6652 DPRINTF(sc, IWN_DEBUG_TRACE, "->Doing %s\n", __func__);
6654 if (code == IEEE80211_STATUS_SUCCESS) {
6655 ni->ni_txseqs[tid] = tap->txa_start & 0xfff;
6656 ret = iwn_ampdu_tx_start(ni->ni_ic, ni, tid);
6660 sc->qid2tap[qid] = NULL;
6661 kfree(tap->txa_private, M_DEVBUF);
6662 tap->txa_private = NULL;
6664 return sc->sc_addba_response(ni, tap, code, baparamset, batimeout);
6668 * This function is called by upper layer when an ADDBA response is received
6672 iwn_ampdu_tx_start(struct ieee80211com *ic, struct ieee80211_node *ni,
6675 struct ieee80211_tx_ampdu *tap = &ni->ni_tx_ampdu[tid];
6676 struct iwn_softc *sc = ni->ni_ic->ic_ifp->if_softc;
6677 struct iwn_ops *ops = &sc->ops;
6678 struct iwn_node *wn = (void *)ni;
6679 struct iwn_node_info node;
6682 DPRINTF(sc, IWN_DEBUG_TRACE, "->Doing %s\n", __func__);
6684 /* Enable TX for the specified RA/TID. */
6685 wn->disable_tid &= ~(1 << tid);
6686 memset(&node, 0, sizeof node);
6688 node.control = IWN_NODE_UPDATE;
6689 node.flags = IWN_FLAG_SET_DISABLE_TID;
6690 node.disable_tid = htole16(wn->disable_tid);
6691 error = ops->add_node(sc, &node, 1);
6695 if ((error = iwn_nic_lock(sc)) != 0)
6697 qid = *(int *)tap->txa_private;
6698 DPRINTF(sc, IWN_DEBUG_XMIT, "%s: ra=%d tid=%d ssn=%d qid=%d\n",
6699 __func__, wn->id, tid, tap->txa_start, qid);
6700 ops->ampdu_tx_start(sc, ni, qid, tid, tap->txa_start & 0xfff);
6703 iwn_set_link_quality(sc, ni);
6708 iwn_ampdu_tx_stop(struct ieee80211_node *ni, struct ieee80211_tx_ampdu *tap)
6710 struct iwn_softc *sc = ni->ni_ic->ic_ifp->if_softc;
6711 struct iwn_ops *ops = &sc->ops;
6712 uint8_t tid = tap->txa_ac;
6715 DPRINTF(sc, IWN_DEBUG_TRACE, "->Doing %s\n", __func__);
6717 sc->sc_addba_stop(ni, tap);
6719 if (tap->txa_private == NULL)
6722 qid = *(int *)tap->txa_private;
6723 if (sc->txq[qid].queued != 0)
6725 if (iwn_nic_lock(sc) != 0)
6727 ops->ampdu_tx_stop(sc, qid, tid, tap->txa_start & 0xfff);
6729 sc->qid2tap[qid] = NULL;
6730 kfree(tap->txa_private, M_DEVBUF);
6731 tap->txa_private = NULL;
6735 iwn4965_ampdu_tx_start(struct iwn_softc *sc, struct ieee80211_node *ni,
6736 int qid, uint8_t tid, uint16_t ssn)
6738 struct iwn_node *wn = (void *)ni;
6740 DPRINTF(sc, IWN_DEBUG_TRACE, "->Doing %s\n", __func__);
6742 /* Stop TX scheduler while we're changing its configuration. */
6743 iwn_prph_write(sc, IWN4965_SCHED_QUEUE_STATUS(qid),
6744 IWN4965_TXQ_STATUS_CHGACT);
6746 /* Assign RA/TID translation to the queue. */
6747 iwn_mem_write_2(sc, sc->sched_base + IWN4965_SCHED_TRANS_TBL(qid),
6750 /* Enable chain-building mode for the queue. */
6751 iwn_prph_setbits(sc, IWN4965_SCHED_QCHAIN_SEL, 1 << qid);
6753 /* Set starting sequence number from the ADDBA request. */
6754 sc->txq[qid].cur = sc->txq[qid].read = (ssn & 0xff);
6755 IWN_WRITE(sc, IWN_HBUS_TARG_WRPTR, qid << 8 | (ssn & 0xff));
6756 iwn_prph_write(sc, IWN4965_SCHED_QUEUE_RDPTR(qid), ssn);
6758 /* Set scheduler window size. */
6759 iwn_mem_write(sc, sc->sched_base + IWN4965_SCHED_QUEUE_OFFSET(qid),
6761 /* Set scheduler frame limit. */
6762 iwn_mem_write(sc, sc->sched_base + IWN4965_SCHED_QUEUE_OFFSET(qid) + 4,
6763 IWN_SCHED_LIMIT << 16);
6765 /* Enable interrupts for the queue. */
6766 iwn_prph_setbits(sc, IWN4965_SCHED_INTR_MASK, 1 << qid);
6768 /* Mark the queue as active. */
6769 iwn_prph_write(sc, IWN4965_SCHED_QUEUE_STATUS(qid),
6770 IWN4965_TXQ_STATUS_ACTIVE | IWN4965_TXQ_STATUS_AGGR_ENA |
6771 iwn_tid2fifo[tid] << 1);
6775 iwn4965_ampdu_tx_stop(struct iwn_softc *sc, int qid, uint8_t tid, uint16_t ssn)
6777 DPRINTF(sc, IWN_DEBUG_TRACE, "->Doing %s\n", __func__);
6779 /* Stop TX scheduler while we're changing its configuration. */
6780 iwn_prph_write(sc, IWN4965_SCHED_QUEUE_STATUS(qid),
6781 IWN4965_TXQ_STATUS_CHGACT);
6783 /* Set starting sequence number from the ADDBA request. */
6784 IWN_WRITE(sc, IWN_HBUS_TARG_WRPTR, qid << 8 | (ssn & 0xff));
6785 iwn_prph_write(sc, IWN4965_SCHED_QUEUE_RDPTR(qid), ssn);
6787 /* Disable interrupts for the queue. */
6788 iwn_prph_clrbits(sc, IWN4965_SCHED_INTR_MASK, 1 << qid);
6790 /* Mark the queue as inactive. */
6791 iwn_prph_write(sc, IWN4965_SCHED_QUEUE_STATUS(qid),
6792 IWN4965_TXQ_STATUS_INACTIVE | iwn_tid2fifo[tid] << 1);
6796 iwn5000_ampdu_tx_start(struct iwn_softc *sc, struct ieee80211_node *ni,
6797 int qid, uint8_t tid, uint16_t ssn)
6799 DPRINTF(sc, IWN_DEBUG_TRACE, "->Doing %s\n", __func__);
6801 struct iwn_node *wn = (void *)ni;
6803 /* Stop TX scheduler while we're changing its configuration. */
6804 iwn_prph_write(sc, IWN5000_SCHED_QUEUE_STATUS(qid),
6805 IWN5000_TXQ_STATUS_CHGACT);
6807 /* Assign RA/TID translation to the queue. */
6808 iwn_mem_write_2(sc, sc->sched_base + IWN5000_SCHED_TRANS_TBL(qid),
6811 /* Enable chain-building mode for the queue. */
6812 iwn_prph_setbits(sc, IWN5000_SCHED_QCHAIN_SEL, 1 << qid);
6814 /* Enable aggregation for the queue. */
6815 iwn_prph_setbits(sc, IWN5000_SCHED_AGGR_SEL, 1 << qid);
6817 /* Set starting sequence number from the ADDBA request. */
6818 sc->txq[qid].cur = sc->txq[qid].read = (ssn & 0xff);
6819 IWN_WRITE(sc, IWN_HBUS_TARG_WRPTR, qid << 8 | (ssn & 0xff));
6820 iwn_prph_write(sc, IWN5000_SCHED_QUEUE_RDPTR(qid), ssn);
6822 /* Set scheduler window size and frame limit. */
6823 iwn_mem_write(sc, sc->sched_base + IWN5000_SCHED_QUEUE_OFFSET(qid) + 4,
6824 IWN_SCHED_LIMIT << 16 | IWN_SCHED_WINSZ);
6826 /* Enable interrupts for the queue. */
6827 iwn_prph_setbits(sc, IWN5000_SCHED_INTR_MASK, 1 << qid);
6829 /* Mark the queue as active. */
6830 iwn_prph_write(sc, IWN5000_SCHED_QUEUE_STATUS(qid),
6831 IWN5000_TXQ_STATUS_ACTIVE | iwn_tid2fifo[tid]);
6835 iwn5000_ampdu_tx_stop(struct iwn_softc *sc, int qid, uint8_t tid, uint16_t ssn)
6837 DPRINTF(sc, IWN_DEBUG_TRACE, "->Doing %s\n", __func__);
6839 /* Stop TX scheduler while we're changing its configuration. */
6840 iwn_prph_write(sc, IWN5000_SCHED_QUEUE_STATUS(qid),
6841 IWN5000_TXQ_STATUS_CHGACT);
6843 /* Disable aggregation for the queue. */
6844 iwn_prph_clrbits(sc, IWN5000_SCHED_AGGR_SEL, 1 << qid);
6846 /* Set starting sequence number from the ADDBA request. */
6847 IWN_WRITE(sc, IWN_HBUS_TARG_WRPTR, qid << 8 | (ssn & 0xff));
6848 iwn_prph_write(sc, IWN5000_SCHED_QUEUE_RDPTR(qid), ssn);
6850 /* Disable interrupts for the queue. */
6851 iwn_prph_clrbits(sc, IWN5000_SCHED_INTR_MASK, 1 << qid);
6853 /* Mark the queue as inactive. */
6854 iwn_prph_write(sc, IWN5000_SCHED_QUEUE_STATUS(qid),
6855 IWN5000_TXQ_STATUS_INACTIVE | iwn_tid2fifo[tid]);
6859 * Query calibration tables from the initialization firmware. We do this
6860 * only once at first boot. Called from a process context.
6863 iwn5000_query_calibration(struct iwn_softc *sc)
6865 struct iwn5000_calib_config cmd;
6868 memset(&cmd, 0, sizeof cmd);
6869 cmd.ucode.once.enable = 0xffffffff;
6870 cmd.ucode.once.start = 0xffffffff;
6871 cmd.ucode.once.send = 0xffffffff;
6872 cmd.ucode.flags = 0xffffffff;
6873 DPRINTF(sc, IWN_DEBUG_CALIBRATE, "%s: sending calibration query\n",
6875 error = iwn_cmd(sc, IWN5000_CMD_CALIB_CONFIG, &cmd, sizeof cmd, 0);
6879 /* Wait at most two seconds for calibration to complete. */
6880 if (!(sc->sc_flags & IWN_FLAG_CALIB_DONE))
6881 error = zsleep(sc, &wlan_global_serializer, 0, "iwncal", 2 * hz);
6886 * Send calibration results to the runtime firmware. These results were
6887 * obtained on first boot from the initialization firmware.
6890 iwn5000_send_calibration(struct iwn_softc *sc)
6894 for (idx = 0; idx < IWN5000_PHY_CALIB_MAX_RESULT; idx++) {
6895 if (!(sc->base_params->calib_need & (1<<idx))) {
6896 DPRINTF(sc, IWN_DEBUG_CALIBRATE,
6897 "No need of calib %d\n",
6899 continue; /* no need for this calib */
6901 if (sc->calibcmd[idx].buf == NULL) {
6902 DPRINTF(sc, IWN_DEBUG_CALIBRATE,
6903 "Need calib idx : %d but no available data\n",
6908 DPRINTF(sc, IWN_DEBUG_CALIBRATE,
6909 "send calibration result idx=%d len=%d\n", idx,
6910 sc->calibcmd[idx].len);
6911 error = iwn_cmd(sc, IWN_CMD_PHY_CALIB, sc->calibcmd[idx].buf,
6912 sc->calibcmd[idx].len, 0);
6914 device_printf(sc->sc_dev,
6915 "%s: could not send calibration result, error %d\n",
6924 iwn5000_send_wimax_coex(struct iwn_softc *sc)
6926 struct iwn5000_wimax_coex wimax;
6929 if (sc->hw_type == IWN_HW_REV_TYPE_6050) {
6930 /* Enable WiMAX coexistence for combo adapters. */
6932 IWN_WIMAX_COEX_ASSOC_WA_UNMASK |
6933 IWN_WIMAX_COEX_UNASSOC_WA_UNMASK |
6934 IWN_WIMAX_COEX_STA_TABLE_VALID |
6935 IWN_WIMAX_COEX_ENABLE;
6936 memcpy(wimax.events, iwn6050_wimax_events,
6937 sizeof iwn6050_wimax_events);
6941 /* Disable WiMAX coexistence. */
6943 memset(wimax.events, 0, sizeof wimax.events);
6945 DPRINTF(sc, IWN_DEBUG_RESET, "%s: Configuring WiMAX coexistence\n",
6947 return iwn_cmd(sc, IWN5000_CMD_WIMAX_COEX, &wimax, sizeof wimax, 0);
6951 iwn5000_crystal_calib(struct iwn_softc *sc)
6953 struct iwn5000_phy_calib_crystal cmd;
6955 memset(&cmd, 0, sizeof cmd);
6956 cmd.code = IWN5000_PHY_CALIB_CRYSTAL;
6959 cmd.cap_pin[0] = le32toh(sc->eeprom_crystal) & 0xff;
6960 cmd.cap_pin[1] = (le32toh(sc->eeprom_crystal) >> 16) & 0xff;
6961 DPRINTF(sc, IWN_DEBUG_CALIBRATE, "sending crystal calibration %d, %d\n",
6962 cmd.cap_pin[0], cmd.cap_pin[1]);
6963 return iwn_cmd(sc, IWN_CMD_PHY_CALIB, &cmd, sizeof cmd, 0);
6967 iwn5000_temp_offset_calib(struct iwn_softc *sc)
6969 struct iwn5000_phy_calib_temp_offset cmd;
6971 memset(&cmd, 0, sizeof cmd);
6972 cmd.code = IWN5000_PHY_CALIB_TEMP_OFFSET;
6975 if (sc->eeprom_temp != 0)
6976 cmd.offset = htole16(sc->eeprom_temp);
6978 cmd.offset = htole16(IWN_DEFAULT_TEMP_OFFSET);
6979 DPRINTF(sc, IWN_DEBUG_CALIBRATE, "setting radio sensor offset to %d\n",
6980 le16toh(cmd.offset));
6981 return iwn_cmd(sc, IWN_CMD_PHY_CALIB, &cmd, sizeof cmd, 0);
6985 iwn5000_temp_offset_calibv2(struct iwn_softc *sc)
6987 struct iwn5000_phy_calib_temp_offsetv2 cmd;
6989 memset(&cmd, 0, sizeof cmd);
6990 cmd.code = IWN5000_PHY_CALIB_TEMP_OFFSET;
6993 if (sc->eeprom_temp != 0) {
6994 cmd.offset_low = htole16(sc->eeprom_temp);
6995 cmd.offset_high = htole16(sc->eeprom_temp_high);
6997 cmd.offset_low = htole16(IWN_DEFAULT_TEMP_OFFSET);
6998 cmd.offset_high = htole16(IWN_DEFAULT_TEMP_OFFSET);
7000 cmd.burnt_voltage_ref = htole16(sc->eeprom_voltage);
7002 DPRINTF(sc, IWN_DEBUG_CALIBRATE,
7003 "setting radio sensor low offset to %d, high offset to %d, voltage to %d\n",
7004 le16toh(cmd.offset_low),
7005 le16toh(cmd.offset_high),
7006 le16toh(cmd.burnt_voltage_ref));
7008 return iwn_cmd(sc, IWN_CMD_PHY_CALIB, &cmd, sizeof cmd, 0);
7012 * This function is called after the runtime firmware notifies us of its
7013 * readiness (called in a process context).
7016 iwn4965_post_alive(struct iwn_softc *sc)
7020 if ((error = iwn_nic_lock(sc)) != 0)
7023 DPRINTF(sc, IWN_DEBUG_TRACE, "->Doing %s\n", __func__);
7025 /* Clear TX scheduler state in SRAM. */
7026 sc->sched_base = iwn_prph_read(sc, IWN_SCHED_SRAM_ADDR);
7027 iwn_mem_set_region_4(sc, sc->sched_base + IWN4965_SCHED_CTX_OFF, 0,
7028 IWN4965_SCHED_CTX_LEN / sizeof (uint32_t));
7030 /* Set physical address of TX scheduler rings (1KB aligned). */
7031 iwn_prph_write(sc, IWN4965_SCHED_DRAM_ADDR, sc->sched_dma.paddr >> 10);
7033 IWN_SETBITS(sc, IWN_FH_TX_CHICKEN, IWN_FH_TX_CHICKEN_SCHED_RETRY);
7035 /* Disable chain mode for all our 16 queues. */
7036 iwn_prph_write(sc, IWN4965_SCHED_QCHAIN_SEL, 0);
7038 for (qid = 0; qid < IWN4965_NTXQUEUES; qid++) {
7039 iwn_prph_write(sc, IWN4965_SCHED_QUEUE_RDPTR(qid), 0);
7040 IWN_WRITE(sc, IWN_HBUS_TARG_WRPTR, qid << 8 | 0);
7042 /* Set scheduler window size. */
7043 iwn_mem_write(sc, sc->sched_base +
7044 IWN4965_SCHED_QUEUE_OFFSET(qid), IWN_SCHED_WINSZ);
7045 /* Set scheduler frame limit. */
7046 iwn_mem_write(sc, sc->sched_base +
7047 IWN4965_SCHED_QUEUE_OFFSET(qid) + 4,
7048 IWN_SCHED_LIMIT << 16);
7051 /* Enable interrupts for all our 16 queues. */
7052 iwn_prph_write(sc, IWN4965_SCHED_INTR_MASK, 0xffff);
7053 /* Identify TX FIFO rings (0-7). */
7054 iwn_prph_write(sc, IWN4965_SCHED_TXFACT, 0xff);
7056 /* Mark TX rings (4 EDCA + cmd + 2 HCCA) as active. */
7057 for (qid = 0; qid < 7; qid++) {
7058 static uint8_t qid2fifo[] = { 3, 2, 1, 0, 4, 5, 6 };
7059 iwn_prph_write(sc, IWN4965_SCHED_QUEUE_STATUS(qid),
7060 IWN4965_TXQ_STATUS_ACTIVE | qid2fifo[qid] << 1);
7067 * This function is called after the initialization or runtime firmware
7068 * notifies us of its readiness (called in a process context).
7071 iwn5000_post_alive(struct iwn_softc *sc)
7075 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s begin\n", __func__);
7077 /* Switch to using ICT interrupt mode. */
7078 iwn5000_ict_reset(sc);
7080 if ((error = iwn_nic_lock(sc)) != 0){
7081 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s end in error\n", __func__);
7085 /* Clear TX scheduler state in SRAM. */
7086 sc->sched_base = iwn_prph_read(sc, IWN_SCHED_SRAM_ADDR);
7087 iwn_mem_set_region_4(sc, sc->sched_base + IWN5000_SCHED_CTX_OFF, 0,
7088 IWN5000_SCHED_CTX_LEN / sizeof (uint32_t));
7090 /* Set physical address of TX scheduler rings (1KB aligned). */
7091 iwn_prph_write(sc, IWN5000_SCHED_DRAM_ADDR, sc->sched_dma.paddr >> 10);
7093 IWN_SETBITS(sc, IWN_FH_TX_CHICKEN, IWN_FH_TX_CHICKEN_SCHED_RETRY);
7095 /* Enable chain mode for all queues, except command queue. */
7096 if (sc->sc_flags & IWN_FLAG_PAN_SUPPORT)
7097 iwn_prph_write(sc, IWN5000_SCHED_QCHAIN_SEL, 0xfffdf);
7099 iwn_prph_write(sc, IWN5000_SCHED_QCHAIN_SEL, 0xfffef);
7100 iwn_prph_write(sc, IWN5000_SCHED_AGGR_SEL, 0);
7102 for (qid = 0; qid < IWN5000_NTXQUEUES; qid++) {
7103 iwn_prph_write(sc, IWN5000_SCHED_QUEUE_RDPTR(qid), 0);
7104 IWN_WRITE(sc, IWN_HBUS_TARG_WRPTR, qid << 8 | 0);
7106 iwn_mem_write(sc, sc->sched_base +
7107 IWN5000_SCHED_QUEUE_OFFSET(qid), 0);
7108 /* Set scheduler window size and frame limit. */
7109 iwn_mem_write(sc, sc->sched_base +
7110 IWN5000_SCHED_QUEUE_OFFSET(qid) + 4,
7111 IWN_SCHED_LIMIT << 16 | IWN_SCHED_WINSZ);
7114 /* Enable interrupts for all our 20 queues. */
7115 iwn_prph_write(sc, IWN5000_SCHED_INTR_MASK, 0xfffff);
7116 /* Identify TX FIFO rings (0-7). */
7117 iwn_prph_write(sc, IWN5000_SCHED_TXFACT, 0xff);
7119 /* Mark TX rings (4 EDCA + cmd + 2 HCCA) as active. */
7120 if (sc->sc_flags & IWN_FLAG_PAN_SUPPORT) {
7121 /* Mark TX rings as active. */
7122 for (qid = 0; qid < 11; qid++) {
7123 static uint8_t qid2fifo[] = { 3, 2, 1, 0, 0, 4, 2, 5, 4, 7, 5 };
7124 iwn_prph_write(sc, IWN5000_SCHED_QUEUE_STATUS(qid),
7125 IWN5000_TXQ_STATUS_ACTIVE | qid2fifo[qid]);
7128 /* Mark TX rings (4 EDCA + cmd + 2 HCCA) as active. */
7129 for (qid = 0; qid < 7; qid++) {
7130 static uint8_t qid2fifo[] = { 3, 2, 1, 0, 7, 5, 6 };
7131 iwn_prph_write(sc, IWN5000_SCHED_QUEUE_STATUS(qid),
7132 IWN5000_TXQ_STATUS_ACTIVE | qid2fifo[qid]);
7137 /* Configure WiMAX coexistence for combo adapters. */
7138 error = iwn5000_send_wimax_coex(sc);
7140 device_printf(sc->sc_dev,
7141 "%s: could not configure WiMAX coexistence, error %d\n",
7145 if (sc->hw_type != IWN_HW_REV_TYPE_5150) {
7146 /* Perform crystal calibration. */
7147 error = iwn5000_crystal_calib(sc);
7149 device_printf(sc->sc_dev,
7150 "%s: crystal calibration failed, error %d\n",
7155 if (!(sc->sc_flags & IWN_FLAG_CALIB_DONE)) {
7156 /* Query calibration from the initialization firmware. */
7157 if ((error = iwn5000_query_calibration(sc)) != 0) {
7158 device_printf(sc->sc_dev,
7159 "%s: could not query calibration, error %d\n",
7164 * We have the calibration results now, reboot with the
7165 * runtime firmware (call ourselves recursively!)
7168 error = iwn_hw_init(sc);
7170 /* Send calibration results to runtime firmware. */
7171 error = iwn5000_send_calibration(sc);
7174 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s: end\n",__func__);
7180 * The firmware boot code is small and is intended to be copied directly into
7181 * the NIC internal memory (no DMA transfer).
7184 iwn4965_load_bootcode(struct iwn_softc *sc, const uint8_t *ucode, int size)
7188 size /= sizeof (uint32_t);
7190 if ((error = iwn_nic_lock(sc)) != 0)
7193 /* Copy microcode image into NIC memory. */
7194 iwn_prph_write_region_4(sc, IWN_BSM_SRAM_BASE,
7195 (const uint32_t *)ucode, size);
7197 iwn_prph_write(sc, IWN_BSM_WR_MEM_SRC, 0);
7198 iwn_prph_write(sc, IWN_BSM_WR_MEM_DST, IWN_FW_TEXT_BASE);
7199 iwn_prph_write(sc, IWN_BSM_WR_DWCOUNT, size);
7201 /* Start boot load now. */
7202 iwn_prph_write(sc, IWN_BSM_WR_CTRL, IWN_BSM_WR_CTRL_START);
7204 /* Wait for transfer to complete. */
7205 for (ntries = 0; ntries < 1000; ntries++) {
7206 if (!(iwn_prph_read(sc, IWN_BSM_WR_CTRL) &
7207 IWN_BSM_WR_CTRL_START))
7211 if (ntries == 1000) {
7212 device_printf(sc->sc_dev, "%s: could not load boot firmware\n",
7218 /* Enable boot after power up. */
7219 iwn_prph_write(sc, IWN_BSM_WR_CTRL, IWN_BSM_WR_CTRL_START_EN);
7226 iwn4965_load_firmware(struct iwn_softc *sc)
7228 struct iwn_fw_info *fw = &sc->fw;
7229 struct iwn_dma_info *dma = &sc->fw_dma;
7232 /* Copy initialization sections into pre-allocated DMA-safe memory. */
7233 memcpy(dma->vaddr, fw->init.data, fw->init.datasz);
7234 bus_dmamap_sync(dma->tag, dma->map, BUS_DMASYNC_PREWRITE);
7235 memcpy(dma->vaddr + IWN4965_FW_DATA_MAXSZ,
7236 fw->init.text, fw->init.textsz);
7237 bus_dmamap_sync(dma->tag, dma->map, BUS_DMASYNC_PREWRITE);
7239 /* Tell adapter where to find initialization sections. */
7240 if ((error = iwn_nic_lock(sc)) != 0)
7242 iwn_prph_write(sc, IWN_BSM_DRAM_DATA_ADDR, dma->paddr >> 4);
7243 iwn_prph_write(sc, IWN_BSM_DRAM_DATA_SIZE, fw->init.datasz);
7244 iwn_prph_write(sc, IWN_BSM_DRAM_TEXT_ADDR,
7245 (dma->paddr + IWN4965_FW_DATA_MAXSZ) >> 4);
7246 iwn_prph_write(sc, IWN_BSM_DRAM_TEXT_SIZE, fw->init.textsz);
7249 /* Load firmware boot code. */
7250 error = iwn4965_load_bootcode(sc, fw->boot.text, fw->boot.textsz);
7252 device_printf(sc->sc_dev, "%s: could not load boot firmware\n",
7256 /* Now press "execute". */
7257 IWN_WRITE(sc, IWN_RESET, 0);
7259 /* Wait at most one second for first alive notification. */
7260 if ((error = zsleep(sc, &wlan_global_serializer, 0, "iwninit", hz)) != 0) {
7261 device_printf(sc->sc_dev,
7262 "%s: timeout waiting for adapter to initialize, error %d\n",
7267 /* Retrieve current temperature for initial TX power calibration. */
7268 sc->rawtemp = sc->ucode_info.temp[3].chan20MHz;
7269 sc->temp = iwn4965_get_temperature(sc);
7271 /* Copy runtime sections into pre-allocated DMA-safe memory. */
7272 memcpy(dma->vaddr, fw->main.data, fw->main.datasz);
7273 bus_dmamap_sync(dma->tag, dma->map, BUS_DMASYNC_PREWRITE);
7274 memcpy(dma->vaddr + IWN4965_FW_DATA_MAXSZ,
7275 fw->main.text, fw->main.textsz);
7276 bus_dmamap_sync(dma->tag, dma->map, BUS_DMASYNC_PREWRITE);
7278 /* Tell adapter where to find runtime sections. */
7279 if ((error = iwn_nic_lock(sc)) != 0)
7281 iwn_prph_write(sc, IWN_BSM_DRAM_DATA_ADDR, dma->paddr >> 4);
7282 iwn_prph_write(sc, IWN_BSM_DRAM_DATA_SIZE, fw->main.datasz);
7283 iwn_prph_write(sc, IWN_BSM_DRAM_TEXT_ADDR,
7284 (dma->paddr + IWN4965_FW_DATA_MAXSZ) >> 4);
7285 iwn_prph_write(sc, IWN_BSM_DRAM_TEXT_SIZE,
7286 IWN_FW_UPDATED | fw->main.textsz);
7293 iwn5000_load_firmware_section(struct iwn_softc *sc, uint32_t dst,
7294 const uint8_t *section, int size)
7296 struct iwn_dma_info *dma = &sc->fw_dma;
7299 DPRINTF(sc, IWN_DEBUG_TRACE, "->Doing %s\n", __func__);
7301 /* Copy firmware section into pre-allocated DMA-safe memory. */
7302 memcpy(dma->vaddr, section, size);
7303 bus_dmamap_sync(dma->tag, dma->map, BUS_DMASYNC_PREWRITE);
7305 if ((error = iwn_nic_lock(sc)) != 0)
7308 IWN_WRITE(sc, IWN_FH_TX_CONFIG(IWN_SRVC_DMACHNL),
7309 IWN_FH_TX_CONFIG_DMA_PAUSE);
7311 IWN_WRITE(sc, IWN_FH_SRAM_ADDR(IWN_SRVC_DMACHNL), dst);
7312 IWN_WRITE(sc, IWN_FH_TFBD_CTRL0(IWN_SRVC_DMACHNL),
7313 IWN_LOADDR(dma->paddr));
7314 IWN_WRITE(sc, IWN_FH_TFBD_CTRL1(IWN_SRVC_DMACHNL),
7315 IWN_HIADDR(dma->paddr) << 28 | size);
7316 IWN_WRITE(sc, IWN_FH_TXBUF_STATUS(IWN_SRVC_DMACHNL),
7317 IWN_FH_TXBUF_STATUS_TBNUM(1) |
7318 IWN_FH_TXBUF_STATUS_TBIDX(1) |
7319 IWN_FH_TXBUF_STATUS_TFBD_VALID);
7321 /* Kick Flow Handler to start DMA transfer. */
7322 IWN_WRITE(sc, IWN_FH_TX_CONFIG(IWN_SRVC_DMACHNL),
7323 IWN_FH_TX_CONFIG_DMA_ENA | IWN_FH_TX_CONFIG_CIRQ_HOST_ENDTFD);
7327 /* Wait at most five seconds for FH DMA transfer to complete. */
7328 return zsleep(sc, &wlan_global_serializer, 0, "iwninit", 5 * hz);
7332 iwn5000_load_firmware(struct iwn_softc *sc)
7334 struct iwn_fw_part *fw;
7337 DPRINTF(sc, IWN_DEBUG_TRACE, "->Doing %s\n", __func__);
7339 /* Load the initialization firmware on first boot only. */
7340 fw = (sc->sc_flags & IWN_FLAG_CALIB_DONE) ?
7341 &sc->fw.main : &sc->fw.init;
7343 error = iwn5000_load_firmware_section(sc, IWN_FW_TEXT_BASE,
7344 fw->text, fw->textsz);
7346 device_printf(sc->sc_dev,
7347 "%s: could not load firmware %s section, error %d\n",
7348 __func__, ".text", error);
7351 error = iwn5000_load_firmware_section(sc, IWN_FW_DATA_BASE,
7352 fw->data, fw->datasz);
7354 device_printf(sc->sc_dev,
7355 "%s: could not load firmware %s section, error %d\n",
7356 __func__, ".data", error);
7360 /* Now press "execute". */
7361 IWN_WRITE(sc, IWN_RESET, 0);
7366 * Extract text and data sections from a legacy firmware image.
7369 iwn_read_firmware_leg(struct iwn_softc *sc, struct iwn_fw_info *fw)
7371 const uint32_t *ptr;
7375 ptr = (const uint32_t *)fw->data;
7376 rev = le32toh(*ptr++);
7378 /* Check firmware API version. */
7379 if (IWN_FW_API(rev) <= 1) {
7380 device_printf(sc->sc_dev,
7381 "%s: bad firmware, need API version >=2\n", __func__);
7384 if (IWN_FW_API(rev) >= 3) {
7385 /* Skip build number (version 2 header). */
7389 if (fw->size < hdrlen) {
7390 device_printf(sc->sc_dev, "%s: firmware too short: %zu bytes\n",
7391 __func__, fw->size);
7394 fw->main.textsz = le32toh(*ptr++);
7395 fw->main.datasz = le32toh(*ptr++);
7396 fw->init.textsz = le32toh(*ptr++);
7397 fw->init.datasz = le32toh(*ptr++);
7398 fw->boot.textsz = le32toh(*ptr++);
7400 /* Check that all firmware sections fit. */
7401 if (fw->size < hdrlen + fw->main.textsz + fw->main.datasz +
7402 fw->init.textsz + fw->init.datasz + fw->boot.textsz) {
7403 device_printf(sc->sc_dev, "%s: firmware too short: %zu bytes\n",
7404 __func__, fw->size);
7408 /* Get pointers to firmware sections. */
7409 fw->main.text = (const uint8_t *)ptr;
7410 fw->main.data = fw->main.text + fw->main.textsz;
7411 fw->init.text = fw->main.data + fw->main.datasz;
7412 fw->init.data = fw->init.text + fw->init.textsz;
7413 fw->boot.text = fw->init.data + fw->init.datasz;
7418 * Extract text and data sections from a TLV firmware image.
7421 iwn_read_firmware_tlv(struct iwn_softc *sc, struct iwn_fw_info *fw,
7424 const struct iwn_fw_tlv_hdr *hdr;
7425 const struct iwn_fw_tlv *tlv;
7426 const uint8_t *ptr, *end;
7430 if (fw->size < sizeof (*hdr)) {
7431 device_printf(sc->sc_dev, "%s: firmware too short: %zu bytes\n",
7432 __func__, fw->size);
7435 hdr = (const struct iwn_fw_tlv_hdr *)fw->data;
7436 if (hdr->signature != htole32(IWN_FW_SIGNATURE)) {
7437 device_printf(sc->sc_dev, "%s: bad firmware signature 0x%08x\n",
7438 __func__, le32toh(hdr->signature));
7441 DPRINTF(sc, IWN_DEBUG_RESET, "FW: \"%.64s\", build 0x%x\n", hdr->descr,
7442 le32toh(hdr->build));
7445 * Select the closest supported alternative that is less than
7446 * or equal to the specified one.
7448 altmask = le64toh(hdr->altmask);
7449 while (alt > 0 && !(altmask & (1ULL << alt)))
7450 alt--; /* Downgrade. */
7451 DPRINTF(sc, IWN_DEBUG_RESET, "using alternative %d\n", alt);
7453 ptr = (const uint8_t *)(hdr + 1);
7454 end = (const uint8_t *)(fw->data + fw->size);
7456 /* Parse type-length-value fields. */
7457 while (ptr + sizeof (*tlv) <= end) {
7458 tlv = (const struct iwn_fw_tlv *)ptr;
7459 len = le32toh(tlv->len);
7461 ptr += sizeof (*tlv);
7462 if (ptr + len > end) {
7463 device_printf(sc->sc_dev,
7464 "%s: firmware too short: %zu bytes\n", __func__,
7468 /* Skip other alternatives. */
7469 if (tlv->alt != 0 && tlv->alt != htole16(alt))
7472 switch (le16toh(tlv->type)) {
7473 case IWN_FW_TLV_MAIN_TEXT:
7474 fw->main.text = ptr;
7475 fw->main.textsz = len;
7477 case IWN_FW_TLV_MAIN_DATA:
7478 fw->main.data = ptr;
7479 fw->main.datasz = len;
7481 case IWN_FW_TLV_INIT_TEXT:
7482 fw->init.text = ptr;
7483 fw->init.textsz = len;
7485 case IWN_FW_TLV_INIT_DATA:
7486 fw->init.data = ptr;
7487 fw->init.datasz = len;
7489 case IWN_FW_TLV_BOOT_TEXT:
7490 fw->boot.text = ptr;
7491 fw->boot.textsz = len;
7493 case IWN_FW_TLV_ENH_SENS:
7495 sc->sc_flags |= IWN_FLAG_ENH_SENS;
7497 case IWN_FW_TLV_PHY_CALIB:
7498 tmp = htole32(*ptr);
7500 sc->reset_noise_gain = tmp;
7501 sc->noise_gain = tmp + 1;
7504 case IWN_FW_TLV_PAN:
7505 sc->sc_flags |= IWN_FLAG_PAN_SUPPORT;
7506 DPRINTF(sc, IWN_DEBUG_RESET,
7507 "PAN Support found: %d\n", 1);
7509 case IWN_FW_TLV_FLAGS :
7510 sc->tlv_feature_flags = htole32(*ptr);
7512 case IWN_FW_TLV_PBREQ_MAXLEN:
7513 case IWN_FW_TLV_RUNT_EVTLOG_PTR:
7514 case IWN_FW_TLV_RUNT_EVTLOG_SIZE:
7515 case IWN_FW_TLV_RUNT_ERRLOG_PTR:
7516 case IWN_FW_TLV_INIT_EVTLOG_PTR:
7517 case IWN_FW_TLV_INIT_EVTLOG_SIZE:
7518 case IWN_FW_TLV_INIT_ERRLOG_PTR:
7519 case IWN_FW_TLV_WOWLAN_INST:
7520 case IWN_FW_TLV_WOWLAN_DATA:
7521 DPRINTF(sc, IWN_DEBUG_RESET,
7522 "TLV type %d reconized but not handled\n",
7523 le16toh(tlv->type));
7526 DPRINTF(sc, IWN_DEBUG_RESET,
7527 "TLV type %d not handled\n", le16toh(tlv->type));
7530 next: /* TLV fields are 32-bit aligned. */
7531 ptr += (len + 3) & ~3;
7537 iwn_read_firmware(struct iwn_softc *sc)
7539 struct iwn_fw_info *fw = &sc->fw;
7542 DPRINTF(sc, IWN_DEBUG_TRACE, "->Doing %s\n", __func__);
7544 wlan_assert_serialized();
7545 memset(fw, 0, sizeof (*fw));
7548 * Read firmware image from filesystem. The firmware can block
7549 * in a taskq and deadlock against our serializer so unlock
7552 wlan_serialize_exit();
7553 sc->fw_fp = firmware_get(sc->fwname);
7554 wlan_serialize_enter();
7555 if (sc->fw_fp == NULL) {
7556 device_printf(sc->sc_dev, "%s: could not read firmware %s\n",
7557 __func__, sc->fwname);
7561 fw->size = sc->fw_fp->datasize;
7562 fw->data = (const uint8_t *)sc->fw_fp->data;
7563 if (fw->size < sizeof (uint32_t)) {
7564 device_printf(sc->sc_dev, "%s: firmware too short: %zu bytes\n",
7565 __func__, fw->size);
7566 firmware_put(sc->fw_fp, FIRMWARE_UNLOAD);
7571 /* Retrieve text and data sections. */
7572 if (*(const uint32_t *)fw->data != 0) /* Legacy image. */
7573 error = iwn_read_firmware_leg(sc, fw);
7575 error = iwn_read_firmware_tlv(sc, fw, 1);
7577 device_printf(sc->sc_dev,
7578 "%s: could not read firmware sections, error %d\n",
7580 firmware_put(sc->fw_fp, FIRMWARE_UNLOAD);
7585 /* Make sure text and data sections fit in hardware memory. */
7586 if (fw->main.textsz > sc->fw_text_maxsz ||
7587 fw->main.datasz > sc->fw_data_maxsz ||
7588 fw->init.textsz > sc->fw_text_maxsz ||
7589 fw->init.datasz > sc->fw_data_maxsz ||
7590 fw->boot.textsz > IWN_FW_BOOT_TEXT_MAXSZ ||
7591 (fw->boot.textsz & 3) != 0) {
7592 device_printf(sc->sc_dev, "%s: firmware sections too large\n",
7594 firmware_put(sc->fw_fp, FIRMWARE_UNLOAD);
7599 /* We can proceed with loading the firmware. */
7604 iwn_clock_wait(struct iwn_softc *sc)
7608 /* Set "initialization complete" bit. */
7609 IWN_SETBITS(sc, IWN_GP_CNTRL, IWN_GP_CNTRL_INIT_DONE);
7611 /* Wait for clock stabilization. */
7612 for (ntries = 0; ntries < 2500; ntries++) {
7613 if (IWN_READ(sc, IWN_GP_CNTRL) & IWN_GP_CNTRL_MAC_CLOCK_READY)
7617 device_printf(sc->sc_dev,
7618 "%s: timeout waiting for clock stabilization\n", __func__);
7623 iwn_apm_init(struct iwn_softc *sc)
7628 DPRINTF(sc, IWN_DEBUG_TRACE, "->Doing %s\n", __func__);
7630 /* Disable L0s exit timer (NMI bug workaround). */
7631 IWN_SETBITS(sc, IWN_GIO_CHICKEN, IWN_GIO_CHICKEN_DIS_L0S_TIMER);
7632 /* Don't wait for ICH L0s (ICH bug workaround). */
7633 IWN_SETBITS(sc, IWN_GIO_CHICKEN, IWN_GIO_CHICKEN_L1A_NO_L0S_RX);
7635 /* Set FH wait threshold to max (HW bug under stress workaround). */
7636 IWN_SETBITS(sc, IWN_DBG_HPET_MEM, 0xffff0000);
7638 /* Enable HAP INTA to move adapter from L1a to L0s. */
7639 IWN_SETBITS(sc, IWN_HW_IF_CONFIG, IWN_HW_IF_CONFIG_HAP_WAKE_L1A);
7641 /* Retrieve PCIe Active State Power Management (ASPM). */
7642 reg = pci_read_config(sc->sc_dev, sc->sc_cap_off + 0x10, 1);
7643 /* Workaround for HW instability in PCIe L0->L0s->L1 transition. */
7644 if (reg & 0x02) /* L1 Entry enabled. */
7645 IWN_SETBITS(sc, IWN_GIO, IWN_GIO_L0S_ENA);
7647 IWN_CLRBITS(sc, IWN_GIO, IWN_GIO_L0S_ENA);
7649 if (sc->base_params->pll_cfg_val)
7650 IWN_SETBITS(sc, IWN_ANA_PLL, sc->base_params->pll_cfg_val);
7652 /* Wait for clock stabilization before accessing prph. */
7653 if ((error = iwn_clock_wait(sc)) != 0)
7656 if ((error = iwn_nic_lock(sc)) != 0)
7658 if (sc->hw_type == IWN_HW_REV_TYPE_4965) {
7659 /* Enable DMA and BSM (Bootstrap State Machine). */
7660 iwn_prph_write(sc, IWN_APMG_CLK_EN,
7661 IWN_APMG_CLK_CTRL_DMA_CLK_RQT |
7662 IWN_APMG_CLK_CTRL_BSM_CLK_RQT);
7665 iwn_prph_write(sc, IWN_APMG_CLK_EN,
7666 IWN_APMG_CLK_CTRL_DMA_CLK_RQT);
7669 /* Disable L1-Active. */
7670 iwn_prph_setbits(sc, IWN_APMG_PCI_STT, IWN_APMG_PCI_STT_L1A_DIS);
7677 iwn_apm_stop_master(struct iwn_softc *sc)
7681 /* Stop busmaster DMA activity. */
7682 IWN_SETBITS(sc, IWN_RESET, IWN_RESET_STOP_MASTER);
7683 for (ntries = 0; ntries < 100; ntries++) {
7684 if (IWN_READ(sc, IWN_RESET) & IWN_RESET_MASTER_DISABLED)
7688 device_printf(sc->sc_dev, "%s: timeout waiting for master\n", __func__);
7692 iwn_apm_stop(struct iwn_softc *sc)
7694 iwn_apm_stop_master(sc);
7696 /* Reset the entire device. */
7697 IWN_SETBITS(sc, IWN_RESET, IWN_RESET_SW);
7699 /* Clear "initialization complete" bit. */
7700 IWN_CLRBITS(sc, IWN_GP_CNTRL, IWN_GP_CNTRL_INIT_DONE);
7704 iwn4965_nic_config(struct iwn_softc *sc)
7706 DPRINTF(sc, IWN_DEBUG_TRACE, "->Doing %s\n", __func__);
7708 if (IWN_RFCFG_TYPE(sc->rfcfg) == 1) {
7710 * I don't believe this to be correct but this is what the
7711 * vendor driver is doing. Probably the bits should not be
7712 * shifted in IWN_RFCFG_*.
7714 IWN_SETBITS(sc, IWN_HW_IF_CONFIG,
7715 IWN_RFCFG_TYPE(sc->rfcfg) |
7716 IWN_RFCFG_STEP(sc->rfcfg) |
7717 IWN_RFCFG_DASH(sc->rfcfg));
7719 IWN_SETBITS(sc, IWN_HW_IF_CONFIG,
7720 IWN_HW_IF_CONFIG_RADIO_SI | IWN_HW_IF_CONFIG_MAC_SI);
7725 iwn5000_nic_config(struct iwn_softc *sc)
7730 DPRINTF(sc, IWN_DEBUG_TRACE, "->Doing %s\n", __func__);
7732 if (IWN_RFCFG_TYPE(sc->rfcfg) < 3) {
7733 IWN_SETBITS(sc, IWN_HW_IF_CONFIG,
7734 IWN_RFCFG_TYPE(sc->rfcfg) |
7735 IWN_RFCFG_STEP(sc->rfcfg) |
7736 IWN_RFCFG_DASH(sc->rfcfg));
7738 IWN_SETBITS(sc, IWN_HW_IF_CONFIG,
7739 IWN_HW_IF_CONFIG_RADIO_SI | IWN_HW_IF_CONFIG_MAC_SI);
7741 if ((error = iwn_nic_lock(sc)) != 0)
7743 iwn_prph_setbits(sc, IWN_APMG_PS, IWN_APMG_PS_EARLY_PWROFF_DIS);
7745 if (sc->hw_type == IWN_HW_REV_TYPE_1000) {
7747 * Select first Switching Voltage Regulator (1.32V) to
7748 * solve a stability issue related to noisy DC2DC line
7749 * in the silicon of 1000 Series.
7751 tmp = iwn_prph_read(sc, IWN_APMG_DIGITAL_SVR);
7752 tmp &= ~IWN_APMG_DIGITAL_SVR_VOLTAGE_MASK;
7753 tmp |= IWN_APMG_DIGITAL_SVR_VOLTAGE_1_32;
7754 iwn_prph_write(sc, IWN_APMG_DIGITAL_SVR, tmp);
7758 if (sc->sc_flags & IWN_FLAG_INTERNAL_PA) {
7759 /* Use internal power amplifier only. */
7760 IWN_WRITE(sc, IWN_GP_DRIVER, IWN_GP_DRIVER_RADIO_2X2_IPA);
7762 if (sc->base_params->additional_nic_config && sc->calib_ver >= 6) {
7763 /* Indicate that ROM calibration version is >=6. */
7764 IWN_SETBITS(sc, IWN_GP_DRIVER, IWN_GP_DRIVER_CALIB_VER6);
7766 if (sc->base_params->additional_gp_drv_bit)
7767 IWN_SETBITS(sc, IWN_GP_DRIVER,
7768 sc->base_params->additional_gp_drv_bit);
7773 * Take NIC ownership over Intel Active Management Technology (AMT).
7776 iwn_hw_prepare(struct iwn_softc *sc)
7780 DPRINTF(sc, IWN_DEBUG_TRACE, "->Doing %s\n", __func__);
7782 /* Check if hardware is ready. */
7783 IWN_SETBITS(sc, IWN_HW_IF_CONFIG, IWN_HW_IF_CONFIG_NIC_READY);
7784 for (ntries = 0; ntries < 5; ntries++) {
7785 if (IWN_READ(sc, IWN_HW_IF_CONFIG) &
7786 IWN_HW_IF_CONFIG_NIC_READY)
7791 /* Hardware not ready, force into ready state. */
7792 IWN_SETBITS(sc, IWN_HW_IF_CONFIG, IWN_HW_IF_CONFIG_PREPARE);
7793 for (ntries = 0; ntries < 15000; ntries++) {
7794 if (!(IWN_READ(sc, IWN_HW_IF_CONFIG) &
7795 IWN_HW_IF_CONFIG_PREPARE_DONE))
7799 if (ntries == 15000)
7802 /* Hardware should be ready now. */
7803 IWN_SETBITS(sc, IWN_HW_IF_CONFIG, IWN_HW_IF_CONFIG_NIC_READY);
7804 for (ntries = 0; ntries < 5; ntries++) {
7805 if (IWN_READ(sc, IWN_HW_IF_CONFIG) &
7806 IWN_HW_IF_CONFIG_NIC_READY)
7814 iwn_hw_init(struct iwn_softc *sc)
7816 struct iwn_ops *ops = &sc->ops;
7817 int error, chnl, qid;
7819 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s begin\n", __func__);
7821 /* Clear pending interrupts. */
7822 IWN_WRITE(sc, IWN_INT, 0xffffffff);
7824 if ((error = iwn_apm_init(sc)) != 0) {
7825 device_printf(sc->sc_dev,
7826 "%s: could not power ON adapter, error %d\n", __func__,
7831 /* Select VMAIN power source. */
7832 if ((error = iwn_nic_lock(sc)) != 0)
7834 iwn_prph_clrbits(sc, IWN_APMG_PS, IWN_APMG_PS_PWR_SRC_MASK);
7837 /* Perform adapter-specific initialization. */
7838 if ((error = ops->nic_config(sc)) != 0)
7841 /* Initialize RX ring. */
7842 if ((error = iwn_nic_lock(sc)) != 0)
7844 IWN_WRITE(sc, IWN_FH_RX_CONFIG, 0);
7845 IWN_WRITE(sc, IWN_FH_RX_WPTR, 0);
7846 /* Set physical address of RX ring (256-byte aligned). */
7847 IWN_WRITE(sc, IWN_FH_RX_BASE, sc->rxq.desc_dma.paddr >> 8);
7848 /* Set physical address of RX status (16-byte aligned). */
7849 IWN_WRITE(sc, IWN_FH_STATUS_WPTR, sc->rxq.stat_dma.paddr >> 4);
7851 IWN_WRITE(sc, IWN_FH_RX_CONFIG,
7852 IWN_FH_RX_CONFIG_ENA |
7853 IWN_FH_RX_CONFIG_IGN_RXF_EMPTY | /* HW bug workaround */
7854 IWN_FH_RX_CONFIG_IRQ_DST_HOST |
7855 IWN_FH_RX_CONFIG_SINGLE_FRAME |
7856 IWN_FH_RX_CONFIG_RB_TIMEOUT(0) |
7857 IWN_FH_RX_CONFIG_NRBD(IWN_RX_RING_COUNT_LOG));
7859 IWN_WRITE(sc, IWN_FH_RX_WPTR, (IWN_RX_RING_COUNT - 1) & ~7);
7861 if ((error = iwn_nic_lock(sc)) != 0)
7864 /* Initialize TX scheduler. */
7865 iwn_prph_write(sc, sc->sched_txfact_addr, 0);
7867 /* Set physical address of "keep warm" page (16-byte aligned). */
7868 IWN_WRITE(sc, IWN_FH_KW_ADDR, sc->kw_dma.paddr >> 4);
7870 /* Initialize TX rings. */
7871 for (qid = 0; qid < sc->ntxqs; qid++) {
7872 struct iwn_tx_ring *txq = &sc->txq[qid];
7874 /* Set physical address of TX ring (256-byte aligned). */
7875 IWN_WRITE(sc, IWN_FH_CBBC_QUEUE(qid),
7876 txq->desc_dma.paddr >> 8);
7880 /* Enable DMA channels. */
7881 for (chnl = 0; chnl < sc->ndmachnls; chnl++) {
7882 IWN_WRITE(sc, IWN_FH_TX_CONFIG(chnl),
7883 IWN_FH_TX_CONFIG_DMA_ENA |
7884 IWN_FH_TX_CONFIG_DMA_CREDIT_ENA);
7887 /* Clear "radio off" and "commands blocked" bits. */
7888 IWN_WRITE(sc, IWN_UCODE_GP1_CLR, IWN_UCODE_GP1_RFKILL);
7889 IWN_WRITE(sc, IWN_UCODE_GP1_CLR, IWN_UCODE_GP1_CMD_BLOCKED);
7891 /* Clear pending interrupts. */
7892 IWN_WRITE(sc, IWN_INT, 0xffffffff);
7893 /* Enable interrupt coalescing. */
7894 IWN_WRITE(sc, IWN_INT_COALESCING, 512 / 8);
7895 /* Enable interrupts. */
7896 IWN_WRITE(sc, IWN_INT_MASK, sc->int_mask);
7898 /* _Really_ make sure "radio off" bit is cleared! */
7899 IWN_WRITE(sc, IWN_UCODE_GP1_CLR, IWN_UCODE_GP1_RFKILL);
7900 IWN_WRITE(sc, IWN_UCODE_GP1_CLR, IWN_UCODE_GP1_RFKILL);
7902 /* Enable shadow registers. */
7903 if (sc->base_params->shadow_reg_enable)
7904 IWN_SETBITS(sc, IWN_SHADOW_REG_CTRL, 0x800fffff);
7906 if ((error = ops->load_firmware(sc)) != 0) {
7907 device_printf(sc->sc_dev,
7908 "%s: could not load firmware, error %d\n", __func__,
7912 /* Wait at most one second for firmware alive notification. */
7913 if ((error = zsleep(sc, &wlan_global_serializer, 0, "iwninit", hz)) != 0) {
7914 device_printf(sc->sc_dev,
7915 "%s: timeout waiting for adapter to initialize, error %d\n",
7919 /* Do post-firmware initialization. */
7921 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s: end\n",__func__);
7923 return ops->post_alive(sc);
7927 iwn_hw_stop(struct iwn_softc *sc)
7929 int chnl, qid, ntries;
7931 DPRINTF(sc, IWN_DEBUG_TRACE, "->Doing %s\n", __func__);
7933 IWN_WRITE(sc, IWN_RESET, IWN_RESET_NEVO);
7935 /* Disable interrupts. */
7936 IWN_WRITE(sc, IWN_INT_MASK, 0);
7937 IWN_WRITE(sc, IWN_INT, 0xffffffff);
7938 IWN_WRITE(sc, IWN_FH_INT, 0xffffffff);
7939 sc->sc_flags &= ~IWN_FLAG_USE_ICT;
7941 /* Make sure we no longer hold the NIC lock. */
7944 /* Stop TX scheduler. */
7945 iwn_prph_write(sc, sc->sched_txfact_addr, 0);
7947 /* Stop all DMA channels. */
7948 if (iwn_nic_lock(sc) == 0) {
7949 for (chnl = 0; chnl < sc->ndmachnls; chnl++) {
7950 IWN_WRITE(sc, IWN_FH_TX_CONFIG(chnl), 0);
7951 for (ntries = 0; ntries < 200; ntries++) {
7952 if (IWN_READ(sc, IWN_FH_TX_STATUS) &
7953 IWN_FH_TX_STATUS_IDLE(chnl))
7962 iwn_reset_rx_ring(sc, &sc->rxq);
7964 /* Reset all TX rings. */
7965 for (qid = 0; qid < sc->ntxqs; qid++)
7966 iwn_reset_tx_ring(sc, &sc->txq[qid]);
7968 if (iwn_nic_lock(sc) == 0) {
7969 iwn_prph_write(sc, IWN_APMG_CLK_DIS,
7970 IWN_APMG_CLK_CTRL_DMA_CLK_RQT);
7974 /* Power OFF adapter. */
7979 iwn_radio_on_task(void *arg0, int pending)
7981 struct iwn_softc *sc = arg0;
7983 struct ieee80211com *ic;
7984 struct ieee80211vap *vap;
7986 DPRINTF(sc, IWN_DEBUG_TRACE, "->Doing %s\n", __func__);
7988 wlan_serialize_enter();
7991 vap = TAILQ_FIRST(&ic->ic_vaps);
7993 iwn_init_locked(sc);
7994 ieee80211_init(vap);
7996 wlan_serialize_exit();
8000 iwn_radio_off_task(void *arg0, int pending)
8002 struct iwn_softc *sc = arg0;
8004 struct ieee80211com *ic;
8005 struct ieee80211vap *vap;
8007 DPRINTF(sc, IWN_DEBUG_TRACE, "->Doing %s\n", __func__);
8009 wlan_serialize_enter();
8012 vap = TAILQ_FIRST(&ic->ic_vaps);
8013 iwn_stop_locked(sc);
8015 ieee80211_stop(vap);
8017 /* Enable interrupts to get RF toggle notification. */
8018 IWN_WRITE(sc, IWN_INT, 0xffffffff);
8019 IWN_WRITE(sc, IWN_INT_MASK, sc->int_mask);
8020 wlan_serialize_exit();
8024 iwn_init_locked(struct iwn_softc *sc)
8026 struct ifnet *ifp = sc->sc_ifp;
8029 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s begin\n", __func__);
8032 * Make sure we hold the serializer or we will have timing issues
8033 * with the wlan subsystem.
8035 wlan_assert_serialized();
8036 if ((error = iwn_hw_prepare(sc)) != 0) {
8037 device_printf(sc->sc_dev, "%s: hardware not ready, error %d\n",
8042 /* Initialize interrupt mask to default value. */
8043 sc->int_mask = IWN_INT_MASK_DEF;
8044 sc->sc_flags &= ~IWN_FLAG_USE_ICT;
8046 /* Check that the radio is not disabled by hardware switch. */
8047 if (!(IWN_READ(sc, IWN_GP_CNTRL) & IWN_GP_CNTRL_RFKILL)) {
8048 device_printf(sc->sc_dev,
8049 "radio is disabled by hardware switch\n");
8050 /* Enable interrupts to get RF toggle notifications. */
8051 IWN_WRITE(sc, IWN_INT, 0xffffffff);
8052 IWN_WRITE(sc, IWN_INT_MASK, sc->int_mask);
8056 /* Read firmware images from the filesystem. */
8057 if ((error = iwn_read_firmware(sc)) != 0) {
8058 device_printf(sc->sc_dev,
8059 "%s: could not read firmware, error %d\n", __func__,
8064 /* Initialize hardware and upload firmware. */
8065 error = iwn_hw_init(sc);
8066 firmware_put(sc->fw_fp, FIRMWARE_UNLOAD);
8069 device_printf(sc->sc_dev,
8070 "%s: could not initialize hardware, error %d\n", __func__,
8075 /* Configure adapter now that it is ready. */
8076 if ((error = iwn_config(sc)) != 0) {
8077 device_printf(sc->sc_dev,
8078 "%s: could not configure device, error %d\n", __func__,
8083 ifq_clr_oactive(&ifp->if_snd);
8084 ifp->if_flags |= IFF_RUNNING;
8086 callout_reset(&sc->watchdog_to, hz, iwn_watchdog_timeout, sc);
8088 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s: end\n",__func__);
8092 fail: iwn_stop_locked(sc);
8093 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s: end in error\n",__func__);
8099 struct iwn_softc *sc = arg;
8100 struct ifnet *ifp = sc->sc_ifp;
8101 struct ieee80211com *ic = ifp->if_l2com;
8103 wlan_assert_serialized();
8104 iwn_init_locked(sc);
8106 if (ifp->if_flags & IFF_RUNNING)
8107 ieee80211_start_all(ic);
8111 iwn_stop_locked(struct iwn_softc *sc)
8113 struct ifnet *ifp = sc->sc_ifp;
8115 sc->sc_tx_timer = 0;
8116 callout_stop(&sc->watchdog_to);
8117 callout_stop(&sc->calib_to);
8118 ifp->if_flags &= ~IFF_RUNNING;
8119 ifq_clr_oactive(&ifp->if_snd);
8121 /* Power OFF hardware. */
8126 iwn_stop(struct iwn_softc *sc)
8128 wlan_serialize_enter();
8129 iwn_stop_locked(sc);
8130 wlan_serialize_exit();
8134 * Callback from net80211 to start a scan.
8137 iwn_scan_start(struct ieee80211com *ic)
8139 struct ifnet *ifp = ic->ic_ifp;
8140 struct iwn_softc *sc = ifp->if_softc;
8142 /* make the link LED blink while we're scanning */
8143 iwn_set_led(sc, IWN_LED_LINK, 20, 2);
8147 * Callback from net80211 to terminate a scan.
8150 iwn_scan_end(struct ieee80211com *ic)
8152 struct ifnet *ifp = ic->ic_ifp;
8153 struct iwn_softc *sc = ifp->if_softc;
8154 struct ieee80211vap *vap = TAILQ_FIRST(&ic->ic_vaps);
8156 if (vap->iv_state == IEEE80211_S_RUN) {
8157 /* Set link LED to ON status if we are associated */
8158 iwn_set_led(sc, IWN_LED_LINK, 0, 1);
8163 * Callback from net80211 to force a channel change.
8166 iwn_set_channel(struct ieee80211com *ic)
8168 const struct ieee80211_channel *c = ic->ic_curchan;
8169 struct ifnet *ifp = ic->ic_ifp;
8170 struct iwn_softc *sc = ifp->if_softc;
8173 DPRINTF(sc, IWN_DEBUG_TRACE, "->Doing %s\n", __func__);
8175 sc->sc_rxtap.wr_chan_freq = htole16(c->ic_freq);
8176 sc->sc_rxtap.wr_chan_flags = htole16(c->ic_flags);
8177 sc->sc_txtap.wt_chan_freq = htole16(c->ic_freq);
8178 sc->sc_txtap.wt_chan_flags = htole16(c->ic_flags);
8181 * Only need to set the channel in Monitor mode. AP scanning and auth
8182 * are already taken care of by their respective firmware commands.
8184 if (ic->ic_opmode == IEEE80211_M_MONITOR) {
8185 error = iwn_config(sc);
8187 device_printf(sc->sc_dev,
8188 "%s: error %d settting channel\n", __func__, error);
8193 * Callback from net80211 to start scanning of the current channel.
8196 iwn_scan_curchan(struct ieee80211_scan_state *ss, unsigned long maxdwell)
8198 struct ieee80211vap *vap = ss->ss_vap;
8199 struct iwn_softc *sc = vap->iv_ic->ic_ifp->if_softc;
8202 error = iwn_scan(sc);
8204 ieee80211_cancel_scan(vap);
8208 * Callback from net80211 to handle the minimum dwell time being met.
8209 * The intent is to terminate the scan but we just let the firmware
8210 * notify us when it's finished as we have no safe way to abort it.
8213 iwn_scan_mindwell(struct ieee80211_scan_state *ss)
8215 /* NB: don't try to abort scan; wait for firmware to finish */
8219 iwn_hw_reset_task(void *arg0, int pending)
8221 struct iwn_softc *sc = arg0;
8223 struct ieee80211com *ic;
8225 DPRINTF(sc, IWN_DEBUG_TRACE, "->Doing %s\n", __func__);
8227 wlan_serialize_enter();
8230 iwn_stop_locked(sc);
8231 iwn_init_locked(sc);
8232 ieee80211_notify_radio(ic, 1);
8233 wlan_serialize_exit();
8236 #define IWN_DESC(x) case x: return #x
8237 #define COUNTOF(array) (sizeof(array) / sizeof(array[0]))
8240 * Translate CSR code to string
8242 static char *iwn_get_csr_string(int csr)
8245 IWN_DESC(IWN_HW_IF_CONFIG);
8246 IWN_DESC(IWN_INT_COALESCING);
8248 IWN_DESC(IWN_INT_MASK);
8249 IWN_DESC(IWN_FH_INT);
8250 IWN_DESC(IWN_GPIO_IN);
8251 IWN_DESC(IWN_RESET);
8252 IWN_DESC(IWN_GP_CNTRL);
8253 IWN_DESC(IWN_HW_REV);
8254 IWN_DESC(IWN_EEPROM);
8255 IWN_DESC(IWN_EEPROM_GP);
8256 IWN_DESC(IWN_OTP_GP);
8258 IWN_DESC(IWN_GP_UCODE);
8259 IWN_DESC(IWN_GP_DRIVER);
8260 IWN_DESC(IWN_UCODE_GP1);
8261 IWN_DESC(IWN_UCODE_GP2);
8263 IWN_DESC(IWN_DRAM_INT_TBL);
8264 IWN_DESC(IWN_GIO_CHICKEN);
8265 IWN_DESC(IWN_ANA_PLL);
8266 IWN_DESC(IWN_HW_REV_WA);
8267 IWN_DESC(IWN_DBG_HPET_MEM);
8269 return "UNKNOWN CSR";
8274 * This function print firmware register
8277 iwn_debug_register(struct iwn_softc *sc)
8280 static const uint32_t csr_tbl[] = {
8305 DPRINTF(sc, IWN_DEBUG_REGISTER,
8306 "CSR values: (2nd byte of IWN_INT_COALESCING is IWN_INT_PERIODIC)%s",
8308 for (i = 0; i < COUNTOF(csr_tbl); i++){
8309 DPRINTF(sc, IWN_DEBUG_REGISTER," %10s: 0x%08x ",
8310 iwn_get_csr_string(csr_tbl[i]), IWN_READ(sc, csr_tbl[i]));
8312 DPRINTF(sc, IWN_DEBUG_REGISTER,"%s","\n");
8314 DPRINTF(sc, IWN_DEBUG_REGISTER,"%s","\n");