1 /* $FreeBSD: head/sys/dev/ral/rt2661.c 195618 2009-07-11 15:02:45Z rpaulo $ */
5 * Damien Bergamini <damien.bergamini@free.fr>
7 * Permission to use, copy, modify, and distribute this software for any
8 * purpose with or without fee is hereby granted, provided that the above
9 * copyright notice and this permission notice appear in all copies.
11 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
12 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
13 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
14 * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
15 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
16 * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
17 * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
19 * $FreeBSD: head/sys/dev/ral/rt2661.c 195618 2009-07-11 15:02:45Z rpaulo $
23 * Ralink Technology RT2561, RT2561S and RT2661 chipset driver
24 * http://www.ralinktech.com/
27 #include <sys/param.h>
28 #include <sys/sysctl.h>
29 #include <sys/sockio.h>
31 #include <sys/kernel.h>
32 #include <sys/socket.h>
33 #include <sys/systm.h>
34 #include <sys/malloc.h>
36 #include <sys/mutex.h>
37 #include <sys/module.h>
39 #include <sys/endian.h>
40 #include <sys/firmware.h>
45 #include <net/if_arp.h>
46 #include <net/ethernet.h>
47 #include <net/if_dl.h>
48 #include <net/if_media.h>
49 #include <net/if_types.h>
50 #include <net/ifq_var.h>
52 #include <netproto/802_11/ieee80211_var.h>
53 #include <netproto/802_11/ieee80211_radiotap.h>
54 #include <netproto/802_11/ieee80211_regdomain.h>
55 #include <netproto/802_11/ieee80211_ratectl.h>
57 #include <netinet/in.h>
58 #include <netinet/in_systm.h>
59 #include <netinet/in_var.h>
60 #include <netinet/ip.h>
61 #include <netinet/if_ether.h>
63 #include <dev/netif/ral/rt2661reg.h>
64 #include <dev/netif/ral/rt2661var.h>
68 #define DPRINTF(sc, fmt, ...) do { \
69 if (sc->sc_debug > 0) \
70 kprintf(fmt, __VA_ARGS__); \
72 #define DPRINTFN(sc, n, fmt, ...) do { \
73 if (sc->sc_debug >= (n)) \
74 kprintf(fmt, __VA_ARGS__); \
77 #define DPRINTF(sc, fmt, ...)
78 #define DPRINTFN(sc, n, fmt, ...)
81 static struct ieee80211vap *rt2661_vap_create(struct ieee80211com *,
82 const char name[IFNAMSIZ], int unit,
83 enum ieee80211_opmode opmode,
84 int flags, const uint8_t bssid[IEEE80211_ADDR_LEN],
85 const uint8_t mac[IEEE80211_ADDR_LEN]);
86 static void rt2661_vap_delete(struct ieee80211vap *);
87 static void rt2661_dma_map_addr(void *, bus_dma_segment_t *, int,
89 static int rt2661_alloc_tx_ring(struct rt2661_softc *,
90 struct rt2661_tx_ring *, int);
91 static void rt2661_reset_tx_ring(struct rt2661_softc *,
92 struct rt2661_tx_ring *);
93 static void rt2661_free_tx_ring(struct rt2661_softc *,
94 struct rt2661_tx_ring *);
95 static int rt2661_alloc_rx_ring(struct rt2661_softc *,
96 struct rt2661_rx_ring *, int);
97 static void rt2661_reset_rx_ring(struct rt2661_softc *,
98 struct rt2661_rx_ring *);
99 static void rt2661_free_rx_ring(struct rt2661_softc *,
100 struct rt2661_rx_ring *);
101 static int rt2661_newstate(struct ieee80211vap *,
102 enum ieee80211_state, int);
103 static uint16_t rt2661_eeprom_read(struct rt2661_softc *, uint8_t);
104 static void rt2661_rx_intr(struct rt2661_softc *);
105 static void rt2661_tx_intr(struct rt2661_softc *);
106 static void rt2661_tx_dma_intr(struct rt2661_softc *,
107 struct rt2661_tx_ring *);
108 static void rt2661_mcu_beacon_expire(struct rt2661_softc *);
109 static void rt2661_mcu_wakeup(struct rt2661_softc *);
110 static void rt2661_mcu_cmd_intr(struct rt2661_softc *);
111 static void rt2661_scan_start(struct ieee80211com *);
112 static void rt2661_scan_end(struct ieee80211com *);
113 static void rt2661_set_channel(struct ieee80211com *);
114 static void rt2661_setup_tx_desc(struct rt2661_softc *,
115 struct rt2661_tx_desc *, uint32_t, uint16_t, int,
116 int, const bus_dma_segment_t *, int, int);
117 static int rt2661_tx_data(struct rt2661_softc *, struct mbuf *,
118 struct ieee80211_node *, int);
119 static int rt2661_tx_mgt(struct rt2661_softc *, struct mbuf *,
120 struct ieee80211_node *);
121 static void rt2661_start_locked(struct ifnet *);
122 static void rt2661_start(struct ifnet *, struct ifaltq_subque *);
123 static int rt2661_raw_xmit(struct ieee80211_node *, struct mbuf *,
124 const struct ieee80211_bpf_params *);
125 static void rt2661_watchdog_callout(void *);
126 static int rt2661_ioctl(struct ifnet *, u_long, caddr_t,
128 static void rt2661_bbp_write(struct rt2661_softc *, uint8_t,
130 static uint8_t rt2661_bbp_read(struct rt2661_softc *, uint8_t);
131 static void rt2661_rf_write(struct rt2661_softc *, uint8_t,
133 static int rt2661_tx_cmd(struct rt2661_softc *, uint8_t,
135 static void rt2661_select_antenna(struct rt2661_softc *);
136 static void rt2661_enable_mrr(struct rt2661_softc *);
137 static void rt2661_set_txpreamble(struct rt2661_softc *);
138 static void rt2661_set_basicrates(struct rt2661_softc *,
139 const struct ieee80211_rateset *);
140 static void rt2661_select_band(struct rt2661_softc *,
141 struct ieee80211_channel *);
142 static void rt2661_set_chan(struct rt2661_softc *,
143 struct ieee80211_channel *);
144 static void rt2661_set_bssid(struct rt2661_softc *,
146 static void rt2661_set_macaddr(struct rt2661_softc *,
148 static void rt2661_update_promisc(struct ieee80211com *);
149 static int rt2661_wme_update(struct ieee80211com *) __unused;
150 static void rt2661_update_slot(struct ieee80211com *);
151 static const char *rt2661_get_rf(int);
152 static void rt2661_read_eeprom(struct rt2661_softc *,
153 uint8_t macaddr[IEEE80211_ADDR_LEN]);
154 static int rt2661_bbp_init(struct rt2661_softc *);
155 static void rt2661_init_locked(struct rt2661_softc *);
156 static void rt2661_init(void *);
157 static void rt2661_stop_locked(struct rt2661_softc *);
158 static void rt2661_stop(void *);
159 static int rt2661_load_microcode(struct rt2661_softc *);
161 static void rt2661_rx_tune(struct rt2661_softc *);
162 static void rt2661_radar_start(struct rt2661_softc *);
163 static int rt2661_radar_stop(struct rt2661_softc *);
165 static int rt2661_prepare_beacon(struct rt2661_softc *,
166 struct ieee80211vap *);
167 static void rt2661_enable_tsf_sync(struct rt2661_softc *);
168 static void rt2661_enable_tsf(struct rt2661_softc *);
169 static int rt2661_get_rssi(struct rt2661_softc *, uint8_t);
171 static const struct {
174 } rt2661_def_mac[] = {
178 static const struct {
181 } rt2661_def_bbp[] = {
185 static const struct rfprog {
187 uint32_t r1, r2, r3, r4;
188 } rt2661_rf5225_1[] = {
190 }, rt2661_rf5225_2[] = {
195 rt2661_attach(device_t dev, int id)
197 struct rt2661_softc *sc = device_get_softc(dev);
198 struct ieee80211com *ic;
201 int error, ac, ntries;
203 uint8_t macaddr[IEEE80211_ADDR_LEN];
204 struct sysctl_ctx_list *ctx;
205 struct sysctl_oid *tree;
210 ifp = sc->sc_ifp = if_alloc(IFT_IEEE80211);
212 device_printf(sc->sc_dev, "can not if_alloc()\n");
217 callout_init(&sc->watchdog_ch);
219 /* wait for NIC to initialize */
220 for (ntries = 0; ntries < 1000; ntries++) {
221 if ((val = RAL_READ(sc, RT2661_MAC_CSR0)) != 0)
225 if (ntries == 1000) {
226 device_printf(sc->sc_dev,
227 "timeout waiting for NIC to initialize\n");
232 /* retrieve RF rev. no and various other things from EEPROM */
233 rt2661_read_eeprom(sc, macaddr);
235 device_printf(dev, "MAC/BBP RT%X, RF %s\n", val,
236 rt2661_get_rf(sc->rf_rev));
239 * Allocate Tx and Rx rings.
241 for (ac = 0; ac < 4; ac++) {
242 error = rt2661_alloc_tx_ring(sc, &sc->txq[ac],
243 RT2661_TX_RING_COUNT);
245 device_printf(sc->sc_dev,
246 "could not allocate Tx ring %d\n", ac);
251 error = rt2661_alloc_tx_ring(sc, &sc->mgtq, RT2661_MGT_RING_COUNT);
253 device_printf(sc->sc_dev, "could not allocate Mgt ring\n");
257 error = rt2661_alloc_rx_ring(sc, &sc->rxq, RT2661_RX_RING_COUNT);
259 device_printf(sc->sc_dev, "could not allocate Rx ring\n");
264 if_initname(ifp, device_get_name(dev), device_get_unit(dev));
265 ifp->if_flags = IFF_BROADCAST | IFF_SIMPLEX | IFF_MULTICAST;
266 ifp->if_init = rt2661_init;
267 ifp->if_ioctl = rt2661_ioctl;
268 ifp->if_start = rt2661_start;
269 ifq_set_maxlen(&ifp->if_snd, IFQ_MAXLEN);
271 ifq_set_ready(&ifp->if_snd);
275 ic->ic_name = device_get_nameunit(dev);
276 ic->ic_opmode = IEEE80211_M_STA;
277 ic->ic_phytype = IEEE80211_T_OFDM; /* not only, but not used */
279 /* set device capabilities */
281 IEEE80211_C_STA /* station mode */
282 | IEEE80211_C_IBSS /* ibss, nee adhoc, mode */
283 | IEEE80211_C_HOSTAP /* hostap mode */
284 | IEEE80211_C_MONITOR /* monitor mode */
285 | IEEE80211_C_AHDEMO /* adhoc demo mode */
286 | IEEE80211_C_WDS /* 4-address traffic works */
287 | IEEE80211_C_MBSS /* mesh point link mode */
288 | IEEE80211_C_SHPREAMBLE /* short preamble supported */
289 | IEEE80211_C_SHSLOT /* short slot time supported */
290 | IEEE80211_C_WPA /* capable of WPA1+WPA2 */
291 | IEEE80211_C_BGSCAN /* capable of bg scanning */
293 | IEEE80211_C_TXFRAG /* handle tx frags */
294 | IEEE80211_C_WME /* 802.11e */
299 setbit(&bands, IEEE80211_MODE_11B);
300 setbit(&bands, IEEE80211_MODE_11G);
301 if (sc->rf_rev == RT2661_RF_5225 || sc->rf_rev == RT2661_RF_5325)
302 setbit(&bands, IEEE80211_MODE_11A);
303 ieee80211_init_channels(ic, NULL, &bands);
305 ieee80211_ifattach(ic, macaddr);
307 ic->ic_wme.wme_update = rt2661_wme_update;
309 ic->ic_scan_start = rt2661_scan_start;
310 ic->ic_scan_end = rt2661_scan_end;
311 ic->ic_set_channel = rt2661_set_channel;
312 ic->ic_updateslot = rt2661_update_slot;
313 ic->ic_update_promisc = rt2661_update_promisc;
314 ic->ic_raw_xmit = rt2661_raw_xmit;
316 ic->ic_vap_create = rt2661_vap_create;
317 ic->ic_vap_delete = rt2661_vap_delete;
319 ieee80211_radiotap_attach(ic,
320 &sc->sc_txtap.wt_ihdr, sizeof(sc->sc_txtap),
321 RT2661_TX_RADIOTAP_PRESENT,
322 &sc->sc_rxtap.wr_ihdr, sizeof(sc->sc_rxtap),
323 RT2661_RX_RADIOTAP_PRESENT);
325 ctx = device_get_sysctl_ctx(sc->sc_dev);
326 tree = device_get_sysctl_tree(sc->sc_dev);
328 SYSCTL_ADD_INT(ctx, SYSCTL_CHILDREN(tree), OID_AUTO,
329 "debug", CTLFLAG_RW, &sc->sc_debug, 0, "debug msgs");
332 ieee80211_announce(ic);
336 fail3: rt2661_free_tx_ring(sc, &sc->mgtq);
337 fail2: while (--ac >= 0)
338 rt2661_free_tx_ring(sc, &sc->txq[ac]);
345 rt2661_detach(void *xsc)
347 struct rt2661_softc *sc = xsc;
348 struct ifnet *ifp = sc->sc_ifp;
349 struct ieee80211com *ic = ifp->if_l2com;
351 rt2661_stop_locked(sc);
353 ieee80211_ifdetach(ic);
355 rt2661_free_tx_ring(sc, &sc->txq[0]);
356 rt2661_free_tx_ring(sc, &sc->txq[1]);
357 rt2661_free_tx_ring(sc, &sc->txq[2]);
358 rt2661_free_tx_ring(sc, &sc->txq[3]);
359 rt2661_free_tx_ring(sc, &sc->mgtq);
360 rt2661_free_rx_ring(sc, &sc->rxq);
367 static struct ieee80211vap *
368 rt2661_vap_create(struct ieee80211com *ic,
369 const char name[IFNAMSIZ], int unit,
370 enum ieee80211_opmode opmode, int flags,
371 const uint8_t bssid[IEEE80211_ADDR_LEN],
372 const uint8_t mac[IEEE80211_ADDR_LEN])
374 struct ifnet *ifp = ic->ic_ifp;
375 struct rt2661_vap *rvp;
376 struct ieee80211vap *vap;
379 case IEEE80211_M_STA:
380 case IEEE80211_M_IBSS:
381 case IEEE80211_M_AHDEMO:
382 case IEEE80211_M_MONITOR:
383 case IEEE80211_M_HOSTAP:
384 case IEEE80211_M_MBSS:
386 if (!TAILQ_EMPTY(&ic->ic_vaps)) {
387 if_printf(ifp, "only 1 vap supported\n");
390 if (opmode == IEEE80211_M_STA)
391 flags |= IEEE80211_CLONE_NOBEACONS;
393 case IEEE80211_M_WDS:
394 if (TAILQ_EMPTY(&ic->ic_vaps) ||
395 ic->ic_opmode != IEEE80211_M_HOSTAP) {
396 if_printf(ifp, "wds only supported in ap mode\n");
400 * Silently remove any request for a unique
401 * bssid; WDS vap's always share the local
404 flags &= ~IEEE80211_CLONE_BSSID;
407 if_printf(ifp, "unknown opmode %d\n", opmode);
410 rvp = (struct rt2661_vap *) kmalloc(sizeof(struct rt2661_vap),
411 M_80211_VAP, M_INTWAIT | M_ZERO);
415 ieee80211_vap_setup(ic, vap, name, unit, opmode, flags, bssid, mac);
417 /* override state transition machine */
418 rvp->ral_newstate = vap->iv_newstate;
419 vap->iv_newstate = rt2661_newstate;
421 vap->iv_update_beacon = rt2661_beacon_update;
424 ieee80211_ratectl_init(vap);
426 ieee80211_vap_attach(vap, ieee80211_media_change, ieee80211_media_status);
427 if (TAILQ_FIRST(&ic->ic_vaps) == vap)
428 ic->ic_opmode = opmode;
433 rt2661_vap_delete(struct ieee80211vap *vap)
435 struct rt2661_vap *rvp = RT2661_VAP(vap);
437 ieee80211_ratectl_deinit(vap);
438 ieee80211_vap_detach(vap);
439 kfree(rvp, M_80211_VAP);
443 rt2661_shutdown(void *xsc)
445 struct rt2661_softc *sc = xsc;
451 rt2661_suspend(void *xsc)
453 struct rt2661_softc *sc = xsc;
459 rt2661_resume(void *xsc)
461 struct rt2661_softc *sc = xsc;
462 struct ifnet *ifp = sc->sc_ifp;
464 if (ifp->if_flags & IFF_UP)
469 rt2661_dma_map_addr(void *arg, bus_dma_segment_t *segs, int nseg, int error)
474 KASSERT(nseg == 1, ("too many DMA segments, %d should be 1", nseg));
476 *(bus_addr_t *)arg = segs[0].ds_addr;
480 rt2661_alloc_tx_ring(struct rt2661_softc *sc, struct rt2661_tx_ring *ring,
487 ring->cur = ring->next = ring->stat = 0;
489 error = bus_dma_tag_create(ring->desc_dmat, 4, 0,
490 BUS_SPACE_MAXADDR_32BIT, BUS_SPACE_MAXADDR, NULL, NULL,
491 count * RT2661_TX_DESC_SIZE, 1, count * RT2661_TX_DESC_SIZE,
492 0, &ring->desc_dmat);
494 device_printf(sc->sc_dev, "could not create desc DMA tag\n");
498 error = bus_dmamem_alloc(ring->desc_dmat, (void **)&ring->desc,
499 BUS_DMA_NOWAIT | BUS_DMA_ZERO, &ring->desc_map);
501 device_printf(sc->sc_dev, "could not allocate DMA memory\n");
505 error = bus_dmamap_load(ring->desc_dmat, ring->desc_map, ring->desc,
506 count * RT2661_TX_DESC_SIZE, rt2661_dma_map_addr, &ring->physaddr,
509 device_printf(sc->sc_dev, "could not load desc DMA map\n");
513 ring->data = kmalloc(count * sizeof (struct rt2661_tx_data), M_DEVBUF,
515 if (ring->data == NULL) {
516 device_printf(sc->sc_dev, "could not allocate soft data\n");
521 error = bus_dma_tag_create(ring->data_dmat, 1, 0,
522 BUS_SPACE_MAXADDR_32BIT, BUS_SPACE_MAXADDR, NULL, NULL, MCLBYTES,
523 RT2661_MAX_SCATTER, MCLBYTES, 0, &ring->data_dmat);
525 device_printf(sc->sc_dev, "could not create data DMA tag\n");
529 for (i = 0; i < count; i++) {
530 error = bus_dmamap_create(ring->data_dmat, 0,
533 device_printf(sc->sc_dev, "could not create DMA map\n");
540 fail: rt2661_free_tx_ring(sc, ring);
545 rt2661_reset_tx_ring(struct rt2661_softc *sc, struct rt2661_tx_ring *ring)
547 struct rt2661_tx_desc *desc;
548 struct rt2661_tx_data *data;
551 for (i = 0; i < ring->count; i++) {
552 desc = &ring->desc[i];
553 data = &ring->data[i];
555 if (data->m != NULL) {
556 bus_dmamap_sync(ring->data_dmat, data->map,
557 BUS_DMASYNC_POSTWRITE);
558 bus_dmamap_unload(ring->data_dmat, data->map);
563 if (data->ni != NULL) {
564 ieee80211_free_node(data->ni);
571 bus_dmamap_sync(ring->desc_dmat, ring->desc_map, BUS_DMASYNC_PREWRITE);
574 ring->cur = ring->next = ring->stat = 0;
578 rt2661_free_tx_ring(struct rt2661_softc *sc, struct rt2661_tx_ring *ring)
580 struct rt2661_tx_data *data;
583 if (ring->desc != NULL) {
584 bus_dmamap_sync(ring->desc_dmat, ring->desc_map,
585 BUS_DMASYNC_POSTWRITE);
586 bus_dmamap_unload(ring->desc_dmat, ring->desc_map);
587 bus_dmamem_free(ring->desc_dmat, ring->desc, ring->desc_map);
590 if (ring->desc_dmat != NULL)
591 bus_dma_tag_destroy(ring->desc_dmat);
593 if (ring->data != NULL) {
594 for (i = 0; i < ring->count; i++) {
595 data = &ring->data[i];
597 if (data->m != NULL) {
598 bus_dmamap_sync(ring->data_dmat, data->map,
599 BUS_DMASYNC_POSTWRITE);
600 bus_dmamap_unload(ring->data_dmat, data->map);
604 if (data->ni != NULL)
605 ieee80211_free_node(data->ni);
607 if (data->map != NULL)
608 bus_dmamap_destroy(ring->data_dmat, data->map);
611 kfree(ring->data, M_DEVBUF);
614 if (ring->data_dmat != NULL)
615 bus_dma_tag_destroy(ring->data_dmat);
619 rt2661_alloc_rx_ring(struct rt2661_softc *sc, struct rt2661_rx_ring *ring,
622 struct rt2661_rx_desc *desc;
623 struct rt2661_rx_data *data;
628 ring->cur = ring->next = 0;
630 error = bus_dma_tag_create(ring->desc_dmat, 4, 0,
631 BUS_SPACE_MAXADDR_32BIT, BUS_SPACE_MAXADDR, NULL, NULL,
632 count * RT2661_RX_DESC_SIZE, 1, count * RT2661_RX_DESC_SIZE,
633 0, &ring->desc_dmat);
635 device_printf(sc->sc_dev, "could not create desc DMA tag\n");
639 error = bus_dmamem_alloc(ring->desc_dmat, (void **)&ring->desc,
640 BUS_DMA_NOWAIT | BUS_DMA_ZERO, &ring->desc_map);
642 device_printf(sc->sc_dev, "could not allocate DMA memory\n");
646 error = bus_dmamap_load(ring->desc_dmat, ring->desc_map, ring->desc,
647 count * RT2661_RX_DESC_SIZE, rt2661_dma_map_addr, &ring->physaddr,
650 device_printf(sc->sc_dev, "could not load desc DMA map\n");
654 ring->data = kmalloc(count * sizeof (struct rt2661_rx_data), M_DEVBUF,
656 if (ring->data == NULL) {
657 device_printf(sc->sc_dev, "could not allocate soft data\n");
663 * Pre-allocate Rx buffers and populate Rx ring.
665 error = bus_dma_tag_create(ring->data_dmat, 1, 0,
666 BUS_SPACE_MAXADDR_32BIT, BUS_SPACE_MAXADDR, NULL, NULL, MCLBYTES,
667 1, MCLBYTES, 0, &ring->data_dmat);
669 device_printf(sc->sc_dev, "could not create data DMA tag\n");
673 for (i = 0; i < count; i++) {
674 desc = &sc->rxq.desc[i];
675 data = &sc->rxq.data[i];
677 error = bus_dmamap_create(ring->data_dmat, 0, &data->map);
679 device_printf(sc->sc_dev, "could not create DMA map\n");
683 data->m = m_getcl(M_NOWAIT, MT_DATA, M_PKTHDR);
684 if (data->m == NULL) {
685 device_printf(sc->sc_dev,
686 "could not allocate rx mbuf\n");
691 error = bus_dmamap_load(ring->data_dmat, data->map,
692 mtod(data->m, void *), MCLBYTES, rt2661_dma_map_addr,
695 device_printf(sc->sc_dev,
696 "could not load rx buf DMA map");
700 desc->flags = htole32(RT2661_RX_BUSY);
701 desc->physaddr = htole32(physaddr);
704 bus_dmamap_sync(ring->desc_dmat, ring->desc_map, BUS_DMASYNC_PREWRITE);
708 fail: rt2661_free_rx_ring(sc, ring);
713 rt2661_reset_rx_ring(struct rt2661_softc *sc, struct rt2661_rx_ring *ring)
717 for (i = 0; i < ring->count; i++)
718 ring->desc[i].flags = htole32(RT2661_RX_BUSY);
720 bus_dmamap_sync(ring->desc_dmat, ring->desc_map, BUS_DMASYNC_PREWRITE);
722 ring->cur = ring->next = 0;
726 rt2661_free_rx_ring(struct rt2661_softc *sc, struct rt2661_rx_ring *ring)
728 struct rt2661_rx_data *data;
731 if (ring->desc != NULL) {
732 bus_dmamap_sync(ring->desc_dmat, ring->desc_map,
733 BUS_DMASYNC_POSTWRITE);
734 bus_dmamap_unload(ring->desc_dmat, ring->desc_map);
735 bus_dmamem_free(ring->desc_dmat, ring->desc, ring->desc_map);
738 if (ring->desc_dmat != NULL)
739 bus_dma_tag_destroy(ring->desc_dmat);
741 if (ring->data != NULL) {
742 for (i = 0; i < ring->count; i++) {
743 data = &ring->data[i];
745 if (data->m != NULL) {
746 bus_dmamap_sync(ring->data_dmat, data->map,
747 BUS_DMASYNC_POSTREAD);
748 bus_dmamap_unload(ring->data_dmat, data->map);
752 if (data->map != NULL)
753 bus_dmamap_destroy(ring->data_dmat, data->map);
756 kfree(ring->data, M_DEVBUF);
759 if (ring->data_dmat != NULL)
760 bus_dma_tag_destroy(ring->data_dmat);
764 rt2661_newstate(struct ieee80211vap *vap, enum ieee80211_state nstate, int arg)
766 struct rt2661_vap *rvp = RT2661_VAP(vap);
767 struct ieee80211com *ic = vap->iv_ic;
768 struct rt2661_softc *sc = ic->ic_ifp->if_softc;
771 if (nstate == IEEE80211_S_INIT && vap->iv_state == IEEE80211_S_RUN) {
774 /* abort TSF synchronization */
775 tmp = RAL_READ(sc, RT2661_TXRX_CSR9);
776 RAL_WRITE(sc, RT2661_TXRX_CSR9, tmp & ~0x00ffffff);
779 error = rvp->ral_newstate(vap, nstate, arg);
781 if (error == 0 && nstate == IEEE80211_S_RUN) {
782 struct ieee80211_node *ni = vap->iv_bss;
784 if (vap->iv_opmode != IEEE80211_M_MONITOR) {
785 rt2661_enable_mrr(sc);
786 rt2661_set_txpreamble(sc);
787 rt2661_set_basicrates(sc, &ni->ni_rates);
788 rt2661_set_bssid(sc, ni->ni_bssid);
791 if (vap->iv_opmode == IEEE80211_M_HOSTAP ||
792 vap->iv_opmode == IEEE80211_M_IBSS ||
793 vap->iv_opmode == IEEE80211_M_MBSS) {
794 error = rt2661_prepare_beacon(sc, vap);
798 if (vap->iv_opmode != IEEE80211_M_MONITOR)
799 rt2661_enable_tsf_sync(sc);
801 rt2661_enable_tsf(sc);
807 * Read 16 bits at address 'addr' from the serial EEPROM (either 93C46 or
811 rt2661_eeprom_read(struct rt2661_softc *sc, uint8_t addr)
817 /* clock C once before the first command */
818 RT2661_EEPROM_CTL(sc, 0);
820 RT2661_EEPROM_CTL(sc, RT2661_S);
821 RT2661_EEPROM_CTL(sc, RT2661_S | RT2661_C);
822 RT2661_EEPROM_CTL(sc, RT2661_S);
824 /* write start bit (1) */
825 RT2661_EEPROM_CTL(sc, RT2661_S | RT2661_D);
826 RT2661_EEPROM_CTL(sc, RT2661_S | RT2661_D | RT2661_C);
828 /* write READ opcode (10) */
829 RT2661_EEPROM_CTL(sc, RT2661_S | RT2661_D);
830 RT2661_EEPROM_CTL(sc, RT2661_S | RT2661_D | RT2661_C);
831 RT2661_EEPROM_CTL(sc, RT2661_S);
832 RT2661_EEPROM_CTL(sc, RT2661_S | RT2661_C);
834 /* write address (A5-A0 or A7-A0) */
835 n = (RAL_READ(sc, RT2661_E2PROM_CSR) & RT2661_93C46) ? 5 : 7;
836 for (; n >= 0; n--) {
837 RT2661_EEPROM_CTL(sc, RT2661_S |
838 (((addr >> n) & 1) << RT2661_SHIFT_D));
839 RT2661_EEPROM_CTL(sc, RT2661_S |
840 (((addr >> n) & 1) << RT2661_SHIFT_D) | RT2661_C);
843 RT2661_EEPROM_CTL(sc, RT2661_S);
845 /* read data Q15-Q0 */
847 for (n = 15; n >= 0; n--) {
848 RT2661_EEPROM_CTL(sc, RT2661_S | RT2661_C);
849 tmp = RAL_READ(sc, RT2661_E2PROM_CSR);
850 val |= ((tmp & RT2661_Q) >> RT2661_SHIFT_Q) << n;
851 RT2661_EEPROM_CTL(sc, RT2661_S);
854 RT2661_EEPROM_CTL(sc, 0);
856 /* clear Chip Select and clock C */
857 RT2661_EEPROM_CTL(sc, RT2661_S);
858 RT2661_EEPROM_CTL(sc, 0);
859 RT2661_EEPROM_CTL(sc, RT2661_C);
865 rt2661_tx_intr(struct rt2661_softc *sc)
867 struct ifnet *ifp = sc->sc_ifp;
868 struct rt2661_tx_ring *txq;
869 struct rt2661_tx_data *data;
872 struct ieee80211vap *vap;
875 struct ieee80211_node *ni;
878 val = RAL_READ(sc, RT2661_STA_CSR4);
879 if (!(val & RT2661_TX_STAT_VALID))
882 /* retrieve the queue in which this frame was sent */
883 qid = RT2661_TX_QID(val);
884 txq = (qid <= 3) ? &sc->txq[qid] : &sc->mgtq;
886 /* retrieve rate control algorithm context */
887 data = &txq->data[txq->stat];
894 /* if no frame has been sent, ignore */
900 switch (RT2661_TX_RESULT(val)) {
901 case RT2661_TX_SUCCESS:
902 retrycnt = RT2661_TX_RETRYCNT(val);
904 DPRINTFN(sc, 10, "data frame sent successfully after "
905 "%d retries\n", retrycnt);
906 if (data->rix != IEEE80211_FIXED_RATE_NONE)
907 ieee80211_ratectl_tx_complete(vap, ni,
908 IEEE80211_RATECTL_TX_SUCCESS,
910 IFNET_STAT_INC(ifp, opackets, 1);
913 case RT2661_TX_RETRY_FAIL:
914 retrycnt = RT2661_TX_RETRYCNT(val);
916 DPRINTFN(sc, 9, "%s\n",
917 "sending data frame failed (too much retries)");
918 if (data->rix != IEEE80211_FIXED_RATE_NONE)
919 ieee80211_ratectl_tx_complete(vap, ni,
920 IEEE80211_RATECTL_TX_FAILURE,
922 IFNET_STAT_INC(ifp, oerrors, 1);
927 device_printf(sc->sc_dev,
928 "sending data frame failed 0x%08x\n", val);
929 IFNET_STAT_INC(ifp, oerrors, 1);
932 DPRINTFN(sc, 15, "tx done q=%d idx=%u\n", qid, txq->stat);
935 if (++txq->stat >= txq->count) /* faster than % count */
938 if (m->m_flags & M_TXCB)
939 ieee80211_process_callback(ni, m,
940 RT2661_TX_RESULT(val) != RT2661_TX_SUCCESS);
942 ieee80211_free_node(ni);
946 ifq_clr_oactive(&ifp->if_snd);
948 rt2661_start_locked(ifp);
952 rt2661_tx_dma_intr(struct rt2661_softc *sc, struct rt2661_tx_ring *txq)
954 struct rt2661_tx_desc *desc;
955 struct rt2661_tx_data *data;
957 bus_dmamap_sync(txq->desc_dmat, txq->desc_map, BUS_DMASYNC_POSTREAD);
960 desc = &txq->desc[txq->next];
961 data = &txq->data[txq->next];
963 if ((le32toh(desc->flags) & RT2661_TX_BUSY) ||
964 !(le32toh(desc->flags) & RT2661_TX_VALID))
967 bus_dmamap_sync(txq->data_dmat, data->map,
968 BUS_DMASYNC_POSTWRITE);
969 bus_dmamap_unload(txq->data_dmat, data->map);
971 /* descriptor is no longer valid */
972 desc->flags &= ~htole32(RT2661_TX_VALID);
974 DPRINTFN(sc, 15, "tx dma done q=%p idx=%u\n", txq, txq->next);
976 if (++txq->next >= txq->count) /* faster than % count */
980 bus_dmamap_sync(txq->desc_dmat, txq->desc_map, BUS_DMASYNC_PREWRITE);
984 rt2661_rx_intr(struct rt2661_softc *sc)
986 struct ifnet *ifp = sc->sc_ifp;
987 struct ieee80211com *ic = ifp->if_l2com;
988 struct rt2661_rx_desc *desc;
989 struct rt2661_rx_data *data;
991 struct ieee80211_frame *wh;
992 struct ieee80211_node *ni;
993 struct mbuf *mnew, *m;
996 bus_dmamap_sync(sc->rxq.desc_dmat, sc->rxq.desc_map,
997 BUS_DMASYNC_POSTREAD);
1002 desc = &sc->rxq.desc[sc->rxq.cur];
1003 data = &sc->rxq.data[sc->rxq.cur];
1005 if (le32toh(desc->flags) & RT2661_RX_BUSY)
1008 if ((le32toh(desc->flags) & RT2661_RX_PHY_ERROR) ||
1009 (le32toh(desc->flags) & RT2661_RX_CRC_ERROR)) {
1011 * This should not happen since we did not request
1012 * to receive those frames when we filled TXRX_CSR0.
1014 DPRINTFN(sc, 5, "PHY or CRC error flags 0x%08x\n",
1015 le32toh(desc->flags));
1016 IFNET_STAT_INC(ifp, ierrors, 1);
1020 if ((le32toh(desc->flags) & RT2661_RX_CIPHER_MASK) != 0) {
1021 IFNET_STAT_INC(ifp, ierrors, 1);
1026 * Try to allocate a new mbuf for this ring element and load it
1027 * before processing the current mbuf. If the ring element
1028 * cannot be loaded, drop the received packet and reuse the old
1029 * mbuf. In the unlikely case that the old mbuf can't be
1030 * reloaded either, explicitly panic.
1032 mnew = m_getcl(M_NOWAIT, MT_DATA, M_PKTHDR);
1034 IFNET_STAT_INC(ifp, ierrors, 1);
1038 bus_dmamap_sync(sc->rxq.data_dmat, data->map,
1039 BUS_DMASYNC_POSTREAD);
1040 bus_dmamap_unload(sc->rxq.data_dmat, data->map);
1042 error = bus_dmamap_load(sc->rxq.data_dmat, data->map,
1043 mtod(mnew, void *), MCLBYTES, rt2661_dma_map_addr,
1048 /* try to reload the old mbuf */
1049 error = bus_dmamap_load(sc->rxq.data_dmat, data->map,
1050 mtod(data->m, void *), MCLBYTES,
1051 rt2661_dma_map_addr, &physaddr, 0);
1053 /* very unlikely that it will fail... */
1054 panic("%s: could not load old rx mbuf",
1055 device_get_name(sc->sc_dev));
1057 IFNET_STAT_INC(ifp, ierrors, 1);
1062 * New mbuf successfully loaded, update Rx ring and continue
1067 desc->physaddr = htole32(physaddr);
1070 m->m_pkthdr.rcvif = ifp;
1071 m->m_pkthdr.len = m->m_len =
1072 (le32toh(desc->flags) >> 16) & 0xfff;
1074 rssi = rt2661_get_rssi(sc, desc->rssi);
1075 /* Error happened during RSSI conversion. */
1077 rssi = -30; /* XXX ignored by net80211 */
1078 nf = RT2661_NOISE_FLOOR;
1080 if (ieee80211_radiotap_active(ic)) {
1081 struct rt2661_rx_radiotap_header *tap = &sc->sc_rxtap;
1082 uint32_t tsf_lo, tsf_hi;
1084 /* get timestamp (low and high 32 bits) */
1085 tsf_hi = RAL_READ(sc, RT2661_TXRX_CSR13);
1086 tsf_lo = RAL_READ(sc, RT2661_TXRX_CSR12);
1089 htole64(((uint64_t)tsf_hi << 32) | tsf_lo);
1091 tap->wr_rate = ieee80211_plcp2rate(desc->rate,
1092 (desc->flags & htole32(RT2661_RX_OFDM)) ?
1093 IEEE80211_T_OFDM : IEEE80211_T_CCK);
1094 tap->wr_antsignal = nf + rssi;
1095 tap->wr_antnoise = nf;
1097 sc->sc_flags |= RAL_INPUT_RUNNING;
1098 wh = mtod(m, struct ieee80211_frame *);
1100 /* send the frame to the 802.11 layer */
1101 ni = ieee80211_find_rxnode(ic,
1102 (struct ieee80211_frame_min *)wh);
1104 (void) ieee80211_input(ni, m, rssi, nf);
1105 ieee80211_free_node(ni);
1107 (void) ieee80211_input_all(ic, m, rssi, nf);
1109 sc->sc_flags &= ~RAL_INPUT_RUNNING;
1111 skip: desc->flags |= htole32(RT2661_RX_BUSY);
1113 DPRINTFN(sc, 15, "rx intr idx=%u\n", sc->rxq.cur);
1115 sc->rxq.cur = (sc->rxq.cur + 1) % RT2661_RX_RING_COUNT;
1118 bus_dmamap_sync(sc->rxq.desc_dmat, sc->rxq.desc_map,
1119 BUS_DMASYNC_PREWRITE);
1124 rt2661_mcu_beacon_expire(struct rt2661_softc *sc)
1130 rt2661_mcu_wakeup(struct rt2661_softc *sc)
1132 RAL_WRITE(sc, RT2661_MAC_CSR11, 5 << 16);
1134 RAL_WRITE(sc, RT2661_SOFT_RESET_CSR, 0x7);
1135 RAL_WRITE(sc, RT2661_IO_CNTL_CSR, 0x18);
1136 RAL_WRITE(sc, RT2661_PCI_USEC_CSR, 0x20);
1138 /* send wakeup command to MCU */
1139 rt2661_tx_cmd(sc, RT2661_MCU_CMD_WAKEUP, 0);
1143 rt2661_mcu_cmd_intr(struct rt2661_softc *sc)
1145 RAL_READ(sc, RT2661_M2H_CMD_DONE_CSR);
1146 RAL_WRITE(sc, RT2661_M2H_CMD_DONE_CSR, 0xffffffff);
1150 rt2661_intr(void *arg)
1152 struct rt2661_softc *sc = arg;
1153 struct ifnet *ifp = sc->sc_ifp;
1156 /* disable MAC and MCU interrupts */
1157 RAL_WRITE(sc, RT2661_INT_MASK_CSR, 0xffffff7f);
1158 RAL_WRITE(sc, RT2661_MCU_INT_MASK_CSR, 0xffffffff);
1160 /* don't re-enable interrupts if we're shutting down */
1161 if (!(ifp->if_flags & IFF_RUNNING)) {
1165 r1 = RAL_READ(sc, RT2661_INT_SOURCE_CSR);
1166 RAL_WRITE(sc, RT2661_INT_SOURCE_CSR, r1);
1168 r2 = RAL_READ(sc, RT2661_MCU_INT_SOURCE_CSR);
1169 RAL_WRITE(sc, RT2661_MCU_INT_SOURCE_CSR, r2);
1171 if (r1 & RT2661_MGT_DONE)
1172 rt2661_tx_dma_intr(sc, &sc->mgtq);
1174 if (r1 & RT2661_RX_DONE)
1177 if (r1 & RT2661_TX0_DMA_DONE)
1178 rt2661_tx_dma_intr(sc, &sc->txq[0]);
1180 if (r1 & RT2661_TX1_DMA_DONE)
1181 rt2661_tx_dma_intr(sc, &sc->txq[1]);
1183 if (r1 & RT2661_TX2_DMA_DONE)
1184 rt2661_tx_dma_intr(sc, &sc->txq[2]);
1186 if (r1 & RT2661_TX3_DMA_DONE)
1187 rt2661_tx_dma_intr(sc, &sc->txq[3]);
1189 if (r1 & RT2661_TX_DONE)
1192 if (r2 & RT2661_MCU_CMD_DONE)
1193 rt2661_mcu_cmd_intr(sc);
1195 if (r2 & RT2661_MCU_BEACON_EXPIRE)
1196 rt2661_mcu_beacon_expire(sc);
1198 if (r2 & RT2661_MCU_WAKEUP)
1199 rt2661_mcu_wakeup(sc);
1201 /* re-enable MAC and MCU interrupts */
1202 RAL_WRITE(sc, RT2661_INT_MASK_CSR, 0x0000ff10);
1203 RAL_WRITE(sc, RT2661_MCU_INT_MASK_CSR, 0);
1208 rt2661_plcp_signal(int rate)
1211 /* OFDM rates (cf IEEE Std 802.11a-1999, pp. 14 Table 80) */
1212 case 12: return 0xb;
1213 case 18: return 0xf;
1214 case 24: return 0xa;
1215 case 36: return 0xe;
1216 case 48: return 0x9;
1217 case 72: return 0xd;
1218 case 96: return 0x8;
1219 case 108: return 0xc;
1221 /* CCK rates (NB: not IEEE std, device-specific) */
1224 case 11: return 0x2;
1225 case 22: return 0x3;
1227 return 0xff; /* XXX unsupported/unknown rate */
1231 rt2661_setup_tx_desc(struct rt2661_softc *sc, struct rt2661_tx_desc *desc,
1232 uint32_t flags, uint16_t xflags, int len, int rate,
1233 const bus_dma_segment_t *segs, int nsegs, int ac)
1235 struct ifnet *ifp = sc->sc_ifp;
1236 struct ieee80211com *ic = ifp->if_l2com;
1237 uint16_t plcp_length;
1240 desc->flags = htole32(flags);
1241 desc->flags |= htole32(len << 16);
1242 desc->flags |= htole32(RT2661_TX_BUSY | RT2661_TX_VALID);
1244 desc->xflags = htole16(xflags);
1245 desc->xflags |= htole16(nsegs << 13);
1247 desc->wme = htole16(
1250 RT2661_LOGCWMIN(4) |
1251 RT2661_LOGCWMAX(10));
1254 * Remember in which queue this frame was sent. This field is driver
1255 * private data only. It will be made available by the NIC in STA_CSR4
1260 /* setup PLCP fields */
1261 desc->plcp_signal = rt2661_plcp_signal(rate);
1262 desc->plcp_service = 4;
1264 len += IEEE80211_CRC_LEN;
1265 if (ieee80211_rate2phytype(ic->ic_rt, rate) == IEEE80211_T_OFDM) {
1266 desc->flags |= htole32(RT2661_TX_OFDM);
1268 plcp_length = len & 0xfff;
1269 desc->plcp_length_hi = plcp_length >> 6;
1270 desc->plcp_length_lo = plcp_length & 0x3f;
1272 plcp_length = (16 * len + rate - 1) / rate;
1274 remainder = (16 * len) % 22;
1275 if (remainder != 0 && remainder < 7)
1276 desc->plcp_service |= RT2661_PLCP_LENGEXT;
1278 desc->plcp_length_hi = plcp_length >> 8;
1279 desc->plcp_length_lo = plcp_length & 0xff;
1281 if (rate != 2 && (ic->ic_flags & IEEE80211_F_SHPREAMBLE))
1282 desc->plcp_signal |= 0x08;
1285 /* RT2x61 supports scatter with up to 5 segments */
1286 for (i = 0; i < nsegs; i++) {
1287 desc->addr[i] = htole32(segs[i].ds_addr);
1288 desc->len [i] = htole16(segs[i].ds_len);
1293 rt2661_tx_mgt(struct rt2661_softc *sc, struct mbuf *m0,
1294 struct ieee80211_node *ni)
1296 struct ieee80211vap *vap = ni->ni_vap;
1297 struct ieee80211com *ic = ni->ni_ic;
1298 struct rt2661_tx_desc *desc;
1299 struct rt2661_tx_data *data;
1300 struct ieee80211_frame *wh;
1301 struct ieee80211_key *k;
1302 bus_dma_segment_t segs[RT2661_MAX_SCATTER];
1304 uint32_t flags = 0; /* XXX HWSEQ */
1305 int nsegs, rate, error;
1307 desc = &sc->mgtq.desc[sc->mgtq.cur];
1308 data = &sc->mgtq.data[sc->mgtq.cur];
1310 rate = vap->iv_txparms[ieee80211_chan2mode(ic->ic_curchan)].mgmtrate;
1312 wh = mtod(m0, struct ieee80211_frame *);
1314 if (wh->i_fc[1] & IEEE80211_FC1_PROTECTED) {
1315 k = ieee80211_crypto_encap(ni, m0);
1322 error = bus_dmamap_load_mbuf_segment(sc->mgtq.data_dmat, data->map, m0,
1323 segs, 1, &nsegs, BUS_DMA_NOWAIT);
1325 device_printf(sc->sc_dev, "could not map mbuf (error %d)\n",
1331 if (ieee80211_radiotap_active_vap(vap)) {
1332 struct rt2661_tx_radiotap_header *tap = &sc->sc_txtap;
1335 tap->wt_rate = rate;
1337 ieee80211_radiotap_tx(vap, m0);
1342 /* management frames are not taken into account for amrr */
1343 data->rix = IEEE80211_FIXED_RATE_NONE;
1345 wh = mtod(m0, struct ieee80211_frame *);
1347 if (!IEEE80211_IS_MULTICAST(wh->i_addr1)) {
1348 flags |= RT2661_TX_NEED_ACK;
1350 dur = ieee80211_ack_duration(ic->ic_rt,
1351 rate, ic->ic_flags & IEEE80211_F_SHPREAMBLE);
1352 *(uint16_t *)wh->i_dur = htole16(dur);
1354 /* tell hardware to add timestamp in probe responses */
1356 (IEEE80211_FC0_TYPE_MASK | IEEE80211_FC0_SUBTYPE_MASK)) ==
1357 (IEEE80211_FC0_TYPE_MGT | IEEE80211_FC0_SUBTYPE_PROBE_RESP))
1358 flags |= RT2661_TX_TIMESTAMP;
1361 rt2661_setup_tx_desc(sc, desc, flags, 0 /* XXX HWSEQ */,
1362 m0->m_pkthdr.len, rate, segs, nsegs, RT2661_QID_MGT);
1364 bus_dmamap_sync(sc->mgtq.data_dmat, data->map, BUS_DMASYNC_PREWRITE);
1365 bus_dmamap_sync(sc->mgtq.desc_dmat, sc->mgtq.desc_map,
1366 BUS_DMASYNC_PREWRITE);
1368 DPRINTFN(sc, 10, "sending mgt frame len=%u idx=%u rate=%u\n",
1369 m0->m_pkthdr.len, sc->mgtq.cur, rate);
1373 sc->mgtq.cur = (sc->mgtq.cur + 1) % RT2661_MGT_RING_COUNT;
1374 RAL_WRITE(sc, RT2661_TX_CNTL_CSR, RT2661_KICK_MGT);
1380 rt2661_sendprot(struct rt2661_softc *sc, int ac,
1381 const struct mbuf *m, struct ieee80211_node *ni, int prot, int rate)
1383 struct ieee80211com *ic = ni->ni_ic;
1384 struct rt2661_tx_ring *txq = &sc->txq[ac];
1385 const struct ieee80211_frame *wh;
1386 struct rt2661_tx_desc *desc;
1387 struct rt2661_tx_data *data;
1389 int protrate, pktlen, flags, isshort, error;
1391 bus_dma_segment_t segs[RT2661_MAX_SCATTER];
1394 KASSERT(prot == IEEE80211_PROT_RTSCTS || prot == IEEE80211_PROT_CTSONLY,
1395 ("protection %d", prot));
1397 wh = mtod(m, const struct ieee80211_frame *);
1398 pktlen = m->m_pkthdr.len + IEEE80211_CRC_LEN;
1400 protrate = ieee80211_ctl_rate(ic->ic_rt, rate);
1401 ieee80211_ack_rate(ic->ic_rt, rate);
1403 isshort = (ic->ic_flags & IEEE80211_F_SHPREAMBLE) != 0;
1404 dur = ieee80211_compute_duration(ic->ic_rt, pktlen, rate, isshort)
1405 + ieee80211_ack_duration(ic->ic_rt, rate, isshort);
1406 flags = RT2661_TX_MORE_FRAG;
1407 if (prot == IEEE80211_PROT_RTSCTS) {
1408 /* NB: CTS is the same size as an ACK */
1409 dur += ieee80211_ack_duration(ic->ic_rt, rate, isshort);
1410 flags |= RT2661_TX_NEED_ACK;
1411 mprot = ieee80211_alloc_rts(ic, wh->i_addr1, wh->i_addr2, dur);
1413 mprot = ieee80211_alloc_cts(ic, ni->ni_vap->iv_myaddr, dur);
1415 if (mprot == NULL) {
1416 /* XXX stat + msg */
1420 data = &txq->data[txq->cur];
1421 desc = &txq->desc[txq->cur];
1423 error = bus_dmamap_load_mbuf_segment(txq->data_dmat, data->map, mprot, segs,
1424 1, &nsegs, BUS_DMA_NOWAIT);
1426 device_printf(sc->sc_dev,
1427 "could not map mbuf (error %d)\n", error);
1433 data->ni = ieee80211_ref_node(ni);
1434 /* ctl frames are not taken into account for amrr */
1435 data->rix = IEEE80211_FIXED_RATE_NONE;
1437 rt2661_setup_tx_desc(sc, desc, flags, 0, mprot->m_pkthdr.len,
1438 protrate, segs, 1, ac);
1440 bus_dmamap_sync(txq->data_dmat, data->map, BUS_DMASYNC_PREWRITE);
1441 bus_dmamap_sync(txq->desc_dmat, txq->desc_map, BUS_DMASYNC_PREWRITE);
1444 txq->cur = (txq->cur + 1) % RT2661_TX_RING_COUNT;
1450 rt2661_tx_data(struct rt2661_softc *sc, struct mbuf *m0,
1451 struct ieee80211_node *ni, int ac)
1453 struct ieee80211vap *vap = ni->ni_vap;
1454 struct ifnet *ifp = sc->sc_ifp;
1455 struct ieee80211com *ic = ifp->if_l2com;
1456 struct rt2661_tx_ring *txq = &sc->txq[ac];
1457 struct rt2661_tx_desc *desc;
1458 struct rt2661_tx_data *data;
1459 struct ieee80211_frame *wh;
1460 const struct ieee80211_txparam *tp;
1461 struct ieee80211_key *k;
1462 const struct chanAccParams *cap;
1464 bus_dma_segment_t segs[RT2661_MAX_SCATTER];
1467 int error, nsegs, rate, noack = 0;
1469 wh = mtod(m0, struct ieee80211_frame *);
1471 tp = &vap->iv_txparms[ieee80211_chan2mode(ni->ni_chan)];
1472 if (IEEE80211_IS_MULTICAST(wh->i_addr1)) {
1473 rate = tp->mcastrate;
1474 } else if (m0->m_flags & M_EAPOL) {
1475 rate = tp->mgmtrate;
1476 } else if (tp->ucastrate != IEEE80211_FIXED_RATE_NONE) {
1477 rate = tp->ucastrate;
1479 ieee80211_ratectl_rate(ni, NULL, 0);
1480 rate = ni->ni_txrate;
1482 rate &= IEEE80211_RATE_VAL;
1484 if (wh->i_fc[0] & IEEE80211_FC0_SUBTYPE_QOS) {
1485 cap = &ic->ic_wme.wme_chanParams;
1486 noack = cap->cap_wmeParams[ac].wmep_noackPolicy;
1489 if (wh->i_fc[1] & IEEE80211_FC1_PROTECTED) {
1490 k = ieee80211_crypto_encap(ni, m0);
1496 /* packet header may have moved, reset our local pointer */
1497 wh = mtod(m0, struct ieee80211_frame *);
1501 if (!IEEE80211_IS_MULTICAST(wh->i_addr1)) {
1502 int prot = IEEE80211_PROT_NONE;
1503 if (m0->m_pkthdr.len + IEEE80211_CRC_LEN > vap->iv_rtsthreshold)
1504 prot = IEEE80211_PROT_RTSCTS;
1505 else if ((ic->ic_flags & IEEE80211_F_USEPROT) &&
1506 ieee80211_rate2phytype(ic->ic_rt, rate) == IEEE80211_T_OFDM)
1507 prot = ic->ic_protmode;
1508 if (prot != IEEE80211_PROT_NONE) {
1509 error = rt2661_sendprot(sc, ac, m0, ni, prot, rate);
1514 flags |= RT2661_TX_LONG_RETRY | RT2661_TX_IFS;
1518 data = &txq->data[txq->cur];
1519 desc = &txq->desc[txq->cur];
1521 error = bus_dmamap_load_mbuf_segment(txq->data_dmat, data->map, m0, segs,
1522 1, &nsegs, BUS_DMA_NOWAIT);
1523 if (error != 0 && error != EFBIG) {
1524 device_printf(sc->sc_dev, "could not map mbuf (error %d)\n",
1530 mnew = m_defrag(m0, M_NOWAIT);
1532 device_printf(sc->sc_dev,
1533 "could not defragment mbuf\n");
1539 error = bus_dmamap_load_mbuf_segment(txq->data_dmat, data->map, m0,
1540 segs, 1, &nsegs, BUS_DMA_NOWAIT);
1542 device_printf(sc->sc_dev,
1543 "could not map mbuf (error %d)\n", error);
1548 /* packet header have moved, reset our local pointer */
1549 wh = mtod(m0, struct ieee80211_frame *);
1552 if (ieee80211_radiotap_active_vap(vap)) {
1553 struct rt2661_tx_radiotap_header *tap = &sc->sc_txtap;
1556 tap->wt_rate = rate;
1558 ieee80211_radiotap_tx(vap, m0);
1564 /* remember link conditions for rate adaptation algorithm */
1565 if (tp->ucastrate == IEEE80211_FIXED_RATE_NONE) {
1566 data->rix = ni->ni_txrate;
1567 /* XXX probably need last rssi value and not avg */
1568 data->rssi = ic->ic_node_getrssi(ni);
1570 data->rix = IEEE80211_FIXED_RATE_NONE;
1572 if (!noack && !IEEE80211_IS_MULTICAST(wh->i_addr1)) {
1573 flags |= RT2661_TX_NEED_ACK;
1575 dur = ieee80211_ack_duration(ic->ic_rt,
1576 rate, ic->ic_flags & IEEE80211_F_SHPREAMBLE);
1577 *(uint16_t *)wh->i_dur = htole16(dur);
1580 rt2661_setup_tx_desc(sc, desc, flags, 0, m0->m_pkthdr.len, rate, segs,
1583 bus_dmamap_sync(txq->data_dmat, data->map, BUS_DMASYNC_PREWRITE);
1584 bus_dmamap_sync(txq->desc_dmat, txq->desc_map, BUS_DMASYNC_PREWRITE);
1586 DPRINTFN(sc, 10, "sending data frame len=%u idx=%u rate=%u\n",
1587 m0->m_pkthdr.len, txq->cur, rate);
1591 txq->cur = (txq->cur + 1) % RT2661_TX_RING_COUNT;
1592 RAL_WRITE(sc, RT2661_TX_CNTL_CSR, 1 << ac);
1598 rt2661_start_locked(struct ifnet *ifp)
1600 struct rt2661_softc *sc = ifp->if_softc;
1602 struct ieee80211_node *ni;
1605 /* prevent management frames from being sent if we're not ready */
1606 if (!(ifp->if_flags & IFF_RUNNING) || sc->sc_invalid)
1610 m = ifq_dequeue(&ifp->if_snd);
1614 ac = M_WME_GETAC(m);
1615 if (sc->txq[ac].queued >= RT2661_TX_RING_COUNT - 1) {
1616 /* there is no place left in this ring */
1617 ifq_prepend(&ifp->if_snd, m);
1618 ifq_set_oactive(&ifp->if_snd);
1621 ni = (struct ieee80211_node *) m->m_pkthdr.rcvif;
1622 if (rt2661_tx_data(sc, m, ni, ac) != 0) {
1623 ieee80211_free_node(ni);
1624 IFNET_STAT_INC(ifp, oerrors, 1);
1628 sc->sc_tx_timer = 5;
1633 rt2661_start(struct ifnet *ifp, struct ifaltq_subque *ifsq)
1635 ASSERT_ALTQ_SQ_DEFAULT(ifp, ifsq);
1636 rt2661_start_locked(ifp);
1640 rt2661_raw_xmit(struct ieee80211_node *ni, struct mbuf *m,
1641 const struct ieee80211_bpf_params *params)
1643 struct ieee80211com *ic = ni->ni_ic;
1644 struct ifnet *ifp = ic->ic_ifp;
1645 struct rt2661_softc *sc = ifp->if_softc;
1647 /* prevent management frames from being sent if we're not ready */
1648 if (!(ifp->if_flags & IFF_RUNNING)) {
1650 ieee80211_free_node(ni);
1653 if (sc->mgtq.queued >= RT2661_MGT_RING_COUNT) {
1654 ifq_set_oactive(&ifp->if_snd);
1656 ieee80211_free_node(ni);
1657 return ENOBUFS; /* XXX */
1660 IFNET_STAT_INC(ifp, opackets, 1);
1663 * Legacy path; interpret frame contents to decide
1664 * precisely how to send the frame.
1667 if (rt2661_tx_mgt(sc, m, ni) != 0)
1669 sc->sc_tx_timer = 5;
1673 IFNET_STAT_INC(ifp, oerrors, 1);
1674 ieee80211_free_node(ni);
1675 return EIO; /* XXX */
1679 rt2661_watchdog_callout(void *arg)
1681 struct rt2661_softc *sc = (struct rt2661_softc *)arg;
1682 struct ifnet *ifp = sc->sc_ifp;
1684 KASSERT(ifp->if_flags & IFF_RUNNING, ("not running"));
1686 if (sc->sc_invalid) /* card ejected */
1689 if (sc->sc_tx_timer > 0 && --sc->sc_tx_timer == 0) {
1690 if_printf(ifp, "device timeout\n");
1691 rt2661_init_locked(sc);
1692 IFNET_STAT_INC(ifp, oerrors, 1);
1693 /* NB: callout is reset in rt2661_init() */
1696 callout_reset(&sc->watchdog_ch, hz, rt2661_watchdog_callout, sc);
1701 rt2661_ioctl(struct ifnet *ifp, u_long cmd, caddr_t data, struct ucred *ucred)
1703 struct rt2661_softc *sc = ifp->if_softc;
1704 struct ieee80211com *ic = ifp->if_l2com;
1705 struct ifreq *ifr = (struct ifreq *) data;
1706 int error = 0, startall = 0;
1710 if (ifp->if_flags & IFF_UP) {
1711 if ((ifp->if_flags & IFF_RUNNING) == 0) {
1712 rt2661_init_locked(sc);
1715 rt2661_update_promisc(ic);
1717 if (ifp->if_flags & IFF_RUNNING)
1718 rt2661_stop_locked(sc);
1721 ieee80211_start_all(ic);
1724 error = ifmedia_ioctl(ifp, ifr, &ic->ic_media, cmd);
1727 error = ether_ioctl(ifp, cmd, data);
1737 rt2661_bbp_write(struct rt2661_softc *sc, uint8_t reg, uint8_t val)
1742 for (ntries = 0; ntries < 100; ntries++) {
1743 if (!(RAL_READ(sc, RT2661_PHY_CSR3) & RT2661_BBP_BUSY))
1747 if (ntries == 100) {
1748 device_printf(sc->sc_dev, "could not write to BBP\n");
1752 tmp = RT2661_BBP_BUSY | (reg & 0x7f) << 8 | val;
1753 RAL_WRITE(sc, RT2661_PHY_CSR3, tmp);
1755 DPRINTFN(sc, 15, "BBP R%u <- 0x%02x\n", reg, val);
1759 rt2661_bbp_read(struct rt2661_softc *sc, uint8_t reg)
1764 for (ntries = 0; ntries < 100; ntries++) {
1765 if (!(RAL_READ(sc, RT2661_PHY_CSR3) & RT2661_BBP_BUSY))
1769 if (ntries == 100) {
1770 device_printf(sc->sc_dev, "could not read from BBP\n");
1774 val = RT2661_BBP_BUSY | RT2661_BBP_READ | reg << 8;
1775 RAL_WRITE(sc, RT2661_PHY_CSR3, val);
1777 for (ntries = 0; ntries < 100; ntries++) {
1778 val = RAL_READ(sc, RT2661_PHY_CSR3);
1779 if (!(val & RT2661_BBP_BUSY))
1784 device_printf(sc->sc_dev, "could not read from BBP\n");
1789 rt2661_rf_write(struct rt2661_softc *sc, uint8_t reg, uint32_t val)
1794 for (ntries = 0; ntries < 100; ntries++) {
1795 if (!(RAL_READ(sc, RT2661_PHY_CSR4) & RT2661_RF_BUSY))
1799 if (ntries == 100) {
1800 device_printf(sc->sc_dev, "could not write to RF\n");
1804 tmp = RT2661_RF_BUSY | RT2661_RF_21BIT | (val & 0x1fffff) << 2 |
1806 RAL_WRITE(sc, RT2661_PHY_CSR4, tmp);
1808 /* remember last written value in sc */
1809 sc->rf_regs[reg] = val;
1811 DPRINTFN(sc, 15, "RF R[%u] <- 0x%05x\n", reg & 3, val & 0x1fffff);
1815 rt2661_tx_cmd(struct rt2661_softc *sc, uint8_t cmd, uint16_t arg)
1817 if (RAL_READ(sc, RT2661_H2M_MAILBOX_CSR) & RT2661_H2M_BUSY)
1818 return EIO; /* there is already a command pending */
1820 RAL_WRITE(sc, RT2661_H2M_MAILBOX_CSR,
1821 RT2661_H2M_BUSY | RT2661_TOKEN_NO_INTR << 16 | arg);
1823 RAL_WRITE(sc, RT2661_HOST_CMD_CSR, RT2661_KICK_CMD | cmd);
1829 rt2661_select_antenna(struct rt2661_softc *sc)
1831 uint8_t bbp4, bbp77;
1834 bbp4 = rt2661_bbp_read(sc, 4);
1835 bbp77 = rt2661_bbp_read(sc, 77);
1839 /* make sure Rx is disabled before switching antenna */
1840 tmp = RAL_READ(sc, RT2661_TXRX_CSR0);
1841 RAL_WRITE(sc, RT2661_TXRX_CSR0, tmp | RT2661_DISABLE_RX);
1843 rt2661_bbp_write(sc, 4, bbp4);
1844 rt2661_bbp_write(sc, 77, bbp77);
1846 /* restore Rx filter */
1847 RAL_WRITE(sc, RT2661_TXRX_CSR0, tmp);
1851 * Enable multi-rate retries for frames sent at OFDM rates.
1852 * In 802.11b/g mode, allow fallback to CCK rates.
1855 rt2661_enable_mrr(struct rt2661_softc *sc)
1857 struct ifnet *ifp = sc->sc_ifp;
1858 struct ieee80211com *ic = ifp->if_l2com;
1861 tmp = RAL_READ(sc, RT2661_TXRX_CSR4);
1863 tmp &= ~RT2661_MRR_CCK_FALLBACK;
1864 if (!IEEE80211_IS_CHAN_5GHZ(ic->ic_bsschan))
1865 tmp |= RT2661_MRR_CCK_FALLBACK;
1866 tmp |= RT2661_MRR_ENABLED;
1868 RAL_WRITE(sc, RT2661_TXRX_CSR4, tmp);
1872 rt2661_set_txpreamble(struct rt2661_softc *sc)
1874 struct ifnet *ifp = sc->sc_ifp;
1875 struct ieee80211com *ic = ifp->if_l2com;
1878 tmp = RAL_READ(sc, RT2661_TXRX_CSR4);
1880 tmp &= ~RT2661_SHORT_PREAMBLE;
1881 if (ic->ic_flags & IEEE80211_F_SHPREAMBLE)
1882 tmp |= RT2661_SHORT_PREAMBLE;
1884 RAL_WRITE(sc, RT2661_TXRX_CSR4, tmp);
1888 rt2661_set_basicrates(struct rt2661_softc *sc,
1889 const struct ieee80211_rateset *rs)
1891 #define RV(r) ((r) & IEEE80211_RATE_VAL)
1892 struct ifnet *ifp = sc->sc_ifp;
1893 struct ieee80211com *ic = ifp->if_l2com;
1898 for (i = 0; i < rs->rs_nrates; i++) {
1899 rate = rs->rs_rates[i];
1901 if (!(rate & IEEE80211_RATE_BASIC))
1905 * Find h/w rate index. We know it exists because the rate
1906 * set has already been negotiated.
1908 for (j = 0; ic->ic_sup_rates[IEEE80211_MODE_11G].rs_rates[j] != RV(rate); j++);
1913 RAL_WRITE(sc, RT2661_TXRX_CSR5, mask);
1915 DPRINTF(sc, "Setting basic rate mask to 0x%x\n", mask);
1920 * Reprogram MAC/BBP to switch to a new band. Values taken from the reference
1924 rt2661_select_band(struct rt2661_softc *sc, struct ieee80211_channel *c)
1926 uint8_t bbp17, bbp35, bbp96, bbp97, bbp98, bbp104;
1929 /* update all BBP registers that depend on the band */
1930 bbp17 = 0x20; bbp96 = 0x48; bbp104 = 0x2c;
1931 bbp35 = 0x50; bbp97 = 0x48; bbp98 = 0x48;
1932 if (IEEE80211_IS_CHAN_5GHZ(c)) {
1933 bbp17 += 0x08; bbp96 += 0x10; bbp104 += 0x0c;
1934 bbp35 += 0x10; bbp97 += 0x10; bbp98 += 0x10;
1936 if ((IEEE80211_IS_CHAN_2GHZ(c) && sc->ext_2ghz_lna) ||
1937 (IEEE80211_IS_CHAN_5GHZ(c) && sc->ext_5ghz_lna)) {
1938 bbp17 += 0x10; bbp96 += 0x10; bbp104 += 0x10;
1941 rt2661_bbp_write(sc, 17, bbp17);
1942 rt2661_bbp_write(sc, 96, bbp96);
1943 rt2661_bbp_write(sc, 104, bbp104);
1945 if ((IEEE80211_IS_CHAN_2GHZ(c) && sc->ext_2ghz_lna) ||
1946 (IEEE80211_IS_CHAN_5GHZ(c) && sc->ext_5ghz_lna)) {
1947 rt2661_bbp_write(sc, 75, 0x80);
1948 rt2661_bbp_write(sc, 86, 0x80);
1949 rt2661_bbp_write(sc, 88, 0x80);
1952 rt2661_bbp_write(sc, 35, bbp35);
1953 rt2661_bbp_write(sc, 97, bbp97);
1954 rt2661_bbp_write(sc, 98, bbp98);
1956 tmp = RAL_READ(sc, RT2661_PHY_CSR0);
1957 tmp &= ~(RT2661_PA_PE_2GHZ | RT2661_PA_PE_5GHZ);
1958 if (IEEE80211_IS_CHAN_2GHZ(c))
1959 tmp |= RT2661_PA_PE_2GHZ;
1961 tmp |= RT2661_PA_PE_5GHZ;
1962 RAL_WRITE(sc, RT2661_PHY_CSR0, tmp);
1966 rt2661_set_chan(struct rt2661_softc *sc, struct ieee80211_channel *c)
1968 struct ifnet *ifp = sc->sc_ifp;
1969 struct ieee80211com *ic = ifp->if_l2com;
1970 const struct rfprog *rfprog;
1971 uint8_t bbp3, bbp94 = RT2661_BBPR94_DEFAULT;
1975 chan = ieee80211_chan2ieee(ic, c);
1976 KASSERT(chan != 0 && chan != IEEE80211_CHAN_ANY, ("chan 0x%x", chan));
1978 /* select the appropriate RF settings based on what EEPROM says */
1979 rfprog = (sc->rfprog == 0) ? rt2661_rf5225_1 : rt2661_rf5225_2;
1981 /* find the settings for this channel (we know it exists) */
1982 for (i = 0; rfprog[i].chan != chan; i++);
1984 power = sc->txpow[i];
1988 } else if (power > 31) {
1989 bbp94 += power - 31;
1994 * If we are switching from the 2GHz band to the 5GHz band or
1995 * vice-versa, BBP registers need to be reprogrammed.
1997 if (c->ic_flags != sc->sc_curchan->ic_flags) {
1998 rt2661_select_band(sc, c);
1999 rt2661_select_antenna(sc);
2003 rt2661_rf_write(sc, RAL_RF1, rfprog[i].r1);
2004 rt2661_rf_write(sc, RAL_RF2, rfprog[i].r2);
2005 rt2661_rf_write(sc, RAL_RF3, rfprog[i].r3 | power << 7);
2006 rt2661_rf_write(sc, RAL_RF4, rfprog[i].r4 | sc->rffreq << 10);
2010 rt2661_rf_write(sc, RAL_RF1, rfprog[i].r1);
2011 rt2661_rf_write(sc, RAL_RF2, rfprog[i].r2);
2012 rt2661_rf_write(sc, RAL_RF3, rfprog[i].r3 | power << 7 | 1);
2013 rt2661_rf_write(sc, RAL_RF4, rfprog[i].r4 | sc->rffreq << 10);
2017 rt2661_rf_write(sc, RAL_RF1, rfprog[i].r1);
2018 rt2661_rf_write(sc, RAL_RF2, rfprog[i].r2);
2019 rt2661_rf_write(sc, RAL_RF3, rfprog[i].r3 | power << 7);
2020 rt2661_rf_write(sc, RAL_RF4, rfprog[i].r4 | sc->rffreq << 10);
2022 /* enable smart mode for MIMO-capable RFs */
2023 bbp3 = rt2661_bbp_read(sc, 3);
2025 bbp3 &= ~RT2661_SMART_MODE;
2026 if (sc->rf_rev == RT2661_RF_5325 || sc->rf_rev == RT2661_RF_2529)
2027 bbp3 |= RT2661_SMART_MODE;
2029 rt2661_bbp_write(sc, 3, bbp3);
2031 if (bbp94 != RT2661_BBPR94_DEFAULT)
2032 rt2661_bbp_write(sc, 94, bbp94);
2034 /* 5GHz radio needs a 1ms delay here */
2035 if (IEEE80211_IS_CHAN_5GHZ(c))
2040 rt2661_set_bssid(struct rt2661_softc *sc, const uint8_t *bssid)
2044 tmp = bssid[0] | bssid[1] << 8 | bssid[2] << 16 | bssid[3] << 24;
2045 RAL_WRITE(sc, RT2661_MAC_CSR4, tmp);
2047 tmp = bssid[4] | bssid[5] << 8 | RT2661_ONE_BSSID << 16;
2048 RAL_WRITE(sc, RT2661_MAC_CSR5, tmp);
2052 rt2661_set_macaddr(struct rt2661_softc *sc, const uint8_t *addr)
2056 tmp = addr[0] | addr[1] << 8 | addr[2] << 16 | addr[3] << 24;
2057 RAL_WRITE(sc, RT2661_MAC_CSR2, tmp);
2059 tmp = addr[4] | addr[5] << 8;
2060 RAL_WRITE(sc, RT2661_MAC_CSR3, tmp);
2064 rt2661_update_promisc(struct ieee80211com *ic)
2066 struct rt2661_softc *sc = ic->ic_softc;
2069 tmp = RAL_READ(sc, RT2661_TXRX_CSR0);
2071 tmp &= ~RT2661_DROP_NOT_TO_ME;
2072 if (!(ic->ic_ifp->if_flags & IFF_PROMISC))
2073 tmp |= RT2661_DROP_NOT_TO_ME;
2075 RAL_WRITE(sc, RT2661_TXRX_CSR0, tmp);
2077 DPRINTF(sc, "%s promiscuous mode\n",
2078 (ic->ic_ifp->if_flags & IFF_PROMISC) ? "entering" : "leaving");
2082 * Update QoS (802.11e) settings for each h/w Tx ring.
2085 rt2661_wme_update(struct ieee80211com *ic)
2087 struct rt2661_softc *sc = ic->ic_ifp->if_softc;
2088 const struct wmeParams *wmep;
2090 wmep = ic->ic_wme.wme_chanParams.cap_wmeParams;
2092 /* XXX: not sure about shifts. */
2093 /* XXX: the reference driver plays with AC_VI settings too. */
2096 RAL_WRITE(sc, RT2661_AC_TXOP_CSR0,
2097 wmep[WME_AC_BE].wmep_txopLimit << 16 |
2098 wmep[WME_AC_BK].wmep_txopLimit);
2099 RAL_WRITE(sc, RT2661_AC_TXOP_CSR1,
2100 wmep[WME_AC_VI].wmep_txopLimit << 16 |
2101 wmep[WME_AC_VO].wmep_txopLimit);
2104 RAL_WRITE(sc, RT2661_CWMIN_CSR,
2105 wmep[WME_AC_BE].wmep_logcwmin << 12 |
2106 wmep[WME_AC_BK].wmep_logcwmin << 8 |
2107 wmep[WME_AC_VI].wmep_logcwmin << 4 |
2108 wmep[WME_AC_VO].wmep_logcwmin);
2111 RAL_WRITE(sc, RT2661_CWMAX_CSR,
2112 wmep[WME_AC_BE].wmep_logcwmax << 12 |
2113 wmep[WME_AC_BK].wmep_logcwmax << 8 |
2114 wmep[WME_AC_VI].wmep_logcwmax << 4 |
2115 wmep[WME_AC_VO].wmep_logcwmax);
2118 RAL_WRITE(sc, RT2661_AIFSN_CSR,
2119 wmep[WME_AC_BE].wmep_aifsn << 12 |
2120 wmep[WME_AC_BK].wmep_aifsn << 8 |
2121 wmep[WME_AC_VI].wmep_aifsn << 4 |
2122 wmep[WME_AC_VO].wmep_aifsn);
2128 rt2661_update_slot(struct ieee80211com *ic)
2130 struct rt2661_softc *sc = ic->ic_softc;
2134 slottime = (ic->ic_flags & IEEE80211_F_SHSLOT) ? 9 : 20;
2136 tmp = RAL_READ(sc, RT2661_MAC_CSR9);
2137 tmp = (tmp & ~0xff) | slottime;
2138 RAL_WRITE(sc, RT2661_MAC_CSR9, tmp);
2142 rt2661_get_rf(int rev)
2145 case RT2661_RF_5225: return "RT5225";
2146 case RT2661_RF_5325: return "RT5325 (MIMO XR)";
2147 case RT2661_RF_2527: return "RT2527";
2148 case RT2661_RF_2529: return "RT2529 (MIMO XR)";
2149 default: return "unknown";
2154 rt2661_read_eeprom(struct rt2661_softc *sc, uint8_t macaddr[IEEE80211_ADDR_LEN])
2159 /* read MAC address */
2160 val = rt2661_eeprom_read(sc, RT2661_EEPROM_MAC01);
2161 macaddr[0] = val & 0xff;
2162 macaddr[1] = val >> 8;
2164 val = rt2661_eeprom_read(sc, RT2661_EEPROM_MAC23);
2165 macaddr[2] = val & 0xff;
2166 macaddr[3] = val >> 8;
2168 val = rt2661_eeprom_read(sc, RT2661_EEPROM_MAC45);
2169 macaddr[4] = val & 0xff;
2170 macaddr[5] = val >> 8;
2172 val = rt2661_eeprom_read(sc, RT2661_EEPROM_ANTENNA);
2173 /* XXX: test if different from 0xffff? */
2174 sc->rf_rev = (val >> 11) & 0x1f;
2175 sc->hw_radio = (val >> 10) & 0x1;
2176 sc->rx_ant = (val >> 4) & 0x3;
2177 sc->tx_ant = (val >> 2) & 0x3;
2178 sc->nb_ant = val & 0x3;
2180 DPRINTF(sc, "RF revision=%d\n", sc->rf_rev);
2182 val = rt2661_eeprom_read(sc, RT2661_EEPROM_CONFIG2);
2183 sc->ext_5ghz_lna = (val >> 6) & 0x1;
2184 sc->ext_2ghz_lna = (val >> 4) & 0x1;
2186 DPRINTF(sc, "External 2GHz LNA=%d\nExternal 5GHz LNA=%d\n",
2187 sc->ext_2ghz_lna, sc->ext_5ghz_lna);
2189 val = rt2661_eeprom_read(sc, RT2661_EEPROM_RSSI_2GHZ_OFFSET);
2190 if ((val & 0xff) != 0xff)
2191 sc->rssi_2ghz_corr = (int8_t)(val & 0xff); /* signed */
2193 /* Only [-10, 10] is valid */
2194 if (sc->rssi_2ghz_corr < -10 || sc->rssi_2ghz_corr > 10)
2195 sc->rssi_2ghz_corr = 0;
2197 val = rt2661_eeprom_read(sc, RT2661_EEPROM_RSSI_5GHZ_OFFSET);
2198 if ((val & 0xff) != 0xff)
2199 sc->rssi_5ghz_corr = (int8_t)(val & 0xff); /* signed */
2201 /* Only [-10, 10] is valid */
2202 if (sc->rssi_5ghz_corr < -10 || sc->rssi_5ghz_corr > 10)
2203 sc->rssi_5ghz_corr = 0;
2205 /* adjust RSSI correction for external low-noise amplifier */
2206 if (sc->ext_2ghz_lna)
2207 sc->rssi_2ghz_corr -= 14;
2208 if (sc->ext_5ghz_lna)
2209 sc->rssi_5ghz_corr -= 14;
2211 DPRINTF(sc, "RSSI 2GHz corr=%d\nRSSI 5GHz corr=%d\n",
2212 sc->rssi_2ghz_corr, sc->rssi_5ghz_corr);
2214 val = rt2661_eeprom_read(sc, RT2661_EEPROM_FREQ_OFFSET);
2215 if ((val >> 8) != 0xff)
2216 sc->rfprog = (val >> 8) & 0x3;
2217 if ((val & 0xff) != 0xff)
2218 sc->rffreq = val & 0xff;
2220 DPRINTF(sc, "RF prog=%d\nRF freq=%d\n", sc->rfprog, sc->rffreq);
2222 /* read Tx power for all a/b/g channels */
2223 for (i = 0; i < 19; i++) {
2224 val = rt2661_eeprom_read(sc, RT2661_EEPROM_TXPOWER + i);
2225 sc->txpow[i * 2] = (int8_t)(val >> 8); /* signed */
2226 DPRINTF(sc, "Channel=%d Tx power=%d\n",
2227 rt2661_rf5225_1[i * 2].chan, sc->txpow[i * 2]);
2228 sc->txpow[i * 2 + 1] = (int8_t)(val & 0xff); /* signed */
2229 DPRINTF(sc, "Channel=%d Tx power=%d\n",
2230 rt2661_rf5225_1[i * 2 + 1].chan, sc->txpow[i * 2 + 1]);
2233 /* read vendor-specific BBP values */
2234 for (i = 0; i < 16; i++) {
2235 val = rt2661_eeprom_read(sc, RT2661_EEPROM_BBP_BASE + i);
2236 if (val == 0 || val == 0xffff)
2237 continue; /* skip invalid entries */
2238 sc->bbp_prom[i].reg = val >> 8;
2239 sc->bbp_prom[i].val = val & 0xff;
2240 DPRINTF(sc, "BBP R%d=%02x\n", sc->bbp_prom[i].reg,
2241 sc->bbp_prom[i].val);
2246 rt2661_bbp_init(struct rt2661_softc *sc)
2248 #define N(a) (sizeof (a) / sizeof ((a)[0]))
2252 /* wait for BBP to be ready */
2253 for (ntries = 0; ntries < 100; ntries++) {
2254 val = rt2661_bbp_read(sc, 0);
2255 if (val != 0 && val != 0xff)
2259 if (ntries == 100) {
2260 device_printf(sc->sc_dev, "timeout waiting for BBP\n");
2264 /* initialize BBP registers to default values */
2265 for (i = 0; i < N(rt2661_def_bbp); i++) {
2266 rt2661_bbp_write(sc, rt2661_def_bbp[i].reg,
2267 rt2661_def_bbp[i].val);
2270 /* write vendor-specific BBP values (from EEPROM) */
2271 for (i = 0; i < 16; i++) {
2272 if (sc->bbp_prom[i].reg == 0)
2274 rt2661_bbp_write(sc, sc->bbp_prom[i].reg, sc->bbp_prom[i].val);
2282 rt2661_init_locked(struct rt2661_softc *sc)
2284 #define N(a) (sizeof (a) / sizeof ((a)[0]))
2285 struct ifnet *ifp = sc->sc_ifp;
2286 struct ieee80211com *ic = ifp->if_l2com;
2287 uint32_t tmp, sta[3];
2288 int i, error, ntries;
2290 if ((sc->sc_flags & RAL_FW_LOADED) == 0) {
2291 error = rt2661_load_microcode(sc);
2294 "%s: could not load 8051 microcode, error %d\n",
2298 sc->sc_flags |= RAL_FW_LOADED;
2301 rt2661_stop_locked(sc);
2303 /* initialize Tx rings */
2304 RAL_WRITE(sc, RT2661_AC1_BASE_CSR, sc->txq[1].physaddr);
2305 RAL_WRITE(sc, RT2661_AC0_BASE_CSR, sc->txq[0].physaddr);
2306 RAL_WRITE(sc, RT2661_AC2_BASE_CSR, sc->txq[2].physaddr);
2307 RAL_WRITE(sc, RT2661_AC3_BASE_CSR, sc->txq[3].physaddr);
2309 /* initialize Mgt ring */
2310 RAL_WRITE(sc, RT2661_MGT_BASE_CSR, sc->mgtq.physaddr);
2312 /* initialize Rx ring */
2313 RAL_WRITE(sc, RT2661_RX_BASE_CSR, sc->rxq.physaddr);
2315 /* initialize Tx rings sizes */
2316 RAL_WRITE(sc, RT2661_TX_RING_CSR0,
2317 RT2661_TX_RING_COUNT << 24 |
2318 RT2661_TX_RING_COUNT << 16 |
2319 RT2661_TX_RING_COUNT << 8 |
2320 RT2661_TX_RING_COUNT);
2322 RAL_WRITE(sc, RT2661_TX_RING_CSR1,
2323 RT2661_TX_DESC_WSIZE << 16 |
2324 RT2661_TX_RING_COUNT << 8 | /* XXX: HCCA ring unused */
2325 RT2661_MGT_RING_COUNT);
2327 /* initialize Rx rings */
2328 RAL_WRITE(sc, RT2661_RX_RING_CSR,
2329 RT2661_RX_DESC_BACK << 16 |
2330 RT2661_RX_DESC_WSIZE << 8 |
2331 RT2661_RX_RING_COUNT);
2333 /* XXX: some magic here */
2334 RAL_WRITE(sc, RT2661_TX_DMA_DST_CSR, 0xaa);
2336 /* load base addresses of all 5 Tx rings (4 data + 1 mgt) */
2337 RAL_WRITE(sc, RT2661_LOAD_TX_RING_CSR, 0x1f);
2339 /* load base address of Rx ring */
2340 RAL_WRITE(sc, RT2661_RX_CNTL_CSR, 2);
2342 /* initialize MAC registers to default values */
2343 for (i = 0; i < N(rt2661_def_mac); i++)
2344 RAL_WRITE(sc, rt2661_def_mac[i].reg, rt2661_def_mac[i].val);
2346 rt2661_set_macaddr(sc, IF_LLADDR(ifp));
2348 /* set host ready */
2349 RAL_WRITE(sc, RT2661_MAC_CSR1, 3);
2350 RAL_WRITE(sc, RT2661_MAC_CSR1, 0);
2352 /* wait for BBP/RF to wakeup */
2353 for (ntries = 0; ntries < 1000; ntries++) {
2354 if (RAL_READ(sc, RT2661_MAC_CSR12) & 8)
2358 if (ntries == 1000) {
2359 kprintf("timeout waiting for BBP/RF to wakeup\n");
2360 rt2661_stop_locked(sc);
2364 if (rt2661_bbp_init(sc) != 0) {
2365 rt2661_stop_locked(sc);
2369 /* select default channel */
2370 sc->sc_curchan = ic->ic_curchan;
2371 rt2661_select_band(sc, sc->sc_curchan);
2372 rt2661_select_antenna(sc);
2373 rt2661_set_chan(sc, sc->sc_curchan);
2375 /* update Rx filter */
2376 tmp = RAL_READ(sc, RT2661_TXRX_CSR0) & 0xffff;
2378 tmp |= RT2661_DROP_PHY_ERROR | RT2661_DROP_CRC_ERROR;
2379 if (ic->ic_opmode != IEEE80211_M_MONITOR) {
2380 tmp |= RT2661_DROP_CTL | RT2661_DROP_VER_ERROR |
2382 if (ic->ic_opmode != IEEE80211_M_HOSTAP &&
2383 ic->ic_opmode != IEEE80211_M_MBSS)
2384 tmp |= RT2661_DROP_TODS;
2385 if (!(ifp->if_flags & IFF_PROMISC))
2386 tmp |= RT2661_DROP_NOT_TO_ME;
2389 RAL_WRITE(sc, RT2661_TXRX_CSR0, tmp);
2391 /* clear STA registers */
2392 RAL_READ_REGION_4(sc, RT2661_STA_CSR0, sta, N(sta));
2394 /* initialize ASIC */
2395 RAL_WRITE(sc, RT2661_MAC_CSR1, 4);
2397 /* clear any pending interrupt */
2398 RAL_WRITE(sc, RT2661_INT_SOURCE_CSR, 0xffffffff);
2400 /* enable interrupts */
2401 RAL_WRITE(sc, RT2661_INT_MASK_CSR, 0x0000ff10);
2402 RAL_WRITE(sc, RT2661_MCU_INT_MASK_CSR, 0);
2405 RAL_WRITE(sc, RT2661_RX_CNTL_CSR, 1);
2407 ifq_clr_oactive(&ifp->if_snd);
2408 ifp->if_flags |= IFF_RUNNING;
2410 callout_reset(&sc->watchdog_ch, hz, rt2661_watchdog_callout, sc);
2415 rt2661_init(void *priv)
2417 struct rt2661_softc *sc = priv;
2418 struct ifnet *ifp = sc->sc_ifp;
2419 struct ieee80211com *ic = ifp->if_l2com;
2421 rt2661_init_locked(sc);
2423 if (ifp->if_flags & IFF_RUNNING)
2424 ieee80211_start_all(ic); /* start all vap's */
2428 rt2661_stop_locked(struct rt2661_softc *sc)
2430 struct ifnet *ifp = sc->sc_ifp;
2432 volatile int *flags = &sc->sc_flags;
2434 while (*flags & RAL_INPUT_RUNNING)
2435 zsleep(sc, &wlan_global_serializer, 0, "ralrunning", hz/10);
2437 callout_stop(&sc->watchdog_ch);
2438 sc->sc_tx_timer = 0;
2440 if (ifp->if_flags & IFF_RUNNING) {
2441 ifp->if_flags &= ~IFF_RUNNING;
2442 ifq_clr_oactive(&ifp->if_snd);
2444 /* abort Tx (for all 5 Tx rings) */
2445 RAL_WRITE(sc, RT2661_TX_CNTL_CSR, 0x1f << 16);
2447 /* disable Rx (value remains after reset!) */
2448 tmp = RAL_READ(sc, RT2661_TXRX_CSR0);
2449 RAL_WRITE(sc, RT2661_TXRX_CSR0, tmp | RT2661_DISABLE_RX);
2452 RAL_WRITE(sc, RT2661_MAC_CSR1, 3);
2453 RAL_WRITE(sc, RT2661_MAC_CSR1, 0);
2455 /* disable interrupts */
2456 RAL_WRITE(sc, RT2661_INT_MASK_CSR, 0xffffffff);
2457 RAL_WRITE(sc, RT2661_MCU_INT_MASK_CSR, 0xffffffff);
2459 /* clear any pending interrupt */
2460 RAL_WRITE(sc, RT2661_INT_SOURCE_CSR, 0xffffffff);
2461 RAL_WRITE(sc, RT2661_MCU_INT_SOURCE_CSR, 0xffffffff);
2463 /* reset Tx and Rx rings */
2464 rt2661_reset_tx_ring(sc, &sc->txq[0]);
2465 rt2661_reset_tx_ring(sc, &sc->txq[1]);
2466 rt2661_reset_tx_ring(sc, &sc->txq[2]);
2467 rt2661_reset_tx_ring(sc, &sc->txq[3]);
2468 rt2661_reset_tx_ring(sc, &sc->mgtq);
2469 rt2661_reset_rx_ring(sc, &sc->rxq);
2474 rt2661_stop(void *priv)
2476 struct rt2661_softc *sc = priv;
2478 rt2661_stop_locked(sc);
2482 rt2661_load_microcode(struct rt2661_softc *sc)
2484 struct ifnet *ifp = sc->sc_ifp;
2485 const struct firmware *fp;
2486 const char *imagename;
2489 switch (sc->sc_id) {
2490 case 0x0301: imagename = "rt2561sfw"; break;
2491 case 0x0302: imagename = "rt2561fw"; break;
2492 case 0x0401: imagename = "rt2661fw"; break;
2494 if_printf(ifp, "%s: unexpected pci device id 0x%x, "
2495 "don't know how to retrieve firmware\n",
2496 __func__, sc->sc_id);
2500 wlan_assert_serialized();
2501 wlan_serialize_exit();
2502 fp = firmware_get(imagename);
2503 wlan_serialize_enter();
2506 if_printf(ifp, "%s: unable to retrieve firmware image %s\n",
2507 __func__, imagename);
2512 * Load 8051 microcode into NIC.
2515 RAL_WRITE(sc, RT2661_MCU_CNTL_CSR, RT2661_MCU_RESET);
2517 /* cancel any pending Host to MCU command */
2518 RAL_WRITE(sc, RT2661_H2M_MAILBOX_CSR, 0);
2519 RAL_WRITE(sc, RT2661_M2H_CMD_DONE_CSR, 0xffffffff);
2520 RAL_WRITE(sc, RT2661_HOST_CMD_CSR, 0);
2522 /* write 8051's microcode */
2523 RAL_WRITE(sc, RT2661_MCU_CNTL_CSR, RT2661_MCU_RESET | RT2661_MCU_SEL);
2524 RAL_WRITE_REGION_1(sc, RT2661_MCU_CODE_BASE, fp->data, fp->datasize);
2525 RAL_WRITE(sc, RT2661_MCU_CNTL_CSR, RT2661_MCU_RESET);
2527 /* kick 8051's ass */
2528 RAL_WRITE(sc, RT2661_MCU_CNTL_CSR, 0);
2530 /* wait for 8051 to initialize */
2531 for (ntries = 0; ntries < 500; ntries++) {
2532 if (RAL_READ(sc, RT2661_MCU_CNTL_CSR) & RT2661_MCU_READY)
2536 if (ntries == 500) {
2537 if_printf(ifp, "%s: timeout waiting for MCU to initialize\n",
2543 firmware_put(fp, FIRMWARE_UNLOAD);
2549 * Dynamically tune Rx sensitivity (BBP register 17) based on average RSSI and
2550 * false CCA count. This function is called periodically (every seconds) when
2551 * in the RUN state. Values taken from the reference driver.
2554 rt2661_rx_tune(struct rt2661_softc *sc)
2561 * Tuning range depends on operating band and on the presence of an
2562 * external low-noise amplifier.
2565 if (IEEE80211_IS_CHAN_5GHZ(sc->sc_curchan))
2567 if ((IEEE80211_IS_CHAN_2GHZ(sc->sc_curchan) && sc->ext_2ghz_lna) ||
2568 (IEEE80211_IS_CHAN_5GHZ(sc->sc_curchan) && sc->ext_5ghz_lna))
2572 /* retrieve false CCA count since last call (clear on read) */
2573 cca = RAL_READ(sc, RT2661_STA_CSR1) & 0xffff;
2577 } else if (dbm >= -58) {
2579 } else if (dbm >= -66) {
2581 } else if (dbm >= -74) {
2584 /* RSSI < -74dBm, tune using false CCA count */
2586 bbp17 = sc->bbp17; /* current value */
2588 hi -= 2 * (-74 - dbm);
2595 } else if (cca > 512) {
2598 } else if (cca < 100) {
2604 if (bbp17 != sc->bbp17) {
2605 rt2661_bbp_write(sc, 17, bbp17);
2611 * Enter/Leave radar detection mode.
2612 * This is for 802.11h additional regulatory domains.
2615 rt2661_radar_start(struct rt2661_softc *sc)
2620 tmp = RAL_READ(sc, RT2661_TXRX_CSR0);
2621 RAL_WRITE(sc, RT2661_TXRX_CSR0, tmp | RT2661_DISABLE_RX);
2623 rt2661_bbp_write(sc, 82, 0x20);
2624 rt2661_bbp_write(sc, 83, 0x00);
2625 rt2661_bbp_write(sc, 84, 0x40);
2627 /* save current BBP registers values */
2628 sc->bbp18 = rt2661_bbp_read(sc, 18);
2629 sc->bbp21 = rt2661_bbp_read(sc, 21);
2630 sc->bbp22 = rt2661_bbp_read(sc, 22);
2631 sc->bbp16 = rt2661_bbp_read(sc, 16);
2632 sc->bbp17 = rt2661_bbp_read(sc, 17);
2633 sc->bbp64 = rt2661_bbp_read(sc, 64);
2635 rt2661_bbp_write(sc, 18, 0xff);
2636 rt2661_bbp_write(sc, 21, 0x3f);
2637 rt2661_bbp_write(sc, 22, 0x3f);
2638 rt2661_bbp_write(sc, 16, 0xbd);
2639 rt2661_bbp_write(sc, 17, sc->ext_5ghz_lna ? 0x44 : 0x34);
2640 rt2661_bbp_write(sc, 64, 0x21);
2642 /* restore Rx filter */
2643 RAL_WRITE(sc, RT2661_TXRX_CSR0, tmp);
2647 rt2661_radar_stop(struct rt2661_softc *sc)
2651 /* read radar detection result */
2652 bbp66 = rt2661_bbp_read(sc, 66);
2654 /* restore BBP registers values */
2655 rt2661_bbp_write(sc, 16, sc->bbp16);
2656 rt2661_bbp_write(sc, 17, sc->bbp17);
2657 rt2661_bbp_write(sc, 18, sc->bbp18);
2658 rt2661_bbp_write(sc, 21, sc->bbp21);
2659 rt2661_bbp_write(sc, 22, sc->bbp22);
2660 rt2661_bbp_write(sc, 64, sc->bbp64);
2667 rt2661_prepare_beacon(struct rt2661_softc *sc, struct ieee80211vap *vap)
2669 struct ieee80211com *ic = vap->iv_ic;
2670 struct ieee80211_beacon_offsets bo;
2671 struct rt2661_tx_desc desc;
2675 m0 = ieee80211_beacon_alloc(vap->iv_bss, &bo);
2677 device_printf(sc->sc_dev, "could not allocate beacon frame\n");
2681 /* send beacons at the lowest available rate */
2682 rate = IEEE80211_IS_CHAN_5GHZ(ic->ic_bsschan) ? 12 : 2;
2684 rt2661_setup_tx_desc(sc, &desc, RT2661_TX_TIMESTAMP, RT2661_TX_HWSEQ,
2685 m0->m_pkthdr.len, rate, NULL, 0, RT2661_QID_MGT);
2687 /* copy the first 24 bytes of Tx descriptor into NIC memory */
2688 RAL_WRITE_REGION_1(sc, RT2661_HW_BEACON_BASE0, (uint8_t *)&desc, 24);
2690 /* copy beacon header and payload into NIC memory */
2691 RAL_WRITE_REGION_1(sc, RT2661_HW_BEACON_BASE0 + 24,
2692 mtod(m0, uint8_t *), m0->m_pkthdr.len);
2700 * Enable TSF synchronization and tell h/w to start sending beacons for IBSS
2701 * and HostAP operating modes.
2704 rt2661_enable_tsf_sync(struct rt2661_softc *sc)
2706 struct ifnet *ifp = sc->sc_ifp;
2707 struct ieee80211com *ic = ifp->if_l2com;
2708 struct ieee80211vap *vap = TAILQ_FIRST(&ic->ic_vaps);
2711 if (vap->iv_opmode != IEEE80211_M_STA) {
2713 * Change default 16ms TBTT adjustment to 8ms.
2714 * Must be done before enabling beacon generation.
2716 RAL_WRITE(sc, RT2661_TXRX_CSR10, 1 << 12 | 8);
2719 tmp = RAL_READ(sc, RT2661_TXRX_CSR9) & 0xff000000;
2721 /* set beacon interval (in 1/16ms unit) */
2722 tmp |= vap->iv_bss->ni_intval * 16;
2724 tmp |= RT2661_TSF_TICKING | RT2661_ENABLE_TBTT;
2725 if (vap->iv_opmode == IEEE80211_M_STA)
2726 tmp |= RT2661_TSF_MODE(1);
2728 tmp |= RT2661_TSF_MODE(2) | RT2661_GENERATE_BEACON;
2730 RAL_WRITE(sc, RT2661_TXRX_CSR9, tmp);
2734 rt2661_enable_tsf(struct rt2661_softc *sc)
2736 RAL_WRITE(sc, RT2661_TXRX_CSR9,
2737 (RAL_READ(sc, RT2661_TXRX_CSR9) & 0xff000000)
2738 | RT2661_TSF_TICKING | RT2661_TSF_MODE(2));
2742 * Retrieve the "Received Signal Strength Indicator" from the raw values
2743 * contained in Rx descriptors. The computation depends on which band the
2744 * frame was received. Correction values taken from the reference driver.
2747 rt2661_get_rssi(struct rt2661_softc *sc, uint8_t raw)
2751 lna = (raw >> 5) & 0x3;
2756 * No mapping available.
2758 * NB: Since RSSI is relative to noise floor, -1 is
2759 * adequate for caller to know error happened.
2764 rssi = (2 * agc) - RT2661_NOISE_FLOOR;
2766 if (IEEE80211_IS_CHAN_2GHZ(sc->sc_curchan)) {
2767 rssi += sc->rssi_2ghz_corr;
2776 rssi += sc->rssi_5ghz_corr;
2789 rt2661_scan_start(struct ieee80211com *ic)
2791 struct ifnet *ifp = ic->ic_ifp;
2792 struct rt2661_softc *sc = ifp->if_softc;
2795 /* abort TSF synchronization */
2796 tmp = RAL_READ(sc, RT2661_TXRX_CSR9);
2797 RAL_WRITE(sc, RT2661_TXRX_CSR9, tmp & ~0xffffff);
2798 rt2661_set_bssid(sc, ifp->if_broadcastaddr);
2802 rt2661_scan_end(struct ieee80211com *ic)
2804 struct ifnet *ifp = ic->ic_ifp;
2805 struct rt2661_softc *sc = ifp->if_softc;
2806 struct ieee80211vap *vap = TAILQ_FIRST(&ic->ic_vaps);
2808 rt2661_enable_tsf_sync(sc);
2809 /* XXX keep local copy */
2810 rt2661_set_bssid(sc, vap->iv_bss->ni_bssid);
2814 rt2661_set_channel(struct ieee80211com *ic)
2816 struct ifnet *ifp = ic->ic_ifp;
2817 struct rt2661_softc *sc = ifp->if_softc;
2819 rt2661_set_chan(sc, ic->ic_curchan);