2 * Copyright (c) 1995 HD Associates, Inc.
7 * Pepperell, MA 01463-0276
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11 * modification, are permitted provided that the following conditions
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20 * This product includes software developed by HD Associates, Inc.
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41 * $FreeBSD: src/sys/i386/isa/labpc.c,v 1.35 1999/09/25 18:24:08 phk Exp $
42 * $DragonFly: src/sys/dev/misc/labpc/labpc.c,v 1.15 2006/02/17 19:18:05 dillon Exp $
46 #include "use_labpc.h"
47 #include "opt_debug_outb.h"
48 #include <sys/param.h>
50 #include <sys/systm.h>
52 #include <sys/kernel.h>
53 #include <sys/malloc.h>
55 #define bio_actf bio_act.tqe_next
56 #include <sys/dataacq.h>
58 #include <sys/thread2.h>
61 #include <machine/clock.h>
64 #include <bus/isa/i386/isa_device.h>
71 #define LABPC_MIN_TMO (hz)
74 #ifndef LABPC_DEFAULT_HERTZ
75 #define LABPC_DEFAULT_HERTZ 500
81 * S: SCAN bit for scan enable.
82 * I: INTERVAL for interval support
83 * D: 1: Digital I/O, 0: Analog I/O
86 * input: channel must be 0 to 7.
87 * output: channel must be 0 to 2
90 * 2: Alternate channel 0 then 1
93 * input: Channel must be 0 to 2.
94 * output: Channel must be 0 to 2.
100 #define UNIT(dev) (((minor(dev) & 0xB0) >> 6) & 0x3)
102 #define SCAN(dev) ((minor(dev) & 0x20) >> 5)
103 #define INTERVAL(dev) ((minor(dev) & 0x10) >> 4)
104 #define DIGITAL(dev) ((minor(dev) & 0x08) >> 3)
109 #define CHAN(dev) (minor(dev) & 0x7)
111 /* History: Derived from "dt2811.c" March 1995
117 #define DROPPED_INPUT 0x100
121 #define BUSY 0x00000001
127 struct bio start_queue; /* Start queue */
128 struct bio *last; /* End of start queue */
132 long tmo; /* Timeout in Hertz */
133 long min_tmo; /* Timeout in Hertz */
138 dev_t dev; /* Copy of device */
140 void (*starter)(struct ctlr *ctlr, long count);
141 void (*stop)(struct ctlr *ctlr);
142 void (*intr)(struct ctlr *ctlr);
144 /* Digital I/O support. Copy of Data Control Register for 8255:
146 u_char dcr_val, dcr_is;
149 * Handle for canceling our timeout.
153 /* Device configuration structure:
158 /* loutb is a slow outb for debugging. The overrun test may fail
159 * with this for some slower processors.
162 loutb(int port, u_char val)
168 #define loutb(port, val) outb(port, val)
171 static struct ctlr **labpcs; /* XXX: Should be dynamic */
173 /* CR_EXPR: A macro that sets the shadow register in addition to
174 * sending out the data.
176 #define CR_EXPR(LABPC, CR, EXPR) do { \
177 (LABPC)->cr_image[CR - 1] EXPR ; \
178 loutb(((LABPC)->base + ( (CR == 4) ? (0x0F) : (CR - 1))), ((LABPC)->cr_image[(CR - 1)])); \
181 #define CR_CLR(LABPC, CR) CR_EXPR(LABPC, CR, &=0)
182 #define CR_REFRESH(LABPC, CR) CR_EXPR(LABPC, CR, &=0xff)
183 #define CR_SET(LABPC, CR, EXPR) CR_EXPR(LABPC, CR, = EXPR)
185 /* Configuration and Status Register Group.
187 #define CR1(LABPC) ((LABPC)->base + 0x00) /* Page 4-5 */
189 #define GAINMASK 0x70
190 #define GAIN(LABPC, SEL) do { \
191 (LABPC)->cr_image[1 - 1] &= ~GAINMASK; \
192 (LABPC)->cr_image[1 - 1] |= (SEL << 4); \
193 loutb((LABPC)->base + (1 - 1), (LABPC)->cr_image[(1 - 1)]); \
198 #define MA(LABPC, SEL) do { \
199 (LABPC)->cr_image[1 - 1] &= ~MAMASK; \
200 (LABPC)->cr_image[1 - 1] |= SEL; \
201 loutb((LABPC)->base + (1 - 1), (LABPC)->cr_image[(1 - 1)]); \
204 #define STATUS(LABPC) ((LABPC)->base + 0x00) /* Page 4-7 */
205 #define LABPCPLUS 0x80
206 #define EXTGATA0 0x40
210 #define OVERFLOW 0x04
214 #define CR2(LABPC) ((LABPC)->base + 0x01) /* Page 4-9 */
223 #define SWTRIGGERRED(LABPC) ((LABPC->cr_image[1]) & SWTRIG)
225 #define CR3(LABPC) ((LABPC)->base + 0x02) /* Page 4-11 */
226 #define FIFOINTEN 0x20
227 #define ERRINTEN 0x10
228 #define CNTINTEN 0x08
230 #define DIOINTEN 0x02
233 #define ALLINTEN 0x3E
234 #define FIFOINTENABLED(LABPC) ((LABPC->cr_image[2]) & FIFOINTEN)
236 #define CR4(LABPC) ((LABPC)->base + 0x0F) /* Page 4-13 */
243 /* Analog Input Register Group
245 #define ADFIFO(LABPC) ((LABPC)->base + 0x0A) /* Page 4-16 */
246 #define ADCLEAR(LABPC) ((LABPC)->base + 0x08) /* Page 4-18 */
247 #define ADSTART(LABPC) ((LABPC)->base + 0x03) /* Page 4-19 */
248 #define DMATCICLR(LABPC) ((LABPC)->base + 0x0A) /* Page 4-20 */
250 /* Analog Output Register Group
252 #define DAC0L(LABPC) ((LABPC)->base + 0x04) /* Page 4-22 */
253 #define DAC0H(LABPC) ((LABPC)->base + 0x05) /* Page 4-22 */
254 #define DAC1L(LABPC) ((LABPC)->base + 0x06) /* Page 4-22 */
255 #define DAC1H(LABPC) ((LABPC)->base + 0x07) /* Page 4-22 */
259 #define A0DATA(LABPC) ((LABPC)->base + 0x14)
260 #define A1DATA(LABPC) ((LABPC)->base + 0x15)
261 #define A2DATA(LABPC) ((LABPC)->base + 0x16)
262 #define AMODE(LABPC) ((LABPC)->base + 0x17)
264 #define TICR(LABPC) ((LABPC)->base + 0x0c)
266 #define B0DATA(LABPC) ((LABPC)->base + 0x18)
267 #define B1DATA(LABPC) ((LABPC)->base + 0x19)
268 #define B2DATA(LABPC) ((LABPC)->base + 0x1A)
269 #define BMODE(LABPC) ((LABPC)->base + 0x1B)
274 #define PORTX(LABPC, X) ((LABPC)->base + 0x10 + X)
276 #define PORTA(LABPC) PORTX(LABPC, 0)
277 #define PORTB(LABPC) PORTX(LABPC, 1)
278 #define PORTC(LABPC) PORTX(LABPC, 2)
280 #define DCR(LABPC) ((LABPC)->base + 0x13)
282 static int labpcattach(struct isa_device *dev);
283 static int labpcprobe(struct isa_device *dev);
284 struct isa_driver labpcdriver =
285 { labpcprobe, labpcattach, "labpc", 0 };
287 static d_open_t labpcopen;
288 static d_close_t labpcclose;
289 static d_ioctl_t labpcioctl;
290 static d_strategy_t labpcstrategy;
292 #define CDEV_MAJOR 66
293 static struct cdevsw labpc_cdevsw = {
295 /* maj */ CDEV_MAJOR,
300 /* open */ labpcopen,
301 /* close */ labpcclose,
303 /* write */ physwrite,
304 /* ioctl */ labpcioctl,
307 /* strategy */ labpcstrategy,
312 static void labpcintr(void *);
313 static void start(struct ctlr *ctlr);
316 bp_done(struct bio *bio, int err)
318 struct buf *bp = bio->bio_buf;
320 if (err || bp->b_resid)
321 bp->b_flags |= B_ERROR;
325 static void tmo_stop(void *p);
328 done_and_start_next(struct ctlr *ctlr, struct bio *bio, int err)
330 struct buf *bp = bio->bio_buf;
332 bp->b_resid = ctlr->data_end - ctlr->data;
336 ctlr->start_queue.bio_actf = bio->bio_actf;
339 callout_stop(&ctlr->ch);
345 ad_clear(struct ctlr *ctlr)
348 loutb(ADCLEAR(ctlr), 0);
349 for (i = 0; i < 10000 && (inb(STATUS(ctlr)) & GATA0); i++)
351 (void)inb(ADFIFO(ctlr));
352 (void)inb(ADFIFO(ctlr));
355 /* reset: Reset the board following the sequence on page 5-1
358 reset(struct ctlr *ctlr)
361 CR_CLR(ctlr, 3); /* Turn off interrupts first */
368 loutb(AMODE(ctlr), 0x34);
369 loutb(A0DATA(ctlr),0x0A);
370 loutb(A0DATA(ctlr),0x00);
372 loutb(DMATCICLR(ctlr), 0x00);
373 loutb(TICR(ctlr), 0x00);
377 loutb(DAC0L(ctlr), 0);
378 loutb(DAC0H(ctlr), 0);
379 loutb(DAC1L(ctlr), 0);
380 loutb(DAC1H(ctlr), 0);
385 /* overrun: slam the start convert register and OVERRUN should get set:
388 overrun(struct ctlr *ctlr)
392 u_char status = inb(STATUS(ctlr));
393 for (i = 0; ((status & OVERRUN) == 0) && i < 100; i++)
395 loutb(ADSTART(ctlr), 1);
396 status = inb(STATUS(ctlr));
405 if (NLABPC > MAX_UNITS)
408 labpcs = malloc(NLABPC * sizeof(struct ctlr *), M_DEVBUF,
411 * XXX this is really odd code, adding the device only if
412 * the allocation fails? it could be broken.
421 labpcprobe(struct isa_device *dev)
424 struct ctlr scratch, *ctlr, *l;
429 if (labpcinit() == 0)
431 printf("labpcprobe: init failed\n");
438 printf("Too many LAB-PCs. Reconfigure O/S.\n");
441 ctlr = &scratch; /* Need somebody with the right base for the macros */
442 ctlr->base = dev->id_iobase;
444 /* XXX: There really isn't a perfect way to probe this board.
445 * Here is my best attempt:
449 /* After reset none of these bits should be set:
451 status = inb(STATUS(ctlr));
452 if (status & (GATA0 | OVERFLOW | DAVAIL | OVERRUN))
455 /* Now try to overrun the board FIFO and get the overrun bit set:
457 status = overrun(ctlr);
459 if ((status & OVERRUN) == 0) /* No overrun bit set? */
462 /* Assume we have a board.
466 l = malloc(sizeof(struct ctlr), M_DEVBUF, M_WAITOK | M_ZERO);
467 l->base = ctlr->base;
470 dev->id_unit = l->unit;
476 /* attach: Set things in a normal state.
479 labpcattach(struct isa_device *dev)
481 struct ctlr *ctlr = labpcs[dev->id_unit];
483 dev->id_intr = (inthand2_t *)labpcintr;
484 callout_init(&ctlr->ch);
485 ctlr->sample_us = (1000000.0 / (double)LABPC_DEFAULT_HERTZ) + .50;
488 ctlr->min_tmo = LABPC_MIN_TMO;
490 ctlr->dcr_val = 0x80;
492 loutb(DCR(ctlr), ctlr->dcr_val);
494 cdevsw_add(&labpc_cdevsw, -1, dev->id_unit);
495 make_dev(&labpc_cdevsw, dev->id_unit, 0, 0, 0600,
496 "labpc%d", dev->id_unit);
502 static void null_intr (struct ctlr *ctlr) { }
503 static void null_start(struct ctlr *ctlr, long count) { }
504 static void null_stop (struct ctlr *ctlr) { }
507 trigger(struct ctlr *ctlr)
509 CR_EXPR(ctlr, 2, |= SWTRIG);
513 ad_start(struct ctlr *ctlr, long count)
515 if (!SWTRIGGERRED(ctlr)) {
516 int chan = CHAN(ctlr->dev);
517 CR_EXPR(ctlr, 1, &= ~SCANEN);
518 CR_EXPR(ctlr, 2, &= ~TBSEL);
521 GAIN(ctlr, ctlr->gains[chan]);
524 CR_EXPR(ctlr, 1, |= SCANEN);
526 loutb(AMODE(ctlr), 0x34);
527 loutb(A0DATA(ctlr), (u_char)((ctlr->sample_us & 0xff)));
528 loutb(A0DATA(ctlr), (u_char)((ctlr->sample_us >> 8)&0xff));
529 loutb(AMODE(ctlr), 0x70);
535 ctlr->tmo = ((count + 16) * (long)ctlr->sample_us * hz) / 1000000 +
540 ad_interval_start(struct ctlr *ctlr, long count)
542 int chan = CHAN(ctlr->dev);
543 int n_frames = count / (chan + 1);
545 if (!SWTRIGGERRED(ctlr)) {
546 CR_EXPR(ctlr, 1, &= ~SCANEN);
547 CR_EXPR(ctlr, 2, &= ~TBSEL);
550 GAIN(ctlr, ctlr->gains[chan]);
552 /* XXX: Is it really possible that you clear INTSCAN as
553 * the documentation says? That seems pretty unlikely.
555 CR_EXPR(ctlr, 4, &= ~INTSCAN); /* XXX: Is this possible? */
557 /* Program the sample interval counter to run as fast as
560 loutb(AMODE(ctlr), 0x34);
561 loutb(A0DATA(ctlr), (u_char)(0x02));
562 loutb(A0DATA(ctlr), (u_char)(0x00));
563 loutb(AMODE(ctlr), 0x70);
565 /* Program the interval scanning counter to run at the sample
568 loutb(BMODE(ctlr), 0x74);
569 loutb(B1DATA(ctlr), (u_char)((ctlr->sample_us & 0xff)));
570 loutb(B1DATA(ctlr), (u_char)((ctlr->sample_us >> 8)&0xff));
571 CR_EXPR(ctlr, 1, |= SCANEN);
577 /* Each frame time takes two microseconds per channel times
578 * the number of channels being sampled plus the sample period.
580 ctlr->tmo = ((n_frames + 16) *
581 ((long)ctlr->sample_us + (chan + 1 ) * 2 ) * hz) / 1000000 +
586 all_stop(struct ctlr *ctlr)
594 struct ctlr *ctlr = (struct ctlr *)p;
601 printf("labpc?: Null ctlr struct?\n");
606 printf("labpc%d: timeout", ctlr->unit);
610 bio = ctlr->start_queue.bio_actf;
613 printf(", Null bp.\n");
620 done_and_start_next(ctlr, bio, ETIMEDOUT);
625 static void ad_intr(struct ctlr *ctlr)
629 if (ctlr->cr_image[2] == 0)
631 if (ctlr->cleared_intr)
633 ctlr->cleared_intr = 0;
637 printf("ad_intr (should not happen) interrupt with interrupts off\n");
638 printf("status %x, cr3 %x\n", inb(STATUS(ctlr)), ctlr->cr_image[2]);
642 while ( (status = (inb(STATUS(ctlr)) & (DAVAIL|OVERRUN|OVERFLOW)) ) )
644 if ((status & (OVERRUN|OVERFLOW)))
646 struct bio *bio = ctlr->start_queue.bio_actf;
648 printf("ad_intr: error: bp %p, data %p, status %x",
649 bio->bio_buf, ctlr->data, status);
651 if (status & OVERRUN)
652 printf(" Conversion overrun (multiple A-D trigger)");
654 if (status & OVERFLOW)
655 printf(" FIFO overflow");
660 done_and_start_next(ctlr, bio, EIO);
663 printf("ad_intr: (should not happen) error between records\n");
664 ctlr->err = status; /* Set overrun condition */
668 else /* FIFO interrupt */
670 struct bio *bio = ctlr->start_queue.bio_actf;
673 *ctlr->data++ = inb(ADFIFO(ctlr));
674 if (ctlr->data == ctlr->data_end) {
675 /* Normal completion */
676 done_and_start_next(ctlr, bio, 0);
680 /* Interrupt with no where to put the data. */
681 printf("ad_intr: (should not happen) dropped input.\n");
682 (void)inb(ADFIFO(ctlr));
684 printf("bp %p, status %x, cr3 %x\n",
685 bio->bio_buf, status, ctlr->cr_image[2]);
686 ctlr->err = DROPPED_INPUT;
697 struct ctlr *ctlr = labpcs[unit];
701 /* lockout_multiple_opens: Return whether or not we can open again, or
702 * if the new mode is inconsistent with an already opened mode.
703 * We only permit multiple opens for digital I/O now.
707 lockout_multiple_open(dev_t current, dev_t next)
709 return ! (DIGITAL(current) && DIGITAL(next));
713 labpcopen(dev_t dev, int flags, int fmt, struct thread *td)
715 u_short unit = UNIT(dev);
719 if (unit >= MAX_UNITS)
727 /* Don't allow another open if we have to change modes.
730 if ( (ctlr->flags & BUSY) == 0)
739 ctlr->intr = null_intr;
740 ctlr->starter = null_start;
741 ctlr->stop = null_stop;
743 else if (lockout_multiple_open(ctlr->dev, dev))
750 labpcclose(dev_t dev, int flags, int fmt, struct thread *td)
752 struct ctlr *ctlr = labpcs[UNIT(dev)];
756 ctlr->flags &= ~BUSY;
762 * Start: Start a frame going in or out.
765 start(struct ctlr *ctlr)
770 if ((bio = ctlr->start_queue.bio_actf) == NULL) {
771 /* We must turn off FIFO interrupts when there is no
772 * place to put the data. We have to get back to
773 * reading before the FIFO overflows.
775 CR_EXPR(ctlr, 3, &= ~(FIFOINTEN|ERRINTEN));
776 ctlr->cleared_intr = 1;
782 ctlr->data = (u_char *)bp->b_data;
783 ctlr->data_end = ctlr->data + bp->b_bcount;
787 printf("labpc start: (should not happen) error between records.\n");
788 done_and_start_next(ctlr, bio, EIO);
794 printf("labpc start: (should not happen) NULL data pointer.\n");
795 done_and_start_next(ctlr, bio, EIO);
799 (*ctlr->starter)(ctlr, bp->b_bcount);
801 if (!FIFOINTENABLED(ctlr)) /* We can store the data again */
803 CR_EXPR(ctlr, 3, |= (FIFOINTEN|ERRINTEN));
805 /* Don't wait for the interrupts to fill things up.
810 callout_reset(&ctlr->ch, ctlr->tmo, tmo_stop, ctlr);
814 ad_strategy(struct bio *bio, struct ctlr *ctlr)
817 bio->bio_actf = NULL;
820 ctlr->last->bio_actf = bio;
824 ctlr->start_queue.bio_actf = bio;
831 /* da_strategy: Send data to the D-A. The CHAN field should be
834 * 2: Alternate port 0 then port 1
838 * 1. There is no state for CHAN field 2:
839 * the first sample in each buffer goes to channel 0.
841 * 2. No interrupt support yet.
844 da_strategy(struct bio *bio, struct ctlr *ctlr)
846 struct buf *bp = bio->bio_buf;
847 dev_t dev = bio->bio_driver_info;
863 case 2: /* Device 2 handles both ports interleaved. */
864 if (bp->b_bcount <= 2)
870 len = bp->b_bcount / 2;
871 data = (u_char *)bp->b_data;
873 for (i = 0; i < len; i++)
875 loutb(DAC0H(ctlr), *data++);
876 loutb(DAC0L(ctlr), *data++);
877 loutb(DAC1H(ctlr), *data++);
878 loutb(DAC1L(ctlr), *data++);
881 bp->b_resid = bp->b_bcount & 3;
890 /* Port 0 or 1 falls through to here.
892 if (bp->b_bcount & 1) /* Odd transfers are illegal */
896 data = (u_char *)bp->b_data;
898 for (i = 0; i < len; i++)
900 loutb(port + 1, *data++);
901 loutb(port, *data++);
909 /* Input masks for MODE 0 of the ports treating PC as a single
910 * 8 bit port. Set these bits to set the port to input.
912 /* A B lowc highc combined */
913 static u_char set_input[] = { 0x10, 0x02, 0x01, 0x08, 0x09 };
915 static void flush_dcr(struct ctlr *ctlr)
917 if (ctlr->dcr_is != ctlr->dcr_val)
919 loutb(DCR(ctlr), ctlr->dcr_val);
920 ctlr->dcr_is = ctlr->dcr_val;
924 /* do: Digital output
927 digital_out_strategy(struct bio *bio, struct ctlr *ctlr)
929 struct buf *bp = bio->bio_buf;
930 dev_t dev = bio->bio_driver_info;
935 int chan = CHAN(dev);
937 ctlr->dcr_val &= ~set_input[chan]; /* Digital out: Clear bit */
940 port = PORTX(ctlr, chan);
943 data = (u_char *)bp->b_data;
945 for (i = 0; i < len; i++)
947 loutb(port, *data++);
955 /* digital_in_strategy: Digital input
958 digital_in_strategy(struct bio *bio, struct ctlr *ctlr)
960 struct buf *bp = bio->bio_buf;
961 dev_t dev = bio->bio_driver_info;
966 int chan = CHAN(dev);
968 ctlr->dcr_val |= set_input[chan]; /* Digital in: Set bit */
970 port = PORTX(ctlr, chan);
973 data = (u_char *)bp->b_data;
975 for (i = 0; i < len; i++)
987 labpcstrategy(dev_t dev, struct bio *bio)
989 struct buf *bp = bio->bio_buf;
990 struct ctlr *ctlr = labpcs[UNIT(dev)];
992 bio->bio_driver_info = dev;
995 if (bp->b_flags & B_READ) {
996 ctlr->starter = null_start;
997 ctlr->stop = all_stop;
998 ctlr->intr = null_intr;
999 digital_in_strategy(bio, ctlr);
1003 ctlr->starter = null_start;
1004 ctlr->stop = all_stop;
1005 ctlr->intr = null_intr;
1006 digital_out_strategy(bio, ctlr);
1010 if (bp->b_flags & B_READ) {
1012 ctlr->starter = INTERVAL(ctlr->dev) ? ad_interval_start : ad_start;
1013 ctlr->stop = all_stop;
1014 ctlr->intr = ad_intr;
1015 ad_strategy(bio, ctlr);
1019 ctlr->starter = null_start;
1020 ctlr->stop = all_stop;
1021 ctlr->intr = null_intr;
1022 da_strategy(bio, ctlr);
1028 labpcioctl(dev_t dev, u_long cmd, caddr_t arg, int mode, struct thread *td)
1030 struct ctlr *ctlr = labpcs[UNIT(dev)];
1034 case AD_MICRO_PERIOD_SET:
1036 /* XXX I'm only supporting what I have to, which is
1037 * no slow periods. You can't get any slower than 15 Hz
1038 * with the current setup. To go slower you'll need to
1039 * support TCINTEN in CR3.
1042 long sample_us = *(long *)arg;
1044 if (sample_us > 65535)
1047 ctlr->sample_us = sample_us;
1051 case AD_MICRO_PERIOD_GET:
1052 *(long *)arg = ctlr->sample_us;
1063 case AD_SUPPORTED_GAINS:
1065 static double gains[] = {1., 1.25, 2., 5., 10., 20., 50., 100.};
1066 copyout(gains, *(caddr_t *)arg, sizeof(gains));
1073 copyin(*(caddr_t *)arg, ctlr->gains, sizeof(ctlr->gains));
1079 copyout(ctlr->gains, *(caddr_t *)arg, sizeof(ctlr->gains));