sys/dev/netif/em/if_em.c

   1 /*
   2  * Copyright (c) 2004 Joerg Sonnenberger <joerg@bec.de>.  All rights reserved.
   3  *
   4  * Copyright (c) 2001-2014, Intel Corporation
   5  * All rights reserved.
   6  *
   7  * Redistribution and use in source and binary forms, with or without
   8  * modification, are permitted provided that the following conditions are met:
   9  *
  10  *  1. Redistributions of source code must retain the above copyright notice,
  11  *     this list of conditions and the following disclaimer.
  12  *
  13  *  2. Redistributions in binary form must reproduce the above copyright
  14  *     notice, this list of conditions and the following disclaimer in the
  15  *     documentation and/or other materials provided with the distribution.
  16  *
  17  *  3. Neither the name of the Intel Corporation nor the names of its
  18  *     contributors may be used to endorse or promote products derived from
  19  *     this software without specific prior written permission.
  20  *
  21  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
  22  * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
  23  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
  24  * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
  25  * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
  26  * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
  27  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
  28  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
  29  * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
  30  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
  31  * POSSIBILITY OF SUCH DAMAGE.
  32  *
  33  *
  34  * Copyright (c) 2005 The DragonFly Project.  All rights reserved.
  35  *
  36  * This code is derived from software contributed to The DragonFly Project
  37  * by Matthew Dillon <dillon@backplane.com>
  38  *
  39  * Redistribution and use in source and binary forms, with or without
  40  * modification, are permitted provided that the following conditions
  41  * are met:
  42  *
  43  * 1. Redistributions of source code must retain the above copyright
  44  *    notice, this list of conditions and the following disclaimer.
  45  * 2. Redistributions in binary form must reproduce the above copyright
  46  *    notice, this list of conditions and the following disclaimer in
  47  *    the documentation and/or other materials provided with the
  48  *    distribution.
  49  * 3. Neither the name of The DragonFly Project nor the names of its
  50  *    contributors may be used to endorse or promote products derived
  51  *    from this software without specific, prior written permission.
  52  *
  53  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
  54  * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
  55  * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
  56  * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE
  57  * COPYRIGHT HOLDERS OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
  58  * INCIDENTAL, SPECIAL, EXEMPLARY OR CONSEQUENTIAL DAMAGES (INCLUDING,
  59  * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
  60  * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
  61  * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
  62  * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT
  63  * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
  64  * SUCH DAMAGE.
  65  *
  66  */
  67 /*
  68  * SERIALIZATION API RULES:
  69  *
  70  * - We must call lwkt_serialize_handler_enable() prior to enabling the
  71  *   hardware interrupt and lwkt_serialize_handler_disable() after disabling
  72  *   the hardware interrupt in order to avoid handler execution races from
  73  *   scheduled interrupt threads.
  74  */
  75
  76 #include "opt_ifpoll.h"
  77
  78 #include <sys/param.h>
  79 #include <sys/bus.h>
  80 #include <sys/endian.h>
  81 #include <sys/interrupt.h>
  82 #include <sys/kernel.h>
  83 #include <sys/ktr.h>
  84 #include <sys/malloc.h>
  85 #include <sys/mbuf.h>
  86 #include <sys/proc.h>
  87 #include <sys/rman.h>
  88 #include <sys/serialize.h>
  89 #include <sys/socket.h>
  90 #include <sys/sockio.h>
  91 #include <sys/sysctl.h>
  92 #include <sys/systm.h>
  93
  94 #include <net/bpf.h>
  95 #include <net/ethernet.h>
  96 #include <net/if.h>
  97 #include <net/if_arp.h>
  98 #include <net/if_dl.h>
  99 #include <net/if_media.h>
 100 #include <net/if_poll.h>
 101 #include <net/ifq_var.h>
 102 #include <net/vlan/if_vlan_var.h>
 103 #include <net/vlan/if_vlan_ether.h>
 104
 105 #include <netinet/ip.h>
 106 #include <netinet/tcp.h>
 107 #include <netinet/udp.h>
 108
 109 #include <bus/pci/pcivar.h>
 110 #include <bus/pci/pcireg.h>
 111
 112 #include <dev/netif/ig_hal/e1000_api.h>
 113 #include <dev/netif/ig_hal/e1000_82571.h>
 114 #include <dev/netif/ig_hal/e1000_dragonfly.h>
 115 #include <dev/netif/em/if_em.h>
 116
 117 #define DEBUG_HW 0
 118
 119 #define EM_NAME "Intel(R) PRO/1000 Network Connection "
 120 #define EM_VER  " 7.4.2"
 121
 122 #define _EM_DEVICE(id, ret)     \
 123         { EM_VENDOR_ID, E1000_DEV_ID_##id, ret, EM_NAME #id EM_VER }
 124 #define EM_EMX_DEVICE(id)       _EM_DEVICE(id, -100)
 125 #define EM_DEVICE(id)           _EM_DEVICE(id, 0)
 126 #define EM_DEVICE_NULL  { 0, 0, 0, NULL }
 127
 128 static const struct em_vendor_info em_vendor_info_array[] = {
 129         EM_DEVICE(82540EM),
 130         EM_DEVICE(82540EM_LOM),
 131         EM_DEVICE(82540EP),
 132         EM_DEVICE(82540EP_LOM),
 133         EM_DEVICE(82540EP_LP),
 134
 135         EM_DEVICE(82541EI),
 136         EM_DEVICE(82541ER),
 137         EM_DEVICE(82541ER_LOM),
 138         EM_DEVICE(82541EI_MOBILE),
 139         EM_DEVICE(82541GI),
 140         EM_DEVICE(82541GI_LF),
 141         EM_DEVICE(82541GI_MOBILE),
 142
 143         EM_DEVICE(82542),
 144
 145         EM_DEVICE(82543GC_FIBER),
 146         EM_DEVICE(82543GC_COPPER),
 147
 148         EM_DEVICE(82544EI_COPPER),
 149         EM_DEVICE(82544EI_FIBER),
 150         EM_DEVICE(82544GC_COPPER),
 151         EM_DEVICE(82544GC_LOM),
 152
 153         EM_DEVICE(82545EM_COPPER),
 154         EM_DEVICE(82545EM_FIBER),
 155         EM_DEVICE(82545GM_COPPER),
 156         EM_DEVICE(82545GM_FIBER),
 157         EM_DEVICE(82545GM_SERDES),
 158
 159         EM_DEVICE(82546EB_COPPER),
 160         EM_DEVICE(82546EB_FIBER),
 161         EM_DEVICE(82546EB_QUAD_COPPER),
 162         EM_DEVICE(82546GB_COPPER),
 163         EM_DEVICE(82546GB_FIBER),
 164         EM_DEVICE(82546GB_SERDES),
 165         EM_DEVICE(82546GB_PCIE),
 166         EM_DEVICE(82546GB_QUAD_COPPER),
 167         EM_DEVICE(82546GB_QUAD_COPPER_KSP3),
 168
 169         EM_DEVICE(82547EI),
 170         EM_DEVICE(82547EI_MOBILE),
 171         EM_DEVICE(82547GI),
 172
 173         EM_EMX_DEVICE(82571EB_COPPER),
 174         EM_EMX_DEVICE(82571EB_FIBER),
 175         EM_EMX_DEVICE(82571EB_SERDES),
 176         EM_EMX_DEVICE(82571EB_SERDES_DUAL),
 177         EM_EMX_DEVICE(82571EB_SERDES_QUAD),
 178         EM_EMX_DEVICE(82571EB_QUAD_COPPER),
 179         EM_EMX_DEVICE(82571EB_QUAD_COPPER_BP),
 180         EM_EMX_DEVICE(82571EB_QUAD_COPPER_LP),
 181         EM_EMX_DEVICE(82571EB_QUAD_FIBER),
 182         EM_EMX_DEVICE(82571PT_QUAD_COPPER),
 183
 184         EM_EMX_DEVICE(82572EI_COPPER),
 185         EM_EMX_DEVICE(82572EI_FIBER),
 186         EM_EMX_DEVICE(82572EI_SERDES),
 187         EM_EMX_DEVICE(82572EI),
 188
 189         EM_EMX_DEVICE(82573E),
 190         EM_EMX_DEVICE(82573E_IAMT),
 191         EM_EMX_DEVICE(82573L),
 192
 193         EM_DEVICE(82583V),
 194
 195         EM_EMX_DEVICE(80003ES2LAN_COPPER_SPT),
 196         EM_EMX_DEVICE(80003ES2LAN_SERDES_SPT),
 197         EM_EMX_DEVICE(80003ES2LAN_COPPER_DPT),
 198         EM_EMX_DEVICE(80003ES2LAN_SERDES_DPT),
 199
 200         EM_DEVICE(ICH8_IGP_M_AMT),
 201         EM_DEVICE(ICH8_IGP_AMT),
 202         EM_DEVICE(ICH8_IGP_C),
 203         EM_DEVICE(ICH8_IFE),
 204         EM_DEVICE(ICH8_IFE_GT),
 205         EM_DEVICE(ICH8_IFE_G),
 206         EM_DEVICE(ICH8_IGP_M),
 207         EM_DEVICE(ICH8_82567V_3),
 208
 209         EM_DEVICE(ICH9_IGP_M_AMT),
 210         EM_DEVICE(ICH9_IGP_AMT),
 211         EM_DEVICE(ICH9_IGP_C),
 212         EM_DEVICE(ICH9_IGP_M),
 213         EM_DEVICE(ICH9_IGP_M_V),
 214         EM_DEVICE(ICH9_IFE),
 215         EM_DEVICE(ICH9_IFE_GT),
 216         EM_DEVICE(ICH9_IFE_G),
 217         EM_DEVICE(ICH9_BM),
 218
 219         EM_EMX_DEVICE(82574L),
 220         EM_EMX_DEVICE(82574LA),
 221
 222         EM_DEVICE(ICH10_R_BM_LM),
 223         EM_DEVICE(ICH10_R_BM_LF),
 224         EM_DEVICE(ICH10_R_BM_V),
 225         EM_DEVICE(ICH10_D_BM_LM),
 226         EM_DEVICE(ICH10_D_BM_LF),
 227         EM_DEVICE(ICH10_D_BM_V),
 228
 229         EM_DEVICE(PCH_M_HV_LM),
 230         EM_DEVICE(PCH_M_HV_LC),
 231         EM_DEVICE(PCH_D_HV_DM),
 232         EM_DEVICE(PCH_D_HV_DC),
 233
 234         EM_DEVICE(PCH2_LV_LM),
 235         EM_DEVICE(PCH2_LV_V),
 236
 237         EM_EMX_DEVICE(PCH_LPT_I217_LM),
 238         EM_EMX_DEVICE(PCH_LPT_I217_V),
 239         EM_EMX_DEVICE(PCH_LPTLP_I218_LM),
 240         EM_EMX_DEVICE(PCH_LPTLP_I218_V),
 241         EM_EMX_DEVICE(PCH_I218_LM2),
 242         EM_EMX_DEVICE(PCH_I218_V2),
 243         EM_EMX_DEVICE(PCH_I218_LM3),
 244         EM_EMX_DEVICE(PCH_I218_V3),
 245         EM_EMX_DEVICE(PCH_SPT_I219_LM),
 246         EM_EMX_DEVICE(PCH_SPT_I219_V),
 247         EM_EMX_DEVICE(PCH_SPT_I219_LM2),
 248         EM_EMX_DEVICE(PCH_SPT_I219_V2),
 249
 250         /* required last entry */
 251         EM_DEVICE_NULL
 252 };
 253
 254 static int      em_probe(device_t);
 255 static int      em_attach(device_t);
 256 static int      em_detach(device_t);
 257 static int      em_shutdown(device_t);
 258 static int      em_suspend(device_t);
 259 static int      em_resume(device_t);
 260
 261 static void     em_init(void *);
 262 static void     em_stop(struct adapter *);
 263 static int      em_ioctl(struct ifnet *, u_long, caddr_t, struct ucred *);
 264 static void     em_start(struct ifnet *, struct ifaltq_subque *);
 265 #ifdef IFPOLL_ENABLE
 266 static void     em_npoll(struct ifnet *, struct ifpoll_info *);
 267 static void     em_npoll_compat(struct ifnet *, void *, int);
 268 #endif
 269 static void     em_watchdog(struct ifnet *);
 270 static void     em_media_status(struct ifnet *, struct ifmediareq *);
 271 static int      em_media_change(struct ifnet *);
 272 static void     em_timer(void *);
 273
 274 static void     em_intr(void *);
 275 static void     em_intr_mask(void *);
 276 static void     em_intr_body(struct adapter *, boolean_t);
 277 static void     em_rxeof(struct adapter *, int);
 278 static void     em_txeof(struct adapter *);
 279 static void     em_tx_collect(struct adapter *);
 280 static void     em_tx_purge(struct adapter *);
 281 static void     em_enable_intr(struct adapter *);
 282 static void     em_disable_intr(struct adapter *);
 283
 284 static int      em_dma_malloc(struct adapter *, bus_size_t,
 285                     struct em_dma_alloc *);
 286 static void     em_dma_free(struct adapter *, struct em_dma_alloc *);
 287 static void     em_init_tx_ring(struct adapter *);
 288 static int      em_init_rx_ring(struct adapter *);
 289 static int      em_create_tx_ring(struct adapter *);
 290 static int      em_create_rx_ring(struct adapter *);
 291 static void     em_destroy_tx_ring(struct adapter *, int);
 292 static void     em_destroy_rx_ring(struct adapter *, int);
 293 static int      em_newbuf(struct adapter *, int, int);
 294 static int      em_encap(struct adapter *, struct mbuf **, int *, int *);
 295 static void     em_rxcsum(struct adapter *, struct e1000_rx_desc *,
 296                     struct mbuf *);
 297 static int      em_txcsum(struct adapter *, struct mbuf *,
 298                     uint32_t *, uint32_t *);
 299 static int      em_tso_pullup(struct adapter *, struct mbuf **);
 300 static int      em_tso_setup(struct adapter *, struct mbuf *,
 301                     uint32_t *, uint32_t *);
 302
 303 static int      em_get_hw_info(struct adapter *);
 304 static int      em_is_valid_eaddr(const uint8_t *);
 305 static int      em_alloc_pci_res(struct adapter *);
 306 static void     em_free_pci_res(struct adapter *);
 307 static int      em_reset(struct adapter *);
 308 static void     em_setup_ifp(struct adapter *);
 309 static void     em_init_tx_unit(struct adapter *);
 310 static void     em_init_rx_unit(struct adapter *);
 311 static void     em_update_stats(struct adapter *);
 312 static void     em_set_promisc(struct adapter *);
 313 static void     em_disable_promisc(struct adapter *);
 314 static void     em_set_multi(struct adapter *);
 315 static void     em_update_link_status(struct adapter *);
 316 static void     em_smartspeed(struct adapter *);
 317 static void     em_set_itr(struct adapter *, uint32_t);
 318 static void     em_disable_aspm(struct adapter *);
 319
 320 /* Hardware workarounds */
 321 static int      em_82547_fifo_workaround(struct adapter *, int);
 322 static void     em_82547_update_fifo_head(struct adapter *, int);
 323 static int      em_82547_tx_fifo_reset(struct adapter *);
 324 static void     em_82547_move_tail(void *);
 325 static void     em_82547_move_tail_serialized(struct adapter *);
 326 static uint32_t em_82544_fill_desc(bus_addr_t, uint32_t, PDESC_ARRAY);
 327
 328 static void     em_print_debug_info(struct adapter *);
 329 static void     em_print_nvm_info(struct adapter *);
 330 static void     em_print_hw_stats(struct adapter *);
 331
 332 static int      em_sysctl_stats(SYSCTL_HANDLER_ARGS);
 333 static int      em_sysctl_debug_info(SYSCTL_HANDLER_ARGS);
 334 static int      em_sysctl_int_throttle(SYSCTL_HANDLER_ARGS);
 335 static int      em_sysctl_int_tx_nsegs(SYSCTL_HANDLER_ARGS);
 336 static void     em_add_sysctl(struct adapter *adapter);
 337
 338 /* Management and WOL Support */
 339 static void     em_get_mgmt(struct adapter *);
 340 static void     em_rel_mgmt(struct adapter *);
 341 static void     em_get_hw_control(struct adapter *);
 342 static void     em_rel_hw_control(struct adapter *);
 343 static void     em_enable_wol(device_t);
 344
 345 static device_method_t em_methods[] = {
 346         /* Device interface */
 347         DEVMETHOD(device_probe,         em_probe),
 348         DEVMETHOD(device_attach,        em_attach),
 349         DEVMETHOD(device_detach,        em_detach),
 350         DEVMETHOD(device_shutdown,      em_shutdown),
 351         DEVMETHOD(device_suspend,       em_suspend),
 352         DEVMETHOD(device_resume,        em_resume),
 353         DEVMETHOD_END
 354 };
 355
 356 static driver_t em_driver = {
 357         "em",
 358         em_methods,
 359         sizeof(struct adapter),
 360 };
 361
 362 static devclass_t em_devclass;
 363
 364 DECLARE_DUMMY_MODULE(if_em);
 365 MODULE_DEPEND(em, ig_hal, 1, 1, 1);
 366 DRIVER_MODULE(if_em, pci, em_driver, em_devclass, NULL, NULL);
 367
 368 /*
 369  * Tunables
 370  */
 371 static int      em_int_throttle_ceil = EM_DEFAULT_ITR;
 372 static int      em_rxd = EM_DEFAULT_RXD;
 373 static int      em_txd = EM_DEFAULT_TXD;
 374 static int      em_smart_pwr_down = 0;
 375
 376 /* Controls whether promiscuous also shows bad packets */
 377 static int      em_debug_sbp = FALSE;
 378
 379 static int      em_82573_workaround = 1;
 380 static int      em_msi_enable = 1;
 381
 382 static char     em_flowctrl[IFM_ETH_FC_STRLEN] = IFM_ETH_FC_RXPAUSE;
 383
 384 TUNABLE_INT("hw.em.int_throttle_ceil", &em_int_throttle_ceil);
 385 TUNABLE_INT("hw.em.rxd", &em_rxd);
 386 TUNABLE_INT("hw.em.txd", &em_txd);
 387 TUNABLE_INT("hw.em.smart_pwr_down", &em_smart_pwr_down);
 388 TUNABLE_INT("hw.em.sbp", &em_debug_sbp);
 389 TUNABLE_INT("hw.em.82573_workaround", &em_82573_workaround);
 390 TUNABLE_INT("hw.em.msi.enable", &em_msi_enable);
 391 TUNABLE_STR("hw.em.flow_ctrl", em_flowctrl, sizeof(em_flowctrl));
 392
 393 /* Global used in WOL setup with multiport cards */
 394 static int      em_global_quad_port_a = 0;
 395
 396 /* Set this to one to display debug statistics */
 397 static int      em_display_debug_stats = 0;
 398
 399 #if !defined(KTR_IF_EM)
 400 #define KTR_IF_EM       KTR_ALL
 401 #endif
 402 KTR_INFO_MASTER(if_em);
 403 KTR_INFO(KTR_IF_EM, if_em, intr_beg, 0, "intr begin");
 404 KTR_INFO(KTR_IF_EM, if_em, intr_end, 1, "intr end");
 405 KTR_INFO(KTR_IF_EM, if_em, pkt_receive, 4, "rx packet");
 406 KTR_INFO(KTR_IF_EM, if_em, pkt_txqueue, 5, "tx packet");
 407 KTR_INFO(KTR_IF_EM, if_em, pkt_txclean, 6, "tx clean");
 408 #define logif(name)     KTR_LOG(if_em_ ## name)
 409
 410 static int
 411 em_probe(device_t dev)
 412 {
 413         const struct em_vendor_info *ent;
 414         uint16_t vid, did;
 415
 416         vid = pci_get_vendor(dev);
 417         did = pci_get_device(dev);
 418
 419         for (ent = em_vendor_info_array; ent->desc != NULL; ++ent) {
 420                 if (vid == ent->vendor_id && did == ent->device_id) {
 421                         device_set_desc(dev, ent->desc);
 422                         device_set_async_attach(dev, TRUE);
 423                         return (ent->ret);
 424                 }
 425         }
 426         return (ENXIO);
 427 }
 428
 429 static int
 430 em_attach(device_t dev)
 431 {
 432         struct adapter *adapter = device_get_softc(dev);
 433         struct ifnet *ifp = &adapter->arpcom.ac_if;
 434         int tsize, rsize;
 435         int error = 0;
 436         uint16_t eeprom_data, device_id, apme_mask;
 437         driver_intr_t *intr_func;
 438         char flowctrl[IFM_ETH_FC_STRLEN];
 439
 440         adapter->dev = adapter->osdep.dev = dev;
 441
 442         callout_init_mp(&adapter->timer);
 443         callout_init_mp(&adapter->tx_fifo_timer);
 444
 445         ifmedia_init(&adapter->media, IFM_IMASK | IFM_ETH_FCMASK,
 446             em_media_change, em_media_status);
 447
 448         /* Determine hardware and mac info */
 449         error = em_get_hw_info(adapter);
 450         if (error) {
 451                 device_printf(dev, "Identify hardware failed\n");
 452                 goto fail;
 453         }
 454
 455         /* Setup PCI resources */
 456         error = em_alloc_pci_res(adapter);
 457         if (error) {
 458                 device_printf(dev, "Allocation of PCI resources failed\n");
 459                 goto fail;
 460         }
 461
 462         /*
 463          * For ICH8 and family we need to map the flash memory,
 464          * and this must happen after the MAC is identified.
 465          *
 466          * (SPT does not map the flash with a separate BAR)
 467          */
 468         if (adapter->hw.mac.type == e1000_ich8lan ||
 469             adapter->hw.mac.type == e1000_ich9lan ||
 470             adapter->hw.mac.type == e1000_ich10lan ||
 471             adapter->hw.mac.type == e1000_pchlan ||
 472             adapter->hw.mac.type == e1000_pch2lan ||
 473             adapter->hw.mac.type == e1000_pch_lpt) {
 474                 adapter->flash_rid = EM_BAR_FLASH;
 475
 476                 adapter->flash = bus_alloc_resource_any(dev, SYS_RES_MEMORY,
 477                                         &adapter->flash_rid, RF_ACTIVE);
 478                 if (adapter->flash == NULL) {
 479                         device_printf(dev, "Mapping of Flash failed\n");
 480                         error = ENXIO;
 481                         goto fail;
 482                 }
 483                 adapter->osdep.flash_bus_space_tag =
 484                     rman_get_bustag(adapter->flash);
 485                 adapter->osdep.flash_bus_space_handle =
 486                     rman_get_bushandle(adapter->flash);
 487
 488                 /*
 489                  * This is used in the shared code
 490                  * XXX this goof is actually not used.
 491                  */
 492                 adapter->hw.flash_address = (uint8_t *)adapter->flash;
 493         }
 494
 495         switch (adapter->hw.mac.type) {
 496         case e1000_82571:
 497         case e1000_82572:
 498         case e1000_pch_lpt:
 499         case e1000_pch_spt:
 500                 /*
 501                  * Pullup extra 4bytes into the first data segment for
 502                  * TSO, see:
 503                  * 82571/82572 specification update errata #7
 504                  *
 505                  * Same applies to I217 (and maybe I218 and I219).
 506                  *
 507                  * NOTE:
 508                  * 4bytes instead of 2bytes, which are mentioned in the
 509                  * errata, are pulled; mainly to keep rest of the data
 510                  * properly aligned.
 511                  */
 512                 adapter->flags |= EM_FLAG_TSO_PULLEX;
 513                 /* FALL THROUGH */
 514
 515         default:
 516                 if (pci_is_pcie(dev))
 517                         adapter->flags |= EM_FLAG_TSO;
 518                 break;
 519         }
 520
 521         /* Do Shared Code initialization */
 522         if (e1000_setup_init_funcs(&adapter->hw, TRUE)) {
 523                 device_printf(dev, "Setup of Shared code failed\n");
 524                 error = ENXIO;
 525                 goto fail;
 526         }
 527
 528         e1000_get_bus_info(&adapter->hw);
 529
 530         /*
 531          * Validate number of transmit and receive descriptors.  It
 532          * must not exceed hardware maximum, and must be multiple
 533          * of E1000_DBA_ALIGN.
 534          */
 535         if ((em_txd * sizeof(struct e1000_tx_desc)) % EM_DBA_ALIGN != 0 ||
 536             (adapter->hw.mac.type >= e1000_82544 && em_txd > EM_MAX_TXD) ||
 537             (adapter->hw.mac.type < e1000_82544 && em_txd > EM_MAX_TXD_82543) ||
 538             em_txd < EM_MIN_TXD) {
 539                 if (adapter->hw.mac.type < e1000_82544)
 540                         adapter->num_tx_desc = EM_MAX_TXD_82543;
 541                 else
 542                         adapter->num_tx_desc = EM_DEFAULT_TXD;
 543                 device_printf(dev, "Using %d TX descriptors instead of %d!\n",
 544                     adapter->num_tx_desc, em_txd);
 545         } else {
 546                 adapter->num_tx_desc = em_txd;
 547         }
 548         if ((em_rxd * sizeof(struct e1000_rx_desc)) % EM_DBA_ALIGN != 0 ||
 549             (adapter->hw.mac.type >= e1000_82544 && em_rxd > EM_MAX_RXD) ||
 550             (adapter->hw.mac.type < e1000_82544 && em_rxd > EM_MAX_RXD_82543) ||
 551             em_rxd < EM_MIN_RXD) {
 552                 if (adapter->hw.mac.type < e1000_82544)
 553                         adapter->num_rx_desc = EM_MAX_RXD_82543;
 554                 else
 555                         adapter->num_rx_desc = EM_DEFAULT_RXD;
 556                 device_printf(dev, "Using %d RX descriptors instead of %d!\n",
 557                     adapter->num_rx_desc, em_rxd);
 558         } else {
 559                 adapter->num_rx_desc = em_rxd;
 560         }
 561
 562         adapter->hw.mac.autoneg = DO_AUTO_NEG;
 563         adapter->hw.phy.autoneg_wait_to_complete = FALSE;
 564         adapter->hw.phy.autoneg_advertised = AUTONEG_ADV_DEFAULT;
 565         adapter->rx_buffer_len = MCLBYTES;
 566
 567         /*
 568          * Interrupt throttle rate
 569          */
 570         if (em_int_throttle_ceil == 0) {
 571                 adapter->int_throttle_ceil = 0;
 572         } else {
 573                 int throttle = em_int_throttle_ceil;
 574
 575                 if (throttle < 0)
 576                         throttle = EM_DEFAULT_ITR;
 577
 578                 /* Recalculate the tunable value to get the exact frequency. */
 579                 throttle = 1000000000 / 256 / throttle;
 580
 581                 /* Upper 16bits of ITR is reserved and should be zero */
 582                 if (throttle & 0xffff0000)
 583                         throttle = 1000000000 / 256 / EM_DEFAULT_ITR;
 584
 585                 adapter->int_throttle_ceil = 1000000000 / 256 / throttle;
 586         }
 587
 588         e1000_init_script_state_82541(&adapter->hw, TRUE);
 589         e1000_set_tbi_compatibility_82543(&adapter->hw, TRUE);
 590
 591         /* Copper options */
 592         if (adapter->hw.phy.media_type == e1000_media_type_copper) {
 593                 adapter->hw.phy.mdix = AUTO_ALL_MODES;
 594                 adapter->hw.phy.disable_polarity_correction = FALSE;
 595                 adapter->hw.phy.ms_type = EM_MASTER_SLAVE;
 596         }
 597
 598         /* Set the frame limits assuming standard ethernet sized frames. */
 599         adapter->hw.mac.max_frame_size =
 600             ETHERMTU + ETHER_HDR_LEN + ETHER_CRC_LEN;
 601         adapter->min_frame_size = ETH_ZLEN + ETHER_CRC_LEN;
 602
 603         /* This controls when hardware reports transmit completion status. */
 604         adapter->hw.mac.report_tx_early = 1;
 605
 606         /*
 607          * Create top level busdma tag
 608          */
 609         error = bus_dma_tag_create(NULL, 1, 0,
 610                         BUS_SPACE_MAXADDR, BUS_SPACE_MAXADDR,
 611                         NULL, NULL,
 612                         BUS_SPACE_MAXSIZE_32BIT, 0, BUS_SPACE_MAXSIZE_32BIT,
 613                         0, &adapter->parent_dtag);
 614         if (error) {
 615                 device_printf(dev, "could not create top level DMA tag\n");
 616                 goto fail;
 617         }
 618
 619         /*
 620          * Allocate Transmit Descriptor ring
 621          */
 622         tsize = roundup2(adapter->num_tx_desc * sizeof(struct e1000_tx_desc),
 623                          EM_DBA_ALIGN);
 624         error = em_dma_malloc(adapter, tsize, &adapter->txdma);
 625         if (error) {
 626                 device_printf(dev, "Unable to allocate tx_desc memory\n");
 627                 goto fail;
 628         }
 629         adapter->tx_desc_base = adapter->txdma.dma_vaddr;
 630
 631         /*
 632          * Allocate Receive Descriptor ring
 633          */
 634         rsize = roundup2(adapter->num_rx_desc * sizeof(struct e1000_rx_desc),
 635                          EM_DBA_ALIGN);
 636         error = em_dma_malloc(adapter, rsize, &adapter->rxdma);
 637         if (error) {
 638                 device_printf(dev, "Unable to allocate rx_desc memory\n");
 639                 goto fail;
 640         }
 641         adapter->rx_desc_base = adapter->rxdma.dma_vaddr;
 642
 643         /* Allocate multicast array memory. */
 644         adapter->mta = kmalloc(ETH_ADDR_LEN * MAX_NUM_MULTICAST_ADDRESSES,
 645             M_DEVBUF, M_WAITOK);
 646
 647         /* Indicate SOL/IDER usage */
 648         if (e1000_check_reset_block(&adapter->hw)) {
 649                 device_printf(dev,
 650                     "PHY reset is blocked due to SOL/IDER session.\n");
 651         }
 652
 653         /* Disable EEE */
 654         adapter->hw.dev_spec.ich8lan.eee_disable = 1;
 655
 656         /*
 657          * Start from a known state, this is important in reading the
 658          * nvm and mac from that.
 659          */
 660         e1000_reset_hw(&adapter->hw);
 661
 662         /* Make sure we have a good EEPROM before we read from it */
 663         if (e1000_validate_nvm_checksum(&adapter->hw) < 0) {
 664                 /*
 665                  * Some PCI-E parts fail the first check due to
 666                  * the link being in sleep state, call it again,
 667                  * if it fails a second time its a real issue.
 668                  */
 669                 if (e1000_validate_nvm_checksum(&adapter->hw) < 0) {
 670                         device_printf(dev,
 671                             "The EEPROM Checksum Is Not Valid\n");
 672                         error = EIO;
 673                         goto fail;
 674                 }
 675         }
 676
 677         /* Copy the permanent MAC address out of the EEPROM */
 678         if (e1000_read_mac_addr(&adapter->hw) < 0) {
 679                 device_printf(dev, "EEPROM read error while reading MAC"
 680                     " address\n");
 681                 error = EIO;
 682                 goto fail;
 683         }
 684         if (!em_is_valid_eaddr(adapter->hw.mac.addr)) {
 685                 device_printf(dev, "Invalid MAC address\n");
 686                 error = EIO;
 687                 goto fail;
 688         }
 689
 690         /* Disable ULP support */
 691         e1000_disable_ulp_lpt_lp(&adapter->hw, TRUE);
 692
 693         /* Allocate transmit descriptors and buffers */
 694         error = em_create_tx_ring(adapter);
 695         if (error) {
 696                 device_printf(dev, "Could not setup transmit structures\n");
 697                 goto fail;
 698         }
 699
 700         /* Allocate receive descriptors and buffers */
 701         error = em_create_rx_ring(adapter);
 702         if (error) {
 703                 device_printf(dev, "Could not setup receive structures\n");
 704                 goto fail;
 705         }
 706
 707         /* Manually turn off all interrupts */
 708         E1000_WRITE_REG(&adapter->hw, E1000_IMC, 0xffffffff);
 709
 710         /* Determine if we have to control management hardware */
 711         if (e1000_enable_mng_pass_thru(&adapter->hw))
 712                 adapter->flags |= EM_FLAG_HAS_MGMT;
 713
 714         /*
 715          * Setup Wake-on-Lan
 716          */
 717         apme_mask = EM_EEPROM_APME;
 718         eeprom_data = 0;
 719         switch (adapter->hw.mac.type) {
 720         case e1000_82542:
 721         case e1000_82543:
 722                 break;
 723
 724         case e1000_82573:
 725         case e1000_82583:
 726                 adapter->flags |= EM_FLAG_HAS_AMT;
 727                 /* FALL THROUGH */
 728
 729         case e1000_82546:
 730         case e1000_82546_rev_3:
 731         case e1000_82571:
 732         case e1000_82572:
 733         case e1000_80003es2lan:
 734                 if (adapter->hw.bus.func == 1) {
 735                         e1000_read_nvm(&adapter->hw,
 736                             NVM_INIT_CONTROL3_PORT_B, 1, &eeprom_data);
 737                 } else {
 738                         e1000_read_nvm(&adapter->hw,
 739                             NVM_INIT_CONTROL3_PORT_A, 1, &eeprom_data);
 740                 }
 741                 break;
 742
 743         case e1000_ich8lan:
 744         case e1000_ich9lan:
 745         case e1000_ich10lan:
 746         case e1000_pchlan:
 747         case e1000_pch2lan:
 748                 apme_mask = E1000_WUC_APME;
 749                 adapter->flags |= EM_FLAG_HAS_AMT;
 750                 eeprom_data = E1000_READ_REG(&adapter->hw, E1000_WUC);
 751                 break;
 752
 753         default:
 754                 e1000_read_nvm(&adapter->hw,
 755                     NVM_INIT_CONTROL3_PORT_A, 1, &eeprom_data);
 756                 break;
 757         }
 758         if (eeprom_data & apme_mask)
 759                 adapter->wol = E1000_WUFC_MAG | E1000_WUFC_MC;
 760
 761         /*
 762          * We have the eeprom settings, now apply the special cases
 763          * where the eeprom may be wrong or the board won't support
 764          * wake on lan on a particular port
 765          */
 766         device_id = pci_get_device(dev);
 767         switch (device_id) {
 768         case E1000_DEV_ID_82546GB_PCIE:
 769                 adapter->wol = 0;
 770                 break;
 771
 772         case E1000_DEV_ID_82546EB_FIBER:
 773         case E1000_DEV_ID_82546GB_FIBER:
 774         case E1000_DEV_ID_82571EB_FIBER:
 775                 /*
 776                  * Wake events only supported on port A for dual fiber
 777                  * regardless of eeprom setting
 778                  */
 779                 if (E1000_READ_REG(&adapter->hw, E1000_STATUS) &
 780                     E1000_STATUS_FUNC_1)
 781                         adapter->wol = 0;
 782                 break;
 783
 784         case E1000_DEV_ID_82546GB_QUAD_COPPER_KSP3:
 785         case E1000_DEV_ID_82571EB_QUAD_COPPER:
 786         case E1000_DEV_ID_82571EB_QUAD_FIBER:
 787         case E1000_DEV_ID_82571EB_QUAD_COPPER_LP:
 788                 /* if quad port adapter, disable WoL on all but port A */
 789                 if (em_global_quad_port_a != 0)
 790                         adapter->wol = 0;
 791                 /* Reset for multiple quad port adapters */
 792                 if (++em_global_quad_port_a == 4)
 793                         em_global_quad_port_a = 0;
 794                 break;
 795         }
 796
 797         /* XXX disable wol */
 798         adapter->wol = 0;
 799
 800         /* Setup flow control. */
 801         device_getenv_string(dev, "flow_ctrl", flowctrl, sizeof(flowctrl),
 802             em_flowctrl);
 803         adapter->ifm_flowctrl = ifmedia_str2ethfc(flowctrl);
 804         if (adapter->hw.mac.type == e1000_pchlan) {
 805                 /* Only PAUSE reception is supported on PCH */
 806                 adapter->ifm_flowctrl &= ~IFM_ETH_TXPAUSE;
 807         }
 808
 809         /* Setup OS specific network interface */
 810         em_setup_ifp(adapter);
 811
 812         /* Add sysctl tree, must after em_setup_ifp() */
 813         em_add_sysctl(adapter);
 814
 815 #ifdef IFPOLL_ENABLE
 816         /* Polling setup */
 817         ifpoll_compat_setup(&adapter->npoll,
 818             device_get_sysctl_ctx(dev), device_get_sysctl_tree(dev),
 819             device_get_unit(dev), ifp->if_serializer);
 820 #endif
 821
 822         /* Reset the hardware */
 823         error = em_reset(adapter);
 824         if (error) {
 825                 /*
 826                  * Some 82573 parts fail the first reset, call it again,
 827                  * if it fails a second time its a real issue.
 828                  */
 829                 error = em_reset(adapter);
 830                 if (error) {
 831                         device_printf(dev, "Unable to reset the hardware\n");
 832                         ether_ifdetach(ifp);
 833                         goto fail;
 834                 }
 835         }
 836
 837         /* Initialize statistics */
 838         em_update_stats(adapter);
 839
 840         adapter->hw.mac.get_link_status = 1;
 841         em_update_link_status(adapter);
 842
 843         /* Do we need workaround for 82544 PCI-X adapter? */
 844         if (adapter->hw.bus.type == e1000_bus_type_pcix &&
 845             adapter->hw.mac.type == e1000_82544)
 846                 adapter->pcix_82544 = TRUE;
 847         else
 848                 adapter->pcix_82544 = FALSE;
 849
 850         if (adapter->pcix_82544) {
 851                 /*
 852                  * 82544 on PCI-X may split one TX segment
 853                  * into two TX descs, so we double its number
 854                  * of spare TX desc here.
 855                  */
 856                 adapter->spare_tx_desc = 2 * EM_TX_SPARE;
 857         } else {
 858                 adapter->spare_tx_desc = EM_TX_SPARE;
 859         }
 860         if (adapter->flags & EM_FLAG_TSO)
 861                 adapter->spare_tx_desc = EM_TX_SPARE_TSO;
 862         adapter->tx_wreg_nsegs = EM_DEFAULT_TXWREG;
 863
 864         /*
 865          * Keep following relationship between spare_tx_desc, oact_tx_desc
 866          * and tx_int_nsegs:
 867          * (spare_tx_desc + EM_TX_RESERVED) <=
 868          * oact_tx_desc <= EM_TX_OACTIVE_MAX <= tx_int_nsegs
 869          */
 870         adapter->oact_tx_desc = adapter->num_tx_desc / 8;
 871         if (adapter->oact_tx_desc > EM_TX_OACTIVE_MAX)
 872                 adapter->oact_tx_desc = EM_TX_OACTIVE_MAX;
 873         if (adapter->oact_tx_desc < adapter->spare_tx_desc + EM_TX_RESERVED)
 874                 adapter->oact_tx_desc = adapter->spare_tx_desc + EM_TX_RESERVED;
 875
 876         adapter->tx_int_nsegs = adapter->num_tx_desc / 16;
 877         if (adapter->tx_int_nsegs < adapter->oact_tx_desc)
 878                 adapter->tx_int_nsegs = adapter->oact_tx_desc;
 879
 880         /* Non-AMT based hardware can now take control from firmware */
 881         if ((adapter->flags & (EM_FLAG_HAS_MGMT | EM_FLAG_HAS_AMT)) ==
 882             EM_FLAG_HAS_MGMT && adapter->hw.mac.type >= e1000_82571)
 883                 em_get_hw_control(adapter);
 884
 885         ifq_set_cpuid(&ifp->if_snd, rman_get_cpuid(adapter->intr_res));
 886
 887         /*
 888          * Missing Interrupt Following ICR read:
 889          *
 890          * 82571/82572 specification update errata #76
 891          * 82573 specification update errata #31
 892          * 82574 specification update errata #12
 893          * 82583 specification update errata #4
 894          */
 895         intr_func = em_intr;
 896         if ((adapter->flags & EM_FLAG_SHARED_INTR) &&
 897             (adapter->hw.mac.type == e1000_82571 ||
 898              adapter->hw.mac.type == e1000_82572 ||
 899              adapter->hw.mac.type == e1000_82573 ||
 900              adapter->hw.mac.type == e1000_82574 ||
 901              adapter->hw.mac.type == e1000_82583))
 902                 intr_func = em_intr_mask;
 903
 904         error = bus_setup_intr(dev, adapter->intr_res, INTR_MPSAFE,
 905                                intr_func, adapter, &adapter->intr_tag,
 906                                ifp->if_serializer);
 907         if (error) {
 908                 device_printf(dev, "Failed to register interrupt handler");
 909                 ether_ifdetach(ifp);
 910                 goto fail;
 911         }
 912         return (0);
 913 fail:
 914         em_detach(dev);
 915         return (error);
 916 }
 917
 918 static int
 919 em_detach(device_t dev)
 920 {
 921         struct adapter *adapter = device_get_softc(dev);
 922
 923         if (device_is_attached(dev)) {
 924                 struct ifnet *ifp = &adapter->arpcom.ac_if;
 925
 926                 lwkt_serialize_enter(ifp->if_serializer);
 927
 928                 em_stop(adapter);
 929
 930                 e1000_phy_hw_reset(&adapter->hw);
 931
 932                 em_rel_mgmt(adapter);
 933                 em_rel_hw_control(adapter);
 934
 935                 if (adapter->wol) {
 936                         E1000_WRITE_REG(&adapter->hw, E1000_WUC,
 937                                         E1000_WUC_PME_EN);
 938                         E1000_WRITE_REG(&adapter->hw, E1000_WUFC, adapter->wol);
 939                         em_enable_wol(dev);
 940                 }
 941
 942                 bus_teardown_intr(dev, adapter->intr_res, adapter->intr_tag);
 943
 944                 lwkt_serialize_exit(ifp->if_serializer);
 945
 946                 ether_ifdetach(ifp);
 947         } else if (adapter->memory != NULL) {
 948                 em_rel_hw_control(adapter);
 949         }
 950
 951         ifmedia_removeall(&adapter->media);
 952         bus_generic_detach(dev);
 953
 954         em_free_pci_res(adapter);
 955
 956         em_destroy_tx_ring(adapter, adapter->num_tx_desc);
 957         em_destroy_rx_ring(adapter, adapter->num_rx_desc);
 958
 959         /* Free Transmit Descriptor ring */
 960         if (adapter->tx_desc_base)
 961                 em_dma_free(adapter, &adapter->txdma);
 962
 963         /* Free Receive Descriptor ring */
 964         if (adapter->rx_desc_base)
 965                 em_dma_free(adapter, &adapter->rxdma);
 966
 967         /* Free top level busdma tag */
 968         if (adapter->parent_dtag != NULL)
 969                 bus_dma_tag_destroy(adapter->parent_dtag);
 970
 971         if (adapter->mta != NULL)
 972                 kfree(adapter->mta, M_DEVBUF);
 973
 974         return (0);
 975 }
 976
 977 static int
 978 em_shutdown(device_t dev)
 979 {
 980         return em_suspend(dev);
 981 }
 982
 983 static int
 984 em_suspend(device_t dev)
 985 {
 986         struct adapter *adapter = device_get_softc(dev);
 987         struct ifnet *ifp = &adapter->arpcom.ac_if;
 988
 989         lwkt_serialize_enter(ifp->if_serializer);
 990
 991         em_stop(adapter);
 992
 993         em_rel_mgmt(adapter);
 994         em_rel_hw_control(adapter);
 995
 996         if (adapter->wol) {
 997                 E1000_WRITE_REG(&adapter->hw, E1000_WUC, E1000_WUC_PME_EN);
 998                 E1000_WRITE_REG(&adapter->hw, E1000_WUFC, adapter->wol);
 999                 em_enable_wol(dev);
1000         }
1001
1002         lwkt_serialize_exit(ifp->if_serializer);
1003
1004         return bus_generic_suspend(dev);
1005 }
1006
1007 static int
1008 em_resume(device_t dev)
1009 {
1010         struct adapter *adapter = device_get_softc(dev);
1011         struct ifnet *ifp = &adapter->arpcom.ac_if;
1012
1013         lwkt_serialize_enter(ifp->if_serializer);
1014
1015         if (adapter->hw.mac.type == e1000_pch2lan)
1016                 e1000_resume_workarounds_pchlan(&adapter->hw);
1017
1018         em_init(adapter);
1019         em_get_mgmt(adapter);
1020         if_devstart(ifp);
1021
1022         lwkt_serialize_exit(ifp->if_serializer);
1023
1024         return bus_generic_resume(dev);
1025 }
1026
1027 static void
1028 em_start(struct ifnet *ifp, struct ifaltq_subque *ifsq)
1029 {
1030         struct adapter *adapter = ifp->if_softc;
1031         struct mbuf *m_head;
1032         int idx = -1, nsegs = 0;
1033
1034         ASSERT_ALTQ_SQ_DEFAULT(ifp, ifsq);
1035         ASSERT_SERIALIZED(ifp->if_serializer);
1036
1037         if ((ifp->if_flags & IFF_RUNNING) == 0 || ifq_is_oactive(&ifp->if_snd))
1038                 return;
1039
1040         if (!adapter->link_active) {
1041                 ifq_purge(&ifp->if_snd);
1042                 return;
1043         }
1044
1045         while (!ifq_is_empty(&ifp->if_snd)) {
1046                 /* Now do we at least have a minimal? */
1047                 if (EM_IS_OACTIVE(adapter)) {
1048                         em_tx_collect(adapter);
1049                         if (EM_IS_OACTIVE(adapter)) {
1050                                 ifq_set_oactive(&ifp->if_snd);
1051                                 adapter->no_tx_desc_avail1++;
1052                                 break;
1053                         }
1054                 }
1055
1056                 logif(pkt_txqueue);
1057                 m_head = ifq_dequeue(&ifp->if_snd);
1058                 if (m_head == NULL)
1059                         break;
1060
1061                 if (em_encap(adapter, &m_head, &nsegs, &idx)) {
1062                         IFNET_STAT_INC(ifp, oerrors, 1);
1063                         em_tx_collect(adapter);
1064                         continue;
1065                 }
1066
1067                 /*
1068                  * TX interrupt are aggressively aggregated, so increasing
1069                  * opackets at TX interrupt time will make the opackets
1070                  * statistics vastly inaccurate; we do the opackets increment
1071                  * now.
1072                  */
1073                 IFNET_STAT_INC(ifp, opackets, 1);
1074
1075                 if (nsegs >= adapter->tx_wreg_nsegs && idx >= 0) {
1076                         E1000_WRITE_REG(&adapter->hw, E1000_TDT(0), idx);
1077                         nsegs = 0;
1078                         idx = -1;
1079                 }
1080
1081                 /* Send a copy of the frame to the BPF listener */
1082                 ETHER_BPF_MTAP(ifp, m_head);
1083
1084                 /* Set timeout in case hardware has problems transmitting. */
1085                 ifp->if_timer = EM_TX_TIMEOUT;
1086         }
1087         if (idx >= 0)
1088                 E1000_WRITE_REG(&adapter->hw, E1000_TDT(0), idx);
1089 }
1090
1091 static int
1092 em_ioctl(struct ifnet *ifp, u_long command, caddr_t data, struct ucred *cr)
1093 {
1094         struct adapter *adapter = ifp->if_softc;
1095         struct ifreq *ifr = (struct ifreq *)data;
1096         uint16_t eeprom_data = 0;
1097         int max_frame_size, mask, reinit;
1098         int error = 0;
1099
1100         ASSERT_SERIALIZED(ifp->if_serializer);
1101
1102         switch (command) {
1103         case SIOCSIFMTU:
1104                 switch (adapter->hw.mac.type) {
1105                 case e1000_82573:
1106                         /*
1107                          * 82573 only supports jumbo frames
1108                          * if ASPM is disabled.
1109                          */
1110                         e1000_read_nvm(&adapter->hw,
1111                             NVM_INIT_3GIO_3, 1, &eeprom_data);
1112                         if (eeprom_data & NVM_WORD1A_ASPM_MASK) {
1113                                 max_frame_size = ETHER_MAX_LEN;
1114                                 break;
1115                         }
1116                         /* FALL THROUGH */
1117
1118                 /* Limit Jumbo Frame size */
1119                 case e1000_82571:
1120                 case e1000_82572:
1121                 case e1000_ich9lan:
1122                 case e1000_ich10lan:
1123                 case e1000_pch2lan:
1124                 case e1000_pch_lpt:
1125                 case e1000_pch_spt:
1126                 case e1000_82574:
1127                 case e1000_82583:
1128                 case e1000_80003es2lan:
1129                         max_frame_size = 9234;
1130                         break;
1131
1132                 case e1000_pchlan:
1133                         max_frame_size = 4096;
1134                         break;
1135
1136                 /* Adapters that do not support jumbo frames */
1137                 case e1000_82542:
1138                 case e1000_ich8lan:
1139                         max_frame_size = ETHER_MAX_LEN;
1140                         break;
1141
1142                 default:
1143                         max_frame_size = MAX_JUMBO_FRAME_SIZE;
1144                         break;
1145                 }
1146                 if (ifr->ifr_mtu > max_frame_size - ETHER_HDR_LEN -
1147                     ETHER_CRC_LEN) {
1148                         error = EINVAL;
1149                         break;
1150                 }
1151
1152                 ifp->if_mtu = ifr->ifr_mtu;
1153                 adapter->hw.mac.max_frame_size =
1154                     ifp->if_mtu + ETHER_HDR_LEN + ETHER_CRC_LEN;
1155
1156                 if (ifp->if_flags & IFF_RUNNING)
1157                         em_init(adapter);
1158                 break;
1159
1160         case SIOCSIFFLAGS:
1161                 if (ifp->if_flags & IFF_UP) {
1162                         if ((ifp->if_flags & IFF_RUNNING)) {
1163                                 if ((ifp->if_flags ^ adapter->if_flags) &
1164                                     (IFF_PROMISC | IFF_ALLMULTI)) {
1165                                         em_disable_promisc(adapter);
1166                                         em_set_promisc(adapter);
1167                                 }
1168                         } else {
1169                                 em_init(adapter);
1170                         }
1171                 } else if (ifp->if_flags & IFF_RUNNING) {
1172                         em_stop(adapter);
1173                 }
1174                 adapter->if_flags = ifp->if_flags;
1175                 break;
1176
1177         case SIOCADDMULTI:
1178         case SIOCDELMULTI:
1179                 if (ifp->if_flags & IFF_RUNNING) {
1180                         em_disable_intr(adapter);
1181                         em_set_multi(adapter);
1182                         if (adapter->hw.mac.type == e1000_82542 &&
1183                             adapter->hw.revision_id == E1000_REVISION_2)
1184                                 em_init_rx_unit(adapter);
1185 #ifdef IFPOLL_ENABLE
1186                         if (!(ifp->if_flags & IFF_NPOLLING))
1187 #endif
1188                                 em_enable_intr(adapter);
1189                 }
1190                 break;
1191
1192         case SIOCSIFMEDIA:
1193                 /* Check SOL/IDER usage */
1194                 if (e1000_check_reset_block(&adapter->hw)) {
1195                         device_printf(adapter->dev, "Media change is"
1196                             " blocked due to SOL/IDER session.\n");
1197                         break;
1198                 }
1199                 /* FALL THROUGH */
1200
1201         case SIOCGIFMEDIA:
1202                 error = ifmedia_ioctl(ifp, ifr, &adapter->media, command);
1203                 break;
1204
1205         case SIOCSIFCAP:
1206                 reinit = 0;
1207                 mask = ifr->ifr_reqcap ^ ifp->if_capenable;
1208                 if (mask & IFCAP_RXCSUM) {
1209                         ifp->if_capenable ^= IFCAP_RXCSUM;
1210                         reinit = 1;
1211                 }
1212                 if (mask & IFCAP_TXCSUM) {
1213                         ifp->if_capenable ^= IFCAP_TXCSUM;
1214                         if (ifp->if_capenable & IFCAP_TXCSUM)
1215                                 ifp->if_hwassist |= EM_CSUM_FEATURES;
1216                         else
1217                                 ifp->if_hwassist &= ~EM_CSUM_FEATURES;
1218                 }
1219                 if (mask & IFCAP_TSO) {
1220                         ifp->if_capenable ^= IFCAP_TSO;
1221                         if (ifp->if_capenable & IFCAP_TSO)
1222                                 ifp->if_hwassist |= CSUM_TSO;
1223                         else
1224                                 ifp->if_hwassist &= ~CSUM_TSO;
1225                 }
1226                 if (mask & IFCAP_VLAN_HWTAGGING) {
1227                         ifp->if_capenable ^= IFCAP_VLAN_HWTAGGING;
1228                         reinit = 1;
1229                 }
1230                 if (reinit && (ifp->if_flags & IFF_RUNNING))
1231                         em_init(adapter);
1232                 break;
1233
1234         default:
1235                 error = ether_ioctl(ifp, command, data);
1236                 break;
1237         }
1238         return (error);
1239 }
1240
1241 static void
1242 em_watchdog(struct ifnet *ifp)
1243 {
1244         struct adapter *adapter = ifp->if_softc;
1245
1246         ASSERT_SERIALIZED(ifp->if_serializer);
1247
1248         /*
1249          * The timer is set to 5 every time start queues a packet.
1250          * Then txeof keeps resetting it as long as it cleans at
1251          * least one descriptor.
1252          * Finally, anytime all descriptors are clean the timer is
1253          * set to 0.
1254          */
1255
1256         if (E1000_READ_REG(&adapter->hw, E1000_TDT(0)) ==
1257             E1000_READ_REG(&adapter->hw, E1000_TDH(0))) {
1258                 /*
1259                  * If we reach here, all TX jobs are completed and
1260                  * the TX engine should have been idled for some time.
1261                  * We don't need to call if_devstart() here.
1262                  */
1263                 ifq_clr_oactive(&ifp->if_snd);
1264                 ifp->if_timer = 0;
1265                 return;
1266         }
1267
1268         /*
1269          * If we are in this routine because of pause frames, then
1270          * don't reset the hardware.
1271          */
1272         if (E1000_READ_REG(&adapter->hw, E1000_STATUS) &
1273             E1000_STATUS_TXOFF) {
1274                 ifp->if_timer = EM_TX_TIMEOUT;
1275                 return;
1276         }
1277
1278         if (e1000_check_for_link(&adapter->hw) == 0)
1279                 if_printf(ifp, "watchdog timeout -- resetting\n");
1280
1281         IFNET_STAT_INC(ifp, oerrors, 1);
1282         adapter->watchdog_events++;
1283
1284         em_init(adapter);
1285
1286         if (!ifq_is_empty(&ifp->if_snd))
1287                 if_devstart(ifp);
1288 }
1289
1290 static void
1291 em_init(void *xsc)
1292 {
1293         struct adapter *adapter = xsc;
1294         struct ifnet *ifp = &adapter->arpcom.ac_if;
1295         device_t dev = adapter->dev;
1296
1297         ASSERT_SERIALIZED(ifp->if_serializer);
1298
1299         em_stop(adapter);
1300
1301         /* Get the latest mac address, User can use a LAA */
1302         bcopy(IF_LLADDR(ifp), adapter->hw.mac.addr, ETHER_ADDR_LEN);
1303
1304         /* Put the address into the Receive Address Array */
1305         e1000_rar_set(&adapter->hw, adapter->hw.mac.addr, 0);
1306
1307         /*
1308          * With the 82571 adapter, RAR[0] may be overwritten
1309          * when the other port is reset, we make a duplicate
1310          * in RAR[14] for that eventuality, this assures
1311          * the interface continues to function.
1312          */
1313         if (adapter->hw.mac.type == e1000_82571) {
1314                 e1000_set_laa_state_82571(&adapter->hw, TRUE);
1315                 e1000_rar_set(&adapter->hw, adapter->hw.mac.addr,
1316                     E1000_RAR_ENTRIES - 1);
1317         }
1318
1319         /* Reset the hardware */
1320         if (em_reset(adapter)) {
1321                 device_printf(dev, "Unable to reset the hardware\n");
1322                 /* XXX em_stop()? */
1323                 return;
1324         }
1325         em_update_link_status(adapter);
1326
1327         /* Setup VLAN support, basic and offload if available */
1328         E1000_WRITE_REG(&adapter->hw, E1000_VET, ETHERTYPE_VLAN);
1329
1330         if (ifp->if_capenable & IFCAP_VLAN_HWTAGGING) {
1331                 uint32_t ctrl;
1332
1333                 ctrl = E1000_READ_REG(&adapter->hw, E1000_CTRL);
1334                 ctrl |= E1000_CTRL_VME;
1335                 E1000_WRITE_REG(&adapter->hw, E1000_CTRL, ctrl);
1336         }
1337
1338         /* Configure for OS presence */
1339         em_get_mgmt(adapter);
1340
1341         /* Prepare transmit descriptors and buffers */
1342         em_init_tx_ring(adapter);
1343         em_init_tx_unit(adapter);
1344
1345         /* Setup Multicast table */
1346         em_set_multi(adapter);
1347
1348         /* Prepare receive descriptors and buffers */
1349         if (em_init_rx_ring(adapter)) {
1350                 device_printf(dev, "Could not setup receive structures\n");
1351                 em_stop(adapter);
1352                 return;
1353         }
1354         em_init_rx_unit(adapter);
1355
1356         /* Don't lose promiscuous settings */
1357         em_set_promisc(adapter);
1358
1359         ifp->if_flags |= IFF_RUNNING;
1360         ifq_clr_oactive(&ifp->if_snd);
1361
1362         callout_reset(&adapter->timer, hz, em_timer, adapter);
1363         e1000_clear_hw_cntrs_base_generic(&adapter->hw);
1364
1365         /* MSI/X configuration for 82574 */
1366         if (adapter->hw.mac.type == e1000_82574) {
1367                 int tmp;
1368
1369                 tmp = E1000_READ_REG(&adapter->hw, E1000_CTRL_EXT);
1370                 tmp |= E1000_CTRL_EXT_PBA_CLR;
1371                 E1000_WRITE_REG(&adapter->hw, E1000_CTRL_EXT, tmp);
1372                 /*
1373                  * XXX MSIX
1374                  * Set the IVAR - interrupt vector routing.
1375                  * Each nibble represents a vector, high bit
1376                  * is enable, other 3 bits are the MSIX table
1377                  * entry, we map RXQ0 to 0, TXQ0 to 1, and
1378                  * Link (other) to 2, hence the magic number.
1379                  */
1380                 E1000_WRITE_REG(&adapter->hw, E1000_IVAR, 0x800A0908);
1381         }
1382
1383 #ifdef IFPOLL_ENABLE
1384         /*
1385          * Only enable interrupts if we are not polling, make sure
1386          * they are off otherwise.
1387          */
1388         if (ifp->if_flags & IFF_NPOLLING)
1389                 em_disable_intr(adapter);
1390         else
1391 #endif /* IFPOLL_ENABLE */
1392                 em_enable_intr(adapter);
1393
1394         /* AMT based hardware can now take control from firmware */
1395         if ((adapter->flags & (EM_FLAG_HAS_MGMT | EM_FLAG_HAS_AMT)) ==
1396             (EM_FLAG_HAS_MGMT | EM_FLAG_HAS_AMT) &&
1397             adapter->hw.mac.type >= e1000_82571)
1398                 em_get_hw_control(adapter);
1399 }
1400
1401 #ifdef IFPOLL_ENABLE
1402
1403 static void
1404 em_npoll_compat(struct ifnet *ifp, void *arg __unused, int count)
1405 {
1406         struct adapter *adapter = ifp->if_softc;
1407
1408         ASSERT_SERIALIZED(ifp->if_serializer);
1409
1410         if (adapter->npoll.ifpc_stcount-- == 0) {
1411                 uint32_t reg_icr;
1412
1413                 adapter->npoll.ifpc_stcount = adapter->npoll.ifpc_stfrac;
1414
1415                 reg_icr = E1000_READ_REG(&adapter->hw, E1000_ICR);
1416                 if (reg_icr & (E1000_ICR_RXSEQ | E1000_ICR_LSC)) {
1417                         callout_stop(&adapter->timer);
1418                         adapter->hw.mac.get_link_status = 1;
1419                         em_update_link_status(adapter);
1420                         callout_reset(&adapter->timer, hz, em_timer, adapter);
1421                 }
1422         }
1423
1424         em_rxeof(adapter, count);
1425         em_txeof(adapter);
1426
1427         if (!ifq_is_empty(&ifp->if_snd))
1428                 if_devstart(ifp);
1429 }
1430
1431 static void
1432 em_npoll(struct ifnet *ifp, struct ifpoll_info *info)
1433 {
1434         struct adapter *adapter = ifp->if_softc;
1435
1436         ASSERT_SERIALIZED(ifp->if_serializer);
1437
1438         if (info != NULL) {
1439                 int cpuid = adapter->npoll.ifpc_cpuid;
1440
1441                 info->ifpi_rx[cpuid].poll_func = em_npoll_compat;
1442                 info->ifpi_rx[cpuid].arg = NULL;
1443                 info->ifpi_rx[cpuid].serializer = ifp->if_serializer;
1444
1445                 if (ifp->if_flags & IFF_RUNNING)
1446                         em_disable_intr(adapter);
1447                 ifq_set_cpuid(&ifp->if_snd, cpuid);
1448         } else {
1449                 if (ifp->if_flags & IFF_RUNNING)
1450                         em_enable_intr(adapter);
1451                 ifq_set_cpuid(&ifp->if_snd, rman_get_cpuid(adapter->intr_res));
1452         }
1453 }
1454
1455 #endif /* IFPOLL_ENABLE */
1456
1457 static void
1458 em_intr(void *xsc)
1459 {
1460         em_intr_body(xsc, TRUE);
1461 }
1462
1463 static void
1464 em_intr_body(struct adapter *adapter, boolean_t chk_asserted)
1465 {
1466         struct ifnet *ifp = &adapter->arpcom.ac_if;
1467         uint32_t reg_icr;
1468
1469         logif(intr_beg);
1470         ASSERT_SERIALIZED(ifp->if_serializer);
1471
1472         reg_icr = E1000_READ_REG(&adapter->hw, E1000_ICR);
1473
1474         if (chk_asserted &&
1475             ((adapter->hw.mac.type >= e1000_82571 &&
1476               (reg_icr & E1000_ICR_INT_ASSERTED) == 0) ||
1477              reg_icr == 0)) {
1478                 logif(intr_end);
1479                 return;
1480         }
1481
1482         /*
1483          * XXX: some laptops trigger several spurious interrupts
1484          * on em(4) when in the resume cycle. The ICR register
1485          * reports all-ones value in this case. Processing such
1486          * interrupts would lead to a freeze. I don't know why.
1487          */
1488         if (reg_icr == 0xffffffff) {
1489                 logif(intr_end);
1490                 return;
1491         }
1492
1493         if (ifp->if_flags & IFF_RUNNING) {
1494                 if (reg_icr &
1495                     (E1000_ICR_RXT0 | E1000_ICR_RXDMT0 | E1000_ICR_RXO))
1496                         em_rxeof(adapter, -1);
1497                 if (reg_icr & E1000_ICR_TXDW) {
1498                         em_txeof(adapter);
1499                         if (!ifq_is_empty(&ifp->if_snd))
1500                                 if_devstart(ifp);
1501                 }
1502         }
1503
1504         /* Link status change */
1505         if (reg_icr & (E1000_ICR_RXSEQ | E1000_ICR_LSC)) {
1506                 callout_stop(&adapter->timer);
1507                 adapter->hw.mac.get_link_status = 1;
1508                 em_update_link_status(adapter);
1509
1510                 /* Deal with TX cruft when link lost */
1511                 em_tx_purge(adapter);
1512
1513                 callout_reset(&adapter->timer, hz, em_timer, adapter);
1514         }
1515
1516         if (reg_icr & E1000_ICR_RXO)
1517                 adapter->rx_overruns++;
1518
1519         logif(intr_end);
1520 }
1521
1522 static void
1523 em_intr_mask(void *xsc)
1524 {
1525         struct adapter *adapter = xsc;
1526
1527         E1000_WRITE_REG(&adapter->hw, E1000_IMC, 0xffffffff);
1528         /*
1529          * NOTE:
1530          * ICR.INT_ASSERTED bit will never be set if IMS is 0,
1531          * so don't check it.
1532          */
1533         em_intr_body(adapter, FALSE);
1534         E1000_WRITE_REG(&adapter->hw, E1000_IMS, IMS_ENABLE_MASK);
1535 }
1536
1537 static void
1538 em_media_status(struct ifnet *ifp, struct ifmediareq *ifmr)
1539 {
1540         struct adapter *adapter = ifp->if_softc;
1541
1542         ASSERT_SERIALIZED(ifp->if_serializer);
1543
1544         em_update_link_status(adapter);
1545
1546         ifmr->ifm_status = IFM_AVALID;
1547         ifmr->ifm_active = IFM_ETHER;
1548
1549         if (!adapter->link_active) {
1550                 if (adapter->hw.mac.autoneg)
1551                         ifmr->ifm_active |= IFM_NONE;
1552                 else
1553                         ifmr->ifm_active = adapter->media.ifm_media;
1554                 return;
1555         }
1556
1557         ifmr->ifm_status |= IFM_ACTIVE;
1558         if (adapter->ifm_flowctrl & IFM_ETH_FORCEPAUSE)
1559                 ifmr->ifm_active |= adapter->ifm_flowctrl;
1560
1561         if (adapter->hw.phy.media_type == e1000_media_type_fiber ||
1562             adapter->hw.phy.media_type == e1000_media_type_internal_serdes) {
1563                 u_char fiber_type = IFM_1000_SX;
1564
1565                 if (adapter->hw.mac.type == e1000_82545)
1566                         fiber_type = IFM_1000_LX;
1567                 ifmr->ifm_active |= fiber_type | IFM_FDX;
1568         } else {
1569                 switch (adapter->link_speed) {
1570                 case 10:
1571                         ifmr->ifm_active |= IFM_10_T;
1572                         break;
1573                 case 100:
1574                         ifmr->ifm_active |= IFM_100_TX;
1575                         break;
1576
1577                 case 1000:
1578                         ifmr->ifm_active |= IFM_1000_T;
1579                         break;
1580                 }
1581                 if (adapter->link_duplex == FULL_DUPLEX)
1582                         ifmr->ifm_active |= IFM_FDX;
1583                 else
1584                         ifmr->ifm_active |= IFM_HDX;
1585         }
1586         if (ifmr->ifm_active & IFM_FDX) {
1587                 ifmr->ifm_active |=
1588                     e1000_fc2ifmedia(adapter->hw.fc.current_mode);
1589         }
1590 }
1591
1592 static int
1593 em_media_change(struct ifnet *ifp)
1594 {
1595         struct adapter *adapter = ifp->if_softc;
1596         struct ifmedia *ifm = &adapter->media;
1597
1598         ASSERT_SERIALIZED(ifp->if_serializer);
1599
1600         if (IFM_TYPE(ifm->ifm_media) != IFM_ETHER)
1601                 return (EINVAL);
1602
1603         if (adapter->hw.mac.type == e1000_pchlan &&
1604             (IFM_OPTIONS(ifm->ifm_media) & IFM_ETH_TXPAUSE)) {
1605                 if (bootverbose)
1606                         if_printf(ifp, "TX PAUSE is not supported on PCH\n");
1607                 return EINVAL;
1608         }
1609
1610         switch (IFM_SUBTYPE(ifm->ifm_media)) {
1611         case IFM_AUTO:
1612                 adapter->hw.mac.autoneg = DO_AUTO_NEG;
1613                 adapter->hw.phy.autoneg_advertised = AUTONEG_ADV_DEFAULT;
1614                 break;
1615
1616         case IFM_1000_LX:
1617         case IFM_1000_SX:
1618         case IFM_1000_T:
1619                 adapter->hw.mac.autoneg = DO_AUTO_NEG;
1620                 adapter->hw.phy.autoneg_advertised = ADVERTISE_1000_FULL;
1621                 break;
1622
1623         case IFM_100_TX:
1624                 if (IFM_OPTIONS(ifm->ifm_media) & IFM_FDX) {
1625                         adapter->hw.mac.forced_speed_duplex = ADVERTISE_100_FULL;
1626                 } else {
1627                         if (IFM_OPTIONS(ifm->ifm_media) &
1628                             (IFM_ETH_RXPAUSE | IFM_ETH_TXPAUSE)) {
1629                                 if (bootverbose) {
1630                                         if_printf(ifp, "Flow control is not "
1631                                             "allowed for half-duplex\n");
1632                                 }
1633                                 return EINVAL;
1634                         }
1635                         adapter->hw.mac.forced_speed_duplex = ADVERTISE_100_HALF;
1636                 }
1637                 adapter->hw.mac.autoneg = FALSE;
1638                 adapter->hw.phy.autoneg_advertised = 0;
1639                 break;
1640
1641         case IFM_10_T:
1642                 if (IFM_OPTIONS(ifm->ifm_media) & IFM_FDX) {
1643                         adapter->hw.mac.forced_speed_duplex = ADVERTISE_10_FULL;
1644                 } else {
1645                         if (IFM_OPTIONS(ifm->ifm_media) &
1646                             (IFM_ETH_RXPAUSE | IFM_ETH_TXPAUSE)) {
1647                                 if (bootverbose) {
1648                                         if_printf(ifp, "Flow control is not "
1649                                             "allowed for half-duplex\n");
1650                                 }
1651                                 return EINVAL;
1652                         }
1653                         adapter->hw.mac.forced_speed_duplex = ADVERTISE_10_HALF;
1654                 }
1655                 adapter->hw.mac.autoneg = FALSE;
1656                 adapter->hw.phy.autoneg_advertised = 0;
1657                 break;
1658
1659         default:
1660                 if (bootverbose) {
1661                         if_printf(ifp, "Unsupported media type %d\n",
1662                             IFM_SUBTYPE(ifm->ifm_media));
1663                 }
1664                 return EINVAL;
1665         }
1666         adapter->ifm_flowctrl = ifm->ifm_media & IFM_ETH_FCMASK;
1667
1668         if (ifp->if_flags & IFF_RUNNING)
1669                 em_init(adapter);
1670
1671         return (0);
1672 }
1673
1674 static int
1675 em_encap(struct adapter *adapter, struct mbuf **m_headp,
1676     int *segs_used, int *idx)
1677 {
1678         bus_dma_segment_t segs[EM_MAX_SCATTER];
1679         bus_dmamap_t map;
1680         struct em_buffer *tx_buffer, *tx_buffer_mapped;
1681         struct e1000_tx_desc *ctxd = NULL;
1682         struct mbuf *m_head = *m_headp;
1683         uint32_t txd_upper, txd_lower, txd_used, cmd = 0;
1684         int maxsegs, nsegs, i, j, first, last = 0, error;
1685
1686         if (m_head->m_pkthdr.csum_flags & CSUM_TSO) {
1687                 error = em_tso_pullup(adapter, m_headp);
1688                 if (error)
1689                         return error;
1690                 m_head = *m_headp;
1691         }
1692
1693         txd_upper = txd_lower = 0;
1694         txd_used = 0;
1695
1696         /*
1697          * Capture the first descriptor index, this descriptor
1698          * will have the index of the EOP which is the only one
1699          * that now gets a DONE bit writeback.
1700          */
1701         first = adapter->next_avail_tx_desc;
1702         tx_buffer = &adapter->tx_buffer_area[first];
1703         tx_buffer_mapped = tx_buffer;
1704         map = tx_buffer->map;
1705
1706         maxsegs = adapter->num_tx_desc_avail - EM_TX_RESERVED;
1707         KASSERT(maxsegs >= adapter->spare_tx_desc,
1708                 ("not enough spare TX desc"));
1709         if (adapter->pcix_82544) {
1710                 /* Half it; see the comment in em_attach() */
1711                 maxsegs >>= 1;
1712         }
1713         if (maxsegs > EM_MAX_SCATTER)
1714                 maxsegs = EM_MAX_SCATTER;
1715
1716         error = bus_dmamap_load_mbuf_defrag(adapter->txtag, map, m_headp,
1717                         segs, maxsegs, &nsegs, BUS_DMA_NOWAIT);
1718         if (error) {
1719                 if (error == ENOBUFS)
1720                         adapter->mbuf_alloc_failed++;
1721                 else
1722                         adapter->no_tx_dma_setup++;
1723
1724                 m_freem(*m_headp);
1725                 *m_headp = NULL;
1726                 return error;
1727         }
1728         bus_dmamap_sync(adapter->txtag, map, BUS_DMASYNC_PREWRITE);
1729
1730         m_head = *m_headp;
1731         adapter->tx_nsegs += nsegs;
1732         *segs_used += nsegs;
1733
1734         if (m_head->m_pkthdr.csum_flags & CSUM_TSO) {
1735                 /* TSO will consume one TX desc */
1736                 i = em_tso_setup(adapter, m_head, &txd_upper, &txd_lower);
1737                 adapter->tx_nsegs += i;
1738                 *segs_used += i;
1739         } else if (m_head->m_pkthdr.csum_flags & EM_CSUM_FEATURES) {
1740                 /* TX csum offloading will consume one TX desc */
1741                 i = em_txcsum(adapter, m_head, &txd_upper, &txd_lower);
1742                 adapter->tx_nsegs += i;
1743                 *segs_used += i;
1744         }
1745
1746         /* Handle VLAN tag */
1747         if (m_head->m_flags & M_VLANTAG) {
1748                 /* Set the vlan id. */
1749                 txd_upper |= (htole16(m_head->m_pkthdr.ether_vlantag) << 16);
1750                 /* Tell hardware to add tag */
1751                 txd_lower |= htole32(E1000_TXD_CMD_VLE);
1752         }
1753
1754         i = adapter->next_avail_tx_desc;
1755
1756         /* Set up our transmit descriptors */
1757         for (j = 0; j < nsegs; j++) {
1758                 /* If adapter is 82544 and on PCIX bus */
1759                 if(adapter->pcix_82544) {
1760                         DESC_ARRAY desc_array;
1761                         uint32_t array_elements, counter;
1762
1763                         /*
1764                          * Check the Address and Length combination and
1765                          * split the data accordingly
1766                          */
1767                         array_elements = em_82544_fill_desc(segs[j].ds_addr,
1768                                                 segs[j].ds_len, &desc_array);
1769                         for (counter = 0; counter < array_elements; counter++) {
1770                                 KKASSERT(txd_used < adapter->num_tx_desc_avail);
1771
1772                                 tx_buffer = &adapter->tx_buffer_area[i];
1773                                 ctxd = &adapter->tx_desc_base[i];
1774
1775                                 ctxd->buffer_addr = htole64(
1776                                     desc_array.descriptor[counter].address);
1777                                 ctxd->lower.data = htole32(
1778                                     E1000_TXD_CMD_IFCS | txd_lower |
1779                                     desc_array.descriptor[counter].length);
1780                                 ctxd->upper.data = htole32(txd_upper);
1781
1782                                 last = i;
1783                                 if (++i == adapter->num_tx_desc)
1784                                         i = 0;
1785
1786                                 txd_used++;
1787                         }
1788                 } else {
1789                         tx_buffer = &adapter->tx_buffer_area[i];
1790                         ctxd = &adapter->tx_desc_base[i];
1791
1792                         ctxd->buffer_addr = htole64(segs[j].ds_addr);
1793                         ctxd->lower.data = htole32(E1000_TXD_CMD_IFCS |
1794                                                    txd_lower | segs[j].ds_len);
1795                         ctxd->upper.data = htole32(txd_upper);
1796
1797                         last = i;
1798                         if (++i == adapter->num_tx_desc)
1799                                 i = 0;
1800                 }
1801         }
1802
1803         adapter->next_avail_tx_desc = i;
1804         if (adapter->pcix_82544) {
1805                 KKASSERT(adapter->num_tx_desc_avail > txd_used);
1806                 adapter->num_tx_desc_avail -= txd_used;
1807         } else {
1808                 KKASSERT(adapter->num_tx_desc_avail > nsegs);
1809                 adapter->num_tx_desc_avail -= nsegs;
1810         }
1811
1812         tx_buffer->m_head = m_head;
1813         tx_buffer_mapped->map = tx_buffer->map;
1814         tx_buffer->map = map;
1815
1816         if (adapter->tx_nsegs >= adapter->tx_int_nsegs) {
1817                 adapter->tx_nsegs = 0;
1818
1819                 /*
1820                  * Report Status (RS) is turned on
1821                  * every tx_int_nsegs descriptors.
1822                  */
1823                 cmd = E1000_TXD_CMD_RS;
1824
1825                 /*
1826                  * Keep track of the descriptor, which will
1827                  * be written back by hardware.
1828                  */
1829                 adapter->tx_dd[adapter->tx_dd_tail] = last;
1830                 EM_INC_TXDD_IDX(adapter->tx_dd_tail);
1831                 KKASSERT(adapter->tx_dd_tail != adapter->tx_dd_head);
1832         }
1833
1834         /*
1835          * Last Descriptor of Packet needs End Of Packet (EOP)
1836          */
1837         ctxd->lower.data |= htole32(E1000_TXD_CMD_EOP | cmd);
1838
1839         if (adapter->hw.mac.type == e1000_82547) {
1840                 /*
1841                  * Advance the Transmit Descriptor Tail (TDT), this tells the
1842                  * E1000 that this frame is available to transmit.
1843                  */
1844                 if (adapter->link_duplex == HALF_DUPLEX) {
1845                         em_82547_move_tail_serialized(adapter);
1846                 } else {
1847                         E1000_WRITE_REG(&adapter->hw, E1000_TDT(0), i);
1848                         em_82547_update_fifo_head(adapter,
1849                             m_head->m_pkthdr.len);
1850                 }
1851         } else {
1852                 /*
1853                  * Defer TDT updating, until enough descriptors are setup
1854                  */
1855                 *idx = i;
1856         }
1857         return (0);
1858 }
1859
1860 /*
1861  * 82547 workaround to avoid controller hang in half-duplex environment.
1862  * The workaround is to avoid queuing a large packet that would span
1863  * the internal Tx FIFO ring boundary.  We need to reset the FIFO pointers
1864  * in this case.  We do that only when FIFO is quiescent.
1865  */
1866 static void
1867 em_82547_move_tail_serialized(struct adapter *adapter)
1868 {
1869         struct e1000_tx_desc *tx_desc;
1870         uint16_t hw_tdt, sw_tdt, length = 0;
1871         bool eop = 0;
1872
1873         ASSERT_SERIALIZED(adapter->arpcom.ac_if.if_serializer);
1874
1875         hw_tdt = E1000_READ_REG(&adapter->hw, E1000_TDT(0));
1876         sw_tdt = adapter->next_avail_tx_desc;
1877
1878         while (hw_tdt != sw_tdt) {
1879                 tx_desc = &adapter->tx_desc_base[hw_tdt];
1880                 length += tx_desc->lower.flags.length;
1881                 eop = tx_desc->lower.data & E1000_TXD_CMD_EOP;
1882                 if (++hw_tdt == adapter->num_tx_desc)
1883                         hw_tdt = 0;
1884
1885                 if (eop) {
1886                         if (em_82547_fifo_workaround(adapter, length)) {
1887                                 adapter->tx_fifo_wrk_cnt++;
1888                                 callout_reset(&adapter->tx_fifo_timer, 1,
1889                                         em_82547_move_tail, adapter);
1890                                 break;
1891                         }
1892                         E1000_WRITE_REG(&adapter->hw, E1000_TDT(0), hw_tdt);
1893                         em_82547_update_fifo_head(adapter, length);
1894                         length = 0;
1895                 }
1896         }
1897 }
1898
1899 static void
1900 em_82547_move_tail(void *xsc)
1901 {
1902         struct adapter *adapter = xsc;
1903         struct ifnet *ifp = &adapter->arpcom.ac_if;
1904
1905         lwkt_serialize_enter(ifp->if_serializer);
1906         em_82547_move_tail_serialized(adapter);
1907         lwkt_serialize_exit(ifp->if_serializer);
1908 }
1909
1910 static int
1911 em_82547_fifo_workaround(struct adapter *adapter, int len)
1912 {
1913         int fifo_space, fifo_pkt_len;
1914
1915         fifo_pkt_len = roundup2(len + EM_FIFO_HDR, EM_FIFO_HDR);
1916
1917         if (adapter->link_duplex == HALF_DUPLEX) {
1918                 fifo_space = adapter->tx_fifo_size - adapter->tx_fifo_head;
1919
1920                 if (fifo_pkt_len >= (EM_82547_PKT_THRESH + fifo_space)) {
1921                         if (em_82547_tx_fifo_reset(adapter))
1922                                 return (0);
1923                         else
1924                                 return (1);
1925                 }
1926         }
1927         return (0);
1928 }
1929
1930 static void
1931 em_82547_update_fifo_head(struct adapter *adapter, int len)
1932 {
1933         int fifo_pkt_len = roundup2(len + EM_FIFO_HDR, EM_FIFO_HDR);
1934
1935         /* tx_fifo_head is always 16 byte aligned */
1936         adapter->tx_fifo_head += fifo_pkt_len;
1937         if (adapter->tx_fifo_head >= adapter->tx_fifo_size)
1938                 adapter->tx_fifo_head -= adapter->tx_fifo_size;
1939 }
1940
1941 static int
1942 em_82547_tx_fifo_reset(struct adapter *adapter)
1943 {
1944         uint32_t tctl;
1945
1946         if ((E1000_READ_REG(&adapter->hw, E1000_TDT(0)) ==
1947              E1000_READ_REG(&adapter->hw, E1000_TDH(0))) &&
1948             (E1000_READ_REG(&adapter->hw, E1000_TDFT) ==
1949              E1000_READ_REG(&adapter->hw, E1000_TDFH)) &&
1950             (E1000_READ_REG(&adapter->hw, E1000_TDFTS) ==
1951              E1000_READ_REG(&adapter->hw, E1000_TDFHS)) &&
1952             (E1000_READ_REG(&adapter->hw, E1000_TDFPC) == 0)) {
1953                 /* Disable TX unit */
1954                 tctl = E1000_READ_REG(&adapter->hw, E1000_TCTL);
1955                 E1000_WRITE_REG(&adapter->hw, E1000_TCTL,
1956                     tctl & ~E1000_TCTL_EN);
1957
1958                 /* Reset FIFO pointers */
1959                 E1000_WRITE_REG(&adapter->hw, E1000_TDFT,
1960                     adapter->tx_head_addr);
1961                 E1000_WRITE_REG(&adapter->hw, E1000_TDFH,
1962                     adapter->tx_head_addr);
1963                 E1000_WRITE_REG(&adapter->hw, E1000_TDFTS,
1964                     adapter->tx_head_addr);
1965                 E1000_WRITE_REG(&adapter->hw, E1000_TDFHS,
1966                     adapter->tx_head_addr);
1967
1968                 /* Re-enable TX unit */
1969                 E1000_WRITE_REG(&adapter->hw, E1000_TCTL, tctl);
1970                 E1000_WRITE_FLUSH(&adapter->hw);
1971
1972                 adapter->tx_fifo_head = 0;
1973                 adapter->tx_fifo_reset_cnt++;
1974
1975                 return (TRUE);
1976         } else {
1977                 return (FALSE);
1978         }
1979 }
1980
1981 static void
1982 em_set_promisc(struct adapter *adapter)
1983 {
1984         struct ifnet *ifp = &adapter->arpcom.ac_if;
1985         uint32_t reg_rctl;
1986
1987         reg_rctl = E1000_READ_REG(&adapter->hw, E1000_RCTL);
1988
1989         if (ifp->if_flags & IFF_PROMISC) {
1990                 reg_rctl |= (E1000_RCTL_UPE | E1000_RCTL_MPE);
1991                 /* Turn this on if you want to see bad packets */
1992                 if (em_debug_sbp)
1993                         reg_rctl |= E1000_RCTL_SBP;
1994                 E1000_WRITE_REG(&adapter->hw, E1000_RCTL, reg_rctl);
1995         } else if (ifp->if_flags & IFF_ALLMULTI) {
1996                 reg_rctl |= E1000_RCTL_MPE;
1997                 reg_rctl &= ~E1000_RCTL_UPE;
1998                 E1000_WRITE_REG(&adapter->hw, E1000_RCTL, reg_rctl);
1999         }
2000 }
2001
2002 static void
2003 em_disable_promisc(struct adapter *adapter)
2004 {
2005         uint32_t reg_rctl;
2006
2007         reg_rctl = E1000_READ_REG(&adapter->hw, E1000_RCTL);
2008
2009         reg_rctl &= ~E1000_RCTL_UPE;
2010         reg_rctl &= ~E1000_RCTL_MPE;
2011         reg_rctl &= ~E1000_RCTL_SBP;
2012         E1000_WRITE_REG(&adapter->hw, E1000_RCTL, reg_rctl);
2013 }
2014
2015 static void
2016 em_set_multi(struct adapter *adapter)
2017 {
2018         struct ifnet *ifp = &adapter->arpcom.ac_if;
2019         struct ifmultiaddr *ifma;
2020         uint32_t reg_rctl = 0;
2021         uint8_t *mta;
2022         int mcnt = 0;
2023
2024         mta = adapter->mta;
2025         bzero(mta, ETH_ADDR_LEN * MAX_NUM_MULTICAST_ADDRESSES);
2026
2027         if (adapter->hw.mac.type == e1000_82542 &&
2028             adapter->hw.revision_id == E1000_REVISION_2) {
2029                 reg_rctl = E1000_READ_REG(&adapter->hw, E1000_RCTL);
2030                 if (adapter->hw.bus.pci_cmd_word & CMD_MEM_WRT_INVALIDATE)
2031                         e1000_pci_clear_mwi(&adapter->hw);
2032                 reg_rctl |= E1000_RCTL_RST;
2033                 E1000_WRITE_REG(&adapter->hw, E1000_RCTL, reg_rctl);
2034                 msec_delay(5);
2035         }
2036
2037         TAILQ_FOREACH(ifma, &ifp->if_multiaddrs, ifma_link) {
2038                 if (ifma->ifma_addr->sa_family != AF_LINK)
2039                         continue;
2040
2041                 if (mcnt == MAX_NUM_MULTICAST_ADDRESSES)
2042                         break;
2043
2044                 bcopy(LLADDR((struct sockaddr_dl *)ifma->ifma_addr),
2045                     &mta[mcnt * ETHER_ADDR_LEN], ETHER_ADDR_LEN);
2046                 mcnt++;
2047         }
2048
2049         if (mcnt >= MAX_NUM_MULTICAST_ADDRESSES) {
2050                 reg_rctl = E1000_READ_REG(&adapter->hw, E1000_RCTL);
2051                 reg_rctl |= E1000_RCTL_MPE;
2052                 E1000_WRITE_REG(&adapter->hw, E1000_RCTL, reg_rctl);
2053         } else {
2054                 e1000_update_mc_addr_list(&adapter->hw, mta, mcnt);
2055         }
2056
2057         if (adapter->hw.mac.type == e1000_82542 &&
2058             adapter->hw.revision_id == E1000_REVISION_2) {
2059                 reg_rctl = E1000_READ_REG(&adapter->hw, E1000_RCTL);
2060                 reg_rctl &= ~E1000_RCTL_RST;
2061                 E1000_WRITE_REG(&adapter->hw, E1000_RCTL, reg_rctl);
2062                 msec_delay(5);
2063                 if (adapter->hw.bus.pci_cmd_word & CMD_MEM_WRT_INVALIDATE)
2064                         e1000_pci_set_mwi(&adapter->hw);
2065         }
2066 }
2067
2068 /*
2069  * This routine checks for link status and updates statistics.
2070  */
2071 static void
2072 em_timer(void *xsc)
2073 {
2074         struct adapter *adapter = xsc;
2075         struct ifnet *ifp = &adapter->arpcom.ac_if;
2076
2077         lwkt_serialize_enter(ifp->if_serializer);
2078
2079         em_update_link_status(adapter);
2080         em_update_stats(adapter);
2081
2082         /* Reset LAA into RAR[0] on 82571 */
2083         if (e1000_get_laa_state_82571(&adapter->hw) == TRUE)
2084                 e1000_rar_set(&adapter->hw, adapter->hw.mac.addr, 0);
2085
2086         if (em_display_debug_stats && (ifp->if_flags & IFF_RUNNING))
2087                 em_print_hw_stats(adapter);
2088
2089         em_smartspeed(adapter);
2090
2091         callout_reset(&adapter->timer, hz, em_timer, adapter);
2092
2093         lwkt_serialize_exit(ifp->if_serializer);
2094 }
2095
2096 static void
2097 em_update_link_status(struct adapter *adapter)
2098 {
2099         struct e1000_hw *hw = &adapter->hw;
2100         struct ifnet *ifp = &adapter->arpcom.ac_if;
2101         device_t dev = adapter->dev;
2102         uint32_t link_check = 0;
2103
2104         /* Get the cached link value or read phy for real */
2105         switch (hw->phy.media_type) {
2106         case e1000_media_type_copper:
2107                 if (hw->mac.get_link_status) {
2108                         /* Do the work to read phy */
2109                         e1000_check_for_link(hw);
2110                         link_check = !hw->mac.get_link_status;
2111                         if (link_check) /* ESB2 fix */
2112                                 e1000_cfg_on_link_up(hw);
2113                 } else {
2114                         link_check = TRUE;
2115                 }
2116                 break;
2117
2118         case e1000_media_type_fiber:
2119                 e1000_check_for_link(hw);
2120                 link_check =
2121                         E1000_READ_REG(hw, E1000_STATUS) & E1000_STATUS_LU;
2122                 break;
2123
2124         case e1000_media_type_internal_serdes:
2125                 e1000_check_for_link(hw);
2126                 link_check = adapter->hw.mac.serdes_has_link;
2127                 break;
2128
2129         case e1000_media_type_unknown:
2130         default:
2131                 break;
2132         }
2133
2134         /* Now check for a transition */
2135         if (link_check && adapter->link_active == 0) {
2136                 e1000_get_speed_and_duplex(hw, &adapter->link_speed,
2137                     &adapter->link_duplex);
2138
2139                 /*
2140                  * Check if we should enable/disable SPEED_MODE bit on
2141                  * 82571/82572
2142                  */
2143                 if (adapter->link_speed != SPEED_1000 &&
2144                     (hw->mac.type == e1000_82571 ||
2145                      hw->mac.type == e1000_82572)) {
2146                         int tarc0;
2147
2148                         tarc0 = E1000_READ_REG(hw, E1000_TARC(0));
2149                         tarc0 &= ~SPEED_MODE_BIT;
2150                         E1000_WRITE_REG(hw, E1000_TARC(0), tarc0);
2151                 }
2152                 if (bootverbose) {
2153                         char flowctrl[IFM_ETH_FC_STRLEN];
2154
2155                         e1000_fc2str(hw->fc.current_mode, flowctrl,
2156                             sizeof(flowctrl));
2157                         device_printf(dev, "Link is up %d Mbps %s, "
2158                             "Flow control: %s\n",
2159                             adapter->link_speed,
2160                             (adapter->link_duplex == FULL_DUPLEX) ?
2161                             "Full Duplex" : "Half Duplex",
2162                             flowctrl);
2163                 }
2164                 if (adapter->ifm_flowctrl & IFM_ETH_FORCEPAUSE)
2165                         e1000_force_flowctrl(hw, adapter->ifm_flowctrl);
2166                 adapter->link_active = 1;
2167                 adapter->smartspeed = 0;
2168                 ifp->if_baudrate = adapter->link_speed * 1000000;
2169                 ifp->if_link_state = LINK_STATE_UP;
2170                 if_link_state_change(ifp);
2171         } else if (!link_check && adapter->link_active == 1) {
2172                 ifp->if_baudrate = adapter->link_speed = 0;
2173                 adapter->link_duplex = 0;
2174                 if (bootverbose)
2175                         device_printf(dev, "Link is Down\n");
2176                 adapter->link_active = 0;
2177 #if 0
2178                 /* Link down, disable watchdog */
2179                 if->if_timer = 0;
2180 #endif
2181                 ifp->if_link_state = LINK_STATE_DOWN;
2182                 if_link_state_change(ifp);
2183         }
2184 }
2185
2186 static void
2187 em_stop(struct adapter *adapter)
2188 {
2189         struct ifnet *ifp = &adapter->arpcom.ac_if;
2190         int i;
2191
2192         ASSERT_SERIALIZED(ifp->if_serializer);
2193
2194         em_disable_intr(adapter);
2195
2196         callout_stop(&adapter->timer);
2197         callout_stop(&adapter->tx_fifo_timer);
2198
2199         ifp->if_flags &= ~IFF_RUNNING;
2200         ifq_clr_oactive(&ifp->if_snd);
2201         ifp->if_timer = 0;
2202
2203         e1000_reset_hw(&adapter->hw);
2204         if (adapter->hw.mac.type >= e1000_82544)
2205                 E1000_WRITE_REG(&adapter->hw, E1000_WUC, 0);
2206
2207         for (i = 0; i < adapter->num_tx_desc; i++) {
2208                 struct em_buffer *tx_buffer = &adapter->tx_buffer_area[i];
2209
2210                 if (tx_buffer->m_head != NULL) {
2211                         bus_dmamap_unload(adapter->txtag, tx_buffer->map);
2212                         m_freem(tx_buffer->m_head);
2213                         tx_buffer->m_head = NULL;
2214                 }
2215         }
2216
2217         for (i = 0; i < adapter->num_rx_desc; i++) {
2218                 struct em_buffer *rx_buffer = &adapter->rx_buffer_area[i];
2219
2220                 if (rx_buffer->m_head != NULL) {
2221                         bus_dmamap_unload(adapter->rxtag, rx_buffer->map);
2222                         m_freem(rx_buffer->m_head);
2223                         rx_buffer->m_head = NULL;
2224                 }
2225         }
2226
2227         if (adapter->fmp != NULL)
2228                 m_freem(adapter->fmp);
2229         adapter->fmp = NULL;
2230         adapter->lmp = NULL;
2231
2232         adapter->csum_flags = 0;
2233         adapter->csum_lhlen = 0;
2234         adapter->csum_iphlen = 0;
2235         adapter->csum_thlen = 0;
2236         adapter->csum_mss = 0;
2237         adapter->csum_pktlen = 0;
2238
2239         adapter->tx_dd_head = 0;
2240         adapter->tx_dd_tail = 0;
2241         adapter->tx_nsegs = 0;
2242 }
2243
2244 static int
2245 em_get_hw_info(struct adapter *adapter)
2246 {
2247         device_t dev = adapter->dev;
2248
2249         /* Save off the information about this board */
2250         adapter->hw.vendor_id = pci_get_vendor(dev);
2251         adapter->hw.device_id = pci_get_device(dev);
2252         adapter->hw.revision_id = pci_get_revid(dev);
2253         adapter->hw.subsystem_vendor_id = pci_get_subvendor(dev);
2254         adapter->hw.subsystem_device_id = pci_get_subdevice(dev);
2255
2256         /* Do Shared Code Init and Setup */
2257         if (e1000_set_mac_type(&adapter->hw))
2258                 return ENXIO;
2259         return 0;
2260 }
2261
2262 static int
2263 em_alloc_pci_res(struct adapter *adapter)
2264 {
2265         device_t dev = adapter->dev;
2266         u_int intr_flags;
2267         int val, rid, msi_enable;
2268
2269         /* Enable bus mastering */
2270         pci_enable_busmaster(dev);
2271
2272         adapter->memory_rid = EM_BAR_MEM;
2273         adapter->memory = bus_alloc_resource_any(dev, SYS_RES_MEMORY,
2274                                 &adapter->memory_rid, RF_ACTIVE);
2275         if (adapter->memory == NULL) {
2276                 device_printf(dev, "Unable to allocate bus resource: memory\n");
2277                 return (ENXIO);
2278         }
2279         adapter->osdep.mem_bus_space_tag =
2280             rman_get_bustag(adapter->memory);
2281         adapter->osdep.mem_bus_space_handle =
2282             rman_get_bushandle(adapter->memory);
2283
2284         /* XXX This is quite goofy, it is not actually used */
2285         adapter->hw.hw_addr = (uint8_t *)&adapter->osdep.mem_bus_space_handle;
2286
2287         /* Only older adapters use IO mapping */
2288         if (adapter->hw.mac.type > e1000_82543 &&
2289             adapter->hw.mac.type < e1000_82571) {
2290                 /* Figure our where our IO BAR is ? */
2291                 for (rid = PCIR_BAR(0); rid < PCIR_CARDBUSCIS;) {
2292                         val = pci_read_config(dev, rid, 4);
2293                         if (EM_BAR_TYPE(val) == EM_BAR_TYPE_IO) {
2294                                 adapter->io_rid = rid;
2295                                 break;
2296                         }
2297                         rid += 4;
2298                         /* check for 64bit BAR */
2299                         if (EM_BAR_MEM_TYPE(val) == EM_BAR_MEM_TYPE_64BIT)
2300                                 rid += 4;
2301                 }
2302                 if (rid >= PCIR_CARDBUSCIS) {
2303                         device_printf(dev, "Unable to locate IO BAR\n");
2304                         return (ENXIO);
2305                 }
2306                 adapter->ioport = bus_alloc_resource_any(dev, SYS_RES_IOPORT,
2307                                         &adapter->io_rid, RF_ACTIVE);
2308                 if (adapter->ioport == NULL) {
2309                         device_printf(dev, "Unable to allocate bus resource: "
2310                             "ioport\n");
2311                         return (ENXIO);
2312                 }
2313                 adapter->hw.io_base = 0;
2314                 adapter->osdep.io_bus_space_tag =
2315                     rman_get_bustag(adapter->ioport);
2316                 adapter->osdep.io_bus_space_handle =
2317                     rman_get_bushandle(adapter->ioport);
2318         }
2319
2320         /*
2321          * Don't enable MSI-X on 82574, see:
2322          * 82574 specification update errata #15
2323          *
2324          * Don't enable MSI on PCI/PCI-X chips, see:
2325          * 82540 specification update errata #6
2326          * 82545 specification update errata #4
2327          *
2328          * Don't enable MSI on 82571/82572, see:
2329          * 82571/82572 specification update errata #63
2330          */
2331         msi_enable = em_msi_enable;
2332         if (msi_enable &&
2333             (!pci_is_pcie(dev) ||
2334              adapter->hw.mac.type == e1000_82571 ||
2335              adapter->hw.mac.type == e1000_82572))
2336                 msi_enable = 0;
2337
2338         adapter->intr_type = pci_alloc_1intr(dev, msi_enable,
2339             &adapter->intr_rid, &intr_flags);
2340
2341         if (adapter->intr_type == PCI_INTR_TYPE_LEGACY) {
2342                 int unshared;
2343
2344                 unshared = device_getenv_int(dev, "irq.unshared", 0);
2345                 if (!unshared) {
2346                         adapter->flags |= EM_FLAG_SHARED_INTR;
2347                         if (bootverbose)
2348                                 device_printf(dev, "IRQ shared\n");
2349                 } else {
2350                         intr_flags &= ~RF_SHAREABLE;
2351                         if (bootverbose)
2352                                 device_printf(dev, "IRQ unshared\n");
2353                 }
2354         }
2355
2356         adapter->intr_res = bus_alloc_resource_any(dev, SYS_RES_IRQ,
2357             &adapter->intr_rid, intr_flags);
2358         if (adapter->intr_res == NULL) {
2359                 device_printf(dev, "Unable to allocate bus resource: "
2360                     "interrupt\n");
2361                 return (ENXIO);
2362         }
2363
2364         adapter->hw.bus.pci_cmd_word = pci_read_config(dev, PCIR_COMMAND, 2);
2365         adapter->hw.back = &adapter->osdep;
2366         return (0);
2367 }
2368
2369 static void
2370 em_free_pci_res(struct adapter *adapter)
2371 {
2372         device_t dev = adapter->dev;
2373
2374         if (adapter->intr_res != NULL) {
2375                 bus_release_resource(dev, SYS_RES_IRQ,
2376                     adapter->intr_rid, adapter->intr_res);
2377         }
2378
2379         if (adapter->intr_type == PCI_INTR_TYPE_MSI)
2380                 pci_release_msi(dev);
2381
2382         if (adapter->memory != NULL) {
2383                 bus_release_resource(dev, SYS_RES_MEMORY,
2384                     adapter->memory_rid, adapter->memory);
2385         }
2386
2387         if (adapter->flash != NULL) {
2388                 bus_release_resource(dev, SYS_RES_MEMORY,
2389                     adapter->flash_rid, adapter->flash);
2390         }
2391
2392         if (adapter->ioport != NULL) {
2393                 bus_release_resource(dev, SYS_RES_IOPORT,
2394                     adapter->io_rid, adapter->ioport);
2395         }
2396 }
2397
2398 static int
2399 em_reset(struct adapter *adapter)
2400 {
2401         device_t dev = adapter->dev;
2402         uint16_t rx_buffer_size;
2403         uint32_t pba;
2404
2405         /* When hardware is reset, fifo_head is also reset */
2406         adapter->tx_fifo_head = 0;
2407
2408         /* Set up smart power down as default off on newer adapters. */
2409         if (!em_smart_pwr_down &&
2410             (adapter->hw.mac.type == e1000_82571 ||
2411              adapter->hw.mac.type == e1000_82572)) {
2412                 uint16_t phy_tmp = 0;
2413
2414                 /* Speed up time to link by disabling smart power down. */
2415                 e1000_read_phy_reg(&adapter->hw,
2416                     IGP02E1000_PHY_POWER_MGMT, &phy_tmp);
2417                 phy_tmp &= ~IGP02E1000_PM_SPD;
2418                 e1000_write_phy_reg(&adapter->hw,
2419                     IGP02E1000_PHY_POWER_MGMT, phy_tmp);
2420         }
2421
2422         /*
2423          * Packet Buffer Allocation (PBA)
2424          * Writing PBA sets the receive portion of the buffer
2425          * the remainder is used for the transmit buffer.
2426          *
2427          * Devices before the 82547 had a Packet Buffer of 64K.
2428          *   Default allocation: PBA=48K for Rx, leaving 16K for Tx.
2429          * After the 82547 the buffer was reduced to 40K.
2430          *   Default allocation: PBA=30K for Rx, leaving 10K for Tx.
2431          *   Note: default does not leave enough room for Jumbo Frame >10k.
2432          */
2433         switch (adapter->hw.mac.type) {
2434         case e1000_82547:
2435         case e1000_82547_rev_2: /* 82547: Total Packet Buffer is 40K */
2436                 if (adapter->hw.mac.max_frame_size > 8192)
2437                         pba = E1000_PBA_22K; /* 22K for Rx, 18K for Tx */
2438                 else
2439                         pba = E1000_PBA_30K; /* 30K for Rx, 10K for Tx */
2440                 adapter->tx_fifo_head = 0;
2441                 adapter->tx_head_addr = pba << EM_TX_HEAD_ADDR_SHIFT;
2442                 adapter->tx_fifo_size =
2443                     (E1000_PBA_40K - pba) << EM_PBA_BYTES_SHIFT;
2444                 break;
2445
2446         /* Total Packet Buffer on these is 48K */
2447         case e1000_82571:
2448         case e1000_82572:
2449         case e1000_80003es2lan:
2450                 pba = E1000_PBA_32K; /* 32K for Rx, 16K for Tx */
2451                 break;
2452
2453         case e1000_82573: /* 82573: Total Packet Buffer is 32K */
2454                 pba = E1000_PBA_12K; /* 12K for Rx, 20K for Tx */
2455                 break;
2456
2457         case e1000_82574:
2458         case e1000_82583:
2459                 pba = E1000_PBA_20K; /* 20K for Rx, 20K for Tx */
2460                 break;
2461
2462         case e1000_ich8lan:
2463                 pba = E1000_PBA_8K;
2464                 break;
2465
2466         case e1000_ich9lan:
2467         case e1000_ich10lan:
2468 #define E1000_PBA_10K   0x000A
2469                 pba = E1000_PBA_10K;
2470                 break;
2471
2472         case e1000_pchlan:
2473         case e1000_pch2lan:
2474         case e1000_pch_lpt:
2475         case e1000_pch_spt:
2476                 pba = E1000_PBA_26K;
2477                 break;
2478
2479         default:
2480                 /* Devices before 82547 had a Packet Buffer of 64K.   */
2481                 if (adapter->hw.mac.max_frame_size > 8192)
2482                         pba = E1000_PBA_40K; /* 40K for Rx, 24K for Tx */
2483                 else
2484                         pba = E1000_PBA_48K; /* 48K for Rx, 16K for Tx */
2485         }
2486         E1000_WRITE_REG(&adapter->hw, E1000_PBA, pba);
2487
2488         /*
2489          * These parameters control the automatic generation (Tx) and
2490          * response (Rx) to Ethernet PAUSE frames.
2491          * - High water mark should allow for at least two frames to be
2492          *   received after sending an XOFF.
2493          * - Low water mark works best when it is very near the high water mark.
2494          *   This allows the receiver to restart by sending XON when it has
2495          *   drained a bit. Here we use an arbitary value of 1500 which will
2496          *   restart after one full frame is pulled from the buffer. There
2497          *   could be several smaller frames in the buffer and if so they will
2498          *   not trigger the XON until their total number reduces the buffer
2499          *   by 1500.
2500          * - The pause time is fairly large at 1000 x 512ns = 512 usec.
2501          */
2502         rx_buffer_size =
2503                 (E1000_READ_REG(&adapter->hw, E1000_PBA) & 0xffff) << 10;
2504
2505         adapter->hw.fc.high_water = rx_buffer_size -
2506             roundup2(adapter->hw.mac.max_frame_size, 1024);
2507         adapter->hw.fc.low_water = adapter->hw.fc.high_water - 1500;
2508
2509         if (adapter->hw.mac.type == e1000_80003es2lan)
2510                 adapter->hw.fc.pause_time = 0xFFFF;
2511         else
2512                 adapter->hw.fc.pause_time = EM_FC_PAUSE_TIME;
2513
2514         adapter->hw.fc.send_xon = TRUE;
2515
2516         adapter->hw.fc.requested_mode = e1000_ifmedia2fc(adapter->ifm_flowctrl);
2517
2518         /*
2519          * Device specific overrides/settings
2520          */
2521         switch (adapter->hw.mac.type) {
2522         case e1000_pchlan:
2523                 KASSERT(adapter->hw.fc.requested_mode == e1000_fc_rx_pause ||
2524                     adapter->hw.fc.requested_mode == e1000_fc_none,
2525                     ("unsupported flow control on PCH %d",
2526                      adapter->hw.fc.requested_mode));
2527                 adapter->hw.fc.pause_time = 0xFFFF; /* override */
2528                 if (adapter->arpcom.ac_if.if_mtu > ETHERMTU) {
2529                         adapter->hw.fc.high_water = 0x3500;
2530                         adapter->hw.fc.low_water = 0x1500;
2531                 } else {
2532                         adapter->hw.fc.high_water = 0x5000;
2533                         adapter->hw.fc.low_water = 0x3000;
2534                 }
2535                 adapter->hw.fc.refresh_time = 0x1000;
2536                 break;
2537
2538         case e1000_pch2lan:
2539         case e1000_pch_lpt:
2540         case e1000_pch_spt:
2541                 adapter->hw.fc.high_water = 0x5C20;
2542                 adapter->hw.fc.low_water = 0x5048;
2543                 adapter->hw.fc.pause_time = 0x0650;
2544                 adapter->hw.fc.refresh_time = 0x0400;
2545                 /* Jumbos need adjusted PBA */
2546                 if (adapter->arpcom.ac_if.if_mtu > ETHERMTU)
2547                         E1000_WRITE_REG(&adapter->hw, E1000_PBA, 12);
2548                 else
2549                         E1000_WRITE_REG(&adapter->hw, E1000_PBA, 26);
2550                 break;
2551
2552         case e1000_ich9lan:
2553         case e1000_ich10lan:
2554                 if (adapter->arpcom.ac_if.if_mtu > ETHERMTU) {
2555                         adapter->hw.fc.high_water = 0x2800;
2556                         adapter->hw.fc.low_water =
2557                             adapter->hw.fc.high_water - 8;
2558                         break;
2559                 }
2560                 /* FALL THROUGH */
2561         default:
2562                 if (adapter->hw.mac.type == e1000_80003es2lan)
2563                         adapter->hw.fc.pause_time = 0xFFFF;
2564                 break;
2565         }
2566
2567         /* Issue a global reset */
2568         e1000_reset_hw(&adapter->hw);
2569         if (adapter->hw.mac.type >= e1000_82544)
2570                 E1000_WRITE_REG(&adapter->hw, E1000_WUC, 0);
2571         em_disable_aspm(adapter);
2572
2573         if (e1000_init_hw(&adapter->hw) < 0) {
2574                 device_printf(dev, "Hardware Initialization Failed\n");
2575                 return (EIO);
2576         }
2577
2578         E1000_WRITE_REG(&adapter->hw, E1000_VET, ETHERTYPE_VLAN);
2579         e1000_get_phy_info(&adapter->hw);
2580         e1000_check_for_link(&adapter->hw);
2581
2582         return (0);
2583 }
2584
2585 static void
2586 em_setup_ifp(struct adapter *adapter)
2587 {
2588         struct ifnet *ifp = &adapter->arpcom.ac_if;
2589
2590         if_initname(ifp, device_get_name(adapter->dev),
2591                     device_get_unit(adapter->dev));
2592         ifp->if_softc = adapter;
2593         ifp->if_flags = IFF_BROADCAST | IFF_SIMPLEX | IFF_MULTICAST;
2594         ifp->if_init =  em_init;
2595         ifp->if_ioctl = em_ioctl;
2596         ifp->if_start = em_start;
2597 #ifdef IFPOLL_ENABLE
2598         ifp->if_npoll = em_npoll;
2599 #endif
2600         ifp->if_watchdog = em_watchdog;
2601         ifp->if_nmbclusters = adapter->num_rx_desc;
2602         ifq_set_maxlen(&ifp->if_snd, adapter->num_tx_desc - 1);
2603         ifq_set_ready(&ifp->if_snd);
2604
2605         ether_ifattach(ifp, adapter->hw.mac.addr, NULL);
2606
2607         ifp->if_capabilities = IFCAP_VLAN_HWTAGGING | IFCAP_VLAN_MTU;
2608         if (adapter->hw.mac.type >= e1000_82543)
2609                 ifp->if_capabilities |= IFCAP_HWCSUM;
2610         if (adapter->flags & EM_FLAG_TSO)
2611                 ifp->if_capabilities |= IFCAP_TSO;
2612         ifp->if_capenable = ifp->if_capabilities;
2613
2614         if (ifp->if_capenable & IFCAP_TXCSUM)
2615                 ifp->if_hwassist |= EM_CSUM_FEATURES;
2616         if (ifp->if_capenable & IFCAP_TSO)
2617                 ifp->if_hwassist |= CSUM_TSO;
2618
2619         /*
2620          * Tell the upper layer(s) we support long frames.
2621          */
2622         ifp->if_data.ifi_hdrlen = sizeof(struct ether_vlan_header);
2623
2624         /*
2625          * Specify the media types supported by this adapter and register
2626          * callbacks to update media and link information
2627          */
2628         if (adapter->hw.phy.media_type == e1000_media_type_fiber ||
2629             adapter->hw.phy.media_type == e1000_media_type_internal_serdes) {
2630                 u_char fiber_type = IFM_1000_SX; /* default type */
2631
2632                 if (adapter->hw.mac.type == e1000_82545)
2633                         fiber_type = IFM_1000_LX;
2634                 ifmedia_add(&adapter->media, IFM_ETHER | fiber_type | IFM_FDX,
2635                             0, NULL);
2636         } else {
2637                 ifmedia_add(&adapter->media, IFM_ETHER | IFM_10_T, 0, NULL);
2638                 ifmedia_add(&adapter->media, IFM_ETHER | IFM_10_T | IFM_FDX,
2639                             0, NULL);
2640                 ifmedia_add(&adapter->media, IFM_ETHER | IFM_100_TX,
2641                             0, NULL);
2642                 ifmedia_add(&adapter->media, IFM_ETHER | IFM_100_TX | IFM_FDX,
2643                             0, NULL);
2644                 if (adapter->hw.phy.type != e1000_phy_ife) {
2645                         ifmedia_add(&adapter->media,
2646                                 IFM_ETHER | IFM_1000_T | IFM_FDX, 0, NULL);
2647                 }
2648         }
2649         ifmedia_add(&adapter->media, IFM_ETHER | IFM_AUTO, 0, NULL);
2650         ifmedia_set(&adapter->media, IFM_ETHER | IFM_AUTO |
2651             adapter->ifm_flowctrl);
2652 }
2653
2654
2655 /*
2656  * Workaround for SmartSpeed on 82541 and 82547 controllers
2657  */
2658 static void
2659 em_smartspeed(struct adapter *adapter)
2660 {
2661         uint16_t phy_tmp;
2662
2663         if (adapter->link_active || adapter->hw.phy.type != e1000_phy_igp ||
2664             adapter->hw.mac.autoneg == 0 ||
2665             (adapter->hw.phy.autoneg_advertised & ADVERTISE_1000_FULL) == 0)
2666                 return;
2667
2668         if (adapter->smartspeed == 0) {
2669                 /*
2670                  * If Master/Slave config fault is asserted twice,
2671                  * we assume back-to-back
2672                  */
2673                 e1000_read_phy_reg(&adapter->hw, PHY_1000T_STATUS, &phy_tmp);
2674                 if (!(phy_tmp & SR_1000T_MS_CONFIG_FAULT))
2675                         return;
2676                 e1000_read_phy_reg(&adapter->hw, PHY_1000T_STATUS, &phy_tmp);
2677                 if (phy_tmp & SR_1000T_MS_CONFIG_FAULT) {
2678                         e1000_read_phy_reg(&adapter->hw,
2679                             PHY_1000T_CTRL, &phy_tmp);
2680                         if (phy_tmp & CR_1000T_MS_ENABLE) {
2681                                 phy_tmp &= ~CR_1000T_MS_ENABLE;
2682                                 e1000_write_phy_reg(&adapter->hw,
2683                                     PHY_1000T_CTRL, phy_tmp);
2684                                 adapter->smartspeed++;
2685                                 if (adapter->hw.mac.autoneg &&
2686                                     !e1000_phy_setup_autoneg(&adapter->hw) &&
2687                                     !e1000_read_phy_reg(&adapter->hw,
2688                                      PHY_CONTROL, &phy_tmp)) {
2689                                         phy_tmp |= MII_CR_AUTO_NEG_EN |
2690                                                    MII_CR_RESTART_AUTO_NEG;
2691                                         e1000_write_phy_reg(&adapter->hw,
2692                                             PHY_CONTROL, phy_tmp);
2693                                 }
2694                         }
2695                 }
2696                 return;
2697         } else if (adapter->smartspeed == EM_SMARTSPEED_DOWNSHIFT) {
2698                 /* If still no link, perhaps using 2/3 pair cable */
2699                 e1000_read_phy_reg(&adapter->hw, PHY_1000T_CTRL, &phy_tmp);
2700                 phy_tmp |= CR_1000T_MS_ENABLE;
2701                 e1000_write_phy_reg(&adapter->hw, PHY_1000T_CTRL, phy_tmp);
2702                 if (adapter->hw.mac.autoneg &&
2703                     !e1000_phy_setup_autoneg(&adapter->hw) &&
2704                     !e1000_read_phy_reg(&adapter->hw, PHY_CONTROL, &phy_tmp)) {
2705                         phy_tmp |= MII_CR_AUTO_NEG_EN | MII_CR_RESTART_AUTO_NEG;
2706                         e1000_write_phy_reg(&adapter->hw, PHY_CONTROL, phy_tmp);
2707                 }
2708         }
2709
2710         /* Restart process after EM_SMARTSPEED_MAX iterations */
2711         if (adapter->smartspeed++ == EM_SMARTSPEED_MAX)
2712                 adapter->smartspeed = 0;
2713 }
2714
2715 static int
2716 em_dma_malloc(struct adapter *adapter, bus_size_t size,
2717               struct em_dma_alloc *dma)
2718 {
2719         dma->dma_vaddr = bus_dmamem_coherent_any(adapter->parent_dtag,
2720                                 EM_DBA_ALIGN, size, BUS_DMA_WAITOK,
2721                                 &dma->dma_tag, &dma->dma_map,
2722                                 &dma->dma_paddr);
2723         if (dma->dma_vaddr == NULL)
2724                 return ENOMEM;
2725         else
2726                 return 0;
2727 }
2728
2729 static void
2730 em_dma_free(struct adapter *adapter, struct em_dma_alloc *dma)
2731 {
2732         if (dma->dma_tag == NULL)
2733                 return;
2734         bus_dmamap_unload(dma->dma_tag, dma->dma_map);
2735         bus_dmamem_free(dma->dma_tag, dma->dma_vaddr, dma->dma_map);
2736         bus_dma_tag_destroy(dma->dma_tag);
2737 }
2738
2739 static int
2740 em_create_tx_ring(struct adapter *adapter)
2741 {
2742         device_t dev = adapter->dev;
2743         struct em_buffer *tx_buffer;
2744         int error, i;
2745
2746         adapter->tx_buffer_area =
2747                 kmalloc(sizeof(struct em_buffer) * adapter->num_tx_desc,
2748                         M_DEVBUF, M_WAITOK | M_ZERO);
2749
2750         /*
2751          * Create DMA tags for tx buffers
2752          */
2753         error = bus_dma_tag_create(adapter->parent_dtag, /* parent */
2754                         1, 0,                   /* alignment, bounds */
2755                         BUS_SPACE_MAXADDR,      /* lowaddr */
2756                         BUS_SPACE_MAXADDR,      /* highaddr */
2757                         NULL, NULL,             /* filter, filterarg */
2758                         EM_TSO_SIZE,            /* maxsize */
2759                         EM_MAX_SCATTER,         /* nsegments */
2760                         PAGE_SIZE,              /* maxsegsize */
2761                         BUS_DMA_WAITOK | BUS_DMA_ALLOCNOW |
2762                         BUS_DMA_ONEBPAGE,       /* flags */
2763                         &adapter->txtag);
2764         if (error) {
2765                 device_printf(dev, "Unable to allocate TX DMA tag\n");
2766                 kfree(adapter->tx_buffer_area, M_DEVBUF);
2767                 adapter->tx_buffer_area = NULL;
2768                 return error;
2769         }
2770
2771         /*
2772          * Create DMA maps for tx buffers
2773          */
2774         for (i = 0; i < adapter->num_tx_desc; i++) {
2775                 tx_buffer = &adapter->tx_buffer_area[i];
2776
2777                 error = bus_dmamap_create(adapter->txtag,
2778                                           BUS_DMA_WAITOK | BUS_DMA_ONEBPAGE,
2779                                           &tx_buffer->map);
2780                 if (error) {
2781                         device_printf(dev, "Unable to create TX DMA map\n");
2782                         em_destroy_tx_ring(adapter, i);
2783                         return error;
2784                 }
2785         }
2786         return (0);
2787 }
2788
2789 static void
2790 em_init_tx_ring(struct adapter *adapter)
2791 {
2792         /* Clear the old ring contents */
2793         bzero(adapter->tx_desc_base,
2794             (sizeof(struct e1000_tx_desc)) * adapter->num_tx_desc);
2795
2796         /* Reset state */
2797         adapter->next_avail_tx_desc = 0;
2798         adapter->next_tx_to_clean = 0;
2799         adapter->num_tx_desc_avail = adapter->num_tx_desc;
2800 }
2801
2802 static void
2803 em_init_tx_unit(struct adapter *adapter)
2804 {
2805         uint32_t tctl, tarc, tipg = 0;
2806         uint64_t bus_addr;
2807
2808         /* Setup the Base and Length of the Tx Descriptor Ring */
2809         bus_addr = adapter->txdma.dma_paddr;
2810         E1000_WRITE_REG(&adapter->hw, E1000_TDLEN(0),
2811             adapter->num_tx_desc * sizeof(struct e1000_tx_desc));
2812         E1000_WRITE_REG(&adapter->hw, E1000_TDBAH(0),
2813             (uint32_t)(bus_addr >> 32));
2814         E1000_WRITE_REG(&adapter->hw, E1000_TDBAL(0),
2815             (uint32_t)bus_addr);
2816         /* Setup the HW Tx Head and Tail descriptor pointers */
2817         E1000_WRITE_REG(&adapter->hw, E1000_TDT(0), 0);
2818         E1000_WRITE_REG(&adapter->hw, E1000_TDH(0), 0);
2819
2820         /* Set the default values for the Tx Inter Packet Gap timer */
2821         switch (adapter->hw.mac.type) {
2822         case e1000_82542:
2823                 tipg = DEFAULT_82542_TIPG_IPGT;
2824                 tipg |= DEFAULT_82542_TIPG_IPGR1 << E1000_TIPG_IPGR1_SHIFT;
2825                 tipg |= DEFAULT_82542_TIPG_IPGR2 << E1000_TIPG_IPGR2_SHIFT;
2826                 break;
2827
2828         case e1000_80003es2lan:
2829                 tipg = DEFAULT_82543_TIPG_IPGR1;
2830                 tipg |= DEFAULT_80003ES2LAN_TIPG_IPGR2 <<
2831                     E1000_TIPG_IPGR2_SHIFT;
2832                 break;
2833
2834         default:
2835                 if (adapter->hw.phy.media_type == e1000_media_type_fiber ||
2836                     adapter->hw.phy.media_type ==
2837                     e1000_media_type_internal_serdes)
2838                         tipg = DEFAULT_82543_TIPG_IPGT_FIBER;
2839                 else
2840                         tipg = DEFAULT_82543_TIPG_IPGT_COPPER;
2841                 tipg |= DEFAULT_82543_TIPG_IPGR1 << E1000_TIPG_IPGR1_SHIFT;
2842                 tipg |= DEFAULT_82543_TIPG_IPGR2 << E1000_TIPG_IPGR2_SHIFT;
2843                 break;
2844         }
2845
2846         E1000_WRITE_REG(&adapter->hw, E1000_TIPG, tipg);
2847
2848         /* NOTE: 0 is not allowed for TIDV */
2849         E1000_WRITE_REG(&adapter->hw, E1000_TIDV, 1);
2850         if(adapter->hw.mac.type >= e1000_82540)
2851                 E1000_WRITE_REG(&adapter->hw, E1000_TADV, 0);
2852
2853         if (adapter->hw.mac.type == e1000_82571 ||
2854             adapter->hw.mac.type == e1000_82572) {
2855                 tarc = E1000_READ_REG(&adapter->hw, E1000_TARC(0));
2856                 tarc |= SPEED_MODE_BIT;
2857                 E1000_WRITE_REG(&adapter->hw, E1000_TARC(0), tarc);
2858         } else if (adapter->hw.mac.type == e1000_80003es2lan) {
2859                 tarc = E1000_READ_REG(&adapter->hw, E1000_TARC(0));
2860                 tarc |= 1;
2861                 E1000_WRITE_REG(&adapter->hw, E1000_TARC(0), tarc);
2862                 tarc = E1000_READ_REG(&adapter->hw, E1000_TARC(1));
2863                 tarc |= 1;
2864                 E1000_WRITE_REG(&adapter->hw, E1000_TARC(1), tarc);
2865         }
2866
2867         /* Program the Transmit Control Register */
2868         tctl = E1000_READ_REG(&adapter->hw, E1000_TCTL);
2869         tctl &= ~E1000_TCTL_CT;
2870         tctl |= E1000_TCTL_PSP | E1000_TCTL_RTLC | E1000_TCTL_EN |
2871                 (E1000_COLLISION_THRESHOLD << E1000_CT_SHIFT);
2872
2873         if (adapter->hw.mac.type >= e1000_82571)
2874                 tctl |= E1000_TCTL_MULR;
2875
2876         /* This write will effectively turn on the transmit unit. */
2877         E1000_WRITE_REG(&adapter->hw, E1000_TCTL, tctl);
2878
2879         if (adapter->hw.mac.type == e1000_82571 ||
2880             adapter->hw.mac.type == e1000_82572 ||
2881             adapter->hw.mac.type == e1000_80003es2lan) {
2882                 /* Bit 28 of TARC1 must be cleared when MULR is enabled */
2883                 tarc = E1000_READ_REG(&adapter->hw, E1000_TARC(1));
2884                 tarc &= ~(1 << 28);
2885                 E1000_WRITE_REG(&adapter->hw, E1000_TARC(1), tarc);
2886         }
2887 }
2888
2889 static void
2890 em_destroy_tx_ring(struct adapter *adapter, int ndesc)
2891 {
2892         struct em_buffer *tx_buffer;
2893         int i;
2894
2895         if (adapter->tx_buffer_area == NULL)
2896                 return;
2897
2898         for (i = 0; i < ndesc; i++) {
2899                 tx_buffer = &adapter->tx_buffer_area[i];
2900
2901                 KKASSERT(tx_buffer->m_head == NULL);
2902                 bus_dmamap_destroy(adapter->txtag, tx_buffer->map);
2903         }
2904         bus_dma_tag_destroy(adapter->txtag);
2905
2906         kfree(adapter->tx_buffer_area, M_DEVBUF);
2907         adapter->tx_buffer_area = NULL;
2908 }
2909
2910 /*
2911  * The offload context needs to be set when we transfer the first
2912  * packet of a particular protocol (TCP/UDP).  This routine has been
2913  * enhanced to deal with inserted VLAN headers.
2914  *
2915  * If the new packet's ether header length, ip header length and
2916  * csum offloading type are same as the previous packet, we should
2917  * avoid allocating a new csum context descriptor; mainly to take
2918  * advantage of the pipeline effect of the TX data read request.
2919  *
2920  * This function returns number of TX descrptors allocated for
2921  * csum context.
2922  */
2923 static int
2924 em_txcsum(struct adapter *adapter, struct mbuf *mp,
2925           uint32_t *txd_upper, uint32_t *txd_lower)
2926 {
2927         struct e1000_context_desc *TXD;
2928         int curr_txd, ehdrlen, csum_flags;
2929         uint32_t cmd, hdr_len, ip_hlen;
2930
2931         csum_flags = mp->m_pkthdr.csum_flags & EM_CSUM_FEATURES;
2932         ip_hlen = mp->m_pkthdr.csum_iphlen;
2933         ehdrlen = mp->m_pkthdr.csum_lhlen;
2934
2935         if (adapter->csum_lhlen == ehdrlen &&
2936             adapter->csum_iphlen == ip_hlen &&
2937             adapter->csum_flags == csum_flags) {
2938                 /*
2939                  * Same csum offload context as the previous packets;
2940                  * just return.
2941                  */
2942                 *txd_upper = adapter->csum_txd_upper;
2943                 *txd_lower = adapter->csum_txd_lower;
2944                 return 0;
2945         }
2946
2947         /*
2948          * Setup a new csum offload context.
2949          */
2950
2951         curr_txd = adapter->next_avail_tx_desc;
2952         TXD = (struct e1000_context_desc *)&adapter->tx_desc_base[curr_txd];
2953
2954         cmd = 0;
2955
2956         /* Setup of IP header checksum. */
2957         if (csum_flags & CSUM_IP) {
2958                 /*
2959                  * Start offset for header checksum calculation.
2960                  * End offset for header checksum calculation.
2961                  * Offset of place to put the checksum.
2962                  */
2963                 TXD->lower_setup.ip_fields.ipcss = ehdrlen;
2964                 TXD->lower_setup.ip_fields.ipcse =
2965                     htole16(ehdrlen + ip_hlen - 1);
2966                 TXD->lower_setup.ip_fields.ipcso =
2967                     ehdrlen + offsetof(struct ip, ip_sum);
2968                 cmd |= E1000_TXD_CMD_IP;
2969                 *txd_upper |= E1000_TXD_POPTS_IXSM << 8;
2970         }
2971         hdr_len = ehdrlen + ip_hlen;
2972
2973         if (csum_flags & CSUM_TCP) {
2974                 /*
2975                  * Start offset for payload checksum calculation.
2976                  * End offset for payload checksum calculation.
2977                  * Offset of place to put the checksum.
2978                  */
2979                 TXD->upper_setup.tcp_fields.tucss = hdr_len;
2980                 TXD->upper_setup.tcp_fields.tucse = htole16(0);
2981                 TXD->upper_setup.tcp_fields.tucso =
2982                     hdr_len + offsetof(struct tcphdr, th_sum);
2983                 cmd |= E1000_TXD_CMD_TCP;
2984                 *txd_upper |= E1000_TXD_POPTS_TXSM << 8;
2985         } else if (csum_flags & CSUM_UDP) {
2986                 /*
2987                  * Start offset for header checksum calculation.
2988                  * End offset for header checksum calculation.
2989                  * Offset of place to put the checksum.
2990                  */
2991                 TXD->upper_setup.tcp_fields.tucss = hdr_len;
2992                 TXD->upper_setup.tcp_fields.tucse = htole16(0);
2993                 TXD->upper_setup.tcp_fields.tucso =
2994                     hdr_len + offsetof(struct udphdr, uh_sum);
2995                 *txd_upper |= E1000_TXD_POPTS_TXSM << 8;
2996         }
2997
2998         *txd_lower = E1000_TXD_CMD_DEXT |       /* Extended descr type */
2999                      E1000_TXD_DTYP_D;          /* Data descr */
3000
3001         /* Save the information for this csum offloading context */
3002         adapter->csum_lhlen = ehdrlen;
3003         adapter->csum_iphlen = ip_hlen;
3004         adapter->csum_flags = csum_flags;
3005         adapter->csum_txd_upper = *txd_upper;
3006         adapter->csum_txd_lower = *txd_lower;
3007
3008         TXD->tcp_seg_setup.data = htole32(0);
3009         TXD->cmd_and_length =
3010             htole32(E1000_TXD_CMD_IFCS | E1000_TXD_CMD_DEXT | cmd);
3011
3012         if (++curr_txd == adapter->num_tx_desc)
3013                 curr_txd = 0;
3014
3015         KKASSERT(adapter->num_tx_desc_avail > 0);
3016         adapter->num_tx_desc_avail--;
3017
3018         adapter->next_avail_tx_desc = curr_txd;
3019         return 1;
3020 }
3021
3022 static void
3023 em_txeof(struct adapter *adapter)
3024 {
3025         struct ifnet *ifp = &adapter->arpcom.ac_if;
3026         struct em_buffer *tx_buffer;
3027         int first, num_avail;
3028
3029         if (adapter->tx_dd_head == adapter->tx_dd_tail)
3030                 return;
3031
3032         if (adapter->num_tx_desc_avail == adapter->num_tx_desc)
3033                 return;
3034
3035         num_avail = adapter->num_tx_desc_avail;
3036         first = adapter->next_tx_to_clean;
3037
3038         while (adapter->tx_dd_head != adapter->tx_dd_tail) {
3039                 struct e1000_tx_desc *tx_desc;
3040                 int dd_idx = adapter->tx_dd[adapter->tx_dd_head];
3041
3042                 tx_desc = &adapter->tx_desc_base[dd_idx];
3043                 if (tx_desc->upper.fields.status & E1000_TXD_STAT_DD) {
3044                         EM_INC_TXDD_IDX(adapter->tx_dd_head);
3045
3046                         if (++dd_idx == adapter->num_tx_desc)
3047                                 dd_idx = 0;
3048
3049                         while (first != dd_idx) {
3050                                 logif(pkt_txclean);
3051
3052                                 num_avail++;
3053
3054                                 tx_buffer = &adapter->tx_buffer_area[first];
3055                                 if (tx_buffer->m_head) {
3056                                         bus_dmamap_unload(adapter->txtag,
3057                                                           tx_buffer->map);
3058                                         m_freem(tx_buffer->m_head);
3059                                         tx_buffer->m_head = NULL;
3060                                 }
3061
3062                                 if (++first == adapter->num_tx_desc)
3063                                         first = 0;
3064                         }
3065                 } else {
3066                         break;
3067                 }
3068         }
3069         adapter->next_tx_to_clean = first;
3070         adapter->num_tx_desc_avail = num_avail;
3071
3072         if (adapter->tx_dd_head == adapter->tx_dd_tail) {
3073                 adapter->tx_dd_head = 0;
3074                 adapter->tx_dd_tail = 0;
3075         }
3076
3077         if (!EM_IS_OACTIVE(adapter)) {
3078                 ifq_clr_oactive(&ifp->if_snd);
3079
3080                 /* All clean, turn off the timer */
3081                 if (adapter->num_tx_desc_avail == adapter->num_tx_desc)
3082                         ifp->if_timer = 0;
3083         }
3084 }
3085
3086 static void
3087 em_tx_collect(struct adapter *adapter)
3088 {
3089         struct ifnet *ifp = &adapter->arpcom.ac_if;
3090         struct em_buffer *tx_buffer;
3091         int tdh, first, num_avail, dd_idx = -1;
3092
3093         if (adapter->num_tx_desc_avail == adapter->num_tx_desc)
3094                 return;
3095
3096         tdh = E1000_READ_REG(&adapter->hw, E1000_TDH(0));
3097         if (tdh == adapter->next_tx_to_clean)
3098                 return;
3099
3100         if (adapter->tx_dd_head != adapter->tx_dd_tail)
3101                 dd_idx = adapter->tx_dd[adapter->tx_dd_head];
3102
3103         num_avail = adapter->num_tx_desc_avail;
3104         first = adapter->next_tx_to_clean;
3105
3106         while (first != tdh) {
3107                 logif(pkt_txclean);
3108
3109                 num_avail++;
3110
3111                 tx_buffer = &adapter->tx_buffer_area[first];
3112                 if (tx_buffer->m_head) {
3113                         bus_dmamap_unload(adapter->txtag,
3114                                           tx_buffer->map);
3115                         m_freem(tx_buffer->m_head);
3116                         tx_buffer->m_head = NULL;
3117                 }
3118
3119                 if (first == dd_idx) {
3120                         EM_INC_TXDD_IDX(adapter->tx_dd_head);
3121                         if (adapter->tx_dd_head == adapter->tx_dd_tail) {
3122                                 adapter->tx_dd_head = 0;
3123                                 adapter->tx_dd_tail = 0;
3124                                 dd_idx = -1;
3125                         } else {
3126                                 dd_idx = adapter->tx_dd[adapter->tx_dd_head];
3127                         }
3128                 }
3129
3130                 if (++first == adapter->num_tx_desc)
3131                         first = 0;
3132         }
3133         adapter->next_tx_to_clean = first;
3134         adapter->num_tx_desc_avail = num_avail;
3135
3136         if (!EM_IS_OACTIVE(adapter)) {
3137                 ifq_clr_oactive(&ifp->if_snd);
3138
3139                 /* All clean, turn off the timer */
3140                 if (adapter->num_tx_desc_avail == adapter->num_tx_desc)
3141                         ifp->if_timer = 0;
3142         }
3143 }
3144
3145 /*
3146  * When Link is lost sometimes there is work still in the TX ring
3147  * which will result in a watchdog, rather than allow that do an
3148  * attempted cleanup and then reinit here.  Note that this has been
3149  * seens mostly with fiber adapters.
3150  */
3151 static void
3152 em_tx_purge(struct adapter *adapter)
3153 {
3154         struct ifnet *ifp = &adapter->arpcom.ac_if;
3155
3156         if (!adapter->link_active && ifp->if_timer) {
3157                 em_tx_collect(adapter);
3158                 if (ifp->if_timer) {
3159                         if_printf(ifp, "Link lost, TX pending, reinit\n");
3160                         ifp->if_timer = 0;
3161                         em_init(adapter);
3162                 }
3163         }
3164 }
3165
3166 static int
3167 em_newbuf(struct adapter *adapter, int i, int init)
3168 {
3169         struct mbuf *m;
3170         bus_dma_segment_t seg;
3171         bus_dmamap_t map;
3172         struct em_buffer *rx_buffer;
3173         int error, nseg;
3174
3175         m = m_getcl(init ? M_WAITOK : M_NOWAIT, MT_DATA, M_PKTHDR);
3176         if (m == NULL) {
3177                 adapter->mbuf_cluster_failed++;
3178                 if (init) {
3179                         if_printf(&adapter->arpcom.ac_if,
3180                                   "Unable to allocate RX mbuf\n");
3181                 }
3182                 return (ENOBUFS);
3183         }
3184         m->m_len = m->m_pkthdr.len = MCLBYTES;
3185
3186         if (adapter->hw.mac.max_frame_size <= MCLBYTES - ETHER_ALIGN)
3187                 m_adj(m, ETHER_ALIGN);
3188
3189         error = bus_dmamap_load_mbuf_segment(adapter->rxtag,
3190                         adapter->rx_sparemap, m,
3191                         &seg, 1, &nseg, BUS_DMA_NOWAIT);
3192         if (error) {
3193                 m_freem(m);
3194                 if (init) {
3195                         if_printf(&adapter->arpcom.ac_if,
3196                                   "Unable to load RX mbuf\n");
3197                 }
3198                 return (error);
3199         }
3200
3201         rx_buffer = &adapter->rx_buffer_area[i];
3202         if (rx_buffer->m_head != NULL)
3203                 bus_dmamap_unload(adapter->rxtag, rx_buffer->map);
3204
3205         map = rx_buffer->map;
3206         rx_buffer->map = adapter->rx_sparemap;
3207         adapter->rx_sparemap = map;
3208
3209         rx_buffer->m_head = m;
3210
3211         adapter->rx_desc_base[i].buffer_addr = htole64(seg.ds_addr);
3212         return (0);
3213 }
3214
3215 static int
3216 em_create_rx_ring(struct adapter *adapter)
3217 {
3218         device_t dev = adapter->dev;
3219         struct em_buffer *rx_buffer;
3220         int i, error;
3221
3222         adapter->rx_buffer_area =
3223                 kmalloc(sizeof(struct em_buffer) * adapter->num_rx_desc,
3224                         M_DEVBUF, M_WAITOK | M_ZERO);
3225
3226         /*
3227          * Create DMA tag for rx buffers
3228          */
3229         error = bus_dma_tag_create(adapter->parent_dtag, /* parent */
3230                         1, 0,                   /* alignment, bounds */
3231                         BUS_SPACE_MAXADDR,      /* lowaddr */
3232                         BUS_SPACE_MAXADDR,      /* highaddr */
3233                         NULL, NULL,             /* filter, filterarg */
3234                         MCLBYTES,               /* maxsize */
3235                         1,                      /* nsegments */
3236                         MCLBYTES,               /* maxsegsize */
3237                         BUS_DMA_WAITOK | BUS_DMA_ALLOCNOW, /* flags */
3238                         &adapter->rxtag);
3239         if (error) {
3240                 device_printf(dev, "Unable to allocate RX DMA tag\n");
3241                 kfree(adapter->rx_buffer_area, M_DEVBUF);
3242                 adapter->rx_buffer_area = NULL;
3243                 return error;
3244         }
3245
3246         /*
3247          * Create spare DMA map for rx buffers
3248          */
3249         error = bus_dmamap_create(adapter->rxtag, BUS_DMA_WAITOK,
3250                                   &adapter->rx_sparemap);
3251         if (error) {
3252                 device_printf(dev, "Unable to create spare RX DMA map\n");
3253                 bus_dma_tag_destroy(adapter->rxtag);
3254                 kfree(adapter->rx_buffer_area, M_DEVBUF);
3255                 adapter->rx_buffer_area = NULL;
3256                 return error;
3257         }
3258
3259         /*
3260          * Create DMA maps for rx buffers
3261          */
3262         for (i = 0; i < adapter->num_rx_desc; i++) {
3263                 rx_buffer = &adapter->rx_buffer_area[i];
3264
3265                 error = bus_dmamap_create(adapter->rxtag, BUS_DMA_WAITOK,
3266                                           &rx_buffer->map);
3267                 if (error) {
3268                         device_printf(dev, "Unable to create RX DMA map\n");
3269                         em_destroy_rx_ring(adapter, i);
3270                         return error;
3271                 }
3272         }
3273         return (0);
3274 }
3275
3276 static int
3277 em_init_rx_ring(struct adapter *adapter)
3278 {
3279         int i, error;
3280
3281         /* Reset descriptor ring */
3282         bzero(adapter->rx_desc_base,
3283             (sizeof(struct e1000_rx_desc)) * adapter->num_rx_desc);
3284
3285         /* Allocate new ones. */
3286         for (i = 0; i < adapter->num_rx_desc; i++) {
3287                 error = em_newbuf(adapter, i, 1);
3288                 if (error)
3289                         return (error);
3290         }
3291
3292         /* Setup our descriptor pointers */
3293         adapter->next_rx_desc_to_check = 0;
3294
3295         return (0);
3296 }
3297
3298 static void
3299 em_init_rx_unit(struct adapter *adapter)
3300 {
3301         struct ifnet *ifp = &adapter->arpcom.ac_if;
3302         uint64_t bus_addr;
3303         uint32_t rctl;
3304
3305         /*
3306          * Make sure receives are disabled while setting
3307          * up the descriptor ring
3308          */
3309         rctl = E1000_READ_REG(&adapter->hw, E1000_RCTL);
3310         E1000_WRITE_REG(&adapter->hw, E1000_RCTL, rctl & ~E1000_RCTL_EN);
3311
3312         if (adapter->hw.mac.type >= e1000_82540) {
3313                 uint32_t itr;
3314
3315                 /*
3316                  * Set the interrupt throttling rate. Value is calculated
3317                  * as ITR = 1 / (INT_THROTTLE_CEIL * 256ns)
3318                  */
3319                 if (adapter->int_throttle_ceil)
3320                         itr = 1000000000 / 256 / adapter->int_throttle_ceil;
3321                 else
3322                         itr = 0;
3323                 em_set_itr(adapter, itr);
3324         }
3325
3326         /* Disable accelerated ackknowledge */
3327         if (adapter->hw.mac.type == e1000_82574) {
3328                 E1000_WRITE_REG(&adapter->hw,
3329                     E1000_RFCTL, E1000_RFCTL_ACK_DIS);
3330         }
3331
3332         /* Receive Checksum Offload for TCP and UDP */
3333         if (ifp->if_capenable & IFCAP_RXCSUM) {
3334                 uint32_t rxcsum;
3335
3336                 rxcsum = E1000_READ_REG(&adapter->hw, E1000_RXCSUM);
3337                 rxcsum |= (E1000_RXCSUM_IPOFL | E1000_RXCSUM_TUOFL);
3338                 E1000_WRITE_REG(&adapter->hw, E1000_RXCSUM, rxcsum);
3339         }
3340
3341         /*
3342          * XXX TEMPORARY WORKAROUND: on some systems with 82573
3343          * long latencies are observed, like Lenovo X60. This
3344          * change eliminates the problem, but since having positive
3345          * values in RDTR is a known source of problems on other
3346          * platforms another solution is being sought.
3347          */
3348         if (em_82573_workaround && adapter->hw.mac.type == e1000_82573) {
3349                 E1000_WRITE_REG(&adapter->hw, E1000_RADV, EM_RADV_82573);
3350                 E1000_WRITE_REG(&adapter->hw, E1000_RDTR, EM_RDTR_82573);
3351         }
3352
3353         /*
3354          * Setup the Base and Length of the Rx Descriptor Ring
3355          */
3356         bus_addr = adapter->rxdma.dma_paddr;
3357         E1000_WRITE_REG(&adapter->hw, E1000_RDLEN(0),
3358             adapter->num_rx_desc * sizeof(struct e1000_rx_desc));
3359         E1000_WRITE_REG(&adapter->hw, E1000_RDBAH(0),
3360             (uint32_t)(bus_addr >> 32));
3361         E1000_WRITE_REG(&adapter->hw, E1000_RDBAL(0),
3362             (uint32_t)bus_addr);
3363
3364         /*
3365          * Setup the HW Rx Head and Tail Descriptor Pointers
3366          */
3367         E1000_WRITE_REG(&adapter->hw, E1000_RDH(0), 0);
3368         E1000_WRITE_REG(&adapter->hw, E1000_RDT(0), adapter->num_rx_desc - 1);
3369
3370         /* Set PTHRESH for improved jumbo performance */
3371         if (((adapter->hw.mac.type == e1000_ich9lan) ||
3372             (adapter->hw.mac.type == e1000_pch2lan) ||
3373             (adapter->hw.mac.type == e1000_ich10lan)) &&
3374             (ifp->if_mtu > ETHERMTU)) {
3375                 uint32_t rxdctl;
3376
3377                 rxdctl = E1000_READ_REG(&adapter->hw, E1000_RXDCTL(0));
3378                 E1000_WRITE_REG(&adapter->hw, E1000_RXDCTL(0), rxdctl | 3);
3379         }
3380
3381         if (adapter->hw.mac.type >= e1000_pch2lan) {
3382                 if (ifp->if_mtu > ETHERMTU)
3383                         e1000_lv_jumbo_workaround_ich8lan(&adapter->hw, TRUE);
3384                 else
3385                         e1000_lv_jumbo_workaround_ich8lan(&adapter->hw, FALSE);
3386         }
3387
3388         /* Setup the Receive Control Register */
3389         rctl &= ~(3 << E1000_RCTL_MO_SHIFT);
3390         rctl |= E1000_RCTL_EN | E1000_RCTL_BAM | E1000_RCTL_LBM_NO |
3391                 E1000_RCTL_RDMTS_HALF |
3392                 (adapter->hw.mac.mc_filter_type << E1000_RCTL_MO_SHIFT);
3393
3394         /* Make sure VLAN Filters are off */
3395         rctl &= ~E1000_RCTL_VFE;
3396
3397         if (e1000_tbi_sbp_enabled_82543(&adapter->hw))
3398                 rctl |= E1000_RCTL_SBP;
3399         else
3400                 rctl &= ~E1000_RCTL_SBP;
3401
3402         switch (adapter->rx_buffer_len) {
3403         default:
3404         case 2048:
3405                 rctl |= E1000_RCTL_SZ_2048;
3406                 break;
3407
3408         case 4096:
3409                 rctl |= E1000_RCTL_SZ_4096 |
3410                     E1000_RCTL_BSEX | E1000_RCTL_LPE;
3411                 break;
3412
3413         case 8192:
3414                 rctl |= E1000_RCTL_SZ_8192 |
3415                     E1000_RCTL_BSEX | E1000_RCTL_LPE;
3416                 break;
3417
3418         case 16384:
3419                 rctl |= E1000_RCTL_SZ_16384 |
3420                     E1000_RCTL_BSEX | E1000_RCTL_LPE;
3421                 break;
3422         }
3423
3424         if (ifp->if_mtu > ETHERMTU)
3425                 rctl |= E1000_RCTL_LPE;
3426         else
3427                 rctl &= ~E1000_RCTL_LPE;
3428
3429         /* Enable Receives */
3430         E1000_WRITE_REG(&adapter->hw, E1000_RCTL, rctl);
3431 }
3432
3433 static void
3434 em_destroy_rx_ring(struct adapter *adapter, int ndesc)
3435 {
3436         struct em_buffer *rx_buffer;
3437         int i;
3438
3439         if (adapter->rx_buffer_area == NULL)
3440                 return;
3441
3442         for (i = 0; i < ndesc; i++) {
3443                 rx_buffer = &adapter->rx_buffer_area[i];
3444
3445                 KKASSERT(rx_buffer->m_head == NULL);
3446                 bus_dmamap_destroy(adapter->rxtag, rx_buffer->map);
3447         }
3448         bus_dmamap_destroy(adapter->rxtag, adapter->rx_sparemap);
3449         bus_dma_tag_destroy(adapter->rxtag);
3450
3451         kfree(adapter->rx_buffer_area, M_DEVBUF);
3452         adapter->rx_buffer_area = NULL;
3453 }
3454
3455 static void
3456 em_rxeof(struct adapter *adapter, int count)
3457 {
3458         struct ifnet *ifp = &adapter->arpcom.ac_if;
3459         uint8_t status, accept_frame = 0, eop = 0;
3460         uint16_t len, desc_len, prev_len_adj;
3461         struct e1000_rx_desc *current_desc;
3462         struct mbuf *mp;
3463         int i;
3464
3465         i = adapter->next_rx_desc_to_check;
3466         current_desc = &adapter->rx_desc_base[i];
3467
3468         if (!(current_desc->status & E1000_RXD_STAT_DD))
3469                 return;
3470
3471         while ((current_desc->status & E1000_RXD_STAT_DD) && count != 0) {
3472                 struct mbuf *m = NULL;
3473
3474                 logif(pkt_receive);
3475
3476                 mp = adapter->rx_buffer_area[i].m_head;
3477
3478                 /*
3479                  * Can't defer bus_dmamap_sync(9) because TBI_ACCEPT
3480                  * needs to access the last received byte in the mbuf.
3481                  */
3482                 bus_dmamap_sync(adapter->rxtag, adapter->rx_buffer_area[i].map,
3483                                 BUS_DMASYNC_POSTREAD);
3484
3485                 accept_frame = 1;
3486                 prev_len_adj = 0;
3487                 desc_len = le16toh(current_desc->length);
3488                 status = current_desc->status;
3489                 if (status & E1000_RXD_STAT_EOP) {
3490                         count--;
3491                         eop = 1;
3492                         if (desc_len < ETHER_CRC_LEN) {
3493                                 len = 0;
3494                                 prev_len_adj = ETHER_CRC_LEN - desc_len;
3495                         } else {
3496                                 len = desc_len - ETHER_CRC_LEN;
3497                         }
3498                 } else {
3499                         eop = 0;
3500                         len = desc_len;
3501                 }
3502
3503                 if (current_desc->errors & E1000_RXD_ERR_FRAME_ERR_MASK) {
3504                         uint8_t last_byte;
3505                         uint32_t pkt_len = desc_len;
3506
3507                         if (adapter->fmp != NULL)
3508                                 pkt_len += adapter->fmp->m_pkthdr.len;
3509
3510                         last_byte = *(mtod(mp, caddr_t) + desc_len - 1);
3511                         if (TBI_ACCEPT(&adapter->hw, status,
3512                             current_desc->errors, pkt_len, last_byte,
3513                             adapter->min_frame_size,
3514                             adapter->hw.mac.max_frame_size)) {
3515                                 e1000_tbi_adjust_stats_82543(&adapter->hw,
3516                                     &adapter->stats, pkt_len,
3517                                     adapter->hw.mac.addr,
3518                                     adapter->hw.mac.max_frame_size);
3519                                 if (len > 0)
3520                                         len--;
3521                         } else {
3522                                 accept_frame = 0;
3523                         }
3524                 }
3525
3526                 if (accept_frame) {
3527                         if (em_newbuf(adapter, i, 0) != 0) {
3528                                 IFNET_STAT_INC(ifp, iqdrops, 1);
3529                                 goto discard;
3530                         }
3531
3532                         /* Assign correct length to the current fragment */
3533                         mp->m_len = len;
3534
3535                         if (adapter->fmp == NULL) {
3536                                 mp->m_pkthdr.len = len;
3537                                 adapter->fmp = mp; /* Store the first mbuf */
3538                                 adapter->lmp = mp;
3539                         } else {
3540                                 /*
3541                                  * Chain mbuf's together
3542                                  */
3543
3544                                 /*
3545                                  * Adjust length of previous mbuf in chain if
3546                                  * we received less than 4 bytes in the last
3547                                  * descriptor.
3548                                  */
3549                                 if (prev_len_adj > 0) {
3550                                         adapter->lmp->m_len -= prev_len_adj;
3551                                         adapter->fmp->m_pkthdr.len -=
3552                                             prev_len_adj;
3553                                 }
3554                                 adapter->lmp->m_next = mp;
3555                                 adapter->lmp = adapter->lmp->m_next;
3556                                 adapter->fmp->m_pkthdr.len += len;
3557                         }
3558
3559                         if (eop) {
3560                                 adapter->fmp->m_pkthdr.rcvif = ifp;
3561                                 IFNET_STAT_INC(ifp, ipackets, 1);
3562
3563                                 if (ifp->if_capenable & IFCAP_RXCSUM) {
3564                                         em_rxcsum(adapter, current_desc,
3565                                                   adapter->fmp);
3566                                 }
3567
3568                                 if (status & E1000_RXD_STAT_VP) {
3569                                         adapter->fmp->m_pkthdr.ether_vlantag =
3570                                             (le16toh(current_desc->special) &
3571                                             E1000_RXD_SPC_VLAN_MASK);
3572                                         adapter->fmp->m_flags |= M_VLANTAG;
3573                                 }
3574                                 m = adapter->fmp;
3575                                 adapter->fmp = NULL;
3576                                 adapter->lmp = NULL;
3577                         }
3578                 } else {
3579                         IFNET_STAT_INC(ifp, ierrors, 1);
3580 discard:
3581 #ifdef foo
3582                         /* Reuse loaded DMA map and just update mbuf chain */
3583                         mp = adapter->rx_buffer_area[i].m_head;
3584                         mp->m_len = mp->m_pkthdr.len = MCLBYTES;
3585                         mp->m_data = mp->m_ext.ext_buf;
3586                         mp->m_next = NULL;
3587                         if (adapter->hw.mac.max_frame_size <=
3588                             (MCLBYTES - ETHER_ALIGN))
3589                                 m_adj(mp, ETHER_ALIGN);
3590 #endif
3591                         if (adapter->fmp != NULL) {
3592                                 m_freem(adapter->fmp);
3593                                 adapter->fmp = NULL;
3594                                 adapter->lmp = NULL;
3595                         }
3596                         m = NULL;
3597                 }
3598
3599                 /* Zero out the receive descriptors status. */
3600                 current_desc->status = 0;
3601
3602                 if (m != NULL)
3603                         ifp->if_input(ifp, m, NULL, -1);
3604
3605                 /* Advance our pointers to the next descriptor. */
3606                 if (++i == adapter->num_rx_desc)
3607                         i = 0;
3608                 current_desc = &adapter->rx_desc_base[i];
3609         }
3610         adapter->next_rx_desc_to_check = i;
3611
3612         /* Advance the E1000's Receive Queue #0  "Tail Pointer". */
3613         if (--i < 0)
3614                 i = adapter->num_rx_desc - 1;
3615         E1000_WRITE_REG(&adapter->hw, E1000_RDT(0), i);
3616 }
3617
3618 static void
3619 em_rxcsum(struct adapter *adapter, struct e1000_rx_desc *rx_desc,
3620           struct mbuf *mp)
3621 {
3622         /* 82543 or newer only */
3623         if (adapter->hw.mac.type < e1000_82543 ||
3624             /* Ignore Checksum bit is set */
3625             (rx_desc->status & E1000_RXD_STAT_IXSM))
3626                 return;
3627
3628         if ((rx_desc->status & E1000_RXD_STAT_IPCS) &&
3629             !(rx_desc->errors & E1000_RXD_ERR_IPE)) {
3630                 /* IP Checksum Good */
3631                 mp->m_pkthdr.csum_flags |= CSUM_IP_CHECKED | CSUM_IP_VALID;
3632         }
3633
3634         if ((rx_desc->status & E1000_RXD_STAT_TCPCS) &&
3635             !(rx_desc->errors & E1000_RXD_ERR_TCPE)) {
3636                 mp->m_pkthdr.csum_flags |= CSUM_DATA_VALID |
3637                                            CSUM_PSEUDO_HDR |
3638                                            CSUM_FRAG_NOT_CHECKED;
3639                 mp->m_pkthdr.csum_data = htons(0xffff);
3640         }
3641 }
3642
3643 static void
3644 em_enable_intr(struct adapter *adapter)
3645 {
3646         uint32_t ims_mask = IMS_ENABLE_MASK;
3647
3648         lwkt_serialize_handler_enable(adapter->arpcom.ac_if.if_serializer);
3649
3650 #if 0
3651         /* XXX MSIX */
3652         if (adapter->hw.mac.type == e1000_82574) {
3653                 E1000_WRITE_REG(&adapter->hw, EM_EIAC, EM_MSIX_MASK);
3654                 ims_mask |= EM_MSIX_MASK;
3655         }
3656 #endif
3657         E1000_WRITE_REG(&adapter->hw, E1000_IMS, ims_mask);
3658 }
3659
3660 static void
3661 em_disable_intr(struct adapter *adapter)
3662 {
3663         uint32_t clear = 0xffffffff;
3664
3665         /*
3666          * The first version of 82542 had an errata where when link was forced
3667          * it would stay up even up even if the cable was disconnected.
3668          * Sequence errors were used to detect the disconnect and then the
3669          * driver would unforce the link.  This code in the in the ISR.  For
3670          * this to work correctly the Sequence error interrupt had to be
3671          * enabled all the time.
3672          */
3673         if (adapter->hw.mac.type == e1000_82542 &&
3674             adapter->hw.revision_id == E1000_REVISION_2)
3675                 clear &= ~E1000_ICR_RXSEQ;
3676         else if (adapter->hw.mac.type == e1000_82574)
3677                 E1000_WRITE_REG(&adapter->hw, EM_EIAC, 0);
3678
3679         E1000_WRITE_REG(&adapter->hw, E1000_IMC, clear);
3680
3681         adapter->npoll.ifpc_stcount = 0;
3682
3683         lwkt_serialize_handler_disable(adapter->arpcom.ac_if.if_serializer);
3684 }
3685
3686 /*
3687  * Bit of a misnomer, what this really means is
3688  * to enable OS management of the system... aka
3689  * to disable special hardware management features
3690  */
3691 static void
3692 em_get_mgmt(struct adapter *adapter)
3693 {
3694         /* A shared code workaround */
3695 #define E1000_82542_MANC2H E1000_MANC2H
3696         if (adapter->flags & EM_FLAG_HAS_MGMT) {
3697                 int manc2h = E1000_READ_REG(&adapter->hw, E1000_MANC2H);
3698                 int manc = E1000_READ_REG(&adapter->hw, E1000_MANC);
3699
3700                 /* disable hardware interception of ARP */
3701                 manc &= ~(E1000_MANC_ARP_EN);
3702
3703                 /* enable receiving management packets to the host */
3704                 if (adapter->hw.mac.type >= e1000_82571) {
3705                         manc |= E1000_MANC_EN_MNG2HOST;
3706 #define E1000_MNG2HOST_PORT_623 (1 << 5)
3707 #define E1000_MNG2HOST_PORT_664 (1 << 6)
3708                         manc2h |= E1000_MNG2HOST_PORT_623;
3709                         manc2h |= E1000_MNG2HOST_PORT_664;
3710                         E1000_WRITE_REG(&adapter->hw, E1000_MANC2H, manc2h);
3711                 }
3712
3713                 E1000_WRITE_REG(&adapter->hw, E1000_MANC, manc);
3714         }
3715 }
3716
3717 /*
3718  * Give control back to hardware management
3719  * controller if there is one.
3720  */
3721 static void
3722 em_rel_mgmt(struct adapter *adapter)
3723 {
3724         if (adapter->flags & EM_FLAG_HAS_MGMT) {
3725                 int manc = E1000_READ_REG(&adapter->hw, E1000_MANC);
3726
3727                 /* re-enable hardware interception of ARP */
3728                 manc |= E1000_MANC_ARP_EN;
3729
3730                 if (adapter->hw.mac.type >= e1000_82571)
3731                         manc &= ~E1000_MANC_EN_MNG2HOST;
3732
3733                 E1000_WRITE_REG(&adapter->hw, E1000_MANC, manc);
3734         }
3735 }
3736
3737 /*
3738  * em_get_hw_control() sets {CTRL_EXT|FWSM}:DRV_LOAD bit.
3739  * For ASF and Pass Through versions of f/w this means that
3740  * the driver is loaded.  For AMT version (only with 82573)
3741  * of the f/w this means that the network i/f is open.
3742  */
3743 static void
3744 em_get_hw_control(struct adapter *adapter)
3745 {
3746         /* Let firmware know the driver has taken over */
3747         if (adapter->hw.mac.type == e1000_82573) {
3748                 uint32_t swsm;
3749
3750                 swsm = E1000_READ_REG(&adapter->hw, E1000_SWSM);
3751                 E1000_WRITE_REG(&adapter->hw, E1000_SWSM,
3752                     swsm | E1000_SWSM_DRV_LOAD);
3753         } else {
3754                 uint32_t ctrl_ext;
3755
3756                 ctrl_ext = E1000_READ_REG(&adapter->hw, E1000_CTRL_EXT);
3757                 E1000_WRITE_REG(&adapter->hw, E1000_CTRL_EXT,
3758                     ctrl_ext | E1000_CTRL_EXT_DRV_LOAD);
3759         }
3760         adapter->flags |= EM_FLAG_HW_CTRL;
3761 }
3762
3763 /*
3764  * em_rel_hw_control() resets {CTRL_EXT|FWSM}:DRV_LOAD bit.
3765  * For ASF and Pass Through versions of f/w this means that the
3766  * driver is no longer loaded.  For AMT version (only with 82573)
3767  * of the f/w this means that the network i/f is closed.
3768  */
3769 static void
3770 em_rel_hw_control(struct adapter *adapter)
3771 {
3772         if ((adapter->flags & EM_FLAG_HW_CTRL) == 0)
3773                 return;
3774         adapter->flags &= ~EM_FLAG_HW_CTRL;
3775
3776         /* Let firmware taken over control of h/w */
3777         if (adapter->hw.mac.type == e1000_82573) {
3778                 uint32_t swsm;
3779
3780                 swsm = E1000_READ_REG(&adapter->hw, E1000_SWSM);
3781                 E1000_WRITE_REG(&adapter->hw, E1000_SWSM,
3782                     swsm & ~E1000_SWSM_DRV_LOAD);
3783         } else {
3784                 uint32_t ctrl_ext;
3785
3786                 ctrl_ext = E1000_READ_REG(&adapter->hw, E1000_CTRL_EXT);
3787                 E1000_WRITE_REG(&adapter->hw, E1000_CTRL_EXT,
3788                     ctrl_ext & ~E1000_CTRL_EXT_DRV_LOAD);
3789         }
3790 }
3791
3792 static int
3793 em_is_valid_eaddr(const uint8_t *addr)
3794 {
3795         char zero_addr[ETHER_ADDR_LEN] = { 0, 0, 0, 0, 0, 0 };
3796
3797         if ((addr[0] & 1) || !bcmp(addr, zero_addr, ETHER_ADDR_LEN))
3798                 return (FALSE);
3799
3800         return (TRUE);
3801 }
3802
3803 /*
3804  * Enable PCI Wake On Lan capability
3805  */
3806 void
3807 em_enable_wol(device_t dev)
3808 {
3809         uint16_t cap, status;
3810         uint8_t id;
3811
3812         /* First find the capabilities pointer*/
3813         cap = pci_read_config(dev, PCIR_CAP_PTR, 2);
3814
3815         /* Read the PM Capabilities */
3816         id = pci_read_config(dev, cap, 1);
3817         if (id != PCIY_PMG)     /* Something wrong */
3818                 return;
3819
3820         /*
3821          * OK, we have the power capabilities,
3822          * so now get the status register
3823          */
3824         cap += PCIR_POWER_STATUS;
3825         status = pci_read_config(dev, cap, 2);
3826         status |= PCIM_PSTAT_PME | PCIM_PSTAT_PMEENABLE;
3827         pci_write_config(dev, cap, status, 2);
3828 }
3829
3830
3831 /*
3832  * 82544 Coexistence issue workaround.
3833  *    There are 2 issues.
3834  *       1. Transmit Hang issue.
3835  *    To detect this issue, following equation can be used...
3836  *        SIZE[3:0] + ADDR[2:0] = SUM[3:0].
3837  *        If SUM[3:0] is in between 1 to 4, we will have this issue.
3838  *
3839  *       2. DAC issue.
3840  *    To detect this issue, following equation can be used...
3841  *        SIZE[3:0] + ADDR[2:0] = SUM[3:0].
3842  *        If SUM[3:0] is in between 9 to c, we will have this issue.
3843  *
3844  *    WORKAROUND:
3845  *        Make sure we do not have ending address
3846  *        as 1,2,3,4(Hang) or 9,a,b,c (DAC)
3847  */
3848 static uint32_t
3849 em_82544_fill_desc(bus_addr_t address, uint32_t length, PDESC_ARRAY desc_array)
3850 {
3851         uint32_t safe_terminator;
3852
3853         /*
3854          * Since issue is sensitive to length and address.
3855          * Let us first check the address...
3856          */
3857         if (length <= 4) {
3858                 desc_array->descriptor[0].address = address;
3859                 desc_array->descriptor[0].length = length;
3860                 desc_array->elements = 1;
3861                 return (desc_array->elements);
3862         }
3863
3864         safe_terminator =
3865         (uint32_t)((((uint32_t)address & 0x7) + (length & 0xF)) & 0xF);
3866
3867         /* If it does not fall between 0x1 to 0x4 and 0x9 to 0xC then return */
3868         if (safe_terminator == 0 ||
3869             (safe_terminator > 4 && safe_terminator < 9) ||
3870             (safe_terminator > 0xC && safe_terminator <= 0xF)) {
3871                 desc_array->descriptor[0].address = address;
3872                 desc_array->descriptor[0].length = length;
3873                 desc_array->elements = 1;
3874                 return (desc_array->elements);
3875         }
3876
3877         desc_array->descriptor[0].address = address;
3878         desc_array->descriptor[0].length = length - 4;
3879         desc_array->descriptor[1].address = address + (length - 4);
3880         desc_array->descriptor[1].length = 4;
3881         desc_array->elements = 2;
3882         return (desc_array->elements);
3883 }
3884
3885 static void
3886 em_update_stats(struct adapter *adapter)
3887 {
3888         struct ifnet *ifp = &adapter->arpcom.ac_if;
3889
3890         if (adapter->hw.phy.media_type == e1000_media_type_copper ||
3891             (E1000_READ_REG(&adapter->hw, E1000_STATUS) & E1000_STATUS_LU)) {
3892                 adapter->stats.symerrs +=
3893                         E1000_READ_REG(&adapter->hw, E1000_SYMERRS);
3894                 adapter->stats.sec += E1000_READ_REG(&adapter->hw, E1000_SEC);
3895         }
3896         adapter->stats.crcerrs += E1000_READ_REG(&adapter->hw, E1000_CRCERRS);
3897         adapter->stats.mpc += E1000_READ_REG(&adapter->hw, E1000_MPC);
3898         adapter->stats.scc += E1000_READ_REG(&adapter->hw, E1000_SCC);
3899         adapter->stats.ecol += E1000_READ_REG(&adapter->hw, E1000_ECOL);
3900
3901         adapter->stats.mcc += E1000_READ_REG(&adapter->hw, E1000_MCC);
3902         adapter->stats.latecol += E1000_READ_REG(&adapter->hw, E1000_LATECOL);
3903         adapter->stats.colc += E1000_READ_REG(&adapter->hw, E1000_COLC);
3904         adapter->stats.dc += E1000_READ_REG(&adapter->hw, E1000_DC);
3905         adapter->stats.rlec += E1000_READ_REG(&adapter->hw, E1000_RLEC);
3906         adapter->stats.xonrxc += E1000_READ_REG(&adapter->hw, E1000_XONRXC);
3907         adapter->stats.xontxc += E1000_READ_REG(&adapter->hw, E1000_XONTXC);
3908         adapter->stats.xoffrxc += E1000_READ_REG(&adapter->hw, E1000_XOFFRXC);
3909         adapter->stats.xofftxc += E1000_READ_REG(&adapter->hw, E1000_XOFFTXC);
3910         adapter->stats.fcruc += E1000_READ_REG(&adapter->hw, E1000_FCRUC);
3911         adapter->stats.prc64 += E1000_READ_REG(&adapter->hw, E1000_PRC64);
3912         adapter->stats.prc127 += E1000_READ_REG(&adapter->hw, E1000_PRC127);
3913         adapter->stats.prc255 += E1000_READ_REG(&adapter->hw, E1000_PRC255);
3914         adapter->stats.prc511 += E1000_READ_REG(&adapter->hw, E1000_PRC511);
3915         adapter->stats.prc1023 += E1000_READ_REG(&adapter->hw, E1000_PRC1023);
3916         adapter->stats.prc1522 += E1000_READ_REG(&adapter->hw, E1000_PRC1522);
3917         adapter->stats.gprc += E1000_READ_REG(&adapter->hw, E1000_GPRC);
3918         adapter->stats.bprc += E1000_READ_REG(&adapter->hw, E1000_BPRC);
3919         adapter->stats.mprc += E1000_READ_REG(&adapter->hw, E1000_MPRC);
3920         adapter->stats.gptc += E1000_READ_REG(&adapter->hw, E1000_GPTC);
3921
3922         /* For the 64-bit byte counters the low dword must be read first. */
3923         /* Both registers clear on the read of the high dword */
3924
3925         adapter->stats.gorc += E1000_READ_REG(&adapter->hw, E1000_GORCH);
3926         adapter->stats.gotc += E1000_READ_REG(&adapter->hw, E1000_GOTCH);
3927
3928         adapter->stats.rnbc += E1000_READ_REG(&adapter->hw, E1000_RNBC);
3929         adapter->stats.ruc += E1000_READ_REG(&adapter->hw, E1000_RUC);
3930         adapter->stats.rfc += E1000_READ_REG(&adapter->hw, E1000_RFC);
3931         adapter->stats.roc += E1000_READ_REG(&adapter->hw, E1000_ROC);
3932         adapter->stats.rjc += E1000_READ_REG(&adapter->hw, E1000_RJC);
3933
3934         adapter->stats.tor += E1000_READ_REG(&adapter->hw, E1000_TORH);
3935         adapter->stats.tot += E1000_READ_REG(&adapter->hw, E1000_TOTH);
3936
3937         adapter->stats.tpr += E1000_READ_REG(&adapter->hw, E1000_TPR);
3938         adapter->stats.tpt += E1000_READ_REG(&adapter->hw, E1000_TPT);
3939         adapter->stats.ptc64 += E1000_READ_REG(&adapter->hw, E1000_PTC64);
3940         adapter->stats.ptc127 += E1000_READ_REG(&adapter->hw, E1000_PTC127);
3941         adapter->stats.ptc255 += E1000_READ_REG(&adapter->hw, E1000_PTC255);
3942         adapter->stats.ptc511 += E1000_READ_REG(&adapter->hw, E1000_PTC511);
3943         adapter->stats.ptc1023 += E1000_READ_REG(&adapter->hw, E1000_PTC1023);
3944         adapter->stats.ptc1522 += E1000_READ_REG(&adapter->hw, E1000_PTC1522);
3945         adapter->stats.mptc += E1000_READ_REG(&adapter->hw, E1000_MPTC);
3946         adapter->stats.bptc += E1000_READ_REG(&adapter->hw, E1000_BPTC);
3947
3948         if (adapter->hw.mac.type >= e1000_82543) {
3949                 adapter->stats.algnerrc +=
3950                 E1000_READ_REG(&adapter->hw, E1000_ALGNERRC);
3951                 adapter->stats.rxerrc +=
3952                 E1000_READ_REG(&adapter->hw, E1000_RXERRC);
3953                 adapter->stats.tncrs +=
3954                 E1000_READ_REG(&adapter->hw, E1000_TNCRS);
3955                 adapter->stats.cexterr +=
3956                 E1000_READ_REG(&adapter->hw, E1000_CEXTERR);
3957                 adapter->stats.tsctc +=
3958                 E1000_READ_REG(&adapter->hw, E1000_TSCTC);
3959                 adapter->stats.tsctfc +=
3960                 E1000_READ_REG(&adapter->hw, E1000_TSCTFC);
3961         }
3962
3963         IFNET_STAT_SET(ifp, collisions, adapter->stats.colc);
3964
3965         /* Rx Errors */
3966         IFNET_STAT_SET(ifp, ierrors,
3967             adapter->dropped_pkts + adapter->stats.rxerrc +
3968             adapter->stats.crcerrs + adapter->stats.algnerrc +
3969             adapter->stats.ruc + adapter->stats.roc +
3970             adapter->stats.mpc + adapter->stats.cexterr);
3971
3972         /* Tx Errors */
3973         IFNET_STAT_SET(ifp, oerrors,
3974             adapter->stats.ecol + adapter->stats.latecol +
3975             adapter->watchdog_events);
3976 }
3977
3978 static void
3979 em_print_debug_info(struct adapter *adapter)
3980 {
3981         device_t dev = adapter->dev;
3982         uint8_t *hw_addr = adapter->hw.hw_addr;
3983
3984         device_printf(dev, "Adapter hardware address = %p \n", hw_addr);
3985         device_printf(dev, "CTRL = 0x%x RCTL = 0x%x \n",
3986             E1000_READ_REG(&adapter->hw, E1000_CTRL),
3987             E1000_READ_REG(&adapter->hw, E1000_RCTL));
3988         device_printf(dev, "Packet buffer = Tx=%dk Rx=%dk \n",
3989             ((E1000_READ_REG(&adapter->hw, E1000_PBA) & 0xffff0000) >> 16),\
3990             (E1000_READ_REG(&adapter->hw, E1000_PBA) & 0xffff) );
3991         device_printf(dev, "Flow control watermarks high = %d low = %d\n",
3992             adapter->hw.fc.high_water,
3993             adapter->hw.fc.low_water);
3994         device_printf(dev, "tx_int_delay = %d, tx_abs_int_delay = %d\n",
3995             E1000_READ_REG(&adapter->hw, E1000_TIDV),
3996             E1000_READ_REG(&adapter->hw, E1000_TADV));
3997         device_printf(dev, "rx_int_delay = %d, rx_abs_int_delay = %d\n",
3998             E1000_READ_REG(&adapter->hw, E1000_RDTR),
3999             E1000_READ_REG(&adapter->hw, E1000_RADV));
4000         device_printf(dev, "fifo workaround = %lld, fifo_reset_count = %lld\n",
4001             (long long)adapter->tx_fifo_wrk_cnt,
4002             (long long)adapter->tx_fifo_reset_cnt);
4003         device_printf(dev, "hw tdh = %d, hw tdt = %d\n",
4004             E1000_READ_REG(&adapter->hw, E1000_TDH(0)),
4005             E1000_READ_REG(&adapter->hw, E1000_TDT(0)));
4006         device_printf(dev, "hw rdh = %d, hw rdt = %d\n",
4007             E1000_READ_REG(&adapter->hw, E1000_RDH(0)),
4008             E1000_READ_REG(&adapter->hw, E1000_RDT(0)));
4009         device_printf(dev, "Num Tx descriptors avail = %d\n",
4010             adapter->num_tx_desc_avail);
4011         device_printf(dev, "Tx Descriptors not avail1 = %ld\n",
4012             adapter->no_tx_desc_avail1);
4013         device_printf(dev, "Tx Descriptors not avail2 = %ld\n",
4014             adapter->no_tx_desc_avail2);
4015         device_printf(dev, "Std mbuf failed = %ld\n",
4016             adapter->mbuf_alloc_failed);
4017         device_printf(dev, "Std mbuf cluster failed = %ld\n",
4018             adapter->mbuf_cluster_failed);
4019         device_printf(dev, "Driver dropped packets = %ld\n",
4020             adapter->dropped_pkts);
4021         device_printf(dev, "Driver tx dma failure in encap = %ld\n",
4022             adapter->no_tx_dma_setup);
4023 }
4024
4025 static void
4026 em_print_hw_stats(struct adapter *adapter)
4027 {
4028         device_t dev = adapter->dev;
4029
4030         device_printf(dev, "Excessive collisions = %lld\n",
4031             (long long)adapter->stats.ecol);
4032 #if (DEBUG_HW > 0)  /* Dont output these errors normally */
4033         device_printf(dev, "Symbol errors = %lld\n",
4034             (long long)adapter->stats.symerrs);
4035 #endif
4036         device_printf(dev, "Sequence errors = %lld\n",
4037             (long long)adapter->stats.sec);
4038         device_printf(dev, "Defer count = %lld\n",
4039             (long long)adapter->stats.dc);
4040         device_printf(dev, "Missed Packets = %lld\n",
4041             (long long)adapter->stats.mpc);
4042         device_printf(dev, "Receive No Buffers = %lld\n",
4043             (long long)adapter->stats.rnbc);
4044         /* RLEC is inaccurate on some hardware, calculate our own. */
4045         device_printf(dev, "Receive Length Errors = %lld\n",
4046             ((long long)adapter->stats.roc + (long long)adapter->stats.ruc));
4047         device_printf(dev, "Receive errors = %lld\n",
4048             (long long)adapter->stats.rxerrc);
4049         device_printf(dev, "Crc errors = %lld\n",
4050             (long long)adapter->stats.crcerrs);
4051         device_printf(dev, "Alignment errors = %lld\n",
4052             (long long)adapter->stats.algnerrc);
4053         device_printf(dev, "Collision/Carrier extension errors = %lld\n",
4054             (long long)adapter->stats.cexterr);
4055         device_printf(dev, "RX overruns = %ld\n", adapter->rx_overruns);
4056         device_printf(dev, "watchdog timeouts = %ld\n",
4057             adapter->watchdog_events);
4058         device_printf(dev, "XON Rcvd = %lld\n",
4059             (long long)adapter->stats.xonrxc);
4060         device_printf(dev, "XON Xmtd = %lld\n",
4061             (long long)adapter->stats.xontxc);
4062         device_printf(dev, "XOFF Rcvd = %lld\n",
4063             (long long)adapter->stats.xoffrxc);
4064         device_printf(dev, "XOFF Xmtd = %lld\n",
4065             (long long)adapter->stats.xofftxc);
4066         device_printf(dev, "Good Packets Rcvd = %lld\n",
4067             (long long)adapter->stats.gprc);
4068         device_printf(dev, "Good Packets Xmtd = %lld\n",
4069             (long long)adapter->stats.gptc);
4070 }
4071
4072 static void
4073 em_print_nvm_info(struct adapter *adapter)
4074 {
4075         uint16_t eeprom_data;
4076         int i, j, row = 0;
4077
4078         /* Its a bit crude, but it gets the job done */
4079         kprintf("\nInterface EEPROM Dump:\n");
4080         kprintf("Offset\n0x0000  ");
4081         for (i = 0, j = 0; i < 32; i++, j++) {
4082                 if (j == 8) { /* Make the offset block */
4083                         j = 0; ++row;
4084                         kprintf("\n0x00%x0  ",row);
4085                 }
4086                 e1000_read_nvm(&adapter->hw, i, 1, &eeprom_data);
4087                 kprintf("%04x ", eeprom_data);
4088         }
4089         kprintf("\n");
4090 }
4091
4092 static int
4093 em_sysctl_debug_info(SYSCTL_HANDLER_ARGS)
4094 {
4095         struct adapter *adapter;
4096         struct ifnet *ifp;
4097         int error, result;
4098
4099         result = -1;
4100         error = sysctl_handle_int(oidp, &result, 0, req);
4101         if (error || !req->newptr)
4102                 return (error);
4103
4104         adapter = (struct adapter *)arg1;
4105         ifp = &adapter->arpcom.ac_if;
4106
4107         lwkt_serialize_enter(ifp->if_serializer);
4108
4109         if (result == 1)
4110                 em_print_debug_info(adapter);
4111
4112         /*
4113          * This value will cause a hex dump of the
4114          * first 32 16-bit words of the EEPROM to
4115          * the screen.
4116          */
4117         if (result == 2)
4118                 em_print_nvm_info(adapter);
4119
4120         lwkt_serialize_exit(ifp->if_serializer);
4121
4122         return (error);
4123 }
4124
4125 static int
4126 em_sysctl_stats(SYSCTL_HANDLER_ARGS)
4127 {
4128         int error, result;
4129
4130         result = -1;
4131         error = sysctl_handle_int(oidp, &result, 0, req);
4132         if (error || !req->newptr)
4133                 return (error);
4134
4135         if (result == 1) {
4136                 struct adapter *adapter = (struct adapter *)arg1;
4137                 struct ifnet *ifp = &adapter->arpcom.ac_if;
4138
4139                 lwkt_serialize_enter(ifp->if_serializer);
4140                 em_print_hw_stats(adapter);
4141                 lwkt_serialize_exit(ifp->if_serializer);
4142         }
4143         return (error);
4144 }
4145
4146 static void
4147 em_add_sysctl(struct adapter *adapter)
4148 {
4149         struct sysctl_ctx_list *ctx;
4150         struct sysctl_oid *tree;
4151
4152         ctx = device_get_sysctl_ctx(adapter->dev);
4153         tree = device_get_sysctl_tree(adapter->dev);
4154         SYSCTL_ADD_PROC(ctx, SYSCTL_CHILDREN(tree),
4155             OID_AUTO, "debug", CTLTYPE_INT|CTLFLAG_RW, adapter, 0,
4156             em_sysctl_debug_info, "I", "Debug Information");
4157
4158         SYSCTL_ADD_PROC(ctx, SYSCTL_CHILDREN(tree),
4159             OID_AUTO, "stats", CTLTYPE_INT|CTLFLAG_RW, adapter, 0,
4160             em_sysctl_stats, "I", "Statistics");
4161
4162         SYSCTL_ADD_INT(ctx, SYSCTL_CHILDREN(tree),
4163             OID_AUTO, "rxd", CTLFLAG_RD,
4164             &adapter->num_rx_desc, 0, NULL);
4165         SYSCTL_ADD_INT(ctx, SYSCTL_CHILDREN(tree),
4166             OID_AUTO, "txd", CTLFLAG_RD,
4167             &adapter->num_tx_desc, 0, NULL);
4168
4169         if (adapter->hw.mac.type >= e1000_82540) {
4170                 SYSCTL_ADD_PROC(ctx, SYSCTL_CHILDREN(tree),
4171                     OID_AUTO, "int_throttle_ceil",
4172                     CTLTYPE_INT|CTLFLAG_RW, adapter, 0,
4173                     em_sysctl_int_throttle, "I",
4174                     "interrupt throttling rate");
4175         }
4176         SYSCTL_ADD_PROC(ctx, SYSCTL_CHILDREN(tree),
4177             OID_AUTO, "int_tx_nsegs",
4178             CTLTYPE_INT|CTLFLAG_RW, adapter, 0,
4179             em_sysctl_int_tx_nsegs, "I",
4180             "# segments per TX interrupt");
4181         SYSCTL_ADD_INT(ctx, SYSCTL_CHILDREN(tree),
4182             OID_AUTO, "wreg_tx_nsegs", CTLFLAG_RW,
4183             &adapter->tx_wreg_nsegs, 0,
4184             "# segments before write to hardware register");
4185 }
4186
4187 static int
4188 em_sysctl_int_throttle(SYSCTL_HANDLER_ARGS)
4189 {
4190         struct adapter *adapter = (void *)arg1;
4191         struct ifnet *ifp = &adapter->arpcom.ac_if;
4192         int error, throttle;
4193
4194         throttle = adapter->int_throttle_ceil;
4195         error = sysctl_handle_int(oidp, &throttle, 0, req);
4196         if (error || req->newptr == NULL)
4197                 return error;
4198         if (throttle < 0 || throttle > 1000000000 / 256)
4199                 return EINVAL;
4200
4201         if (throttle) {
4202                 /*
4203                  * Set the interrupt throttling rate in 256ns increments,
4204                  * recalculate sysctl value assignment to get exact frequency.
4205                  */
4206                 throttle = 1000000000 / 256 / throttle;
4207
4208                 /* Upper 16bits of ITR is reserved and should be zero */
4209                 if (throttle & 0xffff0000)
4210                         return EINVAL;
4211         }
4212
4213         lwkt_serialize_enter(ifp->if_serializer);
4214
4215         if (throttle)
4216                 adapter->int_throttle_ceil = 1000000000 / 256 / throttle;
4217         else
4218                 adapter->int_throttle_ceil = 0;
4219
4220         if (ifp->if_flags & IFF_RUNNING)
4221                 em_set_itr(adapter, throttle);
4222
4223         lwkt_serialize_exit(ifp->if_serializer);
4224
4225         if (bootverbose) {
4226                 if_printf(ifp, "Interrupt moderation set to %d/sec\n",
4227                           adapter->int_throttle_ceil);
4228         }
4229         return 0;
4230 }
4231
4232 static int
4233 em_sysctl_int_tx_nsegs(SYSCTL_HANDLER_ARGS)
4234 {
4235         struct adapter *adapter = (void *)arg1;
4236         struct ifnet *ifp = &adapter->arpcom.ac_if;
4237         int error, segs;
4238
4239         segs = adapter->tx_int_nsegs;
4240         error = sysctl_handle_int(oidp, &segs, 0, req);
4241         if (error || req->newptr == NULL)
4242                 return error;
4243         if (segs <= 0)
4244                 return EINVAL;
4245
4246         lwkt_serialize_enter(ifp->if_serializer);
4247
4248         /*
4249          * Don't allow int_tx_nsegs to become:
4250          * o  Less the oact_tx_desc
4251          * o  Too large that no TX desc will cause TX interrupt to
4252          *    be generated (OACTIVE will never recover)
4253          * o  Too small that will cause tx_dd[] overflow
4254          */
4255         if (segs < adapter->oact_tx_desc ||
4256             segs >= adapter->num_tx_desc - adapter->oact_tx_desc ||
4257             segs < adapter->num_tx_desc / EM_TXDD_SAFE) {
4258                 error = EINVAL;
4259         } else {
4260                 error = 0;
4261                 adapter->tx_int_nsegs = segs;
4262         }
4263
4264         lwkt_serialize_exit(ifp->if_serializer);
4265
4266         return error;
4267 }
4268
4269 static void
4270 em_set_itr(struct adapter *adapter, uint32_t itr)
4271 {
4272         E1000_WRITE_REG(&adapter->hw, E1000_ITR, itr);
4273         if (adapter->hw.mac.type == e1000_82574) {
4274                 int i;
4275
4276                 /*
4277                  * When using MSIX interrupts we need to
4278                  * throttle using the EITR register
4279                  */
4280                 for (i = 0; i < 4; ++i) {
4281                         E1000_WRITE_REG(&adapter->hw,
4282                             E1000_EITR_82574(i), itr);
4283                 }
4284         }
4285 }
4286
4287 static void
4288 em_disable_aspm(struct adapter *adapter)
4289 {
4290         uint16_t link_cap, link_ctrl, disable;
4291         uint8_t pcie_ptr, reg;
4292         device_t dev = adapter->dev;
4293
4294         switch (adapter->hw.mac.type) {
4295         case e1000_82571:
4296         case e1000_82572:
4297         case e1000_82573:
4298                 /*
4299                  * 82573 specification update
4300                  * errata #8 disable L0s
4301                  * errata #41 disable L1
4302                  *
4303                  * 82571/82572 specification update
4304                  # errata #13 disable L1
4305                  * errata #68 disable L0s
4306                  */
4307                 disable = PCIEM_LNKCTL_ASPM_L0S | PCIEM_LNKCTL_ASPM_L1;
4308                 break;
4309
4310         case e1000_82574:
4311         case e1000_82583:
4312                 /*
4313                  * 82574 specification update errata #20
4314                  * 82583 specification update errata #9
4315                  *
4316                  * There is no need to disable L1
4317                  */
4318                 disable = PCIEM_LNKCTL_ASPM_L0S;
4319                 break;
4320
4321         default:
4322                 return;
4323         }
4324
4325         pcie_ptr = pci_get_pciecap_ptr(dev);
4326         if (pcie_ptr == 0)
4327                 return;
4328
4329         link_cap = pci_read_config(dev, pcie_ptr + PCIER_LINKCAP, 2);
4330         if ((link_cap & PCIEM_LNKCAP_ASPM_MASK) == 0)
4331                 return;
4332
4333         if (bootverbose) {
4334                 if_printf(&adapter->arpcom.ac_if,
4335                     "disable ASPM %#02x\n", disable);
4336         }
4337
4338         reg = pcie_ptr + PCIER_LINKCTRL;
4339         link_ctrl = pci_read_config(dev, reg, 2);
4340         link_ctrl &= ~disable;
4341         pci_write_config(dev, reg, link_ctrl, 2);
4342 }
4343
4344 static int
4345 em_tso_pullup(struct adapter *adapter, struct mbuf **mp)
4346 {
4347         int iphlen, hoff, thoff, ex = 0;
4348         struct mbuf *m;
4349         struct ip *ip;
4350
4351         m = *mp;
4352         KASSERT(M_WRITABLE(m), ("TSO mbuf not writable"));
4353
4354         iphlen = m->m_pkthdr.csum_iphlen;
4355         thoff = m->m_pkthdr.csum_thlen;
4356         hoff = m->m_pkthdr.csum_lhlen;
4357
4358         KASSERT(iphlen > 0, ("invalid ip hlen"));
4359         KASSERT(thoff > 0, ("invalid tcp hlen"));
4360         KASSERT(hoff > 0, ("invalid ether hlen"));
4361
4362         if (adapter->flags & EM_FLAG_TSO_PULLEX)
4363                 ex = 4;
4364
4365         if (m->m_len < hoff + iphlen + thoff + ex) {
4366                 m = m_pullup(m, hoff + iphlen + thoff + ex);
4367                 if (m == NULL) {
4368                         *mp = NULL;
4369                         return ENOBUFS;
4370                 }
4371                 *mp = m;
4372         }
4373         ip = mtodoff(m, struct ip *, hoff);
4374         ip->ip_len = 0;
4375
4376         return 0;
4377 }
4378
4379 static int
4380 em_tso_setup(struct adapter *adapter, struct mbuf *mp,
4381     uint32_t *txd_upper, uint32_t *txd_lower)
4382 {
4383         struct e1000_context_desc *TXD;
4384         int hoff, iphlen, thoff, hlen;
4385         int mss, pktlen, curr_txd;
4386
4387         iphlen = mp->m_pkthdr.csum_iphlen;
4388         thoff = mp->m_pkthdr.csum_thlen;
4389         hoff = mp->m_pkthdr.csum_lhlen;
4390         mss = mp->m_pkthdr.tso_segsz;
4391         pktlen = mp->m_pkthdr.len;
4392
4393         if (adapter->csum_flags == CSUM_TSO &&
4394             adapter->csum_iphlen == iphlen &&
4395             adapter->csum_lhlen == hoff &&
4396             adapter->csum_thlen == thoff &&
4397             adapter->csum_mss == mss &&
4398             adapter->csum_pktlen == pktlen) {
4399                 *txd_upper = adapter->csum_txd_upper;
4400                 *txd_lower = adapter->csum_txd_lower;
4401                 return 0;
4402         }
4403         hlen = hoff + iphlen + thoff;
4404
4405         /*
4406          * Setup a new TSO context.
4407          */
4408
4409         curr_txd = adapter->next_avail_tx_desc;
4410         TXD = (struct e1000_context_desc *)&adapter->tx_desc_base[curr_txd];
4411
4412         *txd_lower = E1000_TXD_CMD_DEXT |       /* Extended descr type */
4413                      E1000_TXD_DTYP_D |         /* Data descr type */
4414                      E1000_TXD_CMD_TSE;         /* Do TSE on this packet */
4415
4416         /* IP and/or TCP header checksum calculation and insertion. */
4417         *txd_upper = (E1000_TXD_POPTS_IXSM | E1000_TXD_POPTS_TXSM) << 8;
4418
4419         /*
4420          * Start offset for header checksum calculation.
4421          * End offset for header checksum calculation.
4422          * Offset of place put the checksum.
4423          */
4424         TXD->lower_setup.ip_fields.ipcss = hoff;
4425         TXD->lower_setup.ip_fields.ipcse = htole16(hoff + iphlen - 1);
4426         TXD->lower_setup.ip_fields.ipcso = hoff + offsetof(struct ip, ip_sum);
4427
4428         /*
4429          * Start offset for payload checksum calculation.
4430          * End offset for payload checksum calculation.
4431          * Offset of place to put the checksum.
4432          */
4433         TXD->upper_setup.tcp_fields.tucss = hoff + iphlen;
4434         TXD->upper_setup.tcp_fields.tucse = 0;
4435         TXD->upper_setup.tcp_fields.tucso =
4436             hoff + iphlen + offsetof(struct tcphdr, th_sum);
4437
4438         /*
4439          * Payload size per packet w/o any headers.
4440          * Length of all headers up to payload.
4441          */
4442         TXD->tcp_seg_setup.fields.mss = htole16(mss);
4443         TXD->tcp_seg_setup.fields.hdr_len = hlen;
4444         TXD->cmd_and_length = htole32(E1000_TXD_CMD_IFCS |
4445                                 E1000_TXD_CMD_DEXT |    /* Extended descr */
4446                                 E1000_TXD_CMD_TSE |     /* TSE context */
4447                                 E1000_TXD_CMD_IP |      /* Do IP csum */
4448                                 E1000_TXD_CMD_TCP |     /* Do TCP checksum */
4449                                 (pktlen - hlen));       /* Total len */
4450
4451         /* Save the information for this TSO context */
4452         adapter->csum_flags = CSUM_TSO;
4453         adapter->csum_lhlen = hoff;
4454         adapter->csum_iphlen = iphlen;
4455         adapter->csum_thlen = thoff;
4456         adapter->csum_mss = mss;
4457         adapter->csum_pktlen = pktlen;
4458         adapter->csum_txd_upper = *txd_upper;
4459         adapter->csum_txd_lower = *txd_lower;
4460
4461         if (++curr_txd == adapter->num_tx_desc)
4462                 curr_txd = 0;
4463
4464         KKASSERT(adapter->num_tx_desc_avail > 0);
4465         adapter->num_tx_desc_avail--;
4466
4467         adapter->next_avail_tx_desc = curr_txd;
4468         return 1;
4469 }