2 * Copyright (c) 2007 The DragonFly Project. All rights reserved.
4 * This code is derived from software contributed to The DragonFly Project
5 * by Matthew Dillon <dillon@backplane.com>
7 * Redistribution and use in source and binary forms, with or without
8 * modification, are permitted provided that the following conditions
11 * 1. Redistributions of source code must retain the above copyright
12 * notice, this list of conditions and the following disclaimer.
13 * 2. Redistributions in binary form must reproduce the above copyright
14 * notice, this list of conditions and the following disclaimer in
15 * the documentation and/or other materials provided with the
17 * 3. Neither the name of The DragonFly Project nor the names of its
18 * contributors may be used to endorse or promote products derived
19 * from this software without specific, prior written permission.
21 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
22 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
23 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
24 * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
25 * COPYRIGHT HOLDERS OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
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27 * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
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29 * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
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31 * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
34 * $DragonFly: src/sys/platform/vkernel/i386/mp.c,v 1.8 2008/05/07 17:19:46 dillon Exp $
38 #include <sys/interrupt.h>
39 #include <sys/kernel.h>
40 #include <sys/memrange.h>
42 #include <sys/types.h>
44 #include <vm/vm_extern.h>
45 #include <vm/vm_kern.h>
46 #include <vm/vm_object.h>
47 #include <vm/vm_page.h>
49 #include <sys/mplock2.h>
51 #include <machine/cpu.h>
52 #include <machine/cpufunc.h>
53 #include <machine/globaldata.h>
54 #include <machine/md_var.h>
55 #include <machine/pmap.h>
56 #include <machine/smp.h>
57 #include <machine/tls.h>
64 extern pt_entry_t *KPTphys;
66 volatile u_int stopped_cpus;
67 cpumask_t smp_active_mask = 1; /* which cpus are ready for IPIs etc? */
68 static int boot_address;
69 static cpumask_t smp_startup_mask = 1; /* which cpus have been started */
70 int mp_naps; /* # of Applications processors */
73 /* function prototypes XXX these should go elsewhere */
74 void bootstrap_idle(void);
75 void single_cpu_ipi(int, int, int);
76 void selected_cpu_ipi(u_int, int, int);
78 void ipi_handler(int);
83 /* AP uses this during bootstrap. Do not staticize. */
88 /* XXX these need to go into the appropriate header file */
89 static int start_all_aps(u_int);
90 void init_secondary(void);
91 void *start_ap(void *);
94 * Get SMP fully working before we start initializing devices.
101 cpumask_t ncpus_mask = 0;
103 for (i = 1; i <= ncpus; i++)
104 ncpus_mask |= (1 << i);
108 kprintf("Finish MP startup\n");
110 /* build our map of 'other' CPUs */
111 mycpu->gd_other_cpus = smp_startup_mask & ~(1 << mycpu->gd_cpuid);
114 * Let the other cpu's finish initializing and build their map
118 while (smp_active_mask != smp_startup_mask) {
123 while (try_mplock() == 0)
126 kprintf("Active CPU Mask: %08x\n", smp_active_mask);
129 SYSINIT(finishsmp, SI_BOOT2_FINISH_SMP, SI_ORDER_FIRST, ap_finish, NULL)
133 start_ap(void *arg __unused)
139 return(NULL); /* NOTREACHED */
142 /* storage for AP thread IDs */
143 pthread_t ap_tids[MAXCPU];
154 /* ncpus2 -- ncpus rounded down to the nearest power of 2 */
155 for (shift = 0; (1 << shift) <= ncpus; ++shift)
158 ncpus2_shift = shift;
160 ncpus2_mask = ncpus2 - 1;
162 /* ncpus_fit -- ncpus rounded up to the nearest power of 2 */
163 if ((1 << shift) < ncpus)
165 ncpus_fit = 1 << shift;
166 ncpus_fit_mask = ncpus_fit - 1;
169 * cpu0 initialization
171 mycpu->gd_ipiq = (void *)kmem_alloc(&kernel_map,
172 sizeof(lwkt_ipiq) * ncpus);
173 bzero(mycpu->gd_ipiq, sizeof(lwkt_ipiq) * ncpus);
178 start_all_aps(boot_address);
187 kprintf("DragonFly/MP: Multiprocessor\n");
188 kprintf(" cpu0 (BSP)\n");
190 for (x = 1; x <= mp_naps; ++x)
191 kprintf(" cpu%d (AP)\n", x);
195 forward_fastint_remote(void *arg)
197 panic("XXX forward_fastint_remote()");
201 cpu_send_ipiq(int dcpu)
203 if ((1 << dcpu) & smp_active_mask)
204 if (pthread_kill(ap_tids[dcpu], SIGUSR1) != 0)
205 panic("pthread_kill failed in cpu_send_ipiq");
207 panic("XXX cpu_send_ipiq()");
219 single_cpu_ipi(int cpu, int vector, int delivery_mode)
221 kprintf("XXX single_cpu_ipi\n");
225 selected_cpu_ipi(u_int target, int vector, int delivery_mode)
229 int n = bsfl(target);
231 single_cpu_ipi(n, vector, delivery_mode);
239 map &= smp_active_mask;
245 stopped_cpus |= 1 << n;
246 if (pthread_kill(ap_tids[n], SIGXCPU) != 0)
247 panic("stop_cpus: pthread_kill failed");
251 panic("XXX stop_cpus()");
258 restart_cpus(u_int map)
260 map &= smp_active_mask;
266 stopped_cpus &= ~(1 << n);
267 if (pthread_kill(ap_tids[n], SIGXCPU) != 0)
268 panic("restart_cpus: pthread_kill failed");
272 panic("XXX restart_cpus()");
282 * Adjust smp_startup_mask to signal the BSP that we have started
283 * up successfully. Note that we do not yet hold the BGL. The BSP
284 * is waiting for our signal.
286 * We can't set our bit in smp_active_mask yet because we are holding
287 * interrupts physically disabled and remote cpus could deadlock
288 * trying to send us an IPI.
290 smp_startup_mask |= 1 << mycpu->gd_cpuid;
294 * Interlock for finalization. Wait until mp_finish is non-zero,
295 * then get the MP lock.
297 * Note: We are in a critical section.
299 * Note: We have to synchronize td_mpcount to our desired MP state
300 * before calling cpu_try_mplock().
302 * Note: we are the idle thread, we can only spin.
304 * Note: The load fence is memory volatile and prevents the compiler
305 * from improperly caching mp_finish, and the cpu from improperly
309 while (mp_finish == 0) {
313 ++curthread->td_mpcount;
314 while (cpu_try_mplock() == 0)
317 /* BSP may have changed PTD while we're waiting for the lock */
320 /* Build our map of 'other' CPUs. */
321 mycpu->gd_other_cpus = smp_startup_mask & ~(1 << mycpu->gd_cpuid);
323 kprintf("SMP: AP CPU #%d Launched!\n", mycpu->gd_cpuid);
326 /* Set memory range attributes for this CPU to match the BSP */
329 * Once we go active we must process any IPIQ messages that may
330 * have been queued, because no actual IPI will occur until we
331 * set our bit in the smp_active_mask. If we don't the IPI
332 * message interlock could be left set which would also prevent
335 * The idle loop doesn't expect the BGL to be held and while
336 * lwkt_switch() normally cleans things up this is a special case
337 * because we returning almost directly into the idle loop.
339 * The idle thread is never placed on the runq, make sure
340 * nothing we've done put it there.
342 KKASSERT(curthread->td_mpcount == 1);
343 smp_active_mask |= 1 << mycpu->gd_cpuid;
345 mdcpu->gd_fpending = 0;
346 mdcpu->gd_ipending = 0;
347 initclocks_pcpu(); /* clock interrupts (via IPIs) */
351 * Releasing the mp lock lets the BSP finish up the SMP init
354 KKASSERT((curthread->td_flags & TDF_RUNQ) == 0);
361 struct mdglobaldata *md;
362 struct privatespace *ps;
364 ps = &CPU_prvspace[myid];
366 KKASSERT(ps->mdglobaldata.mi.gd_prvspace == ps);
369 * Setup the %gs for cpu #n. The mycpu macro works after this
370 * point. Note that %fs is used by pthreads.
372 tls_set_gs(&CPU_prvspace[myid], sizeof(struct privatespace));
374 md = mdcpu; /* loaded through %gs:0 (mdglobaldata.mi.gd_prvspace)*/
377 md->gd_common_tss.tss_rsp0 = 0; /* not used until after switch */
378 //md->gd_common_tss.tss_ss0 = GSEL(GDATA_SEL, SEL_KPL);
379 //md->gd_common_tss.tss_ioopt = (sizeof md->gd_common_tss) << 16;
382 * Set to a known state:
383 * Set by mpboot.s: CR0_PG, CR0_PE
384 * Set by cpu_setregs: CR0_NE, CR0_MP, CR0_TS, CR0_WP, CR0_AM
389 start_all_aps(u_int boot_addr)
392 struct mdglobaldata *gd;
393 struct privatespace *ps;
397 struct lwp_params params;
401 * needed for ipis to initial thread
402 * FIXME: rename ap_tids?
404 ap_tids[0] = pthread_self();
406 for (x = 1; x <= mp_naps; x++)
408 /* Allocate space for the CPU's private space. */
409 va = (vm_offset_t)&CPU_prvspace[x];
410 for (i = 0; i < sizeof(struct mdglobaldata); i += PAGE_SIZE) {
411 va =(vm_offset_t)&CPU_prvspace[x].mdglobaldata + i;
412 m = vm_page_alloc(&kernel_object, va, VM_ALLOC_SYSTEM);
413 pmap_kenter_quick(va, m->phys_addr);
416 for (i = 0; i < sizeof(CPU_prvspace[x].idlestack); i += PAGE_SIZE) {
417 va =(vm_offset_t)&CPU_prvspace[x].idlestack + i;
418 m = vm_page_alloc(&kernel_object, va, VM_ALLOC_SYSTEM);
419 pmap_kenter_quick(va, m->phys_addr);
422 gd = &CPU_prvspace[x].mdglobaldata; /* official location */
423 bzero(gd, sizeof(*gd));
424 gd->mi.gd_prvspace = ps = &CPU_prvspace[x];
426 /* prime data page for it to use */
427 mi_gdinit(&gd->mi, x);
431 gd->gd_CMAP1 = pmap_kpte((vm_offset_t)CPU_prvspace[x].CPAGE1);
432 gd->gd_CMAP2 = pmap_kpte((vm_offset_t)CPU_prvspace[x].CPAGE2);
433 gd->gd_CMAP3 = pmap_kpte((vm_offset_t)CPU_prvspace[x].CPAGE3);
434 gd->gd_PMAP1 = pmap_kpte((vm_offset_t)CPU_prvspace[x].PPAGE1);
435 gd->gd_CADDR1 = ps->CPAGE1;
436 gd->gd_CADDR2 = ps->CPAGE2;
437 gd->gd_CADDR3 = ps->CPAGE3;
438 gd->gd_PADDR1 = (vpte_t *)ps->PPAGE1;
441 gd->mi.gd_ipiq = (void *)kmem_alloc(&kernel_map, sizeof(lwkt_ipiq) * (mp_naps + 1));
442 bzero(gd->mi.gd_ipiq, sizeof(lwkt_ipiq) * (mp_naps + 1));
445 * Setup the AP boot stack
447 bootSTK = &ps->idlestack[UPAGES*PAGE_SIZE/2];
451 * Setup the AP's lwp, this is the 'cpu'
453 * We have to make sure our signals are masked or the new LWP
454 * may pick up a signal that it isn't ready for yet. SMP
455 * startup occurs after SI_BOOT2_LEAVE_CRIT so interrupts
456 * have already been enabled.
459 pthread_create(&ap_tids[x], NULL, start_ap, NULL);
462 while((smp_startup_mask & (1 << x)) == 0) {
463 cpu_lfence(); /* XXX spin until the AP has started */