sys/dev/netif/em/if_em.c

   1 /*
   2  * Copyright (c) 2004 Joerg Sonnenberger <joerg@bec.de>.  All rights reserved.
   3  *
   4  * Copyright (c) 2001-2008, Intel Corporation
   5  * All rights reserved.
   6  *
   7  * Redistribution and use in source and binary forms, with or without
   8  * modification, are permitted provided that the following conditions are met:
   9  *
  10  *  1. Redistributions of source code must retain the above copyright notice,
  11  *     this list of conditions and the following disclaimer.
  12  *
  13  *  2. Redistributions in binary form must reproduce the above copyright
  14  *     notice, this list of conditions and the following disclaimer in the
  15  *     documentation and/or other materials provided with the distribution.
  16  *
  17  *  3. Neither the name of the Intel Corporation nor the names of its
  18  *     contributors may be used to endorse or promote products derived from
  19  *     this software without specific prior written permission.
  20  *
  21  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
  22  * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
  23  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
  24  * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
  25  * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
  26  * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
  27  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
  28  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
  29  * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
  30  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
  31  * POSSIBILITY OF SUCH DAMAGE.
  32  *
  33  *
  34  * Copyright (c) 2005 The DragonFly Project.  All rights reserved.
  35  *
  36  * This code is derived from software contributed to The DragonFly Project
  37  * by Matthew Dillon <dillon@backplane.com>
  38  *
  39  * Redistribution and use in source and binary forms, with or without
  40  * modification, are permitted provided that the following conditions
  41  * are met:
  42  *
  43  * 1. Redistributions of source code must retain the above copyright
  44  *    notice, this list of conditions and the following disclaimer.
  45  * 2. Redistributions in binary form must reproduce the above copyright
  46  *    notice, this list of conditions and the following disclaimer in
  47  *    the documentation and/or other materials provided with the
  48  *    distribution.
  49  * 3. Neither the name of The DragonFly Project nor the names of its
  50  *    contributors may be used to endorse or promote products derived
  51  *    from this software without specific, prior written permission.
  52  *
  53  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
  54  * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
  55  * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
  56  * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE
  57  * COPYRIGHT HOLDERS OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
  58  * INCIDENTAL, SPECIAL, EXEMPLARY OR CONSEQUENTIAL DAMAGES (INCLUDING,
  59  * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
  60  * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
  61  * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
  62  * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT
  63  * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
  64  * SUCH DAMAGE.
  65  *
  66  */
  67 /*
  68  * SERIALIZATION API RULES:
  69  *
  70  * - If the driver uses the same serializer for the interrupt as for the
  71  *   ifnet, most of the serialization will be done automatically for the
  72  *   driver.
  73  *
  74  * - ifmedia entry points will be serialized by the ifmedia code using the
  75  *   ifnet serializer.
  76  *
  77  * - if_* entry points except for if_input will be serialized by the IF
  78  *   and protocol layers.
  79  *
  80  * - The device driver must be sure to serialize access from timeout code
  81  *   installed by the device driver.
  82  *
  83  * - The device driver typically holds the serializer at the time it wishes
  84  *   to call if_input.
  85  *
  86  * - We must call lwkt_serialize_handler_enable() prior to enabling the
  87  *   hardware interrupt and lwkt_serialize_handler_disable() after disabling
  88  *   the hardware interrupt in order to avoid handler execution races from
  89  *   scheduled interrupt threads.
  90  *
  91  *   NOTE!  Since callers into the device driver hold the ifnet serializer,
  92  *   the device driver may be holding a serializer at the time it calls
  93  *   if_input even if it is not serializer-aware.
  94  */
  95
  96 #include "opt_polling.h"
  97
  98 #include <sys/param.h>
  99 #include <sys/bus.h>
 100 #include <sys/endian.h>
 101 #include <sys/interrupt.h>
 102 #include <sys/kernel.h>
 103 #include <sys/ktr.h>
 104 #include <sys/malloc.h>
 105 #include <sys/mbuf.h>
 106 #include <sys/proc.h>
 107 #include <sys/rman.h>
 108 #include <sys/serialize.h>
 109 #include <sys/socket.h>
 110 #include <sys/sockio.h>
 111 #include <sys/sysctl.h>
 112 #include <sys/systm.h>
 113
 114 #include <net/bpf.h>
 115 #include <net/ethernet.h>
 116 #include <net/if.h>
 117 #include <net/if_arp.h>
 118 #include <net/if_dl.h>
 119 #include <net/if_media.h>
 120 #include <net/ifq_var.h>
 121 #include <net/vlan/if_vlan_var.h>
 122 #include <net/vlan/if_vlan_ether.h>
 123
 124 #include <netinet/in_systm.h>
 125 #include <netinet/in.h>
 126 #include <netinet/ip.h>
 127 #include <netinet/tcp.h>
 128 #include <netinet/udp.h>
 129
 130 #include <bus/pci/pcivar.h>
 131 #include <bus/pci/pcireg.h>
 132
 133 #include <dev/netif/ig_hal/e1000_api.h>
 134 #include <dev/netif/ig_hal/e1000_82571.h>
 135 #include <dev/netif/em/if_em.h>
 136
 137 #define EM_NAME "Intel(R) PRO/1000 Network Connection "
 138 #define EM_VER  " 7.1.7"
 139
 140 #define _EM_DEVICE(id, ret)     \
 141         { EM_VENDOR_ID, E1000_DEV_ID_##id, ret, EM_NAME #id EM_VER }
 142 #define EM_EMX_DEVICE(id)       _EM_DEVICE(id, -100)
 143 #define EM_DEVICE(id)           _EM_DEVICE(id, 0)
 144 #define EM_DEVICE_NULL  { 0, 0, 0, NULL }
 145
 146 static const struct em_vendor_info em_vendor_info_array[] = {
 147         EM_DEVICE(82540EM),
 148         EM_DEVICE(82540EM_LOM),
 149         EM_DEVICE(82540EP),
 150         EM_DEVICE(82540EP_LOM),
 151         EM_DEVICE(82540EP_LP),
 152
 153         EM_DEVICE(82541EI),
 154         EM_DEVICE(82541ER),
 155         EM_DEVICE(82541ER_LOM),
 156         EM_DEVICE(82541EI_MOBILE),
 157         EM_DEVICE(82541GI),
 158         EM_DEVICE(82541GI_LF),
 159         EM_DEVICE(82541GI_MOBILE),
 160
 161         EM_DEVICE(82542),
 162
 163         EM_DEVICE(82543GC_FIBER),
 164         EM_DEVICE(82543GC_COPPER),
 165
 166         EM_DEVICE(82544EI_COPPER),
 167         EM_DEVICE(82544EI_FIBER),
 168         EM_DEVICE(82544GC_COPPER),
 169         EM_DEVICE(82544GC_LOM),
 170
 171         EM_DEVICE(82545EM_COPPER),
 172         EM_DEVICE(82545EM_FIBER),
 173         EM_DEVICE(82545GM_COPPER),
 174         EM_DEVICE(82545GM_FIBER),
 175         EM_DEVICE(82545GM_SERDES),
 176
 177         EM_DEVICE(82546EB_COPPER),
 178         EM_DEVICE(82546EB_FIBER),
 179         EM_DEVICE(82546EB_QUAD_COPPER),
 180         EM_DEVICE(82546GB_COPPER),
 181         EM_DEVICE(82546GB_FIBER),
 182         EM_DEVICE(82546GB_SERDES),
 183         EM_DEVICE(82546GB_PCIE),
 184         EM_DEVICE(82546GB_QUAD_COPPER),
 185         EM_DEVICE(82546GB_QUAD_COPPER_KSP3),
 186
 187         EM_DEVICE(82547EI),
 188         EM_DEVICE(82547EI_MOBILE),
 189         EM_DEVICE(82547GI),
 190
 191         EM_EMX_DEVICE(82571EB_COPPER),
 192         EM_EMX_DEVICE(82571EB_FIBER),
 193         EM_EMX_DEVICE(82571EB_SERDES),
 194         EM_EMX_DEVICE(82571EB_SERDES_DUAL),
 195         EM_EMX_DEVICE(82571EB_SERDES_QUAD),
 196         EM_EMX_DEVICE(82571EB_QUAD_COPPER),
 197         EM_EMX_DEVICE(82571EB_QUAD_COPPER_BP),
 198         EM_EMX_DEVICE(82571EB_QUAD_COPPER_LP),
 199         EM_EMX_DEVICE(82571EB_QUAD_FIBER),
 200         EM_EMX_DEVICE(82571PT_QUAD_COPPER),
 201
 202         EM_EMX_DEVICE(82572EI_COPPER),
 203         EM_EMX_DEVICE(82572EI_FIBER),
 204         EM_EMX_DEVICE(82572EI_SERDES),
 205         EM_EMX_DEVICE(82572EI),
 206
 207         EM_EMX_DEVICE(82573E),
 208         EM_EMX_DEVICE(82573E_IAMT),
 209         EM_EMX_DEVICE(82573L),
 210
 211         EM_DEVICE(82583V),
 212
 213         EM_EMX_DEVICE(80003ES2LAN_COPPER_SPT),
 214         EM_EMX_DEVICE(80003ES2LAN_SERDES_SPT),
 215         EM_EMX_DEVICE(80003ES2LAN_COPPER_DPT),
 216         EM_EMX_DEVICE(80003ES2LAN_SERDES_DPT),
 217
 218         EM_DEVICE(ICH8_IGP_M_AMT),
 219         EM_DEVICE(ICH8_IGP_AMT),
 220         EM_DEVICE(ICH8_IGP_C),
 221         EM_DEVICE(ICH8_IFE),
 222         EM_DEVICE(ICH8_IFE_GT),
 223         EM_DEVICE(ICH8_IFE_G),
 224         EM_DEVICE(ICH8_IGP_M),
 225         EM_DEVICE(ICH8_82567V_3),
 226
 227         EM_DEVICE(ICH9_IGP_M_AMT),
 228         EM_DEVICE(ICH9_IGP_AMT),
 229         EM_DEVICE(ICH9_IGP_C),
 230         EM_DEVICE(ICH9_IGP_M),
 231         EM_DEVICE(ICH9_IGP_M_V),
 232         EM_DEVICE(ICH9_IFE),
 233         EM_DEVICE(ICH9_IFE_GT),
 234         EM_DEVICE(ICH9_IFE_G),
 235         EM_DEVICE(ICH9_BM),
 236
 237         EM_EMX_DEVICE(82574L),
 238         EM_EMX_DEVICE(82574LA),
 239
 240         EM_DEVICE(ICH10_R_BM_LM),
 241         EM_DEVICE(ICH10_R_BM_LF),
 242         EM_DEVICE(ICH10_R_BM_V),
 243         EM_DEVICE(ICH10_D_BM_LM),
 244         EM_DEVICE(ICH10_D_BM_LF),
 245         EM_DEVICE(ICH10_D_BM_V),
 246
 247         EM_DEVICE(PCH_M_HV_LM),
 248         EM_DEVICE(PCH_M_HV_LC),
 249         EM_DEVICE(PCH_D_HV_DM),
 250         EM_DEVICE(PCH_D_HV_DC),
 251
 252         EM_DEVICE(PCH2_LV_LM),
 253         EM_DEVICE(PCH2_LV_V),
 254
 255         /* required last entry */
 256         EM_DEVICE_NULL
 257 };
 258
 259 static int      em_probe(device_t);
 260 static int      em_attach(device_t);
 261 static int      em_detach(device_t);
 262 static int      em_shutdown(device_t);
 263 static int      em_suspend(device_t);
 264 static int      em_resume(device_t);
 265
 266 static void     em_init(void *);
 267 static void     em_stop(struct adapter *);
 268 static int      em_ioctl(struct ifnet *, u_long, caddr_t, struct ucred *);
 269 static void     em_start(struct ifnet *);
 270 #ifdef DEVICE_POLLING
 271 static void     em_poll(struct ifnet *, enum poll_cmd, int);
 272 #endif
 273 static void     em_watchdog(struct ifnet *);
 274 static void     em_media_status(struct ifnet *, struct ifmediareq *);
 275 static int      em_media_change(struct ifnet *);
 276 static void     em_timer(void *);
 277
 278 static void     em_intr(void *);
 279 static void     em_rxeof(struct adapter *, int);
 280 static void     em_txeof(struct adapter *);
 281 static void     em_tx_collect(struct adapter *);
 282 static void     em_tx_purge(struct adapter *);
 283 static void     em_enable_intr(struct adapter *);
 284 static void     em_disable_intr(struct adapter *);
 285
 286 static int      em_dma_malloc(struct adapter *, bus_size_t,
 287                     struct em_dma_alloc *);
 288 static void     em_dma_free(struct adapter *, struct em_dma_alloc *);
 289 static void     em_init_tx_ring(struct adapter *);
 290 static int      em_init_rx_ring(struct adapter *);
 291 static int      em_create_tx_ring(struct adapter *);
 292 static int      em_create_rx_ring(struct adapter *);
 293 static void     em_destroy_tx_ring(struct adapter *, int);
 294 static void     em_destroy_rx_ring(struct adapter *, int);
 295 static int      em_newbuf(struct adapter *, int, int);
 296 static int      em_encap(struct adapter *, struct mbuf **);
 297 static void     em_rxcsum(struct adapter *, struct e1000_rx_desc *,
 298                     struct mbuf *);
 299 static int      em_txcsum_pullup(struct adapter *, struct mbuf **);
 300 static int      em_txcsum(struct adapter *, struct mbuf *,
 301                     uint32_t *, uint32_t *);
 302
 303 static int      em_get_hw_info(struct adapter *);
 304 static int      em_is_valid_eaddr(const uint8_t *);
 305 static int      em_alloc_pci_res(struct adapter *);
 306 static void     em_free_pci_res(struct adapter *);
 307 static int      em_reset(struct adapter *);
 308 static void     em_setup_ifp(struct adapter *);
 309 static void     em_init_tx_unit(struct adapter *);
 310 static void     em_init_rx_unit(struct adapter *);
 311 static void     em_update_stats(struct adapter *);
 312 static void     em_set_promisc(struct adapter *);
 313 static void     em_disable_promisc(struct adapter *);
 314 static void     em_set_multi(struct adapter *);
 315 static void     em_update_link_status(struct adapter *);
 316 static void     em_smartspeed(struct adapter *);
 317 static void     em_set_itr(struct adapter *, uint32_t);
 318
 319 /* Hardware workarounds */
 320 static int      em_82547_fifo_workaround(struct adapter *, int);
 321 static void     em_82547_update_fifo_head(struct adapter *, int);
 322 static int      em_82547_tx_fifo_reset(struct adapter *);
 323 static void     em_82547_move_tail(void *);
 324 static void     em_82547_move_tail_serialized(struct adapter *);
 325 static uint32_t em_82544_fill_desc(bus_addr_t, uint32_t, PDESC_ARRAY);
 326
 327 static void     em_print_debug_info(struct adapter *);
 328 static void     em_print_nvm_info(struct adapter *);
 329 static void     em_print_hw_stats(struct adapter *);
 330
 331 static int      em_sysctl_stats(SYSCTL_HANDLER_ARGS);
 332 static int      em_sysctl_debug_info(SYSCTL_HANDLER_ARGS);
 333 static int      em_sysctl_int_throttle(SYSCTL_HANDLER_ARGS);
 334 static int      em_sysctl_int_tx_nsegs(SYSCTL_HANDLER_ARGS);
 335 static void     em_add_sysctl(struct adapter *adapter);
 336
 337 /* Management and WOL Support */
 338 static void     em_get_mgmt(struct adapter *);
 339 static void     em_rel_mgmt(struct adapter *);
 340 static void     em_get_hw_control(struct adapter *);
 341 static void     em_rel_hw_control(struct adapter *);
 342 static void     em_enable_wol(device_t);
 343
 344 static device_method_t em_methods[] = {
 345         /* Device interface */
 346         DEVMETHOD(device_probe,         em_probe),
 347         DEVMETHOD(device_attach,        em_attach),
 348         DEVMETHOD(device_detach,        em_detach),
 349         DEVMETHOD(device_shutdown,      em_shutdown),
 350         DEVMETHOD(device_suspend,       em_suspend),
 351         DEVMETHOD(device_resume,        em_resume),
 352         { 0, 0 }
 353 };
 354
 355 static driver_t em_driver = {
 356         "em",
 357         em_methods,
 358         sizeof(struct adapter),
 359 };
 360
 361 static devclass_t em_devclass;
 362
 363 DECLARE_DUMMY_MODULE(if_em);
 364 MODULE_DEPEND(em, ig_hal, 1, 1, 1);
 365 DRIVER_MODULE(if_em, pci, em_driver, em_devclass, NULL, NULL);
 366
 367 /*
 368  * Tunables
 369  */
 370 static int      em_int_throttle_ceil = EM_DEFAULT_ITR;
 371 static int      em_rxd = EM_DEFAULT_RXD;
 372 static int      em_txd = EM_DEFAULT_TXD;
 373 static int      em_smart_pwr_down = 0;
 374
 375 /* Controls whether promiscuous also shows bad packets */
 376 static int      em_debug_sbp = FALSE;
 377
 378 static int      em_82573_workaround = 1;
 379 static int      em_msi_enable = 1;
 380
 381 TUNABLE_INT("hw.em.int_throttle_ceil", &em_int_throttle_ceil);
 382 TUNABLE_INT("hw.em.rxd", &em_rxd);
 383 TUNABLE_INT("hw.em.txd", &em_txd);
 384 TUNABLE_INT("hw.em.smart_pwr_down", &em_smart_pwr_down);
 385 TUNABLE_INT("hw.em.sbp", &em_debug_sbp);
 386 TUNABLE_INT("hw.em.82573_workaround", &em_82573_workaround);
 387 TUNABLE_INT("hw.em.msi.enable", &em_msi_enable);
 388
 389 /* Global used in WOL setup with multiport cards */
 390 static int      em_global_quad_port_a = 0;
 391
 392 /* Set this to one to display debug statistics */
 393 static int      em_display_debug_stats = 0;
 394
 395 #if !defined(KTR_IF_EM)
 396 #define KTR_IF_EM       KTR_ALL
 397 #endif
 398 KTR_INFO_MASTER(if_em);
 399 KTR_INFO(KTR_IF_EM, if_em, intr_beg, 0, "intr begin");
 400 KTR_INFO(KTR_IF_EM, if_em, intr_end, 1, "intr end");
 401 KTR_INFO(KTR_IF_EM, if_em, pkt_receive, 4, "rx packet");
 402 KTR_INFO(KTR_IF_EM, if_em, pkt_txqueue, 5, "tx packet");
 403 KTR_INFO(KTR_IF_EM, if_em, pkt_txclean, 6, "tx clean");
 404 #define logif(name)     KTR_LOG(if_em_ ## name)
 405
 406 static int
 407 em_probe(device_t dev)
 408 {
 409         const struct em_vendor_info *ent;
 410         uint16_t vid, did;
 411
 412         vid = pci_get_vendor(dev);
 413         did = pci_get_device(dev);
 414
 415         for (ent = em_vendor_info_array; ent->desc != NULL; ++ent) {
 416                 if (vid == ent->vendor_id && did == ent->device_id) {
 417                         device_set_desc(dev, ent->desc);
 418                         device_set_async_attach(dev, TRUE);
 419                         return (ent->ret);
 420                 }
 421         }
 422         return (ENXIO);
 423 }
 424
 425 static int
 426 em_attach(device_t dev)
 427 {
 428         struct adapter *adapter = device_get_softc(dev);
 429         struct ifnet *ifp = &adapter->arpcom.ac_if;
 430         int tsize, rsize;
 431         int error = 0;
 432         uint16_t eeprom_data, device_id, apme_mask;
 433
 434         adapter->dev = adapter->osdep.dev = dev;
 435
 436         callout_init_mp(&adapter->timer);
 437         callout_init_mp(&adapter->tx_fifo_timer);
 438
 439         /* Determine hardware and mac info */
 440         error = em_get_hw_info(adapter);
 441         if (error) {
 442                 device_printf(dev, "Identify hardware failed\n");
 443                 goto fail;
 444         }
 445
 446         /* Setup PCI resources */
 447         error = em_alloc_pci_res(adapter);
 448         if (error) {
 449                 device_printf(dev, "Allocation of PCI resources failed\n");
 450                 goto fail;
 451         }
 452
 453         /*
 454          * For ICH8 and family we need to map the flash memory,
 455          * and this must happen after the MAC is identified.
 456          */
 457         if (adapter->hw.mac.type == e1000_ich8lan ||
 458             adapter->hw.mac.type == e1000_ich9lan ||
 459             adapter->hw.mac.type == e1000_ich10lan ||
 460             adapter->hw.mac.type == e1000_pchlan ||
 461             adapter->hw.mac.type == e1000_pch2lan) {
 462                 adapter->flash_rid = EM_BAR_FLASH;
 463
 464                 adapter->flash = bus_alloc_resource_any(dev, SYS_RES_MEMORY,
 465                                         &adapter->flash_rid, RF_ACTIVE);
 466                 if (adapter->flash == NULL) {
 467                         device_printf(dev, "Mapping of Flash failed\n");
 468                         error = ENXIO;
 469                         goto fail;
 470                 }
 471                 adapter->osdep.flash_bus_space_tag =
 472                     rman_get_bustag(adapter->flash);
 473                 adapter->osdep.flash_bus_space_handle =
 474                     rman_get_bushandle(adapter->flash);
 475
 476                 /*
 477                  * This is used in the shared code
 478                  * XXX this goof is actually not used.
 479                  */
 480                 adapter->hw.flash_address = (uint8_t *)adapter->flash;
 481         }
 482
 483         /* Do Shared Code initialization */
 484         if (e1000_setup_init_funcs(&adapter->hw, TRUE)) {
 485                 device_printf(dev, "Setup of Shared code failed\n");
 486                 error = ENXIO;
 487                 goto fail;
 488         }
 489
 490         e1000_get_bus_info(&adapter->hw);
 491
 492         /*
 493          * Validate number of transmit and receive descriptors.  It
 494          * must not exceed hardware maximum, and must be multiple
 495          * of E1000_DBA_ALIGN.
 496          */
 497         if ((em_txd * sizeof(struct e1000_tx_desc)) % EM_DBA_ALIGN != 0 ||
 498             (adapter->hw.mac.type >= e1000_82544 && em_txd > EM_MAX_TXD) ||
 499             (adapter->hw.mac.type < e1000_82544 && em_txd > EM_MAX_TXD_82543) ||
 500             em_txd < EM_MIN_TXD) {
 501                 device_printf(dev, "Using %d TX descriptors instead of %d!\n",
 502                     EM_DEFAULT_TXD, em_txd);
 503                 adapter->num_tx_desc = EM_DEFAULT_TXD;
 504         } else {
 505                 adapter->num_tx_desc = em_txd;
 506         }
 507         if ((em_rxd * sizeof(struct e1000_rx_desc)) % EM_DBA_ALIGN != 0 ||
 508             (adapter->hw.mac.type >= e1000_82544 && em_rxd > EM_MAX_RXD) ||
 509             (adapter->hw.mac.type < e1000_82544 && em_rxd > EM_MAX_RXD_82543) ||
 510             em_rxd < EM_MIN_RXD) {
 511                 device_printf(dev, "Using %d RX descriptors instead of %d!\n",
 512                     EM_DEFAULT_RXD, em_rxd);
 513                 adapter->num_rx_desc = EM_DEFAULT_RXD;
 514         } else {
 515                 adapter->num_rx_desc = em_rxd;
 516         }
 517
 518         adapter->hw.mac.autoneg = DO_AUTO_NEG;
 519         adapter->hw.phy.autoneg_wait_to_complete = FALSE;
 520         adapter->hw.phy.autoneg_advertised = AUTONEG_ADV_DEFAULT;
 521         adapter->rx_buffer_len = MCLBYTES;
 522
 523         /*
 524          * Interrupt throttle rate
 525          */
 526         if (em_int_throttle_ceil == 0) {
 527                 adapter->int_throttle_ceil = 0;
 528         } else {
 529                 int throttle = em_int_throttle_ceil;
 530
 531                 if (throttle < 0)
 532                         throttle = EM_DEFAULT_ITR;
 533
 534                 /* Recalculate the tunable value to get the exact frequency. */
 535                 throttle = 1000000000 / 256 / throttle;
 536
 537                 /* Upper 16bits of ITR is reserved and should be zero */
 538                 if (throttle & 0xffff0000)
 539                         throttle = 1000000000 / 256 / EM_DEFAULT_ITR;
 540
 541                 adapter->int_throttle_ceil = 1000000000 / 256 / throttle;
 542         }
 543
 544         e1000_init_script_state_82541(&adapter->hw, TRUE);
 545         e1000_set_tbi_compatibility_82543(&adapter->hw, TRUE);
 546
 547         /* Copper options */
 548         if (adapter->hw.phy.media_type == e1000_media_type_copper) {
 549                 adapter->hw.phy.mdix = AUTO_ALL_MODES;
 550                 adapter->hw.phy.disable_polarity_correction = FALSE;
 551                 adapter->hw.phy.ms_type = EM_MASTER_SLAVE;
 552         }
 553
 554         /* Set the frame limits assuming standard ethernet sized frames. */
 555         adapter->max_frame_size = ETHERMTU + ETHER_HDR_LEN + ETHER_CRC_LEN;
 556         adapter->min_frame_size = ETH_ZLEN + ETHER_CRC_LEN;
 557
 558         /* This controls when hardware reports transmit completion status. */
 559         adapter->hw.mac.report_tx_early = 1;
 560
 561         /*
 562          * Create top level busdma tag
 563          */
 564         error = bus_dma_tag_create(NULL, 1, 0,
 565                         BUS_SPACE_MAXADDR, BUS_SPACE_MAXADDR,
 566                         NULL, NULL,
 567                         BUS_SPACE_MAXSIZE_32BIT, 0, BUS_SPACE_MAXSIZE_32BIT,
 568                         0, &adapter->parent_dtag);
 569         if (error) {
 570                 device_printf(dev, "could not create top level DMA tag\n");
 571                 goto fail;
 572         }
 573
 574         /*
 575          * Allocate Transmit Descriptor ring
 576          */
 577         tsize = roundup2(adapter->num_tx_desc * sizeof(struct e1000_tx_desc),
 578                          EM_DBA_ALIGN);
 579         error = em_dma_malloc(adapter, tsize, &adapter->txdma);
 580         if (error) {
 581                 device_printf(dev, "Unable to allocate tx_desc memory\n");
 582                 goto fail;
 583         }
 584         adapter->tx_desc_base = adapter->txdma.dma_vaddr;
 585
 586         /*
 587          * Allocate Receive Descriptor ring
 588          */
 589         rsize = roundup2(adapter->num_rx_desc * sizeof(struct e1000_rx_desc),
 590                          EM_DBA_ALIGN);
 591         error = em_dma_malloc(adapter, rsize, &adapter->rxdma);
 592         if (error) {
 593                 device_printf(dev, "Unable to allocate rx_desc memory\n");
 594                 goto fail;
 595         }
 596         adapter->rx_desc_base = adapter->rxdma.dma_vaddr;
 597
 598         /* Allocate multicast array memory. */
 599         adapter->mta = kmalloc(ETH_ADDR_LEN * MAX_NUM_MULTICAST_ADDRESSES,
 600             M_DEVBUF, M_WAITOK);
 601
 602         /* Indicate SOL/IDER usage */
 603         if (e1000_check_reset_block(&adapter->hw)) {
 604                 device_printf(dev,
 605                     "PHY reset is blocked due to SOL/IDER session.\n");
 606         }
 607
 608         /*
 609          * Start from a known state, this is important in reading the
 610          * nvm and mac from that.
 611          */
 612         e1000_reset_hw(&adapter->hw);
 613
 614         /* Make sure we have a good EEPROM before we read from it */
 615         if (e1000_validate_nvm_checksum(&adapter->hw) < 0) {
 616                 /*
 617                  * Some PCI-E parts fail the first check due to
 618                  * the link being in sleep state, call it again,
 619                  * if it fails a second time its a real issue.
 620                  */
 621                 if (e1000_validate_nvm_checksum(&adapter->hw) < 0) {
 622                         device_printf(dev,
 623                             "The EEPROM Checksum Is Not Valid\n");
 624                         error = EIO;
 625                         goto fail;
 626                 }
 627         }
 628
 629         /* Copy the permanent MAC address out of the EEPROM */
 630         if (e1000_read_mac_addr(&adapter->hw) < 0) {
 631                 device_printf(dev, "EEPROM read error while reading MAC"
 632                     " address\n");
 633                 error = EIO;
 634                 goto fail;
 635         }
 636         if (!em_is_valid_eaddr(adapter->hw.mac.addr)) {
 637                 device_printf(dev, "Invalid MAC address\n");
 638                 error = EIO;
 639                 goto fail;
 640         }
 641
 642         /* Allocate transmit descriptors and buffers */
 643         error = em_create_tx_ring(adapter);
 644         if (error) {
 645                 device_printf(dev, "Could not setup transmit structures\n");
 646                 goto fail;
 647         }
 648
 649         /* Allocate receive descriptors and buffers */
 650         error = em_create_rx_ring(adapter);
 651         if (error) {
 652                 device_printf(dev, "Could not setup receive structures\n");
 653                 goto fail;
 654         }
 655
 656         /* Manually turn off all interrupts */
 657         E1000_WRITE_REG(&adapter->hw, E1000_IMC, 0xffffffff);
 658
 659         /* Determine if we have to control management hardware */
 660         adapter->has_manage = e1000_enable_mng_pass_thru(&adapter->hw);
 661
 662         /*
 663          * Setup Wake-on-Lan
 664          */
 665         apme_mask = EM_EEPROM_APME;
 666         eeprom_data = 0;
 667         switch (adapter->hw.mac.type) {
 668         case e1000_82542:
 669         case e1000_82543:
 670                 break;
 671
 672         case e1000_82573:
 673         case e1000_82583:
 674                 adapter->has_amt = 1;
 675                 /* FALL THROUGH */
 676
 677         case e1000_82546:
 678         case e1000_82546_rev_3:
 679         case e1000_82571:
 680         case e1000_82572:
 681         case e1000_80003es2lan:
 682                 if (adapter->hw.bus.func == 1) {
 683                         e1000_read_nvm(&adapter->hw,
 684                             NVM_INIT_CONTROL3_PORT_B, 1, &eeprom_data);
 685                 } else {
 686                         e1000_read_nvm(&adapter->hw,
 687                             NVM_INIT_CONTROL3_PORT_A, 1, &eeprom_data);
 688                 }
 689                 break;
 690
 691         case e1000_ich8lan:
 692         case e1000_ich9lan:
 693         case e1000_ich10lan:
 694         case e1000_pchlan:
 695         case e1000_pch2lan:
 696                 apme_mask = E1000_WUC_APME;
 697                 adapter->has_amt = TRUE;
 698                 eeprom_data = E1000_READ_REG(&adapter->hw, E1000_WUC);
 699                 break;
 700
 701         default:
 702                 e1000_read_nvm(&adapter->hw,
 703                     NVM_INIT_CONTROL3_PORT_A, 1, &eeprom_data);
 704                 break;
 705         }
 706         if (eeprom_data & apme_mask)
 707                 adapter->wol = E1000_WUFC_MAG | E1000_WUFC_MC;
 708
 709         /*
 710          * We have the eeprom settings, now apply the special cases
 711          * where the eeprom may be wrong or the board won't support
 712          * wake on lan on a particular port
 713          */
 714         device_id = pci_get_device(dev);
 715         switch (device_id) {
 716         case E1000_DEV_ID_82546GB_PCIE:
 717                 adapter->wol = 0;
 718                 break;
 719
 720         case E1000_DEV_ID_82546EB_FIBER:
 721         case E1000_DEV_ID_82546GB_FIBER:
 722         case E1000_DEV_ID_82571EB_FIBER:
 723                 /*
 724                  * Wake events only supported on port A for dual fiber
 725                  * regardless of eeprom setting
 726                  */
 727                 if (E1000_READ_REG(&adapter->hw, E1000_STATUS) &
 728                     E1000_STATUS_FUNC_1)
 729                         adapter->wol = 0;
 730                 break;
 731
 732         case E1000_DEV_ID_82546GB_QUAD_COPPER_KSP3:
 733         case E1000_DEV_ID_82571EB_QUAD_COPPER:
 734         case E1000_DEV_ID_82571EB_QUAD_FIBER:
 735         case E1000_DEV_ID_82571EB_QUAD_COPPER_LP:
 736                 /* if quad port adapter, disable WoL on all but port A */
 737                 if (em_global_quad_port_a != 0)
 738                         adapter->wol = 0;
 739                 /* Reset for multiple quad port adapters */
 740                 if (++em_global_quad_port_a == 4)
 741                         em_global_quad_port_a = 0;
 742                 break;
 743         }
 744
 745         /* XXX disable wol */
 746         adapter->wol = 0;
 747
 748         /* Setup OS specific network interface */
 749         em_setup_ifp(adapter);
 750
 751         /* Add sysctl tree, must after em_setup_ifp() */
 752         em_add_sysctl(adapter);
 753
 754         /* Reset the hardware */
 755         error = em_reset(adapter);
 756         if (error) {
 757                 device_printf(dev, "Unable to reset the hardware\n");
 758                 goto fail;
 759         }
 760
 761         /* Initialize statistics */
 762         em_update_stats(adapter);
 763
 764         adapter->hw.mac.get_link_status = 1;
 765         em_update_link_status(adapter);
 766
 767         /* Do we need workaround for 82544 PCI-X adapter? */
 768         if (adapter->hw.bus.type == e1000_bus_type_pcix &&
 769             adapter->hw.mac.type == e1000_82544)
 770                 adapter->pcix_82544 = TRUE;
 771         else
 772                 adapter->pcix_82544 = FALSE;
 773
 774         if (adapter->pcix_82544) {
 775                 /*
 776                  * 82544 on PCI-X may split one TX segment
 777                  * into two TX descs, so we double its number
 778                  * of spare TX desc here.
 779                  */
 780                 adapter->spare_tx_desc = 2 * EM_TX_SPARE;
 781         } else {
 782                 adapter->spare_tx_desc = EM_TX_SPARE;
 783         }
 784
 785         /*
 786          * Keep following relationship between spare_tx_desc, oact_tx_desc
 787          * and tx_int_nsegs:
 788          * (spare_tx_desc + EM_TX_RESERVED) <=
 789          * oact_tx_desc <= EM_TX_OACTIVE_MAX <= tx_int_nsegs
 790          */
 791         adapter->oact_tx_desc = adapter->num_tx_desc / 8;
 792         if (adapter->oact_tx_desc > EM_TX_OACTIVE_MAX)
 793                 adapter->oact_tx_desc = EM_TX_OACTIVE_MAX;
 794         if (adapter->oact_tx_desc < adapter->spare_tx_desc + EM_TX_RESERVED)
 795                 adapter->oact_tx_desc = adapter->spare_tx_desc + EM_TX_RESERVED;
 796
 797         adapter->tx_int_nsegs = adapter->num_tx_desc / 16;
 798         if (adapter->tx_int_nsegs < adapter->oact_tx_desc)
 799                 adapter->tx_int_nsegs = adapter->oact_tx_desc;
 800
 801         /* Non-AMT based hardware can now take control from firmware */
 802         if (adapter->has_manage && !adapter->has_amt &&
 803             adapter->hw.mac.type >= e1000_82571)
 804                 em_get_hw_control(adapter);
 805
 806         error = bus_setup_intr(dev, adapter->intr_res, INTR_MPSAFE,
 807                                em_intr, adapter, &adapter->intr_tag,
 808                                ifp->if_serializer);
 809         if (error) {
 810                 device_printf(dev, "Failed to register interrupt handler");
 811                 ether_ifdetach(&adapter->arpcom.ac_if);
 812                 goto fail;
 813         }
 814
 815         ifp->if_cpuid = rman_get_cpuid(adapter->intr_res);
 816         KKASSERT(ifp->if_cpuid >= 0 && ifp->if_cpuid < ncpus);
 817         return (0);
 818 fail:
 819         em_detach(dev);
 820         return (error);
 821 }
 822
 823 static int
 824 em_detach(device_t dev)
 825 {
 826         struct adapter *adapter = device_get_softc(dev);
 827
 828         if (device_is_attached(dev)) {
 829                 struct ifnet *ifp = &adapter->arpcom.ac_if;
 830
 831                 lwkt_serialize_enter(ifp->if_serializer);
 832
 833                 em_stop(adapter);
 834
 835                 e1000_phy_hw_reset(&adapter->hw);
 836
 837                 em_rel_mgmt(adapter);
 838                 em_rel_hw_control(adapter);
 839
 840                 if (adapter->wol) {
 841                         E1000_WRITE_REG(&adapter->hw, E1000_WUC,
 842                                         E1000_WUC_PME_EN);
 843                         E1000_WRITE_REG(&adapter->hw, E1000_WUFC, adapter->wol);
 844                         em_enable_wol(dev);
 845                 }
 846
 847                 bus_teardown_intr(dev, adapter->intr_res, adapter->intr_tag);
 848
 849                 lwkt_serialize_exit(ifp->if_serializer);
 850
 851                 ether_ifdetach(ifp);
 852         } else {
 853                 em_rel_hw_control(adapter);
 854         }
 855         bus_generic_detach(dev);
 856
 857         em_free_pci_res(adapter);
 858
 859         em_destroy_tx_ring(adapter, adapter->num_tx_desc);
 860         em_destroy_rx_ring(adapter, adapter->num_rx_desc);
 861
 862         /* Free Transmit Descriptor ring */
 863         if (adapter->tx_desc_base)
 864                 em_dma_free(adapter, &adapter->txdma);
 865
 866         /* Free Receive Descriptor ring */
 867         if (adapter->rx_desc_base)
 868                 em_dma_free(adapter, &adapter->rxdma);
 869
 870         /* Free top level busdma tag */
 871         if (adapter->parent_dtag != NULL)
 872                 bus_dma_tag_destroy(adapter->parent_dtag);
 873
 874         /* Free sysctl tree */
 875         if (adapter->sysctl_tree != NULL)
 876                 sysctl_ctx_free(&adapter->sysctl_ctx);
 877
 878         return (0);
 879 }
 880
 881 static int
 882 em_shutdown(device_t dev)
 883 {
 884         return em_suspend(dev);
 885 }
 886
 887 static int
 888 em_suspend(device_t dev)
 889 {
 890         struct adapter *adapter = device_get_softc(dev);
 891         struct ifnet *ifp = &adapter->arpcom.ac_if;
 892
 893         lwkt_serialize_enter(ifp->if_serializer);
 894
 895         em_stop(adapter);
 896
 897         em_rel_mgmt(adapter);
 898         em_rel_hw_control(adapter);
 899
 900         if (adapter->wol) {
 901                 E1000_WRITE_REG(&adapter->hw, E1000_WUC, E1000_WUC_PME_EN);
 902                 E1000_WRITE_REG(&adapter->hw, E1000_WUFC, adapter->wol);
 903                 em_enable_wol(dev);
 904         }
 905
 906         lwkt_serialize_exit(ifp->if_serializer);
 907
 908         return bus_generic_suspend(dev);
 909 }
 910
 911 static int
 912 em_resume(device_t dev)
 913 {
 914         struct adapter *adapter = device_get_softc(dev);
 915         struct ifnet *ifp = &adapter->arpcom.ac_if;
 916
 917         lwkt_serialize_enter(ifp->if_serializer);
 918
 919         em_init(adapter);
 920         em_get_mgmt(adapter);
 921         if_devstart(ifp);
 922
 923         lwkt_serialize_exit(ifp->if_serializer);
 924
 925         return bus_generic_resume(dev);
 926 }
 927
 928 static void
 929 em_start(struct ifnet *ifp)
 930 {
 931         struct adapter *adapter = ifp->if_softc;
 932         struct mbuf *m_head;
 933
 934         ASSERT_SERIALIZED(ifp->if_serializer);
 935
 936         if ((ifp->if_flags & (IFF_RUNNING | IFF_OACTIVE)) != IFF_RUNNING)
 937                 return;
 938
 939         if (!adapter->link_active) {
 940                 ifq_purge(&ifp->if_snd);
 941                 return;
 942         }
 943
 944         while (!ifq_is_empty(&ifp->if_snd)) {
 945                 /* Now do we at least have a minimal? */
 946                 if (EM_IS_OACTIVE(adapter)) {
 947                         em_tx_collect(adapter);
 948                         if (EM_IS_OACTIVE(adapter)) {
 949                                 ifp->if_flags |= IFF_OACTIVE;
 950                                 adapter->no_tx_desc_avail1++;
 951                                 break;
 952                         }
 953                 }
 954
 955                 logif(pkt_txqueue);
 956                 m_head = ifq_dequeue(&ifp->if_snd, NULL);
 957                 if (m_head == NULL)
 958                         break;
 959
 960                 if (em_encap(adapter, &m_head)) {
 961                         ifp->if_oerrors++;
 962                         em_tx_collect(adapter);
 963                         continue;
 964                 }
 965
 966                 /* Send a copy of the frame to the BPF listener */
 967                 ETHER_BPF_MTAP(ifp, m_head);
 968
 969                 /* Set timeout in case hardware has problems transmitting. */
 970                 ifp->if_timer = EM_TX_TIMEOUT;
 971         }
 972 }
 973
 974 static int
 975 em_ioctl(struct ifnet *ifp, u_long command, caddr_t data, struct ucred *cr)
 976 {
 977         struct adapter *adapter = ifp->if_softc;
 978         struct ifreq *ifr = (struct ifreq *)data;
 979         uint16_t eeprom_data = 0;
 980         int max_frame_size, mask, reinit;
 981         int error = 0;
 982
 983         ASSERT_SERIALIZED(ifp->if_serializer);
 984
 985         switch (command) {
 986         case SIOCSIFMTU:
 987                 switch (adapter->hw.mac.type) {
 988                 case e1000_82573:
 989                         /*
 990                          * 82573 only supports jumbo frames
 991                          * if ASPM is disabled.
 992                          */
 993                         e1000_read_nvm(&adapter->hw,
 994                             NVM_INIT_3GIO_3, 1, &eeprom_data);
 995                         if (eeprom_data & NVM_WORD1A_ASPM_MASK) {
 996                                 max_frame_size = ETHER_MAX_LEN;
 997                                 break;
 998                         }
 999                         /* FALL THROUGH */
1000
1001                 /* Limit Jumbo Frame size */
1002                 case e1000_82571:
1003                 case e1000_82572:
1004                 case e1000_ich9lan:
1005                 case e1000_ich10lan:
1006                 case e1000_pch2lan:
1007                 case e1000_82574:
1008                 case e1000_80003es2lan:
1009                         max_frame_size = 9234;
1010                         break;
1011
1012                 case e1000_pchlan:
1013                         max_frame_size = 4096;
1014                         break;
1015
1016                 /* Adapters that do not support jumbo frames */
1017                 case e1000_82542:
1018                 case e1000_82583:
1019                 case e1000_ich8lan:
1020                         max_frame_size = ETHER_MAX_LEN;
1021                         break;
1022
1023                 default:
1024                         max_frame_size = MAX_JUMBO_FRAME_SIZE;
1025                         break;
1026                 }
1027                 if (ifr->ifr_mtu > max_frame_size - ETHER_HDR_LEN -
1028                     ETHER_CRC_LEN) {
1029                         error = EINVAL;
1030                         break;
1031                 }
1032
1033                 ifp->if_mtu = ifr->ifr_mtu;
1034                 adapter->max_frame_size =
1035                     ifp->if_mtu + ETHER_HDR_LEN + ETHER_CRC_LEN;
1036
1037                 if (ifp->if_flags & IFF_RUNNING)
1038                         em_init(adapter);
1039                 break;
1040
1041         case SIOCSIFFLAGS:
1042                 if (ifp->if_flags & IFF_UP) {
1043                         if ((ifp->if_flags & IFF_RUNNING)) {
1044                                 if ((ifp->if_flags ^ adapter->if_flags) &
1045                                     (IFF_PROMISC | IFF_ALLMULTI)) {
1046                                         em_disable_promisc(adapter);
1047                                         em_set_promisc(adapter);
1048                                 }
1049                         } else {
1050                                 em_init(adapter);
1051                         }
1052                 } else if (ifp->if_flags & IFF_RUNNING) {
1053                         em_stop(adapter);
1054                 }
1055                 adapter->if_flags = ifp->if_flags;
1056                 break;
1057
1058         case SIOCADDMULTI:
1059         case SIOCDELMULTI:
1060                 if (ifp->if_flags & IFF_RUNNING) {
1061                         em_disable_intr(adapter);
1062                         em_set_multi(adapter);
1063                         if (adapter->hw.mac.type == e1000_82542 &&
1064                             adapter->hw.revision_id == E1000_REVISION_2)
1065                                 em_init_rx_unit(adapter);
1066 #ifdef DEVICE_POLLING
1067                         if (!(ifp->if_flags & IFF_POLLING))
1068 #endif
1069                                 em_enable_intr(adapter);
1070                 }
1071                 break;
1072
1073         case SIOCSIFMEDIA:
1074                 /* Check SOL/IDER usage */
1075                 if (e1000_check_reset_block(&adapter->hw)) {
1076                         device_printf(adapter->dev, "Media change is"
1077                             " blocked due to SOL/IDER session.\n");
1078                         break;
1079                 }
1080                 /* FALL THROUGH */
1081
1082         case SIOCGIFMEDIA:
1083                 error = ifmedia_ioctl(ifp, ifr, &adapter->media, command);
1084                 break;
1085
1086         case SIOCSIFCAP:
1087                 reinit = 0;
1088                 mask = ifr->ifr_reqcap ^ ifp->if_capenable;
1089                 if (mask & IFCAP_HWCSUM) {
1090                         ifp->if_capenable ^= (mask & IFCAP_HWCSUM);
1091                         reinit = 1;
1092                 }
1093                 if (mask & IFCAP_VLAN_HWTAGGING) {
1094                         ifp->if_capenable ^= IFCAP_VLAN_HWTAGGING;
1095                         reinit = 1;
1096                 }
1097                 if (reinit && (ifp->if_flags & IFF_RUNNING))
1098                         em_init(adapter);
1099                 break;
1100
1101         default:
1102                 error = ether_ioctl(ifp, command, data);
1103                 break;
1104         }
1105         return (error);
1106 }
1107
1108 static void
1109 em_watchdog(struct ifnet *ifp)
1110 {
1111         struct adapter *adapter = ifp->if_softc;
1112
1113         ASSERT_SERIALIZED(ifp->if_serializer);
1114
1115         /*
1116          * The timer is set to 5 every time start queues a packet.
1117          * Then txeof keeps resetting it as long as it cleans at
1118          * least one descriptor.
1119          * Finally, anytime all descriptors are clean the timer is
1120          * set to 0.
1121          */
1122
1123         if (E1000_READ_REG(&adapter->hw, E1000_TDT(0)) ==
1124             E1000_READ_REG(&adapter->hw, E1000_TDH(0))) {
1125                 /*
1126                  * If we reach here, all TX jobs are completed and
1127                  * the TX engine should have been idled for some time.
1128                  * We don't need to call if_devstart() here.
1129                  */
1130                 ifp->if_flags &= ~IFF_OACTIVE;
1131                 ifp->if_timer = 0;
1132                 return;
1133         }
1134
1135         /*
1136          * If we are in this routine because of pause frames, then
1137          * don't reset the hardware.
1138          */
1139         if (E1000_READ_REG(&adapter->hw, E1000_STATUS) &
1140             E1000_STATUS_TXOFF) {
1141                 ifp->if_timer = EM_TX_TIMEOUT;
1142                 return;
1143         }
1144
1145         if (e1000_check_for_link(&adapter->hw) == 0)
1146                 if_printf(ifp, "watchdog timeout -- resetting\n");
1147
1148         ifp->if_oerrors++;
1149         adapter->watchdog_events++;
1150
1151         em_init(adapter);
1152
1153         if (!ifq_is_empty(&ifp->if_snd))
1154                 if_devstart(ifp);
1155 }
1156
1157 static void
1158 em_init(void *xsc)
1159 {
1160         struct adapter *adapter = xsc;
1161         struct ifnet *ifp = &adapter->arpcom.ac_if;
1162         device_t dev = adapter->dev;
1163         uint32_t pba;
1164
1165         ASSERT_SERIALIZED(ifp->if_serializer);
1166
1167         em_stop(adapter);
1168
1169         /*
1170          * Packet Buffer Allocation (PBA)
1171          * Writing PBA sets the receive portion of the buffer
1172          * the remainder is used for the transmit buffer.
1173          *
1174          * Devices before the 82547 had a Packet Buffer of 64K.
1175          *   Default allocation: PBA=48K for Rx, leaving 16K for Tx.
1176          * After the 82547 the buffer was reduced to 40K.
1177          *   Default allocation: PBA=30K for Rx, leaving 10K for Tx.
1178          *   Note: default does not leave enough room for Jumbo Frame >10k.
1179          */
1180         switch (adapter->hw.mac.type) {
1181         case e1000_82547:
1182         case e1000_82547_rev_2: /* 82547: Total Packet Buffer is 40K */
1183                 if (adapter->max_frame_size > 8192)
1184                         pba = E1000_PBA_22K; /* 22K for Rx, 18K for Tx */
1185                 else
1186                         pba = E1000_PBA_30K; /* 30K for Rx, 10K for Tx */
1187                 adapter->tx_fifo_head = 0;
1188                 adapter->tx_head_addr = pba << EM_TX_HEAD_ADDR_SHIFT;
1189                 adapter->tx_fifo_size =
1190                     (E1000_PBA_40K - pba) << EM_PBA_BYTES_SHIFT;
1191                 break;
1192
1193         /* Total Packet Buffer on these is 48K */
1194         case e1000_82571:
1195         case e1000_82572:
1196         case e1000_80003es2lan:
1197                 pba = E1000_PBA_32K; /* 32K for Rx, 16K for Tx */
1198                 break;
1199
1200         case e1000_82573: /* 82573: Total Packet Buffer is 32K */
1201                 pba = E1000_PBA_12K; /* 12K for Rx, 20K for Tx */
1202                 break;
1203
1204         case e1000_82574:
1205         case e1000_82583:
1206                 pba = E1000_PBA_20K; /* 20K for Rx, 20K for Tx */
1207                 break;
1208
1209         case e1000_ich8lan:
1210                 pba = E1000_PBA_8K;
1211                 break;
1212
1213         case e1000_ich9lan:
1214         case e1000_ich10lan:
1215 #define E1000_PBA_10K   0x000A
1216                 pba = E1000_PBA_10K;
1217                 break;
1218
1219         case e1000_pchlan:
1220         case e1000_pch2lan:
1221                 pba = E1000_PBA_26K;
1222                 break;
1223
1224         default:
1225                 /* Devices before 82547 had a Packet Buffer of 64K.   */
1226                 if (adapter->max_frame_size > 8192)
1227                         pba = E1000_PBA_40K; /* 40K for Rx, 24K for Tx */
1228                 else
1229                         pba = E1000_PBA_48K; /* 48K for Rx, 16K for Tx */
1230         }
1231         E1000_WRITE_REG(&adapter->hw, E1000_PBA, pba);
1232
1233         /* Get the latest mac address, User can use a LAA */
1234         bcopy(IF_LLADDR(ifp), adapter->hw.mac.addr, ETHER_ADDR_LEN);
1235
1236         /* Put the address into the Receive Address Array */
1237         e1000_rar_set(&adapter->hw, adapter->hw.mac.addr, 0);
1238
1239         /*
1240          * With the 82571 adapter, RAR[0] may be overwritten
1241          * when the other port is reset, we make a duplicate
1242          * in RAR[14] for that eventuality, this assures
1243          * the interface continues to function.
1244          */
1245         if (adapter->hw.mac.type == e1000_82571) {
1246                 e1000_set_laa_state_82571(&adapter->hw, TRUE);
1247                 e1000_rar_set(&adapter->hw, adapter->hw.mac.addr,
1248                     E1000_RAR_ENTRIES - 1);
1249         }
1250
1251         /* Reset the hardware */
1252         if (em_reset(adapter)) {
1253                 device_printf(dev, "Unable to reset the hardware\n");
1254                 /* XXX em_stop()? */
1255                 return;
1256         }
1257         em_update_link_status(adapter);
1258
1259         /* Setup VLAN support, basic and offload if available */
1260         E1000_WRITE_REG(&adapter->hw, E1000_VET, ETHERTYPE_VLAN);
1261
1262         if (ifp->if_capenable & IFCAP_VLAN_HWTAGGING) {
1263                 uint32_t ctrl;
1264
1265                 ctrl = E1000_READ_REG(&adapter->hw, E1000_CTRL);
1266                 ctrl |= E1000_CTRL_VME;
1267                 E1000_WRITE_REG(&adapter->hw, E1000_CTRL, ctrl);
1268         }
1269
1270         /* Set hardware offload abilities */
1271         if (ifp->if_capenable & IFCAP_TXCSUM)
1272                 ifp->if_hwassist = EM_CSUM_FEATURES;
1273         else
1274                 ifp->if_hwassist = 0;
1275
1276         /* Configure for OS presence */
1277         em_get_mgmt(adapter);
1278
1279         /* Prepare transmit descriptors and buffers */
1280         em_init_tx_ring(adapter);
1281         em_init_tx_unit(adapter);
1282
1283         /* Setup Multicast table */
1284         em_set_multi(adapter);
1285
1286         /* Prepare receive descriptors and buffers */
1287         if (em_init_rx_ring(adapter)) {
1288                 device_printf(dev, "Could not setup receive structures\n");
1289                 em_stop(adapter);
1290                 return;
1291         }
1292         em_init_rx_unit(adapter);
1293
1294         /* Don't lose promiscuous settings */
1295         em_set_promisc(adapter);
1296
1297         ifp->if_flags |= IFF_RUNNING;
1298         ifp->if_flags &= ~IFF_OACTIVE;
1299
1300         callout_reset(&adapter->timer, hz, em_timer, adapter);
1301         e1000_clear_hw_cntrs_base_generic(&adapter->hw);
1302
1303         /* MSI/X configuration for 82574 */
1304         if (adapter->hw.mac.type == e1000_82574) {
1305                 int tmp;
1306
1307                 tmp = E1000_READ_REG(&adapter->hw, E1000_CTRL_EXT);
1308                 tmp |= E1000_CTRL_EXT_PBA_CLR;
1309                 E1000_WRITE_REG(&adapter->hw, E1000_CTRL_EXT, tmp);
1310                 /*
1311                  * XXX MSIX
1312                  * Set the IVAR - interrupt vector routing.
1313                  * Each nibble represents a vector, high bit
1314                  * is enable, other 3 bits are the MSIX table
1315                  * entry, we map RXQ0 to 0, TXQ0 to 1, and
1316                  * Link (other) to 2, hence the magic number.
1317                  */
1318                 E1000_WRITE_REG(&adapter->hw, E1000_IVAR, 0x800A0908);
1319         }
1320
1321 #ifdef DEVICE_POLLING
1322         /*
1323          * Only enable interrupts if we are not polling, make sure
1324          * they are off otherwise.
1325          */
1326         if (ifp->if_flags & IFF_POLLING)
1327                 em_disable_intr(adapter);
1328         else
1329 #endif /* DEVICE_POLLING */
1330                 em_enable_intr(adapter);
1331
1332         /* AMT based hardware can now take control from firmware */
1333         if (adapter->has_manage && adapter->has_amt &&
1334             adapter->hw.mac.type >= e1000_82571)
1335                 em_get_hw_control(adapter);
1336
1337         /* Don't reset the phy next time init gets called */
1338         adapter->hw.phy.reset_disable = TRUE;
1339 }
1340
1341 #ifdef DEVICE_POLLING
1342
1343 static void
1344 em_poll(struct ifnet *ifp, enum poll_cmd cmd, int count)
1345 {
1346         struct adapter *adapter = ifp->if_softc;
1347         uint32_t reg_icr;
1348
1349         ASSERT_SERIALIZED(ifp->if_serializer);
1350
1351         switch (cmd) {
1352         case POLL_REGISTER:
1353                 em_disable_intr(adapter);
1354                 break;
1355
1356         case POLL_DEREGISTER:
1357                 em_enable_intr(adapter);
1358                 break;
1359
1360         case POLL_AND_CHECK_STATUS:
1361                 reg_icr = E1000_READ_REG(&adapter->hw, E1000_ICR);
1362                 if (reg_icr & (E1000_ICR_RXSEQ | E1000_ICR_LSC)) {
1363                         callout_stop(&adapter->timer);
1364                         adapter->hw.mac.get_link_status = 1;
1365                         em_update_link_status(adapter);
1366                         callout_reset(&adapter->timer, hz, em_timer, adapter);
1367                 }
1368                 /* FALL THROUGH */
1369         case POLL_ONLY:
1370                 if (ifp->if_flags & IFF_RUNNING) {
1371                         em_rxeof(adapter, count);
1372                         em_txeof(adapter);
1373
1374                         if (!ifq_is_empty(&ifp->if_snd))
1375                                 if_devstart(ifp);
1376                 }
1377                 break;
1378         }
1379 }
1380
1381 #endif /* DEVICE_POLLING */
1382
1383 static void
1384 em_intr(void *xsc)
1385 {
1386         struct adapter *adapter = xsc;
1387         struct ifnet *ifp = &adapter->arpcom.ac_if;
1388         uint32_t reg_icr;
1389
1390         logif(intr_beg);
1391         ASSERT_SERIALIZED(ifp->if_serializer);
1392
1393         reg_icr = E1000_READ_REG(&adapter->hw, E1000_ICR);
1394
1395         if ((adapter->hw.mac.type >= e1000_82571 &&
1396              (reg_icr & E1000_ICR_INT_ASSERTED) == 0) ||
1397             reg_icr == 0) {
1398                 logif(intr_end);
1399                 return;
1400         }
1401
1402         /*
1403          * XXX: some laptops trigger several spurious interrupts
1404          * on em(4) when in the resume cycle. The ICR register
1405          * reports all-ones value in this case. Processing such
1406          * interrupts would lead to a freeze. I don't know why.
1407          */
1408         if (reg_icr == 0xffffffff) {
1409                 logif(intr_end);
1410                 return;
1411         }
1412
1413         if (ifp->if_flags & IFF_RUNNING) {
1414                 if (reg_icr &
1415                     (E1000_ICR_RXT0 | E1000_ICR_RXDMT0 | E1000_ICR_RXO))
1416                         em_rxeof(adapter, -1);
1417                 if (reg_icr & E1000_ICR_TXDW) {
1418                         em_txeof(adapter);
1419                         if (!ifq_is_empty(&ifp->if_snd))
1420                                 if_devstart(ifp);
1421                 }
1422         }
1423
1424         /* Link status change */
1425         if (reg_icr & (E1000_ICR_RXSEQ | E1000_ICR_LSC)) {
1426                 callout_stop(&adapter->timer);
1427                 adapter->hw.mac.get_link_status = 1;
1428                 em_update_link_status(adapter);
1429
1430                 /* Deal with TX cruft when link lost */
1431                 em_tx_purge(adapter);
1432
1433                 callout_reset(&adapter->timer, hz, em_timer, adapter);
1434         }
1435
1436         if (reg_icr & E1000_ICR_RXO)
1437                 adapter->rx_overruns++;
1438
1439         logif(intr_end);
1440 }
1441
1442 static void
1443 em_media_status(struct ifnet *ifp, struct ifmediareq *ifmr)
1444 {
1445         struct adapter *adapter = ifp->if_softc;
1446         u_char fiber_type = IFM_1000_SX;
1447
1448         ASSERT_SERIALIZED(ifp->if_serializer);
1449
1450         em_update_link_status(adapter);
1451
1452         ifmr->ifm_status = IFM_AVALID;
1453         ifmr->ifm_active = IFM_ETHER;
1454
1455         if (!adapter->link_active)
1456                 return;
1457
1458         ifmr->ifm_status |= IFM_ACTIVE;
1459
1460         if (adapter->hw.phy.media_type == e1000_media_type_fiber ||
1461             adapter->hw.phy.media_type == e1000_media_type_internal_serdes) {
1462                 if (adapter->hw.mac.type == e1000_82545)
1463                         fiber_type = IFM_1000_LX;
1464                 ifmr->ifm_active |= fiber_type | IFM_FDX;
1465         } else {
1466                 switch (adapter->link_speed) {
1467                 case 10:
1468                         ifmr->ifm_active |= IFM_10_T;
1469                         break;
1470                 case 100:
1471                         ifmr->ifm_active |= IFM_100_TX;
1472                         break;
1473
1474                 case 1000:
1475                         ifmr->ifm_active |= IFM_1000_T;
1476                         break;
1477                 }
1478                 if (adapter->link_duplex == FULL_DUPLEX)
1479                         ifmr->ifm_active |= IFM_FDX;
1480                 else
1481                         ifmr->ifm_active |= IFM_HDX;
1482         }
1483 }
1484
1485 static int
1486 em_media_change(struct ifnet *ifp)
1487 {
1488         struct adapter *adapter = ifp->if_softc;
1489         struct ifmedia *ifm = &adapter->media;
1490
1491         ASSERT_SERIALIZED(ifp->if_serializer);
1492
1493         if (IFM_TYPE(ifm->ifm_media) != IFM_ETHER)
1494                 return (EINVAL);
1495
1496         switch (IFM_SUBTYPE(ifm->ifm_media)) {
1497         case IFM_AUTO:
1498                 adapter->hw.mac.autoneg = DO_AUTO_NEG;
1499                 adapter->hw.phy.autoneg_advertised = AUTONEG_ADV_DEFAULT;
1500                 break;
1501
1502         case IFM_1000_LX:
1503         case IFM_1000_SX:
1504         case IFM_1000_T:
1505                 adapter->hw.mac.autoneg = DO_AUTO_NEG;
1506                 adapter->hw.phy.autoneg_advertised = ADVERTISE_1000_FULL;
1507                 break;
1508
1509         case IFM_100_TX:
1510                 adapter->hw.mac.autoneg = FALSE;
1511                 adapter->hw.phy.autoneg_advertised = 0;
1512                 if ((ifm->ifm_media & IFM_GMASK) == IFM_FDX)
1513                         adapter->hw.mac.forced_speed_duplex = ADVERTISE_100_FULL;
1514                 else
1515                         adapter->hw.mac.forced_speed_duplex = ADVERTISE_100_HALF;
1516                 break;
1517
1518         case IFM_10_T:
1519                 adapter->hw.mac.autoneg = FALSE;
1520                 adapter->hw.phy.autoneg_advertised = 0;
1521                 if ((ifm->ifm_media & IFM_GMASK) == IFM_FDX)
1522                         adapter->hw.mac.forced_speed_duplex = ADVERTISE_10_FULL;
1523                 else
1524                         adapter->hw.mac.forced_speed_duplex = ADVERTISE_10_HALF;
1525                 break;
1526
1527         default:
1528                 if_printf(ifp, "Unsupported media type\n");
1529                 break;
1530         }
1531
1532         /*
1533          * As the speed/duplex settings my have changed we need to
1534          * reset the PHY.
1535          */
1536         adapter->hw.phy.reset_disable = FALSE;
1537
1538         em_init(adapter);
1539
1540         return (0);
1541 }
1542
1543 static int
1544 em_encap(struct adapter *adapter, struct mbuf **m_headp)
1545 {
1546         bus_dma_segment_t segs[EM_MAX_SCATTER];
1547         bus_dmamap_t map;
1548         struct em_buffer *tx_buffer, *tx_buffer_mapped;
1549         struct e1000_tx_desc *ctxd = NULL;
1550         struct mbuf *m_head = *m_headp;
1551         uint32_t txd_upper, txd_lower, txd_used, cmd = 0;
1552         int maxsegs, nsegs, i, j, first, last = 0, error;
1553
1554         if (m_head->m_len < EM_TXCSUM_MINHL &&
1555             (m_head->m_flags & EM_CSUM_FEATURES)) {
1556                 /*
1557                  * Make sure that ethernet header and ip.ip_hl are in
1558                  * contiguous memory, since if TXCSUM is enabled, later
1559                  * TX context descriptor's setup need to access ip.ip_hl.
1560                  */
1561                 error = em_txcsum_pullup(adapter, m_headp);
1562                 if (error) {
1563                         KKASSERT(*m_headp == NULL);
1564                         return error;
1565                 }
1566                 m_head = *m_headp;
1567         }
1568
1569         txd_upper = txd_lower = 0;
1570         txd_used = 0;
1571
1572         /*
1573          * Capture the first descriptor index, this descriptor
1574          * will have the index of the EOP which is the only one
1575          * that now gets a DONE bit writeback.
1576          */
1577         first = adapter->next_avail_tx_desc;
1578         tx_buffer = &adapter->tx_buffer_area[first];
1579         tx_buffer_mapped = tx_buffer;
1580         map = tx_buffer->map;
1581
1582         maxsegs = adapter->num_tx_desc_avail - EM_TX_RESERVED;
1583         KASSERT(maxsegs >= adapter->spare_tx_desc,
1584                 ("not enough spare TX desc\n"));
1585         if (adapter->pcix_82544) {
1586                 /* Half it; see the comment in em_attach() */
1587                 maxsegs >>= 1;
1588         }
1589         if (maxsegs > EM_MAX_SCATTER)
1590                 maxsegs = EM_MAX_SCATTER;
1591
1592         error = bus_dmamap_load_mbuf_defrag(adapter->txtag, map, m_headp,
1593                         segs, maxsegs, &nsegs, BUS_DMA_NOWAIT);
1594         if (error) {
1595                 if (error == ENOBUFS)
1596                         adapter->mbuf_alloc_failed++;
1597                 else
1598                         adapter->no_tx_dma_setup++;
1599
1600                 m_freem(*m_headp);
1601                 *m_headp = NULL;
1602                 return error;
1603         }
1604         bus_dmamap_sync(adapter->txtag, map, BUS_DMASYNC_PREWRITE);
1605
1606         m_head = *m_headp;
1607         adapter->tx_nsegs += nsegs;
1608
1609         if (m_head->m_pkthdr.csum_flags & EM_CSUM_FEATURES) {
1610                 /* TX csum offloading will consume one TX desc */
1611                 adapter->tx_nsegs += em_txcsum(adapter, m_head,
1612                                                &txd_upper, &txd_lower);
1613         }
1614         i = adapter->next_avail_tx_desc;
1615
1616         /* Set up our transmit descriptors */
1617         for (j = 0; j < nsegs; j++) {
1618                 /* If adapter is 82544 and on PCIX bus */
1619                 if(adapter->pcix_82544) {
1620                         DESC_ARRAY desc_array;
1621                         uint32_t array_elements, counter;
1622
1623                         /*
1624                          * Check the Address and Length combination and
1625                          * split the data accordingly
1626                          */
1627                         array_elements = em_82544_fill_desc(segs[j].ds_addr,
1628                                                 segs[j].ds_len, &desc_array);
1629                         for (counter = 0; counter < array_elements; counter++) {
1630                                 KKASSERT(txd_used < adapter->num_tx_desc_avail);
1631
1632                                 tx_buffer = &adapter->tx_buffer_area[i];
1633                                 ctxd = &adapter->tx_desc_base[i];
1634
1635                                 ctxd->buffer_addr = htole64(
1636                                     desc_array.descriptor[counter].address);
1637                                 ctxd->lower.data = htole32(
1638                                     E1000_TXD_CMD_IFCS | txd_lower |
1639                                     desc_array.descriptor[counter].length);
1640                                 ctxd->upper.data = htole32(txd_upper);
1641
1642                                 last = i;
1643                                 if (++i == adapter->num_tx_desc)
1644                                         i = 0;
1645
1646                                 txd_used++;
1647                         }
1648                 } else {
1649                         tx_buffer = &adapter->tx_buffer_area[i];
1650                         ctxd = &adapter->tx_desc_base[i];
1651
1652                         ctxd->buffer_addr = htole64(segs[j].ds_addr);
1653                         ctxd->lower.data = htole32(E1000_TXD_CMD_IFCS |
1654                                                    txd_lower | segs[j].ds_len);
1655                         ctxd->upper.data = htole32(txd_upper);
1656
1657                         last = i;
1658                         if (++i == adapter->num_tx_desc)
1659                                 i = 0;
1660                 }
1661         }
1662
1663         adapter->next_avail_tx_desc = i;
1664         if (adapter->pcix_82544) {
1665                 KKASSERT(adapter->num_tx_desc_avail > txd_used);
1666                 adapter->num_tx_desc_avail -= txd_used;
1667         } else {
1668                 KKASSERT(adapter->num_tx_desc_avail > nsegs);
1669                 adapter->num_tx_desc_avail -= nsegs;
1670         }
1671
1672         /* Handle VLAN tag */
1673         if (m_head->m_flags & M_VLANTAG) {
1674                 /* Set the vlan id. */
1675                 ctxd->upper.fields.special =
1676                     htole16(m_head->m_pkthdr.ether_vlantag);
1677
1678                 /* Tell hardware to add tag */
1679                 ctxd->lower.data |= htole32(E1000_TXD_CMD_VLE);
1680         }
1681
1682         tx_buffer->m_head = m_head;
1683         tx_buffer_mapped->map = tx_buffer->map;
1684         tx_buffer->map = map;
1685
1686         if (adapter->tx_nsegs >= adapter->tx_int_nsegs) {
1687                 adapter->tx_nsegs = 0;
1688
1689                 /*
1690                  * Report Status (RS) is turned on
1691                  * every tx_int_nsegs descriptors.
1692                  */
1693                 cmd = E1000_TXD_CMD_RS;
1694
1695                 /*
1696                  * Keep track of the descriptor, which will
1697                  * be written back by hardware.
1698                  */
1699                 adapter->tx_dd[adapter->tx_dd_tail] = last;
1700                 EM_INC_TXDD_IDX(adapter->tx_dd_tail);
1701                 KKASSERT(adapter->tx_dd_tail != adapter->tx_dd_head);
1702         }
1703
1704         /*
1705          * Last Descriptor of Packet needs End Of Packet (EOP)
1706          */
1707         ctxd->lower.data |= htole32(E1000_TXD_CMD_EOP | cmd);
1708
1709         /*
1710          * Advance the Transmit Descriptor Tail (TDT), this tells the E1000
1711          * that this frame is available to transmit.
1712          */
1713         if (adapter->hw.mac.type == e1000_82547 &&
1714             adapter->link_duplex == HALF_DUPLEX) {
1715                 em_82547_move_tail_serialized(adapter);
1716         } else {
1717                 E1000_WRITE_REG(&adapter->hw, E1000_TDT(0), i);
1718                 if (adapter->hw.mac.type == e1000_82547) {
1719                         em_82547_update_fifo_head(adapter,
1720                             m_head->m_pkthdr.len);
1721                 }
1722         }
1723         return (0);
1724 }
1725
1726 /*
1727  * 82547 workaround to avoid controller hang in half-duplex environment.
1728  * The workaround is to avoid queuing a large packet that would span
1729  * the internal Tx FIFO ring boundary.  We need to reset the FIFO pointers
1730  * in this case.  We do that only when FIFO is quiescent.
1731  */
1732 static void
1733 em_82547_move_tail_serialized(struct adapter *adapter)
1734 {
1735         struct e1000_tx_desc *tx_desc;
1736         uint16_t hw_tdt, sw_tdt, length = 0;
1737         bool eop = 0;
1738
1739         ASSERT_SERIALIZED(adapter->arpcom.ac_if.if_serializer);
1740
1741         hw_tdt = E1000_READ_REG(&adapter->hw, E1000_TDT(0));
1742         sw_tdt = adapter->next_avail_tx_desc;
1743
1744         while (hw_tdt != sw_tdt) {
1745                 tx_desc = &adapter->tx_desc_base[hw_tdt];
1746                 length += tx_desc->lower.flags.length;
1747                 eop = tx_desc->lower.data & E1000_TXD_CMD_EOP;
1748                 if (++hw_tdt == adapter->num_tx_desc)
1749                         hw_tdt = 0;
1750
1751                 if (eop) {
1752                         if (em_82547_fifo_workaround(adapter, length)) {
1753                                 adapter->tx_fifo_wrk_cnt++;
1754                                 callout_reset(&adapter->tx_fifo_timer, 1,
1755                                         em_82547_move_tail, adapter);
1756                                 break;
1757                         }
1758                         E1000_WRITE_REG(&adapter->hw, E1000_TDT(0), hw_tdt);
1759                         em_82547_update_fifo_head(adapter, length);
1760                         length = 0;
1761                 }
1762         }
1763 }
1764
1765 static void
1766 em_82547_move_tail(void *xsc)
1767 {
1768         struct adapter *adapter = xsc;
1769         struct ifnet *ifp = &adapter->arpcom.ac_if;
1770
1771         lwkt_serialize_enter(ifp->if_serializer);
1772         em_82547_move_tail_serialized(adapter);
1773         lwkt_serialize_exit(ifp->if_serializer);
1774 }
1775
1776 static int
1777 em_82547_fifo_workaround(struct adapter *adapter, int len)
1778 {
1779         int fifo_space, fifo_pkt_len;
1780
1781         fifo_pkt_len = roundup2(len + EM_FIFO_HDR, EM_FIFO_HDR);
1782
1783         if (adapter->link_duplex == HALF_DUPLEX) {
1784                 fifo_space = adapter->tx_fifo_size - adapter->tx_fifo_head;
1785
1786                 if (fifo_pkt_len >= (EM_82547_PKT_THRESH + fifo_space)) {
1787                         if (em_82547_tx_fifo_reset(adapter))
1788                                 return (0);
1789                         else
1790                                 return (1);
1791                 }
1792         }
1793         return (0);
1794 }
1795
1796 static void
1797 em_82547_update_fifo_head(struct adapter *adapter, int len)
1798 {
1799         int fifo_pkt_len = roundup2(len + EM_FIFO_HDR, EM_FIFO_HDR);
1800
1801         /* tx_fifo_head is always 16 byte aligned */
1802         adapter->tx_fifo_head += fifo_pkt_len;
1803         if (adapter->tx_fifo_head >= adapter->tx_fifo_size)
1804                 adapter->tx_fifo_head -= adapter->tx_fifo_size;
1805 }
1806
1807 static int
1808 em_82547_tx_fifo_reset(struct adapter *adapter)
1809 {
1810         uint32_t tctl;
1811
1812         if ((E1000_READ_REG(&adapter->hw, E1000_TDT(0)) ==
1813              E1000_READ_REG(&adapter->hw, E1000_TDH(0))) &&
1814             (E1000_READ_REG(&adapter->hw, E1000_TDFT) ==
1815              E1000_READ_REG(&adapter->hw, E1000_TDFH)) &&
1816             (E1000_READ_REG(&adapter->hw, E1000_TDFTS) ==
1817              E1000_READ_REG(&adapter->hw, E1000_TDFHS)) &&
1818             (E1000_READ_REG(&adapter->hw, E1000_TDFPC) == 0)) {
1819                 /* Disable TX unit */
1820                 tctl = E1000_READ_REG(&adapter->hw, E1000_TCTL);
1821                 E1000_WRITE_REG(&adapter->hw, E1000_TCTL,
1822                     tctl & ~E1000_TCTL_EN);
1823
1824                 /* Reset FIFO pointers */
1825                 E1000_WRITE_REG(&adapter->hw, E1000_TDFT,
1826                     adapter->tx_head_addr);
1827                 E1000_WRITE_REG(&adapter->hw, E1000_TDFH,
1828                     adapter->tx_head_addr);
1829                 E1000_WRITE_REG(&adapter->hw, E1000_TDFTS,
1830                     adapter->tx_head_addr);
1831                 E1000_WRITE_REG(&adapter->hw, E1000_TDFHS,
1832                     adapter->tx_head_addr);
1833
1834                 /* Re-enable TX unit */
1835                 E1000_WRITE_REG(&adapter->hw, E1000_TCTL, tctl);
1836                 E1000_WRITE_FLUSH(&adapter->hw);
1837
1838                 adapter->tx_fifo_head = 0;
1839                 adapter->tx_fifo_reset_cnt++;
1840
1841                 return (TRUE);
1842         } else {
1843                 return (FALSE);
1844         }
1845 }
1846
1847 static void
1848 em_set_promisc(struct adapter *adapter)
1849 {
1850         struct ifnet *ifp = &adapter->arpcom.ac_if;
1851         uint32_t reg_rctl;
1852
1853         reg_rctl = E1000_READ_REG(&adapter->hw, E1000_RCTL);
1854
1855         if (ifp->if_flags & IFF_PROMISC) {
1856                 reg_rctl |= (E1000_RCTL_UPE | E1000_RCTL_MPE);
1857                 /* Turn this on if you want to see bad packets */
1858                 if (em_debug_sbp)
1859                         reg_rctl |= E1000_RCTL_SBP;
1860                 E1000_WRITE_REG(&adapter->hw, E1000_RCTL, reg_rctl);
1861         } else if (ifp->if_flags & IFF_ALLMULTI) {
1862                 reg_rctl |= E1000_RCTL_MPE;
1863                 reg_rctl &= ~E1000_RCTL_UPE;
1864                 E1000_WRITE_REG(&adapter->hw, E1000_RCTL, reg_rctl);
1865         }
1866 }
1867
1868 static void
1869 em_disable_promisc(struct adapter *adapter)
1870 {
1871         uint32_t reg_rctl;
1872
1873         reg_rctl = E1000_READ_REG(&adapter->hw, E1000_RCTL);
1874
1875         reg_rctl &= ~E1000_RCTL_UPE;
1876         reg_rctl &= ~E1000_RCTL_MPE;
1877         reg_rctl &= ~E1000_RCTL_SBP;
1878         E1000_WRITE_REG(&adapter->hw, E1000_RCTL, reg_rctl);
1879 }
1880
1881 static void
1882 em_set_multi(struct adapter *adapter)
1883 {
1884         struct ifnet *ifp = &adapter->arpcom.ac_if;
1885         struct ifmultiaddr *ifma;
1886         uint32_t reg_rctl = 0;
1887         uint8_t *mta;
1888         int mcnt = 0;
1889
1890         mta = adapter->mta;
1891         bzero(mta, ETH_ADDR_LEN * MAX_NUM_MULTICAST_ADDRESSES);
1892
1893         if (adapter->hw.mac.type == e1000_82542 &&
1894             adapter->hw.revision_id == E1000_REVISION_2) {
1895                 reg_rctl = E1000_READ_REG(&adapter->hw, E1000_RCTL);
1896                 if (adapter->hw.bus.pci_cmd_word & CMD_MEM_WRT_INVALIDATE)
1897                         e1000_pci_clear_mwi(&adapter->hw);
1898                 reg_rctl |= E1000_RCTL_RST;
1899                 E1000_WRITE_REG(&adapter->hw, E1000_RCTL, reg_rctl);
1900                 msec_delay(5);
1901         }
1902
1903         TAILQ_FOREACH(ifma, &ifp->if_multiaddrs, ifma_link) {
1904                 if (ifma->ifma_addr->sa_family != AF_LINK)
1905                         continue;
1906
1907                 if (mcnt == MAX_NUM_MULTICAST_ADDRESSES)
1908                         break;
1909
1910                 bcopy(LLADDR((struct sockaddr_dl *)ifma->ifma_addr),
1911                     &mta[mcnt * ETHER_ADDR_LEN], ETHER_ADDR_LEN);
1912                 mcnt++;
1913         }
1914
1915         if (mcnt >= MAX_NUM_MULTICAST_ADDRESSES) {
1916                 reg_rctl = E1000_READ_REG(&adapter->hw, E1000_RCTL);
1917                 reg_rctl |= E1000_RCTL_MPE;
1918                 E1000_WRITE_REG(&adapter->hw, E1000_RCTL, reg_rctl);
1919         } else {
1920                 e1000_update_mc_addr_list(&adapter->hw, mta, mcnt);
1921         }
1922
1923         if (adapter->hw.mac.type == e1000_82542 &&
1924             adapter->hw.revision_id == E1000_REVISION_2) {
1925                 reg_rctl = E1000_READ_REG(&adapter->hw, E1000_RCTL);
1926                 reg_rctl &= ~E1000_RCTL_RST;
1927                 E1000_WRITE_REG(&adapter->hw, E1000_RCTL, reg_rctl);
1928                 msec_delay(5);
1929                 if (adapter->hw.bus.pci_cmd_word & CMD_MEM_WRT_INVALIDATE)
1930                         e1000_pci_set_mwi(&adapter->hw);
1931         }
1932 }
1933
1934 /*
1935  * This routine checks for link status and updates statistics.
1936  */
1937 static void
1938 em_timer(void *xsc)
1939 {
1940         struct adapter *adapter = xsc;
1941         struct ifnet *ifp = &adapter->arpcom.ac_if;
1942
1943         lwkt_serialize_enter(ifp->if_serializer);
1944
1945         em_update_link_status(adapter);
1946         em_update_stats(adapter);
1947
1948         /* Reset LAA into RAR[0] on 82571 */
1949         if (e1000_get_laa_state_82571(&adapter->hw) == TRUE)
1950                 e1000_rar_set(&adapter->hw, adapter->hw.mac.addr, 0);
1951
1952         if (em_display_debug_stats && (ifp->if_flags & IFF_RUNNING))
1953                 em_print_hw_stats(adapter);
1954
1955         em_smartspeed(adapter);
1956
1957         callout_reset(&adapter->timer, hz, em_timer, adapter);
1958
1959         lwkt_serialize_exit(ifp->if_serializer);
1960 }
1961
1962 static void
1963 em_update_link_status(struct adapter *adapter)
1964 {
1965         struct e1000_hw *hw = &adapter->hw;
1966         struct ifnet *ifp = &adapter->arpcom.ac_if;
1967         device_t dev = adapter->dev;
1968         uint32_t link_check = 0;
1969
1970         /* Get the cached link value or read phy for real */
1971         switch (hw->phy.media_type) {
1972         case e1000_media_type_copper:
1973                 if (hw->mac.get_link_status) {
1974                         /* Do the work to read phy */
1975                         e1000_check_for_link(hw);
1976                         link_check = !hw->mac.get_link_status;
1977                         if (link_check) /* ESB2 fix */
1978                                 e1000_cfg_on_link_up(hw);
1979                 } else {
1980                         link_check = TRUE;
1981                 }
1982                 break;
1983
1984         case e1000_media_type_fiber:
1985                 e1000_check_for_link(hw);
1986                 link_check =
1987                         E1000_READ_REG(hw, E1000_STATUS) & E1000_STATUS_LU;
1988                 break;
1989
1990         case e1000_media_type_internal_serdes:
1991                 e1000_check_for_link(hw);
1992                 link_check = adapter->hw.mac.serdes_has_link;
1993                 break;
1994
1995         case e1000_media_type_unknown:
1996         default:
1997                 break;
1998         }
1999
2000         /* Now check for a transition */
2001         if (link_check && adapter->link_active == 0) {
2002                 e1000_get_speed_and_duplex(hw, &adapter->link_speed,
2003                     &adapter->link_duplex);
2004
2005                 /*
2006                  * Check if we should enable/disable SPEED_MODE bit on
2007                  * 82571/82572
2008                  */
2009                 if (adapter->link_speed != SPEED_1000 &&
2010                     (hw->mac.type == e1000_82571 ||
2011                      hw->mac.type == e1000_82572)) {
2012                         int tarc0;
2013
2014                         tarc0 = E1000_READ_REG(hw, E1000_TARC(0));
2015                         tarc0 &= ~SPEED_MODE_BIT;
2016                         E1000_WRITE_REG(hw, E1000_TARC(0), tarc0);
2017                 }
2018                 if (bootverbose) {
2019                         device_printf(dev, "Link is up %d Mbps %s\n",
2020                             adapter->link_speed,
2021                             ((adapter->link_duplex == FULL_DUPLEX) ?
2022                             "Full Duplex" : "Half Duplex"));
2023                 }
2024                 adapter->link_active = 1;
2025                 adapter->smartspeed = 0;
2026                 ifp->if_baudrate = adapter->link_speed * 1000000;
2027                 ifp->if_link_state = LINK_STATE_UP;
2028                 if_link_state_change(ifp);
2029         } else if (!link_check && adapter->link_active == 1) {
2030                 ifp->if_baudrate = adapter->link_speed = 0;
2031                 adapter->link_duplex = 0;
2032                 if (bootverbose)
2033                         device_printf(dev, "Link is Down\n");
2034                 adapter->link_active = 0;
2035 #if 0
2036                 /* Link down, disable watchdog */
2037                 if->if_timer = 0;
2038 #endif
2039                 ifp->if_link_state = LINK_STATE_DOWN;
2040                 if_link_state_change(ifp);
2041         }
2042 }
2043
2044 static void
2045 em_stop(struct adapter *adapter)
2046 {
2047         struct ifnet *ifp = &adapter->arpcom.ac_if;
2048         int i;
2049
2050         ASSERT_SERIALIZED(ifp->if_serializer);
2051
2052         em_disable_intr(adapter);
2053
2054         callout_stop(&adapter->timer);
2055         callout_stop(&adapter->tx_fifo_timer);
2056
2057         ifp->if_flags &= ~(IFF_RUNNING | IFF_OACTIVE);
2058         ifp->if_timer = 0;
2059
2060         e1000_reset_hw(&adapter->hw);
2061         if (adapter->hw.mac.type >= e1000_82544)
2062                 E1000_WRITE_REG(&adapter->hw, E1000_WUC, 0);
2063
2064         for (i = 0; i < adapter->num_tx_desc; i++) {
2065                 struct em_buffer *tx_buffer = &adapter->tx_buffer_area[i];
2066
2067                 if (tx_buffer->m_head != NULL) {
2068                         bus_dmamap_unload(adapter->txtag, tx_buffer->map);
2069                         m_freem(tx_buffer->m_head);
2070                         tx_buffer->m_head = NULL;
2071                 }
2072         }
2073
2074         for (i = 0; i < adapter->num_rx_desc; i++) {
2075                 struct em_buffer *rx_buffer = &adapter->rx_buffer_area[i];
2076
2077                 if (rx_buffer->m_head != NULL) {
2078                         bus_dmamap_unload(adapter->rxtag, rx_buffer->map);
2079                         m_freem(rx_buffer->m_head);
2080                         rx_buffer->m_head = NULL;
2081                 }
2082         }
2083
2084         if (adapter->fmp != NULL)
2085                 m_freem(adapter->fmp);
2086         adapter->fmp = NULL;
2087         adapter->lmp = NULL;
2088
2089         adapter->csum_flags = 0;
2090         adapter->csum_ehlen = 0;
2091         adapter->csum_iphlen = 0;
2092
2093         adapter->tx_dd_head = 0;
2094         adapter->tx_dd_tail = 0;
2095         adapter->tx_nsegs = 0;
2096 }
2097
2098 static int
2099 em_get_hw_info(struct adapter *adapter)
2100 {
2101         device_t dev = adapter->dev;
2102
2103         /* Save off the information about this board */
2104         adapter->hw.vendor_id = pci_get_vendor(dev);
2105         adapter->hw.device_id = pci_get_device(dev);
2106         adapter->hw.revision_id = pci_get_revid(dev);
2107         adapter->hw.subsystem_vendor_id = pci_get_subvendor(dev);
2108         adapter->hw.subsystem_device_id = pci_get_subdevice(dev);
2109
2110         /* Do Shared Code Init and Setup */
2111         if (e1000_set_mac_type(&adapter->hw))
2112                 return ENXIO;
2113         return 0;
2114 }
2115
2116 static int
2117 em_alloc_pci_res(struct adapter *adapter)
2118 {
2119         device_t dev = adapter->dev;
2120         u_int intr_flags;
2121         int val, rid;
2122
2123         /* Enable bus mastering */
2124         pci_enable_busmaster(dev);
2125
2126         adapter->memory_rid = EM_BAR_MEM;
2127         adapter->memory = bus_alloc_resource_any(dev, SYS_RES_MEMORY,
2128                                 &adapter->memory_rid, RF_ACTIVE);
2129         if (adapter->memory == NULL) {
2130                 device_printf(dev, "Unable to allocate bus resource: memory\n");
2131                 return (ENXIO);
2132         }
2133         adapter->osdep.mem_bus_space_tag =
2134             rman_get_bustag(adapter->memory);
2135         adapter->osdep.mem_bus_space_handle =
2136             rman_get_bushandle(adapter->memory);
2137
2138         /* XXX This is quite goofy, it is not actually used */
2139         adapter->hw.hw_addr = (uint8_t *)&adapter->osdep.mem_bus_space_handle;
2140
2141         /* Only older adapters use IO mapping */
2142         if (adapter->hw.mac.type > e1000_82543 &&
2143             adapter->hw.mac.type < e1000_82571) {
2144                 /* Figure our where our IO BAR is ? */
2145                 for (rid = PCIR_BAR(0); rid < PCIR_CARDBUSCIS;) {
2146                         val = pci_read_config(dev, rid, 4);
2147                         if (EM_BAR_TYPE(val) == EM_BAR_TYPE_IO) {
2148                                 adapter->io_rid = rid;
2149                                 break;
2150                         }
2151                         rid += 4;
2152                         /* check for 64bit BAR */
2153                         if (EM_BAR_MEM_TYPE(val) == EM_BAR_MEM_TYPE_64BIT)
2154                                 rid += 4;
2155                 }
2156                 if (rid >= PCIR_CARDBUSCIS) {
2157                         device_printf(dev, "Unable to locate IO BAR\n");
2158                         return (ENXIO);
2159                 }
2160                 adapter->ioport = bus_alloc_resource_any(dev, SYS_RES_IOPORT,
2161                                         &adapter->io_rid, RF_ACTIVE);
2162                 if (adapter->ioport == NULL) {
2163                         device_printf(dev, "Unable to allocate bus resource: "
2164                             "ioport\n");
2165                         return (ENXIO);
2166                 }
2167                 adapter->hw.io_base = 0;
2168                 adapter->osdep.io_bus_space_tag =
2169                     rman_get_bustag(adapter->ioport);
2170                 adapter->osdep.io_bus_space_handle =
2171                     rman_get_bushandle(adapter->ioport);
2172         }
2173
2174         adapter->intr_type = pci_alloc_1intr(dev, em_msi_enable,
2175             &adapter->intr_rid, &intr_flags);
2176
2177         adapter->intr_res = bus_alloc_resource_any(dev, SYS_RES_IRQ,
2178             &adapter->intr_rid, intr_flags);
2179         if (adapter->intr_res == NULL) {
2180                 device_printf(dev, "Unable to allocate bus resource: "
2181                     "interrupt\n");
2182                 return (ENXIO);
2183         }
2184
2185         adapter->hw.bus.pci_cmd_word = pci_read_config(dev, PCIR_COMMAND, 2);
2186         adapter->hw.back = &adapter->osdep;
2187         return (0);
2188 }
2189
2190 static void
2191 em_free_pci_res(struct adapter *adapter)
2192 {
2193         device_t dev = adapter->dev;
2194
2195         if (adapter->intr_res != NULL) {
2196                 bus_release_resource(dev, SYS_RES_IRQ,
2197                     adapter->intr_rid, adapter->intr_res);
2198         }
2199
2200         if (adapter->intr_type == PCI_INTR_TYPE_MSI)
2201                 pci_release_msi(dev);
2202
2203         if (adapter->memory != NULL) {
2204                 bus_release_resource(dev, SYS_RES_MEMORY,
2205                     adapter->memory_rid, adapter->memory);
2206         }
2207
2208         if (adapter->flash != NULL) {
2209                 bus_release_resource(dev, SYS_RES_MEMORY,
2210                     adapter->flash_rid, adapter->flash);
2211         }
2212
2213         if (adapter->ioport != NULL) {
2214                 bus_release_resource(dev, SYS_RES_IOPORT,
2215                     adapter->io_rid, adapter->ioport);
2216         }
2217 }
2218
2219 static int
2220 em_reset(struct adapter *adapter)
2221 {
2222         device_t dev = adapter->dev;
2223         uint16_t rx_buffer_size;
2224
2225         /* When hardware is reset, fifo_head is also reset */
2226         adapter->tx_fifo_head = 0;
2227
2228         /* Set up smart power down as default off on newer adapters. */
2229         if (!em_smart_pwr_down &&
2230             (adapter->hw.mac.type == e1000_82571 ||
2231              adapter->hw.mac.type == e1000_82572)) {
2232                 uint16_t phy_tmp = 0;
2233
2234                 /* Speed up time to link by disabling smart power down. */
2235                 e1000_read_phy_reg(&adapter->hw,
2236                     IGP02E1000_PHY_POWER_MGMT, &phy_tmp);
2237                 phy_tmp &= ~IGP02E1000_PM_SPD;
2238                 e1000_write_phy_reg(&adapter->hw,
2239                     IGP02E1000_PHY_POWER_MGMT, phy_tmp);
2240         }
2241
2242         /*
2243          * These parameters control the automatic generation (Tx) and
2244          * response (Rx) to Ethernet PAUSE frames.
2245          * - High water mark should allow for at least two frames to be
2246          *   received after sending an XOFF.
2247          * - Low water mark works best when it is very near the high water mark.
2248          *   This allows the receiver to restart by sending XON when it has
2249          *   drained a bit. Here we use an arbitary value of 1500 which will
2250          *   restart after one full frame is pulled from the buffer. There
2251          *   could be several smaller frames in the buffer and if so they will
2252          *   not trigger the XON until their total number reduces the buffer
2253          *   by 1500.
2254          * - The pause time is fairly large at 1000 x 512ns = 512 usec.
2255          */
2256         rx_buffer_size =
2257                 (E1000_READ_REG(&adapter->hw, E1000_PBA) & 0xffff) << 10;
2258
2259         adapter->hw.fc.high_water = rx_buffer_size -
2260                                     roundup2(adapter->max_frame_size, 1024);
2261         adapter->hw.fc.low_water = adapter->hw.fc.high_water - 1500;
2262
2263         if (adapter->hw.mac.type == e1000_80003es2lan)
2264                 adapter->hw.fc.pause_time = 0xFFFF;
2265         else
2266                 adapter->hw.fc.pause_time = EM_FC_PAUSE_TIME;
2267
2268         adapter->hw.fc.send_xon = TRUE;
2269
2270         adapter->hw.fc.requested_mode = e1000_fc_full;
2271
2272         /* Workaround: no TX flow ctrl for PCH */
2273         if (adapter->hw.mac.type == e1000_pchlan)
2274                 adapter->hw.fc.requested_mode = e1000_fc_rx_pause;
2275
2276         /* Override - settings for PCH2LAN, ya its magic :) */
2277         if (adapter->hw.mac.type == e1000_pch2lan) {
2278                 adapter->hw.fc.high_water = 0x5C20;
2279                 adapter->hw.fc.low_water = 0x5048;
2280                 adapter->hw.fc.pause_time = 0x0650;
2281                 adapter->hw.fc.refresh_time = 0x0400;
2282
2283                 /* Jumbos need adjusted PBA */
2284                 if (adapter->arpcom.ac_if.if_mtu > ETHERMTU)
2285                         E1000_WRITE_REG(&adapter->hw, E1000_PBA, 12);
2286                 else
2287                         E1000_WRITE_REG(&adapter->hw, E1000_PBA, 26);
2288         }
2289
2290         /* Issue a global reset */
2291         e1000_reset_hw(&adapter->hw);
2292         if (adapter->hw.mac.type >= e1000_82544)
2293                 E1000_WRITE_REG(&adapter->hw, E1000_WUC, 0);
2294
2295         if (e1000_init_hw(&adapter->hw) < 0) {
2296                 device_printf(dev, "Hardware Initialization Failed\n");
2297                 return (EIO);
2298         }
2299
2300         E1000_WRITE_REG(&adapter->hw, E1000_VET, ETHERTYPE_VLAN);
2301         e1000_get_phy_info(&adapter->hw);
2302         e1000_check_for_link(&adapter->hw);
2303
2304         return (0);
2305 }
2306
2307 static void
2308 em_setup_ifp(struct adapter *adapter)
2309 {
2310         struct ifnet *ifp = &adapter->arpcom.ac_if;
2311
2312         if_initname(ifp, device_get_name(adapter->dev),
2313                     device_get_unit(adapter->dev));
2314         ifp->if_softc = adapter;
2315         ifp->if_flags = IFF_BROADCAST | IFF_SIMPLEX | IFF_MULTICAST;
2316         ifp->if_init =  em_init;
2317         ifp->if_ioctl = em_ioctl;
2318         ifp->if_start = em_start;
2319 #ifdef DEVICE_POLLING
2320         ifp->if_poll = em_poll;
2321 #endif
2322         ifp->if_watchdog = em_watchdog;
2323         ifq_set_maxlen(&ifp->if_snd, adapter->num_tx_desc - 1);
2324         ifq_set_ready(&ifp->if_snd);
2325
2326         ether_ifattach(ifp, adapter->hw.mac.addr, NULL);
2327
2328         if (adapter->hw.mac.type >= e1000_82543)
2329                 ifp->if_capabilities = IFCAP_HWCSUM;
2330
2331         ifp->if_capabilities |= IFCAP_VLAN_HWTAGGING | IFCAP_VLAN_MTU;
2332         ifp->if_capenable = ifp->if_capabilities;
2333
2334         if (ifp->if_capenable & IFCAP_TXCSUM)
2335                 ifp->if_hwassist = EM_CSUM_FEATURES;
2336
2337         /*
2338          * Tell the upper layer(s) we support long frames.
2339          */
2340         ifp->if_data.ifi_hdrlen = sizeof(struct ether_vlan_header);
2341
2342         /*
2343          * Specify the media types supported by this adapter and register
2344          * callbacks to update media and link information
2345          */
2346         ifmedia_init(&adapter->media, IFM_IMASK,
2347                      em_media_change, em_media_status);
2348         if (adapter->hw.phy.media_type == e1000_media_type_fiber ||
2349             adapter->hw.phy.media_type == e1000_media_type_internal_serdes) {
2350                 u_char fiber_type = IFM_1000_SX; /* default type */
2351
2352                 if (adapter->hw.mac.type == e1000_82545)
2353                         fiber_type = IFM_1000_LX;
2354                 ifmedia_add(&adapter->media, IFM_ETHER | fiber_type | IFM_FDX,
2355                             0, NULL);
2356                 ifmedia_add(&adapter->media, IFM_ETHER | fiber_type, 0, NULL);
2357         } else {
2358                 ifmedia_add(&adapter->media, IFM_ETHER | IFM_10_T, 0, NULL);
2359                 ifmedia_add(&adapter->media, IFM_ETHER | IFM_10_T | IFM_FDX,
2360                             0, NULL);
2361                 ifmedia_add(&adapter->media, IFM_ETHER | IFM_100_TX,
2362                             0, NULL);
2363                 ifmedia_add(&adapter->media, IFM_ETHER | IFM_100_TX | IFM_FDX,
2364                             0, NULL);
2365                 if (adapter->hw.phy.type != e1000_phy_ife) {
2366                         ifmedia_add(&adapter->media,
2367                                 IFM_ETHER | IFM_1000_T | IFM_FDX, 0, NULL);
2368                         ifmedia_add(&adapter->media,
2369                                 IFM_ETHER | IFM_1000_T, 0, NULL);
2370                 }
2371         }
2372         ifmedia_add(&adapter->media, IFM_ETHER | IFM_AUTO, 0, NULL);
2373         ifmedia_set(&adapter->media, IFM_ETHER | IFM_AUTO);
2374 }
2375
2376
2377 /*
2378  * Workaround for SmartSpeed on 82541 and 82547 controllers
2379  */
2380 static void
2381 em_smartspeed(struct adapter *adapter)
2382 {
2383         uint16_t phy_tmp;
2384
2385         if (adapter->link_active || adapter->hw.phy.type != e1000_phy_igp ||
2386             adapter->hw.mac.autoneg == 0 ||
2387             (adapter->hw.phy.autoneg_advertised & ADVERTISE_1000_FULL) == 0)
2388                 return;
2389
2390         if (adapter->smartspeed == 0) {
2391                 /*
2392                  * If Master/Slave config fault is asserted twice,
2393                  * we assume back-to-back
2394                  */
2395                 e1000_read_phy_reg(&adapter->hw, PHY_1000T_STATUS, &phy_tmp);
2396                 if (!(phy_tmp & SR_1000T_MS_CONFIG_FAULT))
2397                         return;
2398                 e1000_read_phy_reg(&adapter->hw, PHY_1000T_STATUS, &phy_tmp);
2399                 if (phy_tmp & SR_1000T_MS_CONFIG_FAULT) {
2400                         e1000_read_phy_reg(&adapter->hw,
2401                             PHY_1000T_CTRL, &phy_tmp);
2402                         if (phy_tmp & CR_1000T_MS_ENABLE) {
2403                                 phy_tmp &= ~CR_1000T_MS_ENABLE;
2404                                 e1000_write_phy_reg(&adapter->hw,
2405                                     PHY_1000T_CTRL, phy_tmp);
2406                                 adapter->smartspeed++;
2407                                 if (adapter->hw.mac.autoneg &&
2408                                     !e1000_phy_setup_autoneg(&adapter->hw) &&
2409                                     !e1000_read_phy_reg(&adapter->hw,
2410                                      PHY_CONTROL, &phy_tmp)) {
2411                                         phy_tmp |= MII_CR_AUTO_NEG_EN |
2412                                                    MII_CR_RESTART_AUTO_NEG;
2413                                         e1000_write_phy_reg(&adapter->hw,
2414                                             PHY_CONTROL, phy_tmp);
2415                                 }
2416                         }
2417                 }
2418                 return;
2419         } else if (adapter->smartspeed == EM_SMARTSPEED_DOWNSHIFT) {
2420                 /* If still no link, perhaps using 2/3 pair cable */
2421                 e1000_read_phy_reg(&adapter->hw, PHY_1000T_CTRL, &phy_tmp);
2422                 phy_tmp |= CR_1000T_MS_ENABLE;
2423                 e1000_write_phy_reg(&adapter->hw, PHY_1000T_CTRL, phy_tmp);
2424                 if (adapter->hw.mac.autoneg &&
2425                     !e1000_phy_setup_autoneg(&adapter->hw) &&
2426                     !e1000_read_phy_reg(&adapter->hw, PHY_CONTROL, &phy_tmp)) {
2427                         phy_tmp |= MII_CR_AUTO_NEG_EN | MII_CR_RESTART_AUTO_NEG;
2428                         e1000_write_phy_reg(&adapter->hw, PHY_CONTROL, phy_tmp);
2429                 }
2430         }
2431
2432         /* Restart process after EM_SMARTSPEED_MAX iterations */
2433         if (adapter->smartspeed++ == EM_SMARTSPEED_MAX)
2434                 adapter->smartspeed = 0;
2435 }
2436
2437 static int
2438 em_dma_malloc(struct adapter *adapter, bus_size_t size,
2439               struct em_dma_alloc *dma)
2440 {
2441         dma->dma_vaddr = bus_dmamem_coherent_any(adapter->parent_dtag,
2442                                 EM_DBA_ALIGN, size, BUS_DMA_WAITOK,
2443                                 &dma->dma_tag, &dma->dma_map,
2444                                 &dma->dma_paddr);
2445         if (dma->dma_vaddr == NULL)
2446                 return ENOMEM;
2447         else
2448                 return 0;
2449 }
2450
2451 static void
2452 em_dma_free(struct adapter *adapter, struct em_dma_alloc *dma)
2453 {
2454         if (dma->dma_tag == NULL)
2455                 return;
2456         bus_dmamap_unload(dma->dma_tag, dma->dma_map);
2457         bus_dmamem_free(dma->dma_tag, dma->dma_vaddr, dma->dma_map);
2458         bus_dma_tag_destroy(dma->dma_tag);
2459 }
2460
2461 static int
2462 em_create_tx_ring(struct adapter *adapter)
2463 {
2464         device_t dev = adapter->dev;
2465         struct em_buffer *tx_buffer;
2466         int error, i;
2467
2468         adapter->tx_buffer_area =
2469                 kmalloc(sizeof(struct em_buffer) * adapter->num_tx_desc,
2470                         M_DEVBUF, M_WAITOK | M_ZERO);
2471
2472         /*
2473          * Create DMA tags for tx buffers
2474          */
2475         error = bus_dma_tag_create(adapter->parent_dtag, /* parent */
2476                         1, 0,                   /* alignment, bounds */
2477                         BUS_SPACE_MAXADDR,      /* lowaddr */
2478                         BUS_SPACE_MAXADDR,      /* highaddr */
2479                         NULL, NULL,             /* filter, filterarg */
2480                         EM_TSO_SIZE,            /* maxsize */
2481                         EM_MAX_SCATTER,         /* nsegments */
2482                         EM_MAX_SEGSIZE,         /* maxsegsize */
2483                         BUS_DMA_WAITOK | BUS_DMA_ALLOCNOW |
2484                         BUS_DMA_ONEBPAGE,       /* flags */
2485                         &adapter->txtag);
2486         if (error) {
2487                 device_printf(dev, "Unable to allocate TX DMA tag\n");
2488                 kfree(adapter->tx_buffer_area, M_DEVBUF);
2489                 adapter->tx_buffer_area = NULL;
2490                 return error;
2491         }
2492
2493         /*
2494          * Create DMA maps for tx buffers
2495          */
2496         for (i = 0; i < adapter->num_tx_desc; i++) {
2497                 tx_buffer = &adapter->tx_buffer_area[i];
2498
2499                 error = bus_dmamap_create(adapter->txtag,
2500                                           BUS_DMA_WAITOK | BUS_DMA_ONEBPAGE,
2501                                           &tx_buffer->map);
2502                 if (error) {
2503                         device_printf(dev, "Unable to create TX DMA map\n");
2504                         em_destroy_tx_ring(adapter, i);
2505                         return error;
2506                 }
2507         }
2508         return (0);
2509 }
2510
2511 static void
2512 em_init_tx_ring(struct adapter *adapter)
2513 {
2514         /* Clear the old ring contents */
2515         bzero(adapter->tx_desc_base,
2516             (sizeof(struct e1000_tx_desc)) * adapter->num_tx_desc);
2517
2518         /* Reset state */
2519         adapter->next_avail_tx_desc = 0;
2520         adapter->next_tx_to_clean = 0;
2521         adapter->num_tx_desc_avail = adapter->num_tx_desc;
2522 }
2523
2524 static void
2525 em_init_tx_unit(struct adapter *adapter)
2526 {
2527         uint32_t tctl, tarc, tipg = 0;
2528         uint64_t bus_addr;
2529
2530         /* Setup the Base and Length of the Tx Descriptor Ring */
2531         bus_addr = adapter->txdma.dma_paddr;
2532         E1000_WRITE_REG(&adapter->hw, E1000_TDLEN(0),
2533             adapter->num_tx_desc * sizeof(struct e1000_tx_desc));
2534         E1000_WRITE_REG(&adapter->hw, E1000_TDBAH(0),
2535             (uint32_t)(bus_addr >> 32));
2536         E1000_WRITE_REG(&adapter->hw, E1000_TDBAL(0),
2537             (uint32_t)bus_addr);
2538         /* Setup the HW Tx Head and Tail descriptor pointers */
2539         E1000_WRITE_REG(&adapter->hw, E1000_TDT(0), 0);
2540         E1000_WRITE_REG(&adapter->hw, E1000_TDH(0), 0);
2541
2542         /* Set the default values for the Tx Inter Packet Gap timer */
2543         switch (adapter->hw.mac.type) {
2544         case e1000_82542:
2545                 tipg = DEFAULT_82542_TIPG_IPGT;
2546                 tipg |= DEFAULT_82542_TIPG_IPGR1 << E1000_TIPG_IPGR1_SHIFT;
2547                 tipg |= DEFAULT_82542_TIPG_IPGR2 << E1000_TIPG_IPGR2_SHIFT;
2548                 break;
2549
2550         case e1000_80003es2lan:
2551                 tipg = DEFAULT_82543_TIPG_IPGR1;
2552                 tipg |= DEFAULT_80003ES2LAN_TIPG_IPGR2 <<
2553                     E1000_TIPG_IPGR2_SHIFT;
2554                 break;
2555
2556         default:
2557                 if (adapter->hw.phy.media_type == e1000_media_type_fiber ||
2558                     adapter->hw.phy.media_type ==
2559                     e1000_media_type_internal_serdes)
2560                         tipg = DEFAULT_82543_TIPG_IPGT_FIBER;
2561                 else
2562                         tipg = DEFAULT_82543_TIPG_IPGT_COPPER;
2563                 tipg |= DEFAULT_82543_TIPG_IPGR1 << E1000_TIPG_IPGR1_SHIFT;
2564                 tipg |= DEFAULT_82543_TIPG_IPGR2 << E1000_TIPG_IPGR2_SHIFT;
2565                 break;
2566         }
2567
2568         E1000_WRITE_REG(&adapter->hw, E1000_TIPG, tipg);
2569
2570         /* NOTE: 0 is not allowed for TIDV */
2571         E1000_WRITE_REG(&adapter->hw, E1000_TIDV, 1);
2572         if(adapter->hw.mac.type >= e1000_82540)
2573                 E1000_WRITE_REG(&adapter->hw, E1000_TADV, 0);
2574
2575         if (adapter->hw.mac.type == e1000_82571 ||
2576             adapter->hw.mac.type == e1000_82572) {
2577                 tarc = E1000_READ_REG(&adapter->hw, E1000_TARC(0));
2578                 tarc |= SPEED_MODE_BIT;
2579                 E1000_WRITE_REG(&adapter->hw, E1000_TARC(0), tarc);
2580         } else if (adapter->hw.mac.type == e1000_80003es2lan) {
2581                 tarc = E1000_READ_REG(&adapter->hw, E1000_TARC(0));
2582                 tarc |= 1;
2583                 E1000_WRITE_REG(&adapter->hw, E1000_TARC(0), tarc);
2584                 tarc = E1000_READ_REG(&adapter->hw, E1000_TARC(1));
2585                 tarc |= 1;
2586                 E1000_WRITE_REG(&adapter->hw, E1000_TARC(1), tarc);
2587         }
2588
2589         /* Program the Transmit Control Register */
2590         tctl = E1000_READ_REG(&adapter->hw, E1000_TCTL);
2591         tctl &= ~E1000_TCTL_CT;
2592         tctl |= E1000_TCTL_PSP | E1000_TCTL_RTLC | E1000_TCTL_EN |
2593                 (E1000_COLLISION_THRESHOLD << E1000_CT_SHIFT);
2594
2595         if (adapter->hw.mac.type >= e1000_82571)
2596                 tctl |= E1000_TCTL_MULR;
2597
2598         /* This write will effectively turn on the transmit unit. */
2599         E1000_WRITE_REG(&adapter->hw, E1000_TCTL, tctl);
2600 }
2601
2602 static void
2603 em_destroy_tx_ring(struct adapter *adapter, int ndesc)
2604 {
2605         struct em_buffer *tx_buffer;
2606         int i;
2607
2608         if (adapter->tx_buffer_area == NULL)
2609                 return;
2610
2611         for (i = 0; i < ndesc; i++) {
2612                 tx_buffer = &adapter->tx_buffer_area[i];
2613
2614                 KKASSERT(tx_buffer->m_head == NULL);
2615                 bus_dmamap_destroy(adapter->txtag, tx_buffer->map);
2616         }
2617         bus_dma_tag_destroy(adapter->txtag);
2618
2619         kfree(adapter->tx_buffer_area, M_DEVBUF);
2620         adapter->tx_buffer_area = NULL;
2621 }
2622
2623 /*
2624  * The offload context needs to be set when we transfer the first
2625  * packet of a particular protocol (TCP/UDP).  This routine has been
2626  * enhanced to deal with inserted VLAN headers.
2627  *
2628  * If the new packet's ether header length, ip header length and
2629  * csum offloading type are same as the previous packet, we should
2630  * avoid allocating a new csum context descriptor; mainly to take
2631  * advantage of the pipeline effect of the TX data read request.
2632  *
2633  * This function returns number of TX descrptors allocated for
2634  * csum context.
2635  */
2636 static int
2637 em_txcsum(struct adapter *adapter, struct mbuf *mp,
2638           uint32_t *txd_upper, uint32_t *txd_lower)
2639 {
2640         struct e1000_context_desc *TXD;
2641         struct em_buffer *tx_buffer;
2642         struct ether_vlan_header *eh;
2643         struct ip *ip;
2644         int curr_txd, ehdrlen, csum_flags;
2645         uint32_t cmd, hdr_len, ip_hlen;
2646         uint16_t etype;
2647
2648         /*
2649          * Determine where frame payload starts.
2650          * Jump over vlan headers if already present,
2651          * helpful for QinQ too.
2652          */
2653         KASSERT(mp->m_len >= ETHER_HDR_LEN,
2654                 ("em_txcsum_pullup is not called (eh)?\n"));
2655         eh = mtod(mp, struct ether_vlan_header *);
2656         if (eh->evl_encap_proto == htons(ETHERTYPE_VLAN)) {
2657                 KASSERT(mp->m_len >= ETHER_HDR_LEN + EVL_ENCAPLEN,
2658                         ("em_txcsum_pullup is not called (evh)?\n"));
2659                 etype = ntohs(eh->evl_proto);
2660                 ehdrlen = ETHER_HDR_LEN + EVL_ENCAPLEN;
2661         } else {
2662                 etype = ntohs(eh->evl_encap_proto);
2663                 ehdrlen = ETHER_HDR_LEN;
2664         }
2665
2666         /*
2667          * We only support TCP/UDP for IPv4 for the moment.
2668          * TODO: Support SCTP too when it hits the tree.
2669          */
2670         if (etype != ETHERTYPE_IP)
2671                 return 0;
2672
2673         KASSERT(mp->m_len >= ehdrlen + EM_IPVHL_SIZE,
2674                 ("em_txcsum_pullup is not called (eh+ip_vhl)?\n"));
2675
2676         /* NOTE: We could only safely access ip.ip_vhl part */
2677         ip = (struct ip *)(mp->m_data + ehdrlen);
2678         ip_hlen = ip->ip_hl << 2;
2679
2680         csum_flags = mp->m_pkthdr.csum_flags & EM_CSUM_FEATURES;
2681
2682         if (adapter->csum_ehlen == ehdrlen &&
2683             adapter->csum_iphlen == ip_hlen &&
2684             adapter->csum_flags == csum_flags) {
2685                 /*
2686                  * Same csum offload context as the previous packets;
2687                  * just return.
2688                  */
2689                 *txd_upper = adapter->csum_txd_upper;
2690                 *txd_lower = adapter->csum_txd_lower;
2691                 return 0;
2692         }
2693
2694         /*
2695          * Setup a new csum offload context.
2696          */
2697
2698         curr_txd = adapter->next_avail_tx_desc;
2699         tx_buffer = &adapter->tx_buffer_area[curr_txd];
2700         TXD = (struct e1000_context_desc *)&adapter->tx_desc_base[curr_txd];
2701
2702         cmd = 0;
2703
2704         /* Setup of IP header checksum. */
2705         if (csum_flags & CSUM_IP) {
2706                 /*
2707                  * Start offset for header checksum calculation.
2708                  * End offset for header checksum calculation.
2709                  * Offset of place to put the checksum.
2710                  */
2711                 TXD->lower_setup.ip_fields.ipcss = ehdrlen;
2712                 TXD->lower_setup.ip_fields.ipcse =
2713                     htole16(ehdrlen + ip_hlen - 1);
2714                 TXD->lower_setup.ip_fields.ipcso =
2715                     ehdrlen + offsetof(struct ip, ip_sum);
2716                 cmd |= E1000_TXD_CMD_IP;
2717                 *txd_upper |= E1000_TXD_POPTS_IXSM << 8;
2718         }
2719         hdr_len = ehdrlen + ip_hlen;
2720
2721         if (csum_flags & CSUM_TCP) {
2722                 /*
2723                  * Start offset for payload checksum calculation.
2724                  * End offset for payload checksum calculation.
2725                  * Offset of place to put the checksum.
2726                  */
2727                 TXD->upper_setup.tcp_fields.tucss = hdr_len;
2728                 TXD->upper_setup.tcp_fields.tucse = htole16(0);
2729                 TXD->upper_setup.tcp_fields.tucso =
2730                     hdr_len + offsetof(struct tcphdr, th_sum);
2731                 cmd |= E1000_TXD_CMD_TCP;
2732                 *txd_upper |= E1000_TXD_POPTS_TXSM << 8;
2733         } else if (csum_flags & CSUM_UDP) {
2734                 /*
2735                  * Start offset for header checksum calculation.
2736                  * End offset for header checksum calculation.
2737                  * Offset of place to put the checksum.
2738                  */
2739                 TXD->upper_setup.tcp_fields.tucss = hdr_len;
2740                 TXD->upper_setup.tcp_fields.tucse = htole16(0);
2741                 TXD->upper_setup.tcp_fields.tucso =
2742                     hdr_len + offsetof(struct udphdr, uh_sum);
2743                 *txd_upper |= E1000_TXD_POPTS_TXSM << 8;
2744         }
2745
2746         *txd_lower = E1000_TXD_CMD_DEXT |       /* Extended descr type */
2747                      E1000_TXD_DTYP_D;          /* Data descr */
2748
2749         /* Save the information for this csum offloading context */
2750         adapter->csum_ehlen = ehdrlen;
2751         adapter->csum_iphlen = ip_hlen;
2752         adapter->csum_flags = csum_flags;
2753         adapter->csum_txd_upper = *txd_upper;
2754         adapter->csum_txd_lower = *txd_lower;
2755
2756         TXD->tcp_seg_setup.data = htole32(0);
2757         TXD->cmd_and_length =
2758             htole32(E1000_TXD_CMD_IFCS | E1000_TXD_CMD_DEXT | cmd);
2759
2760         if (++curr_txd == adapter->num_tx_desc)
2761                 curr_txd = 0;
2762
2763         KKASSERT(adapter->num_tx_desc_avail > 0);
2764         adapter->num_tx_desc_avail--;
2765
2766         adapter->next_avail_tx_desc = curr_txd;
2767         return 1;
2768 }
2769
2770 static int
2771 em_txcsum_pullup(struct adapter *adapter, struct mbuf **m0)
2772 {
2773         struct mbuf *m = *m0;
2774         struct ether_header *eh;
2775         int len;
2776
2777         adapter->tx_csum_try_pullup++;
2778
2779         len = ETHER_HDR_LEN + EM_IPVHL_SIZE;
2780
2781         if (__predict_false(!M_WRITABLE(m))) {
2782                 if (__predict_false(m->m_len < ETHER_HDR_LEN)) {
2783                         adapter->tx_csum_drop1++;
2784                         m_freem(m);
2785                         *m0 = NULL;
2786                         return ENOBUFS;
2787                 }
2788                 eh = mtod(m, struct ether_header *);
2789
2790                 if (eh->ether_type == htons(ETHERTYPE_VLAN))
2791                         len += EVL_ENCAPLEN;
2792
2793                 if (m->m_len < len) {
2794                         adapter->tx_csum_drop2++;
2795                         m_freem(m);
2796                         *m0 = NULL;
2797                         return ENOBUFS;
2798                 }
2799                 return 0;
2800         }
2801
2802         if (__predict_false(m->m_len < ETHER_HDR_LEN)) {
2803                 adapter->tx_csum_pullup1++;
2804                 m = m_pullup(m, ETHER_HDR_LEN);
2805                 if (m == NULL) {
2806                         adapter->tx_csum_pullup1_failed++;
2807                         *m0 = NULL;
2808                         return ENOBUFS;
2809                 }
2810                 *m0 = m;
2811         }
2812         eh = mtod(m, struct ether_header *);
2813
2814         if (eh->ether_type == htons(ETHERTYPE_VLAN))
2815                 len += EVL_ENCAPLEN;
2816
2817         if (m->m_len < len) {
2818                 adapter->tx_csum_pullup2++;
2819                 m = m_pullup(m, len);
2820                 if (m == NULL) {
2821                         adapter->tx_csum_pullup2_failed++;
2822                         *m0 = NULL;
2823                         return ENOBUFS;
2824                 }
2825                 *m0 = m;
2826         }
2827         return 0;
2828 }
2829
2830 static void
2831 em_txeof(struct adapter *adapter)
2832 {
2833         struct ifnet *ifp = &adapter->arpcom.ac_if;
2834         struct em_buffer *tx_buffer;
2835         int first, num_avail;
2836
2837         if (adapter->tx_dd_head == adapter->tx_dd_tail)
2838                 return;
2839
2840         if (adapter->num_tx_desc_avail == adapter->num_tx_desc)
2841                 return;
2842
2843         num_avail = adapter->num_tx_desc_avail;
2844         first = adapter->next_tx_to_clean;
2845
2846         while (adapter->tx_dd_head != adapter->tx_dd_tail) {
2847                 struct e1000_tx_desc *tx_desc;
2848                 int dd_idx = adapter->tx_dd[adapter->tx_dd_head];
2849
2850                 tx_desc = &adapter->tx_desc_base[dd_idx];
2851                 if (tx_desc->upper.fields.status & E1000_TXD_STAT_DD) {
2852                         EM_INC_TXDD_IDX(adapter->tx_dd_head);
2853
2854                         if (++dd_idx == adapter->num_tx_desc)
2855                                 dd_idx = 0;
2856
2857                         while (first != dd_idx) {
2858                                 logif(pkt_txclean);
2859
2860                                 num_avail++;
2861
2862                                 tx_buffer = &adapter->tx_buffer_area[first];
2863                                 if (tx_buffer->m_head) {
2864                                         ifp->if_opackets++;
2865                                         bus_dmamap_unload(adapter->txtag,
2866                                                           tx_buffer->map);
2867                                         m_freem(tx_buffer->m_head);
2868                                         tx_buffer->m_head = NULL;
2869                                 }
2870
2871                                 if (++first == adapter->num_tx_desc)
2872                                         first = 0;
2873                         }
2874                 } else {
2875                         break;
2876                 }
2877         }
2878         adapter->next_tx_to_clean = first;
2879         adapter->num_tx_desc_avail = num_avail;
2880
2881         if (adapter->tx_dd_head == adapter->tx_dd_tail) {
2882                 adapter->tx_dd_head = 0;
2883                 adapter->tx_dd_tail = 0;
2884         }
2885
2886         if (!EM_IS_OACTIVE(adapter)) {
2887                 ifp->if_flags &= ~IFF_OACTIVE;
2888
2889                 /* All clean, turn off the timer */
2890                 if (adapter->num_tx_desc_avail == adapter->num_tx_desc)
2891                         ifp->if_timer = 0;
2892         }
2893 }
2894
2895 static void
2896 em_tx_collect(struct adapter *adapter)
2897 {
2898         struct ifnet *ifp = &adapter->arpcom.ac_if;
2899         struct em_buffer *tx_buffer;
2900         int tdh, first, num_avail, dd_idx = -1;
2901
2902         if (adapter->num_tx_desc_avail == adapter->num_tx_desc)
2903                 return;
2904
2905         tdh = E1000_READ_REG(&adapter->hw, E1000_TDH(0));
2906         if (tdh == adapter->next_tx_to_clean)
2907                 return;
2908
2909         if (adapter->tx_dd_head != adapter->tx_dd_tail)
2910                 dd_idx = adapter->tx_dd[adapter->tx_dd_head];
2911
2912         num_avail = adapter->num_tx_desc_avail;
2913         first = adapter->next_tx_to_clean;
2914
2915         while (first != tdh) {
2916                 logif(pkt_txclean);
2917
2918                 num_avail++;
2919
2920                 tx_buffer = &adapter->tx_buffer_area[first];
2921                 if (tx_buffer->m_head) {
2922                         ifp->if_opackets++;
2923                         bus_dmamap_unload(adapter->txtag,
2924                                           tx_buffer->map);
2925                         m_freem(tx_buffer->m_head);
2926                         tx_buffer->m_head = NULL;
2927                 }
2928
2929                 if (first == dd_idx) {
2930                         EM_INC_TXDD_IDX(adapter->tx_dd_head);
2931                         if (adapter->tx_dd_head == adapter->tx_dd_tail) {
2932                                 adapter->tx_dd_head = 0;
2933                                 adapter->tx_dd_tail = 0;
2934                                 dd_idx = -1;
2935                         } else {
2936                                 dd_idx = adapter->tx_dd[adapter->tx_dd_head];
2937                         }
2938                 }
2939
2940                 if (++first == adapter->num_tx_desc)
2941                         first = 0;
2942         }
2943         adapter->next_tx_to_clean = first;
2944         adapter->num_tx_desc_avail = num_avail;
2945
2946         if (!EM_IS_OACTIVE(adapter)) {
2947                 ifp->if_flags &= ~IFF_OACTIVE;
2948
2949                 /* All clean, turn off the timer */
2950                 if (adapter->num_tx_desc_avail == adapter->num_tx_desc)
2951                         ifp->if_timer = 0;
2952         }
2953 }
2954
2955 /*
2956  * When Link is lost sometimes there is work still in the TX ring
2957  * which will result in a watchdog, rather than allow that do an
2958  * attempted cleanup and then reinit here.  Note that this has been
2959  * seens mostly with fiber adapters.
2960  */
2961 static void
2962 em_tx_purge(struct adapter *adapter)
2963 {
2964         struct ifnet *ifp = &adapter->arpcom.ac_if;
2965
2966         if (!adapter->link_active && ifp->if_timer) {
2967                 em_tx_collect(adapter);
2968                 if (ifp->if_timer) {
2969                         if_printf(ifp, "Link lost, TX pending, reinit\n");
2970                         ifp->if_timer = 0;
2971                         em_init(adapter);
2972                 }
2973         }
2974 }
2975
2976 static int
2977 em_newbuf(struct adapter *adapter, int i, int init)
2978 {
2979         struct mbuf *m;
2980         bus_dma_segment_t seg;
2981         bus_dmamap_t map;
2982         struct em_buffer *rx_buffer;
2983         int error, nseg;
2984
2985         m = m_getcl(init ? MB_WAIT : MB_DONTWAIT, MT_DATA, M_PKTHDR);
2986         if (m == NULL) {
2987                 adapter->mbuf_cluster_failed++;
2988                 if (init) {
2989                         if_printf(&adapter->arpcom.ac_if,
2990                                   "Unable to allocate RX mbuf\n");
2991                 }
2992                 return (ENOBUFS);
2993         }
2994         m->m_len = m->m_pkthdr.len = MCLBYTES;
2995
2996         if (adapter->max_frame_size <= MCLBYTES - ETHER_ALIGN)
2997                 m_adj(m, ETHER_ALIGN);
2998
2999         error = bus_dmamap_load_mbuf_segment(adapter->rxtag,
3000                         adapter->rx_sparemap, m,
3001                         &seg, 1, &nseg, BUS_DMA_NOWAIT);
3002         if (error) {
3003                 m_freem(m);
3004                 if (init) {
3005                         if_printf(&adapter->arpcom.ac_if,
3006                                   "Unable to load RX mbuf\n");
3007                 }
3008                 return (error);
3009         }
3010
3011         rx_buffer = &adapter->rx_buffer_area[i];
3012         if (rx_buffer->m_head != NULL)
3013                 bus_dmamap_unload(adapter->rxtag, rx_buffer->map);
3014
3015         map = rx_buffer->map;
3016         rx_buffer->map = adapter->rx_sparemap;
3017         adapter->rx_sparemap = map;
3018
3019         rx_buffer->m_head = m;
3020
3021         adapter->rx_desc_base[i].buffer_addr = htole64(seg.ds_addr);
3022         return (0);
3023 }
3024
3025 static int
3026 em_create_rx_ring(struct adapter *adapter)
3027 {
3028         device_t dev = adapter->dev;
3029         struct em_buffer *rx_buffer;
3030         int i, error;
3031
3032         adapter->rx_buffer_area =
3033                 kmalloc(sizeof(struct em_buffer) * adapter->num_rx_desc,
3034                         M_DEVBUF, M_WAITOK | M_ZERO);
3035
3036         /*
3037          * Create DMA tag for rx buffers
3038          */
3039         error = bus_dma_tag_create(adapter->parent_dtag, /* parent */
3040                         1, 0,                   /* alignment, bounds */
3041                         BUS_SPACE_MAXADDR,      /* lowaddr */
3042                         BUS_SPACE_MAXADDR,      /* highaddr */
3043                         NULL, NULL,             /* filter, filterarg */
3044                         MCLBYTES,               /* maxsize */
3045                         1,                      /* nsegments */
3046                         MCLBYTES,               /* maxsegsize */
3047                         BUS_DMA_WAITOK | BUS_DMA_ALLOCNOW, /* flags */
3048                         &adapter->rxtag);
3049         if (error) {
3050                 device_printf(dev, "Unable to allocate RX DMA tag\n");
3051                 kfree(adapter->rx_buffer_area, M_DEVBUF);
3052                 adapter->rx_buffer_area = NULL;
3053                 return error;
3054         }
3055
3056         /*
3057          * Create spare DMA map for rx buffers
3058          */
3059         error = bus_dmamap_create(adapter->rxtag, BUS_DMA_WAITOK,
3060                                   &adapter->rx_sparemap);
3061         if (error) {
3062                 device_printf(dev, "Unable to create spare RX DMA map\n");
3063                 bus_dma_tag_destroy(adapter->rxtag);
3064                 kfree(adapter->rx_buffer_area, M_DEVBUF);
3065                 adapter->rx_buffer_area = NULL;
3066                 return error;
3067         }
3068
3069         /*
3070          * Create DMA maps for rx buffers
3071          */
3072         for (i = 0; i < adapter->num_rx_desc; i++) {
3073                 rx_buffer = &adapter->rx_buffer_area[i];
3074
3075                 error = bus_dmamap_create(adapter->rxtag, BUS_DMA_WAITOK,
3076                                           &rx_buffer->map);
3077                 if (error) {
3078                         device_printf(dev, "Unable to create RX DMA map\n");
3079                         em_destroy_rx_ring(adapter, i);
3080                         return error;
3081                 }
3082         }
3083         return (0);
3084 }
3085
3086 static int
3087 em_init_rx_ring(struct adapter *adapter)
3088 {
3089         int i, error;
3090
3091         /* Reset descriptor ring */
3092         bzero(adapter->rx_desc_base,
3093             (sizeof(struct e1000_rx_desc)) * adapter->num_rx_desc);
3094
3095         /* Allocate new ones. */
3096         for (i = 0; i < adapter->num_rx_desc; i++) {
3097                 error = em_newbuf(adapter, i, 1);
3098                 if (error)
3099                         return (error);
3100         }
3101
3102         /* Setup our descriptor pointers */
3103         adapter->next_rx_desc_to_check = 0;
3104
3105         return (0);
3106 }
3107
3108 static void
3109 em_init_rx_unit(struct adapter *adapter)
3110 {
3111         struct ifnet *ifp = &adapter->arpcom.ac_if;
3112         uint64_t bus_addr;
3113         uint32_t rctl;
3114
3115         /*
3116          * Make sure receives are disabled while setting
3117          * up the descriptor ring
3118          */
3119         rctl = E1000_READ_REG(&adapter->hw, E1000_RCTL);
3120         E1000_WRITE_REG(&adapter->hw, E1000_RCTL, rctl & ~E1000_RCTL_EN);
3121
3122         if (adapter->hw.mac.type >= e1000_82540) {
3123                 uint32_t itr;
3124
3125                 /*
3126                  * Set the interrupt throttling rate. Value is calculated
3127                  * as ITR = 1 / (INT_THROTTLE_CEIL * 256ns)
3128                  */
3129                 if (adapter->int_throttle_ceil)
3130                         itr = 1000000000 / 256 / adapter->int_throttle_ceil;
3131                 else
3132                         itr = 0;
3133                 em_set_itr(adapter, itr);
3134         }
3135
3136         /* Disable accelerated ackknowledge */
3137         if (adapter->hw.mac.type == e1000_82574) {
3138                 E1000_WRITE_REG(&adapter->hw,
3139                     E1000_RFCTL, E1000_RFCTL_ACK_DIS);
3140         }
3141
3142         /* Receive Checksum Offload for TCP and UDP */
3143         if (ifp->if_capenable & IFCAP_RXCSUM) {
3144                 uint32_t rxcsum;
3145
3146                 rxcsum = E1000_READ_REG(&adapter->hw, E1000_RXCSUM);
3147                 rxcsum |= (E1000_RXCSUM_IPOFL | E1000_RXCSUM_TUOFL);
3148                 E1000_WRITE_REG(&adapter->hw, E1000_RXCSUM, rxcsum);
3149         }
3150
3151         /*
3152          * XXX TEMPORARY WORKAROUND: on some systems with 82573
3153          * long latencies are observed, like Lenovo X60. This
3154          * change eliminates the problem, but since having positive
3155          * values in RDTR is a known source of problems on other
3156          * platforms another solution is being sought.
3157          */
3158         if (em_82573_workaround && adapter->hw.mac.type == e1000_82573) {
3159                 E1000_WRITE_REG(&adapter->hw, E1000_RADV, EM_RADV_82573);
3160                 E1000_WRITE_REG(&adapter->hw, E1000_RDTR, EM_RDTR_82573);
3161         }
3162
3163         /*
3164          * Setup the Base and Length of the Rx Descriptor Ring
3165          */
3166         bus_addr = adapter->rxdma.dma_paddr;
3167         E1000_WRITE_REG(&adapter->hw, E1000_RDLEN(0),
3168             adapter->num_rx_desc * sizeof(struct e1000_rx_desc));
3169         E1000_WRITE_REG(&adapter->hw, E1000_RDBAH(0),
3170             (uint32_t)(bus_addr >> 32));
3171         E1000_WRITE_REG(&adapter->hw, E1000_RDBAL(0),
3172             (uint32_t)bus_addr);
3173
3174         /*
3175          * Setup the HW Rx Head and Tail Descriptor Pointers
3176          */
3177         E1000_WRITE_REG(&adapter->hw, E1000_RDH(0), 0);
3178         E1000_WRITE_REG(&adapter->hw, E1000_RDT(0), adapter->num_rx_desc - 1);
3179
3180         /* Set early receive threshold on appropriate hw */
3181         if (((adapter->hw.mac.type == e1000_ich9lan) ||
3182             (adapter->hw.mac.type == e1000_pch2lan) ||
3183             (adapter->hw.mac.type == e1000_ich10lan)) &&
3184             (ifp->if_mtu > ETHERMTU)) {
3185                 uint32_t rxdctl;
3186
3187                 rxdctl = E1000_READ_REG(&adapter->hw, E1000_RXDCTL(0));
3188                 E1000_WRITE_REG(&adapter->hw, E1000_RXDCTL(0), rxdctl | 3);
3189                 E1000_WRITE_REG(&adapter->hw, E1000_ERT, 0x100 | (1 << 13));
3190         }
3191
3192         if (adapter->hw.mac.type == e1000_pch2lan) {
3193                 if (ifp->if_mtu > ETHERMTU)
3194                         e1000_lv_jumbo_workaround_ich8lan(&adapter->hw, TRUE);
3195                 else
3196                         e1000_lv_jumbo_workaround_ich8lan(&adapter->hw, FALSE);
3197         }
3198
3199         /* Setup the Receive Control Register */
3200         rctl &= ~(3 << E1000_RCTL_MO_SHIFT);
3201         rctl |= E1000_RCTL_EN | E1000_RCTL_BAM | E1000_RCTL_LBM_NO |
3202                 E1000_RCTL_RDMTS_HALF |
3203                 (adapter->hw.mac.mc_filter_type << E1000_RCTL_MO_SHIFT);
3204
3205         /* Make sure VLAN Filters are off */
3206         rctl &= ~E1000_RCTL_VFE;
3207
3208         if (e1000_tbi_sbp_enabled_82543(&adapter->hw))
3209                 rctl |= E1000_RCTL_SBP;
3210         else
3211                 rctl &= ~E1000_RCTL_SBP;
3212
3213         switch (adapter->rx_buffer_len) {
3214         default:
3215         case 2048:
3216                 rctl |= E1000_RCTL_SZ_2048;
3217                 break;
3218
3219         case 4096:
3220                 rctl |= E1000_RCTL_SZ_4096 |
3221                     E1000_RCTL_BSEX | E1000_RCTL_LPE;
3222                 break;
3223
3224         case 8192:
3225                 rctl |= E1000_RCTL_SZ_8192 |
3226                     E1000_RCTL_BSEX | E1000_RCTL_LPE;
3227                 break;
3228
3229         case 16384:
3230                 rctl |= E1000_RCTL_SZ_16384 |
3231                     E1000_RCTL_BSEX | E1000_RCTL_LPE;
3232                 break;
3233         }
3234
3235         if (ifp->if_mtu > ETHERMTU)
3236                 rctl |= E1000_RCTL_LPE;
3237         else
3238                 rctl &= ~E1000_RCTL_LPE;
3239
3240         /* Enable Receives */
3241         E1000_WRITE_REG(&adapter->hw, E1000_RCTL, rctl);
3242 }
3243
3244 static void
3245 em_destroy_rx_ring(struct adapter *adapter, int ndesc)
3246 {
3247         struct em_buffer *rx_buffer;
3248         int i;
3249
3250         if (adapter->rx_buffer_area == NULL)
3251                 return;
3252
3253         for (i = 0; i < ndesc; i++) {
3254                 rx_buffer = &adapter->rx_buffer_area[i];
3255
3256                 KKASSERT(rx_buffer->m_head == NULL);
3257                 bus_dmamap_destroy(adapter->rxtag, rx_buffer->map);
3258         }
3259         bus_dmamap_destroy(adapter->rxtag, adapter->rx_sparemap);
3260         bus_dma_tag_destroy(adapter->rxtag);
3261
3262         kfree(adapter->rx_buffer_area, M_DEVBUF);
3263         adapter->rx_buffer_area = NULL;
3264 }
3265
3266 static void
3267 em_rxeof(struct adapter *adapter, int count)
3268 {
3269         struct ifnet *ifp = &adapter->arpcom.ac_if;
3270         uint8_t status, accept_frame = 0, eop = 0;
3271         uint16_t len, desc_len, prev_len_adj;
3272         struct e1000_rx_desc *current_desc;
3273         struct mbuf *mp;
3274         int i;
3275         struct mbuf_chain chain[MAXCPU];
3276
3277         i = adapter->next_rx_desc_to_check;
3278         current_desc = &adapter->rx_desc_base[i];
3279
3280         if (!(current_desc->status & E1000_RXD_STAT_DD))
3281                 return;
3282
3283         ether_input_chain_init(chain);
3284
3285         while ((current_desc->status & E1000_RXD_STAT_DD) && count != 0) {
3286                 struct mbuf *m = NULL;
3287
3288                 logif(pkt_receive);
3289
3290                 mp = adapter->rx_buffer_area[i].m_head;
3291
3292                 /*
3293                  * Can't defer bus_dmamap_sync(9) because TBI_ACCEPT
3294                  * needs to access the last received byte in the mbuf.
3295                  */
3296                 bus_dmamap_sync(adapter->rxtag, adapter->rx_buffer_area[i].map,
3297                                 BUS_DMASYNC_POSTREAD);
3298
3299                 accept_frame = 1;
3300                 prev_len_adj = 0;
3301                 desc_len = le16toh(current_desc->length);
3302                 status = current_desc->status;
3303                 if (status & E1000_RXD_STAT_EOP) {
3304                         count--;
3305                         eop = 1;
3306                         if (desc_len < ETHER_CRC_LEN) {
3307                                 len = 0;
3308                                 prev_len_adj = ETHER_CRC_LEN - desc_len;
3309                         } else {
3310                                 len = desc_len - ETHER_CRC_LEN;
3311                         }
3312                 } else {
3313                         eop = 0;
3314                         len = desc_len;
3315                 }
3316
3317                 if (current_desc->errors & E1000_RXD_ERR_FRAME_ERR_MASK) {
3318                         uint8_t last_byte;
3319                         uint32_t pkt_len = desc_len;
3320
3321                         if (adapter->fmp != NULL)
3322                                 pkt_len += adapter->fmp->m_pkthdr.len;
3323
3324                         last_byte = *(mtod(mp, caddr_t) + desc_len - 1);
3325                         if (TBI_ACCEPT(&adapter->hw, status,
3326                             current_desc->errors, pkt_len, last_byte,
3327                             adapter->min_frame_size, adapter->max_frame_size)) {
3328                                 e1000_tbi_adjust_stats_82543(&adapter->hw,
3329                                     &adapter->stats, pkt_len,
3330                                     adapter->hw.mac.addr,
3331                                     adapter->max_frame_size);
3332                                 if (len > 0)
3333                                         len--;
3334                         } else {
3335                                 accept_frame = 0;
3336                         }
3337                 }
3338
3339                 if (accept_frame) {
3340                         if (em_newbuf(adapter, i, 0) != 0) {
3341                                 ifp->if_iqdrops++;
3342                                 goto discard;
3343                         }
3344
3345                         /* Assign correct length to the current fragment */
3346                         mp->m_len = len;
3347
3348                         if (adapter->fmp == NULL) {
3349                                 mp->m_pkthdr.len = len;
3350                                 adapter->fmp = mp; /* Store the first mbuf */
3351                                 adapter->lmp = mp;
3352                         } else {
3353                                 /*
3354                                  * Chain mbuf's together
3355                                  */
3356
3357                                 /*
3358                                  * Adjust length of previous mbuf in chain if
3359                                  * we received less than 4 bytes in the last
3360                                  * descriptor.
3361                                  */
3362                                 if (prev_len_adj > 0) {
3363                                         adapter->lmp->m_len -= prev_len_adj;
3364                                         adapter->fmp->m_pkthdr.len -=
3365                                             prev_len_adj;
3366                                 }
3367                                 adapter->lmp->m_next = mp;
3368                                 adapter->lmp = adapter->lmp->m_next;
3369                                 adapter->fmp->m_pkthdr.len += len;
3370                         }
3371
3372                         if (eop) {
3373                                 adapter->fmp->m_pkthdr.rcvif = ifp;
3374                                 ifp->if_ipackets++;
3375
3376                                 if (ifp->if_capenable & IFCAP_RXCSUM) {
3377                                         em_rxcsum(adapter, current_desc,
3378                                                   adapter->fmp);
3379                                 }
3380
3381                                 if (status & E1000_RXD_STAT_VP) {
3382                                         adapter->fmp->m_pkthdr.ether_vlantag =
3383                                             (le16toh(current_desc->special) &
3384                                             E1000_RXD_SPC_VLAN_MASK);
3385                                         adapter->fmp->m_flags |= M_VLANTAG;
3386                                 }
3387                                 m = adapter->fmp;
3388                                 adapter->fmp = NULL;
3389                                 adapter->lmp = NULL;
3390                         }
3391                 } else {
3392                         ifp->if_ierrors++;
3393 discard:
3394 #ifdef foo
3395                         /* Reuse loaded DMA map and just update mbuf chain */
3396                         mp = adapter->rx_buffer_area[i].m_head;
3397                         mp->m_len = mp->m_pkthdr.len = MCLBYTES;
3398                         mp->m_data = mp->m_ext.ext_buf;
3399                         mp->m_next = NULL;
3400                         if (adapter->max_frame_size <= (MCLBYTES - ETHER_ALIGN))
3401                                 m_adj(mp, ETHER_ALIGN);
3402 #endif
3403                         if (adapter->fmp != NULL) {
3404                                 m_freem(adapter->fmp);
3405                                 adapter->fmp = NULL;
3406                                 adapter->lmp = NULL;
3407                         }
3408                         m = NULL;
3409                 }
3410
3411                 /* Zero out the receive descriptors status. */
3412                 current_desc->status = 0;
3413
3414                 if (m != NULL)
3415                         ether_input_chain(ifp, m, NULL, chain);
3416
3417                 /* Advance our pointers to the next descriptor. */
3418                 if (++i == adapter->num_rx_desc)
3419                         i = 0;
3420                 current_desc = &adapter->rx_desc_base[i];
3421         }
3422         adapter->next_rx_desc_to_check = i;
3423
3424         ether_input_dispatch(chain);
3425
3426         /* Advance the E1000's Receive Queue #0  "Tail Pointer". */
3427         if (--i < 0)
3428                 i = adapter->num_rx_desc - 1;
3429         E1000_WRITE_REG(&adapter->hw, E1000_RDT(0), i);
3430 }
3431
3432 static void
3433 em_rxcsum(struct adapter *adapter, struct e1000_rx_desc *rx_desc,
3434           struct mbuf *mp)
3435 {
3436         /* 82543 or newer only */
3437         if (adapter->hw.mac.type < e1000_82543 ||
3438             /* Ignore Checksum bit is set */
3439             (rx_desc->status & E1000_RXD_STAT_IXSM))
3440                 return;
3441
3442         if ((rx_desc->status & E1000_RXD_STAT_IPCS) &&
3443             !(rx_desc->errors & E1000_RXD_ERR_IPE)) {
3444                 /* IP Checksum Good */
3445                 mp->m_pkthdr.csum_flags |= CSUM_IP_CHECKED | CSUM_IP_VALID;
3446         }
3447
3448         if ((rx_desc->status & E1000_RXD_STAT_TCPCS) &&
3449             !(rx_desc->errors & E1000_RXD_ERR_TCPE)) {
3450                 mp->m_pkthdr.csum_flags |= CSUM_DATA_VALID |
3451                                            CSUM_PSEUDO_HDR |
3452                                            CSUM_FRAG_NOT_CHECKED;
3453                 mp->m_pkthdr.csum_data = htons(0xffff);
3454         }
3455 }
3456
3457 static void
3458 em_enable_intr(struct adapter *adapter)
3459 {
3460         uint32_t ims_mask = IMS_ENABLE_MASK;
3461
3462         lwkt_serialize_handler_enable(adapter->arpcom.ac_if.if_serializer);
3463
3464 #if 0
3465         /* XXX MSIX */
3466         if (adapter->hw.mac.type == e1000_82574) {
3467                 E1000_WRITE_REG(&adapter->hw, EM_EIAC, EM_MSIX_MASK);
3468                 ims_mask |= EM_MSIX_MASK;
3469         }
3470 #endif
3471         E1000_WRITE_REG(&adapter->hw, E1000_IMS, ims_mask);
3472 }
3473
3474 static void
3475 em_disable_intr(struct adapter *adapter)
3476 {
3477         uint32_t clear = 0xffffffff;
3478
3479         /*
3480          * The first version of 82542 had an errata where when link was forced
3481          * it would stay up even up even if the cable was disconnected.
3482          * Sequence errors were used to detect the disconnect and then the
3483          * driver would unforce the link.  This code in the in the ISR.  For
3484          * this to work correctly the Sequence error interrupt had to be
3485          * enabled all the time.
3486          */
3487         if (adapter->hw.mac.type == e1000_82542 &&
3488             adapter->hw.revision_id == E1000_REVISION_2)
3489                 clear &= ~E1000_IMC_RXSEQ;
3490         else if (adapter->hw.mac.type == e1000_82574)
3491                 E1000_WRITE_REG(&adapter->hw, EM_EIAC, 0);
3492
3493         E1000_WRITE_REG(&adapter->hw, E1000_IMC, clear);
3494
3495         lwkt_serialize_handler_disable(adapter->arpcom.ac_if.if_serializer);
3496 }
3497
3498 /*
3499  * Bit of a misnomer, what this really means is
3500  * to enable OS management of the system... aka
3501  * to disable special hardware management features
3502  */
3503 static void
3504 em_get_mgmt(struct adapter *adapter)
3505 {
3506         /* A shared code workaround */
3507 #define E1000_82542_MANC2H E1000_MANC2H
3508         if (adapter->has_manage) {
3509                 int manc2h = E1000_READ_REG(&adapter->hw, E1000_MANC2H);
3510                 int manc = E1000_READ_REG(&adapter->hw, E1000_MANC);
3511
3512                 /* disable hardware interception of ARP */
3513                 manc &= ~(E1000_MANC_ARP_EN);
3514
3515                 /* enable receiving management packets to the host */
3516                 if (adapter->hw.mac.type >= e1000_82571) {
3517                         manc |= E1000_MANC_EN_MNG2HOST;
3518 #define E1000_MNG2HOST_PORT_623 (1 << 5)
3519 #define E1000_MNG2HOST_PORT_664 (1 << 6)
3520                         manc2h |= E1000_MNG2HOST_PORT_623;
3521                         manc2h |= E1000_MNG2HOST_PORT_664;
3522                         E1000_WRITE_REG(&adapter->hw, E1000_MANC2H, manc2h);
3523                 }
3524
3525                 E1000_WRITE_REG(&adapter->hw, E1000_MANC, manc);
3526         }
3527 }
3528
3529 /*
3530  * Give control back to hardware management
3531  * controller if there is one.
3532  */
3533 static void
3534 em_rel_mgmt(struct adapter *adapter)
3535 {
3536         if (adapter->has_manage) {
3537                 int manc = E1000_READ_REG(&adapter->hw, E1000_MANC);
3538
3539                 /* re-enable hardware interception of ARP */
3540                 manc |= E1000_MANC_ARP_EN;
3541
3542                 if (adapter->hw.mac.type >= e1000_82571)
3543                         manc &= ~E1000_MANC_EN_MNG2HOST;
3544
3545                 E1000_WRITE_REG(&adapter->hw, E1000_MANC, manc);
3546         }
3547 }
3548
3549 /*
3550  * em_get_hw_control() sets {CTRL_EXT|FWSM}:DRV_LOAD bit.
3551  * For ASF and Pass Through versions of f/w this means that
3552  * the driver is loaded.  For AMT version (only with 82573)
3553  * of the f/w this means that the network i/f is open.
3554  */
3555 static void
3556 em_get_hw_control(struct adapter *adapter)
3557 {
3558         /* Let firmware know the driver has taken over */
3559         if (adapter->hw.mac.type == e1000_82573) {
3560                 uint32_t swsm;
3561
3562                 swsm = E1000_READ_REG(&adapter->hw, E1000_SWSM);
3563                 E1000_WRITE_REG(&adapter->hw, E1000_SWSM,
3564                     swsm | E1000_SWSM_DRV_LOAD);
3565         } else {
3566                 uint32_t ctrl_ext;
3567
3568                 ctrl_ext = E1000_READ_REG(&adapter->hw, E1000_CTRL_EXT);
3569                 E1000_WRITE_REG(&adapter->hw, E1000_CTRL_EXT,
3570                     ctrl_ext | E1000_CTRL_EXT_DRV_LOAD);
3571         }
3572         adapter->control_hw = 1;
3573 }
3574
3575 /*
3576  * em_rel_hw_control() resets {CTRL_EXT|FWSM}:DRV_LOAD bit.
3577  * For ASF and Pass Through versions of f/w this means that the
3578  * driver is no longer loaded.  For AMT version (only with 82573)
3579  * of the f/w this means that the network i/f is closed.
3580  */
3581 static void
3582 em_rel_hw_control(struct adapter *adapter)
3583 {
3584         if (!adapter->control_hw)
3585                 return;
3586         adapter->control_hw = 0;
3587
3588         /* Let firmware taken over control of h/w */
3589         if (adapter->hw.mac.type == e1000_82573) {
3590                 uint32_t swsm;
3591
3592                 swsm = E1000_READ_REG(&adapter->hw, E1000_SWSM);
3593                 E1000_WRITE_REG(&adapter->hw, E1000_SWSM,
3594                     swsm & ~E1000_SWSM_DRV_LOAD);
3595         } else {
3596                 uint32_t ctrl_ext;
3597
3598                 ctrl_ext = E1000_READ_REG(&adapter->hw, E1000_CTRL_EXT);
3599                 E1000_WRITE_REG(&adapter->hw, E1000_CTRL_EXT,
3600                     ctrl_ext & ~E1000_CTRL_EXT_DRV_LOAD);
3601         }
3602 }
3603
3604 static int
3605 em_is_valid_eaddr(const uint8_t *addr)
3606 {
3607         char zero_addr[ETHER_ADDR_LEN] = { 0, 0, 0, 0, 0, 0 };
3608
3609         if ((addr[0] & 1) || !bcmp(addr, zero_addr, ETHER_ADDR_LEN))
3610                 return (FALSE);
3611
3612         return (TRUE);
3613 }
3614
3615 /*
3616  * Enable PCI Wake On Lan capability
3617  */
3618 void
3619 em_enable_wol(device_t dev)
3620 {
3621         uint16_t cap, status;
3622         uint8_t id;
3623
3624         /* First find the capabilities pointer*/
3625         cap = pci_read_config(dev, PCIR_CAP_PTR, 2);
3626
3627         /* Read the PM Capabilities */
3628         id = pci_read_config(dev, cap, 1);
3629         if (id != PCIY_PMG)     /* Something wrong */
3630                 return;
3631
3632         /*
3633          * OK, we have the power capabilities,
3634          * so now get the status register
3635          */
3636         cap += PCIR_POWER_STATUS;
3637         status = pci_read_config(dev, cap, 2);
3638         status |= PCIM_PSTAT_PME | PCIM_PSTAT_PMEENABLE;
3639         pci_write_config(dev, cap, status, 2);
3640 }
3641
3642
3643 /*
3644  * 82544 Coexistence issue workaround.
3645  *    There are 2 issues.
3646  *       1. Transmit Hang issue.
3647  *    To detect this issue, following equation can be used...
3648  *        SIZE[3:0] + ADDR[2:0] = SUM[3:0].
3649  *        If SUM[3:0] is in between 1 to 4, we will have this issue.
3650  *
3651  *       2. DAC issue.
3652  *    To detect this issue, following equation can be used...
3653  *        SIZE[3:0] + ADDR[2:0] = SUM[3:0].
3654  *        If SUM[3:0] is in between 9 to c, we will have this issue.
3655  *
3656  *    WORKAROUND:
3657  *        Make sure we do not have ending address
3658  *        as 1,2,3,4(Hang) or 9,a,b,c (DAC)
3659  */
3660 static uint32_t
3661 em_82544_fill_desc(bus_addr_t address, uint32_t length, PDESC_ARRAY desc_array)
3662 {
3663         uint32_t safe_terminator;
3664
3665         /*
3666          * Since issue is sensitive to length and address.
3667          * Let us first check the address...
3668          */
3669         if (length <= 4) {
3670                 desc_array->descriptor[0].address = address;
3671                 desc_array->descriptor[0].length = length;
3672                 desc_array->elements = 1;
3673                 return (desc_array->elements);
3674         }
3675
3676         safe_terminator =
3677         (uint32_t)((((uint32_t)address & 0x7) + (length & 0xF)) & 0xF);
3678
3679         /* If it does not fall between 0x1 to 0x4 and 0x9 to 0xC then return */
3680         if (safe_terminator == 0 ||
3681             (safe_terminator > 4 && safe_terminator < 9) ||
3682             (safe_terminator > 0xC && safe_terminator <= 0xF)) {
3683                 desc_array->descriptor[0].address = address;
3684                 desc_array->descriptor[0].length = length;
3685                 desc_array->elements = 1;
3686                 return (desc_array->elements);
3687         }
3688
3689         desc_array->descriptor[0].address = address;
3690         desc_array->descriptor[0].length = length - 4;
3691         desc_array->descriptor[1].address = address + (length - 4);
3692         desc_array->descriptor[1].length = 4;
3693         desc_array->elements = 2;
3694         return (desc_array->elements);
3695 }
3696
3697 static void
3698 em_update_stats(struct adapter *adapter)
3699 {
3700         struct ifnet *ifp = &adapter->arpcom.ac_if;
3701
3702         if (adapter->hw.phy.media_type == e1000_media_type_copper ||
3703             (E1000_READ_REG(&adapter->hw, E1000_STATUS) & E1000_STATUS_LU)) {
3704                 adapter->stats.symerrs +=
3705                         E1000_READ_REG(&adapter->hw, E1000_SYMERRS);
3706                 adapter->stats.sec += E1000_READ_REG(&adapter->hw, E1000_SEC);
3707         }
3708         adapter->stats.crcerrs += E1000_READ_REG(&adapter->hw, E1000_CRCERRS);
3709         adapter->stats.mpc += E1000_READ_REG(&adapter->hw, E1000_MPC);
3710         adapter->stats.scc += E1000_READ_REG(&adapter->hw, E1000_SCC);
3711         adapter->stats.ecol += E1000_READ_REG(&adapter->hw, E1000_ECOL);
3712
3713         adapter->stats.mcc += E1000_READ_REG(&adapter->hw, E1000_MCC);
3714         adapter->stats.latecol += E1000_READ_REG(&adapter->hw, E1000_LATECOL);
3715         adapter->stats.colc += E1000_READ_REG(&adapter->hw, E1000_COLC);
3716         adapter->stats.dc += E1000_READ_REG(&adapter->hw, E1000_DC);
3717         adapter->stats.rlec += E1000_READ_REG(&adapter->hw, E1000_RLEC);
3718         adapter->stats.xonrxc += E1000_READ_REG(&adapter->hw, E1000_XONRXC);
3719         adapter->stats.xontxc += E1000_READ_REG(&adapter->hw, E1000_XONTXC);
3720         adapter->stats.xoffrxc += E1000_READ_REG(&adapter->hw, E1000_XOFFRXC);
3721         adapter->stats.xofftxc += E1000_READ_REG(&adapter->hw, E1000_XOFFTXC);
3722         adapter->stats.fcruc += E1000_READ_REG(&adapter->hw, E1000_FCRUC);
3723         adapter->stats.prc64 += E1000_READ_REG(&adapter->hw, E1000_PRC64);
3724         adapter->stats.prc127 += E1000_READ_REG(&adapter->hw, E1000_PRC127);
3725         adapter->stats.prc255 += E1000_READ_REG(&adapter->hw, E1000_PRC255);
3726         adapter->stats.prc511 += E1000_READ_REG(&adapter->hw, E1000_PRC511);
3727         adapter->stats.prc1023 += E1000_READ_REG(&adapter->hw, E1000_PRC1023);
3728         adapter->stats.prc1522 += E1000_READ_REG(&adapter->hw, E1000_PRC1522);
3729         adapter->stats.gprc += E1000_READ_REG(&adapter->hw, E1000_GPRC);
3730         adapter->stats.bprc += E1000_READ_REG(&adapter->hw, E1000_BPRC);
3731         adapter->stats.mprc += E1000_READ_REG(&adapter->hw, E1000_MPRC);
3732         adapter->stats.gptc += E1000_READ_REG(&adapter->hw, E1000_GPTC);
3733
3734         /* For the 64-bit byte counters the low dword must be read first. */
3735         /* Both registers clear on the read of the high dword */
3736
3737         adapter->stats.gorc += E1000_READ_REG(&adapter->hw, E1000_GORCH);
3738         adapter->stats.gotc += E1000_READ_REG(&adapter->hw, E1000_GOTCH);
3739
3740         adapter->stats.rnbc += E1000_READ_REG(&adapter->hw, E1000_RNBC);
3741         adapter->stats.ruc += E1000_READ_REG(&adapter->hw, E1000_RUC);
3742         adapter->stats.rfc += E1000_READ_REG(&adapter->hw, E1000_RFC);
3743         adapter->stats.roc += E1000_READ_REG(&adapter->hw, E1000_ROC);
3744         adapter->stats.rjc += E1000_READ_REG(&adapter->hw, E1000_RJC);
3745
3746         adapter->stats.tor += E1000_READ_REG(&adapter->hw, E1000_TORH);
3747         adapter->stats.tot += E1000_READ_REG(&adapter->hw, E1000_TOTH);
3748
3749         adapter->stats.tpr += E1000_READ_REG(&adapter->hw, E1000_TPR);
3750         adapter->stats.tpt += E1000_READ_REG(&adapter->hw, E1000_TPT);
3751         adapter->stats.ptc64 += E1000_READ_REG(&adapter->hw, E1000_PTC64);
3752         adapter->stats.ptc127 += E1000_READ_REG(&adapter->hw, E1000_PTC127);
3753         adapter->stats.ptc255 += E1000_READ_REG(&adapter->hw, E1000_PTC255);
3754         adapter->stats.ptc511 += E1000_READ_REG(&adapter->hw, E1000_PTC511);
3755         adapter->stats.ptc1023 += E1000_READ_REG(&adapter->hw, E1000_PTC1023);
3756         adapter->stats.ptc1522 += E1000_READ_REG(&adapter->hw, E1000_PTC1522);
3757         adapter->stats.mptc += E1000_READ_REG(&adapter->hw, E1000_MPTC);
3758         adapter->stats.bptc += E1000_READ_REG(&adapter->hw, E1000_BPTC);
3759
3760         if (adapter->hw.mac.type >= e1000_82543) {
3761                 adapter->stats.algnerrc +=
3762                 E1000_READ_REG(&adapter->hw, E1000_ALGNERRC);
3763                 adapter->stats.rxerrc +=
3764                 E1000_READ_REG(&adapter->hw, E1000_RXERRC);
3765                 adapter->stats.tncrs +=
3766                 E1000_READ_REG(&adapter->hw, E1000_TNCRS);
3767                 adapter->stats.cexterr +=
3768                 E1000_READ_REG(&adapter->hw, E1000_CEXTERR);
3769                 adapter->stats.tsctc +=
3770                 E1000_READ_REG(&adapter->hw, E1000_TSCTC);
3771                 adapter->stats.tsctfc +=
3772                 E1000_READ_REG(&adapter->hw, E1000_TSCTFC);
3773         }
3774
3775         ifp->if_collisions = adapter->stats.colc;
3776
3777         /* Rx Errors */
3778         ifp->if_ierrors =
3779             adapter->dropped_pkts + adapter->stats.rxerrc +
3780             adapter->stats.crcerrs + adapter->stats.algnerrc +
3781             adapter->stats.ruc + adapter->stats.roc +
3782             adapter->stats.mpc + adapter->stats.cexterr;
3783
3784         /* Tx Errors */
3785         ifp->if_oerrors =
3786             adapter->stats.ecol + adapter->stats.latecol +
3787             adapter->watchdog_events;
3788 }
3789
3790 static void
3791 em_print_debug_info(struct adapter *adapter)
3792 {
3793         device_t dev = adapter->dev;
3794         uint8_t *hw_addr = adapter->hw.hw_addr;
3795
3796         device_printf(dev, "Adapter hardware address = %p \n", hw_addr);
3797         device_printf(dev, "CTRL = 0x%x RCTL = 0x%x \n",
3798             E1000_READ_REG(&adapter->hw, E1000_CTRL),
3799             E1000_READ_REG(&adapter->hw, E1000_RCTL));
3800         device_printf(dev, "Packet buffer = Tx=%dk Rx=%dk \n",
3801             ((E1000_READ_REG(&adapter->hw, E1000_PBA) & 0xffff0000) >> 16),\
3802             (E1000_READ_REG(&adapter->hw, E1000_PBA) & 0xffff) );
3803         device_printf(dev, "Flow control watermarks high = %d low = %d\n",
3804             adapter->hw.fc.high_water,
3805             adapter->hw.fc.low_water);
3806         device_printf(dev, "tx_int_delay = %d, tx_abs_int_delay = %d\n",
3807             E1000_READ_REG(&adapter->hw, E1000_TIDV),
3808             E1000_READ_REG(&adapter->hw, E1000_TADV));
3809         device_printf(dev, "rx_int_delay = %d, rx_abs_int_delay = %d\n",
3810             E1000_READ_REG(&adapter->hw, E1000_RDTR),
3811             E1000_READ_REG(&adapter->hw, E1000_RADV));
3812         device_printf(dev, "fifo workaround = %lld, fifo_reset_count = %lld\n",
3813             (long long)adapter->tx_fifo_wrk_cnt,
3814             (long long)adapter->tx_fifo_reset_cnt);
3815         device_printf(dev, "hw tdh = %d, hw tdt = %d\n",
3816             E1000_READ_REG(&adapter->hw, E1000_TDH(0)),
3817             E1000_READ_REG(&adapter->hw, E1000_TDT(0)));
3818         device_printf(dev, "hw rdh = %d, hw rdt = %d\n",
3819             E1000_READ_REG(&adapter->hw, E1000_RDH(0)),
3820             E1000_READ_REG(&adapter->hw, E1000_RDT(0)));
3821         device_printf(dev, "Num Tx descriptors avail = %d\n",
3822             adapter->num_tx_desc_avail);
3823         device_printf(dev, "Tx Descriptors not avail1 = %ld\n",
3824             adapter->no_tx_desc_avail1);
3825         device_printf(dev, "Tx Descriptors not avail2 = %ld\n",
3826             adapter->no_tx_desc_avail2);
3827         device_printf(dev, "Std mbuf failed = %ld\n",
3828             adapter->mbuf_alloc_failed);
3829         device_printf(dev, "Std mbuf cluster failed = %ld\n",
3830             adapter->mbuf_cluster_failed);
3831         device_printf(dev, "Driver dropped packets = %ld\n",
3832             adapter->dropped_pkts);
3833         device_printf(dev, "Driver tx dma failure in encap = %ld\n",
3834             adapter->no_tx_dma_setup);
3835
3836         device_printf(dev, "TXCSUM try pullup = %lu\n",
3837             adapter->tx_csum_try_pullup);
3838         device_printf(dev, "TXCSUM m_pullup(eh) called = %lu\n",
3839             adapter->tx_csum_pullup1);
3840         device_printf(dev, "TXCSUM m_pullup(eh) failed = %lu\n",
3841             adapter->tx_csum_pullup1_failed);
3842         device_printf(dev, "TXCSUM m_pullup(eh+ip) called = %lu\n",
3843             adapter->tx_csum_pullup2);
3844         device_printf(dev, "TXCSUM m_pullup(eh+ip) failed = %lu\n",
3845             adapter->tx_csum_pullup2_failed);
3846         device_printf(dev, "TXCSUM non-writable(eh) droped = %lu\n",
3847             adapter->tx_csum_drop1);
3848         device_printf(dev, "TXCSUM non-writable(eh+ip) droped = %lu\n",
3849             adapter->tx_csum_drop2);
3850 }
3851
3852 static void
3853 em_print_hw_stats(struct adapter *adapter)
3854 {
3855         device_t dev = adapter->dev;
3856
3857         device_printf(dev, "Excessive collisions = %lld\n",
3858             (long long)adapter->stats.ecol);
3859 #if (DEBUG_HW > 0)  /* Dont output these errors normally */
3860         device_printf(dev, "Symbol errors = %lld\n",
3861             (long long)adapter->stats.symerrs);
3862 #endif
3863         device_printf(dev, "Sequence errors = %lld\n",
3864             (long long)adapter->stats.sec);
3865         device_printf(dev, "Defer count = %lld\n",
3866             (long long)adapter->stats.dc);
3867         device_printf(dev, "Missed Packets = %lld\n",
3868             (long long)adapter->stats.mpc);
3869         device_printf(dev, "Receive No Buffers = %lld\n",
3870             (long long)adapter->stats.rnbc);
3871         /* RLEC is inaccurate on some hardware, calculate our own. */
3872         device_printf(dev, "Receive Length Errors = %lld\n",
3873             ((long long)adapter->stats.roc + (long long)adapter->stats.ruc));
3874         device_printf(dev, "Receive errors = %lld\n",
3875             (long long)adapter->stats.rxerrc);
3876         device_printf(dev, "Crc errors = %lld\n",
3877             (long long)adapter->stats.crcerrs);
3878         device_printf(dev, "Alignment errors = %lld\n",
3879             (long long)adapter->stats.algnerrc);
3880         device_printf(dev, "Collision/Carrier extension errors = %lld\n",
3881             (long long)adapter->stats.cexterr);
3882         device_printf(dev, "RX overruns = %ld\n", adapter->rx_overruns);
3883         device_printf(dev, "watchdog timeouts = %ld\n",
3884             adapter->watchdog_events);
3885         device_printf(dev, "XON Rcvd = %lld\n",
3886             (long long)adapter->stats.xonrxc);
3887         device_printf(dev, "XON Xmtd = %lld\n",
3888             (long long)adapter->stats.xontxc);
3889         device_printf(dev, "XOFF Rcvd = %lld\n",
3890             (long long)adapter->stats.xoffrxc);
3891         device_printf(dev, "XOFF Xmtd = %lld\n",
3892             (long long)adapter->stats.xofftxc);
3893         device_printf(dev, "Good Packets Rcvd = %lld\n",
3894             (long long)adapter->stats.gprc);
3895         device_printf(dev, "Good Packets Xmtd = %lld\n",
3896             (long long)adapter->stats.gptc);
3897 }
3898
3899 static void
3900 em_print_nvm_info(struct adapter *adapter)
3901 {
3902         uint16_t eeprom_data;
3903         int i, j, row = 0;
3904
3905         /* Its a bit crude, but it gets the job done */
3906         kprintf("\nInterface EEPROM Dump:\n");
3907         kprintf("Offset\n0x0000  ");
3908         for (i = 0, j = 0; i < 32; i++, j++) {
3909                 if (j == 8) { /* Make the offset block */
3910                         j = 0; ++row;
3911                         kprintf("\n0x00%x0  ",row);
3912                 }
3913                 e1000_read_nvm(&adapter->hw, i, 1, &eeprom_data);
3914                 kprintf("%04x ", eeprom_data);
3915         }
3916         kprintf("\n");
3917 }
3918
3919 static int
3920 em_sysctl_debug_info(SYSCTL_HANDLER_ARGS)
3921 {
3922         struct adapter *adapter;
3923         struct ifnet *ifp;
3924         int error, result;
3925
3926         result = -1;
3927         error = sysctl_handle_int(oidp, &result, 0, req);
3928         if (error || !req->newptr)
3929                 return (error);
3930
3931         adapter = (struct adapter *)arg1;
3932         ifp = &adapter->arpcom.ac_if;
3933
3934         lwkt_serialize_enter(ifp->if_serializer);
3935
3936         if (result == 1)
3937                 em_print_debug_info(adapter);
3938
3939         /*
3940          * This value will cause a hex dump of the
3941          * first 32 16-bit words of the EEPROM to
3942          * the screen.
3943          */
3944         if (result == 2)
3945                 em_print_nvm_info(adapter);
3946
3947         lwkt_serialize_exit(ifp->if_serializer);
3948
3949         return (error);
3950 }
3951
3952 static int
3953 em_sysctl_stats(SYSCTL_HANDLER_ARGS)
3954 {
3955         int error, result;
3956
3957         result = -1;
3958         error = sysctl_handle_int(oidp, &result, 0, req);
3959         if (error || !req->newptr)
3960                 return (error);
3961
3962         if (result == 1) {
3963                 struct adapter *adapter = (struct adapter *)arg1;
3964                 struct ifnet *ifp = &adapter->arpcom.ac_if;
3965
3966                 lwkt_serialize_enter(ifp->if_serializer);
3967                 em_print_hw_stats(adapter);
3968                 lwkt_serialize_exit(ifp->if_serializer);
3969         }
3970         return (error);
3971 }
3972
3973 static void
3974 em_add_sysctl(struct adapter *adapter)
3975 {
3976         sysctl_ctx_init(&adapter->sysctl_ctx);
3977         adapter->sysctl_tree = SYSCTL_ADD_NODE(&adapter->sysctl_ctx,
3978                                         SYSCTL_STATIC_CHILDREN(_hw), OID_AUTO,
3979                                         device_get_nameunit(adapter->dev),
3980                                         CTLFLAG_RD, 0, "");
3981         if (adapter->sysctl_tree == NULL) {
3982                 device_printf(adapter->dev, "can't add sysctl node\n");
3983         } else {
3984                 SYSCTL_ADD_PROC(&adapter->sysctl_ctx,
3985                     SYSCTL_CHILDREN(adapter->sysctl_tree),
3986                     OID_AUTO, "debug", CTLTYPE_INT|CTLFLAG_RW, adapter, 0,
3987                     em_sysctl_debug_info, "I", "Debug Information");
3988
3989                 SYSCTL_ADD_PROC(&adapter->sysctl_ctx,
3990                     SYSCTL_CHILDREN(adapter->sysctl_tree),
3991                     OID_AUTO, "stats", CTLTYPE_INT|CTLFLAG_RW, adapter, 0,
3992                     em_sysctl_stats, "I", "Statistics");
3993
3994                 SYSCTL_ADD_INT(&adapter->sysctl_ctx,
3995                     SYSCTL_CHILDREN(adapter->sysctl_tree),
3996                     OID_AUTO, "rxd", CTLFLAG_RD,
3997                     &adapter->num_rx_desc, 0, NULL);
3998                 SYSCTL_ADD_INT(&adapter->sysctl_ctx,
3999                     SYSCTL_CHILDREN(adapter->sysctl_tree),
4000                     OID_AUTO, "txd", CTLFLAG_RD,
4001                     &adapter->num_tx_desc, 0, NULL);
4002
4003                 if (adapter->hw.mac.type >= e1000_82540) {
4004                         SYSCTL_ADD_PROC(&adapter->sysctl_ctx,
4005                             SYSCTL_CHILDREN(adapter->sysctl_tree),
4006                             OID_AUTO, "int_throttle_ceil",
4007                             CTLTYPE_INT|CTLFLAG_RW, adapter, 0,
4008                             em_sysctl_int_throttle, "I",
4009                             "interrupt throttling rate");
4010                 }
4011                 SYSCTL_ADD_PROC(&adapter->sysctl_ctx,
4012                     SYSCTL_CHILDREN(adapter->sysctl_tree),
4013                     OID_AUTO, "int_tx_nsegs",
4014                     CTLTYPE_INT|CTLFLAG_RW, adapter, 0,
4015                     em_sysctl_int_tx_nsegs, "I",
4016                     "# segments per TX interrupt");
4017         }
4018 }
4019
4020 static int
4021 em_sysctl_int_throttle(SYSCTL_HANDLER_ARGS)
4022 {
4023         struct adapter *adapter = (void *)arg1;
4024         struct ifnet *ifp = &adapter->arpcom.ac_if;
4025         int error, throttle;
4026
4027         throttle = adapter->int_throttle_ceil;
4028         error = sysctl_handle_int(oidp, &throttle, 0, req);
4029         if (error || req->newptr == NULL)
4030                 return error;
4031         if (throttle < 0 || throttle > 1000000000 / 256)
4032                 return EINVAL;
4033
4034         if (throttle) {
4035                 /*
4036                  * Set the interrupt throttling rate in 256ns increments,
4037                  * recalculate sysctl value assignment to get exact frequency.
4038                  */
4039                 throttle = 1000000000 / 256 / throttle;
4040
4041                 /* Upper 16bits of ITR is reserved and should be zero */
4042                 if (throttle & 0xffff0000)
4043                         return EINVAL;
4044         }
4045
4046         lwkt_serialize_enter(ifp->if_serializer);
4047
4048         if (throttle)
4049                 adapter->int_throttle_ceil = 1000000000 / 256 / throttle;
4050         else
4051                 adapter->int_throttle_ceil = 0;
4052
4053         if (ifp->if_flags & IFF_RUNNING)
4054                 em_set_itr(adapter, throttle);
4055
4056         lwkt_serialize_exit(ifp->if_serializer);
4057
4058         if (bootverbose) {
4059                 if_printf(ifp, "Interrupt moderation set to %d/sec\n",
4060                           adapter->int_throttle_ceil);
4061         }
4062         return 0;
4063 }
4064
4065 static int
4066 em_sysctl_int_tx_nsegs(SYSCTL_HANDLER_ARGS)
4067 {
4068         struct adapter *adapter = (void *)arg1;
4069         struct ifnet *ifp = &adapter->arpcom.ac_if;
4070         int error, segs;
4071
4072         segs = adapter->tx_int_nsegs;
4073         error = sysctl_handle_int(oidp, &segs, 0, req);
4074         if (error || req->newptr == NULL)
4075                 return error;
4076         if (segs <= 0)
4077                 return EINVAL;
4078
4079         lwkt_serialize_enter(ifp->if_serializer);
4080
4081         /*
4082          * Don't allow int_tx_nsegs to become:
4083          * o  Less the oact_tx_desc
4084          * o  Too large that no TX desc will cause TX interrupt to
4085          *    be generated (OACTIVE will never recover)
4086          * o  Too small that will cause tx_dd[] overflow
4087          */
4088         if (segs < adapter->oact_tx_desc ||
4089             segs >= adapter->num_tx_desc - adapter->oact_tx_desc ||
4090             segs < adapter->num_tx_desc / EM_TXDD_SAFE) {
4091                 error = EINVAL;
4092         } else {
4093                 error = 0;
4094                 adapter->tx_int_nsegs = segs;
4095         }
4096
4097         lwkt_serialize_exit(ifp->if_serializer);
4098
4099         return error;
4100 }
4101
4102 static void
4103 em_set_itr(struct adapter *adapter, uint32_t itr)
4104 {
4105         E1000_WRITE_REG(&adapter->hw, E1000_ITR, itr);
4106         if (adapter->hw.mac.type == e1000_82574) {
4107                 int i;
4108
4109                 /*
4110                  * When using MSIX interrupts we need to
4111                  * throttle using the EITR register
4112                  */
4113                 for (i = 0; i < 4; ++i) {
4114                         E1000_WRITE_REG(&adapter->hw,
4115                             E1000_EITR_82574(i), itr);
4116                 }
4117         }
4118 }