2 * Copyright (c) 2003 Nate Lawson (SDG)
3 * Copyright (c) 2001 Michael Smith
6 * Redistribution and use in source and binary forms, with or without
7 * modification, are permitted provided that the following conditions
9 * 1. Redistributions of source code must retain the above copyright
10 * notice, this list of conditions and the following disclaimer.
11 * 2. Redistributions in binary form must reproduce the above copyright
12 * notice, this list of conditions and the following disclaimer in the
13 * documentation and/or other materials provided with the distribution.
15 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
16 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
17 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
18 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
19 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
20 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
21 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
22 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
23 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
24 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
27 * $FreeBSD: src/sys/dev/acpica/acpi_cpu.c,v 1.41 2004/06/24 00:38:51 njl Exp $
28 * $DragonFly: src/sys/dev/acpica5/acpi_cpu.c,v 1.15 2006/10/25 20:55:52 dillon Exp $
32 #include <sys/param.h>
34 #include <sys/kernel.h>
35 #include <sys/malloc.h>
36 #include <sys/globaldata.h>
37 #include <sys/power.h>
40 #include <sys/thread2.h>
42 #include <bus/pci/pcivar.h>
43 #include <machine/atomic.h>
44 #include <machine/globaldata.h>
45 #include <machine/md_var.h>
46 #include <machine/smp.h>
53 * Support for ACPI Processor devices, including ACPI 2.0 throttling
54 * and C[1-3] sleep states.
56 * TODO: implement scans of all CPUs to be sure all Cx states are
60 /* Hooks for the ACPI CA debugging infrastructure */
61 #define _COMPONENT ACPI_PROCESSOR
62 ACPI_MODULE_NAME("PROCESSOR")
65 struct resource *p_lvlx; /* Register to read to enter state. */
66 uint32_t type; /* C1-3 (C4 and up treated as C3). */
67 uint32_t trans_lat; /* Transition latency (usec). */
68 uint32_t power; /* Power consumed (mW). */
70 #define MAX_CX_STATES 8
72 struct acpi_cpu_softc {
74 ACPI_HANDLE cpu_handle;
75 uint32_t acpi_id; /* ACPI processor id */
76 uint32_t cpu_p_blk; /* ACPI P_BLK location */
77 uint32_t cpu_p_blk_len; /* P_BLK length (must be 6). */
78 struct resource *cpu_p_cnt; /* Throttling control register */
79 struct acpi_cx cpu_cx_states[MAX_CX_STATES];
80 int cpu_cx_count; /* Number of valid Cx states. */
81 int cpu_prev_sleep;/* Last idle sleep duration. */
84 #define CPU_GET_REG(reg, width) \
85 (bus_space_read_ ## width(rman_get_bustag((reg)), \
86 rman_get_bushandle((reg)), 0))
87 #define CPU_SET_REG(reg, width, val) \
88 (bus_space_write_ ## width(rman_get_bustag((reg)), \
89 rman_get_bushandle((reg)), 0, (val)))
92 * Speeds are stored in counts, from 1 to CPU_MAX_SPEED, and
93 * reported to the user in tenths of a percent.
95 static uint32_t cpu_duty_offset;
96 static uint32_t cpu_duty_width;
97 #define CPU_MAX_SPEED (1 << cpu_duty_width)
98 #define CPU_SPEED_PERCENT(x) ((1000 * (x)) / CPU_MAX_SPEED)
99 #define CPU_SPEED_PRINTABLE(x) (CPU_SPEED_PERCENT(x) / 10), \
100 (CPU_SPEED_PERCENT(x) % 10)
101 #define CPU_P_CNT_THT_EN (1<<4)
102 #define PM_USEC(x) ((x) >> 2) /* ~4 clocks per usec (3.57955 Mhz) */
104 #define ACPI_CPU_NOTIFY_PERF_STATES 0x80 /* _PSS changed. */
105 #define ACPI_CPU_NOTIFY_CX_STATES 0x81 /* _CST changed. */
107 #define CPU_QUIRK_NO_C3 (1<<0) /* C3-type states are not usable. */
108 #define CPU_QUIRK_NO_THROTTLE (1<<1) /* Throttling is not usable. */
109 #define CPU_QUIRK_NO_BM_CTRL (1<<2) /* No bus mastering control. */
111 #define PCI_VENDOR_INTEL 0x8086
112 #define PCI_DEVICE_82371AB_3 0x7113 /* PIIX4 chipset for quirks. */
113 #define PCI_REVISION_A_STEP 0
114 #define PCI_REVISION_B_STEP 1
115 #define PCI_REVISION_4E 2
116 #define PCI_REVISION_4M 3
118 /* Platform hardware resource information. */
119 static uint32_t cpu_smi_cmd; /* Value to write to SMI_CMD. */
120 static uint8_t cpu_pstate_cnt;/* Register to take over throttling. */
121 static uint8_t cpu_cst_cnt; /* Indicate we are _CST aware. */
122 static int cpu_rid; /* Driver-wide resource id. */
123 static int cpu_quirks; /* Indicate any hardware bugs. */
126 static int cpu_cx_count; /* Number of valid states */
127 static int cpu_non_c3; /* Index of lowest non-C3 state. */
128 static u_int cpu_cx_stats[MAX_CX_STATES];/* Cx usage history. */
130 /* Values for sysctl. */
131 static uint32_t cpu_throttle_state;
132 static uint32_t cpu_throttle_max;
133 static uint32_t cpu_throttle_performance;
134 static uint32_t cpu_throttle_economy;
135 static int cpu_cx_lowest;
136 static char cpu_cx_supported[64];
138 static device_t *cpu_devices;
139 static int cpu_ndevices;
140 static struct acpi_cpu_softc **cpu_softc;
142 static struct sysctl_ctx_list acpi_cpu_sysctl_ctx;
143 static struct sysctl_oid *acpi_cpu_sysctl_tree;
145 static int acpi_cpu_probe(device_t dev);
146 static int acpi_cpu_attach(device_t dev);
147 static int acpi_pcpu_get_id(uint32_t idx, uint32_t *acpi_id,
149 static int acpi_cpu_shutdown(device_t dev);
150 static int acpi_cpu_throttle_probe(struct acpi_cpu_softc *sc);
151 static void acpi_cpu_power_profile(void *arg);
152 static int acpi_cpu_cx_probe(struct acpi_cpu_softc *sc);
153 static int acpi_cpu_cx_cst(struct acpi_cpu_softc *sc);
154 static void acpi_cpu_startup(void *arg);
155 static void acpi_cpu_startup_throttling(void);
156 static void acpi_cpu_startup_cx(void);
157 static void acpi_cpu_throttle_set(uint32_t speed);
158 static void acpi_cpu_idle(void);
159 static void acpi_cpu_c1(void);
160 static void acpi_cpu_notify(ACPI_HANDLE h, UINT32 notify, void *context);
161 static int acpi_cpu_quirks(struct acpi_cpu_softc *sc);
162 static int acpi_cpu_throttle_sysctl(SYSCTL_HANDLER_ARGS);
163 static int acpi_cpu_usage_sysctl(SYSCTL_HANDLER_ARGS);
164 static int acpi_cpu_cx_lowest_sysctl(SYSCTL_HANDLER_ARGS);
166 static device_method_t acpi_cpu_methods[] = {
167 /* Device interface */
168 DEVMETHOD(device_probe, acpi_cpu_probe),
169 DEVMETHOD(device_attach, acpi_cpu_attach),
170 DEVMETHOD(device_shutdown, acpi_cpu_shutdown),
175 static driver_t acpi_cpu_driver = {
178 sizeof(struct acpi_cpu_softc),
181 static devclass_t acpi_cpu_devclass;
182 DRIVER_MODULE(cpu, acpi, acpi_cpu_driver, acpi_cpu_devclass, 0, 0);
183 MODULE_DEPEND(cpu, acpi, 1, 1, 1);
186 acpi_cpu_probe(device_t dev)
188 int acpi_id, cpu_id, cx_count;
195 if (acpi_disabled("cpu") || acpi_get_type(dev) != ACPI_TYPE_PROCESSOR)
198 handle = acpi_get_handle(dev);
199 if (cpu_softc == NULL)
200 cpu_softc = kmalloc(sizeof(struct acpi_cpu_softc *) *
201 SMP_MAXCPU, M_TEMP /* XXX */, M_INTWAIT | M_ZERO);
203 /* Get our Processor object. */
205 buf.Length = ACPI_ALLOCATE_BUFFER;
206 status = AcpiEvaluateObject(handle, NULL, NULL, &buf);
207 if (ACPI_FAILURE(status)) {
208 device_printf(dev, "probe failed to get Processor obj - %s\n",
209 AcpiFormatException(status));
212 obj = (ACPI_OBJECT *)buf.Pointer;
213 if (obj->Type != ACPI_TYPE_PROCESSOR) {
214 device_printf(dev, "Processor object has bad type %d\n", obj->Type);
220 * Find the processor associated with our unit. We could use the
221 * ProcId as a key, however, some boxes do not have the same values
222 * in their Processor object as the ProcId values in the MADT.
224 acpi_id = obj->Processor.ProcId;
226 if (acpi_pcpu_get_id(device_get_unit(dev), &acpi_id, &cpu_id) != 0)
230 * Check if we already probed this processor. We scan the bus twice
231 * so it's possible we've already seen this one.
233 if (cpu_softc[cpu_id] != NULL)
236 /* Get a count of Cx states for our device string. */
239 buf.Length = ACPI_ALLOCATE_BUFFER;
240 status = AcpiEvaluateObject(handle, "_CST", NULL, &buf);
241 if (ACPI_SUCCESS(status)) {
242 obj = (ACPI_OBJECT *)buf.Pointer;
243 if (ACPI_PKG_VALID(obj, 2))
244 acpi_PkgInt32(obj, 0, &cx_count);
247 if (AcpiGbl_FADT->Plvl2Lat <= 100)
249 if (AcpiGbl_FADT->Plvl3Lat <= 1000)
255 snprintf(msg, sizeof(msg), "ACPI CPU (%d Cx states)", cx_count);
257 strlcpy(msg, "ACPI CPU", sizeof(msg));
258 device_set_desc_copy(dev, msg);
260 /* Mark this processor as in-use and save our derived id for attach. */
261 cpu_softc[cpu_id] = (void *)1;
262 acpi_set_magic(dev, cpu_id);
268 acpi_cpu_attach(device_t dev)
272 struct acpi_cpu_softc *sc;
273 struct acpi_softc *acpi_sc;
277 ACPI_FUNCTION_TRACE((char *)(uintptr_t)__func__);
281 sc = device_get_softc(dev);
283 sc->cpu_handle = acpi_get_handle(dev);
284 cpu_softc[acpi_get_magic(dev)] = sc;
287 buf.Length = ACPI_ALLOCATE_BUFFER;
288 status = AcpiEvaluateObject(sc->cpu_handle, NULL, NULL, &buf);
289 if (ACPI_FAILURE(status)) {
290 device_printf(dev, "attach failed to get Processor obj - %s\n",
291 AcpiFormatException(status));
294 obj = (ACPI_OBJECT *)buf.Pointer;
295 sc->cpu_p_blk = obj->Processor.PblkAddress;
296 sc->cpu_p_blk_len = obj->Processor.PblkLength;
297 sc->acpi_id = obj->Processor.ProcId;
299 ACPI_DEBUG_PRINT((ACPI_DB_INFO, "acpi_cpu%d: P_BLK at %#x/%d\n",
300 device_get_unit(dev), sc->cpu_p_blk, sc->cpu_p_blk_len));
302 acpi_sc = acpi_device_get_parent_softc(dev);
303 sysctl_ctx_init(&acpi_cpu_sysctl_ctx);
304 acpi_cpu_sysctl_tree = SYSCTL_ADD_NODE(&acpi_cpu_sysctl_ctx,
305 SYSCTL_CHILDREN(acpi_sc->acpi_sysctl_tree),
306 OID_AUTO, "cpu", CTLFLAG_RD, 0, "");
308 /* If this is the first device probed, check for quirks. */
309 if (device_get_unit(dev) == 0)
313 * Probe for throttling and Cx state support.
314 * If none of these is present, free up unused resources.
316 thr_ret = acpi_cpu_throttle_probe(sc);
317 cx_ret = acpi_cpu_cx_probe(sc);
318 if (thr_ret == 0 || cx_ret == 0) {
319 status = AcpiInstallNotifyHandler(sc->cpu_handle, ACPI_DEVICE_NOTIFY,
320 acpi_cpu_notify, sc);
321 if (device_get_unit(dev) == 0)
322 AcpiOsQueueForExecution(OSD_PRIORITY_LO, acpi_cpu_startup, NULL);
324 sysctl_ctx_free(&acpi_cpu_sysctl_ctx);
331 * Find the nth present CPU and return its pc_cpuid as well as set the
332 * pc_acpi_id from the most reliable source.
335 acpi_pcpu_get_id(uint32_t idx, uint32_t *acpi_id, uint32_t *cpu_id)
337 struct mdglobaldata *md;
340 KASSERT(acpi_id != NULL, ("Null acpi_id"));
341 KASSERT(cpu_id != NULL, ("Null cpu_id"));
342 for (i = 0; i <= ncpus; i++) {
343 if ((smp_active_mask & (1 << i)) == 0)
345 md = (struct mdglobaldata *)globaldata_find(i);
346 KASSERT(md != NULL, ("no pcpu data for %d", i));
349 * If pc_acpi_id was not initialized (e.g., a non-APIC UP box)
350 * override it with the value from the ASL. Otherwise, if the
351 * two don't match, prefer the MADT-derived value. Finally,
352 * return the pc_cpuid to reference this processor.
354 if (md->gd_acpi_id == 0xffffffff)
355 md->gd_acpi_id = *acpi_id;
356 else if (md->gd_acpi_id != *acpi_id)
357 *acpi_id = md->gd_acpi_id;
358 *cpu_id = md->mi.gd_cpuid;
367 acpi_cpu_shutdown(device_t dev)
369 ACPI_FUNCTION_TRACE((char *)(uintptr_t)__func__);
371 /* Disable any entry to the idle function. */
374 /* Signal and wait for all processors to exit acpi_cpu_idle(). */
376 if (mycpu->gd_cpuid == 0)
377 lwkt_cpusync_simple(0, NULL, NULL);
385 acpi_cpu_throttle_probe(struct acpi_cpu_softc *sc)
390 ACPI_GENERIC_ADDRESS gas;
393 ACPI_FUNCTION_TRACE((char *)(uintptr_t)__func__);
397 /* Get throttling parameters from the FADT. 0 means not supported. */
398 if (device_get_unit(sc->cpu_dev) == 0) {
399 cpu_smi_cmd = AcpiGbl_FADT->SmiCmd;
400 cpu_pstate_cnt = AcpiGbl_FADT->PstateCnt;
401 cpu_cst_cnt = AcpiGbl_FADT->CstCnt;
402 cpu_duty_offset = AcpiGbl_FADT->DutyOffset;
403 cpu_duty_width = AcpiGbl_FADT->DutyWidth;
405 if (cpu_duty_width == 0 || (cpu_quirks & CPU_QUIRK_NO_THROTTLE) != 0)
408 /* Validate the duty offset/width. */
409 duty_end = cpu_duty_offset + cpu_duty_width - 1;
411 device_printf(sc->cpu_dev, "CLK_VAL field overflows P_CNT register\n");
414 if (cpu_duty_offset <= 4 && duty_end >= 4) {
415 device_printf(sc->cpu_dev, "CLK_VAL field overlaps THT_EN bit\n");
420 * If not present, fall back to using the processor's P_BLK to find
421 * the P_CNT register.
423 * Note that some systems seem to duplicate the P_BLK pointer
424 * across multiple CPUs, so not getting the resource is not fatal.
427 buf.Length = sizeof(obj);
428 status = AcpiEvaluateObject(sc->cpu_handle, "_PTC", NULL, &buf);
429 if (ACPI_SUCCESS(status)) {
430 if (obj.Buffer.Length < sizeof(ACPI_GENERIC_ADDRESS) + 3) {
431 device_printf(sc->cpu_dev, "_PTC buffer too small\n");
434 memcpy(&gas, obj.Buffer.Pointer + 3, sizeof(gas));
435 sc->cpu_p_cnt = acpi_bus_alloc_gas(sc->cpu_dev, &cpu_rid, &gas);
436 if (sc->cpu_p_cnt != NULL) {
437 ACPI_DEBUG_PRINT((ACPI_DB_INFO, "acpi_cpu%d: P_CNT from _PTC\n",
438 device_get_unit(sc->cpu_dev)));
442 /* If _PTC not present or other failure, try the P_BLK. */
443 if (sc->cpu_p_cnt == NULL) {
445 * The spec says P_BLK must be 6 bytes long. However, some
446 * systems use it to indicate a fractional set of features
447 * present so we take anything >= 4.
449 if (sc->cpu_p_blk_len < 4)
451 gas.Address = sc->cpu_p_blk;
452 gas.AddressSpaceId = ACPI_ADR_SPACE_SYSTEM_IO;
453 gas.RegisterBitWidth = 32;
454 sc->cpu_p_cnt = acpi_bus_alloc_gas(sc->cpu_dev, &cpu_rid, &gas);
455 if (sc->cpu_p_cnt != NULL) {
456 ACPI_DEBUG_PRINT((ACPI_DB_INFO, "acpi_cpu%d: P_CNT from P_BLK\n",
457 device_get_unit(sc->cpu_dev)));
459 device_printf(sc->cpu_dev, "Failed to attach throttling P_CNT\n");
469 acpi_cpu_cx_probe(struct acpi_cpu_softc *sc)
471 ACPI_GENERIC_ADDRESS gas;
472 struct acpi_cx *cx_ptr;
475 ACPI_FUNCTION_TRACE((char *)(uintptr_t)__func__);
478 * Bus mastering arbitration control is needed to keep caches coherent
479 * while sleeping in C3. If it's not present but a working flush cache
480 * instruction is present, flush the caches before entering C3 instead.
481 * Otherwise, just disable C3 completely.
483 if (AcpiGbl_FADT->V1_Pm2CntBlk == 0 || AcpiGbl_FADT->Pm2CntLen == 0) {
484 if (AcpiGbl_FADT->WbInvd && AcpiGbl_FADT->WbInvdFlush == 0) {
485 cpu_quirks |= CPU_QUIRK_NO_BM_CTRL;
486 ACPI_DEBUG_PRINT((ACPI_DB_INFO,
487 "acpi_cpu%d: no BM control, using flush cache method\n",
488 device_get_unit(sc->cpu_dev)));
490 cpu_quirks |= CPU_QUIRK_NO_C3;
491 ACPI_DEBUG_PRINT((ACPI_DB_INFO,
492 "acpi_cpu%d: no BM control, C3 not available\n",
493 device_get_unit(sc->cpu_dev)));
498 * First, check for the ACPI 2.0 _CST sleep states object.
499 * If not usable, fall back to the P_BLK's P_LVL2 and P_LVL3.
501 sc->cpu_cx_count = 0;
502 error = acpi_cpu_cx_cst(sc);
504 cx_ptr = sc->cpu_cx_states;
506 /* C1 has been required since just after ACPI 1.0 */
507 cx_ptr->type = ACPI_STATE_C1;
508 cx_ptr->trans_lat = 0;
514 * The spec says P_BLK must be 6 bytes long. However, some systems
515 * use it to indicate a fractional set of features present so we
516 * take 5 as C2. Some may also have a value of 7 to indicate
517 * another C3 but most use _CST for this (as required) and having
518 * "only" C1-C3 is not a hardship.
520 if (sc->cpu_p_blk_len < 5)
523 /* Validate and allocate resources for C2 (P_LVL2). */
524 gas.AddressSpaceId = ACPI_ADR_SPACE_SYSTEM_IO;
525 gas.RegisterBitWidth = 8;
526 if (AcpiGbl_FADT->Plvl2Lat <= 100) {
527 gas.Address = sc->cpu_p_blk + 4;
528 cx_ptr->p_lvlx = acpi_bus_alloc_gas(sc->cpu_dev, &cpu_rid, &gas);
529 if (cx_ptr->p_lvlx != NULL) {
531 cx_ptr->type = ACPI_STATE_C2;
532 cx_ptr->trans_lat = AcpiGbl_FADT->Plvl2Lat;
538 if (sc->cpu_p_blk_len < 6)
541 /* Validate and allocate resources for C3 (P_LVL3). */
542 if (AcpiGbl_FADT->Plvl3Lat <= 1000 &&
543 (cpu_quirks & CPU_QUIRK_NO_C3) == 0) {
545 gas.Address = sc->cpu_p_blk + 5;
546 cx_ptr->p_lvlx = acpi_bus_alloc_gas(sc->cpu_dev, &cpu_rid, &gas);
547 if (cx_ptr->p_lvlx != NULL) {
549 cx_ptr->type = ACPI_STATE_C3;
550 cx_ptr->trans_lat = AcpiGbl_FADT->Plvl3Lat;
558 /* If no valid registers were found, don't attach. */
559 if (sc->cpu_cx_count == 0)
562 /* Use initial sleep value of 1 sec. to start with lowest idle state. */
563 sc->cpu_prev_sleep = 1000000;
569 * Parse a _CST package and set up its Cx states. Since the _CST object
570 * can change dynamically, our notify handler may call this function
571 * to clean up and probe the new _CST package.
574 acpi_cpu_cx_cst(struct acpi_cpu_softc *sc)
576 struct acpi_cx *cx_ptr;
584 ACPI_FUNCTION_TRACE((char *)(uintptr_t)__func__);
587 buf.Length = ACPI_ALLOCATE_BUFFER;
588 status = AcpiEvaluateObject(sc->cpu_handle, "_CST", NULL, &buf);
589 if (ACPI_FAILURE(status))
592 /* _CST is a package with a count and at least one Cx package. */
593 top = (ACPI_OBJECT *)buf.Pointer;
594 if (!ACPI_PKG_VALID(top, 2) || acpi_PkgInt32(top, 0, &count) != 0) {
595 device_printf(sc->cpu_dev, "Invalid _CST package\n");
596 AcpiOsFree(buf.Pointer);
599 if (count != top->Package.Count - 1) {
600 device_printf(sc->cpu_dev, "Invalid _CST state count (%d != %d)\n",
601 count, top->Package.Count - 1);
602 count = top->Package.Count - 1;
604 if (count > MAX_CX_STATES) {
605 device_printf(sc->cpu_dev, "_CST has too many states (%d)\n", count);
606 count = MAX_CX_STATES;
609 /* Set up all valid states. */
610 sc->cpu_cx_count = 0;
611 cx_ptr = sc->cpu_cx_states;
612 for (i = 0; i < count; i++) {
613 pkg = &top->Package.Elements[i + 1];
614 if (!ACPI_PKG_VALID(pkg, 4) ||
615 acpi_PkgInt32(pkg, 1, &cx_ptr->type) != 0 ||
616 acpi_PkgInt32(pkg, 2, &cx_ptr->trans_lat) != 0 ||
617 acpi_PkgInt32(pkg, 3, &cx_ptr->power) != 0) {
619 device_printf(sc->cpu_dev, "Skipping invalid Cx state package\n");
623 /* Validate the state to see if we should use it. */
624 switch (cx_ptr->type) {
631 if (cx_ptr->trans_lat > 100) {
632 ACPI_DEBUG_PRINT((ACPI_DB_INFO,
633 "acpi_cpu%d: C2[%d] not available.\n",
634 device_get_unit(sc->cpu_dev), i));
641 if (cx_ptr->trans_lat > 1000 ||
642 (cpu_quirks & CPU_QUIRK_NO_C3) != 0) {
644 ACPI_DEBUG_PRINT((ACPI_DB_INFO,
645 "acpi_cpu%d: C3[%d] not available.\n",
646 device_get_unit(sc->cpu_dev), i));
653 /* Free up any previous register. */
654 if (cx_ptr->p_lvlx != NULL) {
655 bus_release_resource(sc->cpu_dev, 0, 0, cx_ptr->p_lvlx);
656 cx_ptr->p_lvlx = NULL;
660 /* Allocate the control register for C2 or C3. */
661 acpi_PkgGas(sc->cpu_dev, pkg, 0, &cpu_rid, &cx_ptr->p_lvlx);
662 if (cx_ptr->p_lvlx != NULL) {
664 ACPI_DEBUG_PRINT((ACPI_DB_INFO,
665 "acpi_cpu%d: Got C%d - %d latency\n",
666 device_get_unit(sc->cpu_dev), cx_ptr->type,
672 AcpiOsFree(buf.Pointer);
678 * Call this *after* all CPUs have been attached.
681 acpi_cpu_startup(void *arg)
683 struct acpi_cpu_softc *sc;
686 /* Get set of CPU devices */
687 devclass_get_devices(acpi_cpu_devclass, &cpu_devices, &cpu_ndevices);
690 * Make sure all the processors' Cx counts match. We should probably
691 * also check the contents of each. However, no known systems have
692 * non-matching Cx counts so we'll deal with this later.
694 count = MAX_CX_STATES;
695 for (i = 0; i < cpu_ndevices; i++) {
696 sc = device_get_softc(cpu_devices[i]);
697 count = min(sc->cpu_cx_count, count);
699 cpu_cx_count = count;
701 /* Perform throttling and Cx final initialization. */
702 sc = device_get_softc(cpu_devices[0]);
703 if (sc->cpu_p_cnt != NULL)
704 acpi_cpu_startup_throttling();
705 if (cpu_cx_count > 0)
706 acpi_cpu_startup_cx();
708 /* register performance profile change handler */
709 EVENTHANDLER_REGISTER(power_profile_change, acpi_cpu_power_profile, NULL, 0);
713 * Power profile change hook.
715 * Uses the ACPI lock to avoid reentrancy.
718 acpi_cpu_power_profile(void *arg)
724 state = power_profile_get_state();
725 if (state != POWER_PROFILE_PERFORMANCE &&
726 state != POWER_PROFILE_ECONOMY) {
732 case POWER_PROFILE_PERFORMANCE:
733 speed = cpu_throttle_performance;
735 case POWER_PROFILE_ECONOMY:
736 speed = cpu_throttle_economy;
739 speed = cpu_throttle_state;
742 if (speed != cpu_throttle_state)
743 acpi_cpu_throttle_set(speed);
748 * Takes the ACPI lock to avoid fighting anyone over the SMI command
752 acpi_cpu_startup_throttling(void)
756 /* Initialise throttling states */
757 cpu_throttle_max = CPU_MAX_SPEED;
758 cpu_throttle_state = CPU_MAX_SPEED;
759 cpu_throttle_performance = cpu_throttle_max;
760 cpu_throttle_economy = cpu_throttle_performance / 2;
762 SYSCTL_ADD_INT(&acpi_cpu_sysctl_ctx,
763 SYSCTL_CHILDREN(acpi_cpu_sysctl_tree),
764 OID_AUTO, "throttle_max", CTLFLAG_RD,
765 &cpu_throttle_max, 0, "maximum CPU speed");
766 SYSCTL_ADD_PROC(&acpi_cpu_sysctl_ctx,
767 SYSCTL_CHILDREN(acpi_cpu_sysctl_tree),
768 OID_AUTO, "throttle_state",
769 CTLTYPE_INT | CTLFLAG_RW, &cpu_throttle_state,
770 0, acpi_cpu_throttle_sysctl, "I", "current CPU speed");
773 * Performance/Economy throttle settings
775 SYSCTL_ADD_PROC(&acpi_cpu_sysctl_ctx,
776 SYSCTL_CHILDREN(acpi_cpu_sysctl_tree),
777 OID_AUTO, "performance_speed",
778 CTLTYPE_INT | CTLFLAG_RW, &cpu_throttle_performance,
779 0, acpi_cpu_throttle_sysctl, "I", "performance CPU speed");
780 SYSCTL_ADD_PROC(&acpi_cpu_sysctl_ctx,
781 SYSCTL_CHILDREN(acpi_cpu_sysctl_tree),
782 OID_AUTO, "economy_speed",
783 CTLTYPE_INT | CTLFLAG_RW, &cpu_throttle_economy,
784 0, acpi_cpu_throttle_sysctl, "I", "economy CPU speed");
786 /* If ACPI 2.0+, signal platform that we are taking over throttling. */
788 if (cpu_pstate_cnt != 0)
789 AcpiOsWritePort(cpu_smi_cmd, cpu_pstate_cnt, 8);
791 /* Set initial speed to maximum. */
792 acpi_cpu_throttle_set(cpu_throttle_max);
795 printf("acpi_cpu: throttling enabled, %d steps (100%% to %d.%d%%), "
796 "currently %d.%d%%\n", CPU_MAX_SPEED, CPU_SPEED_PRINTABLE(1),
797 CPU_SPEED_PRINTABLE(cpu_throttle_state));
801 acpi_cpu_startup_cx(void)
803 struct acpi_cpu_softc *sc;
807 sc = device_get_softc(cpu_devices[0]);
808 sbuf_new(&sb, cpu_cx_supported, sizeof(cpu_cx_supported), SBUF_FIXEDLEN);
809 for (i = 0; i < cpu_cx_count; i++)
810 sbuf_printf(&sb, "C%d/%d ", i + 1, sc->cpu_cx_states[i].trans_lat);
813 SYSCTL_ADD_STRING(&acpi_cpu_sysctl_ctx,
814 SYSCTL_CHILDREN(acpi_cpu_sysctl_tree),
815 OID_AUTO, "cx_supported", CTLFLAG_RD, cpu_cx_supported,
816 0, "Cx/microsecond values for supported Cx states");
817 SYSCTL_ADD_PROC(&acpi_cpu_sysctl_ctx,
818 SYSCTL_CHILDREN(acpi_cpu_sysctl_tree),
819 OID_AUTO, "cx_lowest", CTLTYPE_STRING | CTLFLAG_RW,
820 NULL, 0, acpi_cpu_cx_lowest_sysctl, "A",
821 "lowest Cx sleep state to use");
822 SYSCTL_ADD_PROC(&acpi_cpu_sysctl_ctx,
823 SYSCTL_CHILDREN(acpi_cpu_sysctl_tree),
824 OID_AUTO, "cx_usage", CTLTYPE_STRING | CTLFLAG_RD,
825 NULL, 0, acpi_cpu_usage_sysctl, "A",
826 "percent usage for each Cx state");
829 /* Signal platform that we can handle _CST notification. */
830 if (cpu_cst_cnt != 0) {
832 AcpiOsWritePort(cpu_smi_cmd, cpu_cst_cnt, 8);
837 /* Take over idling from cpu_idle_default_hook(). */
839 cpu_idle_hook = acpi_cpu_idle;
841 printf("Warning: ACPI idle hook not yet supported for SMP\n");
845 * Set CPUs to the new state.
847 * Must be called with the ACPI lock held.
850 acpi_cpu_throttle_set(uint32_t speed)
852 struct acpi_cpu_softc *sc;
854 uint32_t p_cnt, clk_val;
858 /* Iterate over processors */
859 for (i = 0; i < cpu_ndevices; i++) {
860 sc = device_get_softc(cpu_devices[i]);
861 if (sc->cpu_p_cnt == NULL)
864 /* Get the current P_CNT value and disable throttling */
865 p_cnt = CPU_GET_REG(sc->cpu_p_cnt, 4);
866 p_cnt &= ~CPU_P_CNT_THT_EN;
867 CPU_SET_REG(sc->cpu_p_cnt, 4, p_cnt);
869 /* If we're at maximum speed, that's all */
870 if (speed < CPU_MAX_SPEED) {
871 /* Mask the old CLK_VAL off and or-in the new value */
872 clk_val = (CPU_MAX_SPEED - 1) << cpu_duty_offset;
874 p_cnt |= (speed << cpu_duty_offset);
876 /* Write the new P_CNT value and then enable throttling */
877 CPU_SET_REG(sc->cpu_p_cnt, 4, p_cnt);
878 p_cnt |= CPU_P_CNT_THT_EN;
879 CPU_SET_REG(sc->cpu_p_cnt, 4, p_cnt);
881 ACPI_VPRINT(sc->cpu_dev, acpi_device_get_parent_softc(sc->cpu_dev),
882 "set speed to %d.%d%%\n", CPU_SPEED_PRINTABLE(speed));
884 cpu_throttle_state = speed;
888 * Idle the CPU in the lowest state possible. This function is called with
889 * interrupts disabled. Note that once it re-enables interrupts, a task
890 * switch can occur so do not access shared data (i.e. the softc) after
891 * interrupts are re-enabled.
896 struct acpi_cpu_softc *sc;
897 struct acpi_cx *cx_next;
898 uint32_t start_time, end_time;
899 int bm_active, cx_next_idx, i;
901 /* If disabled, return immediately. */
902 if (cpu_cx_count == 0) {
908 * Look up our CPU id to get our softc. If it's NULL, we'll use C1
909 * since there is no ACPI processor object for this CPU. This occurs
910 * for logical CPUs in the HTT case.
912 sc = cpu_softc[mdcpu->mi.gd_cpuid];
919 * If we slept 100 us or more, use the lowest Cx state. Otherwise,
920 * find the lowest state that has a latency less than or equal to
921 * the length of our last sleep.
923 cx_next_idx = cpu_cx_lowest;
924 if (sc->cpu_prev_sleep < 100)
925 for (i = cpu_cx_lowest; i >= 0; i--)
926 if (sc->cpu_cx_states[i].trans_lat <= sc->cpu_prev_sleep) {
932 * Check for bus master activity. If there was activity, clear
933 * the bit and use the lowest non-C3 state. Note that the USB
934 * driver polling for new devices keeps this bit set all the
935 * time if USB is loaded.
937 if ((cpu_quirks & CPU_QUIRK_NO_BM_CTRL) == 0) {
938 AcpiGetRegister(ACPI_BITREG_BUS_MASTER_STATUS, &bm_active,
939 ACPI_MTX_DO_NOT_LOCK);
940 if (bm_active != 0) {
941 AcpiSetRegister(ACPI_BITREG_BUS_MASTER_STATUS, 1,
942 ACPI_MTX_DO_NOT_LOCK);
943 cx_next_idx = min(cx_next_idx, cpu_non_c3);
947 /* Select the next state and update statistics. */
948 cx_next = &sc->cpu_cx_states[cx_next_idx];
949 cpu_cx_stats[cx_next_idx]++;
950 KASSERT(cx_next->type != ACPI_STATE_C0, ("acpi_cpu_idle: C0 sleep"));
953 * Execute HLT (or equivalent) and wait for an interrupt. We can't
954 * calculate the time spent in C1 since the place we wake up is an
955 * ISR. Assume we slept one quantum and return.
957 if (cx_next->type == ACPI_STATE_C1) {
958 sc->cpu_prev_sleep = 1000000 / hz;
964 * For C3, disable bus master arbitration and enable bus master wake
965 * if BM control is available, otherwise flush the CPU cache.
967 if (cx_next->type == ACPI_STATE_C3) {
968 if ((cpu_quirks & CPU_QUIRK_NO_BM_CTRL) == 0) {
969 AcpiSetRegister(ACPI_BITREG_ARB_DISABLE, 1, ACPI_MTX_DO_NOT_LOCK);
970 AcpiSetRegister(ACPI_BITREG_BUS_MASTER_RLD, 1,
971 ACPI_MTX_DO_NOT_LOCK);
973 ACPI_FLUSH_CPU_CACHE();
977 * Read from P_LVLx to enter C2(+), checking time spent asleep.
978 * Use the ACPI timer for measuring sleep time. Since we need to
979 * get the time very close to the CPU start/stop clock logic, this
980 * is the only reliable time source.
982 AcpiHwLowLevelRead(32, &start_time, &AcpiGbl_FADT->XPmTmrBlk);
983 CPU_GET_REG(cx_next->p_lvlx, 1);
986 * Read the end time twice. Since it may take an arbitrary time
987 * to enter the idle state, the first read may be executed before
988 * the processor has stopped. Doing it again provides enough
989 * margin that we are certain to have a correct value.
991 AcpiHwLowLevelRead(32, &end_time, &AcpiGbl_FADT->XPmTmrBlk);
992 AcpiHwLowLevelRead(32, &end_time, &AcpiGbl_FADT->XPmTmrBlk);
994 /* Enable bus master arbitration and disable bus master wakeup. */
995 if (cx_next->type == ACPI_STATE_C3 &&
996 (cpu_quirks & CPU_QUIRK_NO_BM_CTRL) == 0) {
997 AcpiSetRegister(ACPI_BITREG_ARB_DISABLE, 0, ACPI_MTX_DO_NOT_LOCK);
998 AcpiSetRegister(ACPI_BITREG_BUS_MASTER_RLD, 0, ACPI_MTX_DO_NOT_LOCK);
1001 /* Find the actual time asleep in microseconds, minus overhead. */
1002 end_time = acpi_TimerDelta(end_time, start_time);
1003 sc->cpu_prev_sleep = PM_USEC(end_time) - cx_next->trans_lat;
1007 /* Put the CPU in C1 in a machine-dependant way. */
1012 ia64_call_pal_static(PAL_HALT_LIGHT, 0, 0, 0);
1016 if (!lwkt_runnable())
1017 __asm __volatile("sti; hlt");
1019 __asm __volatile("sti; pause");
1021 if (!lwkt_runnable())
1022 __asm __volatile("sti; hlt");
1024 __asm __volatile("sti");
1026 #endif /* !__ia64__ */
1030 * Re-evaluate the _PSS and _CST objects when we are notified that they
1033 * XXX Re-evaluation disabled until locking is done.
1036 acpi_cpu_notify(ACPI_HANDLE h, UINT32 notify, void *context)
1038 struct acpi_cpu_softc *sc = (struct acpi_cpu_softc *)context;
1041 case ACPI_CPU_NOTIFY_PERF_STATES:
1042 device_printf(sc->cpu_dev, "Performance states changed\n");
1043 /* acpi_cpu_px_available(sc); */
1045 case ACPI_CPU_NOTIFY_CX_STATES:
1046 device_printf(sc->cpu_dev, "Cx states changed\n");
1047 /* acpi_cpu_cx_cst(sc); */
1050 device_printf(sc->cpu_dev, "Unknown notify %#x\n", notify);
1056 acpi_cpu_quirks(struct acpi_cpu_softc *sc)
1060 * C3 on multiple CPUs requires using the expensive flush cache
1064 cpu_quirks |= CPU_QUIRK_NO_BM_CTRL;
1067 /* Look for various quirks of the PIIX4 part. */
1068 acpi_dev = pci_find_device(PCI_VENDOR_INTEL, PCI_DEVICE_82371AB_3);
1069 if (acpi_dev != NULL) {
1070 switch (pci_get_revid(acpi_dev)) {
1072 * Disable throttling control on PIIX4 A and B-step.
1073 * See specification changes #13 ("Manual Throttle Duty Cycle")
1074 * and #14 ("Enabling and Disabling Manual Throttle"), plus
1075 * erratum #5 ("STPCLK# Deassertion Time") from the January
1076 * 2002 PIIX4 specification update. Note that few (if any)
1077 * mobile systems ever used this part.
1079 case PCI_REVISION_A_STEP:
1080 case PCI_REVISION_B_STEP:
1081 cpu_quirks |= CPU_QUIRK_NO_THROTTLE;
1084 * Disable C3 support for all PIIX4 chipsets. Some of these parts
1085 * do not report the BMIDE status to the BM status register and
1086 * others have a livelock bug if Type-F DMA is enabled. Linux
1087 * works around the BMIDE bug by reading the BM status directly
1088 * but we take the simpler approach of disabling C3 for these
1091 * See erratum #18 ("C3 Power State/BMIDE and Type-F DMA
1092 * Livelock") from the January 2002 PIIX4 specification update.
1093 * Applies to all PIIX4 models.
1095 case PCI_REVISION_4E:
1096 case PCI_REVISION_4M:
1097 cpu_quirks |= CPU_QUIRK_NO_C3;
1108 /* Handle changes in the CPU throttling setting. */
1110 acpi_cpu_throttle_sysctl(SYSCTL_HANDLER_ARGS)
1117 argp = (uint32_t *)oidp->oid_arg1;
1119 error = sysctl_handle_int(oidp, &arg, 0, req);
1121 /* Error or no new value */
1122 if (error != 0 || req->newptr == NULL)
1124 if (arg < 1 || arg > cpu_throttle_max)
1127 /* If throttling changed, notify the BIOS of the new rate. */
1131 acpi_cpu_throttle_set(arg);
1139 acpi_cpu_usage_sysctl(SYSCTL_HANDLER_ARGS)
1144 uintmax_t fract, sum, whole;
1147 for (i = 0; i < cpu_cx_count; i++)
1148 sum += cpu_cx_stats[i];
1149 sbuf_new(&sb, buf, sizeof(buf), SBUF_FIXEDLEN);
1150 for (i = 0; i < cpu_cx_count; i++) {
1152 whole = (uintmax_t)cpu_cx_stats[i] * 100;
1153 fract = (whole % sum) * 100;
1154 sbuf_printf(&sb, "%u.%02u%% ", (u_int)(whole / sum),
1155 (u_int)(fract / sum));
1157 sbuf_printf(&sb, "0%% ");
1161 sysctl_handle_string(oidp, sbuf_data(&sb), sbuf_len(&sb), req);
1168 acpi_cpu_cx_lowest_sysctl(SYSCTL_HANDLER_ARGS)
1170 struct acpi_cpu_softc *sc;
1174 sc = device_get_softc(cpu_devices[0]);
1175 snprintf(state, sizeof(state), "C%d", cpu_cx_lowest + 1);
1176 error = sysctl_handle_string(oidp, state, sizeof(state), req);
1177 if (error != 0 || req->newptr == NULL)
1179 if (strlen(state) < 2 || toupper(state[0]) != 'C')
1181 val = (int) strtol(state + 1, NULL, 10) - 1;
1182 if (val < 0 || val > cpu_cx_count - 1)
1185 cpu_cx_lowest = val;
1187 /* If not disabling, cache the new lowest non-C3 state. */
1189 for (i = cpu_cx_lowest; i >= 0; i--) {
1190 if (sc->cpu_cx_states[i].type < ACPI_STATE_C3) {
1196 /* Reset the statistics counters. */
1197 bzero(cpu_cx_stats, sizeof(cpu_cx_stats));