2 * From: $NetBSD: pal.s,v 1.12 1998/02/27 03:44:53 thorpej Exp $
3 * $FreeBSD: src/sys/boot/alpha/libalpha/pal.S,v 1.3 2001/05/28 09:52:21 obrien Exp $
4 * $DragonFly: src/sys/boot/alpha/libalpha/Attic/pal.S,v 1.3 2003/11/10 06:08:30 dillon Exp $
8 * Copyright (c) 1994, 1995 Carnegie-Mellon University.
11 * Author: Chris G. Demetriou
13 * Permission to use, copy, modify and distribute this software and
14 * its documentation is hereby granted, provided that both the copyright
15 * notice and this permission notice appear in all copies of the
16 * software, derivative works or modified versions, and any portions
17 * thereof, and that both notices appear in supporting documentation.
19 * CARNEGIE MELLON ALLOWS FREE USE OF THIS SOFTWARE IN ITS "AS IS"
20 * CONDITION. CARNEGIE MELLON DISCLAIMS ANY LIABILITY OF ANY KIND
21 * FOR ANY DAMAGES WHATSOEVER RESULTING FROM THE USE OF THIS SOFTWARE.
23 * Carnegie Mellon requests users of this software to return to
25 * Software Distribution Coordinator or Software.Distribution@CS.CMU.EDU
26 * School of Computer Science
27 * Carnegie Mellon University
28 * Pittsburgh PA 15213-3890
30 * any improvements or extensions that they make and grant Carnegie the
31 * rights to redistribute these changes.
35 * The various OSF PALcode routines.
37 * The following code is originally derived from pages: (I) 6-5 - (I) 6-7
38 * and (III) 2-1 - (III) 2-25 of "Alpha Architecture Reference Manual" by
41 * Updates taken from pages: (II-B) 2-1 - (II-B) 2-33 of "Alpha AXP
42 * Architecture Reference Manual, Second Edition" by Richard L. Sites
43 * and Richard T. Witek.
46 #include <machine/asm.h>
48 /*inc2: .stabs __FILE__,132,0,0,inc2; .loc 1 __LINE__*/
49 inc2: .stabs __FILE__,132,0,0,inc2
51 * alpha_rpcc: read process cycle counter (XXX INSTRUCTION, NOT PALcode OP)
60 * alpha_mb: memory barrier (XXX INSTRUCTION, NOT PALcode OP)
69 * alpha_wmb: write memory barrier (XXX INSTRUCTION, NOT PALcode OP)
79 * alpha_amask: read architecture features (XXX INSTRUCTION, NOT PALcode OP)
82 * a0 bitmask of features to test
85 * v0 bitmask - bit is _cleared_ if feature is supported
94 * alpha_implver: read implementation version (XXX INSTRUCTION, NOT PALcode OP)
97 * v0 implementation version - see <machine/alpha_cpu.h>
100 LEAF(alpha_implver,0)
104 .long 0x47e03d80 /* XXX gas(1) does the Wrong Thing */
110 * alpha_pal_imb: I-Stream memory barrier. [UNPRIVILEGED]
111 * (Makes instruction stream coherent with data stream.)
114 LEAF(alpha_pal_imb,0)
120 * alpha_pal_cflush: Cache flush [PRIVILEGED]
122 * Flush the entire physical page specified by the PFN specified in
123 * a0 from any data caches associated with the current processor.
126 * a0 page frame number of page to flush
129 LEAF(alpha_pal_cflush,1)
132 END(alpha_pal_cflush)
135 * alpha_pal_draina: Drain aborts. [PRIVILEGED]
138 LEAF(alpha_pal_draina,0)
141 END(alpha_pal_draina)
144 * alpha_pal_halt: Halt the processor. [PRIVILEGED]
147 LEAF(alpha_pal_halt,0)
149 br zero,alpha_pal_halt /* Just in case */
154 * alpha_pal_rdmces: Read MCES processor register. [PRIVILEGED]
157 * v0 current MCES value
160 LEAF(alpha_pal_rdmces,1)
161 call_pal PAL_OSF1_rdmces
163 END(alpha_pal_rdmces)
166 * alpha_pal_rdps: Read processor status. [PRIVILEGED]
169 * v0 current PS value
172 LEAF(alpha_pal_rdps,0)
173 call_pal PAL_OSF1_rdps
178 * alpha_pal_rdusp: Read user stack pointer. [PRIVILEGED]
181 * v0 current user stack pointer
184 LEAF(alpha_pal_rdusp,0)
185 call_pal PAL_OSF1_rdusp
190 * alpha_pal_rdval: Read system value. [PRIVILEGED]
192 * Returns the sysvalue in v0, allowing access to a 64-bit
193 * per-processor value for use by the operating system.
199 LEAF(alpha_pal_rdval,0)
200 call_pal PAL_OSF1_rdval
205 * alpha_pal_swpipl: Swap Interrupt priority level. [PRIVILEGED]
206 * _alpha_pal_swpipl: Same, from profiling code. [PRIVILEGED]
215 LEAF(alpha_pal_swpipl,1)
216 call_pal PAL_OSF1_swpipl
218 END(alpha_pal_swpipl)
220 LEAF_NOPROFILE(_alpha_pal_swpipl,1)
221 call_pal PAL_OSF1_swpipl
223 END(_alpha_pal_swpipl)
226 * alpha_pal_tbi: Translation buffer invalidate. [PRIVILEGED]
229 * a0 operation selector
230 * a1 address to operate on (if necessary)
233 LEAF(alpha_pal_tbi,2)
234 call_pal PAL_OSF1_tbi
239 * alpha_pal_whami: Who am I? [PRIVILEGED]
242 * v0 processor number
245 LEAF(alpha_pal_whami,0)
246 call_pal PAL_OSF1_whami
251 * alpha_pal_wrent: Write system entry address. [PRIVILEGED]
258 LEAF(alpha_pal_wrent,2)
259 call_pal PAL_OSF1_wrent
264 * alpha_pal_wrfen: Write floating-point enable. [PRIVILEGED]
267 * a0 new enable value (val & 0x1 -> enable).
270 LEAF(alpha_pal_wrfen,1)
271 call_pal PAL_OSF1_wrfen
276 * alpha_pal_wripir: Write interprocessor interrupt request. [PRIVILEGED]
278 * Generate an interprocessor interrupt on the processor specified by
279 * processor number in a0.
282 * a0 processor to interrupt
285 LEAF(alpha_pal_wripir,1)
288 END(alpha_pal_wripir)
291 * alpha_pal_wrusp: Write user stack pointer. [PRIVILEGED]
294 * a0 new user stack pointer
297 LEAF(alpha_pal_wrusp,1)
298 call_pal PAL_OSF1_wrusp
303 * alpha_pal_wrvptptr: Write virtual page table pointer. [PRIVILEGED]
306 * a0 new virtual page table pointer
309 LEAF(alpha_pal_wrvptptr,1)
310 call_pal PAL_OSF1_wrvptptr
312 END(alpha_pal_wrvptptr)
315 * alpha_pal_wrmces: Write MCES processor register. [PRIVILEGED]
318 * a0 value to write to MCES
321 LEAF(alpha_pal_wrmces,1)
322 call_pal PAL_OSF1_wrmces
324 END(alpha_pal_wrmces)
327 * alpha_pal_wrval: Write system value. [PRIVILEGED]
329 * Write the value passed in a0 to this processor's sysvalue.
332 * a0 value to write to sysvalue
334 LEAF(alpha_pal_wrval,1)
335 call_pal PAL_OSF1_wrval
340 * alpha_pal_swpctx: Swap context. [PRIVILEGED]
342 * Switch to a new process context.
345 * a0 physical address of hardware PCB describing context
348 * v0 physical address of hardware PCB describing previous context
350 LEAF(alpha_pal_swpctx,1)
351 call_pal PAL_OSF1_swpctx
353 END(alpha_pal_swpctx)