2 * Copyright (c) 1992 Terrence R. Lambert.
3 * Copyright (c) 1982, 1987, 1990 The Regents of the University of California.
6 * This code is derived from software contributed to Berkeley by
9 * Redistribution and use in source and binary forms, with or without
10 * modification, are permitted provided that the following conditions
12 * 1. Redistributions of source code must retain the above copyright
13 * notice, this list of conditions and the following disclaimer.
14 * 2. Redistributions in binary form must reproduce the above copyright
15 * notice, this list of conditions and the following disclaimer in the
16 * documentation and/or other materials provided with the distribution.
17 * 3. All advertising materials mentioning features or use of this software
18 * must display the following acknowledgement:
19 * This product includes software developed by the University of
20 * California, Berkeley and its contributors.
21 * 4. Neither the name of the University nor the names of its contributors
22 * may be used to endorse or promote products derived from this software
23 * without specific prior written permission.
25 * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
26 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
27 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
28 * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
29 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
30 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
31 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
32 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
33 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
34 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
37 * from: @(#)machdep.c 7.4 (Berkeley) 6/3/91
38 * $FreeBSD: src/sys/i386/i386/machdep.c,v 1.385.2.30 2003/05/31 08:48:05 alc Exp $
42 #include "use_ether.h"
45 #include "opt_atalk.h"
46 #include "opt_compat.h"
49 #include "opt_directio.h"
52 #include "opt_maxmem.h"
53 #include "opt_msgbuf.h"
54 #include "opt_perfmon.h"
56 #include "opt_userconfig.h"
58 #include <sys/param.h>
59 #include <sys/systm.h>
60 #include <sys/sysproto.h>
61 #include <sys/signalvar.h>
62 #include <sys/kernel.h>
63 #include <sys/linker.h>
64 #include <sys/malloc.h>
68 #include <sys/reboot.h>
70 #include <sys/msgbuf.h>
71 #include <sys/sysent.h>
72 #include <sys/sysctl.h>
73 #include <sys/vmmeter.h>
75 #include <sys/upcall.h>
76 #include <sys/usched.h>
80 #include <vm/vm_param.h>
82 #include <vm/vm_kern.h>
83 #include <vm/vm_object.h>
84 #include <vm/vm_page.h>
85 #include <vm/vm_map.h>
86 #include <vm/vm_pager.h>
87 #include <vm/vm_extern.h>
89 #include <sys/thread2.h>
90 #include <sys/mplock2.h>
98 #include <machine/cpu.h>
99 #include <machine/clock.h>
100 #include <machine/specialreg.h>
101 #include <machine/bootinfo.h>
102 #include <machine/md_var.h>
103 #include <machine/pcb_ext.h> /* pcb.h included via sys/user.h */
104 #include <machine/globaldata.h> /* CPU_prvspace */
105 #include <machine/smp.h>
107 #include <machine/perfmon.h>
109 #include <machine/cputypes.h>
112 #include <bus/isa/isa_device.h>
114 #include <machine_base/isa/intr_machdep.h>
115 #include <bus/isa/rtc.h>
116 #include <machine/vm86.h>
117 #include <sys/random.h>
118 #include <sys/ptrace.h>
119 #include <machine/sigframe.h>
121 #define PHYSMAP_ENTRIES 10
123 extern void init386(int first);
124 extern void dblfault_handler(void);
126 extern void printcpuinfo(void); /* XXX header file */
127 extern void finishidentcpu(void);
128 extern void panicifcpuunsupported(void);
129 extern void initializecpu(void);
131 static void cpu_startup(void *);
132 #ifndef CPU_DISABLE_SSE
133 static void set_fpregs_xmm(struct save87 *, struct savexmm *);
134 static void fill_fpregs_xmm(struct savexmm *, struct save87 *);
135 #endif /* CPU_DISABLE_SSE */
137 extern void ffs_rawread_setup(void);
138 #endif /* DIRECTIO */
139 static void init_locks(void);
141 SYSINIT(cpu, SI_BOOT2_SMP, SI_ORDER_FIRST, cpu_startup, NULL)
143 int _udatasel, _ucodesel;
146 int64_t tsc_offsets[MAXCPU];
148 int64_t tsc_offsets[1];
151 #if defined(SWTCH_OPTIM_STATS)
152 extern int swtch_optim_stats;
153 SYSCTL_INT(_debug, OID_AUTO, swtch_optim_stats,
154 CTLFLAG_RD, &swtch_optim_stats, 0, "");
155 SYSCTL_INT(_debug, OID_AUTO, tlb_flush_count,
156 CTLFLAG_RD, &tlb_flush_count, 0, "");
161 u_long ebda_addr = 0;
164 sysctl_hw_physmem(SYSCTL_HANDLER_ARGS)
166 int error = sysctl_handle_int(oidp, 0, ctob(physmem), req);
170 SYSCTL_PROC(_hw, HW_PHYSMEM, physmem, CTLTYPE_INT|CTLFLAG_RD,
171 0, 0, sysctl_hw_physmem, "IU", "");
174 sysctl_hw_usermem(SYSCTL_HANDLER_ARGS)
176 int error = sysctl_handle_int(oidp, 0,
177 ctob(physmem - vmstats.v_wire_count), req);
181 SYSCTL_PROC(_hw, HW_USERMEM, usermem, CTLTYPE_INT|CTLFLAG_RD,
182 0, 0, sysctl_hw_usermem, "IU", "");
185 sysctl_hw_availpages(SYSCTL_HANDLER_ARGS)
187 int error = sysctl_handle_int(oidp, 0,
188 i386_btop(avail_end - avail_start), req);
192 SYSCTL_PROC(_hw, OID_AUTO, availpages, CTLTYPE_INT|CTLFLAG_RD,
193 0, 0, sysctl_hw_availpages, "I", "");
198 vm_paddr_t phys_avail[PHYSMAP_ENTRIES*2+2];
199 vm_paddr_t dump_avail[PHYSMAP_ENTRIES*2+2];
202 static vm_offset_t buffer_sva, buffer_eva;
203 vm_offset_t clean_sva, clean_eva;
204 static vm_offset_t pager_sva, pager_eva;
205 static struct trapframe proc0_tf;
208 cpu_startup(void *dummy)
212 vm_offset_t firstaddr;
214 if (boothowto & RB_VERBOSE)
218 * Good {morning,afternoon,evening,night}.
220 kprintf("%s", version);
223 panicifcpuunsupported();
227 kprintf("real memory = %ju (%ju MB)\n",
229 (intmax_t)Realmem / 1024 / 1024);
231 * Display any holes after the first chunk of extended memory.
236 kprintf("Physical memory chunk(s):\n");
237 for (indx = 0; phys_avail[indx + 1] != 0; indx += 2) {
238 vm_paddr_t size1 = phys_avail[indx + 1] - phys_avail[indx];
240 kprintf("0x%08llx - 0x%08llx, %llu bytes (%llu pages)\n",
241 phys_avail[indx], phys_avail[indx + 1] - 1, size1,
247 * Allocate space for system data structures.
248 * The first available kernel virtual address is in "v".
249 * As pages of kernel virtual memory are allocated, "v" is incremented.
250 * As pages of memory are allocated and cleared,
251 * "firstaddr" is incremented.
252 * An index into the kernel page table corresponding to the
253 * virtual memory address maintained in "v" is kept in "mapaddr".
257 * Make two passes. The first pass calculates how much memory is
258 * needed and allocates it. The second pass assigns virtual
259 * addresses to the various data structures.
263 v = (caddr_t)firstaddr;
265 #define valloc(name, type, num) \
266 (name) = (type *)v; v = (caddr_t)((name)+(num))
267 #define valloclim(name, type, num, lim) \
268 (name) = (type *)v; v = (caddr_t)((lim) = ((name)+(num)))
271 * The nominal buffer size (and minimum KVA allocation) is BKVASIZE.
272 * For the first 64MB of ram nominally allocate sufficient buffers to
273 * cover 1/4 of our ram. Beyond the first 64MB allocate additional
274 * buffers to cover 1/20 of our ram over 64MB. When auto-sizing
275 * the buffer cache we limit the eventual kva reservation to
278 * factor represents the 1/4 x ram conversion.
281 int factor = 4 * BKVASIZE / 1024;
282 int kbytes = physmem * (PAGE_SIZE / 1024);
286 nbuf += min((kbytes - 4096) / factor, 65536 / factor);
288 nbuf += (kbytes - 65536) * 2 / (factor * 5);
289 if (maxbcache && nbuf > maxbcache / BKVASIZE)
290 nbuf = maxbcache / BKVASIZE;
294 * Do not allow the buffer_map to be more then 1/2 the size of the
297 if (nbuf > (virtual_end - virtual_start) / (BKVASIZE * 2)) {
298 nbuf = (virtual_end - virtual_start) / (BKVASIZE * 2);
299 kprintf("Warning: nbufs capped at %d\n", nbuf);
302 /* limit to 128 on i386 */
303 nswbuf = max(min(nbuf/4, 128), 16);
305 if (nswbuf < NSWBUF_MIN)
312 valloc(swbuf, struct buf, nswbuf);
313 valloc(buf, struct buf, nbuf);
316 * End of first pass, size has been calculated so allocate memory
318 if (firstaddr == 0) {
319 size = (vm_size_t)(v - firstaddr);
320 firstaddr = kmem_alloc(&kernel_map, round_page(size));
322 panic("startup: no room for tables");
327 * End of second pass, addresses have been assigned
329 if ((vm_size_t)(v - firstaddr) != size)
330 panic("startup: table size inconsistency");
332 kmem_suballoc(&kernel_map, &clean_map, &clean_sva, &clean_eva,
333 (nbuf*BKVASIZE) + (nswbuf*MAXPHYS) + pager_map_size);
334 kmem_suballoc(&clean_map, &buffer_map, &buffer_sva, &buffer_eva,
336 buffer_map.system_map = 1;
337 kmem_suballoc(&clean_map, &pager_map, &pager_sva, &pager_eva,
338 (nswbuf*MAXPHYS) + pager_map_size);
339 pager_map.system_map = 1;
341 #if defined(USERCONFIG)
343 cninit(); /* the preferred console may have changed */
346 kprintf("avail memory = %ju (%ju MB)\n",
347 (intmax_t)ptoa(vmstats.v_free_count),
348 (intmax_t)ptoa(vmstats.v_free_count) / 1024 / 1024);
351 * Set up buffers, so they can be used to read disk labels.
354 vm_pager_bufferinit();
358 * OK, enough kmem_alloc/malloc state should be up, lets get on with it!
360 mp_start(); /* fire up the APs and APICs */
367 * Send an interrupt to process.
369 * Stack is set up to allow sigcode stored
370 * at top to call routine, followed by kcall
371 * to sigreturn routine below. After sigreturn
372 * resets the signal mask, the stack, and the
373 * frame pointer, it returns to the user
377 sendsig(sig_t catcher, int sig, sigset_t *mask, u_long code)
379 struct lwp *lp = curthread->td_lwp;
380 struct proc *p = lp->lwp_proc;
381 struct trapframe *regs;
382 struct sigacts *psp = p->p_sigacts;
383 struct sigframe sf, *sfp;
386 regs = lp->lwp_md.md_regs;
387 oonstack = (lp->lwp_sigstk.ss_flags & SS_ONSTACK) ? 1 : 0;
389 /* save user context */
390 bzero(&sf, sizeof(struct sigframe));
391 sf.sf_uc.uc_sigmask = *mask;
392 sf.sf_uc.uc_stack = lp->lwp_sigstk;
393 sf.sf_uc.uc_mcontext.mc_onstack = oonstack;
394 bcopy(regs, &sf.sf_uc.uc_mcontext.mc_gs, sizeof(struct trapframe));
396 /* make the size of the saved context visible to userland */
397 sf.sf_uc.uc_mcontext.mc_len = sizeof(sf.sf_uc.uc_mcontext);
399 /* save mailbox pending state for syscall interlock semantics */
400 if (p->p_flag & P_MAILBOX)
401 sf.sf_uc.uc_mcontext.mc_xflags |= PGEX_MAILBOX;
403 /* Allocate and validate space for the signal handler context. */
404 if ((lp->lwp_flag & LWP_ALTSTACK) != 0 && !oonstack &&
405 SIGISMEMBER(psp->ps_sigonstack, sig)) {
406 sfp = (struct sigframe *)(lp->lwp_sigstk.ss_sp +
407 lp->lwp_sigstk.ss_size - sizeof(struct sigframe));
408 lp->lwp_sigstk.ss_flags |= SS_ONSTACK;
410 sfp = (struct sigframe *)regs->tf_esp - 1;
413 /* Translate the signal is appropriate */
414 if (p->p_sysent->sv_sigtbl) {
415 if (sig <= p->p_sysent->sv_sigsize)
416 sig = p->p_sysent->sv_sigtbl[_SIG_IDX(sig)];
419 /* Build the argument list for the signal handler. */
421 sf.sf_ucontext = (register_t)&sfp->sf_uc;
422 if (SIGISMEMBER(psp->ps_siginfo, sig)) {
423 /* Signal handler installed with SA_SIGINFO. */
424 sf.sf_siginfo = (register_t)&sfp->sf_si;
425 sf.sf_ahu.sf_action = (__siginfohandler_t *)catcher;
427 /* fill siginfo structure */
428 sf.sf_si.si_signo = sig;
429 sf.sf_si.si_code = code;
430 sf.sf_si.si_addr = (void*)regs->tf_err;
433 /* Old FreeBSD-style arguments. */
434 sf.sf_siginfo = code;
435 sf.sf_addr = regs->tf_err;
436 sf.sf_ahu.sf_handler = catcher;
440 * If we're a vm86 process, we want to save the segment registers.
441 * We also change eflags to be our emulated eflags, not the actual
444 if (regs->tf_eflags & PSL_VM) {
445 struct trapframe_vm86 *tf = (struct trapframe_vm86 *)regs;
446 struct vm86_kernel *vm86 = &lp->lwp_thread->td_pcb->pcb_ext->ext_vm86;
448 sf.sf_uc.uc_mcontext.mc_gs = tf->tf_vm86_gs;
449 sf.sf_uc.uc_mcontext.mc_fs = tf->tf_vm86_fs;
450 sf.sf_uc.uc_mcontext.mc_es = tf->tf_vm86_es;
451 sf.sf_uc.uc_mcontext.mc_ds = tf->tf_vm86_ds;
453 if (vm86->vm86_has_vme == 0)
454 sf.sf_uc.uc_mcontext.mc_eflags =
455 (tf->tf_eflags & ~(PSL_VIF | PSL_VIP)) |
456 (vm86->vm86_eflags & (PSL_VIF | PSL_VIP));
459 * Clear PSL_NT to inhibit T_TSSFLT faults on return from
460 * syscalls made by the signal handler. This just avoids
461 * wasting time for our lazy fixup of such faults. PSL_NT
462 * does nothing in vm86 mode, but vm86 programs can set it
463 * almost legitimately in probes for old cpu types.
465 tf->tf_eflags &= ~(PSL_VM | PSL_NT | PSL_VIF | PSL_VIP);
469 * Save the FPU state and reinit the FP unit
471 npxpush(&sf.sf_uc.uc_mcontext);
474 * Copy the sigframe out to the user's stack.
476 if (copyout(&sf, sfp, sizeof(struct sigframe)) != 0) {
478 * Something is wrong with the stack pointer.
479 * ...Kill the process.
484 regs->tf_esp = (int)sfp;
485 regs->tf_eip = PS_STRINGS - *(p->p_sysent->sv_szsigcode);
488 * i386 abi specifies that the direction flag must be cleared
491 regs->tf_eflags &= ~(PSL_T|PSL_D);
493 regs->tf_cs = _ucodesel;
494 regs->tf_ds = _udatasel;
495 regs->tf_es = _udatasel;
498 * Allow the signal handler to inherit %fs in addition to %gs as
499 * the userland program might be using both.
501 * However, if a T_PROTFLT occured the segment registers could be
502 * totally broken. They must be reset in order to be able to
503 * return to userland.
505 if (regs->tf_trapno == T_PROTFLT) {
506 regs->tf_fs = _udatasel;
507 regs->tf_gs = _udatasel;
509 regs->tf_ss = _udatasel;
513 * Sanitize the trapframe for a virtual kernel passing control to a custom
514 * VM context. Remove any items that would otherwise create a privilage
517 * XXX at the moment we allow userland to set the resume flag. Is this a
521 cpu_sanitize_frame(struct trapframe *frame)
523 frame->tf_cs = _ucodesel;
524 frame->tf_ds = _udatasel;
525 frame->tf_es = _udatasel; /* XXX allow userland this one too? */
527 frame->tf_fs = _udatasel;
528 frame->tf_gs = _udatasel;
530 frame->tf_ss = _udatasel;
531 frame->tf_eflags &= (PSL_RF | PSL_USERCHANGE);
532 frame->tf_eflags |= PSL_RESERVED_DEFAULT | PSL_I;
537 cpu_sanitize_tls(struct savetls *tls)
539 struct segment_descriptor *desc;
542 for (i = 0; i < NGTLS; ++i) {
544 if (desc->sd_dpl == 0 && desc->sd_type == 0)
546 if (desc->sd_def32 == 0)
548 if (desc->sd_type != SDT_MEMRWA)
550 if (desc->sd_dpl != SEL_UPL)
552 if (desc->sd_xx != 0 || desc->sd_p != 1)
559 * sigreturn(ucontext_t *sigcntxp)
561 * System call to cleanup state after a signal
562 * has been taken. Reset signal mask and
563 * stack state from context left by sendsig (above).
564 * Return to previous pc and psl as specified by
565 * context left by sendsig. Check carefully to
566 * make sure that the user has not modified the
567 * state to gain improper privileges.
571 #define EFL_SECURE(ef, oef) ((((ef) ^ (oef)) & ~PSL_USERCHANGE) == 0)
572 #define CS_SECURE(cs) (ISPL(cs) == SEL_UPL)
575 sys_sigreturn(struct sigreturn_args *uap)
577 struct lwp *lp = curthread->td_lwp;
578 struct proc *p = lp->lwp_proc;
579 struct trapframe *regs;
587 * We have to copy the information into kernel space so userland
588 * can't modify it while we are sniffing it.
590 regs = lp->lwp_md.md_regs;
591 error = copyin(uap->sigcntxp, &uc, sizeof(uc));
595 eflags = ucp->uc_mcontext.mc_eflags;
597 if (eflags & PSL_VM) {
598 struct trapframe_vm86 *tf = (struct trapframe_vm86 *)regs;
599 struct vm86_kernel *vm86;
602 * if pcb_ext == 0 or vm86_inited == 0, the user hasn't
603 * set up the vm86 area, and we can't enter vm86 mode.
605 if (lp->lwp_thread->td_pcb->pcb_ext == 0)
607 vm86 = &lp->lwp_thread->td_pcb->pcb_ext->ext_vm86;
608 if (vm86->vm86_inited == 0)
611 /* go back to user mode if both flags are set */
612 if ((eflags & PSL_VIP) && (eflags & PSL_VIF))
613 trapsignal(lp, SIGBUS, 0);
615 if (vm86->vm86_has_vme) {
616 eflags = (tf->tf_eflags & ~VME_USERCHANGE) |
617 (eflags & VME_USERCHANGE) | PSL_VM;
619 vm86->vm86_eflags = eflags; /* save VIF, VIP */
620 eflags = (tf->tf_eflags & ~VM_USERCHANGE) |
621 (eflags & VM_USERCHANGE) | PSL_VM;
623 bcopy(&ucp->uc_mcontext.mc_gs, tf, sizeof(struct trapframe));
624 tf->tf_eflags = eflags;
625 tf->tf_vm86_ds = tf->tf_ds;
626 tf->tf_vm86_es = tf->tf_es;
627 tf->tf_vm86_fs = tf->tf_fs;
628 tf->tf_vm86_gs = tf->tf_gs;
629 tf->tf_ds = _udatasel;
630 tf->tf_es = _udatasel;
632 tf->tf_fs = _udatasel;
633 tf->tf_gs = _udatasel;
637 * Don't allow users to change privileged or reserved flags.
640 * XXX do allow users to change the privileged flag PSL_RF.
641 * The cpu sets PSL_RF in tf_eflags for faults. Debuggers
642 * should sometimes set it there too. tf_eflags is kept in
643 * the signal context during signal handling and there is no
644 * other place to remember it, so the PSL_RF bit may be
645 * corrupted by the signal handler without us knowing.
646 * Corruption of the PSL_RF bit at worst causes one more or
647 * one less debugger trap, so allowing it is fairly harmless.
649 if (!EFL_SECURE(eflags & ~PSL_RF, regs->tf_eflags & ~PSL_RF)) {
650 kprintf("sigreturn: eflags = 0x%x\n", eflags);
655 * Don't allow users to load a valid privileged %cs. Let the
656 * hardware check for invalid selectors, excess privilege in
657 * other selectors, invalid %eip's and invalid %esp's.
659 cs = ucp->uc_mcontext.mc_cs;
660 if (!CS_SECURE(cs)) {
661 kprintf("sigreturn: cs = 0x%x\n", cs);
662 trapsignal(lp, SIGBUS, T_PROTFLT);
665 bcopy(&ucp->uc_mcontext.mc_gs, regs, sizeof(struct trapframe));
669 * Restore the FPU state from the frame
672 npxpop(&ucp->uc_mcontext);
675 * Merge saved signal mailbox pending flag to maintain interlock
676 * semantics against system calls.
678 if (ucp->uc_mcontext.mc_xflags & PGEX_MAILBOX)
679 p->p_flag |= P_MAILBOX;
681 if (ucp->uc_mcontext.mc_onstack & 1)
682 lp->lwp_sigstk.ss_flags |= SS_ONSTACK;
684 lp->lwp_sigstk.ss_flags &= ~SS_ONSTACK;
686 lp->lwp_sigmask = ucp->uc_sigmask;
687 SIG_CANTMASK(lp->lwp_sigmask);
693 * Stack frame on entry to function. %eax will contain the function vector,
694 * %ecx will contain the function data. flags, ecx, and eax will have
695 * already been pushed on the stack.
706 sendupcall(struct vmupcall *vu, int morepending)
708 struct lwp *lp = curthread->td_lwp;
709 struct trapframe *regs;
710 struct upcall upcall;
711 struct upc_frame upc_frame;
715 * If we are a virtual kernel running an emulated user process
716 * context, switch back to the virtual kernel context before
717 * trying to post the signal.
719 if (lp->lwp_vkernel && lp->lwp_vkernel->ve) {
720 lp->lwp_md.md_regs->tf_trapno = 0;
721 vkernel_trap(lp, lp->lwp_md.md_regs);
725 * Get the upcall data structure
727 if (copyin(lp->lwp_upcall, &upcall, sizeof(upcall)) ||
728 copyin((char *)upcall.upc_uthread + upcall.upc_critoff, &crit_count, sizeof(int))
731 kprintf("bad upcall address\n");
736 * If the data structure is already marked pending or has a critical
737 * section count, mark the data structure as pending and return
738 * without doing an upcall. vu_pending is left set.
740 if (upcall.upc_pending || crit_count >= vu->vu_pending) {
741 if (upcall.upc_pending < vu->vu_pending) {
742 upcall.upc_pending = vu->vu_pending;
743 copyout(&upcall.upc_pending, &lp->lwp_upcall->upc_pending,
744 sizeof(upcall.upc_pending));
750 * We can run this upcall now, clear vu_pending.
752 * Bump our critical section count and set or clear the
753 * user pending flag depending on whether more upcalls are
754 * pending. The user will be responsible for calling
755 * upc_dispatch(-1) to process remaining upcalls.
758 upcall.upc_pending = morepending;
760 copyout(&upcall.upc_pending, &lp->lwp_upcall->upc_pending,
761 sizeof(upcall.upc_pending));
762 copyout(&crit_count, (char *)upcall.upc_uthread + upcall.upc_critoff,
766 * Construct a stack frame and issue the upcall
768 regs = lp->lwp_md.md_regs;
769 upc_frame.eax = regs->tf_eax;
770 upc_frame.ecx = regs->tf_ecx;
771 upc_frame.edx = regs->tf_edx;
772 upc_frame.flags = regs->tf_eflags;
773 upc_frame.oldip = regs->tf_eip;
774 if (copyout(&upc_frame, (void *)(regs->tf_esp - sizeof(upc_frame)),
775 sizeof(upc_frame)) != 0) {
776 kprintf("bad stack on upcall\n");
778 regs->tf_eax = (register_t)vu->vu_func;
779 regs->tf_ecx = (register_t)vu->vu_data;
780 regs->tf_edx = (register_t)lp->lwp_upcall;
781 regs->tf_eip = (register_t)vu->vu_ctx;
782 regs->tf_esp -= sizeof(upc_frame);
787 * fetchupcall occurs in the context of a system call, which means that
788 * we have to return EJUSTRETURN in order to prevent eax and edx from
789 * being overwritten by the syscall return value.
791 * if vu is not NULL we return the new context in %edx, the new data in %ecx,
792 * and the function pointer in %eax.
795 fetchupcall(struct vmupcall *vu, int morepending, void *rsp)
797 struct upc_frame upc_frame;
798 struct lwp *lp = curthread->td_lwp;
799 struct trapframe *regs;
801 struct upcall upcall;
804 regs = lp->lwp_md.md_regs;
806 error = copyout(&morepending, &lp->lwp_upcall->upc_pending, sizeof(int));
810 * This jumps us to the next ready context.
813 error = copyin(lp->lwp_upcall, &upcall, sizeof(upcall));
816 error = copyin((char *)upcall.upc_uthread + upcall.upc_critoff, &crit_count, sizeof(int));
819 error = copyout(&crit_count, (char *)upcall.upc_uthread + upcall.upc_critoff, sizeof(int));
820 regs->tf_eax = (register_t)vu->vu_func;
821 regs->tf_ecx = (register_t)vu->vu_data;
822 regs->tf_edx = (register_t)lp->lwp_upcall;
823 regs->tf_eip = (register_t)vu->vu_ctx;
824 regs->tf_esp = (register_t)rsp;
827 * This returns us to the originally interrupted code.
829 error = copyin(rsp, &upc_frame, sizeof(upc_frame));
830 regs->tf_eax = upc_frame.eax;
831 regs->tf_ecx = upc_frame.ecx;
832 regs->tf_edx = upc_frame.edx;
833 regs->tf_eflags = (regs->tf_eflags & ~PSL_USERCHANGE) |
834 (upc_frame.flags & PSL_USERCHANGE);
835 regs->tf_eip = upc_frame.oldip;
836 regs->tf_esp = (register_t)((char *)rsp + sizeof(upc_frame));
845 * Machine dependent boot() routine
847 * I haven't seen anything to put here yet
848 * Possibly some stuff might be grafted back here from boot()
856 * Shutdown the CPU as much as possible
862 __asm__ __volatile("hlt");
866 * cpu_idle() represents the idle LWKT. You cannot return from this function
867 * (unless you want to blow things up!). Instead we look for runnable threads
868 * and loop or halt as appropriate. Giant is not held on entry to the thread.
870 * The main loop is entered with a critical section held, we must release
871 * the critical section before doing anything else. lwkt_switch() will
872 * check for pending interrupts due to entering and exiting its own
875 * Note on cpu_idle_hlt: On an SMP system we rely on a scheduler IPI
876 * to wake a HLTed cpu up. However, there are cases where the idlethread
877 * will be entered with the possibility that no IPI will occur and in such
878 * cases lwkt_switch() sets TDF_IDLE_NOHLT.
880 static int cpu_idle_hlt = 1;
881 static int cpu_idle_hltcnt;
882 static int cpu_idle_spincnt;
883 SYSCTL_INT(_machdep, OID_AUTO, cpu_idle_hlt, CTLFLAG_RW,
884 &cpu_idle_hlt, 0, "Idle loop HLT enable");
885 SYSCTL_INT(_machdep, OID_AUTO, cpu_idle_hltcnt, CTLFLAG_RW,
886 &cpu_idle_hltcnt, 0, "Idle loop entry halts");
887 SYSCTL_INT(_machdep, OID_AUTO, cpu_idle_spincnt, CTLFLAG_RW,
888 &cpu_idle_spincnt, 0, "Idle loop entry spins");
891 cpu_idle_default_hook(void)
894 * We must guarentee that hlt is exactly the instruction
897 __asm __volatile("sti; hlt");
900 /* Other subsystems (e.g., ACPI) can hook this later. */
901 void (*cpu_idle_hook)(void) = cpu_idle_default_hook;
906 struct thread *td = curthread;
909 KKASSERT(td->td_critcount == 0);
912 * See if there are any LWKTs ready to go.
917 * If we are going to halt call splz unconditionally after
918 * CLIing to catch any interrupt races. Note that we are
919 * at SPL0 and interrupts are enabled.
921 if (cpu_idle_hlt && !lwkt_runnable() &&
922 (td->td_flags & TDF_IDLE_NOHLT) == 0) {
923 __asm __volatile("cli");
925 if (!lwkt_runnable())
929 handle_cpu_contention_mask();
933 td->td_flags &= ~TDF_IDLE_NOHLT;
936 __asm __volatile("sti");
937 handle_cpu_contention_mask();
939 __asm __volatile("sti");
949 * This routine is called when the only runnable threads require
950 * the MP lock, and the scheduler couldn't get it. On a real cpu
951 * we let the scheduler spin.
954 handle_cpu_contention_mask(void)
958 mask = cpu_contention_mask;
960 if (mask && bsfl(mask) != mycpu->gd_cpuid)
965 * This routine is called if a spinlock has been held through the
966 * exponential backoff period and is seriously contested. On a real cpu
970 cpu_spinlock_contested(void)
978 * Clear registers on exec
981 exec_setregs(u_long entry, u_long stack, u_long ps_strings)
983 struct thread *td = curthread;
984 struct lwp *lp = td->td_lwp;
985 struct pcb *pcb = td->td_pcb;
986 struct trapframe *regs = lp->lwp_md.md_regs;
988 /* was i386_user_cleanup() in NetBSD */
991 bzero((char *)regs, sizeof(struct trapframe));
992 regs->tf_eip = entry;
993 regs->tf_esp = stack;
994 regs->tf_eflags = PSL_USER | (regs->tf_eflags & PSL_T);
995 regs->tf_ss = _udatasel;
996 regs->tf_ds = _udatasel;
997 regs->tf_es = _udatasel;
998 regs->tf_fs = _udatasel;
999 regs->tf_gs = _udatasel;
1000 regs->tf_cs = _ucodesel;
1002 /* PS_STRINGS value for BSD/OS binaries. It is 0 for non-BSD/OS. */
1003 regs->tf_ebx = ps_strings;
1006 * Reset the hardware debug registers if they were in use.
1007 * They won't have any meaning for the newly exec'd process.
1009 if (pcb->pcb_flags & PCB_DBREGS) {
1016 if (pcb == td->td_pcb) {
1018 * Clear the debug registers on the running
1019 * CPU, otherwise they will end up affecting
1020 * the next process we switch to.
1024 pcb->pcb_flags &= ~PCB_DBREGS;
1028 * Initialize the math emulator (if any) for the current process.
1029 * Actually, just clear the bit that says that the emulator has
1030 * been initialized. Initialization is delayed until the process
1031 * traps to the emulator (if it is done at all) mainly because
1032 * emulators don't provide an entry point for initialization.
1034 pcb->pcb_flags &= ~FP_SOFTFP;
1037 * note: do not set CR0_TS here. npxinit() must do it after clearing
1038 * gd_npxthread. Otherwise a preemptive interrupt thread may panic
1042 load_cr0(rcr0() | CR0_MP);
1045 /* Initialize the npx (if any) for the current process. */
1046 npxinit(__INITIAL_NPXCW__);
1051 * note: linux emulator needs edx to be 0x0 on entry, which is
1052 * handled in execve simply by setting the 64 bit syscall
1053 * return value to 0.
1063 cr0 |= CR0_NE; /* Done by npxinit() */
1064 cr0 |= CR0_MP | CR0_TS; /* Done at every execve() too. */
1065 cr0 |= CR0_WP | CR0_AM;
1071 sysctl_machdep_adjkerntz(SYSCTL_HANDLER_ARGS)
1074 error = sysctl_handle_int(oidp, oidp->oid_arg1, oidp->oid_arg2,
1076 if (!error && req->newptr)
1081 SYSCTL_PROC(_machdep, CPU_ADJKERNTZ, adjkerntz, CTLTYPE_INT|CTLFLAG_RW,
1082 &adjkerntz, 0, sysctl_machdep_adjkerntz, "I", "");
1084 SYSCTL_INT(_machdep, CPU_DISRTCSET, disable_rtc_set,
1085 CTLFLAG_RW, &disable_rtc_set, 0, "");
1087 SYSCTL_STRUCT(_machdep, CPU_BOOTINFO, bootinfo,
1088 CTLFLAG_RD, &bootinfo, bootinfo, "");
1090 SYSCTL_INT(_machdep, CPU_WALLCLOCK, wall_cmos_clock,
1091 CTLFLAG_RW, &wall_cmos_clock, 0, "");
1093 extern u_long bootdev; /* not a cdev_t - encoding is different */
1094 SYSCTL_ULONG(_machdep, OID_AUTO, guessed_bootdev,
1095 CTLFLAG_RD, &bootdev, 0, "Boot device (not in cdev_t format)");
1098 * Initialize 386 and configure to run kernel
1102 * Initialize segments & interrupt table
1106 union descriptor gdt[NGDT * MAXCPU]; /* global descriptor table */
1107 static struct gate_descriptor idt0[NIDT];
1108 struct gate_descriptor *idt = &idt0[0]; /* interrupt descriptor table */
1109 union descriptor ldt[NLDT]; /* local descriptor table */
1111 /* table descriptors - used to load tables by cpu */
1112 struct region_descriptor r_gdt, r_idt;
1114 #if defined(I586_CPU) && !defined(NO_F00F_HACK)
1115 extern int has_f00f_bug;
1118 static struct i386tss dblfault_tss;
1119 static char dblfault_stack[PAGE_SIZE];
1121 extern struct user *proc0paddr;
1124 /* software prototypes -- in more palatable form */
1125 struct soft_segment_descriptor gdt_segs[] = {
1126 /* GNULL_SEL 0 Null Descriptor */
1127 { 0x0, /* segment base address */
1129 0, /* segment type */
1130 0, /* segment descriptor priority level */
1131 0, /* segment descriptor present */
1133 0, /* default 32 vs 16 bit size */
1134 0 /* limit granularity (byte/page units)*/ },
1135 /* GCODE_SEL 1 Code Descriptor for kernel */
1136 { 0x0, /* segment base address */
1137 0xfffff, /* length - all address space */
1138 SDT_MEMERA, /* segment type */
1139 0, /* segment descriptor priority level */
1140 1, /* segment descriptor present */
1142 1, /* default 32 vs 16 bit size */
1143 1 /* limit granularity (byte/page units)*/ },
1144 /* GDATA_SEL 2 Data Descriptor for kernel */
1145 { 0x0, /* segment base address */
1146 0xfffff, /* length - all address space */
1147 SDT_MEMRWA, /* segment type */
1148 0, /* segment descriptor priority level */
1149 1, /* segment descriptor present */
1151 1, /* default 32 vs 16 bit size */
1152 1 /* limit granularity (byte/page units)*/ },
1153 /* GPRIV_SEL 3 SMP Per-Processor Private Data Descriptor */
1154 { 0x0, /* segment base address */
1155 0xfffff, /* length - all address space */
1156 SDT_MEMRWA, /* segment type */
1157 0, /* segment descriptor priority level */
1158 1, /* segment descriptor present */
1160 1, /* default 32 vs 16 bit size */
1161 1 /* limit granularity (byte/page units)*/ },
1162 /* GPROC0_SEL 4 Proc 0 Tss Descriptor */
1164 0x0, /* segment base address */
1165 sizeof(struct i386tss)-1,/* length - all address space */
1166 SDT_SYS386TSS, /* segment type */
1167 0, /* segment descriptor priority level */
1168 1, /* segment descriptor present */
1170 0, /* unused - default 32 vs 16 bit size */
1171 0 /* limit granularity (byte/page units)*/ },
1172 /* GLDT_SEL 5 LDT Descriptor */
1173 { (int) ldt, /* segment base address */
1174 sizeof(ldt)-1, /* length - all address space */
1175 SDT_SYSLDT, /* segment type */
1176 SEL_UPL, /* segment descriptor priority level */
1177 1, /* segment descriptor present */
1179 0, /* unused - default 32 vs 16 bit size */
1180 0 /* limit granularity (byte/page units)*/ },
1181 /* GUSERLDT_SEL 6 User LDT Descriptor per process */
1182 { (int) ldt, /* segment base address */
1183 (512 * sizeof(union descriptor)-1), /* length */
1184 SDT_SYSLDT, /* segment type */
1185 0, /* segment descriptor priority level */
1186 1, /* segment descriptor present */
1188 0, /* unused - default 32 vs 16 bit size */
1189 0 /* limit granularity (byte/page units)*/ },
1190 /* GTGATE_SEL 7 Null Descriptor - Placeholder */
1191 { 0x0, /* segment base address */
1192 0x0, /* length - all address space */
1193 0, /* segment type */
1194 0, /* segment descriptor priority level */
1195 0, /* segment descriptor present */
1197 0, /* default 32 vs 16 bit size */
1198 0 /* limit granularity (byte/page units)*/ },
1199 /* GBIOSLOWMEM_SEL 8 BIOS access to realmode segment 0x40, must be #8 in GDT */
1200 { 0x400, /* segment base address */
1201 0xfffff, /* length */
1202 SDT_MEMRWA, /* segment type */
1203 0, /* segment descriptor priority level */
1204 1, /* segment descriptor present */
1206 1, /* default 32 vs 16 bit size */
1207 1 /* limit granularity (byte/page units)*/ },
1208 /* GPANIC_SEL 9 Panic Tss Descriptor */
1209 { (int) &dblfault_tss, /* segment base address */
1210 sizeof(struct i386tss)-1,/* length - all address space */
1211 SDT_SYS386TSS, /* segment type */
1212 0, /* segment descriptor priority level */
1213 1, /* segment descriptor present */
1215 0, /* unused - default 32 vs 16 bit size */
1216 0 /* limit granularity (byte/page units)*/ },
1217 /* GBIOSCODE32_SEL 10 BIOS 32-bit interface (32bit Code) */
1218 { 0, /* segment base address (overwritten) */
1219 0xfffff, /* length */
1220 SDT_MEMERA, /* segment type */
1221 0, /* segment descriptor priority level */
1222 1, /* segment descriptor present */
1224 0, /* default 32 vs 16 bit size */
1225 1 /* limit granularity (byte/page units)*/ },
1226 /* GBIOSCODE16_SEL 11 BIOS 32-bit interface (16bit Code) */
1227 { 0, /* segment base address (overwritten) */
1228 0xfffff, /* length */
1229 SDT_MEMERA, /* segment type */
1230 0, /* segment descriptor priority level */
1231 1, /* segment descriptor present */
1233 0, /* default 32 vs 16 bit size */
1234 1 /* limit granularity (byte/page units)*/ },
1235 /* GBIOSDATA_SEL 12 BIOS 32-bit interface (Data) */
1236 { 0, /* segment base address (overwritten) */
1237 0xfffff, /* length */
1238 SDT_MEMRWA, /* segment type */
1239 0, /* segment descriptor priority level */
1240 1, /* segment descriptor present */
1242 1, /* default 32 vs 16 bit size */
1243 1 /* limit granularity (byte/page units)*/ },
1244 /* GBIOSUTIL_SEL 13 BIOS 16-bit interface (Utility) */
1245 { 0, /* segment base address (overwritten) */
1246 0xfffff, /* length */
1247 SDT_MEMRWA, /* segment type */
1248 0, /* segment descriptor priority level */
1249 1, /* segment descriptor present */
1251 0, /* default 32 vs 16 bit size */
1252 1 /* limit granularity (byte/page units)*/ },
1253 /* GBIOSARGS_SEL 14 BIOS 16-bit interface (Arguments) */
1254 { 0, /* segment base address (overwritten) */
1255 0xfffff, /* length */
1256 SDT_MEMRWA, /* segment type */
1257 0, /* segment descriptor priority level */
1258 1, /* segment descriptor present */
1260 0, /* default 32 vs 16 bit size */
1261 1 /* limit granularity (byte/page units)*/ },
1262 /* GTLS_START 15 TLS */
1263 { 0x0, /* segment base address */
1265 0, /* segment type */
1266 0, /* segment descriptor priority level */
1267 0, /* segment descriptor present */
1269 0, /* default 32 vs 16 bit size */
1270 0 /* limit granularity (byte/page units)*/ },
1271 /* GTLS_START+1 16 TLS */
1272 { 0x0, /* segment base address */
1274 0, /* segment type */
1275 0, /* segment descriptor priority level */
1276 0, /* segment descriptor present */
1278 0, /* default 32 vs 16 bit size */
1279 0 /* limit granularity (byte/page units)*/ },
1280 /* GTLS_END 17 TLS */
1281 { 0x0, /* segment base address */
1283 0, /* segment type */
1284 0, /* segment descriptor priority level */
1285 0, /* segment descriptor present */
1287 0, /* default 32 vs 16 bit size */
1288 0 /* limit granularity (byte/page units)*/ },
1291 static struct soft_segment_descriptor ldt_segs[] = {
1292 /* Null Descriptor - overwritten by call gate */
1293 { 0x0, /* segment base address */
1294 0x0, /* length - all address space */
1295 0, /* segment type */
1296 0, /* segment descriptor priority level */
1297 0, /* segment descriptor present */
1299 0, /* default 32 vs 16 bit size */
1300 0 /* limit granularity (byte/page units)*/ },
1301 /* Null Descriptor - overwritten by call gate */
1302 { 0x0, /* segment base address */
1303 0x0, /* length - all address space */
1304 0, /* segment type */
1305 0, /* segment descriptor priority level */
1306 0, /* segment descriptor present */
1308 0, /* default 32 vs 16 bit size */
1309 0 /* limit granularity (byte/page units)*/ },
1310 /* Null Descriptor - overwritten by call gate */
1311 { 0x0, /* segment base address */
1312 0x0, /* length - all address space */
1313 0, /* segment type */
1314 0, /* segment descriptor priority level */
1315 0, /* segment descriptor present */
1317 0, /* default 32 vs 16 bit size */
1318 0 /* limit granularity (byte/page units)*/ },
1319 /* Code Descriptor for user */
1320 { 0x0, /* segment base address */
1321 0xfffff, /* length - all address space */
1322 SDT_MEMERA, /* segment type */
1323 SEL_UPL, /* segment descriptor priority level */
1324 1, /* segment descriptor present */
1326 1, /* default 32 vs 16 bit size */
1327 1 /* limit granularity (byte/page units)*/ },
1328 /* Null Descriptor - overwritten by call gate */
1329 { 0x0, /* segment base address */
1330 0x0, /* length - all address space */
1331 0, /* segment type */
1332 0, /* segment descriptor priority level */
1333 0, /* segment descriptor present */
1335 0, /* default 32 vs 16 bit size */
1336 0 /* limit granularity (byte/page units)*/ },
1337 /* Data Descriptor for user */
1338 { 0x0, /* segment base address */
1339 0xfffff, /* length - all address space */
1340 SDT_MEMRWA, /* segment type */
1341 SEL_UPL, /* segment descriptor priority level */
1342 1, /* segment descriptor present */
1344 1, /* default 32 vs 16 bit size */
1345 1 /* limit granularity (byte/page units)*/ },
1349 setidt(int idx, inthand_t *func, int typ, int dpl, int selec)
1351 struct gate_descriptor *ip;
1354 ip->gd_looffset = (int)func;
1355 ip->gd_selector = selec;
1361 ip->gd_hioffset = ((int)func)>>16 ;
1364 #define IDTVEC(name) __CONCAT(X,name)
1367 IDTVEC(div), IDTVEC(dbg), IDTVEC(nmi), IDTVEC(bpt), IDTVEC(ofl),
1368 IDTVEC(bnd), IDTVEC(ill), IDTVEC(dna), IDTVEC(fpusegm),
1369 IDTVEC(tss), IDTVEC(missing), IDTVEC(stk), IDTVEC(prot),
1370 IDTVEC(page), IDTVEC(mchk), IDTVEC(fpu), IDTVEC(align),
1371 IDTVEC(xmm), IDTVEC(syscall),
1374 IDTVEC(int0x80_syscall);
1376 #ifdef DEBUG_INTERRUPTS
1377 extern inthand_t *Xrsvdary[256];
1381 sdtossd(struct segment_descriptor *sd, struct soft_segment_descriptor *ssd)
1383 ssd->ssd_base = (sd->sd_hibase << 24) | sd->sd_lobase;
1384 ssd->ssd_limit = (sd->sd_hilimit << 16) | sd->sd_lolimit;
1385 ssd->ssd_type = sd->sd_type;
1386 ssd->ssd_dpl = sd->sd_dpl;
1387 ssd->ssd_p = sd->sd_p;
1388 ssd->ssd_def32 = sd->sd_def32;
1389 ssd->ssd_gran = sd->sd_gran;
1393 * Populate the (physmap) array with base/bound pairs describing the
1394 * available physical memory in the system, then test this memory and
1395 * build the phys_avail array describing the actually-available memory.
1397 * If we cannot accurately determine the physical memory map, then use
1398 * value from the 0xE801 call, and failing that, the RTC.
1400 * Total memory size may be set by the kernel environment variable
1401 * hw.physmem or the compile-time define MAXMEM.
1404 getmemsize(int first)
1406 int i, physmap_idx, pa_indx, da_indx;
1408 u_int basemem, extmem;
1409 struct vm86frame vmf;
1410 struct vm86context vmc;
1412 vm_offset_t physmap[PHYSMAP_ENTRIES*2];
1420 quad_t dcons_addr, dcons_size;
1422 bzero(&vmf, sizeof(struct vm86frame));
1423 bzero(physmap, sizeof(physmap));
1427 * Some newer BIOSes has broken INT 12H implementation which cause
1428 * kernel panic immediately. In this case, we need to scan SMAP
1429 * with INT 15:E820 first, then determine base memory size.
1432 TUNABLE_INT_FETCH("hw.hasbrokenint12", &hasbrokenint12);
1433 if (hasbrokenint12) {
1438 * Perform "base memory" related probes & setup. If we get a crazy
1439 * value give the bios some scribble space just in case.
1441 vm86_intcall(0x12, &vmf);
1442 basemem = vmf.vmf_ax;
1443 if (basemem > 640) {
1444 kprintf("Preposterous BIOS basemem of %uK, "
1445 "truncating to < 640K\n", basemem);
1450 * XXX if biosbasemem is now < 640, there is a `hole'
1451 * between the end of base memory and the start of
1452 * ISA memory. The hole may be empty or it may
1453 * contain BIOS code or data. Map it read/write so
1454 * that the BIOS can write to it. (Memory from 0 to
1455 * the physical end of the kernel is mapped read-only
1456 * to begin with and then parts of it are remapped.
1457 * The parts that aren't remapped form holes that
1458 * remain read-only and are unused by the kernel.
1459 * The base memory area is below the physical end of
1460 * the kernel and right now forms a read-only hole.
1461 * The part of it from PAGE_SIZE to
1462 * (trunc_page(biosbasemem * 1024) - 1) will be
1463 * remapped and used by the kernel later.)
1465 * This code is similar to the code used in
1466 * pmap_mapdev, but since no memory needs to be
1467 * allocated we simply change the mapping.
1469 for (pa = trunc_page(basemem * 1024);
1470 pa < ISA_HOLE_START; pa += PAGE_SIZE) {
1471 pte = vtopte(pa + KERNBASE);
1472 *pte = pa | PG_RW | PG_V;
1476 * if basemem != 640, map pages r/w into vm86 page table so
1477 * that the bios can scribble on it.
1480 for (i = basemem / 4; i < 160; i++)
1481 pte[i] = (i << PAGE_SHIFT) | PG_V | PG_RW | PG_U;
1485 * map page 1 R/W into the kernel page table so we can use it
1486 * as a buffer. The kernel will unmap this page later.
1488 pte = vtopte(KERNBASE + (1 << PAGE_SHIFT));
1489 *pte = (1 << PAGE_SHIFT) | PG_RW | PG_V;
1492 * get memory map with INT 15:E820
1494 #define SMAPSIZ sizeof(*smap)
1495 #define SMAP_SIG 0x534D4150 /* 'SMAP' */
1498 smap = (void *)vm86_addpage(&vmc, 1, KERNBASE + (1 << PAGE_SHIFT));
1499 vm86_getptr(&vmc, (vm_offset_t)smap, &vmf.vmf_es, &vmf.vmf_di);
1504 vmf.vmf_eax = 0xE820;
1505 vmf.vmf_edx = SMAP_SIG;
1506 vmf.vmf_ecx = SMAPSIZ;
1507 i = vm86_datacall(0x15, &vmf, &vmc);
1508 if (i || vmf.vmf_eax != SMAP_SIG)
1510 if (boothowto & RB_VERBOSE)
1511 kprintf("SMAP type=%02x base=%08x %08x len=%08x %08x\n",
1513 *(u_int32_t *)((char *)&smap->base + 4),
1514 (u_int32_t)smap->base,
1515 *(u_int32_t *)((char *)&smap->length + 4),
1516 (u_int32_t)smap->length);
1518 if (smap->type != 0x01)
1521 if (smap->length == 0)
1524 Realmem += smap->length;
1526 if (smap->base >= 0xffffffffLLU) {
1527 kprintf("%ju MB of memory above 4GB ignored\n",
1528 (uintmax_t)(smap->length / 1024 / 1024));
1532 for (i = 0; i <= physmap_idx; i += 2) {
1533 if (smap->base < physmap[i + 1]) {
1534 if (boothowto & RB_VERBOSE) {
1535 kprintf("Overlapping or non-montonic "
1536 "memory region, ignoring "
1539 Realmem -= smap->length;
1544 if (smap->base == physmap[physmap_idx + 1]) {
1545 physmap[physmap_idx + 1] += smap->length;
1550 if (physmap_idx == PHYSMAP_ENTRIES*2) {
1551 kprintf("Too many segments in the physical "
1552 "address map, giving up\n");
1555 physmap[physmap_idx] = smap->base;
1556 physmap[physmap_idx + 1] = smap->base + smap->length;
1558 ; /* fix GCC3.x warning */
1559 } while (vmf.vmf_ebx != 0);
1562 * Perform "base memory" related probes & setup based on SMAP
1565 for (i = 0; i <= physmap_idx; i += 2) {
1566 if (physmap[i] == 0x00000000) {
1567 basemem = physmap[i + 1] / 1024;
1576 if (basemem > 640) {
1577 kprintf("Preposterous BIOS basemem of %uK, "
1578 "truncating to 640K\n", basemem);
1582 for (pa = trunc_page(basemem * 1024);
1583 pa < ISA_HOLE_START; pa += PAGE_SIZE) {
1584 pte = vtopte(pa + KERNBASE);
1585 *pte = pa | PG_RW | PG_V;
1589 for (i = basemem / 4; i < 160; i++)
1590 pte[i] = (i << PAGE_SHIFT) | PG_V | PG_RW | PG_U;
1593 if (physmap[1] != 0)
1597 * If we failed above, try memory map with INT 15:E801
1599 vmf.vmf_ax = 0xE801;
1600 if (vm86_intcall(0x15, &vmf) == 0) {
1601 extmem = vmf.vmf_cx + vmf.vmf_dx * 64;
1605 vm86_intcall(0x15, &vmf);
1606 extmem = vmf.vmf_ax;
1609 * Prefer the RTC value for extended memory.
1611 extmem = rtcin(RTC_EXTLO) + (rtcin(RTC_EXTHI) << 8);
1616 * Special hack for chipsets that still remap the 384k hole when
1617 * there's 16MB of memory - this really confuses people that
1618 * are trying to use bus mastering ISA controllers with the
1619 * "16MB limit"; they only have 16MB, but the remapping puts
1620 * them beyond the limit.
1622 * If extended memory is between 15-16MB (16-17MB phys address range),
1625 if ((extmem > 15 * 1024) && (extmem < 16 * 1024))
1629 physmap[1] = basemem * 1024;
1631 physmap[physmap_idx] = 0x100000;
1632 physmap[physmap_idx + 1] = physmap[physmap_idx] + extmem * 1024;
1636 * Now, physmap contains a map of physical memory.
1640 /* make hole for AP bootstrap code YYY */
1641 physmap[1] = mp_bootaddress(physmap[1]);
1643 /* Save EBDA address, if any */
1644 ebda_addr = (u_long)(*(u_short *)(KERNBASE + 0x40e));
1649 * Maxmem isn't the "maximum memory", it's one larger than the
1650 * highest page of the physical address space. It should be
1651 * called something like "Maxphyspage". We may adjust this
1652 * based on ``hw.physmem'' and the results of the memory test.
1654 Maxmem = atop(physmap[physmap_idx + 1]);
1657 Maxmem = MAXMEM / 4;
1660 if (kgetenv_quad("hw.physmem", &maxmem))
1661 Maxmem = atop(maxmem);
1663 if (atop(physmap[physmap_idx + 1]) != Maxmem &&
1664 (boothowto & RB_VERBOSE))
1665 kprintf("Physical memory use set to %lluK\n", Maxmem * 4);
1668 * If Maxmem has been increased beyond what the system has detected,
1669 * extend the last memory segment to the new limit.
1671 if (atop(physmap[physmap_idx + 1]) < Maxmem)
1672 physmap[physmap_idx + 1] = ptoa(Maxmem);
1674 /* call pmap initialization to make new kernel address space */
1675 pmap_bootstrap(first, 0);
1678 * Size up each available chunk of physical memory.
1680 physmap[0] = PAGE_SIZE; /* mask off page 0 */
1683 phys_avail[pa_indx++] = physmap[0];
1684 phys_avail[pa_indx] = physmap[0];
1685 dump_avail[da_indx] = physmap[0];
1690 * Get dcons buffer address
1692 if (kgetenv_quad("dcons.addr", &dcons_addr) == 0 ||
1693 kgetenv_quad("dcons.size", &dcons_size) == 0)
1697 * physmap is in bytes, so when converting to page boundaries,
1698 * round up the start address and round down the end address.
1700 for (i = 0; i <= physmap_idx; i += 2) {
1704 if (physmap[i + 1] < end)
1705 end = trunc_page(physmap[i + 1]);
1706 for (pa = round_page(physmap[i]); pa < end; pa += PAGE_SIZE) {
1707 int tmp, page_bad, full;
1711 int *ptr = (int *)CADDR1;
1716 * block out kernel memory as not available.
1718 if (pa >= 0x100000 && pa < first)
1722 * block out dcons buffer
1725 && pa >= trunc_page(dcons_addr)
1726 && pa < dcons_addr + dcons_size)
1732 * map page into kernel: valid, read/write,non-cacheable
1734 *pte = pa | PG_V | PG_RW | PG_N;
1739 * Test for alternating 1's and 0's
1741 *(volatile int *)ptr = 0xaaaaaaaa;
1742 if (*(volatile int *)ptr != 0xaaaaaaaa) {
1746 * Test for alternating 0's and 1's
1748 *(volatile int *)ptr = 0x55555555;
1749 if (*(volatile int *)ptr != 0x55555555) {
1755 *(volatile int *)ptr = 0xffffffff;
1756 if (*(volatile int *)ptr != 0xffffffff) {
1762 *(volatile int *)ptr = 0x0;
1763 if (*(volatile int *)ptr != 0x0) {
1767 * Restore original value.
1772 * Adjust array of valid/good pages.
1774 if (page_bad == TRUE) {
1778 * If this good page is a continuation of the
1779 * previous set of good pages, then just increase
1780 * the end pointer. Otherwise start a new chunk.
1781 * Note that "end" points one higher than end,
1782 * making the range >= start and < end.
1783 * If we're also doing a speculative memory
1784 * test and we at or past the end, bump up Maxmem
1785 * so that we keep going. The first bad page
1786 * will terminate the loop.
1788 if (phys_avail[pa_indx] == pa) {
1789 phys_avail[pa_indx] += PAGE_SIZE;
1792 if (pa_indx >= PHYSMAP_ENTRIES*2) {
1793 kprintf("Too many holes in the physical address space, giving up\n");
1798 phys_avail[pa_indx++] = pa; /* start */
1799 phys_avail[pa_indx] = pa + PAGE_SIZE; /* end */
1803 if (dump_avail[da_indx] == pa) {
1804 dump_avail[da_indx] += PAGE_SIZE;
1807 if (da_indx >= PHYSMAP_ENTRIES*2) {
1811 dump_avail[da_indx++] = pa; /* start */
1812 dump_avail[da_indx] = pa + PAGE_SIZE; /* end */
1825 * The last chunk must contain at least one page plus the message
1826 * buffer to avoid complicating other code (message buffer address
1827 * calculation, etc.).
1829 while (phys_avail[pa_indx - 1] + PAGE_SIZE +
1830 round_page(MSGBUF_SIZE) >= phys_avail[pa_indx]) {
1831 physmem -= atop(phys_avail[pa_indx] - phys_avail[pa_indx - 1]);
1832 phys_avail[pa_indx--] = 0;
1833 phys_avail[pa_indx--] = 0;
1836 Maxmem = atop(phys_avail[pa_indx]);
1838 /* Trim off space for the message buffer. */
1839 phys_avail[pa_indx] -= round_page(MSGBUF_SIZE);
1841 avail_end = phys_avail[pa_indx];
1853 * 7 Device Not Available (x87)
1855 * 9 Coprocessor Segment overrun (unsupported, reserved)
1857 * 11 Segment not present
1859 * 13 General Protection
1862 * 16 x87 FP Exception pending
1863 * 17 Alignment Check
1865 * 19 SIMD floating point
1867 * 32-255 INTn/external sources
1872 struct gate_descriptor *gdp;
1873 int gsel_tss, metadata_missing, off, x;
1874 struct mdglobaldata *gd;
1877 * Prevent lowering of the ipl if we call tsleep() early.
1879 gd = &CPU_prvspace[0].mdglobaldata;
1880 bzero(gd, sizeof(*gd));
1882 gd->mi.gd_curthread = &thread0;
1883 thread0.td_gd = &gd->mi;
1885 atdevbase = ISA_HOLE_START + KERNBASE;
1887 metadata_missing = 0;
1888 if (bootinfo.bi_modulep) {
1889 preload_metadata = (caddr_t)bootinfo.bi_modulep + KERNBASE;
1890 preload_bootstrap_relocate(KERNBASE);
1892 metadata_missing = 1;
1894 if (bootinfo.bi_envp)
1895 kern_envp = (caddr_t)bootinfo.bi_envp + KERNBASE;
1898 * start with one cpu. Note: with one cpu, ncpus2_shift, ncpus2_mask,
1899 * and ncpus_fit_mask remain 0.
1904 /* Init basic tunables, hz etc */
1908 * make gdt memory segments, the code segment goes up to end of the
1909 * page with etext in it, the data segment goes to the end of
1913 * XXX text protection is temporarily (?) disabled. The limit was
1914 * i386_btop(round_page(etext)) - 1.
1916 gdt_segs[GCODE_SEL].ssd_limit = atop(0 - 1);
1917 gdt_segs[GDATA_SEL].ssd_limit = atop(0 - 1);
1919 gdt_segs[GPRIV_SEL].ssd_limit =
1920 atop(sizeof(struct privatespace) - 1);
1921 gdt_segs[GPRIV_SEL].ssd_base = (int) &CPU_prvspace[0];
1922 gdt_segs[GPROC0_SEL].ssd_base =
1923 (int) &CPU_prvspace[0].mdglobaldata.gd_common_tss;
1925 gd->mi.gd_prvspace = &CPU_prvspace[0];
1928 * Note: on both UP and SMP curthread must be set non-NULL
1929 * early in the boot sequence because the system assumes
1930 * that 'curthread' is never NULL.
1933 for (x = 0; x < NGDT; x++) {
1935 /* avoid overwriting db entries with APM ones */
1936 if (x >= GAPMCODE32_SEL && x <= GAPMDATA_SEL)
1939 ssdtosd(&gdt_segs[x], &gdt[x].sd);
1942 r_gdt.rd_limit = NGDT * sizeof(gdt[0]) - 1;
1943 r_gdt.rd_base = (int) gdt;
1946 mi_gdinit(&gd->mi, 0);
1948 mi_proc0init(&gd->mi, proc0paddr);
1949 safepri = TDPRI_MAX;
1951 /* make ldt memory segments */
1953 * XXX - VM_MAX_USER_ADDRESS is an end address, not a max. And it
1954 * should be spelled ...MAX_USER...
1956 ldt_segs[LUCODE_SEL].ssd_limit = atop(VM_MAX_USER_ADDRESS - 1);
1957 ldt_segs[LUDATA_SEL].ssd_limit = atop(VM_MAX_USER_ADDRESS - 1);
1958 for (x = 0; x < sizeof ldt_segs / sizeof ldt_segs[0]; x++)
1959 ssdtosd(&ldt_segs[x], &ldt[x].sd);
1961 _default_ldt = GSEL(GLDT_SEL, SEL_KPL);
1963 gd->gd_currentldt = _default_ldt;
1964 /* spinlocks and the BGL */
1968 * Setup the hardware exception table. Most exceptions use
1969 * SDT_SYS386TGT, known as a 'trap gate'. Trap gates leave
1970 * interrupts enabled. VM page faults use SDT_SYS386IGT, known as
1971 * an 'interrupt trap gate', which disables interrupts on entry,
1972 * in order to be able to poll the appropriate CRn register to
1973 * determine the fault address.
1975 for (x = 0; x < NIDT; x++) {
1976 #ifdef DEBUG_INTERRUPTS
1977 setidt(x, Xrsvdary[x], SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL));
1979 setidt(x, &IDTVEC(rsvd0), SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL));
1982 setidt(0, &IDTVEC(div), SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL));
1983 setidt(1, &IDTVEC(dbg), SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL));
1984 setidt(2, &IDTVEC(nmi), SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL));
1985 setidt(3, &IDTVEC(bpt), SDT_SYS386TGT, SEL_UPL, GSEL(GCODE_SEL, SEL_KPL));
1986 setidt(4, &IDTVEC(ofl), SDT_SYS386TGT, SEL_UPL, GSEL(GCODE_SEL, SEL_KPL));
1987 setidt(5, &IDTVEC(bnd), SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL));
1988 setidt(6, &IDTVEC(ill), SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL));
1989 setidt(7, &IDTVEC(dna), SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL));
1990 setidt(8, 0, SDT_SYSTASKGT, SEL_KPL, GSEL(GPANIC_SEL, SEL_KPL));
1991 setidt(9, &IDTVEC(fpusegm), SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL));
1992 setidt(10, &IDTVEC(tss), SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL));
1993 setidt(11, &IDTVEC(missing), SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL));
1994 setidt(12, &IDTVEC(stk), SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL));
1995 setidt(13, &IDTVEC(prot), SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL));
1996 setidt(14, &IDTVEC(page), SDT_SYS386IGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL));
1997 setidt(15, &IDTVEC(rsvd0), SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL));
1998 setidt(16, &IDTVEC(fpu), SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL));
1999 setidt(17, &IDTVEC(align), SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL));
2000 setidt(18, &IDTVEC(mchk), SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL));
2001 setidt(19, &IDTVEC(xmm), SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL));
2002 setidt(0x80, &IDTVEC(int0x80_syscall),
2003 SDT_SYS386TGT, SEL_UPL, GSEL(GCODE_SEL, SEL_KPL));
2005 r_idt.rd_limit = sizeof(idt0) - 1;
2006 r_idt.rd_base = (int) idt;
2010 * Initialize the console before we print anything out.
2014 if (metadata_missing)
2015 kprintf("WARNING: loader(8) metadata is missing!\n");
2024 if (boothowto & RB_KDB)
2025 Debugger("Boot flags requested debugger");
2028 finishidentcpu(); /* Final stage of CPU initialization */
2029 setidt(6, &IDTVEC(ill), SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL));
2030 setidt(13, &IDTVEC(prot), SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL));
2031 initializecpu(); /* Initialize CPU registers */
2034 * make an initial tss so cpu can get interrupt stack on syscall!
2035 * The 16 bytes is to save room for a VM86 context.
2037 gd->gd_common_tss.tss_esp0 = (int) thread0.td_pcb - 16;
2038 gd->gd_common_tss.tss_ss0 = GSEL(GDATA_SEL, SEL_KPL) ;
2039 gsel_tss = GSEL(GPROC0_SEL, SEL_KPL);
2040 gd->gd_tss_gdt = &gdt[GPROC0_SEL].sd;
2041 gd->gd_common_tssd = *gd->gd_tss_gdt;
2042 gd->gd_common_tss.tss_ioopt = (sizeof gd->gd_common_tss) << 16;
2045 dblfault_tss.tss_esp = dblfault_tss.tss_esp0 = dblfault_tss.tss_esp1 =
2046 dblfault_tss.tss_esp2 = (int) &dblfault_stack[sizeof(dblfault_stack)];
2047 dblfault_tss.tss_ss = dblfault_tss.tss_ss0 = dblfault_tss.tss_ss1 =
2048 dblfault_tss.tss_ss2 = GSEL(GDATA_SEL, SEL_KPL);
2049 dblfault_tss.tss_cr3 = (int)IdlePTD;
2050 dblfault_tss.tss_eip = (int) dblfault_handler;
2051 dblfault_tss.tss_eflags = PSL_KERNEL;
2052 dblfault_tss.tss_ds = dblfault_tss.tss_es =
2053 dblfault_tss.tss_gs = GSEL(GDATA_SEL, SEL_KPL);
2054 dblfault_tss.tss_fs = GSEL(GPRIV_SEL, SEL_KPL);
2055 dblfault_tss.tss_cs = GSEL(GCODE_SEL, SEL_KPL);
2056 dblfault_tss.tss_ldt = GSEL(GLDT_SEL, SEL_KPL);
2060 init_param2(physmem);
2062 /* now running on new page tables, configured,and u/iom is accessible */
2064 /* Map the message buffer. */
2065 for (off = 0; off < round_page(MSGBUF_SIZE); off += PAGE_SIZE)
2066 pmap_kenter((vm_offset_t)msgbufp + off, avail_end + off);
2068 msgbufinit(msgbufp, MSGBUF_SIZE);
2070 /* make a call gate to reenter kernel with */
2071 gdp = &ldt[LSYS5CALLS_SEL].gd;
2073 x = (int) &IDTVEC(syscall);
2074 gdp->gd_looffset = x++;
2075 gdp->gd_selector = GSEL(GCODE_SEL,SEL_KPL);
2077 gdp->gd_type = SDT_SYS386CGT;
2078 gdp->gd_dpl = SEL_UPL;
2080 gdp->gd_hioffset = ((int) &IDTVEC(syscall)) >>16;
2082 /* XXX does this work? */
2083 ldt[LBSDICALLS_SEL] = ldt[LSYS5CALLS_SEL];
2084 ldt[LSOL26CALLS_SEL] = ldt[LSYS5CALLS_SEL];
2086 /* transfer to user mode */
2088 _ucodesel = LSEL(LUCODE_SEL, SEL_UPL);
2089 _udatasel = LSEL(LUDATA_SEL, SEL_UPL);
2091 /* setup proc 0's pcb */
2092 thread0.td_pcb->pcb_flags = 0;
2093 thread0.td_pcb->pcb_cr3 = (int)IdlePTD; /* should already be setup */
2094 thread0.td_pcb->pcb_ext = 0;
2095 lwp0.lwp_md.md_regs = &proc0_tf;
2099 * Initialize machine-dependant portions of the global data structure.
2100 * Note that the global data area and cpu0's idlestack in the private
2101 * data space were allocated in locore.
2103 * Note: the idlethread's cpl is 0
2105 * WARNING! Called from early boot, 'mycpu' may not work yet.
2108 cpu_gdinit(struct mdglobaldata *gd, int cpu)
2111 gd->mi.gd_curthread = &gd->mi.gd_idlethread;
2113 lwkt_init_thread(&gd->mi.gd_idlethread,
2114 gd->mi.gd_prvspace->idlestack,
2115 sizeof(gd->mi.gd_prvspace->idlestack),
2117 lwkt_set_comm(&gd->mi.gd_idlethread, "idle_%d", cpu);
2118 gd->mi.gd_idlethread.td_switch = cpu_lwkt_switch;
2119 gd->mi.gd_idlethread.td_sp -= sizeof(void *);
2120 *(void **)gd->mi.gd_idlethread.td_sp = cpu_idle_restore;
2124 is_globaldata_space(vm_offset_t saddr, vm_offset_t eaddr)
2126 if (saddr >= (vm_offset_t)&CPU_prvspace[0] &&
2127 eaddr <= (vm_offset_t)&CPU_prvspace[MAXCPU]) {
2134 globaldata_find(int cpu)
2136 KKASSERT(cpu >= 0 && cpu < ncpus);
2137 return(&CPU_prvspace[cpu].mdglobaldata.mi);
2140 #if defined(I586_CPU) && !defined(NO_F00F_HACK)
2141 static void f00f_hack(void *unused);
2142 SYSINIT(f00f_hack, SI_BOOT2_BIOS, SI_ORDER_ANY, f00f_hack, NULL);
2145 f00f_hack(void *unused)
2147 struct gate_descriptor *new_idt;
2153 kprintf("Intel Pentium detected, installing workaround for F00F bug\n");
2155 r_idt.rd_limit = sizeof(idt0) - 1;
2157 tmp = kmem_alloc(&kernel_map, PAGE_SIZE * 2);
2159 panic("kmem_alloc returned 0");
2160 if (((unsigned int)tmp & (PAGE_SIZE-1)) != 0)
2161 panic("kmem_alloc returned non-page-aligned memory");
2162 /* Put the first seven entries in the lower page */
2163 new_idt = (struct gate_descriptor*)(tmp + PAGE_SIZE - (7*8));
2164 bcopy(idt, new_idt, sizeof(idt0));
2165 r_idt.rd_base = (int)new_idt;
2168 if (vm_map_protect(&kernel_map, tmp, tmp + PAGE_SIZE,
2169 VM_PROT_READ, FALSE) != KERN_SUCCESS)
2170 panic("vm_map_protect failed");
2173 #endif /* defined(I586_CPU) && !NO_F00F_HACK */
2176 ptrace_set_pc(struct lwp *lp, unsigned long addr)
2178 lp->lwp_md.md_regs->tf_eip = addr;
2183 ptrace_single_step(struct lwp *lp)
2185 lp->lwp_md.md_regs->tf_eflags |= PSL_T;
2190 fill_regs(struct lwp *lp, struct reg *regs)
2192 struct trapframe *tp;
2194 tp = lp->lwp_md.md_regs;
2195 regs->r_gs = tp->tf_gs;
2196 regs->r_fs = tp->tf_fs;
2197 regs->r_es = tp->tf_es;
2198 regs->r_ds = tp->tf_ds;
2199 regs->r_edi = tp->tf_edi;
2200 regs->r_esi = tp->tf_esi;
2201 regs->r_ebp = tp->tf_ebp;
2202 regs->r_ebx = tp->tf_ebx;
2203 regs->r_edx = tp->tf_edx;
2204 regs->r_ecx = tp->tf_ecx;
2205 regs->r_eax = tp->tf_eax;
2206 regs->r_eip = tp->tf_eip;
2207 regs->r_cs = tp->tf_cs;
2208 regs->r_eflags = tp->tf_eflags;
2209 regs->r_esp = tp->tf_esp;
2210 regs->r_ss = tp->tf_ss;
2215 set_regs(struct lwp *lp, struct reg *regs)
2217 struct trapframe *tp;
2219 tp = lp->lwp_md.md_regs;
2220 if (!EFL_SECURE(regs->r_eflags, tp->tf_eflags) ||
2221 !CS_SECURE(regs->r_cs))
2223 tp->tf_gs = regs->r_gs;
2224 tp->tf_fs = regs->r_fs;
2225 tp->tf_es = regs->r_es;
2226 tp->tf_ds = regs->r_ds;
2227 tp->tf_edi = regs->r_edi;
2228 tp->tf_esi = regs->r_esi;
2229 tp->tf_ebp = regs->r_ebp;
2230 tp->tf_ebx = regs->r_ebx;
2231 tp->tf_edx = regs->r_edx;
2232 tp->tf_ecx = regs->r_ecx;
2233 tp->tf_eax = regs->r_eax;
2234 tp->tf_eip = regs->r_eip;
2235 tp->tf_cs = regs->r_cs;
2236 tp->tf_eflags = regs->r_eflags;
2237 tp->tf_esp = regs->r_esp;
2238 tp->tf_ss = regs->r_ss;
2242 #ifndef CPU_DISABLE_SSE
2244 fill_fpregs_xmm(struct savexmm *sv_xmm, struct save87 *sv_87)
2246 struct env87 *penv_87 = &sv_87->sv_env;
2247 struct envxmm *penv_xmm = &sv_xmm->sv_env;
2250 /* FPU control/status */
2251 penv_87->en_cw = penv_xmm->en_cw;
2252 penv_87->en_sw = penv_xmm->en_sw;
2253 penv_87->en_tw = penv_xmm->en_tw;
2254 penv_87->en_fip = penv_xmm->en_fip;
2255 penv_87->en_fcs = penv_xmm->en_fcs;
2256 penv_87->en_opcode = penv_xmm->en_opcode;
2257 penv_87->en_foo = penv_xmm->en_foo;
2258 penv_87->en_fos = penv_xmm->en_fos;
2261 for (i = 0; i < 8; ++i)
2262 sv_87->sv_ac[i] = sv_xmm->sv_fp[i].fp_acc;
2264 sv_87->sv_ex_sw = sv_xmm->sv_ex_sw;
2268 set_fpregs_xmm(struct save87 *sv_87, struct savexmm *sv_xmm)
2270 struct env87 *penv_87 = &sv_87->sv_env;
2271 struct envxmm *penv_xmm = &sv_xmm->sv_env;
2274 /* FPU control/status */
2275 penv_xmm->en_cw = penv_87->en_cw;
2276 penv_xmm->en_sw = penv_87->en_sw;
2277 penv_xmm->en_tw = penv_87->en_tw;
2278 penv_xmm->en_fip = penv_87->en_fip;
2279 penv_xmm->en_fcs = penv_87->en_fcs;
2280 penv_xmm->en_opcode = penv_87->en_opcode;
2281 penv_xmm->en_foo = penv_87->en_foo;
2282 penv_xmm->en_fos = penv_87->en_fos;
2285 for (i = 0; i < 8; ++i)
2286 sv_xmm->sv_fp[i].fp_acc = sv_87->sv_ac[i];
2288 sv_xmm->sv_ex_sw = sv_87->sv_ex_sw;
2290 #endif /* CPU_DISABLE_SSE */
2293 fill_fpregs(struct lwp *lp, struct fpreg *fpregs)
2295 #ifndef CPU_DISABLE_SSE
2297 fill_fpregs_xmm(&lp->lwp_thread->td_pcb->pcb_save.sv_xmm,
2298 (struct save87 *)fpregs);
2301 #endif /* CPU_DISABLE_SSE */
2302 bcopy(&lp->lwp_thread->td_pcb->pcb_save.sv_87, fpregs, sizeof *fpregs);
2307 set_fpregs(struct lwp *lp, struct fpreg *fpregs)
2309 #ifndef CPU_DISABLE_SSE
2311 set_fpregs_xmm((struct save87 *)fpregs,
2312 &lp->lwp_thread->td_pcb->pcb_save.sv_xmm);
2315 #endif /* CPU_DISABLE_SSE */
2316 bcopy(fpregs, &lp->lwp_thread->td_pcb->pcb_save.sv_87, sizeof *fpregs);
2321 fill_dbregs(struct lwp *lp, struct dbreg *dbregs)
2324 dbregs->dr0 = rdr0();
2325 dbregs->dr1 = rdr1();
2326 dbregs->dr2 = rdr2();
2327 dbregs->dr3 = rdr3();
2328 dbregs->dr4 = rdr4();
2329 dbregs->dr5 = rdr5();
2330 dbregs->dr6 = rdr6();
2331 dbregs->dr7 = rdr7();
2335 pcb = lp->lwp_thread->td_pcb;
2336 dbregs->dr0 = pcb->pcb_dr0;
2337 dbregs->dr1 = pcb->pcb_dr1;
2338 dbregs->dr2 = pcb->pcb_dr2;
2339 dbregs->dr3 = pcb->pcb_dr3;
2342 dbregs->dr6 = pcb->pcb_dr6;
2343 dbregs->dr7 = pcb->pcb_dr7;
2349 set_dbregs(struct lwp *lp, struct dbreg *dbregs)
2352 load_dr0(dbregs->dr0);
2353 load_dr1(dbregs->dr1);
2354 load_dr2(dbregs->dr2);
2355 load_dr3(dbregs->dr3);
2356 load_dr4(dbregs->dr4);
2357 load_dr5(dbregs->dr5);
2358 load_dr6(dbregs->dr6);
2359 load_dr7(dbregs->dr7);
2362 struct ucred *ucred;
2364 uint32_t mask1, mask2;
2367 * Don't let an illegal value for dr7 get set. Specifically,
2368 * check for undefined settings. Setting these bit patterns
2369 * result in undefined behaviour and can lead to an unexpected
2372 for (i = 0, mask1 = 0x3<<16, mask2 = 0x2<<16; i < 8;
2373 i++, mask1 <<= 2, mask2 <<= 2)
2374 if ((dbregs->dr7 & mask1) == mask2)
2377 pcb = lp->lwp_thread->td_pcb;
2378 ucred = lp->lwp_proc->p_ucred;
2381 * Don't let a process set a breakpoint that is not within the
2382 * process's address space. If a process could do this, it
2383 * could halt the system by setting a breakpoint in the kernel
2384 * (if ddb was enabled). Thus, we need to check to make sure
2385 * that no breakpoints are being enabled for addresses outside
2386 * process's address space, unless, perhaps, we were called by
2389 * XXX - what about when the watched area of the user's
2390 * address space is written into from within the kernel
2391 * ... wouldn't that still cause a breakpoint to be generated
2392 * from within kernel mode?
2395 if (priv_check_cred(ucred, PRIV_ROOT, 0) != 0) {
2396 if (dbregs->dr7 & 0x3) {
2397 /* dr0 is enabled */
2398 if (dbregs->dr0 >= VM_MAX_USER_ADDRESS)
2402 if (dbregs->dr7 & (0x3<<2)) {
2403 /* dr1 is enabled */
2404 if (dbregs->dr1 >= VM_MAX_USER_ADDRESS)
2408 if (dbregs->dr7 & (0x3<<4)) {
2409 /* dr2 is enabled */
2410 if (dbregs->dr2 >= VM_MAX_USER_ADDRESS)
2414 if (dbregs->dr7 & (0x3<<6)) {
2415 /* dr3 is enabled */
2416 if (dbregs->dr3 >= VM_MAX_USER_ADDRESS)
2421 pcb->pcb_dr0 = dbregs->dr0;
2422 pcb->pcb_dr1 = dbregs->dr1;
2423 pcb->pcb_dr2 = dbregs->dr2;
2424 pcb->pcb_dr3 = dbregs->dr3;
2425 pcb->pcb_dr6 = dbregs->dr6;
2426 pcb->pcb_dr7 = dbregs->dr7;
2428 pcb->pcb_flags |= PCB_DBREGS;
2435 * Return > 0 if a hardware breakpoint has been hit, and the
2436 * breakpoint was in user space. Return 0, otherwise.
2439 user_dbreg_trap(void)
2441 u_int32_t dr7, dr6; /* debug registers dr6 and dr7 */
2442 u_int32_t bp; /* breakpoint bits extracted from dr6 */
2443 int nbp; /* number of breakpoints that triggered */
2444 caddr_t addr[4]; /* breakpoint addresses */
2448 if ((dr7 & 0x000000ff) == 0) {
2450 * all GE and LE bits in the dr7 register are zero,
2451 * thus the trap couldn't have been caused by the
2452 * hardware debug registers
2459 bp = dr6 & 0x0000000f;
2463 * None of the breakpoint bits are set meaning this
2464 * trap was not caused by any of the debug registers
2470 * at least one of the breakpoints were hit, check to see
2471 * which ones and if any of them are user space addresses
2475 addr[nbp++] = (caddr_t)rdr0();
2478 addr[nbp++] = (caddr_t)rdr1();
2481 addr[nbp++] = (caddr_t)rdr2();
2484 addr[nbp++] = (caddr_t)rdr3();
2487 for (i=0; i<nbp; i++) {
2489 (caddr_t)VM_MAX_USER_ADDRESS) {
2491 * addr[i] is in user space
2498 * None of the breakpoints are in user space.
2506 Debugger(const char *msg)
2508 kprintf("Debugger(\"%s\") called.\n", msg);
2515 * Provide inb() and outb() as functions. They are normally only
2516 * available as macros calling inlined functions, thus cannot be
2517 * called inside DDB.
2519 * The actual code is stolen from <machine/cpufunc.h>, and de-inlined.
2525 /* silence compiler warnings */
2527 void outb(u_int, u_char);
2534 * We use %%dx and not %1 here because i/o is done at %dx and not at
2535 * %edx, while gcc generates inferior code (movw instead of movl)
2536 * if we tell it to load (u_short) port.
2538 __asm __volatile("inb %%dx,%0" : "=a" (data) : "d" (port));
2543 outb(u_int port, u_char data)
2547 * Use an unnecessary assignment to help gcc's register allocator.
2548 * This make a large difference for gcc-1.40 and a tiny difference
2549 * for gcc-2.6.0. For gcc-1.40, al had to be ``asm("ax")'' for
2550 * best results. gcc-2.6.0 can't handle this.
2553 __asm __volatile("outb %0,%%dx" : : "a" (al), "d" (port));
2560 #include "opt_cpu.h"
2564 * initialize all the SMP locks
2567 /* critical region when masking or unmasking interupts */
2568 struct spinlock_deprecated imen_spinlock;
2570 /* critical region for old style disable_intr/enable_intr */
2571 struct spinlock_deprecated mpintr_spinlock;
2573 /* critical region around INTR() routines */
2574 struct spinlock_deprecated intr_spinlock;
2576 /* lock region used by kernel profiling */
2577 struct spinlock_deprecated mcount_spinlock;
2579 /* locks com (tty) data/hardware accesses: a FASTINTR() */
2580 struct spinlock_deprecated com_spinlock;
2582 /* lock regions around the clock hardware */
2583 struct spinlock_deprecated clock_spinlock;
2585 /* lock around the MP rendezvous */
2586 struct spinlock_deprecated smp_rv_spinlock;
2592 * mp_lock = 0; BSP already owns the MP lock
2595 * Get the initial mp_lock with a count of 1 for the BSP.
2596 * This uses a LOGICAL cpu ID, ie BSP == 0.
2599 cpu_get_initial_mplock();
2602 spin_lock_init(&mcount_spinlock);
2603 spin_lock_init(&intr_spinlock);
2604 spin_lock_init(&mpintr_spinlock);
2605 spin_lock_init(&imen_spinlock);
2606 spin_lock_init(&smp_rv_spinlock);
2607 spin_lock_init(&com_spinlock);
2608 spin_lock_init(&clock_spinlock);
2610 /* our token pool needs to work early */
2611 lwkt_token_pool_init();