sys/bus/usb/ehci.c

   1 /*      $NetBSD: ehci.c,v 1.91 2005/02/27 00:27:51 perry Exp $ */
   2 /*      $FreeBSD: src/sys/dev/usb/ehci.c,v 1.36.2.3 2006/09/24 13:39:04 iedowse Exp $   */
   3 /*      $DragonFly: src/sys/bus/usb/ehci.c,v 1.36 2008/08/14 20:55:53 hasso Exp $       */
   4
   5 /*
   6  * Copyright (c) 2004 The NetBSD Foundation, Inc.
   7  * All rights reserved.
   8  *
   9  * This code is derived from software contributed to The NetBSD Foundation
  10  * by Lennart Augustsson (lennart@augustsson.net) and by Charles M. Hannum.
  11  *
  12  * Redistribution and use in source and binary forms, with or without
  13  * modification, are permitted provided that the following conditions
  14  * are met:
  15  * 1. Redistributions of source code must retain the above copyright
  16  *    notice, this list of conditions and the following disclaimer.
  17  * 2. Redistributions in binary form must reproduce the above copyright
  18  *    notice, this list of conditions and the following disclaimer in the
  19  *    documentation and/or other materials provided with the distribution.
  20  * 3. All advertising materials mentioning features or use of this software
  21  *    must display the following acknowledgement:
  22  *        This product includes software developed by the NetBSD
  23  *        Foundation, Inc. and its contributors.
  24  * 4. Neither the name of The NetBSD Foundation nor the names of its
  25  *    contributors may be used to endorse or promote products derived
  26  *    from this software without specific prior written permission.
  27  *
  28  * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
  29  * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
  30  * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
  31  * PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
  32  * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
  33  * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
  34  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
  35  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
  36  * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
  37  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
  38  * POSSIBILITY OF SUCH DAMAGE.
  39  */
  40
  41 /*
  42  * USB Enhanced Host Controller Driver, a.k.a. USB 2.0 controller.
  43  *
  44  * The EHCI 1.0 spec can be found at
  45  * http://developer.intel.com/technology/usb/download/ehci-r10.pdf
  46  * and the USB 2.0 spec at
  47  * http://www.usb.org/developers/docs/usb_20.zip
  48  *
  49  */
  50
  51 /*
  52  * TODO:
  53  * 1) The EHCI driver lacks support for isochronous transfers, so
  54  *    devices using them don't work.
  55  *
  56  * 2) Interrupt transfer scheduling does not manage the time available
  57  *    in each frame, so it is possible for the transfers to overrun
  58  *    the end of the frame.
  59  *
  60  * 3) Command failures are not recovered correctly.
  61  */
  62
  63 #include <sys/param.h>
  64 #include <sys/systm.h>
  65 #include <sys/malloc.h>
  66 #include <sys/kernel.h>
  67 #include <sys/endian.h>
  68 #include <sys/module.h>
  69 #include <sys/bus.h>
  70 #include <sys/lock.h>
  71 #include <sys/proc.h>
  72 #include <sys/queue.h>
  73 #include <sys/sysctl.h>
  74 #include <sys/thread2.h>
  75
  76 #include <machine/cpu.h>
  77 #include <machine/endian.h>
  78
  79 #include <bus/usb/usb.h>
  80 #include <bus/usb/usbdi.h>
  81 #include <bus/usb/usbdivar.h>
  82 #include <bus/usb/usb_mem.h>
  83 #include <bus/usb/usb_quirks.h>
  84
  85 #include <bus/usb/ehcireg.h>
  86 #include <bus/usb/ehcivar.h>
  87
  88 #ifdef USB_DEBUG
  89 #define EHCI_DEBUG USB_DEBUG
  90 #define DPRINTF(x)      do { if (ehcidebug) kprintf x; } while (0)
  91 #define DPRINTFN(n,x)   do { if (ehcidebug>(n)) kprintf x; } while (0)
  92 int ehcidebug = 0;
  93 SYSCTL_NODE(_hw_usb, OID_AUTO, ehci, CTLFLAG_RW, 0, "USB ehci");
  94 SYSCTL_INT(_hw_usb_ehci, OID_AUTO, debug, CTLFLAG_RW,
  95            &ehcidebug, 0, "ehci debug level");
  96 #define bitmask_snprintf(q,f,b,l) ksnprintf((b), (l), "%b", (q), (f))
  97 #else
  98 #define DPRINTF(x)
  99 #define DPRINTFN(n,x)
 100 #endif
 101
 102 struct ehci_pipe {
 103         struct usbd_pipe pipe;
 104
 105         ehci_soft_qh_t *sqh;
 106         union {
 107                 ehci_soft_qtd_t *qtd;
 108                 /* ehci_soft_itd_t *itd; */
 109         } tail;
 110         union {
 111                 /* Control pipe */
 112                 struct {
 113                         usb_dma_t reqdma;
 114                         u_int length;
 115                         /*ehci_soft_qtd_t *setup, *data, *stat;*/
 116                 } ctl;
 117                 /* Interrupt pipe */
 118                 struct {
 119                         u_int length;
 120                 } intr;
 121                 /* Bulk pipe */
 122                 struct {
 123                         u_int length;
 124                 } bulk;
 125                 /* Iso pipe */
 126                 /* XXX */
 127         } u;
 128 };
 129
 130 static usbd_status      ehci_open(usbd_pipe_handle);
 131 static void             ehci_poll(struct usbd_bus *);
 132 static void             ehci_softintr(void *);
 133 static int              ehci_intr1(ehci_softc_t *);
 134 static void             ehci_waitintr(ehci_softc_t *, usbd_xfer_handle);
 135 static void             ehci_check_intr(ehci_softc_t *, struct ehci_xfer *);
 136 static void             ehci_idone(struct ehci_xfer *);
 137 static void             ehci_timeout(void *);
 138 static void             ehci_timeout_task(void *);
 139 static void             ehci_intrlist_timeout(void *);
 140
 141 static usbd_status      ehci_allocm(struct usbd_bus *, usb_dma_t *, u_int32_t);
 142 static void             ehci_freem(struct usbd_bus *, usb_dma_t *);
 143
 144 static usbd_xfer_handle ehci_allocx(struct usbd_bus *);
 145 static void             ehci_freex(struct usbd_bus *, usbd_xfer_handle);
 146
 147 static usbd_status      ehci_root_ctrl_transfer(usbd_xfer_handle);
 148 static usbd_status      ehci_root_ctrl_start(usbd_xfer_handle);
 149 static void             ehci_root_ctrl_abort(usbd_xfer_handle);
 150 static void             ehci_root_ctrl_close(usbd_pipe_handle);
 151 static void             ehci_root_ctrl_done(usbd_xfer_handle);
 152
 153 static usbd_status      ehci_root_intr_transfer(usbd_xfer_handle);
 154 static usbd_status      ehci_root_intr_start(usbd_xfer_handle);
 155 static void             ehci_root_intr_abort(usbd_xfer_handle);
 156 static void             ehci_root_intr_close(usbd_pipe_handle);
 157 static void             ehci_root_intr_done(usbd_xfer_handle);
 158
 159 static usbd_status      ehci_device_ctrl_transfer(usbd_xfer_handle);
 160 static usbd_status      ehci_device_ctrl_start(usbd_xfer_handle);
 161 static void             ehci_device_ctrl_abort(usbd_xfer_handle);
 162 static void             ehci_device_ctrl_close(usbd_pipe_handle);
 163 static void             ehci_device_ctrl_done(usbd_xfer_handle);
 164
 165 static usbd_status      ehci_device_bulk_transfer(usbd_xfer_handle);
 166 static usbd_status      ehci_device_bulk_start(usbd_xfer_handle);
 167 static void             ehci_device_bulk_abort(usbd_xfer_handle);
 168 static void             ehci_device_bulk_close(usbd_pipe_handle);
 169 static void             ehci_device_bulk_done(usbd_xfer_handle);
 170
 171 static usbd_status      ehci_device_intr_transfer(usbd_xfer_handle);
 172 static usbd_status      ehci_device_intr_start(usbd_xfer_handle);
 173 static void             ehci_device_intr_abort(usbd_xfer_handle);
 174 static void             ehci_device_intr_close(usbd_pipe_handle);
 175 static void             ehci_device_intr_done(usbd_xfer_handle);
 176
 177 static usbd_status      ehci_device_isoc_transfer(usbd_xfer_handle);
 178 static usbd_status      ehci_device_isoc_start(usbd_xfer_handle);
 179 static void             ehci_device_isoc_abort(usbd_xfer_handle);
 180 static void             ehci_device_isoc_close(usbd_pipe_handle);
 181 static void             ehci_device_isoc_done(usbd_xfer_handle);
 182
 183 static void             ehci_device_clear_toggle(usbd_pipe_handle pipe);
 184 static void             ehci_noop(usbd_pipe_handle pipe);
 185
 186 static int              ehci_str(usb_string_descriptor_t *, int, char *);
 187 static void             ehci_pcd(ehci_softc_t *, usbd_xfer_handle);
 188 static void             ehci_disown(ehci_softc_t *, int, int);
 189
 190 static ehci_soft_qh_t  *ehci_alloc_sqh(ehci_softc_t *);
 191 static void             ehci_free_sqh(ehci_softc_t *, ehci_soft_qh_t *);
 192
 193 static ehci_soft_qtd_t  *ehci_alloc_sqtd(ehci_softc_t *);
 194 static void             ehci_free_sqtd(ehci_softc_t *, ehci_soft_qtd_t *);
 195 static usbd_status      ehci_alloc_sqtd_chain(struct ehci_pipe *,
 196                             ehci_softc_t *, int, int, usbd_xfer_handle,
 197                             ehci_soft_qtd_t **, ehci_soft_qtd_t **);
 198 static void             ehci_free_sqtd_chain(ehci_softc_t *, ehci_soft_qtd_t *,
 199                                             ehci_soft_qtd_t *);
 200
 201 static usbd_status      ehci_device_request(usbd_xfer_handle xfer);
 202
 203 static usbd_status      ehci_device_setintr(ehci_softc_t *, ehci_soft_qh_t *,
 204                             int ival);
 205
 206 static void             ehci_add_qh(ehci_soft_qh_t *, ehci_soft_qh_t *);
 207 static void             ehci_rem_qh(ehci_softc_t *, ehci_soft_qh_t *,
 208                                     ehci_soft_qh_t *);
 209 static void             ehci_set_qh_qtd(ehci_soft_qh_t *, ehci_soft_qtd_t *);
 210 static void             ehci_sync_hc(ehci_softc_t *);
 211
 212 static void             ehci_close_pipe(usbd_pipe_handle, ehci_soft_qh_t *);
 213 static void             ehci_abort_xfer(usbd_xfer_handle, usbd_status);
 214
 215 #ifdef EHCI_DEBUG
 216 static void             ehci_dump_regs(ehci_softc_t *);
 217 void                    ehci_dump(void);
 218 static ehci_softc_t     *theehci;
 219 static void             ehci_dump_link(ehci_link_t, int);
 220 static void             ehci_dump_sqtds(ehci_soft_qtd_t *);
 221 static void             ehci_dump_sqtd(ehci_soft_qtd_t *);
 222 static void             ehci_dump_qtd(ehci_qtd_t *);
 223 static void             ehci_dump_sqh(ehci_soft_qh_t *);
 224 #ifdef DIAGNOSTIC
 225 static void             ehci_dump_exfer(struct ehci_xfer *);
 226 #endif
 227 #endif
 228
 229 #define EHCI_NULL htole32(EHCI_LINK_TERMINATE)
 230
 231 #define EHCI_INTR_ENDPT 1
 232
 233 #define ehci_add_intr_list(sc, ex) \
 234         LIST_INSERT_HEAD(&(sc)->sc_intrhead, (ex), inext);
 235 #define ehci_del_intr_list(ex) \
 236         do { \
 237                 LIST_REMOVE((ex), inext); \
 238                 (ex)->inext.le_prev = NULL; \
 239         } while (0)
 240 #define ehci_active_intr_list(ex) ((ex)->inext.le_prev != NULL)
 241
 242 static struct usbd_bus_methods ehci_bus_methods = {
 243         ehci_open,
 244         ehci_softintr,
 245         ehci_poll,
 246         ehci_allocm,
 247         ehci_freem,
 248         ehci_allocx,
 249         ehci_freex,
 250 };
 251
 252 static struct usbd_pipe_methods ehci_root_ctrl_methods = {
 253         ehci_root_ctrl_transfer,
 254         ehci_root_ctrl_start,
 255         ehci_root_ctrl_abort,
 256         ehci_root_ctrl_close,
 257         ehci_noop,
 258         ehci_root_ctrl_done,
 259 };
 260
 261 static struct usbd_pipe_methods ehci_root_intr_methods = {
 262         ehci_root_intr_transfer,
 263         ehci_root_intr_start,
 264         ehci_root_intr_abort,
 265         ehci_root_intr_close,
 266         ehci_noop,
 267         ehci_root_intr_done,
 268 };
 269
 270 static struct usbd_pipe_methods ehci_device_ctrl_methods = {
 271         ehci_device_ctrl_transfer,
 272         ehci_device_ctrl_start,
 273         ehci_device_ctrl_abort,
 274         ehci_device_ctrl_close,
 275         ehci_noop,
 276         ehci_device_ctrl_done,
 277 };
 278
 279 static struct usbd_pipe_methods ehci_device_intr_methods = {
 280         ehci_device_intr_transfer,
 281         ehci_device_intr_start,
 282         ehci_device_intr_abort,
 283         ehci_device_intr_close,
 284         ehci_device_clear_toggle,
 285         ehci_device_intr_done,
 286 };
 287
 288 static struct usbd_pipe_methods ehci_device_bulk_methods = {
 289         ehci_device_bulk_transfer,
 290         ehci_device_bulk_start,
 291         ehci_device_bulk_abort,
 292         ehci_device_bulk_close,
 293         ehci_device_clear_toggle,
 294         ehci_device_bulk_done,
 295 };
 296
 297 static struct usbd_pipe_methods ehci_device_isoc_methods = {
 298         ehci_device_isoc_transfer,
 299         ehci_device_isoc_start,
 300         ehci_device_isoc_abort,
 301         ehci_device_isoc_close,
 302         ehci_noop,
 303         ehci_device_isoc_done,
 304 };
 305
 306 usbd_status
 307 ehci_init(ehci_softc_t *sc)
 308 {
 309         u_int32_t vers, sparams, cparams, hcr;
 310         u_int i;
 311         usbd_status err;
 312         ehci_soft_qh_t *sqh;
 313         u_int ncomp;
 314         int lev;
 315
 316         DPRINTF(("ehci_init: start\n"));
 317 #ifdef EHCI_DEBUG
 318         theehci = sc;
 319 #endif
 320
 321         sc->sc_offs = EREAD1(sc, EHCI_CAPLENGTH);
 322
 323         vers = EREAD2(sc, EHCI_HCIVERSION);
 324         device_printf(sc->sc_bus.bdev,
 325             "EHCI version %x.%x\n", vers >> 8, vers & 0xff);
 326
 327         sparams = EREAD4(sc, EHCI_HCSPARAMS);
 328         DPRINTF(("ehci_init: sparams=0x%x\n", sparams));
 329         sc->sc_npcomp = EHCI_HCS_N_PCC(sparams);
 330         ncomp = EHCI_HCS_N_CC(sparams);
 331         if (ncomp != sc->sc_ncomp) {
 332                 device_printf(sc->sc_bus.bdev,
 333                     "wrong number of companions (%d != %d)\n",
 334                     ncomp, sc->sc_ncomp);
 335                 if (ncomp < sc->sc_ncomp)
 336                         sc->sc_ncomp = ncomp;
 337         }
 338         if (sc->sc_ncomp > 0) {
 339                 device_printf(sc->sc_bus.bdev,
 340                     "companion controller%s, %d port%s each:",
 341                     sc->sc_ncomp!=1 ? "s" : "",
 342                     EHCI_HCS_N_PCC(sparams),
 343                     EHCI_HCS_N_PCC(sparams)!=1 ? "s" : "");
 344                 for (i = 0; i < sc->sc_ncomp; i++)
 345                         kprintf(" %s", device_get_nameunit(sc->sc_comps[i]->bdev));
 346                 kprintf("\n");
 347         }
 348         sc->sc_noport = EHCI_HCS_N_PORTS(sparams);
 349         cparams = EREAD4(sc, EHCI_HCCPARAMS);
 350         DPRINTF(("ehci_init: cparams=0x%x\n", cparams));
 351
 352         if (EHCI_HCC_64BIT(cparams)) {
 353                 /* MUST clear segment register if 64 bit capable. */
 354                 EWRITE4(sc, EHCI_CTRLDSSEGMENT, 0);
 355         }
 356
 357         sc->sc_bus.usbrev = USBREV_2_0;
 358
 359         /* Reset the controller */
 360         DPRINTF(("%s: resetting\n", device_get_nameunit(sc->sc_bus.bdev)));
 361         EOWRITE4(sc, EHCI_USBCMD, 0);   /* Halt controller */
 362         usb_delay_ms(&sc->sc_bus, 1);
 363         EOWRITE4(sc, EHCI_USBCMD, EHCI_CMD_HCRESET);
 364         for (i = 0; i < 100; i++) {
 365                 usb_delay_ms(&sc->sc_bus, 1);
 366                 hcr = EOREAD4(sc, EHCI_USBCMD) & EHCI_CMD_HCRESET;
 367                 if (!hcr)
 368                         break;
 369         }
 370         if (hcr) {
 371                 device_printf(sc->sc_bus.bdev, "reset timeout\n");
 372                 return (USBD_IOERROR);
 373         }
 374
 375         /* frame list size at default, read back what we got and use that */
 376         switch (EHCI_CMD_FLS(EOREAD4(sc, EHCI_USBCMD))) {
 377         case 0: sc->sc_flsize = 1024; break;
 378         case 1: sc->sc_flsize = 512; break;
 379         case 2: sc->sc_flsize = 256; break;
 380         case 3: return (USBD_IOERROR);
 381         }
 382         err = usb_allocmem(&sc->sc_bus, sc->sc_flsize * sizeof(ehci_link_t),
 383                            EHCI_FLALIGN_ALIGN, &sc->sc_fldma);
 384         if (err)
 385                 return (err);
 386         DPRINTF(("%s: flsize=%d\n", device_get_nameunit(sc->sc_bus.bdev),sc->sc_flsize));
 387         sc->sc_flist = KERNADDR(&sc->sc_fldma, 0);
 388         EOWRITE4(sc, EHCI_PERIODICLISTBASE, DMAADDR(&sc->sc_fldma, 0));
 389
 390         /* Set up the bus struct. */
 391         sc->sc_bus.methods = &ehci_bus_methods;
 392         sc->sc_bus.pipe_size = sizeof(struct ehci_pipe);
 393
 394         sc->sc_eintrs = EHCI_NORMAL_INTRS;
 395
 396         /*
 397          * Allocate the interrupt dummy QHs. These are arranged to give
 398          * poll intervals that are powers of 2 times 1ms.
 399          */
 400         for (i = 0; i < EHCI_INTRQHS; i++) {
 401                 sqh = ehci_alloc_sqh(sc);
 402                 if (sqh == NULL) {
 403                         err = USBD_NOMEM;
 404                         goto bad1;
 405                 }
 406                 sc->sc_islots[i].sqh = sqh;
 407         }
 408         lev = 0;
 409         for (i = 0; i < EHCI_INTRQHS; i++) {
 410                 if (i == EHCI_IQHIDX(lev + 1, 0))
 411                         lev++;
 412                 sqh = sc->sc_islots[i].sqh;
 413                 if (i == 0) {
 414                         /* The last (1ms) QH terminates. */
 415                         sqh->qh.qh_link = EHCI_NULL;
 416                         sqh->next = NULL;
 417                 } else {
 418                         /* Otherwise the next QH has half the poll interval */
 419                         sqh->next =
 420                             sc->sc_islots[EHCI_IQHIDX(lev - 1, i + 1)].sqh;
 421                         sqh->qh.qh_link = htole32(sqh->next->physaddr |
 422                             EHCI_LINK_QH);
 423                 }
 424                 sqh->qh.qh_endp = htole32(EHCI_QH_SET_EPS(EHCI_QH_SPEED_HIGH));
 425                 sqh->qh.qh_endphub = htole32(EHCI_QH_SET_MULT(1));
 426                 sqh->qh.qh_curqtd = EHCI_NULL;
 427                 sqh->qh.qh_qtd.qtd_next = EHCI_NULL;
 428                 sqh->qh.qh_qtd.qtd_altnext = EHCI_NULL;
 429                 sqh->qh.qh_qtd.qtd_status = htole32(EHCI_QTD_HALTED);
 430                 sqh->sqtd = NULL;
 431         }
 432         /* Point the frame list at the last level (128ms). */
 433         for (i = 0; i < sc->sc_flsize; i++) {
 434                 sc->sc_flist[i] = htole32(EHCI_LINK_QH |
 435                     sc->sc_islots[EHCI_IQHIDX(EHCI_IPOLLRATES - 1,
 436                     i)].sqh->physaddr);
 437         }
 438
 439         /* Allocate dummy QH that starts the async list. */
 440         sqh = ehci_alloc_sqh(sc);
 441         if (sqh == NULL) {
 442                 err = USBD_NOMEM;
 443                 goto bad1;
 444         }
 445         /* Fill the QH */
 446         sqh->qh.qh_endp =
 447             htole32(EHCI_QH_SET_EPS(EHCI_QH_SPEED_HIGH) | EHCI_QH_HRECL);
 448         sqh->qh.qh_link =
 449             htole32(sqh->physaddr | EHCI_LINK_QH);
 450         sqh->qh.qh_curqtd = EHCI_NULL;
 451         sqh->prev = sqh; /*It's a circular list.. */
 452         sqh->next = sqh;
 453         /* Fill the overlay qTD */
 454         sqh->qh.qh_qtd.qtd_next = EHCI_NULL;
 455         sqh->qh.qh_qtd.qtd_altnext = EHCI_NULL;
 456         sqh->qh.qh_qtd.qtd_status = htole32(EHCI_QTD_HALTED);
 457         sqh->sqtd = NULL;
 458 #ifdef EHCI_DEBUG
 459         if (ehcidebug) {
 460                 ehci_dump_sqh(sqh);
 461         }
 462 #endif
 463
 464         /* Point to async list */
 465         sc->sc_async_head = sqh;
 466         EOWRITE4(sc, EHCI_ASYNCLISTADDR, sqh->physaddr | EHCI_LINK_QH);
 467
 468         callout_init(&sc->sc_tmo_intrlist);
 469
 470         lockinit(&sc->sc_doorbell_lock, "ehcidb", 0, 0);
 471
 472         /* Enable interrupts */
 473         EOWRITE4(sc, EHCI_USBINTR, sc->sc_eintrs);
 474
 475         /* Turn on controller */
 476         EOWRITE4(sc, EHCI_USBCMD,
 477                  EHCI_CMD_ITC_2 | /* 2 microframes interrupt delay */
 478                  (EOREAD4(sc, EHCI_USBCMD) & EHCI_CMD_FLS_M) |
 479                  EHCI_CMD_ASE |
 480                  EHCI_CMD_PSE |
 481                  EHCI_CMD_RS);
 482
 483         /* Take over port ownership */
 484         EOWRITE4(sc, EHCI_CONFIGFLAG, EHCI_CONF_CF);
 485
 486         for (i = 0; i < 100; i++) {
 487                 usb_delay_ms(&sc->sc_bus, 1);
 488                 hcr = EOREAD4(sc, EHCI_USBSTS) & EHCI_STS_HCH;
 489                 if (!hcr)
 490                         break;
 491         }
 492         if (hcr) {
 493                 device_printf(sc->sc_bus.bdev, "run timeout\n");
 494                 return (USBD_IOERROR);
 495         }
 496
 497         return (USBD_NORMAL_COMPLETION);
 498
 499 #if 0
 500  bad2:
 501         ehci_free_sqh(sc, sc->sc_async_head);
 502 #endif
 503  bad1:
 504         usb_freemem(&sc->sc_bus, &sc->sc_fldma);
 505         return (err);
 506 }
 507
 508 int
 509 ehci_intr(void *v)
 510 {
 511         ehci_softc_t *sc = v;
 512
 513         if (sc->sc_dying || (sc->sc_flags & EHCI_SCFLG_DONEINIT) == 0)
 514                 return (0);
 515
 516         /* If we get an interrupt while polling, then just ignore it. */
 517         if (sc->sc_bus.use_polling) {
 518                 u_int32_t intrs = EHCI_STS_INTRS(EOREAD4(sc, EHCI_USBSTS));
 519
 520                 if (intrs)
 521                         EOWRITE4(sc, EHCI_USBSTS, intrs); /* Acknowledge */
 522 #ifdef DIAGNOSTIC
 523                 DPRINTFN(16, ("ehci_intr: ignored interrupt while polling\n"));
 524 #endif
 525                 return (0);
 526         }
 527
 528         return (ehci_intr1(sc));
 529 }
 530
 531 static int
 532 ehci_intr1(ehci_softc_t *sc)
 533 {
 534         u_int32_t intrs, eintrs;
 535
 536         DPRINTFN(20,("ehci_intr1: enter\n"));
 537
 538         intrs = EHCI_STS_INTRS(EOREAD4(sc, EHCI_USBSTS));
 539         if (!intrs)
 540                 return (0);
 541
 542         eintrs = intrs & sc->sc_eintrs;
 543         DPRINTFN(7, ("ehci_intr1: sc=%p intrs=0x%x(0x%x) eintrs=0x%x\n",
 544                      sc, (u_int)intrs, EOREAD4(sc, EHCI_USBSTS),
 545                      (u_int)eintrs));
 546         if (!eintrs)
 547                 return (0);
 548
 549         EOWRITE4(sc, EHCI_USBSTS, intrs); /* Acknowledge */
 550         sc->sc_bus.intr_context++;
 551         sc->sc_bus.no_intrs++;
 552         if (eintrs & EHCI_STS_IAA) {
 553                 DPRINTF(("ehci_intr1: door bell\n"));
 554                 wakeup(&sc->sc_async_head);
 555                 eintrs &= ~EHCI_STS_IAA;
 556         }
 557         if (eintrs & (EHCI_STS_INT | EHCI_STS_ERRINT)) {
 558                 DPRINTFN(5,("ehci_intr1: %s %s\n",
 559                             eintrs & EHCI_STS_INT ? "INT" : "",
 560                             eintrs & EHCI_STS_ERRINT ? "ERRINT" : ""));
 561                 usb_schedsoftintr(&sc->sc_bus);
 562                 eintrs &= ~(EHCI_STS_INT | EHCI_STS_ERRINT);
 563         }
 564         if (eintrs & EHCI_STS_HSE) {
 565                 device_printf(sc->sc_bus.bdev,
 566                     "unrecoverable error, controller halted\n");
 567                 /* XXX what else */
 568         }
 569         if (eintrs & EHCI_STS_PCD) {
 570                 ehci_pcd(sc, sc->sc_intrxfer);
 571                 eintrs &= ~EHCI_STS_PCD;
 572         }
 573
 574         sc->sc_bus.intr_context--;
 575
 576         if (eintrs != 0) {
 577                 /* Block unprocessed interrupts. */
 578                 sc->sc_eintrs &= ~eintrs;
 579                 EOWRITE4(sc, EHCI_USBINTR, sc->sc_eintrs);
 580                 device_printf(sc->sc_bus.bdev,
 581                     "blocking intrs 0x%x\n", eintrs);
 582         }
 583
 584         return (1);
 585 }
 586
 587 void
 588 ehci_pcd(ehci_softc_t *sc, usbd_xfer_handle xfer)
 589 {
 590         u_char *p;
 591         int i, m;
 592
 593         if (xfer == NULL) {
 594                 /* Just ignore the change. */
 595                 return;
 596         }
 597
 598         p = KERNADDR(&xfer->dmabuf, 0);
 599         m = min(sc->sc_noport, xfer->length * 8 - 1);
 600         memset(p, 0, xfer->length);
 601         for (i = 1; i <= m; i++) {
 602                 /* Pick out CHANGE bits from the status reg. */
 603                 if (EOREAD4(sc, EHCI_PORTSC(i)) & EHCI_PS_CLEAR)
 604                         p[i/8] |= 1 << (i%8);
 605         }
 606         DPRINTF(("ehci_pcd: change=0x%02x\n", *p));
 607         xfer->actlen = xfer->length;
 608         xfer->status = USBD_NORMAL_COMPLETION;
 609
 610         usb_transfer_complete(xfer);
 611 }
 612
 613 void
 614 ehci_softintr(void *v)
 615 {
 616         ehci_softc_t *sc = v;
 617         struct ehci_xfer *ex, *nextex;
 618
 619         DPRINTFN(10,("%s: ehci_softintr (%d)\n", device_get_nameunit(sc->sc_bus.bdev),
 620                      sc->sc_bus.intr_context));
 621
 622         sc->sc_bus.intr_context++;
 623
 624         /*
 625          * The only explanation I can think of for why EHCI is as brain dead
 626          * as UHCI interrupt-wise is that Intel was involved in both.
 627          * An interrupt just tells us that something is done, we have no
 628          * clue what, so we need to scan through all active transfers. :-(
 629          */
 630         for (ex = LIST_FIRST(&sc->sc_intrhead); ex; ex = nextex) {
 631                 nextex = LIST_NEXT(ex, inext);
 632                 ehci_check_intr(sc, ex);
 633         }
 634
 635         /* Schedule a callout to catch any dropped transactions. */
 636         if ((sc->sc_flags & EHCI_SCFLG_LOSTINTRBUG) &&
 637             !LIST_EMPTY(&sc->sc_intrhead))
 638                 callout_reset(&sc->sc_tmo_intrlist, hz / 5, ehci_intrlist_timeout,
 639                    sc);
 640
 641 #ifdef USB_USE_SOFTINTR
 642         if (sc->sc_softwake) {
 643                 sc->sc_softwake = 0;
 644                 wakeup(&sc->sc_softwake);
 645         }
 646 #endif /* USB_USE_SOFTINTR */
 647
 648         sc->sc_bus.intr_context--;
 649 }
 650
 651 /* Check for an interrupt. */
 652 void
 653 ehci_check_intr(ehci_softc_t *sc, struct ehci_xfer *ex)
 654 {
 655         ehci_soft_qtd_t *sqtd, *lsqtd;
 656         u_int32_t status;
 657
 658         DPRINTFN(/*15*/2, ("ehci_check_intr: ex=%p\n", ex));
 659
 660         if (ex->sqtdstart == NULL) {
 661                 kprintf("ehci_check_intr: sqtdstart=NULL\n");
 662                 return;
 663         }
 664         lsqtd = ex->sqtdend;
 665 #ifdef DIAGNOSTIC
 666         if (lsqtd == NULL) {
 667                 kprintf("ehci_check_intr: lsqtd==0\n");
 668                 return;
 669         }
 670 #endif
 671         /*
 672          * If the last TD is still active we need to check whether there
 673          * is a an error somewhere in the middle, or whether there was a
 674          * short packet (SPD and not ACTIVE).
 675          */
 676         if (le32toh(lsqtd->qtd.qtd_status) & EHCI_QTD_ACTIVE) {
 677                 DPRINTFN(12, ("ehci_check_intr: active ex=%p\n", ex));
 678                 for (sqtd = ex->sqtdstart; sqtd != lsqtd; sqtd=sqtd->nextqtd) {
 679                         status = le32toh(sqtd->qtd.qtd_status);
 680                         /* If there's an active QTD the xfer isn't done. */
 681                         if (status & EHCI_QTD_ACTIVE)
 682                                 break;
 683                         /* Any kind of error makes the xfer done. */
 684                         if (status & EHCI_QTD_HALTED)
 685                                 goto done;
 686                         /* We want short packets, and it is short: it's done */
 687                         if (EHCI_QTD_GET_BYTES(status) != 0)
 688                                 goto done;
 689                 }
 690                 DPRINTFN(12, ("ehci_check_intr: ex=%p std=%p still active\n",
 691                               ex, ex->sqtdstart));
 692                 return;
 693         }
 694  done:
 695         DPRINTFN(12, ("ehci_check_intr: ex=%p done\n", ex));
 696         callout_stop(&ex->xfer.timeout_handle);
 697         usb_rem_task(ex->xfer.pipe->device, &ex->abort_task);
 698         ehci_idone(ex);
 699 }
 700
 701 void
 702 ehci_idone(struct ehci_xfer *ex)
 703 {
 704         usbd_xfer_handle xfer = &ex->xfer;
 705 #ifdef USB_DEBUG
 706         struct ehci_pipe *epipe = (struct ehci_pipe *)xfer->pipe;
 707 #endif
 708         ehci_soft_qtd_t *sqtd, *lsqtd;
 709         u_int32_t status = 0, nstatus = 0;
 710         int actlen, cerr;
 711
 712         DPRINTFN(/*12*/2, ("ehci_idone: ex=%p\n", ex));
 713 #ifdef DIAGNOSTIC
 714         {
 715                 crit_enter();
 716                 if (ex->isdone) {
 717                         crit_exit();
 718 #ifdef EHCI_DEBUG
 719                         kprintf("ehci_idone: ex is done!\n   ");
 720                         ehci_dump_exfer(ex);
 721 #else
 722                         kprintf("ehci_idone: ex=%p is done!\n", ex);
 723 #endif
 724                         return;
 725                 }
 726                 ex->isdone = 1;
 727                 crit_exit();
 728         }
 729 #endif
 730
 731         if (xfer->status == USBD_CANCELLED ||
 732             xfer->status == USBD_TIMEOUT) {
 733                 DPRINTF(("ehci_idone: aborted xfer=%p\n", xfer));
 734                 return;
 735         }
 736
 737 #ifdef EHCI_DEBUG
 738         DPRINTFN(/*10*/2, ("ehci_idone: xfer=%p, pipe=%p ready\n", xfer, epipe));
 739         if (ehcidebug > 10)
 740                 ehci_dump_sqtds(ex->sqtdstart);
 741 #endif
 742
 743         /* The transfer is done, compute actual length and status. */
 744         lsqtd = ex->sqtdend;
 745         actlen = 0;
 746         for (sqtd = ex->sqtdstart; sqtd != lsqtd->nextqtd; sqtd=sqtd->nextqtd) {
 747                 nstatus = le32toh(sqtd->qtd.qtd_status);
 748                 if (nstatus & EHCI_QTD_ACTIVE)
 749                         break;
 750
 751                 status = nstatus;
 752                 /* halt is ok if descriptor is last, and complete */
 753                 if (sqtd->qtd.qtd_next == EHCI_NULL &&
 754                     EHCI_QTD_GET_BYTES(status) == 0)
 755                         status &= ~EHCI_QTD_HALTED;
 756                 if (EHCI_QTD_GET_PID(status) != EHCI_QTD_PID_SETUP)
 757                         actlen += sqtd->len - EHCI_QTD_GET_BYTES(status);
 758         }
 759
 760         cerr = EHCI_QTD_GET_CERR(status);
 761         DPRINTFN(/*10*/2, ("ehci_idone: len=%d, actlen=%d, cerr=%d, "
 762             "status=0x%x\n", xfer->length, actlen, cerr, status));
 763         xfer->actlen = actlen;
 764         if ((status & EHCI_QTD_HALTED) != 0) {
 765 #ifdef EHCI_DEBUG
 766                 char sbuf[128];
 767
 768                 bitmask_snprintf((u_int32_t)status,
 769                     "\20\7HALTED\6BUFERR\5BABBLE\4XACTERR"
 770                     "\3MISSED\2SPLIT\1PING", sbuf, sizeof(sbuf));
 771
 772                 DPRINTFN(2,
 773                          ("ehci_idone: error, addr=%d, endpt=0x%02x, "
 774                           "status 0x%s\n",
 775                           xfer->pipe->device->address,
 776                           xfer->pipe->endpoint->edesc->bEndpointAddress,
 777                           sbuf));
 778                 if (ehcidebug > 2) {
 779                         ehci_dump_sqh(epipe->sqh);
 780                         ehci_dump_sqtds(ex->sqtdstart);
 781                 }
 782 #endif
 783                 if ((status & EHCI_QTD_BABBLE) == 0 && cerr > 0)
 784                         xfer->status = USBD_STALLED;
 785                 else
 786                         xfer->status = USBD_IOERROR; /* more info XXX */
 787         } else {
 788                 xfer->status = USBD_NORMAL_COMPLETION;
 789         }
 790
 791         usb_transfer_complete(xfer);
 792         DPRINTFN(/*12*/2, ("ehci_idone: ex=%p done\n", ex));
 793 }
 794
 795 /*
 796  * Wait here until controller claims to have an interrupt.
 797  * Then call ehci_intr and return.  Use timeout to avoid waiting
 798  * too long.
 799  */
 800 void
 801 ehci_waitintr(ehci_softc_t *sc, usbd_xfer_handle xfer)
 802 {
 803         int timo = xfer->timeout;
 804         int usecs;
 805         u_int32_t intrs;
 806
 807         xfer->status = USBD_IN_PROGRESS;
 808         for (usecs = timo * 1000000 / hz; usecs > 0; usecs -= 1000) {
 809                 usb_delay_ms(&sc->sc_bus, 1);
 810                 if (sc->sc_dying)
 811                         break;
 812                 intrs = EHCI_STS_INTRS(EOREAD4(sc, EHCI_USBSTS)) &
 813                         sc->sc_eintrs;
 814                 DPRINTFN(15,("ehci_waitintr: 0x%04x\n", intrs));
 815 #ifdef EHCI_DEBUG
 816                 if (ehcidebug > 15)
 817                         ehci_dump_regs(sc);
 818 #endif
 819                 if (intrs) {
 820                         ehci_intr1(sc);
 821                         if (xfer->status != USBD_IN_PROGRESS)
 822                                 return;
 823                 }
 824         }
 825
 826         /* Timeout */
 827         DPRINTF(("ehci_waitintr: timeout\n"));
 828         xfer->status = USBD_TIMEOUT;
 829         usb_transfer_complete(xfer);
 830         /* XXX should free TD */
 831 }
 832
 833 void
 834 ehci_poll(struct usbd_bus *bus)
 835 {
 836         ehci_softc_t *sc = (ehci_softc_t *)bus;
 837 #ifdef EHCI_DEBUG
 838         static int last;
 839         int new;
 840         new = EHCI_STS_INTRS(EOREAD4(sc, EHCI_USBSTS));
 841         if (new != last) {
 842                 DPRINTFN(10,("ehci_poll: intrs=0x%04x\n", new));
 843                 last = new;
 844         }
 845 #endif
 846
 847         if (EOREAD4(sc, EHCI_USBSTS) & sc->sc_eintrs)
 848                 ehci_intr1(sc);
 849 }
 850
 851 int
 852 ehci_detach(struct ehci_softc *sc, int flags)
 853 {
 854         int rv = 0;
 855
 856         sc->sc_dying = 1;
 857
 858         EOWRITE4(sc, EHCI_USBINTR, sc->sc_eintrs);
 859         EOWRITE4(sc, EHCI_USBCMD, 0);
 860         EOWRITE4(sc, EHCI_USBCMD, EHCI_CMD_HCRESET);
 861         callout_stop(&sc->sc_tmo_intrlist);
 862
 863         usb_delay_ms(&sc->sc_bus, 300); /* XXX let stray task complete */
 864
 865         usb_freemem(&sc->sc_bus, &sc->sc_fldma);
 866         /* XXX free other data structures XXX */
 867
 868         return (rv);
 869 }
 870
 871 /*
 872  * Handle suspend/resume.
 873  *
 874  * We need to switch to polling mode here, because this routine is
 875  * called from an interrupt context.  This is all right since we
 876  * are almost suspended anyway.
 877  */
 878 void
 879 ehci_power(int why, void *v)
 880 {
 881         ehci_softc_t *sc = v;
 882         u_int32_t cmd, hcr;
 883         int i;
 884
 885 #ifdef EHCI_DEBUG
 886         DPRINTF(("ehci_power: sc=%p, why=%d\n", sc, why));
 887         if (ehcidebug > 0)
 888                 ehci_dump_regs(sc);
 889 #endif
 890
 891         crit_enter();
 892
 893         switch (why) {
 894         case PWR_SUSPEND:
 895                 sc->sc_bus.use_polling++;
 896
 897                 for (i = 1; i <= sc->sc_noport; i++) {
 898                         cmd = EOREAD4(sc, EHCI_PORTSC(i));
 899                         if ((cmd & EHCI_PS_PO) == 0 &&
 900                             (cmd & EHCI_PS_PE) == EHCI_PS_PE)
 901                                 EOWRITE4(sc, EHCI_PORTSC(i),
 902                                     cmd | EHCI_PS_SUSP);
 903                 }
 904
 905                 sc->sc_cmd = EOREAD4(sc, EHCI_USBCMD);
 906
 907                 cmd = sc->sc_cmd & ~(EHCI_CMD_ASE | EHCI_CMD_PSE);
 908                 EOWRITE4(sc, EHCI_USBCMD, cmd);
 909
 910                 for (i = 0; i < 100; i++) {
 911                         hcr = EOREAD4(sc, EHCI_USBSTS) &
 912                             (EHCI_STS_ASS | EHCI_STS_PSS);
 913                         if (hcr == 0)
 914                                 break;
 915
 916                         usb_delay_ms(&sc->sc_bus, 1);
 917                 }
 918                 if (hcr != 0) {
 919                         device_printf(sc->sc_bus.bdev, "reset timeout\n");
 920                 }
 921
 922                 cmd &= ~EHCI_CMD_RS;
 923                 EOWRITE4(sc, EHCI_USBCMD, cmd);
 924
 925                 for (i = 0; i < 100; i++) {
 926                         hcr = EOREAD4(sc, EHCI_USBSTS) & EHCI_STS_HCH;
 927                         if (hcr == EHCI_STS_HCH)
 928                                 break;
 929
 930                         usb_delay_ms(&sc->sc_bus, 1);
 931                 }
 932                 if (hcr != EHCI_STS_HCH) {
 933                         device_printf(sc->sc_bus.bdev, "config timeout\n");
 934                 }
 935
 936                 sc->sc_bus.use_polling--;
 937                 break;
 938
 939         case PWR_RESUME:
 940                 sc->sc_bus.use_polling++;
 941
 942                 /* restore things in case the bios sucks */
 943                 EOWRITE4(sc, EHCI_CTRLDSSEGMENT, 0);
 944                 EOWRITE4(sc, EHCI_PERIODICLISTBASE, DMAADDR(&sc->sc_fldma, 0));
 945                 EOWRITE4(sc, EHCI_ASYNCLISTADDR,
 946                     sc->sc_async_head->physaddr | EHCI_LINK_QH);
 947                 EOWRITE4(sc, EHCI_USBINTR, sc->sc_eintrs);
 948
 949                 hcr = 0;
 950                 for (i = 1; i <= sc->sc_noport; i++) {
 951                         cmd = EOREAD4(sc, EHCI_PORTSC(i));
 952                         if ((cmd & EHCI_PS_PO) == 0 &&
 953                             (cmd & EHCI_PS_SUSP) == EHCI_PS_SUSP) {
 954                                 EOWRITE4(sc, EHCI_PORTSC(i),
 955                                     cmd | EHCI_PS_FPR);
 956                                 hcr = 1;
 957                         }
 958                 }
 959
 960                 if (hcr) {
 961                         usb_delay_ms(&sc->sc_bus, USB_RESUME_WAIT);
 962
 963                         for (i = 1; i <= sc->sc_noport; i++) {
 964                                 cmd = EOREAD4(sc, EHCI_PORTSC(i));
 965                                 if ((cmd & EHCI_PS_PO) == 0 &&
 966                                     (cmd & EHCI_PS_SUSP) == EHCI_PS_SUSP)
 967                                         EOWRITE4(sc, EHCI_PORTSC(i),
 968                                             cmd & ~EHCI_PS_FPR);
 969                         }
 970                 }
 971
 972                 EOWRITE4(sc, EHCI_USBCMD, sc->sc_cmd);
 973
 974                 for (i = 0; i < 100; i++) {
 975                         hcr = EOREAD4(sc, EHCI_USBSTS) & EHCI_STS_HCH;
 976                         if (hcr != EHCI_STS_HCH)
 977                                 break;
 978
 979                         usb_delay_ms(&sc->sc_bus, 1);
 980                 }
 981                 if (hcr == EHCI_STS_HCH) {
 982                         device_printf(sc->sc_bus.bdev, "config timeout\n");
 983                 }
 984
 985                 usb_delay_ms(&sc->sc_bus, USB_RESUME_WAIT);
 986
 987                 sc->sc_bus.use_polling--;
 988                 break;
 989         }
 990         crit_exit();
 991
 992 #ifdef EHCI_DEBUG
 993         DPRINTF(("ehci_power: sc=%p\n", sc));
 994         if (ehcidebug > 0)
 995                 ehci_dump_regs(sc);
 996 #endif
 997 }
 998
 999 /*
1000  * Shut down the controller when the system is going down.
1001  */
1002 void
1003 ehci_shutdown(void *v)
1004 {
1005         ehci_softc_t *sc = v;
1006
1007         DPRINTF(("ehci_shutdown: stopping the HC\n"));
1008         EOWRITE4(sc, EHCI_USBCMD, 0);   /* Halt controller */
1009         EOWRITE4(sc, EHCI_USBCMD, EHCI_CMD_HCRESET);
1010 }
1011
1012 usbd_status
1013 ehci_allocm(struct usbd_bus *bus, usb_dma_t *dma, u_int32_t size)
1014 {
1015         usbd_status err;
1016
1017         err = usb_allocmem(bus, size, 0, dma);
1018 #ifdef EHCI_DEBUG
1019         if (err)
1020                 kprintf("ehci_allocm: usb_allocmem()=%d\n", err);
1021 #endif
1022         return (err);
1023 }
1024
1025 void
1026 ehci_freem(struct usbd_bus *bus, usb_dma_t *dma)
1027 {
1028         usb_freemem(bus, dma);
1029 }
1030
1031 usbd_xfer_handle
1032 ehci_allocx(struct usbd_bus *bus)
1033 {
1034         struct ehci_softc *sc = (struct ehci_softc *)bus;
1035         usbd_xfer_handle xfer;
1036
1037         xfer = STAILQ_FIRST(&sc->sc_free_xfers);
1038         if (xfer != NULL) {
1039                 STAILQ_REMOVE_HEAD(&sc->sc_free_xfers, next);
1040 #ifdef DIAGNOSTIC
1041                 if (xfer->busy_free != XFER_FREE) {
1042                         kprintf("ehci_allocx: xfer=%p not free, 0x%08x\n", xfer,
1043                                xfer->busy_free);
1044                 }
1045 #endif
1046         } else {
1047                 xfer = kmalloc(sizeof(struct ehci_xfer), M_USB, M_INTWAIT);
1048         }
1049         if (xfer != NULL) {
1050                 memset(xfer, 0, sizeof(struct ehci_xfer));
1051                 usb_init_task(&EXFER(xfer)->abort_task, ehci_timeout_task,
1052                     xfer);
1053                 EXFER(xfer)->ehci_xfer_flags = 0;
1054 #ifdef DIAGNOSTIC
1055                 EXFER(xfer)->isdone = 1;
1056                 xfer->busy_free = XFER_BUSY;
1057 #endif
1058         }
1059         return (xfer);
1060 }
1061
1062 void
1063 ehci_freex(struct usbd_bus *bus, usbd_xfer_handle xfer)
1064 {
1065         struct ehci_softc *sc = (struct ehci_softc *)bus;
1066
1067 #ifdef DIAGNOSTIC
1068         if (xfer->busy_free != XFER_BUSY) {
1069                 kprintf("ehci_freex: xfer=%p not busy, 0x%08x\n", xfer,
1070                        xfer->busy_free);
1071                 return;
1072         }
1073         xfer->busy_free = XFER_FREE;
1074         if (!EXFER(xfer)->isdone) {
1075                 kprintf("ehci_freex: !isdone\n");
1076                 return;
1077         }
1078 #endif
1079         STAILQ_INSERT_HEAD(&sc->sc_free_xfers, xfer, next);
1080 }
1081
1082 static void
1083 ehci_device_clear_toggle(usbd_pipe_handle pipe)
1084 {
1085         struct ehci_pipe *epipe = (struct ehci_pipe *)pipe;
1086
1087         DPRINTF(("ehci_device_clear_toggle: epipe=%p status=0x%x\n",
1088                  epipe, epipe->sqh->qh.qh_qtd.qtd_status));
1089 #ifdef USB_DEBUG
1090         if (ehcidebug)
1091                 usbd_dump_pipe(pipe);
1092 #endif
1093         KASSERT((epipe->sqh->qh.qh_qtd.qtd_status &
1094             htole32(EHCI_QTD_ACTIVE)) == 0,
1095             ("ehci_device_clear_toggle: queue active"));
1096         epipe->sqh->qh.qh_qtd.qtd_status &= htole32(~EHCI_QTD_TOGGLE_MASK);
1097 }
1098
1099 static void
1100 ehci_noop(usbd_pipe_handle pipe)
1101 {
1102 }
1103
1104 #ifdef EHCI_DEBUG
1105 void
1106 ehci_dump_regs(ehci_softc_t *sc)
1107 {
1108         int i;
1109         kprintf("cmd=0x%08x, sts=0x%08x, ien=0x%08x\n",
1110                EOREAD4(sc, EHCI_USBCMD),
1111                EOREAD4(sc, EHCI_USBSTS),
1112                EOREAD4(sc, EHCI_USBINTR));
1113         kprintf("frindex=0x%08x ctrdsegm=0x%08x periodic=0x%08x async=0x%08x\n",
1114                EOREAD4(sc, EHCI_FRINDEX),
1115                EOREAD4(sc, EHCI_CTRLDSSEGMENT),
1116                EOREAD4(sc, EHCI_PERIODICLISTBASE),
1117                EOREAD4(sc, EHCI_ASYNCLISTADDR));
1118         for (i = 1; i <= sc->sc_noport; i++)
1119                 kprintf("port %d status=0x%08x\n", i,
1120                        EOREAD4(sc, EHCI_PORTSC(i)));
1121 }
1122
1123 /*
1124  * Unused function - this is meant to be called from a kernel
1125  * debugger.
1126  */
1127 void
1128 ehci_dump(void)
1129 {
1130         ehci_dump_regs(theehci);
1131 }
1132
1133 void
1134 ehci_dump_link(ehci_link_t link, int type)
1135 {
1136         link = le32toh(link);
1137         kprintf("0x%08x", link);
1138         if (link & EHCI_LINK_TERMINATE)
1139                 kprintf("<T>");
1140         else {
1141                 kprintf("<");
1142                 if (type) {
1143                         switch (EHCI_LINK_TYPE(link)) {
1144                         case EHCI_LINK_ITD: kprintf("ITD"); break;
1145                         case EHCI_LINK_QH: kprintf("QH"); break;
1146                         case EHCI_LINK_SITD: kprintf("SITD"); break;
1147                         case EHCI_LINK_FSTN: kprintf("FSTN"); break;
1148                         }
1149                 }
1150                 kprintf(">");
1151         }
1152 }
1153
1154 void
1155 ehci_dump_sqtds(ehci_soft_qtd_t *sqtd)
1156 {
1157         int i;
1158         u_int32_t stop;
1159
1160         stop = 0;
1161         for (i = 0; sqtd && i < 20 && !stop; sqtd = sqtd->nextqtd, i++) {
1162                 ehci_dump_sqtd(sqtd);
1163                 stop = sqtd->qtd.qtd_next & htole32(EHCI_LINK_TERMINATE);
1164         }
1165         if (sqtd)
1166                 kprintf("dump aborted, too many TDs\n");
1167 }
1168
1169 void
1170 ehci_dump_sqtd(ehci_soft_qtd_t *sqtd)
1171 {
1172         kprintf("QTD(%p) at 0x%08x:\n", sqtd, sqtd->physaddr);
1173         ehci_dump_qtd(&sqtd->qtd);
1174 }
1175
1176 void
1177 ehci_dump_qtd(ehci_qtd_t *qtd)
1178 {
1179         u_int32_t s;
1180         char sbuf[128];
1181
1182         kprintf("  next="); ehci_dump_link(qtd->qtd_next, 0);
1183         kprintf(" altnext="); ehci_dump_link(qtd->qtd_altnext, 0);
1184         kprintf("\n");
1185         s = le32toh(qtd->qtd_status);
1186         bitmask_snprintf(EHCI_QTD_GET_STATUS(s),
1187                          "\20\10ACTIVE\7HALTED\6BUFERR\5BABBLE\4XACTERR"
1188                          "\3MISSED\2SPLIT\1PING", sbuf, sizeof(sbuf));
1189         kprintf("  status=0x%08x: toggle=%d bytes=0x%x ioc=%d c_page=0x%x\n",
1190                s, EHCI_QTD_GET_TOGGLE(s), EHCI_QTD_GET_BYTES(s),
1191                EHCI_QTD_GET_IOC(s), EHCI_QTD_GET_C_PAGE(s));
1192         kprintf("    cerr=%d pid=%d stat=0x%s\n", EHCI_QTD_GET_CERR(s),
1193                EHCI_QTD_GET_PID(s), sbuf);
1194         for (s = 0; s < 5; s++)
1195                 kprintf("  buffer[%d]=0x%08x\n", s, le32toh(qtd->qtd_buffer[s]));
1196 }
1197
1198 void
1199 ehci_dump_sqh(ehci_soft_qh_t *sqh)
1200 {
1201         ehci_qh_t *qh = &sqh->qh;
1202         u_int32_t endp, endphub;
1203
1204         kprintf("QH(%p) at 0x%08x:\n", sqh, sqh->physaddr);
1205         kprintf("  link="); ehci_dump_link(qh->qh_link, 1); kprintf("\n");
1206         endp = le32toh(qh->qh_endp);
1207         kprintf("  endp=0x%08x\n", endp);
1208         kprintf("    addr=0x%02x inact=%d endpt=%d eps=%d dtc=%d hrecl=%d\n",
1209                EHCI_QH_GET_ADDR(endp), EHCI_QH_GET_INACT(endp),
1210                EHCI_QH_GET_ENDPT(endp),  EHCI_QH_GET_EPS(endp),
1211                EHCI_QH_GET_DTC(endp), EHCI_QH_GET_HRECL(endp));
1212         kprintf("    mpl=0x%x ctl=%d nrl=%d\n",
1213                EHCI_QH_GET_MPL(endp), EHCI_QH_GET_CTL(endp),
1214                EHCI_QH_GET_NRL(endp));
1215         endphub = le32toh(qh->qh_endphub);
1216         kprintf("  endphub=0x%08x\n", endphub);
1217         kprintf("    smask=0x%02x cmask=0x%02x huba=0x%02x port=%d mult=%d\n",
1218                EHCI_QH_GET_SMASK(endphub), EHCI_QH_GET_CMASK(endphub),
1219                EHCI_QH_GET_HUBA(endphub), EHCI_QH_GET_PORT(endphub),
1220                EHCI_QH_GET_MULT(endphub));
1221         kprintf("  curqtd="); ehci_dump_link(qh->qh_curqtd, 0); kprintf("\n");
1222         kprintf("Overlay qTD:\n");
1223         ehci_dump_qtd(&qh->qh_qtd);
1224 }
1225
1226 #ifdef DIAGNOSTIC
1227 static void
1228 ehci_dump_exfer(struct ehci_xfer *ex)
1229 {
1230         kprintf("ehci_dump_exfer: ex=%p\n", ex);
1231 }
1232 #endif
1233 #endif
1234
1235 usbd_status
1236 ehci_open(usbd_pipe_handle pipe)
1237 {
1238         usbd_device_handle dev = pipe->device;
1239         ehci_softc_t *sc = (ehci_softc_t *)dev->bus;
1240         usb_endpoint_descriptor_t *ed = pipe->endpoint->edesc;
1241         u_int8_t addr = dev->address;
1242         u_int8_t xfertype = ed->bmAttributes & UE_XFERTYPE;
1243         struct ehci_pipe *epipe = (struct ehci_pipe *)pipe;
1244         ehci_soft_qh_t *sqh;
1245         usbd_status err;
1246         int ival, speed, naks;
1247         int hshubaddr, hshubport;
1248
1249         DPRINTFN(1, ("ehci_open: pipe=%p, addr=%d, endpt=%d (%d)\n",
1250                      pipe, addr, ed->bEndpointAddress, sc->sc_addr));
1251
1252         if (dev->myhsport) {
1253                 hshubaddr = dev->myhsport->parent->address;
1254                 hshubport = dev->myhsport->portno;
1255         } else {
1256                 hshubaddr = 0;
1257                 hshubport = 0;
1258         }
1259
1260         if (sc->sc_dying)
1261                 return (USBD_IOERROR);
1262
1263         if (addr == sc->sc_addr) {
1264                 switch (ed->bEndpointAddress) {
1265                 case USB_CONTROL_ENDPOINT:
1266                         pipe->methods = &ehci_root_ctrl_methods;
1267                         break;
1268                 case UE_DIR_IN | EHCI_INTR_ENDPT:
1269                         pipe->methods = &ehci_root_intr_methods;
1270                         break;
1271                 default:
1272                         return (USBD_INVAL);
1273                 }
1274                 return (USBD_NORMAL_COMPLETION);
1275         }
1276
1277         /* XXX All this stuff is only valid for async. */
1278         switch (dev->speed) {
1279         case USB_SPEED_LOW:  speed = EHCI_QH_SPEED_LOW;  break;
1280         case USB_SPEED_FULL: speed = EHCI_QH_SPEED_FULL; break;
1281         case USB_SPEED_HIGH: speed = EHCI_QH_SPEED_HIGH; break;
1282         default: panic("ehci_open: bad device speed %d", dev->speed);
1283         }
1284         if (speed != EHCI_QH_SPEED_HIGH && xfertype == UE_ISOCHRONOUS) {
1285                 device_printf(sc->sc_bus.bdev,
1286                     "*** WARNING: opening low/full speed device, this "
1287                     "does not work yet.\n");
1288                 DPRINTFN(1,("ehci_open: hshubaddr=%d hshubport=%d\n",
1289                             hshubaddr, hshubport));
1290                 return USBD_INVAL;
1291         }
1292
1293         naks = 8;               /* XXX */
1294         sqh = ehci_alloc_sqh(sc);
1295         if (sqh == NULL)
1296                 goto bad0;
1297         /* qh_link filled when the QH is added */
1298         sqh->qh.qh_endp = htole32(
1299                 EHCI_QH_SET_ADDR(addr) |
1300                 EHCI_QH_SET_ENDPT(UE_GET_ADDR(ed->bEndpointAddress)) |
1301                 EHCI_QH_SET_EPS(speed) |
1302                 (xfertype == UE_CONTROL ? EHCI_QH_DTC : 0) |
1303                 EHCI_QH_SET_MPL(UGETW(ed->wMaxPacketSize)) |
1304                 (speed != EHCI_QH_SPEED_HIGH && xfertype == UE_CONTROL ?
1305                  EHCI_QH_CTL : 0) |
1306                 EHCI_QH_SET_NRL(naks)
1307                 );
1308         sqh->qh.qh_endphub = htole32(
1309                 EHCI_QH_SET_MULT(1) |
1310                 EHCI_QH_SET_HUBA(hshubaddr) |
1311                 EHCI_QH_SET_PORT(hshubport) |
1312                 EHCI_QH_SET_CMASK(0x1c) |
1313                 EHCI_QH_SET_SMASK(xfertype == UE_INTERRUPT ? 0x01 : 0)
1314                 );
1315         sqh->qh.qh_curqtd = EHCI_NULL;
1316         /* Fill the overlay qTD */
1317         sqh->qh.qh_qtd.qtd_next = EHCI_NULL;
1318         sqh->qh.qh_qtd.qtd_altnext = EHCI_NULL;
1319         sqh->qh.qh_qtd.qtd_status =
1320             htole32(EHCI_QTD_SET_TOGGLE(pipe->endpoint->savedtoggle));
1321
1322         epipe->sqh = sqh;
1323
1324         switch (xfertype) {
1325         case UE_CONTROL:
1326                 err = usb_allocmem(&sc->sc_bus, sizeof(usb_device_request_t),
1327                                    0, &epipe->u.ctl.reqdma);
1328 #ifdef EHCI_DEBUG
1329                 if (err)
1330                         kprintf("ehci_open: usb_allocmem()=%d\n", err);
1331 #endif
1332                 if (err)
1333                         goto bad1;
1334                 pipe->methods = &ehci_device_ctrl_methods;
1335                 crit_enter();
1336                 ehci_add_qh(sqh, sc->sc_async_head);
1337                 crit_exit();
1338                 break;
1339         case UE_BULK:
1340                 pipe->methods = &ehci_device_bulk_methods;
1341                 crit_enter();
1342                 ehci_add_qh(sqh, sc->sc_async_head);
1343                 crit_exit();
1344                 break;
1345         case UE_INTERRUPT:
1346                 pipe->methods = &ehci_device_intr_methods;
1347                 ival = pipe->interval;
1348                 if (ival == USBD_DEFAULT_INTERVAL)
1349                         ival = ed->bInterval;
1350                 return (ehci_device_setintr(sc, sqh, ival));
1351         case UE_ISOCHRONOUS:
1352                 pipe->methods = &ehci_device_isoc_methods;
1353                 return (USBD_INVAL);
1354         default:
1355                 return (USBD_INVAL);
1356         }
1357         return (USBD_NORMAL_COMPLETION);
1358
1359  bad1:
1360         ehci_free_sqh(sc, sqh);
1361  bad0:
1362         return (USBD_NOMEM);
1363 }
1364
1365 /*
1366  * Add an ED to the schedule.  Called while in a critical section.
1367  * If in the async schedule, it will always have a next.
1368  * If in the intr schedule it may not.
1369  */
1370 void
1371 ehci_add_qh(ehci_soft_qh_t *sqh, ehci_soft_qh_t *head)
1372 {
1373         sqh->next = head->next;
1374         sqh->prev = head;
1375         sqh->qh.qh_link = head->qh.qh_link;
1376         head->next = sqh;
1377         if (sqh->next)
1378                 sqh->next->prev = sqh;
1379         head->qh.qh_link = htole32(sqh->physaddr | EHCI_LINK_QH);
1380
1381 #ifdef EHCI_DEBUG
1382         if (ehcidebug > 5) {
1383                 kprintf("ehci_add_qh:\n");
1384                 ehci_dump_sqh(sqh);
1385         }
1386 #endif
1387 }
1388
1389 /*
1390  * Remove an ED from the schedule.  Called while in a critical section.
1391  * Will always have a 'next' if it's in the async list as it's circular.
1392  */
1393 void
1394 ehci_rem_qh(ehci_softc_t *sc, ehci_soft_qh_t *sqh, ehci_soft_qh_t *head)
1395 {
1396         /* XXX */
1397         sqh->prev->qh.qh_link = sqh->qh.qh_link;
1398         sqh->prev->next = sqh->next;
1399         if (sqh->next)
1400                 sqh->next->prev = sqh->prev;
1401         ehci_sync_hc(sc);
1402 }
1403
1404 void
1405 ehci_set_qh_qtd(ehci_soft_qh_t *sqh, ehci_soft_qtd_t *sqtd)
1406 {
1407         int i;
1408         u_int32_t status;
1409
1410         /* Save toggle bit and ping status. */
1411         status = sqh->qh.qh_qtd.qtd_status &
1412             htole32(EHCI_QTD_TOGGLE_MASK |
1413                     EHCI_QTD_SET_STATUS(EHCI_QTD_PINGSTATE));
1414         /* Set HALTED to make hw leave it alone. */
1415         sqh->qh.qh_qtd.qtd_status =
1416             htole32(EHCI_QTD_SET_STATUS(EHCI_QTD_HALTED));
1417         sqh->qh.qh_curqtd = 0;
1418         sqh->qh.qh_qtd.qtd_next = htole32(sqtd->physaddr);
1419         sqh->qh.qh_qtd.qtd_altnext = 0;
1420         for (i = 0; i < EHCI_QTD_NBUFFERS; i++)
1421                 sqh->qh.qh_qtd.qtd_buffer[i] = 0;
1422         sqh->sqtd = sqtd;
1423         /* Set !HALTED && !ACTIVE to start execution, preserve some fields */
1424         sqh->qh.qh_qtd.qtd_status = status;
1425 }
1426
1427 /*
1428  * Ensure that the HC has released all references to the QH.  We do this
1429  * by asking for a Async Advance Doorbell interrupt and then we wait for
1430  * the interrupt.
1431  * To make this easier we first obtain exclusive use of the doorbell.
1432  */
1433 void
1434 ehci_sync_hc(ehci_softc_t *sc)
1435 {
1436         int error;
1437
1438         if (sc->sc_dying) {
1439                 DPRINTFN(2,("ehci_sync_hc: dying\n"));
1440                 return;
1441         }
1442         DPRINTFN(2,("ehci_sync_hc: enter\n"));
1443         /* get doorbell */
1444         lockmgr(&sc->sc_doorbell_lock, LK_EXCLUSIVE);
1445         crit_enter();
1446         /* ask for doorbell */
1447         EOWRITE4(sc, EHCI_USBCMD, EOREAD4(sc, EHCI_USBCMD) | EHCI_CMD_IAAD);
1448         DPRINTFN(1,("ehci_sync_hc: cmd=0x%08x sts=0x%08x\n",
1449                     EOREAD4(sc, EHCI_USBCMD), EOREAD4(sc, EHCI_USBSTS)));
1450         error = tsleep(&sc->sc_async_head, 0, "ehcidi", hz); /* bell wait */
1451         DPRINTFN(1,("ehci_sync_hc: cmd=0x%08x sts=0x%08x\n",
1452                     EOREAD4(sc, EHCI_USBCMD), EOREAD4(sc, EHCI_USBSTS)));
1453         crit_exit();
1454         /* release doorbell */
1455         lockmgr(&sc->sc_doorbell_lock, LK_RELEASE);
1456 #ifdef DIAGNOSTIC
1457         if (error)
1458                 kprintf("ehci_sync_hc: tsleep() = %d\n", error);
1459 #endif
1460         DPRINTFN(2,("ehci_sync_hc: exit\n"));
1461 }
1462
1463 /***********/
1464
1465 /*
1466  * Data structures and routines to emulate the root hub.
1467  */
1468 static usb_device_descriptor_t ehci_devd = {
1469         USB_DEVICE_DESCRIPTOR_SIZE,
1470         UDESC_DEVICE,           /* type */
1471         {0x00, 0x02},           /* USB version */
1472         UDCLASS_HUB,            /* class */
1473         UDSUBCLASS_HUB,         /* subclass */
1474         UDPROTO_HSHUBSTT,       /* protocol */
1475         64,                     /* max packet */
1476         {0},{0},{0x00,0x01},    /* device id */
1477         1,2,0,                  /* string indicies */
1478         1                       /* # of configurations */
1479 };
1480
1481 static usb_device_qualifier_t ehci_odevd = {
1482         USB_DEVICE_DESCRIPTOR_SIZE,
1483         UDESC_DEVICE_QUALIFIER, /* type */
1484         {0x00, 0x02},           /* USB version */
1485         UDCLASS_HUB,            /* class */
1486         UDSUBCLASS_HUB,         /* subclass */
1487         UDPROTO_FSHUB,          /* protocol */
1488         64,                     /* max packet */
1489         1,                      /* # of configurations */
1490         0
1491 };
1492
1493 static usb_config_descriptor_t ehci_confd = {
1494         USB_CONFIG_DESCRIPTOR_SIZE,
1495         UDESC_CONFIG,
1496         {USB_CONFIG_DESCRIPTOR_SIZE +
1497          USB_INTERFACE_DESCRIPTOR_SIZE +
1498          USB_ENDPOINT_DESCRIPTOR_SIZE},
1499         1,
1500         1,
1501         0,
1502         UC_SELF_POWERED,
1503         0                       /* max power */
1504 };
1505
1506 static usb_interface_descriptor_t ehci_ifcd = {
1507         USB_INTERFACE_DESCRIPTOR_SIZE,
1508         UDESC_INTERFACE,
1509         0,
1510         0,
1511         1,
1512         UICLASS_HUB,
1513         UISUBCLASS_HUB,
1514         UIPROTO_HSHUBSTT,
1515         0
1516 };
1517
1518 static usb_endpoint_descriptor_t ehci_endpd = {
1519         USB_ENDPOINT_DESCRIPTOR_SIZE,
1520         UDESC_ENDPOINT,
1521         UE_DIR_IN | EHCI_INTR_ENDPT,
1522         UE_INTERRUPT,
1523         {8, 0},                 /* max packet */
1524         255
1525 };
1526
1527 static usb_hub_descriptor_t ehci_hubd = {
1528         USB_HUB_DESCRIPTOR_SIZE,
1529         UDESC_HUB,
1530         0,
1531         {0,0},
1532         0,
1533         0,
1534         {0},
1535 };
1536
1537 static int
1538 ehci_str(usb_string_descriptor_t *p, int l, char *s)
1539 {
1540         int i;
1541
1542         if (l == 0)
1543                 return (0);
1544         p->bLength = 2 * strlen(s) + 2;
1545         if (l == 1)
1546                 return (1);
1547         p->bDescriptorType = UDESC_STRING;
1548         l -= 2;
1549         for (i = 0; s[i] && l > 1; i++, l -= 2)
1550                 USETW2(p->bString[i], 0, s[i]);
1551         return (2*i+2);
1552 }
1553
1554 /*
1555  * Simulate a hardware hub by handling all the necessary requests.
1556  */
1557 static usbd_status
1558 ehci_root_ctrl_transfer(usbd_xfer_handle xfer)
1559 {
1560         usbd_status err;
1561
1562         /* Insert last in queue. */
1563         err = usb_insert_transfer(xfer);
1564         if (err)
1565                 return (err);
1566
1567         /* Pipe isn't running, start first */
1568         return (ehci_root_ctrl_start(STAILQ_FIRST(&xfer->pipe->queue)));
1569 }
1570
1571 static usbd_status
1572 ehci_root_ctrl_start(usbd_xfer_handle xfer)
1573 {
1574         ehci_softc_t *sc = (ehci_softc_t *)xfer->pipe->device->bus;
1575         usb_device_request_t *req;
1576         void *buf = NULL;
1577         int port, i;
1578         int len, value, index, l, totlen = 0;
1579         usb_port_status_t ps;
1580         usb_hub_descriptor_t hubd;
1581         usbd_status err;
1582         u_int32_t v;
1583
1584         if (sc->sc_dying)
1585                 return (USBD_IOERROR);
1586
1587 #ifdef DIAGNOSTIC
1588         if (!(xfer->rqflags & URQ_REQUEST))
1589                 /* XXX panic */
1590                 return (USBD_INVAL);
1591 #endif
1592         req = &xfer->request;
1593
1594         DPRINTFN(4,("ehci_root_ctrl_start: type=0x%02x request=%02x\n",
1595                     req->bmRequestType, req->bRequest));
1596
1597         len = UGETW(req->wLength);
1598         value = UGETW(req->wValue);
1599         index = UGETW(req->wIndex);
1600
1601         if (len != 0)
1602                 buf = KERNADDR(&xfer->dmabuf, 0);
1603
1604 #define C(x,y) ((x) | ((y) << 8))
1605         switch(C(req->bRequest, req->bmRequestType)) {
1606         case C(UR_CLEAR_FEATURE, UT_WRITE_DEVICE):
1607         case C(UR_CLEAR_FEATURE, UT_WRITE_INTERFACE):
1608         case C(UR_CLEAR_FEATURE, UT_WRITE_ENDPOINT):
1609                 /*
1610                  * DEVICE_REMOTE_WAKEUP and ENDPOINT_HALT are no-ops
1611                  * for the integrated root hub.
1612                  */
1613                 break;
1614         case C(UR_GET_CONFIG, UT_READ_DEVICE):
1615                 if (len > 0) {
1616                         *(u_int8_t *)buf = sc->sc_conf;
1617                         totlen = 1;
1618                 }
1619                 break;
1620         case C(UR_GET_DESCRIPTOR, UT_READ_DEVICE):
1621                 DPRINTFN(8,("ehci_root_ctrl_start: wValue=0x%04x\n", value));
1622                 switch(value >> 8) {
1623                 case UDESC_DEVICE:
1624                         if ((value & 0xff) != 0) {
1625                                 err = USBD_IOERROR;
1626                                 goto ret;
1627                         }
1628                         totlen = l = min(len, USB_DEVICE_DESCRIPTOR_SIZE);
1629                         USETW(ehci_devd.idVendor, sc->sc_id_vendor);
1630                         memcpy(buf, &ehci_devd, l);
1631                         break;
1632                 /*
1633                  * We can't really operate at another speed, but the spec says
1634                  * we need this descriptor.
1635                  */
1636                 case UDESC_DEVICE_QUALIFIER:
1637                         if ((value & 0xff) != 0) {
1638                                 err = USBD_IOERROR;
1639                                 goto ret;
1640                         }
1641                         totlen = l = min(len, USB_DEVICE_DESCRIPTOR_SIZE);
1642                         memcpy(buf, &ehci_odevd, l);
1643                         break;
1644                 /*
1645                  * We can't really operate at another speed, but the spec says
1646                  * we need this descriptor.
1647                  */
1648                 case UDESC_OTHER_SPEED_CONFIGURATION:
1649                 case UDESC_CONFIG:
1650                         if ((value & 0xff) != 0) {
1651                                 err = USBD_IOERROR;
1652                                 goto ret;
1653                         }
1654                         totlen = l = min(len, USB_CONFIG_DESCRIPTOR_SIZE);
1655                         memcpy(buf, &ehci_confd, l);
1656                         ((usb_config_descriptor_t *)buf)->bDescriptorType =
1657                                 value >> 8;
1658                         buf = (char *)buf + l;
1659                         len -= l;
1660                         l = min(len, USB_INTERFACE_DESCRIPTOR_SIZE);
1661                         totlen += l;
1662                         memcpy(buf, &ehci_ifcd, l);
1663                         buf = (char *)buf + l;
1664                         len -= l;
1665                         l = min(len, USB_ENDPOINT_DESCRIPTOR_SIZE);
1666                         totlen += l;
1667                         memcpy(buf, &ehci_endpd, l);
1668                         break;
1669                 case UDESC_STRING:
1670                         if (len == 0)
1671                                 break;
1672                         *(u_int8_t *)buf = 0;
1673                         totlen = 1;
1674                         switch (value & 0xff) {
1675                         case 0: /* Language table */
1676                                 totlen = ehci_str(buf, len, "\001");
1677                                 break;
1678                         case 1: /* Vendor */
1679                                 totlen = ehci_str(buf, len, sc->sc_vendor);
1680                                 break;
1681                         case 2: /* Product */
1682                                 totlen = ehci_str(buf, len, "EHCI root hub");
1683                                 break;
1684                         }
1685                         break;
1686                 default:
1687                         err = USBD_IOERROR;
1688                         goto ret;
1689                 }
1690                 break;
1691         case C(UR_GET_INTERFACE, UT_READ_INTERFACE):
1692                 if (len > 0) {
1693                         *(u_int8_t *)buf = 0;
1694                         totlen = 1;
1695                 }
1696                 break;
1697         case C(UR_GET_STATUS, UT_READ_DEVICE):
1698                 if (len > 1) {
1699                         USETW(((usb_status_t *)buf)->wStatus,UDS_SELF_POWERED);
1700                         totlen = 2;
1701                 }
1702                 break;
1703         case C(UR_GET_STATUS, UT_READ_INTERFACE):
1704         case C(UR_GET_STATUS, UT_READ_ENDPOINT):
1705                 if (len > 1) {
1706                         USETW(((usb_status_t *)buf)->wStatus, 0);
1707                         totlen = 2;
1708                 }
1709                 break;
1710         case C(UR_SET_ADDRESS, UT_WRITE_DEVICE):
1711                 if (value >= USB_MAX_DEVICES) {
1712                         err = USBD_IOERROR;
1713                         goto ret;
1714                 }
1715                 sc->sc_addr = value;
1716                 break;
1717         case C(UR_SET_CONFIG, UT_WRITE_DEVICE):
1718                 if (value != 0 && value != 1) {
1719                         err = USBD_IOERROR;
1720                         goto ret;
1721                 }
1722                 sc->sc_conf = value;
1723                 break;
1724         case C(UR_SET_DESCRIPTOR, UT_WRITE_DEVICE):
1725                 break;
1726         case C(UR_SET_FEATURE, UT_WRITE_DEVICE):
1727         case C(UR_SET_FEATURE, UT_WRITE_INTERFACE):
1728         case C(UR_SET_FEATURE, UT_WRITE_ENDPOINT):
1729                 err = USBD_IOERROR;
1730                 goto ret;
1731         case C(UR_SET_INTERFACE, UT_WRITE_INTERFACE):
1732                 break;
1733         case C(UR_SYNCH_FRAME, UT_WRITE_ENDPOINT):
1734                 break;
1735         /* Hub requests */
1736         case C(UR_CLEAR_FEATURE, UT_WRITE_CLASS_DEVICE):
1737                 break;
1738         case C(UR_CLEAR_FEATURE, UT_WRITE_CLASS_OTHER):
1739                 DPRINTFN(8, ("ehci_root_ctrl_start: UR_CLEAR_PORT_FEATURE "
1740                              "port=%d feature=%d\n",
1741                              index, value));
1742                 if (index < 1 || index > sc->sc_noport) {
1743                         err = USBD_IOERROR;
1744                         goto ret;
1745                 }
1746                 port = EHCI_PORTSC(index);
1747                 v = EOREAD4(sc, port) &~ EHCI_PS_CLEAR;
1748                 switch(value) {
1749                 case UHF_PORT_ENABLE:
1750                         EOWRITE4(sc, port, v &~ EHCI_PS_PE);
1751                         break;
1752                 case UHF_PORT_SUSPEND:
1753                         EOWRITE4(sc, port, v &~ EHCI_PS_SUSP);
1754                         break;
1755                 case UHF_PORT_POWER:
1756                         EOWRITE4(sc, port, v &~ EHCI_PS_PP);
1757                         break;
1758                 case UHF_PORT_TEST:
1759                         DPRINTFN(2,("ehci_root_ctrl_start: clear port test "
1760                                     "%d\n", index));
1761                         break;
1762                 case UHF_PORT_INDICATOR:
1763                         DPRINTFN(2,("ehci_root_ctrl_start: clear port ind "
1764                                     "%d\n", index));
1765                         EOWRITE4(sc, port, v &~ EHCI_PS_PIC);
1766                         break;
1767                 case UHF_C_PORT_CONNECTION:
1768                         EOWRITE4(sc, port, v | EHCI_PS_CSC);
1769                         break;
1770                 case UHF_C_PORT_ENABLE:
1771                         EOWRITE4(sc, port, v | EHCI_PS_PEC);
1772                         break;
1773                 case UHF_C_PORT_SUSPEND:
1774                         /* how? */
1775                         break;
1776                 case UHF_C_PORT_OVER_CURRENT:
1777                         EOWRITE4(sc, port, v | EHCI_PS_OCC);
1778                         break;
1779                 case UHF_C_PORT_RESET:
1780                         sc->sc_isreset = 0;
1781                         break;
1782                 default:
1783                         err = USBD_IOERROR;
1784                         goto ret;
1785                 }
1786                 break;
1787         case C(UR_GET_DESCRIPTOR, UT_READ_CLASS_DEVICE):
1788                 if ((value & 0xff) != 0) {
1789                         err = USBD_IOERROR;
1790                         goto ret;
1791                 }
1792                 hubd = ehci_hubd;
1793                 hubd.bNbrPorts = sc->sc_noport;
1794                 v = EOREAD4(sc, EHCI_HCSPARAMS);
1795                 USETW(hubd.wHubCharacteristics,
1796                     EHCI_HCS_PPC(v) ? UHD_PWR_INDIVIDUAL : UHD_PWR_NO_SWITCH |
1797                     EHCI_HCS_P_INDICATOR(EREAD4(sc, EHCI_HCSPARAMS))
1798                         ? UHD_PORT_IND : 0);
1799                 hubd.bPwrOn2PwrGood = 200; /* XXX can't find out? */
1800                 for (i = 0, l = sc->sc_noport; l > 0; i++, l -= 8, v >>= 8)
1801                         hubd.DeviceRemovable[i++] = 0; /* XXX can't find out? */
1802                 hubd.bDescLength = USB_HUB_DESCRIPTOR_SIZE + i;
1803                 l = min(len, hubd.bDescLength);
1804                 totlen = l;
1805                 memcpy(buf, &hubd, l);
1806                 break;
1807         case C(UR_GET_STATUS, UT_READ_CLASS_DEVICE):
1808                 if (len != 4) {
1809                         err = USBD_IOERROR;
1810                         goto ret;
1811                 }
1812                 memset(buf, 0, len); /* ? XXX */
1813                 totlen = len;
1814                 break;
1815         case C(UR_GET_STATUS, UT_READ_CLASS_OTHER):
1816                 DPRINTFN(8,("ehci_root_ctrl_start: get port status i=%d\n",
1817                             index));
1818                 if (index < 1 || index > sc->sc_noport) {
1819                         err = USBD_IOERROR;
1820                         goto ret;
1821                 }
1822                 if (len != 4) {
1823                         err = USBD_IOERROR;
1824                         goto ret;
1825                 }
1826                 v = EOREAD4(sc, EHCI_PORTSC(index));
1827                 DPRINTFN(8,("ehci_root_ctrl_start: port status=0x%04x\n", v));
1828                 i = UPS_HIGH_SPEED;
1829                 if (v & EHCI_PS_CS)     i |= UPS_CURRENT_CONNECT_STATUS;
1830                 if (v & EHCI_PS_PE)     i |= UPS_PORT_ENABLED;
1831                 if (v & EHCI_PS_SUSP)   i |= UPS_SUSPEND;
1832                 if (v & EHCI_PS_OCA)    i |= UPS_OVERCURRENT_INDICATOR;
1833                 if (v & EHCI_PS_PR)     i |= UPS_RESET;
1834                 if (v & EHCI_PS_PP)     i |= UPS_PORT_POWER;
1835                 USETW(ps.wPortStatus, i);
1836                 i = 0;
1837                 if (v & EHCI_PS_CSC)    i |= UPS_C_CONNECT_STATUS;
1838                 if (v & EHCI_PS_PEC)    i |= UPS_C_PORT_ENABLED;
1839                 if (v & EHCI_PS_OCC)    i |= UPS_C_OVERCURRENT_INDICATOR;
1840                 if (sc->sc_isreset)     i |= UPS_C_PORT_RESET;
1841                 USETW(ps.wPortChange, i);
1842                 l = min(len, sizeof ps);
1843                 memcpy(buf, &ps, l);
1844                 totlen = l;
1845                 break;
1846         case C(UR_SET_DESCRIPTOR, UT_WRITE_CLASS_DEVICE):
1847                 err = USBD_IOERROR;
1848                 goto ret;
1849         case C(UR_SET_FEATURE, UT_WRITE_CLASS_DEVICE):
1850                 break;
1851         case C(UR_SET_FEATURE, UT_WRITE_CLASS_OTHER):
1852                 if (index < 1 || index > sc->sc_noport) {
1853                         err = USBD_IOERROR;
1854                         goto ret;
1855                 }
1856                 port = EHCI_PORTSC(index);
1857                 v = EOREAD4(sc, port) &~ EHCI_PS_CLEAR;
1858                 switch(value) {
1859                 case UHF_PORT_ENABLE:
1860                         EOWRITE4(sc, port, v | EHCI_PS_PE);
1861                         break;
1862                 case UHF_PORT_SUSPEND:
1863                         EOWRITE4(sc, port, v | EHCI_PS_SUSP);
1864                         break;
1865                 case UHF_PORT_RESET:
1866                         DPRINTFN(5,("ehci_root_ctrl_start: reset port %d\n",
1867                                     index));
1868                         if (EHCI_PS_IS_LOWSPEED(v)) {
1869                                 /* Low speed device, give up ownership. */
1870                                 ehci_disown(sc, index, 1);
1871                                 break;
1872                         }
1873                         /* Start reset sequence. */
1874                         v &= ~ (EHCI_PS_PE | EHCI_PS_PR);
1875                         EOWRITE4(sc, port, v | EHCI_PS_PR);
1876                         /* Wait for reset to complete. */
1877                         usb_delay_ms(&sc->sc_bus, USB_PORT_ROOT_RESET_DELAY);
1878                         if (sc->sc_dying) {
1879                                 err = USBD_IOERROR;
1880                                 goto ret;
1881                         }
1882                         /* Terminate reset sequence. */
1883                         EOWRITE4(sc, port, v);
1884                         /* Wait for HC to complete reset. */
1885                         usb_delay_ms(&sc->sc_bus, EHCI_PORT_RESET_COMPLETE);
1886                         if (sc->sc_dying) {
1887                                 err = USBD_IOERROR;
1888                                 goto ret;
1889                         }
1890                         v = EOREAD4(sc, port);
1891                         DPRINTF(("ehci after reset, status=0x%08x\n", v));
1892                         if (v & EHCI_PS_PR) {
1893                                 device_printf(sc->sc_bus.bdev,
1894                                     "port reset timeout\n");
1895                                 return (USBD_TIMEOUT);
1896                         }
1897                         if (!(v & EHCI_PS_PE)) {
1898                                 /* Not a high speed device, give up ownership.*/
1899                                 ehci_disown(sc, index, 0);
1900                                 break;
1901                         }
1902                         sc->sc_isreset = 1;
1903                         DPRINTF(("ehci port %d reset, status = 0x%08x\n",
1904                                  index, v));
1905                         break;
1906                 case UHF_PORT_POWER:
1907                         DPRINTFN(2,("ehci_root_ctrl_start: set port power "
1908                                     "%d\n", index));
1909                         EOWRITE4(sc, port, v | EHCI_PS_PP);
1910                         break;
1911                 case UHF_PORT_TEST:
1912                         DPRINTFN(2,("ehci_root_ctrl_start: set port test "
1913                                     "%d\n", index));
1914                         break;
1915                 case UHF_PORT_INDICATOR:
1916                         DPRINTFN(2,("ehci_root_ctrl_start: set port ind "
1917                                     "%d\n", index));
1918                         EOWRITE4(sc, port, v | EHCI_PS_PIC);
1919                         break;
1920                 default:
1921                         err = USBD_IOERROR;
1922                         goto ret;
1923                 }
1924                 break;
1925         case C(UR_CLEAR_TT_BUFFER, UT_WRITE_CLASS_OTHER):
1926         case C(UR_RESET_TT, UT_WRITE_CLASS_OTHER):
1927         case C(UR_GET_TT_STATE, UT_READ_CLASS_OTHER):
1928         case C(UR_STOP_TT, UT_WRITE_CLASS_OTHER):
1929                 break;
1930         default:
1931                 err = USBD_IOERROR;
1932                 goto ret;
1933         }
1934         xfer->actlen = totlen;
1935         err = USBD_NORMAL_COMPLETION;
1936  ret:
1937         xfer->status = err;
1938         crit_enter();
1939         usb_transfer_complete(xfer);
1940         crit_exit();
1941         return (USBD_IN_PROGRESS);
1942 }
1943
1944 void
1945 ehci_disown(ehci_softc_t *sc, int index, int lowspeed)
1946 {
1947         int port;
1948         u_int32_t v;
1949
1950         DPRINTF(("ehci_disown: index=%d lowspeed=%d\n", index, lowspeed));
1951 #ifdef DIAGNOSTIC
1952         if (sc->sc_npcomp != 0) {
1953                 int i = (index-1) / sc->sc_npcomp;
1954                 if (i >= sc->sc_ncomp)
1955                         device_printf(sc->sc_bus.bdev, "strange port\n");
1956                 else
1957                         device_printf(sc->sc_bus.bdev,
1958                             "handing over %s speed device on port %d to %s\n",
1959                             lowspeed ? "low" : "full",
1960                             index, device_get_nameunit(sc->sc_comps[i]->bdev));
1961         } else {
1962                 device_printf(sc->sc_bus.bdev, "npcomp == 0\n");
1963         }
1964 #endif
1965         port = EHCI_PORTSC(index);
1966         v = EOREAD4(sc, port) &~ EHCI_PS_CLEAR;
1967         EOWRITE4(sc, port, v | EHCI_PS_PO);
1968 }
1969
1970 /* Abort a root control request. */
1971 static void
1972 ehci_root_ctrl_abort(usbd_xfer_handle xfer)
1973 {
1974         /* Nothing to do, all transfers are synchronous. */
1975 }
1976
1977 /* Close the root pipe. */
1978 static void
1979 ehci_root_ctrl_close(usbd_pipe_handle pipe)
1980 {
1981         DPRINTF(("ehci_root_ctrl_close\n"));
1982         /* Nothing to do. */
1983 }
1984
1985 void
1986 ehci_root_intr_done(usbd_xfer_handle xfer)
1987 {
1988 }
1989
1990 static usbd_status
1991 ehci_root_intr_transfer(usbd_xfer_handle xfer)
1992 {
1993         usbd_status err;
1994
1995         /* Insert last in queue. */
1996         err = usb_insert_transfer(xfer);
1997         if (err)
1998                 return (err);
1999
2000         /* Pipe isn't running, start first */
2001         return (ehci_root_intr_start(STAILQ_FIRST(&xfer->pipe->queue)));
2002 }
2003
2004 static usbd_status
2005 ehci_root_intr_start(usbd_xfer_handle xfer)
2006 {
2007         usbd_pipe_handle pipe = xfer->pipe;
2008         ehci_softc_t *sc = (ehci_softc_t *)pipe->device->bus;
2009
2010         if (sc->sc_dying)
2011                 return (USBD_IOERROR);
2012
2013         sc->sc_intrxfer = xfer;
2014
2015         return (USBD_IN_PROGRESS);
2016 }
2017
2018 /* Abort a root interrupt request. */
2019 static void
2020 ehci_root_intr_abort(usbd_xfer_handle xfer)
2021 {
2022         if (xfer->pipe->intrxfer == xfer) {
2023                 DPRINTF(("ehci_root_intr_abort: remove\n"));
2024                 xfer->pipe->intrxfer = NULL;
2025         }
2026         xfer->status = USBD_CANCELLED;
2027         crit_enter();
2028         usb_transfer_complete(xfer);
2029         crit_exit();
2030 }
2031
2032 /* Close the root pipe. */
2033 static void
2034 ehci_root_intr_close(usbd_pipe_handle pipe)
2035 {
2036         ehci_softc_t *sc = (ehci_softc_t *)pipe->device->bus;
2037
2038         DPRINTF(("ehci_root_intr_close\n"));
2039
2040         sc->sc_intrxfer = NULL;
2041 }
2042
2043 void
2044 ehci_root_ctrl_done(usbd_xfer_handle xfer)
2045 {
2046 }
2047
2048 /************************/
2049
2050 ehci_soft_qh_t *
2051 ehci_alloc_sqh(ehci_softc_t *sc)
2052 {
2053         ehci_soft_qh_t *sqh;
2054         usbd_status err;
2055         int i, offs;
2056         usb_dma_t dma;
2057
2058         if (sc->sc_freeqhs == NULL) {
2059                 DPRINTFN(2, ("ehci_alloc_sqh: allocating chunk\n"));
2060                 err = usb_allocmem(&sc->sc_bus, EHCI_SQH_SIZE * EHCI_SQH_CHUNK,
2061                           EHCI_PAGE_SIZE, &dma);
2062 #ifdef EHCI_DEBUG
2063                 if (err)
2064                         kprintf("ehci_alloc_sqh: usb_allocmem()=%d\n", err);
2065 #endif
2066                 if (err)
2067                         return (NULL);
2068                 for(i = 0; i < EHCI_SQH_CHUNK; i++) {
2069                         offs = i * EHCI_SQH_SIZE;
2070                         sqh = KERNADDR(&dma, offs);
2071                         sqh->physaddr = DMAADDR(&dma, offs);
2072                         sqh->next = sc->sc_freeqhs;
2073                         sc->sc_freeqhs = sqh;
2074                 }
2075         }
2076         sqh = sc->sc_freeqhs;
2077         sc->sc_freeqhs = sqh->next;
2078         memset(&sqh->qh, 0, sizeof(ehci_qh_t));
2079         sqh->next = NULL;
2080         sqh->prev = NULL;
2081         return (sqh);
2082 }
2083
2084 void
2085 ehci_free_sqh(ehci_softc_t *sc, ehci_soft_qh_t *sqh)
2086 {
2087         sqh->next = sc->sc_freeqhs;
2088         sc->sc_freeqhs = sqh;
2089 }
2090
2091 ehci_soft_qtd_t *
2092 ehci_alloc_sqtd(ehci_softc_t *sc)
2093 {
2094         ehci_soft_qtd_t *sqtd;
2095         usbd_status err;
2096         int i, offs;
2097         usb_dma_t dma;
2098
2099         if (sc->sc_freeqtds == NULL) {
2100                 DPRINTFN(2, ("ehci_alloc_sqtd: allocating chunk\n"));
2101                 err = usb_allocmem(&sc->sc_bus, EHCI_SQTD_SIZE*EHCI_SQTD_CHUNK,
2102                           EHCI_PAGE_SIZE, &dma);
2103 #ifdef EHCI_DEBUG
2104                 if (err)
2105                         kprintf("ehci_alloc_sqtd: usb_allocmem()=%d\n", err);
2106 #endif
2107                 if (err)
2108                         return (NULL);
2109                 crit_enter();
2110                 for(i = 0; i < EHCI_SQTD_CHUNK; i++) {
2111                         offs = i * EHCI_SQTD_SIZE;
2112                         sqtd = KERNADDR(&dma, offs);
2113                         sqtd->physaddr = DMAADDR(&dma, offs);
2114                         sqtd->nextqtd = sc->sc_freeqtds;
2115                         sc->sc_freeqtds = sqtd;
2116                 }
2117                 crit_exit();
2118         }
2119
2120         crit_enter();
2121         sqtd = sc->sc_freeqtds;
2122         sc->sc_freeqtds = sqtd->nextqtd;
2123         memset(&sqtd->qtd, 0, sizeof(ehci_qtd_t));
2124         sqtd->nextqtd = NULL;
2125         sqtd->xfer = NULL;
2126         crit_exit();
2127
2128         return (sqtd);
2129 }
2130
2131 void
2132 ehci_free_sqtd(ehci_softc_t *sc, ehci_soft_qtd_t *sqtd)
2133 {
2134         crit_enter();
2135         sqtd->nextqtd = sc->sc_freeqtds;
2136         sc->sc_freeqtds = sqtd;
2137         crit_exit();
2138 }
2139
2140 usbd_status
2141 ehci_alloc_sqtd_chain(struct ehci_pipe *epipe, ehci_softc_t *sc,
2142                      int alen, int rd, usbd_xfer_handle xfer,
2143                      ehci_soft_qtd_t **sp, ehci_soft_qtd_t **ep)
2144 {
2145         ehci_soft_qtd_t *next, *cur;
2146         ehci_physaddr_t dataphys, dataphyspage, dataphyslastpage, nextphys;
2147         u_int32_t qtdstatus;
2148         int len, curlen, mps, offset;
2149         int i, iscontrol;
2150         usb_dma_t *dma = &xfer->dmabuf;
2151
2152         DPRINTFN(alen<4*4096,("ehci_alloc_sqtd_chain: start len=%d\n", alen));
2153
2154         offset = 0;
2155         len = alen;
2156         iscontrol = (epipe->pipe.endpoint->edesc->bmAttributes & UE_XFERTYPE) ==
2157             UE_CONTROL;
2158         dataphys = DMAADDR(dma, 0);
2159         dataphyslastpage = EHCI_PAGE(DMAADDR(dma, len - 1));
2160         qtdstatus = EHCI_QTD_ACTIVE |
2161             EHCI_QTD_SET_PID(rd ? EHCI_QTD_PID_IN : EHCI_QTD_PID_OUT) |
2162             EHCI_QTD_SET_CERR(3)
2163             /* IOC set below */
2164             /* BYTES set below */
2165             ;
2166         mps = UGETW(epipe->pipe.endpoint->edesc->wMaxPacketSize);
2167         /*
2168          * The control transfer data stage always starts with a toggle of 1.
2169          * For other transfers we let the hardware track the toggle state.
2170          */
2171         if (iscontrol)
2172                 qtdstatus |= EHCI_QTD_SET_TOGGLE(1);
2173
2174         cur = ehci_alloc_sqtd(sc);
2175         *sp = cur;
2176         if (cur == NULL)
2177                 goto nomem;
2178         for (;;) {
2179                 dataphyspage = EHCI_PAGE(dataphys);
2180                 /* XXX This is pretty broken: Because we do not allocate
2181                  * a contiguous buffer (contiguous in physical pages) we
2182                  * can only transfer one page in one go.
2183                  * So check whether the start and end of the buffer are on
2184                  * the same page.
2185                  */
2186                 if (dataphyspage == dataphyslastpage) {
2187                         curlen = len;
2188                 }
2189                 else {
2190                         /* See comment above (XXX) */
2191                         curlen = EHCI_PAGE_SIZE -
2192                                  EHCI_PAGE_MASK(dataphys);
2193                         /* the length must be a multiple of the max size */
2194                         curlen -= curlen % mps;
2195                         DPRINTFN(1,("ehci_alloc_sqtd_chain: multiple QTDs, "
2196                                     "curlen=%d\n", curlen));
2197                         KASSERT(curlen != 0, ("ehci_alloc_std: curlen == 0"));
2198                 }
2199                 DPRINTFN(4,("ehci_alloc_sqtd_chain: dataphys=0x%08x "
2200                             "dataphyslastpage=0x%08x len=%d curlen=%d\n",
2201                             dataphys, dataphyslastpage,
2202                             len, curlen));
2203                 len -= curlen;
2204
2205                 if (len != 0) {
2206                         next = ehci_alloc_sqtd(sc);
2207                         if (next == NULL)
2208                                 goto nomem;
2209                         nextphys = htole32(next->physaddr);
2210                 } else {
2211                         next = NULL;
2212                         nextphys = EHCI_NULL;
2213                 }
2214
2215                 for (i = 0; i * EHCI_PAGE_SIZE < curlen; i++) {
2216                         ehci_physaddr_t a = dataphys + i * EHCI_PAGE_SIZE;
2217                         if (i != 0) /* use offset only in first buffer */
2218                                 a = EHCI_PAGE(a);
2219                         cur->qtd.qtd_buffer[i] = htole32(a);
2220                         cur->qtd.qtd_buffer_hi[i] = 0;
2221 #ifdef DIAGNOSTIC
2222                         if (i >= EHCI_QTD_NBUFFERS) {
2223                                 kprintf("ehci_alloc_sqtd_chain: i=%d\n", i);
2224                                 goto nomem;
2225                         }
2226 #endif
2227                 }
2228                 cur->nextqtd = next;
2229                 cur->qtd.qtd_next = cur->qtd.qtd_altnext = nextphys;
2230                 cur->qtd.qtd_status =
2231                     htole32(qtdstatus | EHCI_QTD_SET_BYTES(curlen));
2232                 cur->xfer = xfer;
2233                 cur->len = curlen;
2234                 DPRINTFN(10,("ehci_alloc_sqtd_chain: cbp=0x%08x end=0x%08x\n",
2235                             dataphys, dataphys + curlen));
2236                 if (iscontrol) {
2237                         /*
2238                          * adjust the toggle based on the number of packets
2239                          * in this qtd
2240                          */
2241                         if (((curlen + mps - 1) / mps) & 1)
2242                                 qtdstatus ^= EHCI_QTD_TOGGLE_MASK;
2243                 }
2244                 if (len == 0)
2245                         break;
2246                 DPRINTFN(10,("ehci_alloc_sqtd_chain: extend chain\n"));
2247                 offset += curlen;
2248                 dataphys = DMAADDR(dma, offset);
2249                 cur = next;
2250         }
2251         cur->qtd.qtd_status |= htole32(EHCI_QTD_IOC);
2252         *ep = cur;
2253
2254         DPRINTFN(10,("ehci_alloc_sqtd_chain: return sqtd=%p sqtdend=%p\n",
2255                      *sp, *ep));
2256
2257         return (USBD_NORMAL_COMPLETION);
2258
2259  nomem:
2260         /* XXX free chain */
2261         DPRINTFN(-1,("ehci_alloc_sqtd_chain: no memory\n"));
2262         return (USBD_NOMEM);
2263 }
2264
2265 static void
2266 ehci_free_sqtd_chain(ehci_softc_t *sc, ehci_soft_qtd_t *sqtd,
2267                     ehci_soft_qtd_t *sqtdend)
2268 {
2269         ehci_soft_qtd_t *p;
2270         int i;
2271
2272         DPRINTFN(10,("ehci_free_sqtd_chain: sqtd=%p sqtdend=%p\n",
2273                      sqtd, sqtdend));
2274
2275         for (i = 0; sqtd != sqtdend; sqtd = p, i++) {
2276                 p = sqtd->nextqtd;
2277                 ehci_free_sqtd(sc, sqtd);
2278         }
2279 }
2280
2281 /****************/
2282
2283 /*
2284  * Close a reqular pipe.
2285  * Assumes that there are no pending transactions.
2286  */
2287 void
2288 ehci_close_pipe(usbd_pipe_handle pipe, ehci_soft_qh_t *head)
2289 {
2290         struct ehci_pipe *epipe = (struct ehci_pipe *)pipe;
2291         ehci_softc_t *sc = (ehci_softc_t *)pipe->device->bus;
2292         ehci_soft_qh_t *sqh = epipe->sqh;
2293
2294         crit_enter();
2295         ehci_rem_qh(sc, sqh, head);
2296         crit_exit();
2297         pipe->endpoint->savedtoggle =
2298             EHCI_QTD_GET_TOGGLE(le32toh(sqh->qh.qh_qtd.qtd_status));
2299         ehci_free_sqh(sc, epipe->sqh);
2300 }
2301
2302 /*
2303  * Abort a device request.
2304  * If this routine is called from a critical section it guarantees that the
2305  * request will be removed from the hardware scheduling and that the callback
2306  * for it will be called with USBD_CANCELLED status.
2307  * It's impossible to guarantee that the requested transfer will not
2308  * have happened since the hardware runs concurrently.
2309  * If the transaction has already happened we rely on the ordinary
2310  * interrupt processing to process it.
2311  * XXX This is most probably wrong.
2312  */
2313 void
2314 ehci_abort_xfer(usbd_xfer_handle xfer, usbd_status status)
2315 {
2316 #define exfer EXFER(xfer)
2317         struct ehci_pipe *epipe = (struct ehci_pipe *)xfer->pipe;
2318         ehci_softc_t *sc = (ehci_softc_t *)epipe->pipe.device->bus;
2319         ehci_soft_qh_t *sqh = epipe->sqh;
2320         ehci_soft_qtd_t *sqtd, *snext, **psqtd;
2321         ehci_physaddr_t cur, us, next;
2322         int hit;
2323         /* int count = 0; */
2324         ehci_soft_qh_t *psqh;
2325
2326         DPRINTF(("ehci_abort_xfer: xfer=%p pipe=%p\n", xfer, epipe));
2327
2328         if (sc->sc_dying) {
2329                 /* If we're dying, just do the software part. */
2330                 crit_enter();
2331                 xfer->status = status;  /* make software ignore it */
2332                 callout_stop(&xfer->timeout_handle);
2333                 usb_rem_task(epipe->pipe.device, &exfer->abort_task);
2334                 usb_transfer_complete(xfer);
2335                 crit_exit();
2336                 return;
2337         }
2338
2339         if (xfer->device->bus->intr_context /* || !curproc REMOVED DFly */)
2340                 panic("ehci_abort_xfer: not in process context");
2341
2342         /*
2343          * If an abort is already in progress then just wait for it to
2344          * complete and return.
2345          */
2346         if (exfer->ehci_xfer_flags & EHCI_XFER_ABORTING) {
2347                 DPRINTFN(2, ("ehci_abort_xfer: already aborting\n"));
2348                 /* No need to wait if we're aborting from a timeout. */
2349                 if (status == USBD_TIMEOUT)
2350                         return;
2351                 /* Override the status which might be USBD_TIMEOUT. */
2352                 xfer->status = status;
2353                 DPRINTFN(2, ("ehci_abort_xfer: waiting for abort to finish\n"));
2354                 exfer->ehci_xfer_flags |= EHCI_XFER_ABORTWAIT;
2355                 while (exfer->ehci_xfer_flags & EHCI_XFER_ABORTING)
2356                         tsleep(&exfer->ehci_xfer_flags, 0, "ehciaw", 0);
2357                 return;
2358         }
2359
2360         /*
2361          * Step 1: Make interrupt routine and timeouts ignore xfer.
2362          */
2363         crit_enter();
2364         exfer->ehci_xfer_flags |= EHCI_XFER_ABORTING;
2365         xfer->status = status;  /* make software ignore it */
2366         callout_stop(&xfer->timeout_handle);
2367         usb_rem_task(epipe->pipe.device, &exfer->abort_task);
2368         crit_exit();
2369
2370         /*
2371          * Step 2: Wait until we know hardware has finished any possible
2372          * use of the xfer. We do this by removing the entire
2373          * queue from the async schedule and waiting for the doorbell.
2374          * Nothing else should be touching the queue now.
2375          */
2376         psqh = sqh->prev;
2377         ehci_rem_qh(sc, sqh, psqh);
2378
2379         /*
2380          * Step 3:  make sure the soft interrupt routine
2381          * has run. This should remove any completed items off the queue.
2382          * The hardware has no reference to completed items (TDs).
2383          * It's safe to remove them at any time.
2384          */
2385         crit_enter();
2386 #ifdef USB_USE_SOFTINTR
2387         sc->sc_softwake = 1;
2388 #endif /* USB_USE_SOFTINTR */
2389         usb_schedsoftintr(&sc->sc_bus);
2390 #ifdef USB_USE_SOFTINTR
2391         tsleep(&sc->sc_softwake, 0, "ehciab", 0);
2392 #endif /* USB_USE_SOFTINTR */
2393
2394         /*
2395          * Step 4: Remove any vestiges of the xfer from the hardware.
2396          * The complication here is that the hardware may have executed
2397          * into or even beyond the xfer we're trying to abort.
2398          * So as we're scanning the TDs of this xfer we check if
2399          * the hardware points to any of them.
2400          *
2401          * first we need to see if there are any transfers
2402          * on this queue before the xfer we are aborting.. we need
2403          * to update any pointers that point to us to point past
2404          * the aborting xfer.  (If there is something past us).
2405          * Hardware and software.
2406          */
2407         cur = EHCI_LINK_ADDR(le32toh(sqh->qh.qh_curqtd));
2408         hit = 0;
2409
2410         /* If they initially point here. */
2411         us = exfer->sqtdstart->physaddr;
2412
2413         /* We will change them to point here */
2414         snext = exfer->sqtdend->nextqtd;
2415         next = snext ? htole32(snext->physaddr) : EHCI_NULL;
2416
2417         /*
2418          * Now loop through any qTDs before us and keep track of the pointer
2419          * that points to us for the end.
2420          */
2421         psqtd = &sqh->sqtd;
2422         sqtd = sqh->sqtd;
2423         while (sqtd && sqtd != exfer->sqtdstart) {
2424                 hit |= (cur == sqtd->physaddr);
2425                 if (EHCI_LINK_ADDR(le32toh(sqtd->qtd.qtd_next)) == us)
2426                         sqtd->qtd.qtd_next = next;
2427                 if (EHCI_LINK_ADDR(le32toh(sqtd->qtd.qtd_altnext)) == us)
2428                         sqtd->qtd.qtd_altnext = next;
2429                 psqtd = &sqtd->nextqtd;
2430                 sqtd = sqtd->nextqtd;
2431         }
2432                 /* make the software pointer bypass us too */
2433         *psqtd = exfer->sqtdend->nextqtd;
2434
2435         /*
2436          * If we already saw the active one then we are pretty much done.
2437          * We've done all the relinking we need to do.
2438          */
2439         if (!hit) {
2440
2441                 /*
2442                  * Now reinitialise the QH to point to the next qTD
2443                  * (if there is one). We only need to do this if
2444                  * it was previously pointing to us.
2445                  */
2446                 for (sqtd = exfer->sqtdstart; ; sqtd = sqtd->nextqtd) {
2447                         if (cur == sqtd->physaddr) {
2448                                 hit++;
2449                         }
2450                         if (sqtd == exfer->sqtdend)
2451                                 break;
2452                 }
2453                 sqtd = sqtd->nextqtd;
2454                 /*
2455                  * Only need to alter the QH if it was pointing at a qTD
2456                  * that we are removing.
2457                  */
2458                 if (hit) {
2459                         if (snext) {
2460                                 ehci_set_qh_qtd(sqh, snext);
2461                         } else {
2462
2463                                 sqh->qh.qh_curqtd = 0; /* unlink qTDs */
2464                                 sqh->qh.qh_qtd.qtd_status &=
2465                                     htole32(EHCI_QTD_TOGGLE_MASK);
2466                                 sqh->qh.qh_qtd.qtd_next =
2467                                     sqh->qh.qh_qtd.qtd_altnext
2468                                         = EHCI_NULL;
2469                                 DPRINTFN(1,("ehci_abort_xfer: no hit\n"));
2470                         }
2471                 }
2472         }
2473         ehci_add_qh(sqh, psqh);
2474         /*
2475          * Step 5: Execute callback.
2476          */
2477 #ifdef DIAGNOSTIC
2478         exfer->isdone = 1;
2479 #endif
2480         /* Do the wakeup first to avoid touching the xfer after the callback. */
2481         exfer->ehci_xfer_flags &= ~EHCI_XFER_ABORTING;
2482         if (exfer->ehci_xfer_flags & EHCI_XFER_ABORTWAIT) {
2483                 exfer->ehci_xfer_flags &= ~EHCI_XFER_ABORTWAIT;
2484                 wakeup(&exfer->ehci_xfer_flags);
2485         }
2486         usb_transfer_complete(xfer);
2487
2488         /* kprintf("%s: %d TDs aborted\n", __func__, count); */
2489         crit_exit();
2490 #undef exfer
2491 }
2492
2493 void
2494 ehci_timeout(void *addr)
2495 {
2496         struct ehci_xfer *exfer = addr;
2497         struct ehci_pipe *epipe = (struct ehci_pipe *)exfer->xfer.pipe;
2498         ehci_softc_t *sc = (ehci_softc_t *)epipe->pipe.device->bus;
2499
2500         DPRINTF(("ehci_timeout: exfer=%p\n", exfer));
2501 #ifdef USB_DEBUG
2502         if (ehcidebug > 1)
2503                 usbd_dump_pipe(exfer->xfer.pipe);
2504 #endif
2505
2506         if (sc->sc_dying) {
2507                 ehci_abort_xfer(&exfer->xfer, USBD_TIMEOUT);
2508                 return;
2509         }
2510
2511         /* Execute the abort in a process context. */
2512         usb_add_task(exfer->xfer.pipe->device, &exfer->abort_task,
2513                      USB_TASKQ_HC);
2514 }
2515
2516 void
2517 ehci_timeout_task(void *addr)
2518 {
2519         usbd_xfer_handle xfer = addr;
2520
2521         DPRINTF(("ehci_timeout_task: xfer=%p\n", xfer));
2522         crit_enter();
2523         ehci_abort_xfer(xfer, USBD_TIMEOUT);
2524         crit_exit();
2525 }
2526
2527 /*
2528  * Some EHCI chips from VIA / ATI seem to trigger interrupts before writing
2529  * back the qTD status, or miss signalling occasionally under heavy load.
2530  * If the host machine is too fast, we can miss transaction completion - when
2531  * we scan the active list the transaction still seems to be active. This
2532  * generally exhibits itself as a umass stall that never recovers.
2533  *
2534  * We work around this behaviour by setting up this callback after any softintr
2535  * that completes with transactions still pending, giving us another chance to
2536  * check for completion after the writeback has taken place.
2537  */
2538 void
2539 ehci_intrlist_timeout(void *arg)
2540 {
2541         ehci_softc_t *sc = arg;
2542
2543         DPRINTFN(3, ("ehci_intrlist_timeout\n"));
2544         usb_schedsoftintr(&sc->sc_bus);
2545 }
2546
2547 /************************/
2548
2549 static usbd_status
2550 ehci_device_ctrl_transfer(usbd_xfer_handle xfer)
2551 {
2552         usbd_status err;
2553
2554         /* Insert last in queue. */
2555         err = usb_insert_transfer(xfer);
2556         if (err)
2557                 return (err);
2558
2559         /* Pipe isn't running, start first */
2560         return (ehci_device_ctrl_start(STAILQ_FIRST(&xfer->pipe->queue)));
2561 }
2562
2563 static usbd_status
2564 ehci_device_ctrl_start(usbd_xfer_handle xfer)
2565 {
2566         ehci_softc_t *sc = (ehci_softc_t *)xfer->pipe->device->bus;
2567         usbd_status err;
2568
2569         if (sc->sc_dying)
2570                 return (USBD_IOERROR);
2571
2572 #ifdef DIAGNOSTIC
2573         if (!(xfer->rqflags & URQ_REQUEST)) {
2574                 /* XXX panic */
2575                 kprintf("ehci_device_ctrl_transfer: not a request\n");
2576                 return (USBD_INVAL);
2577         }
2578 #endif
2579
2580         err = ehci_device_request(xfer);
2581         if (err)
2582                 return (err);
2583
2584         if (sc->sc_bus.use_polling)
2585                 ehci_waitintr(sc, xfer);
2586         return (USBD_IN_PROGRESS);
2587 }
2588
2589 void
2590 ehci_device_ctrl_done(usbd_xfer_handle xfer)
2591 {
2592         struct ehci_xfer *ex = EXFER(xfer);
2593         ehci_softc_t *sc = (ehci_softc_t *)xfer->pipe->device->bus;
2594         /*struct ehci_pipe *epipe = (struct ehci_pipe *)xfer->pipe;*/
2595
2596         DPRINTFN(10,("ehci_ctrl_done: xfer=%p\n", xfer));
2597
2598 #ifdef DIAGNOSTIC
2599         if (!(xfer->rqflags & URQ_REQUEST)) {
2600                 panic("ehci_ctrl_done: not a request");
2601         }
2602 #endif
2603
2604         if (xfer->status != USBD_NOMEM && ehci_active_intr_list(ex)) {
2605                 ehci_del_intr_list(ex); /* remove from active list */
2606                 ehci_free_sqtd_chain(sc, ex->sqtdstart, NULL);
2607         }
2608
2609         DPRINTFN(5, ("ehci_ctrl_done: length=%d\n", xfer->actlen));
2610 }
2611
2612 /* Abort a device control request. */
2613 static void
2614 ehci_device_ctrl_abort(usbd_xfer_handle xfer)
2615 {
2616         DPRINTF(("ehci_device_ctrl_abort: xfer=%p\n", xfer));
2617         ehci_abort_xfer(xfer, USBD_CANCELLED);
2618 }
2619
2620 /* Close a device control pipe. */
2621 static void
2622 ehci_device_ctrl_close(usbd_pipe_handle pipe)
2623 {
2624         ehci_softc_t *sc = (ehci_softc_t *)pipe->device->bus;
2625         /*struct ehci_pipe *epipe = (struct ehci_pipe *)pipe;*/
2626
2627         DPRINTF(("ehci_device_ctrl_close: pipe=%p\n", pipe));
2628         ehci_close_pipe(pipe, sc->sc_async_head);
2629 }
2630
2631 usbd_status
2632 ehci_device_request(usbd_xfer_handle xfer)
2633 {
2634 #define exfer EXFER(xfer)
2635         struct ehci_pipe *epipe = (struct ehci_pipe *)xfer->pipe;
2636         usb_device_request_t *req = &xfer->request;
2637         usbd_device_handle dev = epipe->pipe.device;
2638         ehci_softc_t *sc = (ehci_softc_t *)dev->bus;
2639         int addr = dev->address;
2640         ehci_soft_qtd_t *setup, *stat, *next;
2641         ehci_soft_qh_t *sqh;
2642         int isread;
2643         int len;
2644         usbd_status err;
2645
2646         isread = req->bmRequestType & UT_READ;
2647         len = UGETW(req->wLength);
2648
2649         DPRINTFN(3,("ehci_device_request: type=0x%02x, request=0x%02x, "
2650                     "wValue=0x%04x, wIndex=0x%04x len=%d, addr=%d, endpt=%d\n",
2651                     req->bmRequestType, req->bRequest, UGETW(req->wValue),
2652                     UGETW(req->wIndex), len, addr,
2653                     epipe->pipe.endpoint->edesc->bEndpointAddress));
2654
2655         setup = ehci_alloc_sqtd(sc);
2656         if (setup == NULL) {
2657                 err = USBD_NOMEM;
2658                 goto bad1;
2659         }
2660         stat = ehci_alloc_sqtd(sc);
2661         if (stat == NULL) {
2662                 err = USBD_NOMEM;
2663                 goto bad2;
2664         }
2665
2666         sqh = epipe->sqh;
2667         epipe->u.ctl.length = len;
2668
2669         /* Update device address and length since they may have changed
2670            during the setup of the control pipe in usbd_new_device(). */
2671         /* XXX This only needs to be done once, but it's too early in open. */
2672         /* XXXX Should not touch ED here! */
2673         sqh->qh.qh_endp =
2674             (sqh->qh.qh_endp & htole32(~(EHCI_QH_ADDRMASK | EHCI_QH_MPLMASK))) |
2675             htole32(
2676              EHCI_QH_SET_ADDR(addr) |
2677              EHCI_QH_SET_MPL(UGETW(epipe->pipe.endpoint->edesc->wMaxPacketSize))
2678             );
2679
2680         /* Set up data transaction */
2681         if (len != 0) {
2682                 ehci_soft_qtd_t *end;
2683
2684                 err = ehci_alloc_sqtd_chain(epipe, sc, len, isread, xfer,
2685                           &next, &end);
2686                 if (err)
2687                         goto bad3;
2688                 end->qtd.qtd_status &= htole32(~EHCI_QTD_IOC);
2689                 end->nextqtd = stat;
2690                 end->qtd.qtd_next =
2691                 end->qtd.qtd_altnext = htole32(stat->physaddr);
2692         } else {
2693                 next = stat;
2694         }
2695
2696         memcpy(KERNADDR(&epipe->u.ctl.reqdma, 0), req, sizeof *req);
2697
2698         /* Clear toggle */
2699         setup->qtd.qtd_status = htole32(
2700             EHCI_QTD_ACTIVE |
2701             EHCI_QTD_SET_PID(EHCI_QTD_PID_SETUP) |
2702             EHCI_QTD_SET_CERR(3) |
2703             EHCI_QTD_SET_TOGGLE(0) |
2704             EHCI_QTD_SET_BYTES(sizeof *req)
2705             );
2706         setup->qtd.qtd_buffer[0] = htole32(DMAADDR(&epipe->u.ctl.reqdma, 0));
2707         setup->qtd.qtd_buffer_hi[0] = 0;
2708         setup->nextqtd = next;
2709         setup->qtd.qtd_next = setup->qtd.qtd_altnext = htole32(next->physaddr);
2710         setup->xfer = xfer;
2711         setup->len = sizeof *req;
2712
2713         stat->qtd.qtd_status = htole32(
2714             EHCI_QTD_ACTIVE |
2715             EHCI_QTD_SET_PID(isread ? EHCI_QTD_PID_OUT : EHCI_QTD_PID_IN) |
2716             EHCI_QTD_SET_CERR(3) |
2717             EHCI_QTD_SET_TOGGLE(1) |
2718             EHCI_QTD_IOC
2719             );
2720         stat->qtd.qtd_buffer[0] = 0; /* XXX not needed? */
2721         stat->qtd.qtd_buffer_hi[0] = 0; /* XXX not needed? */
2722         stat->nextqtd = NULL;
2723         stat->qtd.qtd_next = stat->qtd.qtd_altnext = EHCI_NULL;
2724         stat->xfer = xfer;
2725         stat->len = 0;
2726
2727 #ifdef EHCI_DEBUG
2728         if (ehcidebug > 5) {
2729                 DPRINTF(("ehci_device_request:\n"));
2730                 ehci_dump_sqh(sqh);
2731                 ehci_dump_sqtds(setup);
2732         }
2733 #endif
2734
2735         exfer->sqtdstart = setup;
2736         exfer->sqtdend = stat;
2737 #ifdef DIAGNOSTIC
2738         if (!exfer->isdone) {
2739                 kprintf("ehci_device_request: not done, exfer=%p\n", exfer);
2740         }
2741         exfer->isdone = 0;
2742 #endif
2743
2744         /* Insert qTD in QH list. */
2745         crit_enter();
2746         ehci_set_qh_qtd(sqh, setup);
2747         if (xfer->timeout && !sc->sc_bus.use_polling) {
2748                 callout_reset(&xfer->timeout_handle, MS_TO_TICKS(xfer->timeout),
2749                             ehci_timeout, xfer);
2750         }
2751         ehci_add_intr_list(sc, exfer);
2752         xfer->status = USBD_IN_PROGRESS;
2753         crit_exit();
2754
2755 #ifdef EHCI_DEBUG
2756         if (ehcidebug > 10) {
2757                 DPRINTF(("ehci_device_request: status=%x\n",
2758                          EOREAD4(sc, EHCI_USBSTS)));
2759                 DELAY(10000);
2760                 ehci_dump_regs(sc);
2761                 ehci_dump_sqh(sc->sc_async_head);
2762                 ehci_dump_sqh(sqh);
2763                 ehci_dump_sqtds(setup);
2764         }
2765 #endif
2766
2767         return (USBD_NORMAL_COMPLETION);
2768
2769  bad3:
2770         ehci_free_sqtd(sc, stat);
2771  bad2:
2772         ehci_free_sqtd(sc, setup);
2773  bad1:
2774         DPRINTFN(-1,("ehci_device_request: no memory\n"));
2775         xfer->status = err;
2776         usb_transfer_complete(xfer);
2777         return (err);
2778 #undef exfer
2779 }
2780
2781 /************************/
2782
2783 static usbd_status
2784 ehci_device_bulk_transfer(usbd_xfer_handle xfer)
2785 {
2786         usbd_status err;
2787
2788         /* Insert last in queue. */
2789         err = usb_insert_transfer(xfer);
2790         if (err)
2791                 return (err);
2792
2793         /* Pipe isn't running, start first */
2794         return (ehci_device_bulk_start(STAILQ_FIRST(&xfer->pipe->queue)));
2795 }
2796
2797 usbd_status
2798 ehci_device_bulk_start(usbd_xfer_handle xfer)
2799 {
2800 #define exfer EXFER(xfer)
2801         struct ehci_pipe *epipe = (struct ehci_pipe *)xfer->pipe;
2802         usbd_device_handle dev = epipe->pipe.device;
2803         ehci_softc_t *sc = (ehci_softc_t *)dev->bus;
2804         ehci_soft_qtd_t *data, *dataend;
2805         ehci_soft_qh_t *sqh;
2806         usbd_status err;
2807         int len, isread, endpt;
2808
2809         DPRINTFN(2, ("ehci_device_bulk_start: xfer=%p len=%d flags=%d\n",
2810                      xfer, xfer->length, xfer->flags));
2811
2812         if (sc->sc_dying)
2813                 return (USBD_IOERROR);
2814
2815 #ifdef DIAGNOSTIC
2816         if (xfer->rqflags & URQ_REQUEST)
2817                 panic("ehci_device_bulk_start: a request");
2818 #endif
2819
2820         len = xfer->length;
2821         endpt = epipe->pipe.endpoint->edesc->bEndpointAddress;
2822         isread = UE_GET_DIR(endpt) == UE_DIR_IN;
2823         sqh = epipe->sqh;
2824
2825         epipe->u.bulk.length = len;
2826
2827         err = ehci_alloc_sqtd_chain(epipe, sc, len, isread, xfer, &data,
2828                                    &dataend);
2829         if (err) {
2830                 DPRINTFN(-1,("ehci_device_bulk_start: no memory\n"));
2831                 xfer->status = err;
2832                 usb_transfer_complete(xfer);
2833                 return (err);
2834         }
2835
2836 #ifdef EHCI_DEBUG
2837         if (ehcidebug > 5) {
2838                 DPRINTF(("ehci_device_bulk_start: data(1)\n"));
2839                 ehci_dump_sqh(sqh);
2840                 ehci_dump_sqtds(data);
2841         }
2842 #endif
2843
2844         /* Set up interrupt info. */
2845         exfer->sqtdstart = data;
2846         exfer->sqtdend = dataend;
2847 #ifdef DIAGNOSTIC
2848         if (!exfer->isdone) {
2849                 kprintf("ehci_device_bulk_start: not done, ex=%p\n", exfer);
2850         }
2851         exfer->isdone = 0;
2852 #endif
2853
2854         crit_enter();
2855         ehci_set_qh_qtd(sqh, data);
2856         if (xfer->timeout && !sc->sc_bus.use_polling) {
2857                 callout_reset(&xfer->timeout_handle, MS_TO_TICKS(xfer->timeout),
2858                             ehci_timeout, xfer);
2859         }
2860         ehci_add_intr_list(sc, exfer);
2861         xfer->status = USBD_IN_PROGRESS;
2862         crit_exit();
2863
2864 #ifdef EHCI_DEBUG
2865         if (ehcidebug > 10) {
2866                 DPRINTF(("ehci_device_bulk_start: data(2)\n"));
2867                 DELAY(10000);
2868                 DPRINTF(("ehci_device_bulk_start: data(3)\n"));
2869                 ehci_dump_regs(sc);
2870 #if 0
2871                 kprintf("async_head:\n");
2872                 ehci_dump_sqh(sc->sc_async_head);
2873 #endif
2874                 kprintf("sqh:\n");
2875                 ehci_dump_sqh(sqh);
2876                 ehci_dump_sqtds(data);
2877         }
2878 #endif
2879
2880         if (sc->sc_bus.use_polling)
2881                 ehci_waitintr(sc, xfer);
2882
2883         return (USBD_IN_PROGRESS);
2884 #undef exfer
2885 }
2886
2887 static void
2888 ehci_device_bulk_abort(usbd_xfer_handle xfer)
2889 {
2890         DPRINTF(("ehci_device_bulk_abort: xfer=%p\n", xfer));
2891         ehci_abort_xfer(xfer, USBD_CANCELLED);
2892 }
2893
2894 /*
2895  * Close a device bulk pipe.
2896  */
2897 static void
2898 ehci_device_bulk_close(usbd_pipe_handle pipe)
2899 {
2900         ehci_softc_t *sc = (ehci_softc_t *)pipe->device->bus;
2901
2902         DPRINTF(("ehci_device_bulk_close: pipe=%p\n", pipe));
2903         ehci_close_pipe(pipe, sc->sc_async_head);
2904 }
2905
2906 void
2907 ehci_device_bulk_done(usbd_xfer_handle xfer)
2908 {
2909         struct ehci_xfer *ex = EXFER(xfer);
2910         ehci_softc_t *sc = (ehci_softc_t *)xfer->pipe->device->bus;
2911         /*struct ehci_pipe *epipe = (struct ehci_pipe *)xfer->pipe;*/
2912
2913         DPRINTFN(10,("ehci_bulk_done: xfer=%p, actlen=%d\n",
2914                      xfer, xfer->actlen));
2915
2916         if (xfer->status != USBD_NOMEM && ehci_active_intr_list(ex)) {
2917                 ehci_del_intr_list(ex); /* remove from active list */
2918                 ehci_free_sqtd_chain(sc, ex->sqtdstart, NULL);
2919         }
2920
2921         DPRINTFN(5, ("ehci_bulk_done: length=%d\n", xfer->actlen));
2922 }
2923
2924 /************************/
2925
2926 static usbd_status
2927 ehci_device_setintr(ehci_softc_t *sc, ehci_soft_qh_t *sqh, int ival)
2928 {
2929         struct ehci_soft_islot *isp;
2930         int islot, lev;
2931
2932         /* Find a poll rate that is large enough. */
2933         for (lev = EHCI_IPOLLRATES - 1; lev > 0; lev--)
2934                 if (EHCI_ILEV_IVAL(lev) <= ival)
2935                         break;
2936
2937         /* Pick an interrupt slot at the right level. */
2938         /* XXX could do better than picking at random. */
2939         islot = EHCI_IQHIDX(lev, karc4random());
2940
2941         sqh->islot = islot;
2942         isp = &sc->sc_islots[islot];
2943         ehci_add_qh(sqh, isp->sqh);
2944
2945         return (USBD_NORMAL_COMPLETION);
2946 }
2947
2948 static usbd_status
2949 ehci_device_intr_transfer(usbd_xfer_handle xfer)
2950 {
2951         usbd_status err;
2952
2953         /* Insert last in queue. */
2954         err = usb_insert_transfer(xfer);
2955         if (err)
2956                 return (err);
2957
2958         /*
2959          * Pipe isn't running (otherwise err would be USBD_INPROG),
2960          * so start it first.
2961          */
2962         return (ehci_device_intr_start(STAILQ_FIRST(&xfer->pipe->queue)));
2963 }
2964
2965 static usbd_status
2966 ehci_device_intr_start(usbd_xfer_handle xfer)
2967 {
2968 #define exfer EXFER(xfer)
2969         struct ehci_pipe *epipe = (struct ehci_pipe *)xfer->pipe;
2970         usbd_device_handle dev = xfer->pipe->device;
2971         ehci_softc_t *sc = (ehci_softc_t *)dev->bus;
2972         ehci_soft_qtd_t *data, *dataend;
2973         ehci_soft_qh_t *sqh;
2974         usbd_status err;
2975         int len, isread, endpt;
2976
2977         DPRINTFN(2, ("ehci_device_intr_start: xfer=%p len=%d flags=%d\n",
2978             xfer, xfer->length, xfer->flags));
2979
2980         if (sc->sc_dying)
2981                 return (USBD_IOERROR);
2982
2983 #ifdef DIAGNOSTIC
2984         if (xfer->rqflags & URQ_REQUEST)
2985                 panic("ehci_device_intr_start: a request");
2986 #endif
2987
2988         len = xfer->length;
2989         endpt = epipe->pipe.endpoint->edesc->bEndpointAddress;
2990         isread = UE_GET_DIR(endpt) == UE_DIR_IN;
2991         sqh = epipe->sqh;
2992
2993         epipe->u.intr.length = len;
2994
2995         err = ehci_alloc_sqtd_chain(epipe, sc, len, isread, xfer, &data,
2996             &dataend);
2997         if (err) {
2998                 DPRINTFN(-1, ("ehci_device_intr_start: no memory\n"));
2999                 xfer->status = err;
3000                 usb_transfer_complete(xfer);
3001                 return (err);
3002         }
3003
3004 #ifdef EHCI_DEBUG
3005         if (ehcidebug > 5) {
3006                 DPRINTF(("ehci_device_intr_start: data(1)\n"));
3007                 ehci_dump_sqh(sqh);
3008                 ehci_dump_sqtds(data);
3009         }
3010 #endif
3011
3012         /* Set up interrupt info. */
3013         exfer->sqtdstart = data;
3014         exfer->sqtdend = dataend;
3015 #ifdef DIAGNOSTIC
3016         if (!exfer->isdone) {
3017                 kprintf("ehci_device_intr_start: not done, ex=%p\n", exfer);
3018         }
3019         exfer->isdone = 0;
3020 #endif
3021
3022         crit_enter();
3023         ehci_set_qh_qtd(sqh, data);
3024         if (xfer->timeout && !sc->sc_bus.use_polling) {
3025                 callout_reset(&xfer->timeout_handle, MS_TO_TICKS(xfer->timeout),
3026                     ehci_timeout, xfer);
3027         }
3028         ehci_add_intr_list(sc, exfer);
3029         xfer->status = USBD_IN_PROGRESS;
3030         crit_exit();
3031
3032 #ifdef EHCI_DEBUG
3033         if (ehcidebug > 10) {
3034                 DPRINTF(("ehci_device_intr_start: data(2)\n"));
3035                 DELAY(10000);
3036                 DPRINTF(("ehci_device_intr_start: data(3)\n"));
3037                 ehci_dump_regs(sc);
3038                 kprintf("sqh:\n");
3039                 ehci_dump_sqh(sqh);
3040                 ehci_dump_sqtds(data);
3041         }
3042 #endif
3043
3044         if (sc->sc_bus.use_polling)
3045                 ehci_waitintr(sc, xfer);
3046
3047         return (USBD_IN_PROGRESS);
3048 #undef exfer
3049 }
3050
3051 static void
3052 ehci_device_intr_abort(usbd_xfer_handle xfer)
3053 {
3054         DPRINTFN(1, ("ehci_device_intr_abort: xfer=%p\n", xfer));
3055         if (xfer->pipe->intrxfer == xfer) {
3056                 DPRINTFN(1, ("ehci_device_intr_abort: remove\n"));
3057                 xfer->pipe->intrxfer = NULL;
3058         }
3059         ehci_abort_xfer(xfer, USBD_CANCELLED);
3060 }
3061
3062 static void
3063 ehci_device_intr_close(usbd_pipe_handle pipe)
3064 {
3065         ehci_softc_t *sc = (ehci_softc_t *)pipe->device->bus;
3066         struct ehci_pipe *epipe = (struct ehci_pipe *)pipe;
3067         struct ehci_soft_islot *isp;
3068
3069         isp = &sc->sc_islots[epipe->sqh->islot];
3070         ehci_close_pipe(pipe, isp->sqh);
3071 }
3072
3073 static void
3074 ehci_device_intr_done(usbd_xfer_handle xfer)
3075 {
3076 #define exfer EXFER(xfer)
3077         struct ehci_xfer *ex = EXFER(xfer);
3078         ehci_softc_t *sc = (ehci_softc_t *)xfer->pipe->device->bus;
3079         struct ehci_pipe *epipe = (struct ehci_pipe *)xfer->pipe;
3080         ehci_soft_qtd_t *data, *dataend;
3081         ehci_soft_qh_t *sqh;
3082         usbd_status err;
3083         int len, isread, endpt;
3084
3085         DPRINTFN(10, ("ehci_device_intr_done: xfer=%p, actlen=%d\n",
3086             xfer, xfer->actlen));
3087
3088         if (xfer->pipe->repeat) {
3089                 ehci_free_sqtd_chain(sc, ex->sqtdstart, NULL);
3090
3091                 len = epipe->u.intr.length;
3092                 xfer->length = len;
3093                 endpt = epipe->pipe.endpoint->edesc->bEndpointAddress;
3094                 isread = UE_GET_DIR(endpt) == UE_DIR_IN;
3095                 sqh = epipe->sqh;
3096
3097                 err = ehci_alloc_sqtd_chain(epipe, sc, len, isread, xfer,
3098                     &data, &dataend);
3099                 if (err) {
3100                         DPRINTFN(-1, ("ehci_device_intr_done: no memory\n"));
3101                         xfer->status = err;
3102                         return;
3103                 }
3104
3105                 /* Set up interrupt info. */
3106                 exfer->sqtdstart = data;
3107                 exfer->sqtdend = dataend;
3108 #ifdef DIAGNOSTIC
3109                 if (!exfer->isdone) {
3110                         kprintf("ehci_device_intr_done: not done, ex=%p\n",
3111                             exfer);
3112                 }
3113                 exfer->isdone = 0;
3114 #endif
3115
3116                 crit_enter();
3117                 ehci_set_qh_qtd(sqh, data);
3118                 if (xfer->timeout && !sc->sc_bus.use_polling) {
3119                         callout_reset(&xfer->timeout_handle,
3120                             MS_TO_TICKS(xfer->timeout), ehci_timeout, xfer);
3121                 }
3122                 crit_exit();
3123
3124                 xfer->status = USBD_IN_PROGRESS;
3125         } else if (xfer->status != USBD_NOMEM && ehci_active_intr_list(ex)) {
3126                 ehci_del_intr_list(ex); /* remove from active list */
3127                 ehci_free_sqtd_chain(sc, ex->sqtdstart, NULL);
3128         }
3129 #undef exfer
3130 }
3131
3132 /************************/
3133
3134 static usbd_status
3135 ehci_device_isoc_transfer(usbd_xfer_handle xfer)
3136 {
3137         return USBD_IOERROR;
3138 }
3139
3140 static usbd_status
3141 ehci_device_isoc_start(usbd_xfer_handle xfer)
3142 {
3143         return USBD_IOERROR;
3144 }
3145
3146 static void
3147 ehci_device_isoc_abort(usbd_xfer_handle xfer)
3148 {
3149 }
3150
3151 static void
3152 ehci_device_isoc_close(usbd_pipe_handle pipe)
3153 {
3154 }
3155
3156 static void
3157 ehci_device_isoc_done(usbd_xfer_handle xfer)
3158 {
3159 }