2 * Copyright (c) 1992 Terrence R. Lambert.
3 * Copyright (c) 1982, 1987, 1990 The Regents of the University of California.
6 * This code is derived from software contributed to Berkeley by
9 * Redistribution and use in source and binary forms, with or without
10 * modification, are permitted provided that the following conditions
12 * 1. Redistributions of source code must retain the above copyright
13 * notice, this list of conditions and the following disclaimer.
14 * 2. Redistributions in binary form must reproduce the above copyright
15 * notice, this list of conditions and the following disclaimer in the
16 * documentation and/or other materials provided with the distribution.
17 * 3. All advertising materials mentioning features or use of this software
18 * must display the following acknowledgement:
19 * This product includes software developed by the University of
20 * California, Berkeley and its contributors.
21 * 4. Neither the name of the University nor the names of its contributors
22 * may be used to endorse or promote products derived from this software
23 * without specific prior written permission.
25 * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
26 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
27 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
28 * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
29 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
30 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
31 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
32 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
33 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
34 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
37 * from: @(#)machdep.c 7.4 (Berkeley) 6/3/91
38 * $FreeBSD: src/sys/i386/i386/machdep.c,v 1.385.2.30 2003/05/31 08:48:05 alc Exp $
43 #include "opt_compat.h"
46 #include "opt_directio.h"
49 #include "opt_maxmem.h"
50 #include "opt_msgbuf.h"
51 #include "opt_perfmon.h"
53 #include "opt_userconfig.h"
55 #include <sys/param.h>
56 #include <sys/systm.h>
57 #include <sys/sysproto.h>
58 #include <sys/signalvar.h>
59 #include <sys/kernel.h>
60 #include <sys/linker.h>
61 #include <sys/malloc.h>
65 #include <sys/reboot.h>
67 #include <sys/msgbuf.h>
68 #include <sys/sysent.h>
69 #include <sys/sysctl.h>
70 #include <sys/vmmeter.h>
72 #include <sys/upcall.h>
73 #include <sys/usched.h>
77 #include <vm/vm_param.h>
79 #include <vm/vm_kern.h>
80 #include <vm/vm_object.h>
81 #include <vm/vm_page.h>
82 #include <vm/vm_map.h>
83 #include <vm/vm_pager.h>
84 #include <vm/vm_extern.h>
86 #include <sys/thread2.h>
87 #include <sys/mplock2.h>
88 #include <sys/mutex2.h>
96 #include <machine/cpu.h>
97 #include <machine/clock.h>
98 #include <machine/specialreg.h>
99 #include <machine/bootinfo.h>
100 #include <machine/md_var.h>
101 #include <machine/pcb_ext.h> /* pcb.h included via sys/user.h */
102 #include <machine/globaldata.h> /* CPU_prvspace */
103 #include <machine/smp.h>
105 #include <machine/perfmon.h>
107 #include <machine/cputypes.h>
108 #include <machine/intr_machdep.h>
111 #include <bus/isa/isa_device.h>
113 #include <machine_base/isa/isa_intr.h>
114 #include <bus/isa/rtc.h>
115 #include <machine/vm86.h>
116 #include <sys/random.h>
117 #include <sys/ptrace.h>
118 #include <machine/sigframe.h>
120 #include <sys/machintr.h>
121 #include <machine_base/icu/icu_abi.h>
122 #include <machine_base/icu/elcr_var.h>
123 #include <machine_base/apic/lapic.h>
124 #include <machine_base/apic/ioapic.h>
125 #include <machine_base/apic/ioapic_abi.h>
126 #include <machine/mptable.h>
128 #define PHYSMAP_ENTRIES 10
130 extern void init386(int first);
131 extern void dblfault_handler(void);
133 extern void printcpuinfo(void); /* XXX header file */
134 extern void finishidentcpu(void);
135 extern void panicifcpuunsupported(void);
136 extern void initializecpu(void);
138 static void cpu_startup(void *);
139 static void pic_finish(void *);
140 static void cpu_finish(void *);
141 #ifndef CPU_DISABLE_SSE
142 static void set_fpregs_xmm(struct save87 *, struct savexmm *);
143 static void fill_fpregs_xmm(struct savexmm *, struct save87 *);
144 #endif /* CPU_DISABLE_SSE */
146 extern void ffs_rawread_setup(void);
147 #endif /* DIRECTIO */
148 static void init_locks(void);
150 SYSINIT(cpu, SI_BOOT2_START_CPU, SI_ORDER_FIRST, cpu_startup, NULL)
151 SYSINIT(pic_finish, SI_BOOT2_FINISH_PIC, SI_ORDER_FIRST, pic_finish, NULL)
152 SYSINIT(cpu_finish, SI_BOOT2_FINISH_CPU, SI_ORDER_FIRST, cpu_finish, NULL)
154 int _udatasel, _ucodesel;
157 int64_t tsc_offsets[MAXCPU];
159 int64_t tsc_offsets[1];
162 #if defined(SWTCH_OPTIM_STATS)
163 extern int swtch_optim_stats;
164 SYSCTL_INT(_debug, OID_AUTO, swtch_optim_stats,
165 CTLFLAG_RD, &swtch_optim_stats, 0, "");
166 SYSCTL_INT(_debug, OID_AUTO, tlb_flush_count,
167 CTLFLAG_RD, &tlb_flush_count, 0, "");
172 u_long ebda_addr = 0;
174 int imcr_present = 0;
176 int naps = 0; /* # of Applications processors */
177 struct mtx dt_lock; /* lock for GDT and LDT */
182 sysctl_hw_physmem(SYSCTL_HANDLER_ARGS)
184 u_long pmem = ctob(physmem);
186 int error = sysctl_handle_long(oidp, &pmem, 0, req);
190 SYSCTL_PROC(_hw, HW_PHYSMEM, physmem, CTLTYPE_ULONG|CTLFLAG_RD,
191 0, 0, sysctl_hw_physmem, "LU", "Total system memory in bytes (number of pages * page size)");
194 sysctl_hw_usermem(SYSCTL_HANDLER_ARGS)
196 int error = sysctl_handle_int(oidp, 0,
197 ctob(physmem - vmstats.v_wire_count), req);
201 SYSCTL_PROC(_hw, HW_USERMEM, usermem, CTLTYPE_INT|CTLFLAG_RD,
202 0, 0, sysctl_hw_usermem, "IU", "");
205 sysctl_hw_availpages(SYSCTL_HANDLER_ARGS)
207 int error = sysctl_handle_int(oidp, 0,
208 i386_btop(avail_end - avail_start), req);
212 SYSCTL_PROC(_hw, OID_AUTO, availpages, CTLTYPE_INT|CTLFLAG_RD,
213 0, 0, sysctl_hw_availpages, "I", "");
218 vm_paddr_t phys_avail[PHYSMAP_ENTRIES*2+2];
219 vm_paddr_t dump_avail[PHYSMAP_ENTRIES*2+2];
222 static vm_offset_t buffer_sva, buffer_eva;
223 vm_offset_t clean_sva, clean_eva;
224 static vm_offset_t pager_sva, pager_eva;
225 static struct trapframe proc0_tf;
228 cpu_startup(void *dummy)
232 vm_offset_t firstaddr;
235 * Good {morning,afternoon,evening,night}.
237 kprintf("%s", version);
240 panicifcpuunsupported();
244 kprintf("real memory = %ju (%ju MB)\n",
246 (intmax_t)Realmem / 1024 / 1024);
248 * Display any holes after the first chunk of extended memory.
253 kprintf("Physical memory chunk(s):\n");
254 for (indx = 0; phys_avail[indx + 1] != 0; indx += 2) {
255 vm_paddr_t size1 = phys_avail[indx + 1] - phys_avail[indx];
257 kprintf("0x%08llx - 0x%08llx, %llu bytes (%llu pages)\n",
258 phys_avail[indx], phys_avail[indx + 1] - 1, size1,
264 * Allocate space for system data structures.
265 * The first available kernel virtual address is in "v".
266 * As pages of kernel virtual memory are allocated, "v" is incremented.
267 * As pages of memory are allocated and cleared,
268 * "firstaddr" is incremented.
269 * An index into the kernel page table corresponding to the
270 * virtual memory address maintained in "v" is kept in "mapaddr".
274 * Make two passes. The first pass calculates how much memory is
275 * needed and allocates it. The second pass assigns virtual
276 * addresses to the various data structures.
280 v = (caddr_t)firstaddr;
282 #define valloc(name, type, num) \
283 (name) = (type *)v; v = (caddr_t)((name)+(num))
284 #define valloclim(name, type, num, lim) \
285 (name) = (type *)v; v = (caddr_t)((lim) = ((name)+(num)))
288 * The nominal buffer size (and minimum KVA allocation) is BKVASIZE.
289 * For the first 64MB of ram nominally allocate sufficient buffers to
290 * cover 1/4 of our ram. Beyond the first 64MB allocate additional
291 * buffers to cover 1/20 of our ram over 64MB. When auto-sizing
292 * the buffer cache we limit the eventual kva reservation to
295 * factor represents the 1/4 x ram conversion.
298 int factor = 4 * BKVASIZE / 1024;
299 int kbytes = physmem * (PAGE_SIZE / 1024);
303 nbuf += min((kbytes - 4096) / factor, 65536 / factor);
305 nbuf += (kbytes - 65536) * 2 / (factor * 5);
306 if (maxbcache && nbuf > maxbcache / BKVASIZE)
307 nbuf = maxbcache / BKVASIZE;
311 * Do not allow the buffer_map to be more then 1/2 the size of the
314 if (nbuf > (virtual_end - virtual_start) / (BKVASIZE * 2)) {
315 nbuf = (virtual_end - virtual_start) / (BKVASIZE * 2);
316 kprintf("Warning: nbufs capped at %d\n", nbuf);
319 /* limit to 128 on i386 */
320 nswbuf = max(min(nbuf/4, 128), 16);
322 if (nswbuf < NSWBUF_MIN)
329 valloc(swbuf, struct buf, nswbuf);
330 valloc(buf, struct buf, nbuf);
333 * End of first pass, size has been calculated so allocate memory
335 if (firstaddr == 0) {
336 size = (vm_size_t)(v - firstaddr);
337 firstaddr = kmem_alloc(&kernel_map, round_page(size));
339 panic("startup: no room for tables");
344 * End of second pass, addresses have been assigned
346 if ((vm_size_t)(v - firstaddr) != size)
347 panic("startup: table size inconsistency");
349 kmem_suballoc(&kernel_map, &clean_map, &clean_sva, &clean_eva,
350 (nbuf*BKVASIZE) + (nswbuf*MAXPHYS) + pager_map_size);
351 kmem_suballoc(&clean_map, &buffer_map, &buffer_sva, &buffer_eva,
353 buffer_map.system_map = 1;
354 kmem_suballoc(&clean_map, &pager_map, &pager_sva, &pager_eva,
355 (nswbuf*MAXPHYS) + pager_map_size);
356 pager_map.system_map = 1;
358 #if defined(USERCONFIG)
360 cninit(); /* the preferred console may have changed */
363 kprintf("avail memory = %ju (%ju MB)\n",
364 (intmax_t)ptoa(vmstats.v_free_count + vmstats.v_dma_pages),
365 (intmax_t)ptoa(vmstats.v_free_count + vmstats.v_dma_pages) /
369 * Set up buffers, so they can be used to read disk labels.
372 vm_pager_bufferinit();
376 cpu_finish(void *dummy __unused)
382 pic_finish(void *dummy __unused)
384 /* Log ELCR information */
387 /* Log MPTABLE information */
388 mptable_pci_int_dump();
391 MachIntrABI.finalize();
395 * Send an interrupt to process.
397 * Stack is set up to allow sigcode stored
398 * at top to call routine, followed by kcall
399 * to sigreturn routine below. After sigreturn
400 * resets the signal mask, the stack, and the
401 * frame pointer, it returns to the user
405 sendsig(sig_t catcher, int sig, sigset_t *mask, u_long code)
407 struct lwp *lp = curthread->td_lwp;
408 struct proc *p = lp->lwp_proc;
409 struct trapframe *regs;
410 struct sigacts *psp = p->p_sigacts;
411 struct sigframe sf, *sfp;
414 regs = lp->lwp_md.md_regs;
415 oonstack = (lp->lwp_sigstk.ss_flags & SS_ONSTACK) ? 1 : 0;
417 /* save user context */
418 bzero(&sf, sizeof(struct sigframe));
419 sf.sf_uc.uc_sigmask = *mask;
420 sf.sf_uc.uc_stack = lp->lwp_sigstk;
421 sf.sf_uc.uc_mcontext.mc_onstack = oonstack;
422 bcopy(regs, &sf.sf_uc.uc_mcontext.mc_gs, sizeof(struct trapframe));
424 /* make the size of the saved context visible to userland */
425 sf.sf_uc.uc_mcontext.mc_len = sizeof(sf.sf_uc.uc_mcontext);
427 /* Allocate and validate space for the signal handler context. */
428 if ((lp->lwp_flags & LWP_ALTSTACK) != 0 && !oonstack &&
429 SIGISMEMBER(psp->ps_sigonstack, sig)) {
430 sfp = (struct sigframe *)(lp->lwp_sigstk.ss_sp +
431 lp->lwp_sigstk.ss_size - sizeof(struct sigframe));
432 lp->lwp_sigstk.ss_flags |= SS_ONSTACK;
434 sfp = (struct sigframe *)regs->tf_esp - 1;
437 /* Translate the signal is appropriate */
438 if (p->p_sysent->sv_sigtbl) {
439 if (sig <= p->p_sysent->sv_sigsize)
440 sig = p->p_sysent->sv_sigtbl[_SIG_IDX(sig)];
443 /* Build the argument list for the signal handler. */
445 sf.sf_ucontext = (register_t)&sfp->sf_uc;
446 if (SIGISMEMBER(psp->ps_siginfo, sig)) {
447 /* Signal handler installed with SA_SIGINFO. */
448 sf.sf_siginfo = (register_t)&sfp->sf_si;
449 sf.sf_ahu.sf_action = (__siginfohandler_t *)catcher;
451 /* fill siginfo structure */
452 sf.sf_si.si_signo = sig;
453 sf.sf_si.si_code = code;
454 sf.sf_si.si_addr = (void*)regs->tf_err;
457 /* Old FreeBSD-style arguments. */
458 sf.sf_siginfo = code;
459 sf.sf_addr = regs->tf_err;
460 sf.sf_ahu.sf_handler = catcher;
464 * If we're a vm86 process, we want to save the segment registers.
465 * We also change eflags to be our emulated eflags, not the actual
468 if (regs->tf_eflags & PSL_VM) {
469 struct trapframe_vm86 *tf = (struct trapframe_vm86 *)regs;
470 struct vm86_kernel *vm86 = &lp->lwp_thread->td_pcb->pcb_ext->ext_vm86;
472 sf.sf_uc.uc_mcontext.mc_gs = tf->tf_vm86_gs;
473 sf.sf_uc.uc_mcontext.mc_fs = tf->tf_vm86_fs;
474 sf.sf_uc.uc_mcontext.mc_es = tf->tf_vm86_es;
475 sf.sf_uc.uc_mcontext.mc_ds = tf->tf_vm86_ds;
477 if (vm86->vm86_has_vme == 0)
478 sf.sf_uc.uc_mcontext.mc_eflags =
479 (tf->tf_eflags & ~(PSL_VIF | PSL_VIP)) |
480 (vm86->vm86_eflags & (PSL_VIF | PSL_VIP));
483 * Clear PSL_NT to inhibit T_TSSFLT faults on return from
484 * syscalls made by the signal handler. This just avoids
485 * wasting time for our lazy fixup of such faults. PSL_NT
486 * does nothing in vm86 mode, but vm86 programs can set it
487 * almost legitimately in probes for old cpu types.
489 tf->tf_eflags &= ~(PSL_VM | PSL_NT | PSL_VIF | PSL_VIP);
493 * Save the FPU state and reinit the FP unit
495 npxpush(&sf.sf_uc.uc_mcontext);
498 * Copy the sigframe out to the user's stack.
500 if (copyout(&sf, sfp, sizeof(struct sigframe)) != 0) {
502 * Something is wrong with the stack pointer.
503 * ...Kill the process.
508 regs->tf_esp = (int)sfp;
509 regs->tf_eip = PS_STRINGS - *(p->p_sysent->sv_szsigcode);
512 * i386 abi specifies that the direction flag must be cleared
515 regs->tf_eflags &= ~(PSL_T|PSL_D);
517 regs->tf_cs = _ucodesel;
518 regs->tf_ds = _udatasel;
519 regs->tf_es = _udatasel;
522 * Allow the signal handler to inherit %fs in addition to %gs as
523 * the userland program might be using both.
525 * However, if a T_PROTFLT occured the segment registers could be
526 * totally broken. They must be reset in order to be able to
527 * return to userland.
529 if (regs->tf_trapno == T_PROTFLT) {
530 regs->tf_fs = _udatasel;
531 regs->tf_gs = _udatasel;
533 regs->tf_ss = _udatasel;
537 * Sanitize the trapframe for a virtual kernel passing control to a custom
538 * VM context. Remove any items that would otherwise create a privilage
541 * XXX at the moment we allow userland to set the resume flag. Is this a
545 cpu_sanitize_frame(struct trapframe *frame)
547 frame->tf_cs = _ucodesel;
548 frame->tf_ds = _udatasel;
549 frame->tf_es = _udatasel; /* XXX allow userland this one too? */
551 frame->tf_fs = _udatasel;
552 frame->tf_gs = _udatasel;
554 frame->tf_ss = _udatasel;
555 frame->tf_eflags &= (PSL_RF | PSL_USERCHANGE);
556 frame->tf_eflags |= PSL_RESERVED_DEFAULT | PSL_I;
561 cpu_sanitize_tls(struct savetls *tls)
563 struct segment_descriptor *desc;
566 for (i = 0; i < NGTLS; ++i) {
568 if (desc->sd_dpl == 0 && desc->sd_type == 0)
570 if (desc->sd_def32 == 0)
572 if (desc->sd_type != SDT_MEMRWA)
574 if (desc->sd_dpl != SEL_UPL)
576 if (desc->sd_xx != 0 || desc->sd_p != 1)
583 * sigreturn(ucontext_t *sigcntxp)
585 * System call to cleanup state after a signal
586 * has been taken. Reset signal mask and
587 * stack state from context left by sendsig (above).
588 * Return to previous pc and psl as specified by
589 * context left by sendsig. Check carefully to
590 * make sure that the user has not modified the
591 * state to gain improper privileges.
595 #define EFL_SECURE(ef, oef) ((((ef) ^ (oef)) & ~PSL_USERCHANGE) == 0)
596 #define CS_SECURE(cs) (ISPL(cs) == SEL_UPL)
599 sys_sigreturn(struct sigreturn_args *uap)
601 struct lwp *lp = curthread->td_lwp;
602 struct trapframe *regs;
610 * We have to copy the information into kernel space so userland
611 * can't modify it while we are sniffing it.
613 regs = lp->lwp_md.md_regs;
614 error = copyin(uap->sigcntxp, &uc, sizeof(uc));
618 eflags = ucp->uc_mcontext.mc_eflags;
620 if (eflags & PSL_VM) {
621 struct trapframe_vm86 *tf = (struct trapframe_vm86 *)regs;
622 struct vm86_kernel *vm86;
625 * if pcb_ext == 0 or vm86_inited == 0, the user hasn't
626 * set up the vm86 area, and we can't enter vm86 mode.
628 if (lp->lwp_thread->td_pcb->pcb_ext == 0)
630 vm86 = &lp->lwp_thread->td_pcb->pcb_ext->ext_vm86;
631 if (vm86->vm86_inited == 0)
634 /* go back to user mode if both flags are set */
635 if ((eflags & PSL_VIP) && (eflags & PSL_VIF))
636 trapsignal(lp, SIGBUS, 0);
638 if (vm86->vm86_has_vme) {
639 eflags = (tf->tf_eflags & ~VME_USERCHANGE) |
640 (eflags & VME_USERCHANGE) | PSL_VM;
642 vm86->vm86_eflags = eflags; /* save VIF, VIP */
643 eflags = (tf->tf_eflags & ~VM_USERCHANGE) |
644 (eflags & VM_USERCHANGE) | PSL_VM;
646 bcopy(&ucp->uc_mcontext.mc_gs, tf, sizeof(struct trapframe));
647 tf->tf_eflags = eflags;
648 tf->tf_vm86_ds = tf->tf_ds;
649 tf->tf_vm86_es = tf->tf_es;
650 tf->tf_vm86_fs = tf->tf_fs;
651 tf->tf_vm86_gs = tf->tf_gs;
652 tf->tf_ds = _udatasel;
653 tf->tf_es = _udatasel;
655 tf->tf_fs = _udatasel;
656 tf->tf_gs = _udatasel;
660 * Don't allow users to change privileged or reserved flags.
663 * XXX do allow users to change the privileged flag PSL_RF.
664 * The cpu sets PSL_RF in tf_eflags for faults. Debuggers
665 * should sometimes set it there too. tf_eflags is kept in
666 * the signal context during signal handling and there is no
667 * other place to remember it, so the PSL_RF bit may be
668 * corrupted by the signal handler without us knowing.
669 * Corruption of the PSL_RF bit at worst causes one more or
670 * one less debugger trap, so allowing it is fairly harmless.
672 if (!EFL_SECURE(eflags & ~PSL_RF, regs->tf_eflags & ~PSL_RF)) {
673 kprintf("sigreturn: eflags = 0x%x\n", eflags);
678 * Don't allow users to load a valid privileged %cs. Let the
679 * hardware check for invalid selectors, excess privilege in
680 * other selectors, invalid %eip's and invalid %esp's.
682 cs = ucp->uc_mcontext.mc_cs;
683 if (!CS_SECURE(cs)) {
684 kprintf("sigreturn: cs = 0x%x\n", cs);
685 trapsignal(lp, SIGBUS, T_PROTFLT);
688 bcopy(&ucp->uc_mcontext.mc_gs, regs, sizeof(struct trapframe));
692 * Restore the FPU state from the frame
695 npxpop(&ucp->uc_mcontext);
697 if (ucp->uc_mcontext.mc_onstack & 1)
698 lp->lwp_sigstk.ss_flags |= SS_ONSTACK;
700 lp->lwp_sigstk.ss_flags &= ~SS_ONSTACK;
702 lp->lwp_sigmask = ucp->uc_sigmask;
703 SIG_CANTMASK(lp->lwp_sigmask);
709 * Stack frame on entry to function. %eax will contain the function vector,
710 * %ecx will contain the function data. flags, ecx, and eax will have
711 * already been pushed on the stack.
722 sendupcall(struct vmupcall *vu, int morepending)
724 struct lwp *lp = curthread->td_lwp;
725 struct trapframe *regs;
726 struct upcall upcall;
727 struct upc_frame upc_frame;
731 * If we are a virtual kernel running an emulated user process
732 * context, switch back to the virtual kernel context before
733 * trying to post the signal.
735 if (lp->lwp_vkernel && lp->lwp_vkernel->ve) {
736 lp->lwp_md.md_regs->tf_trapno = 0;
737 vkernel_trap(lp, lp->lwp_md.md_regs);
741 * Get the upcall data structure
743 if (copyin(lp->lwp_upcall, &upcall, sizeof(upcall)) ||
744 copyin((char *)upcall.upc_uthread + upcall.upc_critoff, &crit_count, sizeof(int))
747 kprintf("bad upcall address\n");
752 * If the data structure is already marked pending or has a critical
753 * section count, mark the data structure as pending and return
754 * without doing an upcall. vu_pending is left set.
756 if (upcall.upc_pending || crit_count >= vu->vu_pending) {
757 if (upcall.upc_pending < vu->vu_pending) {
758 upcall.upc_pending = vu->vu_pending;
759 copyout(&upcall.upc_pending, &lp->lwp_upcall->upc_pending,
760 sizeof(upcall.upc_pending));
766 * We can run this upcall now, clear vu_pending.
768 * Bump our critical section count and set or clear the
769 * user pending flag depending on whether more upcalls are
770 * pending. The user will be responsible for calling
771 * upc_dispatch(-1) to process remaining upcalls.
774 upcall.upc_pending = morepending;
776 copyout(&upcall.upc_pending, &lp->lwp_upcall->upc_pending,
777 sizeof(upcall.upc_pending));
778 copyout(&crit_count, (char *)upcall.upc_uthread + upcall.upc_critoff,
782 * Construct a stack frame and issue the upcall
784 regs = lp->lwp_md.md_regs;
785 upc_frame.eax = regs->tf_eax;
786 upc_frame.ecx = regs->tf_ecx;
787 upc_frame.edx = regs->tf_edx;
788 upc_frame.flags = regs->tf_eflags;
789 upc_frame.oldip = regs->tf_eip;
790 if (copyout(&upc_frame, (void *)(regs->tf_esp - sizeof(upc_frame)),
791 sizeof(upc_frame)) != 0) {
792 kprintf("bad stack on upcall\n");
794 regs->tf_eax = (register_t)vu->vu_func;
795 regs->tf_ecx = (register_t)vu->vu_data;
796 regs->tf_edx = (register_t)lp->lwp_upcall;
797 regs->tf_eip = (register_t)vu->vu_ctx;
798 regs->tf_esp -= sizeof(upc_frame);
803 * fetchupcall occurs in the context of a system call, which means that
804 * we have to return EJUSTRETURN in order to prevent eax and edx from
805 * being overwritten by the syscall return value.
807 * if vu is not NULL we return the new context in %edx, the new data in %ecx,
808 * and the function pointer in %eax.
811 fetchupcall(struct vmupcall *vu, int morepending, void *rsp)
813 struct upc_frame upc_frame;
814 struct lwp *lp = curthread->td_lwp;
815 struct trapframe *regs;
817 struct upcall upcall;
820 regs = lp->lwp_md.md_regs;
822 error = copyout(&morepending, &lp->lwp_upcall->upc_pending, sizeof(int));
826 * This jumps us to the next ready context.
829 error = copyin(lp->lwp_upcall, &upcall, sizeof(upcall));
832 error = copyin((char *)upcall.upc_uthread + upcall.upc_critoff, &crit_count, sizeof(int));
835 error = copyout(&crit_count, (char *)upcall.upc_uthread + upcall.upc_critoff, sizeof(int));
836 regs->tf_eax = (register_t)vu->vu_func;
837 regs->tf_ecx = (register_t)vu->vu_data;
838 regs->tf_edx = (register_t)lp->lwp_upcall;
839 regs->tf_eip = (register_t)vu->vu_ctx;
840 regs->tf_esp = (register_t)rsp;
843 * This returns us to the originally interrupted code.
845 error = copyin(rsp, &upc_frame, sizeof(upc_frame));
846 regs->tf_eax = upc_frame.eax;
847 regs->tf_ecx = upc_frame.ecx;
848 regs->tf_edx = upc_frame.edx;
849 regs->tf_eflags = (regs->tf_eflags & ~PSL_USERCHANGE) |
850 (upc_frame.flags & PSL_USERCHANGE);
851 regs->tf_eip = upc_frame.oldip;
852 regs->tf_esp = (register_t)((char *)rsp + sizeof(upc_frame));
861 * Machine dependent boot() routine
863 * I haven't seen anything to put here yet
864 * Possibly some stuff might be grafted back here from boot()
872 * Shutdown the CPU as much as possible
878 __asm__ __volatile("hlt");
882 * cpu_idle() represents the idle LWKT. You cannot return from this function
883 * (unless you want to blow things up!). Instead we look for runnable threads
884 * and loop or halt as appropriate. Giant is not held on entry to the thread.
886 * The main loop is entered with a critical section held, we must release
887 * the critical section before doing anything else. lwkt_switch() will
888 * check for pending interrupts due to entering and exiting its own
891 * NOTE: On an SMP system we rely on a scheduler IPI to wake a HLTed cpu up.
893 * NOTE: cpu_idle_hlt again defaults to 2 (use ACPI sleep states). Set to
894 * 1 to just use hlt and for debugging purposes.
896 static int cpu_idle_hlt = 2;
897 static int cpu_idle_hltcnt;
898 static int cpu_idle_spincnt;
899 static u_int cpu_idle_repeat = 4;
900 SYSCTL_INT(_machdep, OID_AUTO, cpu_idle_hlt, CTLFLAG_RW,
901 &cpu_idle_hlt, 0, "Idle loop HLT enable");
902 SYSCTL_INT(_machdep, OID_AUTO, cpu_idle_hltcnt, CTLFLAG_RW,
903 &cpu_idle_hltcnt, 0, "Idle loop entry halts");
904 SYSCTL_INT(_machdep, OID_AUTO, cpu_idle_spincnt, CTLFLAG_RW,
905 &cpu_idle_spincnt, 0, "Idle loop entry spins");
906 SYSCTL_INT(_machdep, OID_AUTO, cpu_idle_repeat, CTLFLAG_RW,
907 &cpu_idle_repeat, 0, "Idle entries before acpi hlt");
910 cpu_idle_default_hook(void)
913 * We must guarentee that hlt is exactly the instruction
916 __asm __volatile("sti; hlt");
919 /* Other subsystems (e.g., ACPI) can hook this later. */
920 void (*cpu_idle_hook)(void) = cpu_idle_default_hook;
925 globaldata_t gd = mycpu;
926 struct thread *td __debugvar = gd->gd_curthread;
931 KKASSERT(td->td_critcount == 0);
934 * See if there are any LWKTs ready to go.
939 * When halting inside a cli we must check for reqflags
940 * races, particularly [re]schedule requests. Running
941 * splz() does the job.
944 * 0 Never halt, just spin
946 * 1 Always use HLT (or MONITOR/MWAIT if avail).
947 * This typically eats more power than the
950 * 2 Use HLT/MONITOR/MWAIT up to a point and then
951 * use the ACPI halt (default). This is a hybrid
952 * approach. See machdep.cpu_idle_repeat.
954 * 3 Always use the ACPI halt. This typically
955 * eats the least amount of power but the cpu
956 * will be slow waking up. Slows down e.g.
957 * compiles and other pipe/event oriented stuff.
960 * NOTE: Interrupts are enabled and we are not in a critical
963 * NOTE: Preemptions do not reset gd_idle_repeat. Also we
964 * don't bother capping gd_idle_repeat, it is ok if
967 ++gd->gd_idle_repeat;
968 reqflags = gd->gd_reqflags;
969 quick = (cpu_idle_hlt == 1) ||
971 gd->gd_idle_repeat < cpu_idle_repeat);
973 if (quick && (cpu_mi_feature & CPU_MI_MONITOR) &&
974 (reqflags & RQF_IDLECHECK_WK_MASK) == 0) {
975 cpu_mmw_pause_int(&gd->gd_reqflags, reqflags);
977 } else if (cpu_idle_hlt) {
978 __asm __volatile("cli");
980 if ((gd->gd_reqflags & RQF_IDLECHECK_WK_MASK) == 0) {
982 cpu_idle_default_hook();
986 __asm __volatile("sti");
990 __asm __volatile("sti");
999 * This routine is called if a spinlock has been held through the
1000 * exponential backoff period and is seriously contested. On a real cpu
1004 cpu_spinlock_contested(void)
1012 * Clear registers on exec
1015 exec_setregs(u_long entry, u_long stack, u_long ps_strings)
1017 struct thread *td = curthread;
1018 struct lwp *lp = td->td_lwp;
1019 struct pcb *pcb = td->td_pcb;
1020 struct trapframe *regs = lp->lwp_md.md_regs;
1022 /* was i386_user_cleanup() in NetBSD */
1025 bzero((char *)regs, sizeof(struct trapframe));
1026 regs->tf_eip = entry;
1027 regs->tf_esp = stack;
1028 regs->tf_eflags = PSL_USER | (regs->tf_eflags & PSL_T);
1029 regs->tf_ss = _udatasel;
1030 regs->tf_ds = _udatasel;
1031 regs->tf_es = _udatasel;
1032 regs->tf_fs = _udatasel;
1033 regs->tf_gs = _udatasel;
1034 regs->tf_cs = _ucodesel;
1036 /* PS_STRINGS value for BSD/OS binaries. It is 0 for non-BSD/OS. */
1037 regs->tf_ebx = ps_strings;
1040 * Reset the hardware debug registers if they were in use.
1041 * They won't have any meaning for the newly exec'd process.
1043 if (pcb->pcb_flags & PCB_DBREGS) {
1050 if (pcb == td->td_pcb) {
1052 * Clear the debug registers on the running
1053 * CPU, otherwise they will end up affecting
1054 * the next process we switch to.
1058 pcb->pcb_flags &= ~PCB_DBREGS;
1062 * Initialize the math emulator (if any) for the current process.
1063 * Actually, just clear the bit that says that the emulator has
1064 * been initialized. Initialization is delayed until the process
1065 * traps to the emulator (if it is done at all) mainly because
1066 * emulators don't provide an entry point for initialization.
1068 pcb->pcb_flags &= ~FP_SOFTFP;
1071 * note: do not set CR0_TS here. npxinit() must do it after clearing
1072 * gd_npxthread. Otherwise a preemptive interrupt thread may panic
1076 load_cr0(rcr0() | CR0_MP);
1079 /* Initialize the npx (if any) for the current process. */
1080 npxinit(__INITIAL_NPXCW__);
1085 * note: linux emulator needs edx to be 0x0 on entry, which is
1086 * handled in execve simply by setting the 64 bit syscall
1087 * return value to 0.
1097 cr0 |= CR0_NE; /* Done by npxinit() */
1098 cr0 |= CR0_MP | CR0_TS; /* Done at every execve() too. */
1099 cr0 |= CR0_WP | CR0_AM;
1105 sysctl_machdep_adjkerntz(SYSCTL_HANDLER_ARGS)
1108 error = sysctl_handle_int(oidp, oidp->oid_arg1, oidp->oid_arg2,
1110 if (!error && req->newptr)
1115 SYSCTL_PROC(_machdep, CPU_ADJKERNTZ, adjkerntz, CTLTYPE_INT|CTLFLAG_RW,
1116 &adjkerntz, 0, sysctl_machdep_adjkerntz, "I", "");
1118 SYSCTL_INT(_machdep, CPU_DISRTCSET, disable_rtc_set,
1119 CTLFLAG_RW, &disable_rtc_set, 0, "");
1121 SYSCTL_STRUCT(_machdep, CPU_BOOTINFO, bootinfo,
1122 CTLFLAG_RD, &bootinfo, bootinfo, "");
1124 SYSCTL_INT(_machdep, CPU_WALLCLOCK, wall_cmos_clock,
1125 CTLFLAG_RW, &wall_cmos_clock, 0, "");
1127 extern u_long bootdev; /* not a cdev_t - encoding is different */
1128 SYSCTL_ULONG(_machdep, OID_AUTO, guessed_bootdev,
1129 CTLFLAG_RD, &bootdev, 0, "Boot device (not in cdev_t format)");
1132 * Initialize 386 and configure to run kernel
1136 * Initialize segments & interrupt table
1140 union descriptor gdt[NGDT * MAXCPU]; /* global descriptor table */
1141 static struct gate_descriptor idt0[NIDT];
1142 struct gate_descriptor *idt = &idt0[0]; /* interrupt descriptor table */
1143 union descriptor ldt[NLDT]; /* local descriptor table */
1145 /* table descriptors - used to load tables by cpu */
1146 struct region_descriptor r_gdt, r_idt;
1148 #if defined(I586_CPU) && !defined(NO_F00F_HACK)
1149 extern int has_f00f_bug;
1152 static struct i386tss dblfault_tss;
1153 static char dblfault_stack[PAGE_SIZE];
1155 extern struct user *proc0paddr;
1158 /* software prototypes -- in more palatable form */
1159 struct soft_segment_descriptor gdt_segs[] = {
1160 /* GNULL_SEL 0 Null Descriptor */
1161 { 0x0, /* segment base address */
1163 0, /* segment type */
1164 0, /* segment descriptor priority level */
1165 0, /* segment descriptor present */
1167 0, /* default 32 vs 16 bit size */
1168 0 /* limit granularity (byte/page units)*/ },
1169 /* GCODE_SEL 1 Code Descriptor for kernel */
1170 { 0x0, /* segment base address */
1171 0xfffff, /* length - all address space */
1172 SDT_MEMERA, /* segment type */
1173 0, /* segment descriptor priority level */
1174 1, /* segment descriptor present */
1176 1, /* default 32 vs 16 bit size */
1177 1 /* limit granularity (byte/page units)*/ },
1178 /* GDATA_SEL 2 Data Descriptor for kernel */
1179 { 0x0, /* segment base address */
1180 0xfffff, /* length - all address space */
1181 SDT_MEMRWA, /* segment type */
1182 0, /* segment descriptor priority level */
1183 1, /* segment descriptor present */
1185 1, /* default 32 vs 16 bit size */
1186 1 /* limit granularity (byte/page units)*/ },
1187 /* GPRIV_SEL 3 SMP Per-Processor Private Data Descriptor */
1188 { 0x0, /* segment base address */
1189 0xfffff, /* length - all address space */
1190 SDT_MEMRWA, /* segment type */
1191 0, /* segment descriptor priority level */
1192 1, /* segment descriptor present */
1194 1, /* default 32 vs 16 bit size */
1195 1 /* limit granularity (byte/page units)*/ },
1196 /* GPROC0_SEL 4 Proc 0 Tss Descriptor */
1198 0x0, /* segment base address */
1199 sizeof(struct i386tss)-1,/* length - all address space */
1200 SDT_SYS386TSS, /* segment type */
1201 0, /* segment descriptor priority level */
1202 1, /* segment descriptor present */
1204 0, /* unused - default 32 vs 16 bit size */
1205 0 /* limit granularity (byte/page units)*/ },
1206 /* GLDT_SEL 5 LDT Descriptor */
1207 { (int) ldt, /* segment base address */
1208 sizeof(ldt)-1, /* length - all address space */
1209 SDT_SYSLDT, /* segment type */
1210 SEL_UPL, /* segment descriptor priority level */
1211 1, /* segment descriptor present */
1213 0, /* unused - default 32 vs 16 bit size */
1214 0 /* limit granularity (byte/page units)*/ },
1215 /* GUSERLDT_SEL 6 User LDT Descriptor per process */
1216 { (int) ldt, /* segment base address */
1217 (512 * sizeof(union descriptor)-1), /* length */
1218 SDT_SYSLDT, /* segment type */
1219 0, /* segment descriptor priority level */
1220 1, /* segment descriptor present */
1222 0, /* unused - default 32 vs 16 bit size */
1223 0 /* limit granularity (byte/page units)*/ },
1224 /* GTGATE_SEL 7 Null Descriptor - Placeholder */
1225 { 0x0, /* segment base address */
1226 0x0, /* length - all address space */
1227 0, /* segment type */
1228 0, /* segment descriptor priority level */
1229 0, /* segment descriptor present */
1231 0, /* default 32 vs 16 bit size */
1232 0 /* limit granularity (byte/page units)*/ },
1233 /* GBIOSLOWMEM_SEL 8 BIOS access to realmode segment 0x40, must be #8 in GDT */
1234 { 0x400, /* segment base address */
1235 0xfffff, /* length */
1236 SDT_MEMRWA, /* segment type */
1237 0, /* segment descriptor priority level */
1238 1, /* segment descriptor present */
1240 1, /* default 32 vs 16 bit size */
1241 1 /* limit granularity (byte/page units)*/ },
1242 /* GPANIC_SEL 9 Panic Tss Descriptor */
1243 { (int) &dblfault_tss, /* segment base address */
1244 sizeof(struct i386tss)-1,/* length - all address space */
1245 SDT_SYS386TSS, /* segment type */
1246 0, /* segment descriptor priority level */
1247 1, /* segment descriptor present */
1249 0, /* unused - default 32 vs 16 bit size */
1250 0 /* limit granularity (byte/page units)*/ },
1251 /* GBIOSCODE32_SEL 10 BIOS 32-bit interface (32bit Code) */
1252 { 0, /* segment base address (overwritten) */
1253 0xfffff, /* length */
1254 SDT_MEMERA, /* segment type */
1255 0, /* segment descriptor priority level */
1256 1, /* segment descriptor present */
1258 0, /* default 32 vs 16 bit size */
1259 1 /* limit granularity (byte/page units)*/ },
1260 /* GBIOSCODE16_SEL 11 BIOS 32-bit interface (16bit Code) */
1261 { 0, /* segment base address (overwritten) */
1262 0xfffff, /* length */
1263 SDT_MEMERA, /* segment type */
1264 0, /* segment descriptor priority level */
1265 1, /* segment descriptor present */
1267 0, /* default 32 vs 16 bit size */
1268 1 /* limit granularity (byte/page units)*/ },
1269 /* GBIOSDATA_SEL 12 BIOS 32-bit interface (Data) */
1270 { 0, /* segment base address (overwritten) */
1271 0xfffff, /* length */
1272 SDT_MEMRWA, /* segment type */
1273 0, /* segment descriptor priority level */
1274 1, /* segment descriptor present */
1276 1, /* default 32 vs 16 bit size */
1277 1 /* limit granularity (byte/page units)*/ },
1278 /* GBIOSUTIL_SEL 13 BIOS 16-bit interface (Utility) */
1279 { 0, /* segment base address (overwritten) */
1280 0xfffff, /* length */
1281 SDT_MEMRWA, /* segment type */
1282 0, /* segment descriptor priority level */
1283 1, /* segment descriptor present */
1285 0, /* default 32 vs 16 bit size */
1286 1 /* limit granularity (byte/page units)*/ },
1287 /* GBIOSARGS_SEL 14 BIOS 16-bit interface (Arguments) */
1288 { 0, /* segment base address (overwritten) */
1289 0xfffff, /* length */
1290 SDT_MEMRWA, /* segment type */
1291 0, /* segment descriptor priority level */
1292 1, /* segment descriptor present */
1294 0, /* default 32 vs 16 bit size */
1295 1 /* limit granularity (byte/page units)*/ },
1296 /* GTLS_START 15 TLS */
1297 { 0x0, /* segment base address */
1299 0, /* segment type */
1300 0, /* segment descriptor priority level */
1301 0, /* segment descriptor present */
1303 0, /* default 32 vs 16 bit size */
1304 0 /* limit granularity (byte/page units)*/ },
1305 /* GTLS_START+1 16 TLS */
1306 { 0x0, /* segment base address */
1308 0, /* segment type */
1309 0, /* segment descriptor priority level */
1310 0, /* segment descriptor present */
1312 0, /* default 32 vs 16 bit size */
1313 0 /* limit granularity (byte/page units)*/ },
1314 /* GTLS_END 17 TLS */
1315 { 0x0, /* segment base address */
1317 0, /* segment type */
1318 0, /* segment descriptor priority level */
1319 0, /* segment descriptor present */
1321 0, /* default 32 vs 16 bit size */
1322 0 /* limit granularity (byte/page units)*/ },
1323 /* GNDIS_SEL 18 NDIS Descriptor */
1324 { 0x0, /* segment base address */
1326 0, /* segment type */
1327 0, /* segment descriptor priority level */
1328 0, /* segment descriptor present */
1330 0, /* default 32 vs 16 bit size */
1331 0 /* limit granularity (byte/page units)*/ },
1334 static struct soft_segment_descriptor ldt_segs[] = {
1335 /* Null Descriptor - overwritten by call gate */
1336 { 0x0, /* segment base address */
1337 0x0, /* length - all address space */
1338 0, /* segment type */
1339 0, /* segment descriptor priority level */
1340 0, /* segment descriptor present */
1342 0, /* default 32 vs 16 bit size */
1343 0 /* limit granularity (byte/page units)*/ },
1344 /* Null Descriptor - overwritten by call gate */
1345 { 0x0, /* segment base address */
1346 0x0, /* length - all address space */
1347 0, /* segment type */
1348 0, /* segment descriptor priority level */
1349 0, /* segment descriptor present */
1351 0, /* default 32 vs 16 bit size */
1352 0 /* limit granularity (byte/page units)*/ },
1353 /* Null Descriptor - overwritten by call gate */
1354 { 0x0, /* segment base address */
1355 0x0, /* length - all address space */
1356 0, /* segment type */
1357 0, /* segment descriptor priority level */
1358 0, /* segment descriptor present */
1360 0, /* default 32 vs 16 bit size */
1361 0 /* limit granularity (byte/page units)*/ },
1362 /* Code Descriptor for user */
1363 { 0x0, /* segment base address */
1364 0xfffff, /* length - all address space */
1365 SDT_MEMERA, /* segment type */
1366 SEL_UPL, /* segment descriptor priority level */
1367 1, /* segment descriptor present */
1369 1, /* default 32 vs 16 bit size */
1370 1 /* limit granularity (byte/page units)*/ },
1371 /* Null Descriptor - overwritten by call gate */
1372 { 0x0, /* segment base address */
1373 0x0, /* length - all address space */
1374 0, /* segment type */
1375 0, /* segment descriptor priority level */
1376 0, /* segment descriptor present */
1378 0, /* default 32 vs 16 bit size */
1379 0 /* limit granularity (byte/page units)*/ },
1380 /* Data Descriptor for user */
1381 { 0x0, /* segment base address */
1382 0xfffff, /* length - all address space */
1383 SDT_MEMRWA, /* segment type */
1384 SEL_UPL, /* segment descriptor priority level */
1385 1, /* segment descriptor present */
1387 1, /* default 32 vs 16 bit size */
1388 1 /* limit granularity (byte/page units)*/ },
1392 setidt(int idx, inthand_t *func, int typ, int dpl, int selec)
1394 struct gate_descriptor *ip;
1397 ip->gd_looffset = (int)func;
1398 ip->gd_selector = selec;
1404 ip->gd_hioffset = ((int)func)>>16 ;
1407 #define IDTVEC(name) __CONCAT(X,name)
1410 IDTVEC(div), IDTVEC(dbg), IDTVEC(nmi), IDTVEC(bpt), IDTVEC(ofl),
1411 IDTVEC(bnd), IDTVEC(ill), IDTVEC(dna), IDTVEC(fpusegm),
1412 IDTVEC(tss), IDTVEC(missing), IDTVEC(stk), IDTVEC(prot),
1413 IDTVEC(page), IDTVEC(mchk), IDTVEC(fpu), IDTVEC(align),
1414 IDTVEC(xmm), IDTVEC(syscall),
1417 IDTVEC(int0x80_syscall);
1419 #ifdef DEBUG_INTERRUPTS
1420 extern inthand_t *Xrsvdary[256];
1424 sdtossd(struct segment_descriptor *sd, struct soft_segment_descriptor *ssd)
1426 ssd->ssd_base = (sd->sd_hibase << 24) | sd->sd_lobase;
1427 ssd->ssd_limit = (sd->sd_hilimit << 16) | sd->sd_lolimit;
1428 ssd->ssd_type = sd->sd_type;
1429 ssd->ssd_dpl = sd->sd_dpl;
1430 ssd->ssd_p = sd->sd_p;
1431 ssd->ssd_def32 = sd->sd_def32;
1432 ssd->ssd_gran = sd->sd_gran;
1436 * Populate the (physmap) array with base/bound pairs describing the
1437 * available physical memory in the system, then test this memory and
1438 * build the phys_avail array describing the actually-available memory.
1440 * If we cannot accurately determine the physical memory map, then use
1441 * value from the 0xE801 call, and failing that, the RTC.
1443 * Total memory size may be set by the kernel environment variable
1444 * hw.physmem or the compile-time define MAXMEM.
1447 getmemsize(int first)
1449 int i, physmap_idx, pa_indx, da_indx;
1451 u_int basemem, extmem;
1452 struct vm86frame vmf;
1453 struct vm86context vmc;
1455 vm_offset_t physmap[PHYSMAP_ENTRIES*2];
1463 quad_t dcons_addr, dcons_size;
1465 bzero(&vmf, sizeof(struct vm86frame));
1466 bzero(physmap, sizeof(physmap));
1470 * Some newer BIOSes has broken INT 12H implementation which cause
1471 * kernel panic immediately. In this case, we need to scan SMAP
1472 * with INT 15:E820 first, then determine base memory size.
1475 TUNABLE_INT_FETCH("hw.hasbrokenint12", &hasbrokenint12);
1476 if (hasbrokenint12) {
1481 * Perform "base memory" related probes & setup. If we get a crazy
1482 * value give the bios some scribble space just in case.
1484 vm86_intcall(0x12, &vmf);
1485 basemem = vmf.vmf_ax;
1486 if (basemem > 640) {
1487 kprintf("Preposterous BIOS basemem of %uK, "
1488 "truncating to < 640K\n", basemem);
1493 * XXX if biosbasemem is now < 640, there is a `hole'
1494 * between the end of base memory and the start of
1495 * ISA memory. The hole may be empty or it may
1496 * contain BIOS code or data. Map it read/write so
1497 * that the BIOS can write to it. (Memory from 0 to
1498 * the physical end of the kernel is mapped read-only
1499 * to begin with and then parts of it are remapped.
1500 * The parts that aren't remapped form holes that
1501 * remain read-only and are unused by the kernel.
1502 * The base memory area is below the physical end of
1503 * the kernel and right now forms a read-only hole.
1504 * The part of it from PAGE_SIZE to
1505 * (trunc_page(biosbasemem * 1024) - 1) will be
1506 * remapped and used by the kernel later.)
1508 * This code is similar to the code used in
1509 * pmap_mapdev, but since no memory needs to be
1510 * allocated we simply change the mapping.
1512 for (pa = trunc_page(basemem * 1024);
1513 pa < ISA_HOLE_START; pa += PAGE_SIZE) {
1514 pte = vtopte(pa + KERNBASE);
1515 *pte = pa | PG_RW | PG_V;
1519 * if basemem != 640, map pages r/w into vm86 page table so
1520 * that the bios can scribble on it.
1523 for (i = basemem / 4; i < 160; i++)
1524 pte[i] = (i << PAGE_SHIFT) | PG_V | PG_RW | PG_U;
1528 * map page 1 R/W into the kernel page table so we can use it
1529 * as a buffer. The kernel will unmap this page later.
1531 pte = vtopte(KERNBASE + (1 << PAGE_SHIFT));
1532 *pte = (1 << PAGE_SHIFT) | PG_RW | PG_V;
1535 * get memory map with INT 15:E820
1537 #define SMAPSIZ sizeof(*smap)
1538 #define SMAP_SIG 0x534D4150 /* 'SMAP' */
1541 smap = (void *)vm86_addpage(&vmc, 1, KERNBASE + (1 << PAGE_SHIFT));
1542 vm86_getptr(&vmc, (vm_offset_t)smap, &vmf.vmf_es, &vmf.vmf_di);
1547 vmf.vmf_eax = 0xE820;
1548 vmf.vmf_edx = SMAP_SIG;
1549 vmf.vmf_ecx = SMAPSIZ;
1550 i = vm86_datacall(0x15, &vmf, &vmc);
1551 if (i || vmf.vmf_eax != SMAP_SIG)
1553 if (boothowto & RB_VERBOSE)
1554 kprintf("SMAP type=%02x base=%08x %08x len=%08x %08x\n",
1556 *(u_int32_t *)((char *)&smap->base + 4),
1557 (u_int32_t)smap->base,
1558 *(u_int32_t *)((char *)&smap->length + 4),
1559 (u_int32_t)smap->length);
1561 if (smap->type != 0x01)
1564 if (smap->length == 0)
1567 Realmem += smap->length;
1569 if (smap->base >= 0xffffffffLLU) {
1570 kprintf("%ju MB of memory above 4GB ignored\n",
1571 (uintmax_t)(smap->length / 1024 / 1024));
1575 for (i = 0; i <= physmap_idx; i += 2) {
1576 if (smap->base < physmap[i + 1]) {
1577 if (boothowto & RB_VERBOSE) {
1578 kprintf("Overlapping or non-montonic "
1579 "memory region, ignoring "
1582 Realmem -= smap->length;
1587 if (smap->base == physmap[physmap_idx + 1]) {
1588 physmap[physmap_idx + 1] += smap->length;
1593 if (physmap_idx == PHYSMAP_ENTRIES*2) {
1594 kprintf("Too many segments in the physical "
1595 "address map, giving up\n");
1598 physmap[physmap_idx] = smap->base;
1599 physmap[physmap_idx + 1] = smap->base + smap->length;
1601 ; /* fix GCC3.x warning */
1602 } while (vmf.vmf_ebx != 0);
1605 * Perform "base memory" related probes & setup based on SMAP
1608 for (i = 0; i <= physmap_idx; i += 2) {
1609 if (physmap[i] == 0x00000000) {
1610 basemem = physmap[i + 1] / 1024;
1619 if (basemem > 640) {
1620 kprintf("Preposterous BIOS basemem of %uK, "
1621 "truncating to 640K\n", basemem);
1625 for (pa = trunc_page(basemem * 1024);
1626 pa < ISA_HOLE_START; pa += PAGE_SIZE) {
1627 pte = vtopte(pa + KERNBASE);
1628 *pte = pa | PG_RW | PG_V;
1632 for (i = basemem / 4; i < 160; i++)
1633 pte[i] = (i << PAGE_SHIFT) | PG_V | PG_RW | PG_U;
1636 if (physmap[1] != 0)
1640 * If we failed above, try memory map with INT 15:E801
1642 vmf.vmf_ax = 0xE801;
1643 if (vm86_intcall(0x15, &vmf) == 0) {
1644 extmem = vmf.vmf_cx + vmf.vmf_dx * 64;
1648 vm86_intcall(0x15, &vmf);
1649 extmem = vmf.vmf_ax;
1652 * Prefer the RTC value for extended memory.
1654 extmem = rtcin(RTC_EXTLO) + (rtcin(RTC_EXTHI) << 8);
1659 * Special hack for chipsets that still remap the 384k hole when
1660 * there's 16MB of memory - this really confuses people that
1661 * are trying to use bus mastering ISA controllers with the
1662 * "16MB limit"; they only have 16MB, but the remapping puts
1663 * them beyond the limit.
1665 * If extended memory is between 15-16MB (16-17MB phys address range),
1668 if ((extmem > 15 * 1024) && (extmem < 16 * 1024))
1672 physmap[1] = basemem * 1024;
1674 physmap[physmap_idx] = 0x100000;
1675 physmap[physmap_idx + 1] = physmap[physmap_idx] + extmem * 1024;
1679 * Now, physmap contains a map of physical memory.
1682 base_memory = physmap[1];
1684 /* make hole for AP bootstrap code YYY */
1685 physmap[1] = mp_bootaddress(base_memory);
1688 /* Save EBDA address, if any */
1689 ebda_addr = (u_long)(*(u_short *)(KERNBASE + 0x40e));
1693 * Maxmem isn't the "maximum memory", it's one larger than the
1694 * highest page of the physical address space. It should be
1695 * called something like "Maxphyspage". We may adjust this
1696 * based on ``hw.physmem'' and the results of the memory test.
1698 Maxmem = atop(physmap[physmap_idx + 1]);
1701 Maxmem = MAXMEM / 4;
1704 if (kgetenv_quad("hw.physmem", &maxmem))
1705 Maxmem = atop(maxmem);
1707 if (atop(physmap[physmap_idx + 1]) != Maxmem &&
1708 (boothowto & RB_VERBOSE))
1709 kprintf("Physical memory use set to %lluK\n", Maxmem * 4);
1712 * If Maxmem has been increased beyond what the system has detected,
1713 * extend the last memory segment to the new limit.
1715 if (atop(physmap[physmap_idx + 1]) < Maxmem)
1716 physmap[physmap_idx + 1] = ptoa(Maxmem);
1718 /* call pmap initialization to make new kernel address space */
1719 pmap_bootstrap(first, 0);
1722 * Size up each available chunk of physical memory.
1724 physmap[0] = PAGE_SIZE; /* mask off page 0 */
1727 phys_avail[pa_indx++] = physmap[0];
1728 phys_avail[pa_indx] = physmap[0];
1729 dump_avail[da_indx] = physmap[0];
1734 * Get dcons buffer address
1736 if (kgetenv_quad("dcons.addr", &dcons_addr) == 0 ||
1737 kgetenv_quad("dcons.size", &dcons_size) == 0)
1741 * physmap is in bytes, so when converting to page boundaries,
1742 * round up the start address and round down the end address.
1744 for (i = 0; i <= physmap_idx; i += 2) {
1748 if (physmap[i + 1] < end)
1749 end = trunc_page(physmap[i + 1]);
1750 for (pa = round_page(physmap[i]); pa < end; pa += PAGE_SIZE) {
1751 int tmp, page_bad, full;
1755 int *ptr = (int *)CADDR1;
1760 * block out kernel memory as not available.
1762 if (pa >= 0x100000 && pa < first)
1766 * block out dcons buffer
1769 && pa >= trunc_page(dcons_addr)
1770 && pa < dcons_addr + dcons_size)
1776 * map page into kernel: valid, read/write,non-cacheable
1778 *pte = pa | PG_V | PG_RW | PG_N;
1783 * Test for alternating 1's and 0's
1785 *(volatile int *)ptr = 0xaaaaaaaa;
1786 if (*(volatile int *)ptr != 0xaaaaaaaa) {
1790 * Test for alternating 0's and 1's
1792 *(volatile int *)ptr = 0x55555555;
1793 if (*(volatile int *)ptr != 0x55555555) {
1799 *(volatile int *)ptr = 0xffffffff;
1800 if (*(volatile int *)ptr != 0xffffffff) {
1806 *(volatile int *)ptr = 0x0;
1807 if (*(volatile int *)ptr != 0x0) {
1811 * Restore original value.
1816 * Adjust array of valid/good pages.
1818 if (page_bad == TRUE) {
1822 * If this good page is a continuation of the
1823 * previous set of good pages, then just increase
1824 * the end pointer. Otherwise start a new chunk.
1825 * Note that "end" points one higher than end,
1826 * making the range >= start and < end.
1827 * If we're also doing a speculative memory
1828 * test and we at or past the end, bump up Maxmem
1829 * so that we keep going. The first bad page
1830 * will terminate the loop.
1832 if (phys_avail[pa_indx] == pa) {
1833 phys_avail[pa_indx] += PAGE_SIZE;
1836 if (pa_indx >= PHYSMAP_ENTRIES*2) {
1837 kprintf("Too many holes in the physical address space, giving up\n");
1842 phys_avail[pa_indx++] = pa; /* start */
1843 phys_avail[pa_indx] = pa + PAGE_SIZE; /* end */
1847 if (dump_avail[da_indx] == pa) {
1848 dump_avail[da_indx] += PAGE_SIZE;
1851 if (da_indx >= PHYSMAP_ENTRIES*2) {
1855 dump_avail[da_indx++] = pa; /* start */
1856 dump_avail[da_indx] = pa + PAGE_SIZE; /* end */
1869 * The last chunk must contain at least one page plus the message
1870 * buffer to avoid complicating other code (message buffer address
1871 * calculation, etc.).
1873 while (phys_avail[pa_indx - 1] + PAGE_SIZE +
1874 round_page(MSGBUF_SIZE) >= phys_avail[pa_indx]) {
1875 physmem -= atop(phys_avail[pa_indx] - phys_avail[pa_indx - 1]);
1876 phys_avail[pa_indx--] = 0;
1877 phys_avail[pa_indx--] = 0;
1880 Maxmem = atop(phys_avail[pa_indx]);
1882 /* Trim off space for the message buffer. */
1883 phys_avail[pa_indx] -= round_page(MSGBUF_SIZE);
1885 avail_end = phys_avail[pa_indx];
1888 struct machintr_abi MachIntrABI;
1899 * 7 Device Not Available (x87)
1901 * 9 Coprocessor Segment overrun (unsupported, reserved)
1903 * 11 Segment not present
1905 * 13 General Protection
1908 * 16 x87 FP Exception pending
1909 * 17 Alignment Check
1911 * 19 SIMD floating point
1913 * 32-255 INTn/external sources
1918 struct gate_descriptor *gdp;
1919 int gsel_tss, metadata_missing, off, x;
1920 struct mdglobaldata *gd;
1923 * Prevent lowering of the ipl if we call tsleep() early.
1925 gd = &CPU_prvspace[0].mdglobaldata;
1926 bzero(gd, sizeof(*gd));
1928 gd->mi.gd_curthread = &thread0;
1929 thread0.td_gd = &gd->mi;
1931 atdevbase = ISA_HOLE_START + KERNBASE;
1933 metadata_missing = 0;
1934 if (bootinfo.bi_modulep) {
1935 preload_metadata = (caddr_t)bootinfo.bi_modulep + KERNBASE;
1936 preload_bootstrap_relocate(KERNBASE);
1938 metadata_missing = 1;
1940 if (bootinfo.bi_envp)
1941 kern_envp = (caddr_t)bootinfo.bi_envp + KERNBASE;
1943 if (boothowto & RB_VERBOSE)
1947 * Default MachIntrABI to ICU
1949 MachIntrABI = MachIntrABI_ICU;
1951 TUNABLE_INT_FETCH("hw.apic_io_enable", &ioapic_enable); /* for compat */
1952 TUNABLE_INT_FETCH("hw.ioapic_enable", &ioapic_enable);
1953 TUNABLE_INT_FETCH("hw.lapic_enable", &lapic_enable);
1956 * start with one cpu. Note: with one cpu, ncpus2_shift, ncpus2_mask,
1957 * and ncpus_fit_mask remain 0.
1962 /* Init basic tunables, hz etc */
1966 * make gdt memory segments, the code segment goes up to end of the
1967 * page with etext in it, the data segment goes to the end of
1971 * XXX text protection is temporarily (?) disabled. The limit was
1972 * i386_btop(round_page(etext)) - 1.
1974 gdt_segs[GCODE_SEL].ssd_limit = atop(0 - 1);
1975 gdt_segs[GDATA_SEL].ssd_limit = atop(0 - 1);
1977 gdt_segs[GPRIV_SEL].ssd_limit =
1978 atop(sizeof(struct privatespace) - 1);
1979 gdt_segs[GPRIV_SEL].ssd_base = (int) &CPU_prvspace[0];
1980 gdt_segs[GPROC0_SEL].ssd_base =
1981 (int) &CPU_prvspace[0].mdglobaldata.gd_common_tss;
1983 gd->mi.gd_prvspace = &CPU_prvspace[0];
1986 * Note: on both UP and SMP curthread must be set non-NULL
1987 * early in the boot sequence because the system assumes
1988 * that 'curthread' is never NULL.
1991 for (x = 0; x < NGDT; x++) {
1993 /* avoid overwriting db entries with APM ones */
1994 if (x >= GAPMCODE32_SEL && x <= GAPMDATA_SEL)
1997 ssdtosd(&gdt_segs[x], &gdt[x].sd);
2000 r_gdt.rd_limit = NGDT * sizeof(gdt[0]) - 1;
2001 r_gdt.rd_base = (int) gdt;
2004 mi_gdinit(&gd->mi, 0);
2006 mi_proc0init(&gd->mi, proc0paddr);
2007 safepri = TDPRI_MAX;
2009 /* make ldt memory segments */
2011 * XXX - VM_MAX_USER_ADDRESS is an end address, not a max. And it
2012 * should be spelled ...MAX_USER...
2014 ldt_segs[LUCODE_SEL].ssd_limit = atop(VM_MAX_USER_ADDRESS - 1);
2015 ldt_segs[LUDATA_SEL].ssd_limit = atop(VM_MAX_USER_ADDRESS - 1);
2016 for (x = 0; x < NELEM(ldt_segs); x++)
2017 ssdtosd(&ldt_segs[x], &ldt[x].sd);
2019 _default_ldt = GSEL(GLDT_SEL, SEL_KPL);
2021 gd->gd_currentldt = _default_ldt;
2022 /* spinlocks and the BGL */
2026 * Setup the hardware exception table. Most exceptions use
2027 * SDT_SYS386TGT, known as a 'trap gate'. Trap gates leave
2028 * interrupts enabled. VM page faults use SDT_SYS386IGT, known as
2029 * an 'interrupt trap gate', which disables interrupts on entry,
2030 * in order to be able to poll the appropriate CRn register to
2031 * determine the fault address.
2033 for (x = 0; x < NIDT; x++) {
2034 #ifdef DEBUG_INTERRUPTS
2035 setidt(x, Xrsvdary[x], SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL));
2037 setidt(x, &IDTVEC(rsvd0), SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL));
2040 setidt(0, &IDTVEC(div), SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL));
2041 setidt(1, &IDTVEC(dbg), SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL));
2042 setidt(2, &IDTVEC(nmi), SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL));
2043 setidt(3, &IDTVEC(bpt), SDT_SYS386TGT, SEL_UPL, GSEL(GCODE_SEL, SEL_KPL));
2044 setidt(4, &IDTVEC(ofl), SDT_SYS386TGT, SEL_UPL, GSEL(GCODE_SEL, SEL_KPL));
2045 setidt(5, &IDTVEC(bnd), SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL));
2046 setidt(6, &IDTVEC(ill), SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL));
2047 setidt(7, &IDTVEC(dna), SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL));
2048 setidt(8, 0, SDT_SYSTASKGT, SEL_KPL, GSEL(GPANIC_SEL, SEL_KPL));
2049 setidt(9, &IDTVEC(fpusegm), SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL));
2050 setidt(10, &IDTVEC(tss), SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL));
2051 setidt(11, &IDTVEC(missing), SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL));
2052 setidt(12, &IDTVEC(stk), SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL));
2053 setidt(13, &IDTVEC(prot), SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL));
2054 setidt(14, &IDTVEC(page), SDT_SYS386IGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL));
2055 setidt(15, &IDTVEC(rsvd0), SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL));
2056 setidt(16, &IDTVEC(fpu), SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL));
2057 setidt(17, &IDTVEC(align), SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL));
2058 setidt(18, &IDTVEC(mchk), SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL));
2059 setidt(19, &IDTVEC(xmm), SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL));
2060 setidt(0x80, &IDTVEC(int0x80_syscall),
2061 SDT_SYS386TGT, SEL_UPL, GSEL(GCODE_SEL, SEL_KPL));
2063 r_idt.rd_limit = sizeof(idt0) - 1;
2064 r_idt.rd_base = (int) idt;
2068 * Initialize the console before we print anything out.
2072 if (metadata_missing)
2073 kprintf("WARNING: loader(8) metadata is missing!\n");
2082 * Initialize IRQ mapping
2085 * SHOULD be after elcr_probe()
2087 MachIntrABI_ICU.initmap();
2088 MachIntrABI_IOAPIC.initmap();
2092 if (boothowto & RB_KDB)
2093 Debugger("Boot flags requested debugger");
2096 finishidentcpu(); /* Final stage of CPU initialization */
2097 setidt(6, &IDTVEC(ill), SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL));
2098 setidt(13, &IDTVEC(prot), SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL));
2099 initializecpu(); /* Initialize CPU registers */
2102 * make an initial tss so cpu can get interrupt stack on syscall!
2103 * The 16 bytes is to save room for a VM86 context.
2105 gd->gd_common_tss.tss_esp0 = (int) thread0.td_pcb - 16;
2106 gd->gd_common_tss.tss_ss0 = GSEL(GDATA_SEL, SEL_KPL) ;
2107 gsel_tss = GSEL(GPROC0_SEL, SEL_KPL);
2108 gd->gd_tss_gdt = &gdt[GPROC0_SEL].sd;
2109 gd->gd_common_tssd = *gd->gd_tss_gdt;
2110 gd->gd_common_tss.tss_ioopt = (sizeof gd->gd_common_tss) << 16;
2113 dblfault_tss.tss_esp = dblfault_tss.tss_esp0 = dblfault_tss.tss_esp1 =
2114 dblfault_tss.tss_esp2 = (int) &dblfault_stack[sizeof(dblfault_stack)];
2115 dblfault_tss.tss_ss = dblfault_tss.tss_ss0 = dblfault_tss.tss_ss1 =
2116 dblfault_tss.tss_ss2 = GSEL(GDATA_SEL, SEL_KPL);
2117 dblfault_tss.tss_cr3 = (int)IdlePTD;
2118 dblfault_tss.tss_eip = (int) dblfault_handler;
2119 dblfault_tss.tss_eflags = PSL_KERNEL;
2120 dblfault_tss.tss_ds = dblfault_tss.tss_es =
2121 dblfault_tss.tss_gs = GSEL(GDATA_SEL, SEL_KPL);
2122 dblfault_tss.tss_fs = GSEL(GPRIV_SEL, SEL_KPL);
2123 dblfault_tss.tss_cs = GSEL(GCODE_SEL, SEL_KPL);
2124 dblfault_tss.tss_ldt = GSEL(GLDT_SEL, SEL_KPL);
2128 init_param2(physmem);
2130 /* now running on new page tables, configured,and u/iom is accessible */
2132 /* Map the message buffer. */
2133 for (off = 0; off < round_page(MSGBUF_SIZE); off += PAGE_SIZE)
2134 pmap_kenter((vm_offset_t)msgbufp + off, avail_end + off);
2136 msgbufinit(msgbufp, MSGBUF_SIZE);
2138 /* make a call gate to reenter kernel with */
2139 gdp = &ldt[LSYS5CALLS_SEL].gd;
2141 x = (int) &IDTVEC(syscall);
2142 gdp->gd_looffset = x++;
2143 gdp->gd_selector = GSEL(GCODE_SEL,SEL_KPL);
2145 gdp->gd_type = SDT_SYS386CGT;
2146 gdp->gd_dpl = SEL_UPL;
2148 gdp->gd_hioffset = ((int) &IDTVEC(syscall)) >>16;
2150 /* XXX does this work? */
2151 ldt[LBSDICALLS_SEL] = ldt[LSYS5CALLS_SEL];
2152 ldt[LSOL26CALLS_SEL] = ldt[LSYS5CALLS_SEL];
2154 /* transfer to user mode */
2156 _ucodesel = LSEL(LUCODE_SEL, SEL_UPL);
2157 _udatasel = LSEL(LUDATA_SEL, SEL_UPL);
2159 /* setup proc 0's pcb */
2160 thread0.td_pcb->pcb_flags = 0;
2161 thread0.td_pcb->pcb_cr3 = (int)IdlePTD; /* should already be setup */
2162 thread0.td_pcb->pcb_ext = 0;
2163 lwp0.lwp_md.md_regs = &proc0_tf;
2167 * Initialize machine-dependant portions of the global data structure.
2168 * Note that the global data area and cpu0's idlestack in the private
2169 * data space were allocated in locore.
2171 * Note: the idlethread's cpl is 0
2173 * WARNING! Called from early boot, 'mycpu' may not work yet.
2176 cpu_gdinit(struct mdglobaldata *gd, int cpu)
2179 gd->mi.gd_curthread = &gd->mi.gd_idlethread;
2181 lwkt_init_thread(&gd->mi.gd_idlethread,
2182 gd->mi.gd_prvspace->idlestack,
2183 sizeof(gd->mi.gd_prvspace->idlestack),
2185 lwkt_set_comm(&gd->mi.gd_idlethread, "idle_%d", cpu);
2186 gd->mi.gd_idlethread.td_switch = cpu_lwkt_switch;
2187 gd->mi.gd_idlethread.td_sp -= sizeof(void *);
2188 *(void **)gd->mi.gd_idlethread.td_sp = cpu_idle_restore;
2192 is_globaldata_space(vm_offset_t saddr, vm_offset_t eaddr)
2194 if (saddr >= (vm_offset_t)&CPU_prvspace[0] &&
2195 eaddr <= (vm_offset_t)&CPU_prvspace[MAXCPU]) {
2202 globaldata_find(int cpu)
2204 KKASSERT(cpu >= 0 && cpu < ncpus);
2205 return(&CPU_prvspace[cpu].mdglobaldata.mi);
2208 #if defined(I586_CPU) && !defined(NO_F00F_HACK)
2209 static void f00f_hack(void *unused);
2210 SYSINIT(f00f_hack, SI_BOOT2_BIOS, SI_ORDER_ANY, f00f_hack, NULL);
2213 f00f_hack(void *unused)
2215 struct gate_descriptor *new_idt;
2221 kprintf("Intel Pentium detected, installing workaround for F00F bug\n");
2223 r_idt.rd_limit = sizeof(idt0) - 1;
2225 tmp = kmem_alloc(&kernel_map, PAGE_SIZE * 2);
2227 panic("kmem_alloc returned 0");
2228 if (((unsigned int)tmp & (PAGE_SIZE-1)) != 0)
2229 panic("kmem_alloc returned non-page-aligned memory");
2230 /* Put the first seven entries in the lower page */
2231 new_idt = (struct gate_descriptor*)(tmp + PAGE_SIZE - (7*8));
2232 bcopy(idt, new_idt, sizeof(idt0));
2233 r_idt.rd_base = (int)new_idt;
2236 if (vm_map_protect(&kernel_map, tmp, tmp + PAGE_SIZE,
2237 VM_PROT_READ, FALSE) != KERN_SUCCESS)
2238 panic("vm_map_protect failed");
2241 #endif /* defined(I586_CPU) && !NO_F00F_HACK */
2244 ptrace_set_pc(struct lwp *lp, unsigned long addr)
2246 lp->lwp_md.md_regs->tf_eip = addr;
2251 ptrace_single_step(struct lwp *lp)
2253 lp->lwp_md.md_regs->tf_eflags |= PSL_T;
2258 fill_regs(struct lwp *lp, struct reg *regs)
2260 struct trapframe *tp;
2262 if ((tp = lp->lwp_md.md_regs) == NULL)
2264 regs->r_gs = tp->tf_gs;
2265 regs->r_fs = tp->tf_fs;
2266 regs->r_es = tp->tf_es;
2267 regs->r_ds = tp->tf_ds;
2268 regs->r_edi = tp->tf_edi;
2269 regs->r_esi = tp->tf_esi;
2270 regs->r_ebp = tp->tf_ebp;
2271 regs->r_ebx = tp->tf_ebx;
2272 regs->r_edx = tp->tf_edx;
2273 regs->r_ecx = tp->tf_ecx;
2274 regs->r_eax = tp->tf_eax;
2275 regs->r_eip = tp->tf_eip;
2276 regs->r_cs = tp->tf_cs;
2277 regs->r_eflags = tp->tf_eflags;
2278 regs->r_esp = tp->tf_esp;
2279 regs->r_ss = tp->tf_ss;
2284 set_regs(struct lwp *lp, struct reg *regs)
2286 struct trapframe *tp;
2288 tp = lp->lwp_md.md_regs;
2289 if (!EFL_SECURE(regs->r_eflags, tp->tf_eflags) ||
2290 !CS_SECURE(regs->r_cs))
2292 tp->tf_gs = regs->r_gs;
2293 tp->tf_fs = regs->r_fs;
2294 tp->tf_es = regs->r_es;
2295 tp->tf_ds = regs->r_ds;
2296 tp->tf_edi = regs->r_edi;
2297 tp->tf_esi = regs->r_esi;
2298 tp->tf_ebp = regs->r_ebp;
2299 tp->tf_ebx = regs->r_ebx;
2300 tp->tf_edx = regs->r_edx;
2301 tp->tf_ecx = regs->r_ecx;
2302 tp->tf_eax = regs->r_eax;
2303 tp->tf_eip = regs->r_eip;
2304 tp->tf_cs = regs->r_cs;
2305 tp->tf_eflags = regs->r_eflags;
2306 tp->tf_esp = regs->r_esp;
2307 tp->tf_ss = regs->r_ss;
2311 #ifndef CPU_DISABLE_SSE
2313 fill_fpregs_xmm(struct savexmm *sv_xmm, struct save87 *sv_87)
2315 struct env87 *penv_87 = &sv_87->sv_env;
2316 struct envxmm *penv_xmm = &sv_xmm->sv_env;
2319 /* FPU control/status */
2320 penv_87->en_cw = penv_xmm->en_cw;
2321 penv_87->en_sw = penv_xmm->en_sw;
2322 penv_87->en_tw = penv_xmm->en_tw;
2323 penv_87->en_fip = penv_xmm->en_fip;
2324 penv_87->en_fcs = penv_xmm->en_fcs;
2325 penv_87->en_opcode = penv_xmm->en_opcode;
2326 penv_87->en_foo = penv_xmm->en_foo;
2327 penv_87->en_fos = penv_xmm->en_fos;
2330 for (i = 0; i < 8; ++i)
2331 sv_87->sv_ac[i] = sv_xmm->sv_fp[i].fp_acc;
2335 set_fpregs_xmm(struct save87 *sv_87, struct savexmm *sv_xmm)
2337 struct env87 *penv_87 = &sv_87->sv_env;
2338 struct envxmm *penv_xmm = &sv_xmm->sv_env;
2341 /* FPU control/status */
2342 penv_xmm->en_cw = penv_87->en_cw;
2343 penv_xmm->en_sw = penv_87->en_sw;
2344 penv_xmm->en_tw = penv_87->en_tw;
2345 penv_xmm->en_fip = penv_87->en_fip;
2346 penv_xmm->en_fcs = penv_87->en_fcs;
2347 penv_xmm->en_opcode = penv_87->en_opcode;
2348 penv_xmm->en_foo = penv_87->en_foo;
2349 penv_xmm->en_fos = penv_87->en_fos;
2352 for (i = 0; i < 8; ++i)
2353 sv_xmm->sv_fp[i].fp_acc = sv_87->sv_ac[i];
2355 #endif /* CPU_DISABLE_SSE */
2358 fill_fpregs(struct lwp *lp, struct fpreg *fpregs)
2360 if (lp->lwp_thread == NULL || lp->lwp_thread->td_pcb == NULL)
2362 #ifndef CPU_DISABLE_SSE
2364 fill_fpregs_xmm(&lp->lwp_thread->td_pcb->pcb_save.sv_xmm,
2365 (struct save87 *)fpregs);
2368 #endif /* CPU_DISABLE_SSE */
2369 bcopy(&lp->lwp_thread->td_pcb->pcb_save.sv_87, fpregs, sizeof *fpregs);
2374 set_fpregs(struct lwp *lp, struct fpreg *fpregs)
2376 #ifndef CPU_DISABLE_SSE
2378 set_fpregs_xmm((struct save87 *)fpregs,
2379 &lp->lwp_thread->td_pcb->pcb_save.sv_xmm);
2382 #endif /* CPU_DISABLE_SSE */
2383 bcopy(fpregs, &lp->lwp_thread->td_pcb->pcb_save.sv_87, sizeof *fpregs);
2388 fill_dbregs(struct lwp *lp, struct dbreg *dbregs)
2393 dbregs->dr0 = rdr0();
2394 dbregs->dr1 = rdr1();
2395 dbregs->dr2 = rdr2();
2396 dbregs->dr3 = rdr3();
2397 dbregs->dr4 = rdr4();
2398 dbregs->dr5 = rdr5();
2399 dbregs->dr6 = rdr6();
2400 dbregs->dr7 = rdr7();
2403 if (lp->lwp_thread == NULL || (pcb = lp->lwp_thread->td_pcb) == NULL)
2405 dbregs->dr0 = pcb->pcb_dr0;
2406 dbregs->dr1 = pcb->pcb_dr1;
2407 dbregs->dr2 = pcb->pcb_dr2;
2408 dbregs->dr3 = pcb->pcb_dr3;
2411 dbregs->dr6 = pcb->pcb_dr6;
2412 dbregs->dr7 = pcb->pcb_dr7;
2417 set_dbregs(struct lwp *lp, struct dbreg *dbregs)
2420 load_dr0(dbregs->dr0);
2421 load_dr1(dbregs->dr1);
2422 load_dr2(dbregs->dr2);
2423 load_dr3(dbregs->dr3);
2424 load_dr4(dbregs->dr4);
2425 load_dr5(dbregs->dr5);
2426 load_dr6(dbregs->dr6);
2427 load_dr7(dbregs->dr7);
2430 struct ucred *ucred;
2432 uint32_t mask1, mask2;
2435 * Don't let an illegal value for dr7 get set. Specifically,
2436 * check for undefined settings. Setting these bit patterns
2437 * result in undefined behaviour and can lead to an unexpected
2440 for (i = 0, mask1 = 0x3<<16, mask2 = 0x2<<16; i < 8;
2441 i++, mask1 <<= 2, mask2 <<= 2)
2442 if ((dbregs->dr7 & mask1) == mask2)
2445 pcb = lp->lwp_thread->td_pcb;
2446 ucred = lp->lwp_proc->p_ucred;
2449 * Don't let a process set a breakpoint that is not within the
2450 * process's address space. If a process could do this, it
2451 * could halt the system by setting a breakpoint in the kernel
2452 * (if ddb was enabled). Thus, we need to check to make sure
2453 * that no breakpoints are being enabled for addresses outside
2454 * process's address space, unless, perhaps, we were called by
2457 * XXX - what about when the watched area of the user's
2458 * address space is written into from within the kernel
2459 * ... wouldn't that still cause a breakpoint to be generated
2460 * from within kernel mode?
2463 if (priv_check_cred(ucred, PRIV_ROOT, 0) != 0) {
2464 if (dbregs->dr7 & 0x3) {
2465 /* dr0 is enabled */
2466 if (dbregs->dr0 >= VM_MAX_USER_ADDRESS)
2470 if (dbregs->dr7 & (0x3<<2)) {
2471 /* dr1 is enabled */
2472 if (dbregs->dr1 >= VM_MAX_USER_ADDRESS)
2476 if (dbregs->dr7 & (0x3<<4)) {
2477 /* dr2 is enabled */
2478 if (dbregs->dr2 >= VM_MAX_USER_ADDRESS)
2482 if (dbregs->dr7 & (0x3<<6)) {
2483 /* dr3 is enabled */
2484 if (dbregs->dr3 >= VM_MAX_USER_ADDRESS)
2489 pcb->pcb_dr0 = dbregs->dr0;
2490 pcb->pcb_dr1 = dbregs->dr1;
2491 pcb->pcb_dr2 = dbregs->dr2;
2492 pcb->pcb_dr3 = dbregs->dr3;
2493 pcb->pcb_dr6 = dbregs->dr6;
2494 pcb->pcb_dr7 = dbregs->dr7;
2496 pcb->pcb_flags |= PCB_DBREGS;
2503 * Return > 0 if a hardware breakpoint has been hit, and the
2504 * breakpoint was in user space. Return 0, otherwise.
2507 user_dbreg_trap(void)
2509 u_int32_t dr7, dr6; /* debug registers dr6 and dr7 */
2510 u_int32_t bp; /* breakpoint bits extracted from dr6 */
2511 int nbp; /* number of breakpoints that triggered */
2512 caddr_t addr[4]; /* breakpoint addresses */
2516 if ((dr7 & 0x000000ff) == 0) {
2518 * all GE and LE bits in the dr7 register are zero,
2519 * thus the trap couldn't have been caused by the
2520 * hardware debug registers
2527 bp = dr6 & 0x0000000f;
2531 * None of the breakpoint bits are set meaning this
2532 * trap was not caused by any of the debug registers
2538 * at least one of the breakpoints were hit, check to see
2539 * which ones and if any of them are user space addresses
2543 addr[nbp++] = (caddr_t)rdr0();
2546 addr[nbp++] = (caddr_t)rdr1();
2549 addr[nbp++] = (caddr_t)rdr2();
2552 addr[nbp++] = (caddr_t)rdr3();
2555 for (i=0; i<nbp; i++) {
2557 (caddr_t)VM_MAX_USER_ADDRESS) {
2559 * addr[i] is in user space
2566 * None of the breakpoints are in user space.
2574 Debugger(const char *msg)
2576 kprintf("Debugger(\"%s\") called.\n", msg);
2583 * Provide inb() and outb() as functions. They are normally only
2584 * available as macros calling inlined functions, thus cannot be
2585 * called inside DDB.
2587 * The actual code is stolen from <machine/cpufunc.h>, and de-inlined.
2593 /* silence compiler warnings */
2595 void outb(u_int, u_char);
2602 * We use %%dx and not %1 here because i/o is done at %dx and not at
2603 * %edx, while gcc generates inferior code (movw instead of movl)
2604 * if we tell it to load (u_short) port.
2606 __asm __volatile("inb %%dx,%0" : "=a" (data) : "d" (port));
2611 outb(u_int port, u_char data)
2615 * Use an unnecessary assignment to help gcc's register allocator.
2616 * This make a large difference for gcc-1.40 and a tiny difference
2617 * for gcc-2.6.0. For gcc-1.40, al had to be ``asm("ax")'' for
2618 * best results. gcc-2.6.0 can't handle this.
2621 __asm __volatile("outb %0,%%dx" : : "a" (al), "d" (port));
2628 #include "opt_cpu.h"
2632 * initialize all the SMP locks
2635 /* critical region when masking or unmasking interupts */
2636 struct spinlock_deprecated imen_spinlock;
2638 /* critical region for old style disable_intr/enable_intr */
2639 struct spinlock_deprecated mpintr_spinlock;
2641 /* critical region around INTR() routines */
2642 struct spinlock_deprecated intr_spinlock;
2644 /* lock region used by kernel profiling */
2645 struct spinlock_deprecated mcount_spinlock;
2647 /* locks com (tty) data/hardware accesses: a FASTINTR() */
2648 struct spinlock_deprecated com_spinlock;
2650 /* lock regions around the clock hardware */
2651 struct spinlock_deprecated clock_spinlock;
2653 /* lock around the MP rendezvous */
2654 struct spinlock_deprecated smp_rv_spinlock;
2661 * Get the initial mplock with a count of 1 for the BSP.
2662 * This uses a LOGICAL cpu ID, ie BSP == 0.
2664 cpu_get_initial_mplock();
2667 spin_lock_init(&mcount_spinlock);
2668 spin_lock_init(&intr_spinlock);
2669 spin_lock_init(&mpintr_spinlock);
2670 spin_lock_init(&imen_spinlock);
2671 spin_lock_init(&smp_rv_spinlock);
2672 spin_lock_init(&com_spinlock);
2673 spin_lock_init(&clock_spinlock);
2675 /* our token pool needs to work early */
2676 lwkt_token_pool_init();