2 * Copyright (c) 2008, Pyun YongHyeon <yongari@FreeBSD.org>
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions
8 * 1. Redistributions of source code must retain the above copyright
9 * notice unmodified, this list of conditions, and the following
11 * 2. Redistributions in binary form must reproduce the above copyright
12 * notice, this list of conditions and the following disclaimer in the
13 * documentation and/or other materials provided with the distribution.
15 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
16 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
17 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
18 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
19 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
20 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
21 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
22 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
23 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
24 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
27 * $FreeBSD: src/sys/dev/jme/if_jmevar.h,v 1.1 2008/05/27 01:42:01 yongari Exp $
28 * $DragonFly: src/sys/dev/netif/jme/if_jmevar.h,v 1.8 2008/11/26 11:55:18 sephe Exp $
34 #include <sys/queue.h>
35 #include <sys/callout.h>
36 #include <sys/taskqueue.h>
39 * JMC250 supports upto JME_NDESC_MAX descriptors and the number of
40 * descriptors should be multiple of JME_NDESC_ALIGN.
42 #define JME_TX_DESC_CNT_DEF 512
43 #define JME_RX_DESC_CNT_DEF 512
45 #define JME_NDESC_ALIGN 16
46 #define JME_NDESC_MAX 1024
48 #define JME_NRXRING_1 1
49 #define JME_NRXRING_2 2
50 #define JME_NRXRING_4 4
52 #define JME_NRXRING_MIN JME_NRXRING_1
53 #define JME_NRXRING_MAX JME_NRXRING_4
55 #define JME_NSERIALIZE (JME_NRXRING_MAX + 2)
57 #define JME_NMSIX (JME_NRXRING_MAX + 1)
60 * Tx/Rx descriptor queue base should be 16bytes aligned and
61 * should not cross 4G bytes boundary on the 64bits address
64 #define JME_TX_RING_ALIGN __VM_CACHELINE_SIZE
65 #define JME_RX_RING_ALIGN __VM_CACHELINE_SIZE
66 #define JME_MAXSEGSIZE 4096
67 #define JME_TSO_MAXSIZE (65535 + sizeof(struct ether_vlan_header))
68 #define JME_MAXTXSEGS 32
69 #define JME_RX_BUF_ALIGN sizeof(uint64_t)
70 #define JME_SSB_ALIGN __VM_CACHELINE_SIZE
72 #if (BUS_SPACE_MAXADDR != BUS_SPACE_MAXADDR_32BIT)
73 #define JME_RING_BOUNDARY 0x100000000ULL
75 #define JME_RING_BOUNDARY 0
78 #define JME_ADDR_LO(x) ((uint64_t) (x) & 0xFFFFFFFF)
79 #define JME_ADDR_HI(x) ((uint64_t) (x) >> 32)
81 #define JME_MSI_MESSAGES 8
82 #define JME_MSIX_MESSAGES 8
84 /* Water mark to kick reclaiming Tx buffers. */
85 #define JME_TX_DESC_HIWAT(sc) \
86 ((sc)->jme_cdata.jme_tx_desc_cnt - \
87 (((sc)->jme_cdata.jme_tx_desc_cnt * 3) / 10))
90 * JMC250 can send 9K jumbo frame on Tx path and can receive
93 #define JME_JUMBO_FRAMELEN 9216
94 #define JME_JUMBO_MTU \
95 (JME_JUMBO_FRAMELEN - sizeof(struct ether_vlan_header) - \
96 ETHER_HDR_LEN - ETHER_CRC_LEN)
98 (ETHER_MAX_LEN + sizeof(struct ether_vlan_header) - \
99 ETHER_HDR_LEN - ETHER_CRC_LEN)
101 * JMC250 can't handle Tx checksum offload/TSO if frame length
102 * is larger than its FIFO size(2K). It's also good idea to not
103 * use jumbo frame if hardware is running at half-duplex media.
104 * Because the jumbo frame may not fit into the Tx FIFO,
105 * collisions make hardware fetch frame from host memory with
106 * DMA again which in turn slows down Tx performance
109 #define JME_TX_FIFO_SIZE 2000
111 * JMC250 has just 4K Rx FIFO. To support jumbo frame that is
112 * larger than 4K bytes in length, Rx FIFO threshold should be
113 * adjusted to minimize Rx FIFO overrun.
115 #define JME_RX_FIFO_SIZE 4000
117 #define JME_DESC_INC(x, y) ((x) = ((x) + 1) % (y))
118 #define JME_DESC_ADD(x, d, y) ((x) = ((x) + (d)) % (y))
122 bus_dmamap_t tx_dmamap;
124 struct jme_desc *tx_desc;
130 bus_dmamap_t rx_dmamap;
131 struct jme_desc *rx_desc;
140 struct lwkt_serialize jme_rx_serialize;
141 struct jme_softc *jme_sc;
143 uint32_t jme_rx_coal;
144 uint32_t jme_rx_comp;
145 uint32_t jme_rx_empty;
148 bus_dma_tag_t jme_rx_tag; /* RX mbuf tag */
149 bus_dmamap_t jme_rx_sparemap;
150 struct jme_rxdesc *jme_rxdesc;
152 struct jme_desc *jme_rx_ring;
153 bus_addr_t jme_rx_ring_paddr;
154 bus_dma_tag_t jme_rx_ring_tag;
155 bus_dmamap_t jme_rx_ring_map;
161 struct mbuf *jme_rxhead;
162 struct mbuf *jme_rxtail;
167 struct jme_chain_data {
171 bus_dma_tag_t jme_ring_tag; /* parent ring tag */
172 bus_dma_tag_t jme_buffer_tag; /* parent mbuf/ssb tag */
175 * Shadow status block
177 struct jme_ssb *jme_ssb_block;
178 bus_addr_t jme_ssb_block_paddr;
179 bus_dma_tag_t jme_ssb_tag;
180 bus_dmamap_t jme_ssb_map;
185 struct lwkt_serialize jme_tx_serialize;
186 struct jme_softc *jme_sc;
187 bus_dma_tag_t jme_tx_tag; /* TX mbuf tag */
188 struct jme_txdesc *jme_txdesc;
190 struct jme_desc *jme_tx_ring;
191 bus_addr_t jme_tx_ring_paddr;
192 bus_dma_tag_t jme_tx_ring_tag;
193 bus_dmamap_t jme_tx_ring_map;
201 struct jme_rxdata jme_rx_data[JME_NRXRING_MAX];
204 struct jme_msix_data {
207 u_int jme_msix_vector;
208 uint32_t jme_msix_intrs;
209 struct resource *jme_msix_res;
210 void *jme_msix_handle;
211 struct lwkt_serialize *jme_msix_serialize;
212 char jme_msix_desc[64];
214 driver_intr_t *jme_msix_func;
218 #define JME_TX_RING_SIZE(sc) \
219 (sizeof(struct jme_desc) * (sc)->jme_cdata.jme_tx_desc_cnt)
220 #define JME_RX_RING_SIZE(rdata) \
221 (sizeof(struct jme_desc) * (rdata)->jme_rx_desc_cnt)
222 #define JME_SSB_SIZE sizeof(struct jme_ssb)
225 * Software state per device.
228 struct arpcom arpcom;
232 struct resource *jme_mem_res;
233 bus_space_tag_t jme_mem_bt;
234 bus_space_handle_t jme_mem_bh;
238 struct resource *jme_irq_res;
239 void *jme_irq_handle;
240 struct jme_msix_data jme_msix[JME_NMSIX];
242 uint32_t jme_msinum[JME_MSINUM_CNT];
246 bus_addr_t jme_lowaddr;
249 uint32_t jme_clksrc_1000;
250 uint32_t jme_tx_dma_size;
251 uint32_t jme_rx_dma_size;
254 #define JME_CAP_FPGA 0x0001
255 #define JME_CAP_PCIE 0x0002
256 #define JME_CAP_PMCAP 0x0004
257 #define JME_CAP_FASTETH 0x0008
258 #define JME_CAP_JUMBO 0x0010
260 uint32_t jme_workaround;
261 #define JME_WA_EXTFIFO 0x0001
262 #define JME_WA_HDX 0x0002
265 #define JME_FLAG_MSI 0x0001
266 #define JME_FLAG_MSIX 0x0002
267 #define JME_FLAG_DETACH 0x0004
268 #define JME_FLAG_LINK 0x0008
270 struct lwkt_serialize jme_serialize;
271 struct lwkt_serialize *jme_serialize_arr[JME_NSERIALIZE];
272 int jme_serialize_cnt;
274 struct callout jme_tick_ch;
275 struct jme_chain_data jme_cdata;
282 struct sysctl_ctx_list jme_sysctl_ctx;
283 struct sysctl_oid *jme_sysctl_tree;
295 /* Register access macros. */
296 #define CSR_WRITE_4(_sc, reg, val) \
297 bus_space_write_4((_sc)->jme_mem_bt, (_sc)->jme_mem_bh, (reg), (val))
298 #define CSR_READ_4(_sc, reg) \
299 bus_space_read_4((_sc)->jme_mem_bt, (_sc)->jme_mem_bh, (reg))
303 #define JME_RXCHAIN_RESET(rdata) \
305 (rdata)->jme_rxhead = NULL; \
306 (rdata)->jme_rxtail = NULL; \
307 (rdata)->jme_rxlen = 0; \
310 #define JME_TX_TIMEOUT 5
311 #define JME_TIMEOUT 1000
312 #define JME_PHY_TIMEOUT 1000
313 #define JME_EEPROM_TIMEOUT 1000
315 #define JME_TXD_RSVD 1
317 #define JME_ENABLE_HWRSS(sc) \
318 ((sc)->jme_cdata.jme_rx_ring_cnt > JME_NRXRING_MIN)