2 * Copyright (c) 2004 Joerg Sonnenberger <joerg@bec.de>. All rights reserved.
4 * Copyright (c) 2001-2008, Intel Corporation
7 * Redistribution and use in source and binary forms, with or without
8 * modification, are permitted provided that the following conditions are met:
10 * 1. Redistributions of source code must retain the above copyright notice,
11 * this list of conditions and the following disclaimer.
13 * 2. Redistributions in binary form must reproduce the above copyright
14 * notice, this list of conditions and the following disclaimer in the
15 * documentation and/or other materials provided with the distribution.
17 * 3. Neither the name of the Intel Corporation nor the names of its
18 * contributors may be used to endorse or promote products derived from
19 * this software without specific prior written permission.
21 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
22 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
23 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
24 * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
25 * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
26 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
27 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
28 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
29 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
30 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
31 * POSSIBILITY OF SUCH DAMAGE.
34 * Copyright (c) 2005 The DragonFly Project. All rights reserved.
36 * This code is derived from software contributed to The DragonFly Project
37 * by Matthew Dillon <dillon@backplane.com>
39 * Redistribution and use in source and binary forms, with or without
40 * modification, are permitted provided that the following conditions
43 * 1. Redistributions of source code must retain the above copyright
44 * notice, this list of conditions and the following disclaimer.
45 * 2. Redistributions in binary form must reproduce the above copyright
46 * notice, this list of conditions and the following disclaimer in
47 * the documentation and/or other materials provided with the
49 * 3. Neither the name of The DragonFly Project nor the names of its
50 * contributors may be used to endorse or promote products derived
51 * from this software without specific, prior written permission.
53 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
54 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
55 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
56 * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
57 * COPYRIGHT HOLDERS OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
58 * INCIDENTAL, SPECIAL, EXEMPLARY OR CONSEQUENTIAL DAMAGES (INCLUDING,
59 * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
60 * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
61 * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
62 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT
63 * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
68 * SERIALIZATION API RULES:
70 * - If the driver uses the same serializer for the interrupt as for the
71 * ifnet, most of the serialization will be done automatically for the
74 * - ifmedia entry points will be serialized by the ifmedia code using the
77 * - if_* entry points except for if_input will be serialized by the IF
78 * and protocol layers.
80 * - The device driver must be sure to serialize access from timeout code
81 * installed by the device driver.
83 * - The device driver typically holds the serializer at the time it wishes
86 * - We must call lwkt_serialize_handler_enable() prior to enabling the
87 * hardware interrupt and lwkt_serialize_handler_disable() after disabling
88 * the hardware interrupt in order to avoid handler execution races from
89 * scheduled interrupt threads.
91 * NOTE! Since callers into the device driver hold the ifnet serializer,
92 * the device driver may be holding a serializer at the time it calls
93 * if_input even if it is not serializer-aware.
96 #include "opt_polling.h"
98 #include <sys/param.h>
100 #include <sys/endian.h>
101 #include <sys/interrupt.h>
102 #include <sys/kernel.h>
104 #include <sys/malloc.h>
105 #include <sys/mbuf.h>
106 #include <sys/proc.h>
107 #include <sys/rman.h>
108 #include <sys/serialize.h>
109 #include <sys/socket.h>
110 #include <sys/sockio.h>
111 #include <sys/sysctl.h>
112 #include <sys/systm.h>
115 #include <net/ethernet.h>
117 #include <net/if_arp.h>
118 #include <net/if_dl.h>
119 #include <net/if_media.h>
120 #include <net/ifq_var.h>
121 #include <net/vlan/if_vlan_var.h>
122 #include <net/vlan/if_vlan_ether.h>
124 #include <netinet/in_systm.h>
125 #include <netinet/in.h>
126 #include <netinet/ip.h>
127 #include <netinet/tcp.h>
128 #include <netinet/udp.h>
130 #include <bus/pci/pcivar.h>
131 #include <bus/pci/pcireg.h>
133 #include <dev/netif/ig_hal/e1000_api.h>
134 #include <dev/netif/ig_hal/e1000_82571.h>
135 #include <dev/netif/em/if_em.h>
137 #define EM_NAME "Intel(R) PRO/1000 Network Connection "
138 #define EM_VER " 6.9.6"
140 #define _EM_DEVICE(id, ret) \
141 { EM_VENDOR_ID, E1000_DEV_ID_##id, ret, EM_NAME #id EM_VER }
142 #define EM_EMX_DEVICE(id) _EM_DEVICE(id, -100)
143 #define EM_DEVICE(id) _EM_DEVICE(id, 0)
144 #define EM_DEVICE_NULL { 0, 0, 0, NULL }
146 static const struct em_vendor_info em_vendor_info_array[] = {
148 EM_DEVICE(82540EM_LOM),
150 EM_DEVICE(82540EP_LOM),
151 EM_DEVICE(82540EP_LP),
155 EM_DEVICE(82541ER_LOM),
156 EM_DEVICE(82541EI_MOBILE),
158 EM_DEVICE(82541GI_LF),
159 EM_DEVICE(82541GI_MOBILE),
163 EM_DEVICE(82543GC_FIBER),
164 EM_DEVICE(82543GC_COPPER),
166 EM_DEVICE(82544EI_COPPER),
167 EM_DEVICE(82544EI_FIBER),
168 EM_DEVICE(82544GC_COPPER),
169 EM_DEVICE(82544GC_LOM),
171 EM_DEVICE(82545EM_COPPER),
172 EM_DEVICE(82545EM_FIBER),
173 EM_DEVICE(82545GM_COPPER),
174 EM_DEVICE(82545GM_FIBER),
175 EM_DEVICE(82545GM_SERDES),
177 EM_DEVICE(82546EB_COPPER),
178 EM_DEVICE(82546EB_FIBER),
179 EM_DEVICE(82546EB_QUAD_COPPER),
180 EM_DEVICE(82546GB_COPPER),
181 EM_DEVICE(82546GB_FIBER),
182 EM_DEVICE(82546GB_SERDES),
183 EM_DEVICE(82546GB_PCIE),
184 EM_DEVICE(82546GB_QUAD_COPPER),
185 EM_DEVICE(82546GB_QUAD_COPPER_KSP3),
188 EM_DEVICE(82547EI_MOBILE),
191 EM_EMX_DEVICE(82571EB_COPPER),
192 EM_EMX_DEVICE(82571EB_FIBER),
193 EM_EMX_DEVICE(82571EB_SERDES),
194 EM_EMX_DEVICE(82571EB_SERDES_DUAL),
195 EM_EMX_DEVICE(82571EB_SERDES_QUAD),
196 EM_EMX_DEVICE(82571EB_QUAD_COPPER),
197 EM_EMX_DEVICE(82571EB_QUAD_COPPER_BP),
198 EM_EMX_DEVICE(82571EB_QUAD_COPPER_LP),
199 EM_EMX_DEVICE(82571EB_QUAD_FIBER),
200 EM_EMX_DEVICE(82571PT_QUAD_COPPER),
202 EM_EMX_DEVICE(82572EI_COPPER),
203 EM_EMX_DEVICE(82572EI_FIBER),
204 EM_EMX_DEVICE(82572EI_SERDES),
205 EM_EMX_DEVICE(82572EI),
207 EM_EMX_DEVICE(82573E),
208 EM_EMX_DEVICE(82573E_IAMT),
209 EM_EMX_DEVICE(82573L),
211 EM_EMX_DEVICE(80003ES2LAN_COPPER_SPT),
212 EM_EMX_DEVICE(80003ES2LAN_SERDES_SPT),
213 EM_EMX_DEVICE(80003ES2LAN_COPPER_DPT),
214 EM_EMX_DEVICE(80003ES2LAN_SERDES_DPT),
216 EM_DEVICE(ICH8_IGP_M_AMT),
217 EM_DEVICE(ICH8_IGP_AMT),
218 EM_DEVICE(ICH8_IGP_C),
220 EM_DEVICE(ICH8_IFE_GT),
221 EM_DEVICE(ICH8_IFE_G),
222 EM_DEVICE(ICH8_IGP_M),
224 EM_DEVICE(ICH9_IGP_M_AMT),
225 EM_DEVICE(ICH9_IGP_AMT),
226 EM_DEVICE(ICH9_IGP_C),
227 EM_DEVICE(ICH9_IGP_M),
228 EM_DEVICE(ICH9_IGP_M_V),
230 EM_DEVICE(ICH9_IFE_GT),
231 EM_DEVICE(ICH9_IFE_G),
234 EM_EMX_DEVICE(82574L),
236 EM_DEVICE(ICH10_R_BM_LM),
237 EM_DEVICE(ICH10_R_BM_LF),
238 EM_DEVICE(ICH10_R_BM_V),
239 EM_DEVICE(ICH10_D_BM_LM),
240 EM_DEVICE(ICH10_D_BM_LF),
242 /* required last entry */
246 static int em_probe(device_t);
247 static int em_attach(device_t);
248 static int em_detach(device_t);
249 static int em_shutdown(device_t);
250 static int em_suspend(device_t);
251 static int em_resume(device_t);
253 static void em_init(void *);
254 static void em_stop(struct adapter *);
255 static int em_ioctl(struct ifnet *, u_long, caddr_t, struct ucred *);
256 static void em_start(struct ifnet *);
257 #ifdef DEVICE_POLLING
258 static void em_poll(struct ifnet *, enum poll_cmd, int);
260 static void em_watchdog(struct ifnet *);
261 static void em_media_status(struct ifnet *, struct ifmediareq *);
262 static int em_media_change(struct ifnet *);
263 static void em_timer(void *);
265 static void em_intr(void *);
266 static void em_rxeof(struct adapter *, int);
267 static void em_txeof(struct adapter *);
268 static void em_tx_collect(struct adapter *);
269 static void em_tx_purge(struct adapter *);
270 static void em_enable_intr(struct adapter *);
271 static void em_disable_intr(struct adapter *);
273 static int em_dma_malloc(struct adapter *, bus_size_t,
274 struct em_dma_alloc *);
275 static void em_dma_free(struct adapter *, struct em_dma_alloc *);
276 static void em_init_tx_ring(struct adapter *);
277 static int em_init_rx_ring(struct adapter *);
278 static int em_create_tx_ring(struct adapter *);
279 static int em_create_rx_ring(struct adapter *);
280 static void em_destroy_tx_ring(struct adapter *, int);
281 static void em_destroy_rx_ring(struct adapter *, int);
282 static int em_newbuf(struct adapter *, int, int);
283 static int em_encap(struct adapter *, struct mbuf **);
284 static void em_rxcsum(struct adapter *, struct e1000_rx_desc *,
286 static int em_txcsum_pullup(struct adapter *, struct mbuf **);
287 static int em_txcsum(struct adapter *, struct mbuf *,
288 uint32_t *, uint32_t *);
290 static int em_get_hw_info(struct adapter *);
291 static int em_is_valid_eaddr(const uint8_t *);
292 static int em_alloc_pci_res(struct adapter *);
293 static void em_free_pci_res(struct adapter *);
294 static int em_hw_init(struct adapter *);
295 static void em_setup_ifp(struct adapter *);
296 static void em_init_tx_unit(struct adapter *);
297 static void em_init_rx_unit(struct adapter *);
298 static void em_update_stats(struct adapter *);
299 static void em_set_promisc(struct adapter *);
300 static void em_disable_promisc(struct adapter *);
301 static void em_set_multi(struct adapter *);
302 static void em_update_link_status(struct adapter *);
303 static void em_smartspeed(struct adapter *);
305 /* Hardware workarounds */
306 static int em_82547_fifo_workaround(struct adapter *, int);
307 static void em_82547_update_fifo_head(struct adapter *, int);
308 static int em_82547_tx_fifo_reset(struct adapter *);
309 static void em_82547_move_tail(void *);
310 static void em_82547_move_tail_serialized(struct adapter *);
311 static uint32_t em_82544_fill_desc(bus_addr_t, uint32_t, PDESC_ARRAY);
313 static void em_print_debug_info(struct adapter *);
314 static void em_print_nvm_info(struct adapter *);
315 static void em_print_hw_stats(struct adapter *);
317 static int em_sysctl_stats(SYSCTL_HANDLER_ARGS);
318 static int em_sysctl_debug_info(SYSCTL_HANDLER_ARGS);
319 static int em_sysctl_int_throttle(SYSCTL_HANDLER_ARGS);
320 static int em_sysctl_int_tx_nsegs(SYSCTL_HANDLER_ARGS);
321 static void em_add_sysctl(struct adapter *adapter);
323 /* Management and WOL Support */
324 static void em_get_mgmt(struct adapter *);
325 static void em_rel_mgmt(struct adapter *);
326 static void em_get_hw_control(struct adapter *);
327 static void em_rel_hw_control(struct adapter *);
328 static void em_enable_wol(device_t);
330 static device_method_t em_methods[] = {
331 /* Device interface */
332 DEVMETHOD(device_probe, em_probe),
333 DEVMETHOD(device_attach, em_attach),
334 DEVMETHOD(device_detach, em_detach),
335 DEVMETHOD(device_shutdown, em_shutdown),
336 DEVMETHOD(device_suspend, em_suspend),
337 DEVMETHOD(device_resume, em_resume),
341 static driver_t em_driver = {
344 sizeof(struct adapter),
347 static devclass_t em_devclass;
349 DECLARE_DUMMY_MODULE(if_em);
350 MODULE_DEPEND(em, ig_hal, 1, 1, 1);
351 DRIVER_MODULE(if_em, pci, em_driver, em_devclass, NULL, NULL);
356 static int em_int_throttle_ceil = EM_DEFAULT_ITR;
357 static int em_rxd = EM_DEFAULT_RXD;
358 static int em_txd = EM_DEFAULT_TXD;
359 static int em_smart_pwr_down = FALSE;
361 /* Controls whether promiscuous also shows bad packets */
362 static int em_debug_sbp = FALSE;
364 static int em_82573_workaround = TRUE;
366 TUNABLE_INT("hw.em.int_throttle_ceil", &em_int_throttle_ceil);
367 TUNABLE_INT("hw.em.rxd", &em_rxd);
368 TUNABLE_INT("hw.em.txd", &em_txd);
369 TUNABLE_INT("hw.em.smart_pwr_down", &em_smart_pwr_down);
370 TUNABLE_INT("hw.em.sbp", &em_debug_sbp);
371 TUNABLE_INT("hw.em.82573_workaround", &em_82573_workaround);
373 /* Global used in WOL setup with multiport cards */
374 static int em_global_quad_port_a = 0;
376 /* Set this to one to display debug statistics */
377 static int em_display_debug_stats = 0;
379 #if !defined(KTR_IF_EM)
380 #define KTR_IF_EM KTR_ALL
382 KTR_INFO_MASTER(if_em);
383 KTR_INFO(KTR_IF_EM, if_em, intr_beg, 0, "intr begin", 0);
384 KTR_INFO(KTR_IF_EM, if_em, intr_end, 1, "intr end", 0);
385 KTR_INFO(KTR_IF_EM, if_em, pkt_receive, 4, "rx packet", 0);
386 KTR_INFO(KTR_IF_EM, if_em, pkt_txqueue, 5, "tx packet", 0);
387 KTR_INFO(KTR_IF_EM, if_em, pkt_txclean, 6, "tx clean", 0);
388 #define logif(name) KTR_LOG(if_em_ ## name)
391 em_probe(device_t dev)
393 const struct em_vendor_info *ent;
396 vid = pci_get_vendor(dev);
397 did = pci_get_device(dev);
399 for (ent = em_vendor_info_array; ent->desc != NULL; ++ent) {
400 if (vid == ent->vendor_id && did == ent->device_id) {
401 device_set_desc(dev, ent->desc);
402 device_set_async_attach(dev, TRUE);
410 em_attach(device_t dev)
412 struct adapter *adapter = device_get_softc(dev);
413 struct ifnet *ifp = &adapter->arpcom.ac_if;
416 uint16_t eeprom_data, device_id;
418 adapter->dev = adapter->osdep.dev = dev;
420 callout_init(&adapter->timer);
421 callout_init(&adapter->tx_fifo_timer);
423 /* Determine hardware and mac info */
424 error = em_get_hw_info(adapter);
426 device_printf(dev, "Identify hardware failed\n");
430 /* Setup PCI resources */
431 error = em_alloc_pci_res(adapter);
433 device_printf(dev, "Allocation of PCI resources failed\n");
438 * For ICH8 and family we need to map the flash memory,
439 * and this must happen after the MAC is identified.
441 if (adapter->hw.mac.type == e1000_ich8lan ||
442 adapter->hw.mac.type == e1000_ich10lan ||
443 adapter->hw.mac.type == e1000_ich9lan) {
444 adapter->flash_rid = EM_BAR_FLASH;
446 adapter->flash = bus_alloc_resource_any(dev, SYS_RES_MEMORY,
447 &adapter->flash_rid, RF_ACTIVE);
448 if (adapter->flash == NULL) {
449 device_printf(dev, "Mapping of Flash failed\n");
453 adapter->osdep.flash_bus_space_tag =
454 rman_get_bustag(adapter->flash);
455 adapter->osdep.flash_bus_space_handle =
456 rman_get_bushandle(adapter->flash);
459 * This is used in the shared code
460 * XXX this goof is actually not used.
462 adapter->hw.flash_address = (uint8_t *)adapter->flash;
465 /* Do Shared Code initialization */
466 if (e1000_setup_init_funcs(&adapter->hw, TRUE)) {
467 device_printf(dev, "Setup of Shared code failed\n");
472 e1000_get_bus_info(&adapter->hw);
475 * Validate number of transmit and receive descriptors. It
476 * must not exceed hardware maximum, and must be multiple
477 * of E1000_DBA_ALIGN.
479 if ((em_txd * sizeof(struct e1000_tx_desc)) % EM_DBA_ALIGN != 0 ||
480 (adapter->hw.mac.type >= e1000_82544 && em_txd > EM_MAX_TXD) ||
481 (adapter->hw.mac.type < e1000_82544 && em_txd > EM_MAX_TXD_82543) ||
482 em_txd < EM_MIN_TXD) {
483 device_printf(dev, "Using %d TX descriptors instead of %d!\n",
484 EM_DEFAULT_TXD, em_txd);
485 adapter->num_tx_desc = EM_DEFAULT_TXD;
487 adapter->num_tx_desc = em_txd;
489 if ((em_rxd * sizeof(struct e1000_rx_desc)) % EM_DBA_ALIGN != 0 ||
490 (adapter->hw.mac.type >= e1000_82544 && em_rxd > EM_MAX_RXD) ||
491 (adapter->hw.mac.type < e1000_82544 && em_rxd > EM_MAX_RXD_82543) ||
492 em_rxd < EM_MIN_RXD) {
493 device_printf(dev, "Using %d RX descriptors instead of %d!\n",
494 EM_DEFAULT_RXD, em_rxd);
495 adapter->num_rx_desc = EM_DEFAULT_RXD;
497 adapter->num_rx_desc = em_rxd;
500 adapter->hw.mac.autoneg = DO_AUTO_NEG;
501 adapter->hw.phy.autoneg_wait_to_complete = FALSE;
502 adapter->hw.phy.autoneg_advertised = AUTONEG_ADV_DEFAULT;
503 adapter->rx_buffer_len = MCLBYTES;
506 * Interrupt throttle rate
508 if (em_int_throttle_ceil == 0) {
509 adapter->int_throttle_ceil = 0;
511 int throttle = em_int_throttle_ceil;
514 throttle = EM_DEFAULT_ITR;
516 /* Recalculate the tunable value to get the exact frequency. */
517 throttle = 1000000000 / 256 / throttle;
519 /* Upper 16bits of ITR is reserved and should be zero */
520 if (throttle & 0xffff0000)
521 throttle = 1000000000 / 256 / EM_DEFAULT_ITR;
523 adapter->int_throttle_ceil = 1000000000 / 256 / throttle;
526 e1000_init_script_state_82541(&adapter->hw, TRUE);
527 e1000_set_tbi_compatibility_82543(&adapter->hw, TRUE);
530 if (adapter->hw.phy.media_type == e1000_media_type_copper) {
531 adapter->hw.phy.mdix = AUTO_ALL_MODES;
532 adapter->hw.phy.disable_polarity_correction = FALSE;
533 adapter->hw.phy.ms_type = EM_MASTER_SLAVE;
536 /* Set the frame limits assuming standard ethernet sized frames. */
537 adapter->max_frame_size = ETHERMTU + ETHER_HDR_LEN + ETHER_CRC_LEN;
538 adapter->min_frame_size = ETH_ZLEN + ETHER_CRC_LEN;
540 /* This controls when hardware reports transmit completion status. */
541 adapter->hw.mac.report_tx_early = 1;
544 * Create top level busdma tag
546 error = bus_dma_tag_create(NULL, 1, 0,
547 BUS_SPACE_MAXADDR, BUS_SPACE_MAXADDR,
549 BUS_SPACE_MAXSIZE_32BIT, 0, BUS_SPACE_MAXSIZE_32BIT,
550 0, &adapter->parent_dtag);
552 device_printf(dev, "could not create top level DMA tag\n");
557 * Allocate Transmit Descriptor ring
559 tsize = roundup2(adapter->num_tx_desc * sizeof(struct e1000_tx_desc),
561 error = em_dma_malloc(adapter, tsize, &adapter->txdma);
563 device_printf(dev, "Unable to allocate tx_desc memory\n");
566 adapter->tx_desc_base = adapter->txdma.dma_vaddr;
569 * Allocate Receive Descriptor ring
571 rsize = roundup2(adapter->num_rx_desc * sizeof(struct e1000_rx_desc),
573 error = em_dma_malloc(adapter, rsize, &adapter->rxdma);
575 device_printf(dev, "Unable to allocate rx_desc memory\n");
578 adapter->rx_desc_base = adapter->rxdma.dma_vaddr;
580 /* Make sure we have a good EEPROM before we read from it */
581 if (e1000_validate_nvm_checksum(&adapter->hw) < 0) {
583 * Some PCI-E parts fail the first check due to
584 * the link being in sleep state, call it again,
585 * if it fails a second time its a real issue.
587 if (e1000_validate_nvm_checksum(&adapter->hw) < 0) {
589 "The EEPROM Checksum Is Not Valid\n");
595 /* Initialize the hardware */
596 error = em_hw_init(adapter);
598 device_printf(dev, "Unable to initialize the hardware\n");
602 /* Copy the permanent MAC address out of the EEPROM */
603 if (e1000_read_mac_addr(&adapter->hw) < 0) {
604 device_printf(dev, "EEPROM read error while reading MAC"
609 if (!em_is_valid_eaddr(adapter->hw.mac.addr)) {
610 device_printf(dev, "Invalid MAC address\n");
615 /* Allocate transmit descriptors and buffers */
616 error = em_create_tx_ring(adapter);
618 device_printf(dev, "Could not setup transmit structures\n");
622 /* Allocate receive descriptors and buffers */
623 error = em_create_rx_ring(adapter);
625 device_printf(dev, "Could not setup receive structures\n");
629 /* Manually turn off all interrupts */
630 E1000_WRITE_REG(&adapter->hw, E1000_IMC, 0xffffffff);
632 /* Setup OS specific network interface */
633 em_setup_ifp(adapter);
635 /* Add sysctl tree, must after em_setup_ifp() */
636 em_add_sysctl(adapter);
638 /* Initialize statistics */
639 em_update_stats(adapter);
641 adapter->hw.mac.get_link_status = 1;
642 em_update_link_status(adapter);
644 /* Indicate SOL/IDER usage */
645 if (e1000_check_reset_block(&adapter->hw)) {
647 "PHY reset is blocked due to SOL/IDER session.\n");
650 /* Determine if we have to control management hardware */
651 adapter->has_manage = e1000_enable_mng_pass_thru(&adapter->hw);
656 switch (adapter->hw.mac.type) {
662 case e1000_82546_rev_3:
664 case e1000_80003es2lan:
665 if (adapter->hw.bus.func == 1) {
666 e1000_read_nvm(&adapter->hw,
667 NVM_INIT_CONTROL3_PORT_B, 1, &eeprom_data);
669 e1000_read_nvm(&adapter->hw,
670 NVM_INIT_CONTROL3_PORT_A, 1, &eeprom_data);
672 eeprom_data &= EM_EEPROM_APME;
676 /* APME bit in EEPROM is mapped to WUC.APME */
678 E1000_READ_REG(&adapter->hw, E1000_WUC) & E1000_WUC_APME;
682 adapter->wol = E1000_WUFC_MAG;
684 * We have the eeprom settings, now apply the special cases
685 * where the eeprom may be wrong or the board won't support
686 * wake on lan on a particular port
688 device_id = pci_get_device(dev);
690 case E1000_DEV_ID_82546GB_PCIE:
694 case E1000_DEV_ID_82546EB_FIBER:
695 case E1000_DEV_ID_82546GB_FIBER:
696 case E1000_DEV_ID_82571EB_FIBER:
698 * Wake events only supported on port A for dual fiber
699 * regardless of eeprom setting
701 if (E1000_READ_REG(&adapter->hw, E1000_STATUS) &
706 case E1000_DEV_ID_82546GB_QUAD_COPPER_KSP3:
707 case E1000_DEV_ID_82571EB_QUAD_COPPER:
708 case E1000_DEV_ID_82571EB_QUAD_FIBER:
709 case E1000_DEV_ID_82571EB_QUAD_COPPER_LP:
710 /* if quad port adapter, disable WoL on all but port A */
711 if (em_global_quad_port_a != 0)
713 /* Reset for multiple quad port adapters */
714 if (++em_global_quad_port_a == 4)
715 em_global_quad_port_a = 0;
719 /* XXX disable wol */
722 /* Do we need workaround for 82544 PCI-X adapter? */
723 if (adapter->hw.bus.type == e1000_bus_type_pcix &&
724 adapter->hw.mac.type == e1000_82544)
725 adapter->pcix_82544 = TRUE;
727 adapter->pcix_82544 = FALSE;
729 if (adapter->pcix_82544) {
731 * 82544 on PCI-X may split one TX segment
732 * into two TX descs, so we double its number
733 * of spare TX desc here.
735 adapter->spare_tx_desc = 2 * EM_TX_SPARE;
737 adapter->spare_tx_desc = EM_TX_SPARE;
741 * Keep following relationship between spare_tx_desc, oact_tx_desc
743 * (spare_tx_desc + EM_TX_RESERVED) <=
744 * oact_tx_desc <= EM_TX_OACTIVE_MAX <= tx_int_nsegs
746 adapter->oact_tx_desc = adapter->num_tx_desc / 8;
747 if (adapter->oact_tx_desc > EM_TX_OACTIVE_MAX)
748 adapter->oact_tx_desc = EM_TX_OACTIVE_MAX;
749 if (adapter->oact_tx_desc < adapter->spare_tx_desc + EM_TX_RESERVED)
750 adapter->oact_tx_desc = adapter->spare_tx_desc + EM_TX_RESERVED;
752 adapter->tx_int_nsegs = adapter->num_tx_desc / 16;
753 if (adapter->tx_int_nsegs < adapter->oact_tx_desc)
754 adapter->tx_int_nsegs = adapter->oact_tx_desc;
756 error = bus_setup_intr(dev, adapter->intr_res, INTR_MPSAFE,
757 em_intr, adapter, &adapter->intr_tag,
760 device_printf(dev, "Failed to register interrupt handler");
761 ether_ifdetach(&adapter->arpcom.ac_if);
765 ifp->if_cpuid = ithread_cpuid(rman_get_start(adapter->intr_res));
766 KKASSERT(ifp->if_cpuid >= 0 && ifp->if_cpuid < ncpus);
774 em_detach(device_t dev)
776 struct adapter *adapter = device_get_softc(dev);
778 if (device_is_attached(dev)) {
779 struct ifnet *ifp = &adapter->arpcom.ac_if;
781 lwkt_serialize_enter(ifp->if_serializer);
785 e1000_phy_hw_reset(&adapter->hw);
787 em_rel_mgmt(adapter);
789 if ((adapter->hw.mac.type == e1000_82573 ||
790 adapter->hw.mac.type == e1000_ich8lan ||
791 adapter->hw.mac.type == e1000_ich10lan ||
792 adapter->hw.mac.type == e1000_ich9lan) &&
793 e1000_check_mng_mode(&adapter->hw))
794 em_rel_hw_control(adapter);
797 E1000_WRITE_REG(&adapter->hw, E1000_WUC,
799 E1000_WRITE_REG(&adapter->hw, E1000_WUFC, adapter->wol);
803 bus_teardown_intr(dev, adapter->intr_res, adapter->intr_tag);
805 lwkt_serialize_exit(ifp->if_serializer);
809 bus_generic_detach(dev);
811 em_free_pci_res(adapter);
813 em_destroy_tx_ring(adapter, adapter->num_tx_desc);
814 em_destroy_rx_ring(adapter, adapter->num_rx_desc);
816 /* Free Transmit Descriptor ring */
817 if (adapter->tx_desc_base)
818 em_dma_free(adapter, &adapter->txdma);
820 /* Free Receive Descriptor ring */
821 if (adapter->rx_desc_base)
822 em_dma_free(adapter, &adapter->rxdma);
824 /* Free top level busdma tag */
825 if (adapter->parent_dtag != NULL)
826 bus_dma_tag_destroy(adapter->parent_dtag);
828 /* Free sysctl tree */
829 if (adapter->sysctl_tree != NULL)
830 sysctl_ctx_free(&adapter->sysctl_ctx);
836 em_shutdown(device_t dev)
838 return em_suspend(dev);
842 em_suspend(device_t dev)
844 struct adapter *adapter = device_get_softc(dev);
845 struct ifnet *ifp = &adapter->arpcom.ac_if;
847 lwkt_serialize_enter(ifp->if_serializer);
851 em_rel_mgmt(adapter);
853 if ((adapter->hw.mac.type == e1000_82573 ||
854 adapter->hw.mac.type == e1000_ich8lan ||
855 adapter->hw.mac.type == e1000_ich10lan ||
856 adapter->hw.mac.type == e1000_ich9lan) &&
857 e1000_check_mng_mode(&adapter->hw))
858 em_rel_hw_control(adapter);
861 E1000_WRITE_REG(&adapter->hw, E1000_WUC, E1000_WUC_PME_EN);
862 E1000_WRITE_REG(&adapter->hw, E1000_WUFC, adapter->wol);
866 lwkt_serialize_exit(ifp->if_serializer);
868 return bus_generic_suspend(dev);
872 em_resume(device_t dev)
874 struct adapter *adapter = device_get_softc(dev);
875 struct ifnet *ifp = &adapter->arpcom.ac_if;
877 lwkt_serialize_enter(ifp->if_serializer);
880 em_get_mgmt(adapter);
883 lwkt_serialize_exit(ifp->if_serializer);
885 return bus_generic_resume(dev);
889 em_start(struct ifnet *ifp)
891 struct adapter *adapter = ifp->if_softc;
894 ASSERT_SERIALIZED(ifp->if_serializer);
896 if ((ifp->if_flags & (IFF_RUNNING | IFF_OACTIVE)) != IFF_RUNNING)
899 if (!adapter->link_active) {
900 ifq_purge(&ifp->if_snd);
904 while (!ifq_is_empty(&ifp->if_snd)) {
905 /* Now do we at least have a minimal? */
906 if (EM_IS_OACTIVE(adapter)) {
907 em_tx_collect(adapter);
908 if (EM_IS_OACTIVE(adapter)) {
909 ifp->if_flags |= IFF_OACTIVE;
910 adapter->no_tx_desc_avail1++;
916 m_head = ifq_dequeue(&ifp->if_snd, NULL);
920 if (em_encap(adapter, &m_head)) {
922 em_tx_collect(adapter);
926 /* Send a copy of the frame to the BPF listener */
927 ETHER_BPF_MTAP(ifp, m_head);
929 /* Set timeout in case hardware has problems transmitting. */
930 ifp->if_timer = EM_TX_TIMEOUT;
935 em_ioctl(struct ifnet *ifp, u_long command, caddr_t data, struct ucred *cr)
937 struct adapter *adapter = ifp->if_softc;
938 struct ifreq *ifr = (struct ifreq *)data;
939 uint16_t eeprom_data = 0;
940 int max_frame_size, mask, reinit;
943 ASSERT_SERIALIZED(ifp->if_serializer);
947 switch (adapter->hw.mac.type) {
950 * 82573 only supports jumbo frames
951 * if ASPM is disabled.
953 e1000_read_nvm(&adapter->hw,
954 NVM_INIT_3GIO_3, 1, &eeprom_data);
955 if (eeprom_data & NVM_WORD1A_ASPM_MASK) {
956 max_frame_size = ETHER_MAX_LEN;
961 /* Limit Jumbo Frame size */
967 case e1000_80003es2lan:
968 max_frame_size = 9234;
971 /* Adapters that do not support jumbo frames */
974 max_frame_size = ETHER_MAX_LEN;
978 max_frame_size = MAX_JUMBO_FRAME_SIZE;
981 if (ifr->ifr_mtu > max_frame_size - ETHER_HDR_LEN -
987 ifp->if_mtu = ifr->ifr_mtu;
988 adapter->max_frame_size =
989 ifp->if_mtu + ETHER_HDR_LEN + ETHER_CRC_LEN;
991 if (ifp->if_flags & IFF_RUNNING)
996 if (ifp->if_flags & IFF_UP) {
997 if ((ifp->if_flags & IFF_RUNNING)) {
998 if ((ifp->if_flags ^ adapter->if_flags) &
999 (IFF_PROMISC | IFF_ALLMULTI)) {
1000 em_disable_promisc(adapter);
1001 em_set_promisc(adapter);
1006 } else if (ifp->if_flags & IFF_RUNNING) {
1009 adapter->if_flags = ifp->if_flags;
1014 if (ifp->if_flags & IFF_RUNNING) {
1015 em_disable_intr(adapter);
1016 em_set_multi(adapter);
1017 if (adapter->hw.mac.type == e1000_82542 &&
1018 adapter->hw.revision_id == E1000_REVISION_2)
1019 em_init_rx_unit(adapter);
1020 #ifdef DEVICE_POLLING
1021 if (!(ifp->if_flags & IFF_POLLING))
1023 em_enable_intr(adapter);
1028 /* Check SOL/IDER usage */
1029 if (e1000_check_reset_block(&adapter->hw)) {
1030 device_printf(adapter->dev, "Media change is"
1031 " blocked due to SOL/IDER session.\n");
1037 error = ifmedia_ioctl(ifp, ifr, &adapter->media, command);
1042 mask = ifr->ifr_reqcap ^ ifp->if_capenable;
1043 if (mask & IFCAP_HWCSUM) {
1044 ifp->if_capenable ^= (mask & IFCAP_HWCSUM);
1047 if (mask & IFCAP_VLAN_HWTAGGING) {
1048 ifp->if_capenable ^= IFCAP_VLAN_HWTAGGING;
1051 if (reinit && (ifp->if_flags & IFF_RUNNING))
1056 error = ether_ioctl(ifp, command, data);
1063 em_watchdog(struct ifnet *ifp)
1065 struct adapter *adapter = ifp->if_softc;
1067 ASSERT_SERIALIZED(ifp->if_serializer);
1070 * The timer is set to 5 every time start queues a packet.
1071 * Then txeof keeps resetting it as long as it cleans at
1072 * least one descriptor.
1073 * Finally, anytime all descriptors are clean the timer is
1077 if (E1000_READ_REG(&adapter->hw, E1000_TDT(0)) ==
1078 E1000_READ_REG(&adapter->hw, E1000_TDH(0))) {
1080 * If we reach here, all TX jobs are completed and
1081 * the TX engine should have been idled for some time.
1082 * We don't need to call if_devstart() here.
1084 ifp->if_flags &= ~IFF_OACTIVE;
1090 * If we are in this routine because of pause frames, then
1091 * don't reset the hardware.
1093 if (E1000_READ_REG(&adapter->hw, E1000_STATUS) &
1094 E1000_STATUS_TXOFF) {
1095 ifp->if_timer = EM_TX_TIMEOUT;
1099 if (e1000_check_for_link(&adapter->hw) == 0)
1100 if_printf(ifp, "watchdog timeout -- resetting\n");
1103 adapter->watchdog_events++;
1107 if (!ifq_is_empty(&ifp->if_snd))
1114 struct adapter *adapter = xsc;
1115 struct ifnet *ifp = &adapter->arpcom.ac_if;
1116 device_t dev = adapter->dev;
1119 ASSERT_SERIALIZED(ifp->if_serializer);
1124 * Packet Buffer Allocation (PBA)
1125 * Writing PBA sets the receive portion of the buffer
1126 * the remainder is used for the transmit buffer.
1128 * Devices before the 82547 had a Packet Buffer of 64K.
1129 * Default allocation: PBA=48K for Rx, leaving 16K for Tx.
1130 * After the 82547 the buffer was reduced to 40K.
1131 * Default allocation: PBA=30K for Rx, leaving 10K for Tx.
1132 * Note: default does not leave enough room for Jumbo Frame >10k.
1134 switch (adapter->hw.mac.type) {
1136 case e1000_82547_rev_2: /* 82547: Total Packet Buffer is 40K */
1137 if (adapter->max_frame_size > 8192)
1138 pba = E1000_PBA_22K; /* 22K for Rx, 18K for Tx */
1140 pba = E1000_PBA_30K; /* 30K for Rx, 10K for Tx */
1141 adapter->tx_fifo_head = 0;
1142 adapter->tx_head_addr = pba << EM_TX_HEAD_ADDR_SHIFT;
1143 adapter->tx_fifo_size =
1144 (E1000_PBA_40K - pba) << EM_PBA_BYTES_SHIFT;
1147 /* Total Packet Buffer on these is 48K */
1150 case e1000_80003es2lan:
1151 pba = E1000_PBA_32K; /* 32K for Rx, 16K for Tx */
1154 case e1000_82573: /* 82573: Total Packet Buffer is 32K */
1155 pba = E1000_PBA_12K; /* 12K for Rx, 20K for Tx */
1159 pba = E1000_PBA_20K; /* 20K for Rx, 20K for Tx */
1163 case e1000_ich10lan:
1164 #define E1000_PBA_10K 0x000A
1165 pba = E1000_PBA_10K;
1173 /* Devices before 82547 had a Packet Buffer of 64K. */
1174 if (adapter->max_frame_size > 8192)
1175 pba = E1000_PBA_40K; /* 40K for Rx, 24K for Tx */
1177 pba = E1000_PBA_48K; /* 48K for Rx, 16K for Tx */
1179 E1000_WRITE_REG(&adapter->hw, E1000_PBA, pba);
1181 /* Get the latest mac address, User can use a LAA */
1182 bcopy(IF_LLADDR(ifp), adapter->hw.mac.addr, ETHER_ADDR_LEN);
1184 /* Put the address into the Receive Address Array */
1185 e1000_rar_set(&adapter->hw, adapter->hw.mac.addr, 0);
1188 * With the 82571 adapter, RAR[0] may be overwritten
1189 * when the other port is reset, we make a duplicate
1190 * in RAR[14] for that eventuality, this assures
1191 * the interface continues to function.
1193 if (adapter->hw.mac.type == e1000_82571) {
1194 e1000_set_laa_state_82571(&adapter->hw, TRUE);
1195 e1000_rar_set(&adapter->hw, adapter->hw.mac.addr,
1196 E1000_RAR_ENTRIES - 1);
1199 /* Initialize the hardware */
1200 if (em_hw_init(adapter)) {
1201 device_printf(dev, "Unable to initialize the hardware\n");
1202 /* XXX em_stop()? */
1205 em_update_link_status(adapter);
1207 /* Setup VLAN support, basic and offload if available */
1208 E1000_WRITE_REG(&adapter->hw, E1000_VET, ETHERTYPE_VLAN);
1210 if (ifp->if_capenable & IFCAP_VLAN_HWTAGGING) {
1213 ctrl = E1000_READ_REG(&adapter->hw, E1000_CTRL);
1214 ctrl |= E1000_CTRL_VME;
1215 E1000_WRITE_REG(&adapter->hw, E1000_CTRL, ctrl);
1218 /* Set hardware offload abilities */
1219 if (ifp->if_capenable & IFCAP_TXCSUM)
1220 ifp->if_hwassist = EM_CSUM_FEATURES;
1222 ifp->if_hwassist = 0;
1224 /* Configure for OS presence */
1225 em_get_mgmt(adapter);
1227 /* Prepare transmit descriptors and buffers */
1228 em_init_tx_ring(adapter);
1229 em_init_tx_unit(adapter);
1231 /* Setup Multicast table */
1232 em_set_multi(adapter);
1234 /* Prepare receive descriptors and buffers */
1235 if (em_init_rx_ring(adapter)) {
1236 device_printf(dev, "Could not setup receive structures\n");
1240 em_init_rx_unit(adapter);
1242 /* Don't lose promiscuous settings */
1243 em_set_promisc(adapter);
1245 ifp->if_flags |= IFF_RUNNING;
1246 ifp->if_flags &= ~IFF_OACTIVE;
1248 callout_reset(&adapter->timer, hz, em_timer, adapter);
1249 e1000_clear_hw_cntrs_base_generic(&adapter->hw);
1251 /* MSI/X configuration for 82574 */
1252 if (adapter->hw.mac.type == e1000_82574) {
1255 tmp = E1000_READ_REG(&adapter->hw, E1000_CTRL_EXT);
1256 tmp |= E1000_CTRL_EXT_PBA_CLR;
1257 E1000_WRITE_REG(&adapter->hw, E1000_CTRL_EXT, tmp);
1259 * Set the IVAR - interrupt vector routing.
1260 * Each nibble represents a vector, high bit
1261 * is enable, other 3 bits are the MSIX table
1262 * entry, we map RXQ0 to 0, TXQ0 to 1, and
1263 * Link (other) to 2, hence the magic number.
1265 E1000_WRITE_REG(&adapter->hw, E1000_IVAR, 0x800A0908);
1268 #ifdef DEVICE_POLLING
1270 * Only enable interrupts if we are not polling, make sure
1271 * they are off otherwise.
1273 if (ifp->if_flags & IFF_POLLING)
1274 em_disable_intr(adapter);
1276 #endif /* DEVICE_POLLING */
1277 em_enable_intr(adapter);
1279 /* Don't reset the phy next time init gets called */
1280 adapter->hw.phy.reset_disable = TRUE;
1283 #ifdef DEVICE_POLLING
1286 em_poll(struct ifnet *ifp, enum poll_cmd cmd, int count)
1288 struct adapter *adapter = ifp->if_softc;
1291 ASSERT_SERIALIZED(ifp->if_serializer);
1295 em_disable_intr(adapter);
1298 case POLL_DEREGISTER:
1299 em_enable_intr(adapter);
1302 case POLL_AND_CHECK_STATUS:
1303 reg_icr = E1000_READ_REG(&adapter->hw, E1000_ICR);
1304 if (reg_icr & (E1000_ICR_RXSEQ | E1000_ICR_LSC)) {
1305 callout_stop(&adapter->timer);
1306 adapter->hw.mac.get_link_status = 1;
1307 em_update_link_status(adapter);
1308 callout_reset(&adapter->timer, hz, em_timer, adapter);
1312 if (ifp->if_flags & IFF_RUNNING) {
1313 em_rxeof(adapter, count);
1316 if (!ifq_is_empty(&ifp->if_snd))
1323 #endif /* DEVICE_POLLING */
1328 struct adapter *adapter = xsc;
1329 struct ifnet *ifp = &adapter->arpcom.ac_if;
1333 ASSERT_SERIALIZED(ifp->if_serializer);
1335 reg_icr = E1000_READ_REG(&adapter->hw, E1000_ICR);
1337 if ((adapter->hw.mac.type >= e1000_82571 &&
1338 (reg_icr & E1000_ICR_INT_ASSERTED) == 0) ||
1345 * XXX: some laptops trigger several spurious interrupts
1346 * on em(4) when in the resume cycle. The ICR register
1347 * reports all-ones value in this case. Processing such
1348 * interrupts would lead to a freeze. I don't know why.
1350 if (reg_icr == 0xffffffff) {
1355 if (ifp->if_flags & IFF_RUNNING) {
1357 (E1000_ICR_RXT0 | E1000_ICR_RXDMT0 | E1000_ICR_RXO))
1358 em_rxeof(adapter, -1);
1359 if (reg_icr & E1000_ICR_TXDW) {
1361 if (!ifq_is_empty(&ifp->if_snd))
1366 /* Link status change */
1367 if (reg_icr & (E1000_ICR_RXSEQ | E1000_ICR_LSC)) {
1368 callout_stop(&adapter->timer);
1369 adapter->hw.mac.get_link_status = 1;
1370 em_update_link_status(adapter);
1372 /* Deal with TX cruft when link lost */
1373 em_tx_purge(adapter);
1375 callout_reset(&adapter->timer, hz, em_timer, adapter);
1378 if (reg_icr & E1000_ICR_RXO)
1379 adapter->rx_overruns++;
1385 em_media_status(struct ifnet *ifp, struct ifmediareq *ifmr)
1387 struct adapter *adapter = ifp->if_softc;
1388 u_char fiber_type = IFM_1000_SX;
1390 ASSERT_SERIALIZED(ifp->if_serializer);
1392 em_update_link_status(adapter);
1394 ifmr->ifm_status = IFM_AVALID;
1395 ifmr->ifm_active = IFM_ETHER;
1397 if (!adapter->link_active)
1400 ifmr->ifm_status |= IFM_ACTIVE;
1402 if (adapter->hw.phy.media_type == e1000_media_type_fiber ||
1403 adapter->hw.phy.media_type == e1000_media_type_internal_serdes) {
1404 if (adapter->hw.mac.type == e1000_82545)
1405 fiber_type = IFM_1000_LX;
1406 ifmr->ifm_active |= fiber_type | IFM_FDX;
1408 switch (adapter->link_speed) {
1410 ifmr->ifm_active |= IFM_10_T;
1413 ifmr->ifm_active |= IFM_100_TX;
1417 ifmr->ifm_active |= IFM_1000_T;
1420 if (adapter->link_duplex == FULL_DUPLEX)
1421 ifmr->ifm_active |= IFM_FDX;
1423 ifmr->ifm_active |= IFM_HDX;
1428 em_media_change(struct ifnet *ifp)
1430 struct adapter *adapter = ifp->if_softc;
1431 struct ifmedia *ifm = &adapter->media;
1433 ASSERT_SERIALIZED(ifp->if_serializer);
1435 if (IFM_TYPE(ifm->ifm_media) != IFM_ETHER)
1438 switch (IFM_SUBTYPE(ifm->ifm_media)) {
1440 adapter->hw.mac.autoneg = DO_AUTO_NEG;
1441 adapter->hw.phy.autoneg_advertised = AUTONEG_ADV_DEFAULT;
1447 adapter->hw.mac.autoneg = DO_AUTO_NEG;
1448 adapter->hw.phy.autoneg_advertised = ADVERTISE_1000_FULL;
1452 adapter->hw.mac.autoneg = FALSE;
1453 adapter->hw.phy.autoneg_advertised = 0;
1454 if ((ifm->ifm_media & IFM_GMASK) == IFM_FDX)
1455 adapter->hw.mac.forced_speed_duplex = ADVERTISE_100_FULL;
1457 adapter->hw.mac.forced_speed_duplex = ADVERTISE_100_HALF;
1461 adapter->hw.mac.autoneg = FALSE;
1462 adapter->hw.phy.autoneg_advertised = 0;
1463 if ((ifm->ifm_media & IFM_GMASK) == IFM_FDX)
1464 adapter->hw.mac.forced_speed_duplex = ADVERTISE_10_FULL;
1466 adapter->hw.mac.forced_speed_duplex = ADVERTISE_10_HALF;
1470 if_printf(ifp, "Unsupported media type\n");
1475 * As the speed/duplex settings my have changed we need to
1478 adapter->hw.phy.reset_disable = FALSE;
1486 em_encap(struct adapter *adapter, struct mbuf **m_headp)
1488 bus_dma_segment_t segs[EM_MAX_SCATTER];
1490 struct em_buffer *tx_buffer, *tx_buffer_mapped;
1491 struct e1000_tx_desc *ctxd = NULL;
1492 struct mbuf *m_head = *m_headp;
1493 uint32_t txd_upper, txd_lower, txd_used, cmd = 0;
1494 int maxsegs, nsegs, i, j, first, last = 0, error;
1496 if (m_head->m_len < EM_TXCSUM_MINHL &&
1497 (m_head->m_flags & EM_CSUM_FEATURES)) {
1499 * Make sure that ethernet header and ip.ip_hl are in
1500 * contiguous memory, since if TXCSUM is enabled, later
1501 * TX context descriptor's setup need to access ip.ip_hl.
1503 error = em_txcsum_pullup(adapter, m_headp);
1505 KKASSERT(*m_headp == NULL);
1511 txd_upper = txd_lower = 0;
1515 * Capture the first descriptor index, this descriptor
1516 * will have the index of the EOP which is the only one
1517 * that now gets a DONE bit writeback.
1519 first = adapter->next_avail_tx_desc;
1520 tx_buffer = &adapter->tx_buffer_area[first];
1521 tx_buffer_mapped = tx_buffer;
1522 map = tx_buffer->map;
1524 maxsegs = adapter->num_tx_desc_avail - EM_TX_RESERVED;
1525 KASSERT(maxsegs >= adapter->spare_tx_desc,
1526 ("not enough spare TX desc\n"));
1527 if (adapter->pcix_82544) {
1528 /* Half it; see the comment in em_attach() */
1531 if (maxsegs > EM_MAX_SCATTER)
1532 maxsegs = EM_MAX_SCATTER;
1534 error = bus_dmamap_load_mbuf_defrag(adapter->txtag, map, m_headp,
1535 segs, maxsegs, &nsegs, BUS_DMA_NOWAIT);
1537 if (error == ENOBUFS)
1538 adapter->mbuf_alloc_failed++;
1540 adapter->no_tx_dma_setup++;
1546 bus_dmamap_sync(adapter->txtag, map, BUS_DMASYNC_PREWRITE);
1549 adapter->tx_nsegs += nsegs;
1551 if (m_head->m_pkthdr.csum_flags & EM_CSUM_FEATURES) {
1552 /* TX csum offloading will consume one TX desc */
1553 adapter->tx_nsegs += em_txcsum(adapter, m_head,
1554 &txd_upper, &txd_lower);
1556 i = adapter->next_avail_tx_desc;
1558 /* Set up our transmit descriptors */
1559 for (j = 0; j < nsegs; j++) {
1560 /* If adapter is 82544 and on PCIX bus */
1561 if(adapter->pcix_82544) {
1562 DESC_ARRAY desc_array;
1563 uint32_t array_elements, counter;
1566 * Check the Address and Length combination and
1567 * split the data accordingly
1569 array_elements = em_82544_fill_desc(segs[j].ds_addr,
1570 segs[j].ds_len, &desc_array);
1571 for (counter = 0; counter < array_elements; counter++) {
1572 KKASSERT(txd_used < adapter->num_tx_desc_avail);
1574 tx_buffer = &adapter->tx_buffer_area[i];
1575 ctxd = &adapter->tx_desc_base[i];
1577 ctxd->buffer_addr = htole64(
1578 desc_array.descriptor[counter].address);
1579 ctxd->lower.data = htole32(
1580 E1000_TXD_CMD_IFCS | txd_lower |
1581 desc_array.descriptor[counter].length);
1582 ctxd->upper.data = htole32(txd_upper);
1585 if (++i == adapter->num_tx_desc)
1591 tx_buffer = &adapter->tx_buffer_area[i];
1592 ctxd = &adapter->tx_desc_base[i];
1594 ctxd->buffer_addr = htole64(segs[j].ds_addr);
1595 ctxd->lower.data = htole32(E1000_TXD_CMD_IFCS |
1596 txd_lower | segs[j].ds_len);
1597 ctxd->upper.data = htole32(txd_upper);
1600 if (++i == adapter->num_tx_desc)
1605 adapter->next_avail_tx_desc = i;
1606 if (adapter->pcix_82544) {
1607 KKASSERT(adapter->num_tx_desc_avail > txd_used);
1608 adapter->num_tx_desc_avail -= txd_used;
1610 KKASSERT(adapter->num_tx_desc_avail > nsegs);
1611 adapter->num_tx_desc_avail -= nsegs;
1614 /* Handle VLAN tag */
1615 if (m_head->m_flags & M_VLANTAG) {
1616 /* Set the vlan id. */
1617 ctxd->upper.fields.special =
1618 htole16(m_head->m_pkthdr.ether_vlantag);
1620 /* Tell hardware to add tag */
1621 ctxd->lower.data |= htole32(E1000_TXD_CMD_VLE);
1624 tx_buffer->m_head = m_head;
1625 tx_buffer_mapped->map = tx_buffer->map;
1626 tx_buffer->map = map;
1628 if (adapter->tx_nsegs >= adapter->tx_int_nsegs) {
1629 adapter->tx_nsegs = 0;
1632 * Report Status (RS) is turned on
1633 * every tx_int_nsegs descriptors.
1635 cmd = E1000_TXD_CMD_RS;
1638 * Keep track of the descriptor, which will
1639 * be written back by hardware.
1641 adapter->tx_dd[adapter->tx_dd_tail] = last;
1642 EM_INC_TXDD_IDX(adapter->tx_dd_tail);
1643 KKASSERT(adapter->tx_dd_tail != adapter->tx_dd_head);
1647 * Last Descriptor of Packet needs End Of Packet (EOP)
1649 ctxd->lower.data |= htole32(E1000_TXD_CMD_EOP | cmd);
1652 * Advance the Transmit Descriptor Tail (TDT), this tells the E1000
1653 * that this frame is available to transmit.
1655 if (adapter->hw.mac.type == e1000_82547 &&
1656 adapter->link_duplex == HALF_DUPLEX) {
1657 em_82547_move_tail_serialized(adapter);
1659 E1000_WRITE_REG(&adapter->hw, E1000_TDT(0), i);
1660 if (adapter->hw.mac.type == e1000_82547) {
1661 em_82547_update_fifo_head(adapter,
1662 m_head->m_pkthdr.len);
1669 * 82547 workaround to avoid controller hang in half-duplex environment.
1670 * The workaround is to avoid queuing a large packet that would span
1671 * the internal Tx FIFO ring boundary. We need to reset the FIFO pointers
1672 * in this case. We do that only when FIFO is quiescent.
1675 em_82547_move_tail_serialized(struct adapter *adapter)
1677 struct e1000_tx_desc *tx_desc;
1678 uint16_t hw_tdt, sw_tdt, length = 0;
1681 ASSERT_SERIALIZED(adapter->arpcom.ac_if.if_serializer);
1683 hw_tdt = E1000_READ_REG(&adapter->hw, E1000_TDT(0));
1684 sw_tdt = adapter->next_avail_tx_desc;
1686 while (hw_tdt != sw_tdt) {
1687 tx_desc = &adapter->tx_desc_base[hw_tdt];
1688 length += tx_desc->lower.flags.length;
1689 eop = tx_desc->lower.data & E1000_TXD_CMD_EOP;
1690 if (++hw_tdt == adapter->num_tx_desc)
1694 if (em_82547_fifo_workaround(adapter, length)) {
1695 adapter->tx_fifo_wrk_cnt++;
1696 callout_reset(&adapter->tx_fifo_timer, 1,
1697 em_82547_move_tail, adapter);
1700 E1000_WRITE_REG(&adapter->hw, E1000_TDT(0), hw_tdt);
1701 em_82547_update_fifo_head(adapter, length);
1708 em_82547_move_tail(void *xsc)
1710 struct adapter *adapter = xsc;
1711 struct ifnet *ifp = &adapter->arpcom.ac_if;
1713 lwkt_serialize_enter(ifp->if_serializer);
1714 em_82547_move_tail_serialized(adapter);
1715 lwkt_serialize_exit(ifp->if_serializer);
1719 em_82547_fifo_workaround(struct adapter *adapter, int len)
1721 int fifo_space, fifo_pkt_len;
1723 fifo_pkt_len = roundup2(len + EM_FIFO_HDR, EM_FIFO_HDR);
1725 if (adapter->link_duplex == HALF_DUPLEX) {
1726 fifo_space = adapter->tx_fifo_size - adapter->tx_fifo_head;
1728 if (fifo_pkt_len >= (EM_82547_PKT_THRESH + fifo_space)) {
1729 if (em_82547_tx_fifo_reset(adapter))
1739 em_82547_update_fifo_head(struct adapter *adapter, int len)
1741 int fifo_pkt_len = roundup2(len + EM_FIFO_HDR, EM_FIFO_HDR);
1743 /* tx_fifo_head is always 16 byte aligned */
1744 adapter->tx_fifo_head += fifo_pkt_len;
1745 if (adapter->tx_fifo_head >= adapter->tx_fifo_size)
1746 adapter->tx_fifo_head -= adapter->tx_fifo_size;
1750 em_82547_tx_fifo_reset(struct adapter *adapter)
1754 if ((E1000_READ_REG(&adapter->hw, E1000_TDT(0)) ==
1755 E1000_READ_REG(&adapter->hw, E1000_TDH(0))) &&
1756 (E1000_READ_REG(&adapter->hw, E1000_TDFT) ==
1757 E1000_READ_REG(&adapter->hw, E1000_TDFH)) &&
1758 (E1000_READ_REG(&adapter->hw, E1000_TDFTS) ==
1759 E1000_READ_REG(&adapter->hw, E1000_TDFHS)) &&
1760 (E1000_READ_REG(&adapter->hw, E1000_TDFPC) == 0)) {
1761 /* Disable TX unit */
1762 tctl = E1000_READ_REG(&adapter->hw, E1000_TCTL);
1763 E1000_WRITE_REG(&adapter->hw, E1000_TCTL,
1764 tctl & ~E1000_TCTL_EN);
1766 /* Reset FIFO pointers */
1767 E1000_WRITE_REG(&adapter->hw, E1000_TDFT,
1768 adapter->tx_head_addr);
1769 E1000_WRITE_REG(&adapter->hw, E1000_TDFH,
1770 adapter->tx_head_addr);
1771 E1000_WRITE_REG(&adapter->hw, E1000_TDFTS,
1772 adapter->tx_head_addr);
1773 E1000_WRITE_REG(&adapter->hw, E1000_TDFHS,
1774 adapter->tx_head_addr);
1776 /* Re-enable TX unit */
1777 E1000_WRITE_REG(&adapter->hw, E1000_TCTL, tctl);
1778 E1000_WRITE_FLUSH(&adapter->hw);
1780 adapter->tx_fifo_head = 0;
1781 adapter->tx_fifo_reset_cnt++;
1790 em_set_promisc(struct adapter *adapter)
1792 struct ifnet *ifp = &adapter->arpcom.ac_if;
1795 reg_rctl = E1000_READ_REG(&adapter->hw, E1000_RCTL);
1797 if (ifp->if_flags & IFF_PROMISC) {
1798 reg_rctl |= (E1000_RCTL_UPE | E1000_RCTL_MPE);
1799 /* Turn this on if you want to see bad packets */
1801 reg_rctl |= E1000_RCTL_SBP;
1802 E1000_WRITE_REG(&adapter->hw, E1000_RCTL, reg_rctl);
1803 } else if (ifp->if_flags & IFF_ALLMULTI) {
1804 reg_rctl |= E1000_RCTL_MPE;
1805 reg_rctl &= ~E1000_RCTL_UPE;
1806 E1000_WRITE_REG(&adapter->hw, E1000_RCTL, reg_rctl);
1811 em_disable_promisc(struct adapter *adapter)
1815 reg_rctl = E1000_READ_REG(&adapter->hw, E1000_RCTL);
1817 reg_rctl &= ~E1000_RCTL_UPE;
1818 reg_rctl &= ~E1000_RCTL_MPE;
1819 reg_rctl &= ~E1000_RCTL_SBP;
1820 E1000_WRITE_REG(&adapter->hw, E1000_RCTL, reg_rctl);
1824 em_set_multi(struct adapter *adapter)
1826 struct ifnet *ifp = &adapter->arpcom.ac_if;
1827 struct ifmultiaddr *ifma;
1828 uint32_t reg_rctl = 0;
1829 uint8_t mta[512]; /* Largest MTS is 4096 bits */
1832 if (adapter->hw.mac.type == e1000_82542 &&
1833 adapter->hw.revision_id == E1000_REVISION_2) {
1834 reg_rctl = E1000_READ_REG(&adapter->hw, E1000_RCTL);
1835 if (adapter->hw.bus.pci_cmd_word & CMD_MEM_WRT_INVALIDATE)
1836 e1000_pci_clear_mwi(&adapter->hw);
1837 reg_rctl |= E1000_RCTL_RST;
1838 E1000_WRITE_REG(&adapter->hw, E1000_RCTL, reg_rctl);
1842 TAILQ_FOREACH(ifma, &ifp->if_multiaddrs, ifma_link) {
1843 if (ifma->ifma_addr->sa_family != AF_LINK)
1846 if (mcnt == MAX_NUM_MULTICAST_ADDRESSES)
1849 bcopy(LLADDR((struct sockaddr_dl *)ifma->ifma_addr),
1850 &mta[mcnt * ETHER_ADDR_LEN], ETHER_ADDR_LEN);
1854 if (mcnt >= MAX_NUM_MULTICAST_ADDRESSES) {
1855 reg_rctl = E1000_READ_REG(&adapter->hw, E1000_RCTL);
1856 reg_rctl |= E1000_RCTL_MPE;
1857 E1000_WRITE_REG(&adapter->hw, E1000_RCTL, reg_rctl);
1859 e1000_update_mc_addr_list(&adapter->hw, mta, mcnt);
1862 if (adapter->hw.mac.type == e1000_82542 &&
1863 adapter->hw.revision_id == E1000_REVISION_2) {
1864 reg_rctl = E1000_READ_REG(&adapter->hw, E1000_RCTL);
1865 reg_rctl &= ~E1000_RCTL_RST;
1866 E1000_WRITE_REG(&adapter->hw, E1000_RCTL, reg_rctl);
1868 if (adapter->hw.bus.pci_cmd_word & CMD_MEM_WRT_INVALIDATE)
1869 e1000_pci_set_mwi(&adapter->hw);
1874 * This routine checks for link status and updates statistics.
1879 struct adapter *adapter = xsc;
1880 struct ifnet *ifp = &adapter->arpcom.ac_if;
1882 lwkt_serialize_enter(ifp->if_serializer);
1884 em_update_link_status(adapter);
1885 em_update_stats(adapter);
1887 /* Reset LAA into RAR[0] on 82571 */
1888 if (e1000_get_laa_state_82571(&adapter->hw) == TRUE)
1889 e1000_rar_set(&adapter->hw, adapter->hw.mac.addr, 0);
1891 if (em_display_debug_stats && (ifp->if_flags & IFF_RUNNING))
1892 em_print_hw_stats(adapter);
1894 em_smartspeed(adapter);
1896 callout_reset(&adapter->timer, hz, em_timer, adapter);
1898 lwkt_serialize_exit(ifp->if_serializer);
1902 em_update_link_status(struct adapter *adapter)
1904 struct e1000_hw *hw = &adapter->hw;
1905 struct ifnet *ifp = &adapter->arpcom.ac_if;
1906 device_t dev = adapter->dev;
1907 uint32_t link_check = 0;
1909 /* Get the cached link value or read phy for real */
1910 switch (hw->phy.media_type) {
1911 case e1000_media_type_copper:
1912 if (hw->mac.get_link_status) {
1913 /* Do the work to read phy */
1914 e1000_check_for_link(hw);
1915 link_check = !hw->mac.get_link_status;
1916 if (link_check) /* ESB2 fix */
1917 e1000_cfg_on_link_up(hw);
1923 case e1000_media_type_fiber:
1924 e1000_check_for_link(hw);
1926 E1000_READ_REG(hw, E1000_STATUS) & E1000_STATUS_LU;
1929 case e1000_media_type_internal_serdes:
1930 e1000_check_for_link(hw);
1931 link_check = adapter->hw.mac.serdes_has_link;
1934 case e1000_media_type_unknown:
1939 /* Now check for a transition */
1940 if (link_check && adapter->link_active == 0) {
1941 e1000_get_speed_and_duplex(hw, &adapter->link_speed,
1942 &adapter->link_duplex);
1945 * Check if we should enable/disable SPEED_MODE bit on
1948 if (hw->mac.type == e1000_82571 ||
1949 hw->mac.type == e1000_82572) {
1952 tarc0 = E1000_READ_REG(hw, E1000_TARC(0));
1953 if (adapter->link_speed != SPEED_1000)
1954 tarc0 &= ~SPEED_MODE_BIT;
1956 tarc0 |= SPEED_MODE_BIT;
1957 E1000_WRITE_REG(hw, E1000_TARC(0), tarc0);
1960 device_printf(dev, "Link is up %d Mbps %s\n",
1961 adapter->link_speed,
1962 ((adapter->link_duplex == FULL_DUPLEX) ?
1963 "Full Duplex" : "Half Duplex"));
1965 adapter->link_active = 1;
1966 adapter->smartspeed = 0;
1967 ifp->if_baudrate = adapter->link_speed * 1000000;
1968 ifp->if_link_state = LINK_STATE_UP;
1969 if_link_state_change(ifp);
1970 } else if (!link_check && adapter->link_active == 1) {
1971 ifp->if_baudrate = adapter->link_speed = 0;
1972 adapter->link_duplex = 0;
1974 device_printf(dev, "Link is Down\n");
1975 adapter->link_active = 0;
1977 /* Link down, disable watchdog */
1980 ifp->if_link_state = LINK_STATE_DOWN;
1981 if_link_state_change(ifp);
1986 em_stop(struct adapter *adapter)
1988 struct ifnet *ifp = &adapter->arpcom.ac_if;
1991 ASSERT_SERIALIZED(ifp->if_serializer);
1993 em_disable_intr(adapter);
1995 callout_stop(&adapter->timer);
1996 callout_stop(&adapter->tx_fifo_timer);
1998 ifp->if_flags &= ~(IFF_RUNNING | IFF_OACTIVE);
2001 e1000_reset_hw(&adapter->hw);
2002 if (adapter->hw.mac.type >= e1000_82544)
2003 E1000_WRITE_REG(&adapter->hw, E1000_WUC, 0);
2005 for (i = 0; i < adapter->num_tx_desc; i++) {
2006 struct em_buffer *tx_buffer = &adapter->tx_buffer_area[i];
2008 if (tx_buffer->m_head != NULL) {
2009 bus_dmamap_unload(adapter->txtag, tx_buffer->map);
2010 m_freem(tx_buffer->m_head);
2011 tx_buffer->m_head = NULL;
2015 for (i = 0; i < adapter->num_rx_desc; i++) {
2016 struct em_buffer *rx_buffer = &adapter->rx_buffer_area[i];
2018 if (rx_buffer->m_head != NULL) {
2019 bus_dmamap_unload(adapter->rxtag, rx_buffer->map);
2020 m_freem(rx_buffer->m_head);
2021 rx_buffer->m_head = NULL;
2025 if (adapter->fmp != NULL)
2026 m_freem(adapter->fmp);
2027 adapter->fmp = NULL;
2028 adapter->lmp = NULL;
2030 adapter->csum_flags = 0;
2031 adapter->csum_ehlen = 0;
2032 adapter->csum_iphlen = 0;
2034 adapter->tx_dd_head = 0;
2035 adapter->tx_dd_tail = 0;
2036 adapter->tx_nsegs = 0;
2040 em_get_hw_info(struct adapter *adapter)
2042 device_t dev = adapter->dev;
2044 /* Save off the information about this board */
2045 adapter->hw.vendor_id = pci_get_vendor(dev);
2046 adapter->hw.device_id = pci_get_device(dev);
2047 adapter->hw.revision_id = pci_get_revid(dev);
2048 adapter->hw.subsystem_vendor_id = pci_get_subvendor(dev);
2049 adapter->hw.subsystem_device_id = pci_get_subdevice(dev);
2051 /* Do Shared Code Init and Setup */
2052 if (e1000_set_mac_type(&adapter->hw))
2058 em_alloc_pci_res(struct adapter *adapter)
2060 device_t dev = adapter->dev;
2063 /* Enable bus mastering */
2064 pci_enable_busmaster(dev);
2066 adapter->memory_rid = EM_BAR_MEM;
2067 adapter->memory = bus_alloc_resource_any(dev, SYS_RES_MEMORY,
2068 &adapter->memory_rid, RF_ACTIVE);
2069 if (adapter->memory == NULL) {
2070 device_printf(dev, "Unable to allocate bus resource: memory\n");
2073 adapter->osdep.mem_bus_space_tag =
2074 rman_get_bustag(adapter->memory);
2075 adapter->osdep.mem_bus_space_handle =
2076 rman_get_bushandle(adapter->memory);
2078 /* XXX This is quite goofy, it is not actually used */
2079 adapter->hw.hw_addr = (uint8_t *)&adapter->osdep.mem_bus_space_handle;
2081 /* Only older adapters use IO mapping */
2082 if (adapter->hw.mac.type > e1000_82543 &&
2083 adapter->hw.mac.type < e1000_82571) {
2084 /* Figure our where our IO BAR is ? */
2085 for (rid = PCIR_BAR(0); rid < PCIR_CARDBUSCIS;) {
2086 val = pci_read_config(dev, rid, 4);
2087 if (EM_BAR_TYPE(val) == EM_BAR_TYPE_IO) {
2088 adapter->io_rid = rid;
2092 /* check for 64bit BAR */
2093 if (EM_BAR_MEM_TYPE(val) == EM_BAR_MEM_TYPE_64BIT)
2096 if (rid >= PCIR_CARDBUSCIS) {
2097 device_printf(dev, "Unable to locate IO BAR\n");
2100 adapter->ioport = bus_alloc_resource_any(dev, SYS_RES_IOPORT,
2101 &adapter->io_rid, RF_ACTIVE);
2102 if (adapter->ioport == NULL) {
2103 device_printf(dev, "Unable to allocate bus resource: "
2107 adapter->hw.io_base = 0;
2108 adapter->osdep.io_bus_space_tag =
2109 rman_get_bustag(adapter->ioport);
2110 adapter->osdep.io_bus_space_handle =
2111 rman_get_bushandle(adapter->ioport);
2114 adapter->intr_rid = 0;
2115 adapter->intr_res = bus_alloc_resource_any(dev, SYS_RES_IRQ,
2117 RF_SHAREABLE | RF_ACTIVE);
2118 if (adapter->intr_res == NULL) {
2119 device_printf(dev, "Unable to allocate bus resource: "
2124 adapter->hw.bus.pci_cmd_word = pci_read_config(dev, PCIR_COMMAND, 2);
2125 adapter->hw.back = &adapter->osdep;
2130 em_free_pci_res(struct adapter *adapter)
2132 device_t dev = adapter->dev;
2134 if (adapter->intr_res != NULL) {
2135 bus_release_resource(dev, SYS_RES_IRQ,
2136 adapter->intr_rid, adapter->intr_res);
2139 if (adapter->memory != NULL) {
2140 bus_release_resource(dev, SYS_RES_MEMORY,
2141 adapter->memory_rid, adapter->memory);
2144 if (adapter->flash != NULL) {
2145 bus_release_resource(dev, SYS_RES_MEMORY,
2146 adapter->flash_rid, adapter->flash);
2149 if (adapter->ioport != NULL) {
2150 bus_release_resource(dev, SYS_RES_IOPORT,
2151 adapter->io_rid, adapter->ioport);
2156 em_hw_init(struct adapter *adapter)
2158 device_t dev = adapter->dev;
2159 uint16_t rx_buffer_size;
2161 /* Issue a global reset */
2162 e1000_reset_hw(&adapter->hw);
2164 /* Get control from any management/hw control */
2165 if ((adapter->hw.mac.type == e1000_82573 ||
2166 adapter->hw.mac.type == e1000_ich8lan ||
2167 adapter->hw.mac.type == e1000_ich10lan ||
2168 adapter->hw.mac.type == e1000_ich9lan) &&
2169 e1000_check_mng_mode(&adapter->hw))
2170 em_get_hw_control(adapter);
2172 /* When hardware is reset, fifo_head is also reset */
2173 adapter->tx_fifo_head = 0;
2175 /* Set up smart power down as default off on newer adapters. */
2176 if (!em_smart_pwr_down &&
2177 (adapter->hw.mac.type == e1000_82571 ||
2178 adapter->hw.mac.type == e1000_82572)) {
2179 uint16_t phy_tmp = 0;
2181 /* Speed up time to link by disabling smart power down. */
2182 e1000_read_phy_reg(&adapter->hw,
2183 IGP02E1000_PHY_POWER_MGMT, &phy_tmp);
2184 phy_tmp &= ~IGP02E1000_PM_SPD;
2185 e1000_write_phy_reg(&adapter->hw,
2186 IGP02E1000_PHY_POWER_MGMT, phy_tmp);
2190 * These parameters control the automatic generation (Tx) and
2191 * response (Rx) to Ethernet PAUSE frames.
2192 * - High water mark should allow for at least two frames to be
2193 * received after sending an XOFF.
2194 * - Low water mark works best when it is very near the high water mark.
2195 * This allows the receiver to restart by sending XON when it has
2196 * drained a bit. Here we use an arbitary value of 1500 which will
2197 * restart after one full frame is pulled from the buffer. There
2198 * could be several smaller frames in the buffer and if so they will
2199 * not trigger the XON until their total number reduces the buffer
2201 * - The pause time is fairly large at 1000 x 512ns = 512 usec.
2204 (E1000_READ_REG(&adapter->hw, E1000_PBA) & 0xffff) << 10;
2206 adapter->hw.fc.high_water = rx_buffer_size -
2207 roundup2(adapter->max_frame_size, 1024);
2208 adapter->hw.fc.low_water = adapter->hw.fc.high_water - 1500;
2210 if (adapter->hw.mac.type == e1000_80003es2lan)
2211 adapter->hw.fc.pause_time = 0xFFFF;
2213 adapter->hw.fc.pause_time = EM_FC_PAUSE_TIME;
2214 adapter->hw.fc.send_xon = TRUE;
2215 adapter->hw.fc.requested_mode = e1000_fc_full;
2217 if (e1000_init_hw(&adapter->hw) < 0) {
2218 device_printf(dev, "Hardware Initialization Failed\n");
2222 e1000_check_for_link(&adapter->hw);
2228 em_setup_ifp(struct adapter *adapter)
2230 struct ifnet *ifp = &adapter->arpcom.ac_if;
2232 if_initname(ifp, device_get_name(adapter->dev),
2233 device_get_unit(adapter->dev));
2234 ifp->if_softc = adapter;
2235 ifp->if_flags = IFF_BROADCAST | IFF_SIMPLEX | IFF_MULTICAST;
2236 ifp->if_init = em_init;
2237 ifp->if_ioctl = em_ioctl;
2238 ifp->if_start = em_start;
2239 #ifdef DEVICE_POLLING
2240 ifp->if_poll = em_poll;
2242 ifp->if_watchdog = em_watchdog;
2243 ifq_set_maxlen(&ifp->if_snd, adapter->num_tx_desc - 1);
2244 ifq_set_ready(&ifp->if_snd);
2246 ether_ifattach(ifp, adapter->hw.mac.addr, NULL);
2248 if (adapter->hw.mac.type >= e1000_82543)
2249 ifp->if_capabilities = IFCAP_HWCSUM;
2251 ifp->if_capabilities |= IFCAP_VLAN_HWTAGGING | IFCAP_VLAN_MTU;
2252 ifp->if_capenable = ifp->if_capabilities;
2254 if (ifp->if_capenable & IFCAP_TXCSUM)
2255 ifp->if_hwassist = EM_CSUM_FEATURES;
2258 * Tell the upper layer(s) we support long frames.
2260 ifp->if_data.ifi_hdrlen = sizeof(struct ether_vlan_header);
2263 * Specify the media types supported by this adapter and register
2264 * callbacks to update media and link information
2266 ifmedia_init(&adapter->media, IFM_IMASK,
2267 em_media_change, em_media_status);
2268 if (adapter->hw.phy.media_type == e1000_media_type_fiber ||
2269 adapter->hw.phy.media_type == e1000_media_type_internal_serdes) {
2270 u_char fiber_type = IFM_1000_SX; /* default type */
2272 if (adapter->hw.mac.type == e1000_82545)
2273 fiber_type = IFM_1000_LX;
2274 ifmedia_add(&adapter->media, IFM_ETHER | fiber_type | IFM_FDX,
2276 ifmedia_add(&adapter->media, IFM_ETHER | fiber_type, 0, NULL);
2278 ifmedia_add(&adapter->media, IFM_ETHER | IFM_10_T, 0, NULL);
2279 ifmedia_add(&adapter->media, IFM_ETHER | IFM_10_T | IFM_FDX,
2281 ifmedia_add(&adapter->media, IFM_ETHER | IFM_100_TX,
2283 ifmedia_add(&adapter->media, IFM_ETHER | IFM_100_TX | IFM_FDX,
2285 if (adapter->hw.phy.type != e1000_phy_ife) {
2286 ifmedia_add(&adapter->media,
2287 IFM_ETHER | IFM_1000_T | IFM_FDX, 0, NULL);
2288 ifmedia_add(&adapter->media,
2289 IFM_ETHER | IFM_1000_T, 0, NULL);
2292 ifmedia_add(&adapter->media, IFM_ETHER | IFM_AUTO, 0, NULL);
2293 ifmedia_set(&adapter->media, IFM_ETHER | IFM_AUTO);
2298 * Workaround for SmartSpeed on 82541 and 82547 controllers
2301 em_smartspeed(struct adapter *adapter)
2305 if (adapter->link_active || adapter->hw.phy.type != e1000_phy_igp ||
2306 adapter->hw.mac.autoneg == 0 ||
2307 (adapter->hw.phy.autoneg_advertised & ADVERTISE_1000_FULL) == 0)
2310 if (adapter->smartspeed == 0) {
2312 * If Master/Slave config fault is asserted twice,
2313 * we assume back-to-back
2315 e1000_read_phy_reg(&adapter->hw, PHY_1000T_STATUS, &phy_tmp);
2316 if (!(phy_tmp & SR_1000T_MS_CONFIG_FAULT))
2318 e1000_read_phy_reg(&adapter->hw, PHY_1000T_STATUS, &phy_tmp);
2319 if (phy_tmp & SR_1000T_MS_CONFIG_FAULT) {
2320 e1000_read_phy_reg(&adapter->hw,
2321 PHY_1000T_CTRL, &phy_tmp);
2322 if (phy_tmp & CR_1000T_MS_ENABLE) {
2323 phy_tmp &= ~CR_1000T_MS_ENABLE;
2324 e1000_write_phy_reg(&adapter->hw,
2325 PHY_1000T_CTRL, phy_tmp);
2326 adapter->smartspeed++;
2327 if (adapter->hw.mac.autoneg &&
2328 !e1000_phy_setup_autoneg(&adapter->hw) &&
2329 !e1000_read_phy_reg(&adapter->hw,
2330 PHY_CONTROL, &phy_tmp)) {
2331 phy_tmp |= MII_CR_AUTO_NEG_EN |
2332 MII_CR_RESTART_AUTO_NEG;
2333 e1000_write_phy_reg(&adapter->hw,
2334 PHY_CONTROL, phy_tmp);
2339 } else if (adapter->smartspeed == EM_SMARTSPEED_DOWNSHIFT) {
2340 /* If still no link, perhaps using 2/3 pair cable */
2341 e1000_read_phy_reg(&adapter->hw, PHY_1000T_CTRL, &phy_tmp);
2342 phy_tmp |= CR_1000T_MS_ENABLE;
2343 e1000_write_phy_reg(&adapter->hw, PHY_1000T_CTRL, phy_tmp);
2344 if (adapter->hw.mac.autoneg &&
2345 !e1000_phy_setup_autoneg(&adapter->hw) &&
2346 !e1000_read_phy_reg(&adapter->hw, PHY_CONTROL, &phy_tmp)) {
2347 phy_tmp |= MII_CR_AUTO_NEG_EN | MII_CR_RESTART_AUTO_NEG;
2348 e1000_write_phy_reg(&adapter->hw, PHY_CONTROL, phy_tmp);
2352 /* Restart process after EM_SMARTSPEED_MAX iterations */
2353 if (adapter->smartspeed++ == EM_SMARTSPEED_MAX)
2354 adapter->smartspeed = 0;
2358 em_dma_malloc(struct adapter *adapter, bus_size_t size,
2359 struct em_dma_alloc *dma)
2361 dma->dma_vaddr = bus_dmamem_coherent_any(adapter->parent_dtag,
2362 EM_DBA_ALIGN, size, BUS_DMA_WAITOK,
2363 &dma->dma_tag, &dma->dma_map,
2365 if (dma->dma_vaddr == NULL)
2372 em_dma_free(struct adapter *adapter, struct em_dma_alloc *dma)
2374 if (dma->dma_tag == NULL)
2376 bus_dmamap_unload(dma->dma_tag, dma->dma_map);
2377 bus_dmamem_free(dma->dma_tag, dma->dma_vaddr, dma->dma_map);
2378 bus_dma_tag_destroy(dma->dma_tag);
2382 em_create_tx_ring(struct adapter *adapter)
2384 device_t dev = adapter->dev;
2385 struct em_buffer *tx_buffer;
2388 adapter->tx_buffer_area =
2389 kmalloc(sizeof(struct em_buffer) * adapter->num_tx_desc,
2390 M_DEVBUF, M_WAITOK | M_ZERO);
2393 * Create DMA tags for tx buffers
2395 error = bus_dma_tag_create(adapter->parent_dtag, /* parent */
2396 1, 0, /* alignment, bounds */
2397 BUS_SPACE_MAXADDR, /* lowaddr */
2398 BUS_SPACE_MAXADDR, /* highaddr */
2399 NULL, NULL, /* filter, filterarg */
2400 EM_TSO_SIZE, /* maxsize */
2401 EM_MAX_SCATTER, /* nsegments */
2402 EM_MAX_SEGSIZE, /* maxsegsize */
2403 BUS_DMA_WAITOK | BUS_DMA_ALLOCNOW |
2404 BUS_DMA_ONEBPAGE, /* flags */
2407 device_printf(dev, "Unable to allocate TX DMA tag\n");
2408 kfree(adapter->tx_buffer_area, M_DEVBUF);
2409 adapter->tx_buffer_area = NULL;
2414 * Create DMA maps for tx buffers
2416 for (i = 0; i < adapter->num_tx_desc; i++) {
2417 tx_buffer = &adapter->tx_buffer_area[i];
2419 error = bus_dmamap_create(adapter->txtag,
2420 BUS_DMA_WAITOK | BUS_DMA_ONEBPAGE,
2423 device_printf(dev, "Unable to create TX DMA map\n");
2424 em_destroy_tx_ring(adapter, i);
2432 em_init_tx_ring(struct adapter *adapter)
2434 /* Clear the old ring contents */
2435 bzero(adapter->tx_desc_base,
2436 (sizeof(struct e1000_tx_desc)) * adapter->num_tx_desc);
2439 adapter->next_avail_tx_desc = 0;
2440 adapter->next_tx_to_clean = 0;
2441 adapter->num_tx_desc_avail = adapter->num_tx_desc;
2445 em_init_tx_unit(struct adapter *adapter)
2447 uint32_t tctl, tarc, tipg = 0;
2450 /* Setup the Base and Length of the Tx Descriptor Ring */
2451 bus_addr = adapter->txdma.dma_paddr;
2452 E1000_WRITE_REG(&adapter->hw, E1000_TDLEN(0),
2453 adapter->num_tx_desc * sizeof(struct e1000_tx_desc));
2454 E1000_WRITE_REG(&adapter->hw, E1000_TDBAH(0),
2455 (uint32_t)(bus_addr >> 32));
2456 E1000_WRITE_REG(&adapter->hw, E1000_TDBAL(0),
2457 (uint32_t)bus_addr);
2458 /* Setup the HW Tx Head and Tail descriptor pointers */
2459 E1000_WRITE_REG(&adapter->hw, E1000_TDT(0), 0);
2460 E1000_WRITE_REG(&adapter->hw, E1000_TDH(0), 0);
2462 /* Set the default values for the Tx Inter Packet Gap timer */
2463 switch (adapter->hw.mac.type) {
2465 tipg = DEFAULT_82542_TIPG_IPGT;
2466 tipg |= DEFAULT_82542_TIPG_IPGR1 << E1000_TIPG_IPGR1_SHIFT;
2467 tipg |= DEFAULT_82542_TIPG_IPGR2 << E1000_TIPG_IPGR2_SHIFT;
2470 case e1000_80003es2lan:
2471 tipg = DEFAULT_82543_TIPG_IPGR1;
2472 tipg |= DEFAULT_80003ES2LAN_TIPG_IPGR2 <<
2473 E1000_TIPG_IPGR2_SHIFT;
2477 if (adapter->hw.phy.media_type == e1000_media_type_fiber ||
2478 adapter->hw.phy.media_type ==
2479 e1000_media_type_internal_serdes)
2480 tipg = DEFAULT_82543_TIPG_IPGT_FIBER;
2482 tipg = DEFAULT_82543_TIPG_IPGT_COPPER;
2483 tipg |= DEFAULT_82543_TIPG_IPGR1 << E1000_TIPG_IPGR1_SHIFT;
2484 tipg |= DEFAULT_82543_TIPG_IPGR2 << E1000_TIPG_IPGR2_SHIFT;
2488 E1000_WRITE_REG(&adapter->hw, E1000_TIPG, tipg);
2490 /* NOTE: 0 is not allowed for TIDV */
2491 E1000_WRITE_REG(&adapter->hw, E1000_TIDV, 1);
2492 if(adapter->hw.mac.type >= e1000_82540)
2493 E1000_WRITE_REG(&adapter->hw, E1000_TADV, 0);
2495 if (adapter->hw.mac.type == e1000_82571 ||
2496 adapter->hw.mac.type == e1000_82572) {
2497 tarc = E1000_READ_REG(&adapter->hw, E1000_TARC(0));
2498 tarc |= SPEED_MODE_BIT;
2499 E1000_WRITE_REG(&adapter->hw, E1000_TARC(0), tarc);
2500 } else if (adapter->hw.mac.type == e1000_80003es2lan) {
2501 tarc = E1000_READ_REG(&adapter->hw, E1000_TARC(0));
2503 E1000_WRITE_REG(&adapter->hw, E1000_TARC(0), tarc);
2504 tarc = E1000_READ_REG(&adapter->hw, E1000_TARC(1));
2506 E1000_WRITE_REG(&adapter->hw, E1000_TARC(1), tarc);
2509 /* Program the Transmit Control Register */
2510 tctl = E1000_READ_REG(&adapter->hw, E1000_TCTL);
2511 tctl &= ~E1000_TCTL_CT;
2512 tctl |= E1000_TCTL_PSP | E1000_TCTL_RTLC | E1000_TCTL_EN |
2513 (E1000_COLLISION_THRESHOLD << E1000_CT_SHIFT);
2515 if (adapter->hw.mac.type >= e1000_82571)
2516 tctl |= E1000_TCTL_MULR;
2518 /* This write will effectively turn on the transmit unit. */
2519 E1000_WRITE_REG(&adapter->hw, E1000_TCTL, tctl);
2523 em_destroy_tx_ring(struct adapter *adapter, int ndesc)
2525 struct em_buffer *tx_buffer;
2528 if (adapter->tx_buffer_area == NULL)
2531 for (i = 0; i < ndesc; i++) {
2532 tx_buffer = &adapter->tx_buffer_area[i];
2534 KKASSERT(tx_buffer->m_head == NULL);
2535 bus_dmamap_destroy(adapter->txtag, tx_buffer->map);
2537 bus_dma_tag_destroy(adapter->txtag);
2539 kfree(adapter->tx_buffer_area, M_DEVBUF);
2540 adapter->tx_buffer_area = NULL;
2544 * The offload context needs to be set when we transfer the first
2545 * packet of a particular protocol (TCP/UDP). This routine has been
2546 * enhanced to deal with inserted VLAN headers.
2548 * If the new packet's ether header length, ip header length and
2549 * csum offloading type are same as the previous packet, we should
2550 * avoid allocating a new csum context descriptor; mainly to take
2551 * advantage of the pipeline effect of the TX data read request.
2553 * This function returns number of TX descrptors allocated for
2557 em_txcsum(struct adapter *adapter, struct mbuf *mp,
2558 uint32_t *txd_upper, uint32_t *txd_lower)
2560 struct e1000_context_desc *TXD;
2561 struct em_buffer *tx_buffer;
2562 struct ether_vlan_header *eh;
2564 int curr_txd, ehdrlen, csum_flags;
2565 uint32_t cmd, hdr_len, ip_hlen;
2569 * Determine where frame payload starts.
2570 * Jump over vlan headers if already present,
2571 * helpful for QinQ too.
2573 KASSERT(mp->m_len >= ETHER_HDR_LEN,
2574 ("em_txcsum_pullup is not called (eh)?\n"));
2575 eh = mtod(mp, struct ether_vlan_header *);
2576 if (eh->evl_encap_proto == htons(ETHERTYPE_VLAN)) {
2577 KASSERT(mp->m_len >= ETHER_HDR_LEN + EVL_ENCAPLEN,
2578 ("em_txcsum_pullup is not called (evh)?\n"));
2579 etype = ntohs(eh->evl_proto);
2580 ehdrlen = ETHER_HDR_LEN + EVL_ENCAPLEN;
2582 etype = ntohs(eh->evl_encap_proto);
2583 ehdrlen = ETHER_HDR_LEN;
2587 * We only support TCP/UDP for IPv4 for the moment.
2588 * TODO: Support SCTP too when it hits the tree.
2590 if (etype != ETHERTYPE_IP)
2593 KASSERT(mp->m_len >= ehdrlen + EM_IPVHL_SIZE,
2594 ("em_txcsum_pullup is not called (eh+ip_vhl)?\n"));
2596 /* NOTE: We could only safely access ip.ip_vhl part */
2597 ip = (struct ip *)(mp->m_data + ehdrlen);
2598 ip_hlen = ip->ip_hl << 2;
2600 csum_flags = mp->m_pkthdr.csum_flags & EM_CSUM_FEATURES;
2602 if (adapter->csum_ehlen == ehdrlen &&
2603 adapter->csum_iphlen == ip_hlen &&
2604 adapter->csum_flags == csum_flags) {
2606 * Same csum offload context as the previous packets;
2609 *txd_upper = adapter->csum_txd_upper;
2610 *txd_lower = adapter->csum_txd_lower;
2615 * Setup a new csum offload context.
2618 curr_txd = adapter->next_avail_tx_desc;
2619 tx_buffer = &adapter->tx_buffer_area[curr_txd];
2620 TXD = (struct e1000_context_desc *)&adapter->tx_desc_base[curr_txd];
2624 /* Setup of IP header checksum. */
2625 if (csum_flags & CSUM_IP) {
2627 * Start offset for header checksum calculation.
2628 * End offset for header checksum calculation.
2629 * Offset of place to put the checksum.
2631 TXD->lower_setup.ip_fields.ipcss = ehdrlen;
2632 TXD->lower_setup.ip_fields.ipcse =
2633 htole16(ehdrlen + ip_hlen - 1);
2634 TXD->lower_setup.ip_fields.ipcso =
2635 ehdrlen + offsetof(struct ip, ip_sum);
2636 cmd |= E1000_TXD_CMD_IP;
2637 *txd_upper |= E1000_TXD_POPTS_IXSM << 8;
2639 hdr_len = ehdrlen + ip_hlen;
2641 if (csum_flags & CSUM_TCP) {
2643 * Start offset for payload checksum calculation.
2644 * End offset for payload checksum calculation.
2645 * Offset of place to put the checksum.
2647 TXD->upper_setup.tcp_fields.tucss = hdr_len;
2648 TXD->upper_setup.tcp_fields.tucse = htole16(0);
2649 TXD->upper_setup.tcp_fields.tucso =
2650 hdr_len + offsetof(struct tcphdr, th_sum);
2651 cmd |= E1000_TXD_CMD_TCP;
2652 *txd_upper |= E1000_TXD_POPTS_TXSM << 8;
2653 } else if (csum_flags & CSUM_UDP) {
2655 * Start offset for header checksum calculation.
2656 * End offset for header checksum calculation.
2657 * Offset of place to put the checksum.
2659 TXD->upper_setup.tcp_fields.tucss = hdr_len;
2660 TXD->upper_setup.tcp_fields.tucse = htole16(0);
2661 TXD->upper_setup.tcp_fields.tucso =
2662 hdr_len + offsetof(struct udphdr, uh_sum);
2663 *txd_upper |= E1000_TXD_POPTS_TXSM << 8;
2666 *txd_lower = E1000_TXD_CMD_DEXT | /* Extended descr type */
2667 E1000_TXD_DTYP_D; /* Data descr */
2669 /* Save the information for this csum offloading context */
2670 adapter->csum_ehlen = ehdrlen;
2671 adapter->csum_iphlen = ip_hlen;
2672 adapter->csum_flags = csum_flags;
2673 adapter->csum_txd_upper = *txd_upper;
2674 adapter->csum_txd_lower = *txd_lower;
2676 TXD->tcp_seg_setup.data = htole32(0);
2677 TXD->cmd_and_length =
2678 htole32(E1000_TXD_CMD_IFCS | E1000_TXD_CMD_DEXT | cmd);
2680 if (++curr_txd == adapter->num_tx_desc)
2683 KKASSERT(adapter->num_tx_desc_avail > 0);
2684 adapter->num_tx_desc_avail--;
2686 adapter->next_avail_tx_desc = curr_txd;
2691 em_txcsum_pullup(struct adapter *adapter, struct mbuf **m0)
2693 struct mbuf *m = *m0;
2694 struct ether_header *eh;
2697 adapter->tx_csum_try_pullup++;
2699 len = ETHER_HDR_LEN + EM_IPVHL_SIZE;
2701 if (__predict_false(!M_WRITABLE(m))) {
2702 if (__predict_false(m->m_len < ETHER_HDR_LEN)) {
2703 adapter->tx_csum_drop1++;
2708 eh = mtod(m, struct ether_header *);
2710 if (eh->ether_type == htons(ETHERTYPE_VLAN))
2711 len += EVL_ENCAPLEN;
2713 if (m->m_len < len) {
2714 adapter->tx_csum_drop2++;
2722 if (__predict_false(m->m_len < ETHER_HDR_LEN)) {
2723 adapter->tx_csum_pullup1++;
2724 m = m_pullup(m, ETHER_HDR_LEN);
2726 adapter->tx_csum_pullup1_failed++;
2732 eh = mtod(m, struct ether_header *);
2734 if (eh->ether_type == htons(ETHERTYPE_VLAN))
2735 len += EVL_ENCAPLEN;
2737 if (m->m_len < len) {
2738 adapter->tx_csum_pullup2++;
2739 m = m_pullup(m, len);
2741 adapter->tx_csum_pullup2_failed++;
2751 em_txeof(struct adapter *adapter)
2753 struct ifnet *ifp = &adapter->arpcom.ac_if;
2754 struct em_buffer *tx_buffer;
2755 int first, num_avail;
2757 if (adapter->tx_dd_head == adapter->tx_dd_tail)
2760 if (adapter->num_tx_desc_avail == adapter->num_tx_desc)
2763 num_avail = adapter->num_tx_desc_avail;
2764 first = adapter->next_tx_to_clean;
2766 while (adapter->tx_dd_head != adapter->tx_dd_tail) {
2767 struct e1000_tx_desc *tx_desc;
2768 int dd_idx = adapter->tx_dd[adapter->tx_dd_head];
2770 tx_desc = &adapter->tx_desc_base[dd_idx];
2771 if (tx_desc->upper.fields.status & E1000_TXD_STAT_DD) {
2772 EM_INC_TXDD_IDX(adapter->tx_dd_head);
2774 if (++dd_idx == adapter->num_tx_desc)
2777 while (first != dd_idx) {
2782 tx_buffer = &adapter->tx_buffer_area[first];
2783 if (tx_buffer->m_head) {
2785 bus_dmamap_unload(adapter->txtag,
2787 m_freem(tx_buffer->m_head);
2788 tx_buffer->m_head = NULL;
2791 if (++first == adapter->num_tx_desc)
2798 adapter->next_tx_to_clean = first;
2799 adapter->num_tx_desc_avail = num_avail;
2801 if (adapter->tx_dd_head == adapter->tx_dd_tail) {
2802 adapter->tx_dd_head = 0;
2803 adapter->tx_dd_tail = 0;
2806 if (!EM_IS_OACTIVE(adapter)) {
2807 ifp->if_flags &= ~IFF_OACTIVE;
2809 /* All clean, turn off the timer */
2810 if (adapter->num_tx_desc_avail == adapter->num_tx_desc)
2816 em_tx_collect(struct adapter *adapter)
2818 struct ifnet *ifp = &adapter->arpcom.ac_if;
2819 struct em_buffer *tx_buffer;
2820 int tdh, first, num_avail, dd_idx = -1;
2822 if (adapter->num_tx_desc_avail == adapter->num_tx_desc)
2825 tdh = E1000_READ_REG(&adapter->hw, E1000_TDH(0));
2826 if (tdh == adapter->next_tx_to_clean)
2829 if (adapter->tx_dd_head != adapter->tx_dd_tail)
2830 dd_idx = adapter->tx_dd[adapter->tx_dd_head];
2832 num_avail = adapter->num_tx_desc_avail;
2833 first = adapter->next_tx_to_clean;
2835 while (first != tdh) {
2840 tx_buffer = &adapter->tx_buffer_area[first];
2841 if (tx_buffer->m_head) {
2843 bus_dmamap_unload(adapter->txtag,
2845 m_freem(tx_buffer->m_head);
2846 tx_buffer->m_head = NULL;
2849 if (first == dd_idx) {
2850 EM_INC_TXDD_IDX(adapter->tx_dd_head);
2851 if (adapter->tx_dd_head == adapter->tx_dd_tail) {
2852 adapter->tx_dd_head = 0;
2853 adapter->tx_dd_tail = 0;
2856 dd_idx = adapter->tx_dd[adapter->tx_dd_head];
2860 if (++first == adapter->num_tx_desc)
2863 adapter->next_tx_to_clean = first;
2864 adapter->num_tx_desc_avail = num_avail;
2866 if (!EM_IS_OACTIVE(adapter)) {
2867 ifp->if_flags &= ~IFF_OACTIVE;
2869 /* All clean, turn off the timer */
2870 if (adapter->num_tx_desc_avail == adapter->num_tx_desc)
2876 * When Link is lost sometimes there is work still in the TX ring
2877 * which will result in a watchdog, rather than allow that do an
2878 * attempted cleanup and then reinit here. Note that this has been
2879 * seens mostly with fiber adapters.
2882 em_tx_purge(struct adapter *adapter)
2884 struct ifnet *ifp = &adapter->arpcom.ac_if;
2886 if (!adapter->link_active && ifp->if_timer) {
2887 em_tx_collect(adapter);
2888 if (ifp->if_timer) {
2889 if_printf(ifp, "Link lost, TX pending, reinit\n");
2897 em_newbuf(struct adapter *adapter, int i, int init)
2900 bus_dma_segment_t seg;
2902 struct em_buffer *rx_buffer;
2905 m = m_getcl(init ? MB_WAIT : MB_DONTWAIT, MT_DATA, M_PKTHDR);
2907 adapter->mbuf_cluster_failed++;
2909 if_printf(&adapter->arpcom.ac_if,
2910 "Unable to allocate RX mbuf\n");
2914 m->m_len = m->m_pkthdr.len = MCLBYTES;
2916 if (adapter->max_frame_size <= MCLBYTES - ETHER_ALIGN)
2917 m_adj(m, ETHER_ALIGN);
2919 error = bus_dmamap_load_mbuf_segment(adapter->rxtag,
2920 adapter->rx_sparemap, m,
2921 &seg, 1, &nseg, BUS_DMA_NOWAIT);
2925 if_printf(&adapter->arpcom.ac_if,
2926 "Unable to load RX mbuf\n");
2931 rx_buffer = &adapter->rx_buffer_area[i];
2932 if (rx_buffer->m_head != NULL)
2933 bus_dmamap_unload(adapter->rxtag, rx_buffer->map);
2935 map = rx_buffer->map;
2936 rx_buffer->map = adapter->rx_sparemap;
2937 adapter->rx_sparemap = map;
2939 rx_buffer->m_head = m;
2941 adapter->rx_desc_base[i].buffer_addr = htole64(seg.ds_addr);
2946 em_create_rx_ring(struct adapter *adapter)
2948 device_t dev = adapter->dev;
2949 struct em_buffer *rx_buffer;
2952 adapter->rx_buffer_area =
2953 kmalloc(sizeof(struct em_buffer) * adapter->num_rx_desc,
2954 M_DEVBUF, M_WAITOK | M_ZERO);
2957 * Create DMA tag for rx buffers
2959 error = bus_dma_tag_create(adapter->parent_dtag, /* parent */
2960 1, 0, /* alignment, bounds */
2961 BUS_SPACE_MAXADDR, /* lowaddr */
2962 BUS_SPACE_MAXADDR, /* highaddr */
2963 NULL, NULL, /* filter, filterarg */
2964 MCLBYTES, /* maxsize */
2966 MCLBYTES, /* maxsegsize */
2967 BUS_DMA_WAITOK | BUS_DMA_ALLOCNOW, /* flags */
2970 device_printf(dev, "Unable to allocate RX DMA tag\n");
2971 kfree(adapter->rx_buffer_area, M_DEVBUF);
2972 adapter->rx_buffer_area = NULL;
2977 * Create spare DMA map for rx buffers
2979 error = bus_dmamap_create(adapter->rxtag, BUS_DMA_WAITOK,
2980 &adapter->rx_sparemap);
2982 device_printf(dev, "Unable to create spare RX DMA map\n");
2983 bus_dma_tag_destroy(adapter->rxtag);
2984 kfree(adapter->rx_buffer_area, M_DEVBUF);
2985 adapter->rx_buffer_area = NULL;
2990 * Create DMA maps for rx buffers
2992 for (i = 0; i < adapter->num_rx_desc; i++) {
2993 rx_buffer = &adapter->rx_buffer_area[i];
2995 error = bus_dmamap_create(adapter->rxtag, BUS_DMA_WAITOK,
2998 device_printf(dev, "Unable to create RX DMA map\n");
2999 em_destroy_rx_ring(adapter, i);
3007 em_init_rx_ring(struct adapter *adapter)
3011 /* Reset descriptor ring */
3012 bzero(adapter->rx_desc_base,
3013 (sizeof(struct e1000_rx_desc)) * adapter->num_rx_desc);
3015 /* Allocate new ones. */
3016 for (i = 0; i < adapter->num_rx_desc; i++) {
3017 error = em_newbuf(adapter, i, 1);
3022 /* Setup our descriptor pointers */
3023 adapter->next_rx_desc_to_check = 0;
3029 em_init_rx_unit(struct adapter *adapter)
3031 struct ifnet *ifp = &adapter->arpcom.ac_if;
3033 uint32_t rctl, rxcsum;
3036 * Make sure receives are disabled while setting
3037 * up the descriptor ring
3039 rctl = E1000_READ_REG(&adapter->hw, E1000_RCTL);
3040 E1000_WRITE_REG(&adapter->hw, E1000_RCTL, rctl & ~E1000_RCTL_EN);
3042 if (adapter->hw.mac.type >= e1000_82540) {
3044 * Set the interrupt throttling rate. Value is calculated
3045 * as ITR = 1 / (INT_THROTTLE_CEIL * 256ns)
3047 if (adapter->int_throttle_ceil) {
3048 E1000_WRITE_REG(&adapter->hw, E1000_ITR,
3049 1000000000 / 256 / adapter->int_throttle_ceil);
3051 E1000_WRITE_REG(&adapter->hw, E1000_ITR, 0);
3055 /* Disable accelerated ackknowledge */
3056 if (adapter->hw.mac.type == e1000_82574) {
3057 E1000_WRITE_REG(&adapter->hw,
3058 E1000_RFCTL, E1000_RFCTL_ACK_DIS);
3061 /* Setup the Base and Length of the Rx Descriptor Ring */
3062 bus_addr = adapter->rxdma.dma_paddr;
3063 E1000_WRITE_REG(&adapter->hw, E1000_RDLEN(0),
3064 adapter->num_rx_desc * sizeof(struct e1000_rx_desc));
3065 E1000_WRITE_REG(&adapter->hw, E1000_RDBAH(0),
3066 (uint32_t)(bus_addr >> 32));
3067 E1000_WRITE_REG(&adapter->hw, E1000_RDBAL(0),
3068 (uint32_t)bus_addr);
3070 /* Setup the Receive Control Register */
3071 rctl &= ~(3 << E1000_RCTL_MO_SHIFT);
3072 rctl |= E1000_RCTL_EN | E1000_RCTL_BAM | E1000_RCTL_LBM_NO |
3073 E1000_RCTL_RDMTS_HALF |
3074 (adapter->hw.mac.mc_filter_type << E1000_RCTL_MO_SHIFT);
3076 /* Make sure VLAN Filters are off */
3077 rctl &= ~E1000_RCTL_VFE;
3079 if (e1000_tbi_sbp_enabled_82543(&adapter->hw))
3080 rctl |= E1000_RCTL_SBP;
3082 rctl &= ~E1000_RCTL_SBP;
3084 switch (adapter->rx_buffer_len) {
3087 rctl |= E1000_RCTL_SZ_2048;
3091 rctl |= E1000_RCTL_SZ_4096 |
3092 E1000_RCTL_BSEX | E1000_RCTL_LPE;
3096 rctl |= E1000_RCTL_SZ_8192 |
3097 E1000_RCTL_BSEX | E1000_RCTL_LPE;
3101 rctl |= E1000_RCTL_SZ_16384 |
3102 E1000_RCTL_BSEX | E1000_RCTL_LPE;
3106 if (ifp->if_mtu > ETHERMTU)
3107 rctl |= E1000_RCTL_LPE;
3109 rctl &= ~E1000_RCTL_LPE;
3111 /* Receive Checksum Offload for TCP and UDP */
3112 if (ifp->if_capenable & IFCAP_RXCSUM) {
3113 rxcsum = E1000_READ_REG(&adapter->hw, E1000_RXCSUM);
3114 rxcsum |= (E1000_RXCSUM_IPOFL | E1000_RXCSUM_TUOFL);
3115 E1000_WRITE_REG(&adapter->hw, E1000_RXCSUM, rxcsum);
3119 * XXX TEMPORARY WORKAROUND: on some systems with 82573
3120 * long latencies are observed, like Lenovo X60. This
3121 * change eliminates the problem, but since having positive
3122 * values in RDTR is a known source of problems on other
3123 * platforms another solution is being sought.
3125 if (em_82573_workaround && adapter->hw.mac.type == e1000_82573) {
3126 E1000_WRITE_REG(&adapter->hw, E1000_RADV, EM_RADV_82573);
3127 E1000_WRITE_REG(&adapter->hw, E1000_RDTR, EM_RDTR_82573);
3131 * Setup the HW Rx Head and Tail Descriptor Pointers
3133 E1000_WRITE_REG(&adapter->hw, E1000_RDH(0), 0);
3134 E1000_WRITE_REG(&adapter->hw, E1000_RDT(0), adapter->num_rx_desc - 1);
3136 /* Enable Receives */
3137 E1000_WRITE_REG(&adapter->hw, E1000_RCTL, rctl);
3141 em_destroy_rx_ring(struct adapter *adapter, int ndesc)
3143 struct em_buffer *rx_buffer;
3146 if (adapter->rx_buffer_area == NULL)
3149 for (i = 0; i < ndesc; i++) {
3150 rx_buffer = &adapter->rx_buffer_area[i];
3152 KKASSERT(rx_buffer->m_head == NULL);
3153 bus_dmamap_destroy(adapter->rxtag, rx_buffer->map);
3155 bus_dmamap_destroy(adapter->rxtag, adapter->rx_sparemap);
3156 bus_dma_tag_destroy(adapter->rxtag);
3158 kfree(adapter->rx_buffer_area, M_DEVBUF);
3159 adapter->rx_buffer_area = NULL;
3163 em_rxeof(struct adapter *adapter, int count)
3165 struct ifnet *ifp = &adapter->arpcom.ac_if;
3166 uint8_t status, accept_frame = 0, eop = 0;
3167 uint16_t len, desc_len, prev_len_adj;
3168 struct e1000_rx_desc *current_desc;
3171 struct mbuf_chain chain[MAXCPU];
3173 i = adapter->next_rx_desc_to_check;
3174 current_desc = &adapter->rx_desc_base[i];
3176 if (!(current_desc->status & E1000_RXD_STAT_DD))
3179 ether_input_chain_init(chain);
3181 while ((current_desc->status & E1000_RXD_STAT_DD) && count != 0) {
3182 struct mbuf *m = NULL;
3186 mp = adapter->rx_buffer_area[i].m_head;
3189 * Can't defer bus_dmamap_sync(9) because TBI_ACCEPT
3190 * needs to access the last received byte in the mbuf.
3192 bus_dmamap_sync(adapter->rxtag, adapter->rx_buffer_area[i].map,
3193 BUS_DMASYNC_POSTREAD);
3197 desc_len = le16toh(current_desc->length);
3198 status = current_desc->status;
3199 if (status & E1000_RXD_STAT_EOP) {
3202 if (desc_len < ETHER_CRC_LEN) {
3204 prev_len_adj = ETHER_CRC_LEN - desc_len;
3206 len = desc_len - ETHER_CRC_LEN;
3213 if (current_desc->errors & E1000_RXD_ERR_FRAME_ERR_MASK) {
3215 uint32_t pkt_len = desc_len;
3217 if (adapter->fmp != NULL)
3218 pkt_len += adapter->fmp->m_pkthdr.len;
3220 last_byte = *(mtod(mp, caddr_t) + desc_len - 1);
3221 if (TBI_ACCEPT(&adapter->hw, status,
3222 current_desc->errors, pkt_len, last_byte,
3223 adapter->min_frame_size, adapter->max_frame_size)) {
3224 e1000_tbi_adjust_stats_82543(&adapter->hw,
3225 &adapter->stats, pkt_len,
3226 adapter->hw.mac.addr,
3227 adapter->max_frame_size);
3236 if (em_newbuf(adapter, i, 0) != 0) {
3241 /* Assign correct length to the current fragment */
3244 if (adapter->fmp == NULL) {
3245 mp->m_pkthdr.len = len;
3246 adapter->fmp = mp; /* Store the first mbuf */
3250 * Chain mbuf's together
3254 * Adjust length of previous mbuf in chain if
3255 * we received less than 4 bytes in the last
3258 if (prev_len_adj > 0) {
3259 adapter->lmp->m_len -= prev_len_adj;
3260 adapter->fmp->m_pkthdr.len -=
3263 adapter->lmp->m_next = mp;
3264 adapter->lmp = adapter->lmp->m_next;
3265 adapter->fmp->m_pkthdr.len += len;
3269 adapter->fmp->m_pkthdr.rcvif = ifp;
3272 if (ifp->if_capenable & IFCAP_RXCSUM) {
3273 em_rxcsum(adapter, current_desc,
3277 if (status & E1000_RXD_STAT_VP) {
3278 adapter->fmp->m_pkthdr.ether_vlantag =
3279 (le16toh(current_desc->special) &
3280 E1000_RXD_SPC_VLAN_MASK);
3281 adapter->fmp->m_flags |= M_VLANTAG;
3284 adapter->fmp = NULL;
3285 adapter->lmp = NULL;
3291 /* Reuse loaded DMA map and just update mbuf chain */
3292 mp = adapter->rx_buffer_area[i].m_head;
3293 mp->m_len = mp->m_pkthdr.len = MCLBYTES;
3294 mp->m_data = mp->m_ext.ext_buf;
3296 if (adapter->max_frame_size <= (MCLBYTES - ETHER_ALIGN))
3297 m_adj(mp, ETHER_ALIGN);
3299 if (adapter->fmp != NULL) {
3300 m_freem(adapter->fmp);
3301 adapter->fmp = NULL;
3302 adapter->lmp = NULL;
3307 /* Zero out the receive descriptors status. */
3308 current_desc->status = 0;
3311 ether_input_chain(ifp, m, NULL, chain);
3313 /* Advance our pointers to the next descriptor. */
3314 if (++i == adapter->num_rx_desc)
3316 current_desc = &adapter->rx_desc_base[i];
3318 adapter->next_rx_desc_to_check = i;
3320 ether_input_dispatch(chain);
3322 /* Advance the E1000's Receive Queue #0 "Tail Pointer". */
3324 i = adapter->num_rx_desc - 1;
3325 E1000_WRITE_REG(&adapter->hw, E1000_RDT(0), i);
3329 em_rxcsum(struct adapter *adapter, struct e1000_rx_desc *rx_desc,
3332 /* 82543 or newer only */
3333 if (adapter->hw.mac.type < e1000_82543 ||
3334 /* Ignore Checksum bit is set */
3335 (rx_desc->status & E1000_RXD_STAT_IXSM))
3338 if ((rx_desc->status & E1000_RXD_STAT_IPCS) &&
3339 !(rx_desc->errors & E1000_RXD_ERR_IPE)) {
3340 /* IP Checksum Good */
3341 mp->m_pkthdr.csum_flags |= CSUM_IP_CHECKED | CSUM_IP_VALID;
3344 if ((rx_desc->status & E1000_RXD_STAT_TCPCS) &&
3345 !(rx_desc->errors & E1000_RXD_ERR_TCPE)) {
3346 mp->m_pkthdr.csum_flags |= CSUM_DATA_VALID |
3348 CSUM_FRAG_NOT_CHECKED;
3349 mp->m_pkthdr.csum_data = htons(0xffff);
3354 em_enable_intr(struct adapter *adapter)
3356 lwkt_serialize_handler_enable(adapter->arpcom.ac_if.if_serializer);
3357 E1000_WRITE_REG(&adapter->hw, E1000_IMS, IMS_ENABLE_MASK);
3361 em_disable_intr(struct adapter *adapter)
3363 uint32_t clear = 0xffffffff;
3366 * The first version of 82542 had an errata where when link was forced
3367 * it would stay up even up even if the cable was disconnected.
3368 * Sequence errors were used to detect the disconnect and then the
3369 * driver would unforce the link. This code in the in the ISR. For
3370 * this to work correctly the Sequence error interrupt had to be
3371 * enabled all the time.
3373 if (adapter->hw.mac.type == e1000_82542 &&
3374 adapter->hw.revision_id == E1000_REVISION_2)
3375 clear &= ~E1000_IMC_RXSEQ;
3377 E1000_WRITE_REG(&adapter->hw, E1000_IMC, clear);
3379 lwkt_serialize_handler_disable(adapter->arpcom.ac_if.if_serializer);
3383 * Bit of a misnomer, what this really means is
3384 * to enable OS management of the system... aka
3385 * to disable special hardware management features
3388 em_get_mgmt(struct adapter *adapter)
3390 /* A shared code workaround */
3391 #define E1000_82542_MANC2H E1000_MANC2H
3392 if (adapter->has_manage) {
3393 int manc2h = E1000_READ_REG(&adapter->hw, E1000_MANC2H);
3394 int manc = E1000_READ_REG(&adapter->hw, E1000_MANC);
3396 /* disable hardware interception of ARP */
3397 manc &= ~(E1000_MANC_ARP_EN);
3399 /* enable receiving management packets to the host */
3400 if (adapter->hw.mac.type >= e1000_82571) {
3401 manc |= E1000_MANC_EN_MNG2HOST;
3402 #define E1000_MNG2HOST_PORT_623 (1 << 5)
3403 #define E1000_MNG2HOST_PORT_664 (1 << 6)
3404 manc2h |= E1000_MNG2HOST_PORT_623;
3405 manc2h |= E1000_MNG2HOST_PORT_664;
3406 E1000_WRITE_REG(&adapter->hw, E1000_MANC2H, manc2h);
3409 E1000_WRITE_REG(&adapter->hw, E1000_MANC, manc);
3414 * Give control back to hardware management
3415 * controller if there is one.
3418 em_rel_mgmt(struct adapter *adapter)
3420 if (adapter->has_manage) {
3421 int manc = E1000_READ_REG(&adapter->hw, E1000_MANC);
3423 /* re-enable hardware interception of ARP */
3424 manc |= E1000_MANC_ARP_EN;
3426 if (adapter->hw.mac.type >= e1000_82571)
3427 manc &= ~E1000_MANC_EN_MNG2HOST;
3429 E1000_WRITE_REG(&adapter->hw, E1000_MANC, manc);
3434 * em_get_hw_control() sets {CTRL_EXT|FWSM}:DRV_LOAD bit.
3435 * For ASF and Pass Through versions of f/w this means that
3436 * the driver is loaded. For AMT version (only with 82573)
3437 * of the f/w this means that the network i/f is open.
3440 em_get_hw_control(struct adapter *adapter)
3442 uint32_t ctrl_ext, swsm;
3444 /* Let firmware know the driver has taken over */
3445 switch (adapter->hw.mac.type) {
3447 swsm = E1000_READ_REG(&adapter->hw, E1000_SWSM);
3448 E1000_WRITE_REG(&adapter->hw, E1000_SWSM,
3449 swsm | E1000_SWSM_DRV_LOAD);
3453 case e1000_80003es2lan:
3456 case e1000_ich10lan:
3457 ctrl_ext = E1000_READ_REG(&adapter->hw, E1000_CTRL_EXT);
3458 E1000_WRITE_REG(&adapter->hw, E1000_CTRL_EXT,
3459 ctrl_ext | E1000_CTRL_EXT_DRV_LOAD);
3467 * em_rel_hw_control() resets {CTRL_EXT|FWSM}:DRV_LOAD bit.
3468 * For ASF and Pass Through versions of f/w this means that the
3469 * driver is no longer loaded. For AMT version (only with 82573)
3470 * of the f/w this means that the network i/f is closed.
3473 em_rel_hw_control(struct adapter *adapter)
3475 uint32_t ctrl_ext, swsm;
3477 /* Let firmware taken over control of h/w */
3478 switch (adapter->hw.mac.type) {
3480 swsm = E1000_READ_REG(&adapter->hw, E1000_SWSM);
3481 E1000_WRITE_REG(&adapter->hw, E1000_SWSM,
3482 swsm & ~E1000_SWSM_DRV_LOAD);
3487 case e1000_80003es2lan:
3490 case e1000_ich10lan:
3491 ctrl_ext = E1000_READ_REG(&adapter->hw, E1000_CTRL_EXT);
3492 E1000_WRITE_REG(&adapter->hw, E1000_CTRL_EXT,
3493 ctrl_ext & ~E1000_CTRL_EXT_DRV_LOAD);
3502 em_is_valid_eaddr(const uint8_t *addr)
3504 char zero_addr[ETHER_ADDR_LEN] = { 0, 0, 0, 0, 0, 0 };
3506 if ((addr[0] & 1) || !bcmp(addr, zero_addr, ETHER_ADDR_LEN))
3513 * Enable PCI Wake On Lan capability
3516 em_enable_wol(device_t dev)
3518 uint16_t cap, status;
3521 /* First find the capabilities pointer*/
3522 cap = pci_read_config(dev, PCIR_CAP_PTR, 2);
3524 /* Read the PM Capabilities */
3525 id = pci_read_config(dev, cap, 1);
3526 if (id != PCIY_PMG) /* Something wrong */
3530 * OK, we have the power capabilities,
3531 * so now get the status register
3533 cap += PCIR_POWER_STATUS;
3534 status = pci_read_config(dev, cap, 2);
3535 status |= PCIM_PSTAT_PME | PCIM_PSTAT_PMEENABLE;
3536 pci_write_config(dev, cap, status, 2);
3541 * 82544 Coexistence issue workaround.
3542 * There are 2 issues.
3543 * 1. Transmit Hang issue.
3544 * To detect this issue, following equation can be used...
3545 * SIZE[3:0] + ADDR[2:0] = SUM[3:0].
3546 * If SUM[3:0] is in between 1 to 4, we will have this issue.
3549 * To detect this issue, following equation can be used...
3550 * SIZE[3:0] + ADDR[2:0] = SUM[3:0].
3551 * If SUM[3:0] is in between 9 to c, we will have this issue.
3554 * Make sure we do not have ending address
3555 * as 1,2,3,4(Hang) or 9,a,b,c (DAC)
3558 em_82544_fill_desc(bus_addr_t address, uint32_t length, PDESC_ARRAY desc_array)
3560 uint32_t safe_terminator;
3563 * Since issue is sensitive to length and address.
3564 * Let us first check the address...
3567 desc_array->descriptor[0].address = address;
3568 desc_array->descriptor[0].length = length;
3569 desc_array->elements = 1;
3570 return (desc_array->elements);
3574 (uint32_t)((((uint32_t)address & 0x7) + (length & 0xF)) & 0xF);
3576 /* If it does not fall between 0x1 to 0x4 and 0x9 to 0xC then return */
3577 if (safe_terminator == 0 ||
3578 (safe_terminator > 4 && safe_terminator < 9) ||
3579 (safe_terminator > 0xC && safe_terminator <= 0xF)) {
3580 desc_array->descriptor[0].address = address;
3581 desc_array->descriptor[0].length = length;
3582 desc_array->elements = 1;
3583 return (desc_array->elements);
3586 desc_array->descriptor[0].address = address;
3587 desc_array->descriptor[0].length = length - 4;
3588 desc_array->descriptor[1].address = address + (length - 4);
3589 desc_array->descriptor[1].length = 4;
3590 desc_array->elements = 2;
3591 return (desc_array->elements);
3595 em_update_stats(struct adapter *adapter)
3597 struct ifnet *ifp = &adapter->arpcom.ac_if;
3599 if (adapter->hw.phy.media_type == e1000_media_type_copper ||
3600 (E1000_READ_REG(&adapter->hw, E1000_STATUS) & E1000_STATUS_LU)) {
3601 adapter->stats.symerrs +=
3602 E1000_READ_REG(&adapter->hw, E1000_SYMERRS);
3603 adapter->stats.sec += E1000_READ_REG(&adapter->hw, E1000_SEC);
3605 adapter->stats.crcerrs += E1000_READ_REG(&adapter->hw, E1000_CRCERRS);
3606 adapter->stats.mpc += E1000_READ_REG(&adapter->hw, E1000_MPC);
3607 adapter->stats.scc += E1000_READ_REG(&adapter->hw, E1000_SCC);
3608 adapter->stats.ecol += E1000_READ_REG(&adapter->hw, E1000_ECOL);
3610 adapter->stats.mcc += E1000_READ_REG(&adapter->hw, E1000_MCC);
3611 adapter->stats.latecol += E1000_READ_REG(&adapter->hw, E1000_LATECOL);
3612 adapter->stats.colc += E1000_READ_REG(&adapter->hw, E1000_COLC);
3613 adapter->stats.dc += E1000_READ_REG(&adapter->hw, E1000_DC);
3614 adapter->stats.rlec += E1000_READ_REG(&adapter->hw, E1000_RLEC);
3615 adapter->stats.xonrxc += E1000_READ_REG(&adapter->hw, E1000_XONRXC);
3616 adapter->stats.xontxc += E1000_READ_REG(&adapter->hw, E1000_XONTXC);
3617 adapter->stats.xoffrxc += E1000_READ_REG(&adapter->hw, E1000_XOFFRXC);
3618 adapter->stats.xofftxc += E1000_READ_REG(&adapter->hw, E1000_XOFFTXC);
3619 adapter->stats.fcruc += E1000_READ_REG(&adapter->hw, E1000_FCRUC);
3620 adapter->stats.prc64 += E1000_READ_REG(&adapter->hw, E1000_PRC64);
3621 adapter->stats.prc127 += E1000_READ_REG(&adapter->hw, E1000_PRC127);
3622 adapter->stats.prc255 += E1000_READ_REG(&adapter->hw, E1000_PRC255);
3623 adapter->stats.prc511 += E1000_READ_REG(&adapter->hw, E1000_PRC511);
3624 adapter->stats.prc1023 += E1000_READ_REG(&adapter->hw, E1000_PRC1023);
3625 adapter->stats.prc1522 += E1000_READ_REG(&adapter->hw, E1000_PRC1522);
3626 adapter->stats.gprc += E1000_READ_REG(&adapter->hw, E1000_GPRC);
3627 adapter->stats.bprc += E1000_READ_REG(&adapter->hw, E1000_BPRC);
3628 adapter->stats.mprc += E1000_READ_REG(&adapter->hw, E1000_MPRC);
3629 adapter->stats.gptc += E1000_READ_REG(&adapter->hw, E1000_GPTC);
3631 /* For the 64-bit byte counters the low dword must be read first. */
3632 /* Both registers clear on the read of the high dword */
3634 adapter->stats.gorc += E1000_READ_REG(&adapter->hw, E1000_GORCH);
3635 adapter->stats.gotc += E1000_READ_REG(&adapter->hw, E1000_GOTCH);
3637 adapter->stats.rnbc += E1000_READ_REG(&adapter->hw, E1000_RNBC);
3638 adapter->stats.ruc += E1000_READ_REG(&adapter->hw, E1000_RUC);
3639 adapter->stats.rfc += E1000_READ_REG(&adapter->hw, E1000_RFC);
3640 adapter->stats.roc += E1000_READ_REG(&adapter->hw, E1000_ROC);
3641 adapter->stats.rjc += E1000_READ_REG(&adapter->hw, E1000_RJC);
3643 adapter->stats.tor += E1000_READ_REG(&adapter->hw, E1000_TORH);
3644 adapter->stats.tot += E1000_READ_REG(&adapter->hw, E1000_TOTH);
3646 adapter->stats.tpr += E1000_READ_REG(&adapter->hw, E1000_TPR);
3647 adapter->stats.tpt += E1000_READ_REG(&adapter->hw, E1000_TPT);
3648 adapter->stats.ptc64 += E1000_READ_REG(&adapter->hw, E1000_PTC64);
3649 adapter->stats.ptc127 += E1000_READ_REG(&adapter->hw, E1000_PTC127);
3650 adapter->stats.ptc255 += E1000_READ_REG(&adapter->hw, E1000_PTC255);
3651 adapter->stats.ptc511 += E1000_READ_REG(&adapter->hw, E1000_PTC511);
3652 adapter->stats.ptc1023 += E1000_READ_REG(&adapter->hw, E1000_PTC1023);
3653 adapter->stats.ptc1522 += E1000_READ_REG(&adapter->hw, E1000_PTC1522);
3654 adapter->stats.mptc += E1000_READ_REG(&adapter->hw, E1000_MPTC);
3655 adapter->stats.bptc += E1000_READ_REG(&adapter->hw, E1000_BPTC);
3657 if (adapter->hw.mac.type >= e1000_82543) {
3658 adapter->stats.algnerrc +=
3659 E1000_READ_REG(&adapter->hw, E1000_ALGNERRC);
3660 adapter->stats.rxerrc +=
3661 E1000_READ_REG(&adapter->hw, E1000_RXERRC);
3662 adapter->stats.tncrs +=
3663 E1000_READ_REG(&adapter->hw, E1000_TNCRS);
3664 adapter->stats.cexterr +=
3665 E1000_READ_REG(&adapter->hw, E1000_CEXTERR);
3666 adapter->stats.tsctc +=
3667 E1000_READ_REG(&adapter->hw, E1000_TSCTC);
3668 adapter->stats.tsctfc +=
3669 E1000_READ_REG(&adapter->hw, E1000_TSCTFC);
3672 ifp->if_collisions = adapter->stats.colc;
3676 adapter->dropped_pkts + adapter->stats.rxerrc +
3677 adapter->stats.crcerrs + adapter->stats.algnerrc +
3678 adapter->stats.ruc + adapter->stats.roc +
3679 adapter->stats.mpc + adapter->stats.cexterr;
3683 adapter->stats.ecol + adapter->stats.latecol +
3684 adapter->watchdog_events;
3688 em_print_debug_info(struct adapter *adapter)
3690 device_t dev = adapter->dev;
3691 uint8_t *hw_addr = adapter->hw.hw_addr;
3693 device_printf(dev, "Adapter hardware address = %p \n", hw_addr);
3694 device_printf(dev, "CTRL = 0x%x RCTL = 0x%x \n",
3695 E1000_READ_REG(&adapter->hw, E1000_CTRL),
3696 E1000_READ_REG(&adapter->hw, E1000_RCTL));
3697 device_printf(dev, "Packet buffer = Tx=%dk Rx=%dk \n",
3698 ((E1000_READ_REG(&adapter->hw, E1000_PBA) & 0xffff0000) >> 16),\
3699 (E1000_READ_REG(&adapter->hw, E1000_PBA) & 0xffff) );
3700 device_printf(dev, "Flow control watermarks high = %d low = %d\n",
3701 adapter->hw.fc.high_water,
3702 adapter->hw.fc.low_water);
3703 device_printf(dev, "tx_int_delay = %d, tx_abs_int_delay = %d\n",
3704 E1000_READ_REG(&adapter->hw, E1000_TIDV),
3705 E1000_READ_REG(&adapter->hw, E1000_TADV));
3706 device_printf(dev, "rx_int_delay = %d, rx_abs_int_delay = %d\n",
3707 E1000_READ_REG(&adapter->hw, E1000_RDTR),
3708 E1000_READ_REG(&adapter->hw, E1000_RADV));
3709 device_printf(dev, "fifo workaround = %lld, fifo_reset_count = %lld\n",
3710 (long long)adapter->tx_fifo_wrk_cnt,
3711 (long long)adapter->tx_fifo_reset_cnt);
3712 device_printf(dev, "hw tdh = %d, hw tdt = %d\n",
3713 E1000_READ_REG(&adapter->hw, E1000_TDH(0)),
3714 E1000_READ_REG(&adapter->hw, E1000_TDT(0)));
3715 device_printf(dev, "hw rdh = %d, hw rdt = %d\n",
3716 E1000_READ_REG(&adapter->hw, E1000_RDH(0)),
3717 E1000_READ_REG(&adapter->hw, E1000_RDT(0)));
3718 device_printf(dev, "Num Tx descriptors avail = %d\n",
3719 adapter->num_tx_desc_avail);
3720 device_printf(dev, "Tx Descriptors not avail1 = %ld\n",
3721 adapter->no_tx_desc_avail1);
3722 device_printf(dev, "Tx Descriptors not avail2 = %ld\n",
3723 adapter->no_tx_desc_avail2);
3724 device_printf(dev, "Std mbuf failed = %ld\n",
3725 adapter->mbuf_alloc_failed);
3726 device_printf(dev, "Std mbuf cluster failed = %ld\n",
3727 adapter->mbuf_cluster_failed);
3728 device_printf(dev, "Driver dropped packets = %ld\n",
3729 adapter->dropped_pkts);
3730 device_printf(dev, "Driver tx dma failure in encap = %ld\n",
3731 adapter->no_tx_dma_setup);
3733 device_printf(dev, "TXCSUM try pullup = %lu\n",
3734 adapter->tx_csum_try_pullup);
3735 device_printf(dev, "TXCSUM m_pullup(eh) called = %lu\n",
3736 adapter->tx_csum_pullup1);
3737 device_printf(dev, "TXCSUM m_pullup(eh) failed = %lu\n",
3738 adapter->tx_csum_pullup1_failed);
3739 device_printf(dev, "TXCSUM m_pullup(eh+ip) called = %lu\n",
3740 adapter->tx_csum_pullup2);
3741 device_printf(dev, "TXCSUM m_pullup(eh+ip) failed = %lu\n",
3742 adapter->tx_csum_pullup2_failed);
3743 device_printf(dev, "TXCSUM non-writable(eh) droped = %lu\n",
3744 adapter->tx_csum_drop1);
3745 device_printf(dev, "TXCSUM non-writable(eh+ip) droped = %lu\n",
3746 adapter->tx_csum_drop2);
3750 em_print_hw_stats(struct adapter *adapter)
3752 device_t dev = adapter->dev;
3754 device_printf(dev, "Excessive collisions = %lld\n",
3755 (long long)adapter->stats.ecol);
3756 #if (DEBUG_HW > 0) /* Dont output these errors normally */
3757 device_printf(dev, "Symbol errors = %lld\n",
3758 (long long)adapter->stats.symerrs);
3760 device_printf(dev, "Sequence errors = %lld\n",
3761 (long long)adapter->stats.sec);
3762 device_printf(dev, "Defer count = %lld\n",
3763 (long long)adapter->stats.dc);
3764 device_printf(dev, "Missed Packets = %lld\n",
3765 (long long)adapter->stats.mpc);
3766 device_printf(dev, "Receive No Buffers = %lld\n",
3767 (long long)adapter->stats.rnbc);
3768 /* RLEC is inaccurate on some hardware, calculate our own. */
3769 device_printf(dev, "Receive Length Errors = %lld\n",
3770 ((long long)adapter->stats.roc + (long long)adapter->stats.ruc));
3771 device_printf(dev, "Receive errors = %lld\n",
3772 (long long)adapter->stats.rxerrc);
3773 device_printf(dev, "Crc errors = %lld\n",
3774 (long long)adapter->stats.crcerrs);
3775 device_printf(dev, "Alignment errors = %lld\n",
3776 (long long)adapter->stats.algnerrc);
3777 device_printf(dev, "Collision/Carrier extension errors = %lld\n",
3778 (long long)adapter->stats.cexterr);
3779 device_printf(dev, "RX overruns = %ld\n", adapter->rx_overruns);
3780 device_printf(dev, "watchdog timeouts = %ld\n",
3781 adapter->watchdog_events);
3782 device_printf(dev, "XON Rcvd = %lld\n",
3783 (long long)adapter->stats.xonrxc);
3784 device_printf(dev, "XON Xmtd = %lld\n",
3785 (long long)adapter->stats.xontxc);
3786 device_printf(dev, "XOFF Rcvd = %lld\n",
3787 (long long)adapter->stats.xoffrxc);
3788 device_printf(dev, "XOFF Xmtd = %lld\n",
3789 (long long)adapter->stats.xofftxc);
3790 device_printf(dev, "Good Packets Rcvd = %lld\n",
3791 (long long)adapter->stats.gprc);
3792 device_printf(dev, "Good Packets Xmtd = %lld\n",
3793 (long long)adapter->stats.gptc);
3797 em_print_nvm_info(struct adapter *adapter)
3799 uint16_t eeprom_data;
3802 /* Its a bit crude, but it gets the job done */
3803 kprintf("\nInterface EEPROM Dump:\n");
3804 kprintf("Offset\n0x0000 ");
3805 for (i = 0, j = 0; i < 32; i++, j++) {
3806 if (j == 8) { /* Make the offset block */
3808 kprintf("\n0x00%x0 ",row);
3810 e1000_read_nvm(&adapter->hw, i, 1, &eeprom_data);
3811 kprintf("%04x ", eeprom_data);
3817 em_sysctl_debug_info(SYSCTL_HANDLER_ARGS)
3819 struct adapter *adapter;
3824 error = sysctl_handle_int(oidp, &result, 0, req);
3825 if (error || !req->newptr)
3828 adapter = (struct adapter *)arg1;
3829 ifp = &adapter->arpcom.ac_if;
3831 lwkt_serialize_enter(ifp->if_serializer);
3834 em_print_debug_info(adapter);
3837 * This value will cause a hex dump of the
3838 * first 32 16-bit words of the EEPROM to
3842 em_print_nvm_info(adapter);
3844 lwkt_serialize_exit(ifp->if_serializer);
3850 em_sysctl_stats(SYSCTL_HANDLER_ARGS)
3855 error = sysctl_handle_int(oidp, &result, 0, req);
3856 if (error || !req->newptr)
3860 struct adapter *adapter = (struct adapter *)arg1;
3861 struct ifnet *ifp = &adapter->arpcom.ac_if;
3863 lwkt_serialize_enter(ifp->if_serializer);
3864 em_print_hw_stats(adapter);
3865 lwkt_serialize_exit(ifp->if_serializer);
3871 em_add_sysctl(struct adapter *adapter)
3873 sysctl_ctx_init(&adapter->sysctl_ctx);
3874 adapter->sysctl_tree = SYSCTL_ADD_NODE(&adapter->sysctl_ctx,
3875 SYSCTL_STATIC_CHILDREN(_hw), OID_AUTO,
3876 device_get_nameunit(adapter->dev),
3878 if (adapter->sysctl_tree == NULL) {
3879 device_printf(adapter->dev, "can't add sysctl node\n");
3881 SYSCTL_ADD_PROC(&adapter->sysctl_ctx,
3882 SYSCTL_CHILDREN(adapter->sysctl_tree),
3883 OID_AUTO, "debug", CTLTYPE_INT|CTLFLAG_RW, adapter, 0,
3884 em_sysctl_debug_info, "I", "Debug Information");
3886 SYSCTL_ADD_PROC(&adapter->sysctl_ctx,
3887 SYSCTL_CHILDREN(adapter->sysctl_tree),
3888 OID_AUTO, "stats", CTLTYPE_INT|CTLFLAG_RW, adapter, 0,
3889 em_sysctl_stats, "I", "Statistics");
3891 SYSCTL_ADD_INT(&adapter->sysctl_ctx,
3892 SYSCTL_CHILDREN(adapter->sysctl_tree),
3893 OID_AUTO, "rxd", CTLFLAG_RD,
3894 &adapter->num_rx_desc, 0, NULL);
3895 SYSCTL_ADD_INT(&adapter->sysctl_ctx,
3896 SYSCTL_CHILDREN(adapter->sysctl_tree),
3897 OID_AUTO, "txd", CTLFLAG_RD,
3898 &adapter->num_tx_desc, 0, NULL);
3900 if (adapter->hw.mac.type >= e1000_82540) {
3901 SYSCTL_ADD_PROC(&adapter->sysctl_ctx,
3902 SYSCTL_CHILDREN(adapter->sysctl_tree),
3903 OID_AUTO, "int_throttle_ceil",
3904 CTLTYPE_INT|CTLFLAG_RW, adapter, 0,
3905 em_sysctl_int_throttle, "I",
3906 "interrupt throttling rate");
3908 SYSCTL_ADD_PROC(&adapter->sysctl_ctx,
3909 SYSCTL_CHILDREN(adapter->sysctl_tree),
3910 OID_AUTO, "int_tx_nsegs",
3911 CTLTYPE_INT|CTLFLAG_RW, adapter, 0,
3912 em_sysctl_int_tx_nsegs, "I",
3913 "# segments per TX interrupt");
3918 em_sysctl_int_throttle(SYSCTL_HANDLER_ARGS)
3920 struct adapter *adapter = (void *)arg1;
3921 struct ifnet *ifp = &adapter->arpcom.ac_if;
3922 int error, throttle;
3924 throttle = adapter->int_throttle_ceil;
3925 error = sysctl_handle_int(oidp, &throttle, 0, req);
3926 if (error || req->newptr == NULL)
3928 if (throttle < 0 || throttle > 1000000000 / 256)
3933 * Set the interrupt throttling rate in 256ns increments,
3934 * recalculate sysctl value assignment to get exact frequency.
3936 throttle = 1000000000 / 256 / throttle;
3938 /* Upper 16bits of ITR is reserved and should be zero */
3939 if (throttle & 0xffff0000)
3943 lwkt_serialize_enter(ifp->if_serializer);
3946 adapter->int_throttle_ceil = 1000000000 / 256 / throttle;
3948 adapter->int_throttle_ceil = 0;
3950 if (ifp->if_flags & IFF_RUNNING)
3951 E1000_WRITE_REG(&adapter->hw, E1000_ITR, throttle);
3953 lwkt_serialize_exit(ifp->if_serializer);
3956 if_printf(ifp, "Interrupt moderation set to %d/sec\n",
3957 adapter->int_throttle_ceil);
3963 em_sysctl_int_tx_nsegs(SYSCTL_HANDLER_ARGS)
3965 struct adapter *adapter = (void *)arg1;
3966 struct ifnet *ifp = &adapter->arpcom.ac_if;
3969 segs = adapter->tx_int_nsegs;
3970 error = sysctl_handle_int(oidp, &segs, 0, req);
3971 if (error || req->newptr == NULL)
3976 lwkt_serialize_enter(ifp->if_serializer);
3979 * Don't allow int_tx_nsegs to become:
3980 * o Less the oact_tx_desc
3981 * o Too large that no TX desc will cause TX interrupt to
3982 * be generated (OACTIVE will never recover)
3983 * o Too small that will cause tx_dd[] overflow
3985 if (segs < adapter->oact_tx_desc ||
3986 segs >= adapter->num_tx_desc - adapter->oact_tx_desc ||
3987 segs < adapter->num_tx_desc / EM_TXDD_SAFE) {
3991 adapter->tx_int_nsegs = segs;
3994 lwkt_serialize_exit(ifp->if_serializer);