2 * Copyright (c) 2010 Lev Serebryakov <lev@FreeBSD.org>.
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions
8 * 1. Redistributions of source code must retain the above copyright
9 * notice, this list of conditions and the following disclaimer.
10 * 2. Redistributions in binary form must reproduce the above copyright
11 * notice, this list of conditions and the following disclaimer in the
12 * documentation and/or other materials provided with the distribution.
14 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
15 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
16 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
17 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
18 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
19 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
20 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
21 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
22 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
23 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
28 * This driver supports several multiport USB-to-RS232 serial adapters driven
29 * by MosChip mos7820 and mos7840, bridge chips.
30 * The adapters are sold under many different brand names.
32 * Datasheets are available at MosChip www site at
33 * http://www.moschip.com. The datasheets don't contain full
34 * programming information for the chip.
36 * It is nornal to have only two enabled ports in devices, based on
41 #include <sys/stdint.h>
42 #include <sys/param.h>
43 #include <sys/queue.h>
44 #include <sys/types.h>
45 #include <sys/systm.h>
46 #include <sys/kernel.h>
48 #include <sys/linker_set.h>
49 #include <sys/module.h>
51 #include <sys/condvar.h>
52 #include <sys/sysctl.h>
53 #include <sys/unistd.h>
54 #include <sys/callout.h>
55 #include <sys/malloc.h>
58 #include <bus/u4b/usb.h>
59 #include <bus/u4b/usbdi.h>
60 #include <bus/u4b/usbdi_util.h>
61 #include <bus/u4b/usb_cdc.h>
64 #define USB_DEBUG_VAR umcs_debug
65 #include <bus/u4b/usb_debug.h>
66 #include <bus/u4b/usb_process.h>
68 #include <bus/u4b/serial/usb_serial.h>
70 #include <bus/u4b/serial/umcs.h>
72 #define UMCS7840_MODVER 1
75 static int umcs_debug = 0;
77 static SYSCTL_NODE(_hw_usb, OID_AUTO, umcs, CTLFLAG_RW, 0, "USB umcs quadport serial adapter");
78 SYSCTL_INT(_hw_usb_umcs, OID_AUTO, debug, CTLFLAG_RW, &umcs_debug, 0, "Debug level");
79 #endif /* USB_DEBUG */
83 * Two-port devices (both with 7820 chip and 7840 chip configured as two-port)
84 * have ports 0 and 2, with ports 1 and 3 omitted.
85 * So,PHYSICAL port numbers (indexes) on two-port device will be 0 and 2.
86 * This driver trys to use physical numbers as much as possible.
90 * Indexed by PHYSICAL port number.
91 * Pack non-regular registers to array to easier if-less access.
93 struct umcs7840_port_registers {
94 uint8_t reg_sp; /* SP register. */
95 uint8_t reg_control; /* CONTROL register. */
96 uint8_t reg_dcr; /* DCR0 register. DCR1 & DCR2 can be
100 static const struct umcs7840_port_registers umcs7840_port_registers[UMCS7840_MAX_PORTS] = {
101 {.reg_sp = MCS7840_DEV_REG_SP1,.reg_control = MCS7840_DEV_REG_CONTROL1,.reg_dcr = MCS7840_DEV_REG_DCR0_1},
102 {.reg_sp = MCS7840_DEV_REG_SP2,.reg_control = MCS7840_DEV_REG_CONTROL2,.reg_dcr = MCS7840_DEV_REG_DCR0_2},
103 {.reg_sp = MCS7840_DEV_REG_SP3,.reg_control = MCS7840_DEV_REG_CONTROL3,.reg_dcr = MCS7840_DEV_REG_DCR0_3},
104 {.reg_sp = MCS7840_DEV_REG_SP4,.reg_control = MCS7840_DEV_REG_CONTROL4,.reg_dcr = MCS7840_DEV_REG_DCR0_4},
113 struct umcs7840_softc_oneport {
114 struct usb_xfer *sc_xfer[UMCS7840_N_TRANSFERS]; /* Control structures
115 * for two transfers */
117 uint8_t sc_lcr; /* local line control register */
118 uint8_t sc_mcr; /* local modem control register */
119 uint8_t sc_lsr; /* local line status register */
120 uint8_t sc_msr; /* local modem status register */
123 struct umcs7840_softc {
124 struct ucom_super_softc sc_super_ucom;
125 struct ucom_softc sc_ucom[UMCS7840_MAX_PORTS]; /* Need to be continuous
126 * array, so indexed by
128 * (subunit) number */
130 struct usb_xfer *sc_intr_xfer; /* Interrupt endpoint */
132 device_t sc_dev; /* Device for error prints */
133 struct usb_device *sc_udev; /* USB Device for all operations */
134 struct lock sc_lock; /* ucom requires this */
136 uint8_t sc_driver_done; /* Flag when enumeration is finished */
138 uint8_t sc_numports; /* Number of ports (subunits) */
139 struct umcs7840_softc_oneport sc_ports[UMCS7840_MAX_PORTS]; /* Indexed by PHYSICAL
144 static usb_error_t umcs7840_get_reg_sync(struct umcs7840_softc *, uint8_t, uint8_t *);
145 static usb_error_t umcs7840_set_reg_sync(struct umcs7840_softc *, uint8_t, uint8_t);
146 static usb_error_t umcs7840_get_UART_reg_sync(struct umcs7840_softc *, uint8_t, uint8_t, uint8_t *);
147 static usb_error_t umcs7840_set_UART_reg_sync(struct umcs7840_softc *, uint8_t, uint8_t, uint8_t);
149 static usb_error_t umcs7840_set_baudrate(struct umcs7840_softc *, uint8_t, uint32_t);
150 static usb_error_t umcs7840_calc_baudrate(uint32_t rate, uint16_t *, uint8_t *);
152 static void umcs7840_cfg_get_status(struct ucom_softc *, uint8_t *, uint8_t *);
153 static void umcs7840_cfg_set_dtr(struct ucom_softc *, uint8_t);
154 static void umcs7840_cfg_set_rts(struct ucom_softc *, uint8_t);
155 static void umcs7840_cfg_set_break(struct ucom_softc *, uint8_t);
156 static void umcs7840_cfg_param(struct ucom_softc *, struct termios *);
157 static void umcs7840_cfg_open(struct ucom_softc *);
158 static void umcs7840_cfg_close(struct ucom_softc *);
160 static int umcs7840_pre_param(struct ucom_softc *, struct termios *);
162 static void umcs7840_start_read(struct ucom_softc *);
163 static void umcs7840_stop_read(struct ucom_softc *);
165 static void umcs7840_start_write(struct ucom_softc *);
166 static void umcs7840_stop_write(struct ucom_softc *);
168 static void umcs7840_poll(struct ucom_softc *ucom);
170 static device_probe_t umcs7840_probe;
171 static device_attach_t umcs7840_attach;
172 static device_detach_t umcs7840_detach;
174 static usb_callback_t umcs7840_intr_callback;
175 static usb_callback_t umcs7840_read_callback1;
176 static usb_callback_t umcs7840_read_callback2;
177 static usb_callback_t umcs7840_read_callback3;
178 static usb_callback_t umcs7840_read_callback4;
179 static usb_callback_t umcs7840_write_callback1;
180 static usb_callback_t umcs7840_write_callback2;
181 static usb_callback_t umcs7840_write_callback3;
182 static usb_callback_t umcs7840_write_callback4;
184 static void umcs7840_read_callbackN(struct usb_xfer *, usb_error_t, uint8_t);
185 static void umcs7840_write_callbackN(struct usb_xfer *, usb_error_t, uint8_t);
187 /* Indexed by LOGICAL port number (subunit), so two-port device uses 0 & 1 */
188 static usb_callback_t *umcs7840_rw_callbacks[UMCS7840_MAX_PORTS][UMCS7840_N_TRANSFERS] = {
189 {&umcs7840_read_callback1, &umcs7840_write_callback1},
190 {&umcs7840_read_callback2, &umcs7840_write_callback2},
191 {&umcs7840_read_callback3, &umcs7840_write_callback3},
192 {&umcs7840_read_callback4, &umcs7840_write_callback4},
195 static const struct usb_config umcs7840_bulk_config_data[UMCS7840_N_TRANSFERS] = {
196 [UMCS7840_BULK_RD_EP] = {
199 .direction = UE_DIR_IN,
200 .flags = {.pipe_bof = 1,.short_xfer_ok = 1,},
201 .bufsize = 0, /* use wMaxPacketSize */
202 .callback = &umcs7840_read_callback1,
206 [UMCS7840_BULK_WR_EP] = {
209 .direction = UE_DIR_OUT,
210 .flags = {.pipe_bof = 1,.short_xfer_ok = 1,},
211 .bufsize = 0, /* use wMaxPacketSize */
212 .callback = &umcs7840_write_callback1,
217 static const struct usb_config umcs7840_intr_config_data[1] = {
219 .type = UE_INTERRUPT,
221 .direction = UE_DIR_IN,
222 .flags = {.pipe_bof = 1,.short_xfer_ok = 1,},
223 .bufsize = 0, /* use wMaxPacketSize */
224 .callback = &umcs7840_intr_callback,
229 static struct ucom_callback umcs7840_callback = {
230 .ucom_cfg_get_status = &umcs7840_cfg_get_status,
232 .ucom_cfg_set_dtr = &umcs7840_cfg_set_dtr,
233 .ucom_cfg_set_rts = &umcs7840_cfg_set_rts,
234 .ucom_cfg_set_break = &umcs7840_cfg_set_break,
236 .ucom_cfg_param = &umcs7840_cfg_param,
237 .ucom_cfg_open = &umcs7840_cfg_open,
238 .ucom_cfg_close = &umcs7840_cfg_close,
240 .ucom_pre_param = &umcs7840_pre_param,
242 .ucom_start_read = &umcs7840_start_read,
243 .ucom_stop_read = &umcs7840_stop_read,
245 .ucom_start_write = &umcs7840_start_write,
246 .ucom_stop_write = &umcs7840_stop_write,
248 .ucom_poll = &umcs7840_poll,
251 static const STRUCT_USB_HOST_ID umcs7840_devs[] = {
252 {USB_VPI(USB_VENDOR_MOSCHIP, USB_PRODUCT_MOSCHIP_MCS7820, 0)},
253 {USB_VPI(USB_VENDOR_MOSCHIP, USB_PRODUCT_MOSCHIP_MCS7840, 0)},
256 static device_method_t umcs7840_methods[] = {
257 DEVMETHOD(device_probe, umcs7840_probe),
258 DEVMETHOD(device_attach, umcs7840_attach),
259 DEVMETHOD(device_detach, umcs7840_detach),
263 static devclass_t umcs7840_devclass;
265 static driver_t umcs7840_driver = {
267 .methods = umcs7840_methods,
268 .size = sizeof(struct umcs7840_softc),
271 DRIVER_MODULE(umcs7840, uhub, umcs7840_driver, umcs7840_devclass, NULL, NULL);
272 MODULE_DEPEND(umcs7840, ucom, 1, 1, 1);
273 MODULE_DEPEND(umcs7840, usb, 1, 1, 1);
274 MODULE_VERSION(umcs7840, UMCS7840_MODVER);
277 umcs7840_probe(device_t dev)
279 struct usb_attach_arg *uaa = device_get_ivars(dev);
281 if (uaa->usb_mode != USB_MODE_HOST)
283 if (uaa->info.bConfigIndex != MCS7840_CONFIG_INDEX)
285 if (uaa->info.bIfaceIndex != MCS7840_IFACE_INDEX)
287 return (usbd_lookup_id_by_uaa(umcs7840_devs, sizeof(umcs7840_devs), uaa));
291 umcs7840_attach(device_t dev)
293 struct usb_config umcs7840_config_tmp[UMCS7840_N_TRANSFERS];
294 struct usb_attach_arg *uaa = device_get_ivars(dev);
295 struct umcs7840_softc *sc = device_get_softc(dev);
297 uint8_t iface_index = MCS7840_IFACE_INDEX;
303 for (n = 0; n < UMCS7840_N_TRANSFERS; ++n)
304 umcs7840_config_tmp[n] = umcs7840_bulk_config_data[n];
306 device_set_usb_desc(dev);
307 lockinit(&sc->sc_lock, "umcs7840", 0, LK_CANRECURSE);
310 sc->sc_udev = uaa->device;
313 * Get number of ports
314 * Documentation (full datasheet) says, that number of ports is
315 * set as MCS7840_DEV_MODE_SELECT24S bit in MODE R/Only
316 * register. But vendor driver uses these undocumented
319 * Experiments show, that MODE register can have `0'
320 * (4 ports) bit on 2-port device, so use vendor driver's way.
322 * Also, see notes in header file for these constants.
324 umcs7840_get_reg_sync(sc, MCS7840_DEV_REG_GPIO, &data);
325 if (data & MCS7840_DEV_GPIO_4PORTS) {
327 /* Store physical port numbers in sc_portno */
328 sc->sc_ucom[0].sc_portno = 0;
329 sc->sc_ucom[1].sc_portno = 1;
330 sc->sc_ucom[2].sc_portno = 2;
331 sc->sc_ucom[3].sc_portno = 3;
334 /* Store physical port numbers in sc_portno */
335 sc->sc_ucom[0].sc_portno = 0;
336 sc->sc_ucom[1].sc_portno = 2; /* '1' is skipped */
338 device_printf(dev, "Chip mcs%04x, found %d active ports\n", uaa->info.idProduct, sc->sc_numports);
339 if (!umcs7840_get_reg_sync(sc, MCS7840_DEV_REG_MODE, &data)) {
340 device_printf(dev, "On-die confguration: RST: active %s, HRD: %s, PLL: %s, POR: %s, Ports: %s, EEPROM write %s, IrDA is %savailable\n",
341 (data & MCS7840_DEV_MODE_RESET) ? "low" : "high",
342 (data & MCS7840_DEV_MODE_SER_PRSNT) ? "yes" : "no",
343 (data & MCS7840_DEV_MODE_PLLBYPASS) ? "bypassed" : "avail",
344 (data & MCS7840_DEV_MODE_PORBYPASS) ? "bypassed" : "avail",
345 (data & MCS7840_DEV_MODE_SELECT24S) ? "2" : "4",
346 (data & MCS7840_DEV_MODE_EEPROMWR) ? "enabled" : "disabled",
347 (data & MCS7840_DEV_MODE_IRDA) ? "" : "not ");
349 /* Setup all transfers */
350 for (subunit = 0; subunit < sc->sc_numports; ++subunit) {
351 for (n = 0; n < UMCS7840_N_TRANSFERS; ++n) {
352 /* Set endpoint address */
353 umcs7840_config_tmp[n].endpoint = umcs7840_bulk_config_data[n].endpoint + 2 * sc->sc_ucom[subunit].sc_portno;
354 umcs7840_config_tmp[n].callback = umcs7840_rw_callbacks[subunit][n];
356 error = usbd_transfer_setup(uaa->device,
357 &iface_index, sc->sc_ports[sc->sc_ucom[subunit].sc_portno].sc_xfer, umcs7840_config_tmp,
358 UMCS7840_N_TRANSFERS, sc, &sc->sc_lock);
360 device_printf(dev, "allocating USB transfers failed for subunit %d of %d\n",
361 subunit + 1, sc->sc_numports);
365 error = usbd_transfer_setup(uaa->device,
366 &iface_index, &sc->sc_intr_xfer, umcs7840_intr_config_data,
367 1, sc, &sc->sc_lock);
369 device_printf(dev, "allocating USB transfers failed for interrupt\n");
372 /* clear stall at first run */
373 lockmgr(&sc->sc_lock, LK_EXCLUSIVE);
374 for (subunit = 0; subunit < sc->sc_numports; ++subunit) {
375 usbd_xfer_set_stall(sc->sc_ports[sc->sc_ucom[subunit].sc_portno].sc_xfer[UMCS7840_BULK_RD_EP]);
376 usbd_xfer_set_stall(sc->sc_ports[sc->sc_ucom[subunit].sc_portno].sc_xfer[UMCS7840_BULK_WR_EP]);
378 lockmgr(&sc->sc_lock, LK_RELEASE);
380 error = ucom_attach(&sc->sc_super_ucom, sc->sc_ucom, sc->sc_numports, sc,
381 &umcs7840_callback, &sc->sc_lock);
385 ucom_set_pnpinfo_usb(&sc->sc_super_ucom, dev);
390 umcs7840_detach(dev);
395 umcs7840_detach(device_t dev)
397 struct umcs7840_softc *sc = device_get_softc(dev);
400 ucom_detach(&sc->sc_super_ucom, sc->sc_ucom);
402 for (subunit = 0; subunit < sc->sc_numports; ++subunit)
403 usbd_transfer_unsetup(sc->sc_ports[sc->sc_ucom[subunit].sc_portno].sc_xfer, UMCS7840_N_TRANSFERS);
404 usbd_transfer_unsetup(&sc->sc_intr_xfer, 1);
406 lockuninit(&sc->sc_lock);
411 umcs7840_cfg_open(struct ucom_softc *ucom)
413 struct umcs7840_softc *sc = ucom->sc_parent;
414 uint16_t pn = ucom->sc_portno;
417 /* If it very first open, finish global configuration */
418 if (!sc->sc_driver_done) {
420 * USB enumeration is finished, pass internal memory to FIFOs
421 * If it is done in the end of "attach", kernel panics.
423 if (umcs7840_get_reg_sync(sc, MCS7840_DEV_REG_CONTROL1, &data))
425 data |= MCS7840_DEV_CONTROL1_DRIVER_DONE;
426 if (umcs7840_set_reg_sync(sc, MCS7840_DEV_REG_CONTROL1, data))
428 sc->sc_driver_done = 1;
430 /* Toggle reset bit on-off */
431 if (umcs7840_get_reg_sync(sc, umcs7840_port_registers[pn].reg_sp, &data))
433 data |= MCS7840_DEV_SPx_UART_RESET;
434 if (umcs7840_set_reg_sync(sc, umcs7840_port_registers[pn].reg_sp, data))
436 data &= ~MCS7840_DEV_SPx_UART_RESET;
437 if (umcs7840_set_reg_sync(sc, umcs7840_port_registers[pn].reg_sp, data))
440 /* Set RS-232 mode */
441 if (umcs7840_set_UART_reg_sync(sc, pn, MCS7840_UART_REG_SCRATCHPAD, MCS7840_UART_SCRATCHPAD_RS232))
444 /* Disable RX on time of initialization */
445 if (umcs7840_get_reg_sync(sc, umcs7840_port_registers[pn].reg_control, &data))
447 data |= MCS7840_DEV_CONTROLx_RX_DISABLE;
448 if (umcs7840_set_reg_sync(sc, umcs7840_port_registers[pn].reg_control, data))
451 /* Disable all interrupts */
452 if (umcs7840_set_UART_reg_sync(sc, pn, MCS7840_UART_REG_IER, 0))
455 /* Reset FIFO -- documented */
456 if (umcs7840_set_UART_reg_sync(sc, pn, MCS7840_UART_REG_FCR, 0))
458 if (umcs7840_set_UART_reg_sync(sc, pn, MCS7840_UART_REG_FCR,
459 MCS7840_UART_FCR_ENABLE | MCS7840_UART_FCR_FLUSHRHR |
460 MCS7840_UART_FCR_FLUSHTHR | MCS7840_UART_FCR_RTL_1_14))
463 /* Set 8 bit, no parity, 1 stop bit -- documented */
464 sc->sc_ports[pn].sc_lcr = MCS7840_UART_LCR_DATALEN8 | MCS7840_UART_LCR_STOPB1;
465 if (umcs7840_set_UART_reg_sync(sc, pn, MCS7840_UART_REG_LCR, sc->sc_ports[pn].sc_lcr))
469 * Enable DTR/RTS on modem control, enable modem interrupts --
472 sc->sc_ports[pn].sc_mcr = MCS7840_UART_MCR_DTR | MCS7840_UART_MCR_RTS | MCS7840_UART_MCR_IE;
473 if (umcs7840_set_UART_reg_sync(sc, pn, MCS7840_UART_REG_MCR, sc->sc_ports[pn].sc_mcr))
476 /* Clearing Bulkin and Bulkout FIFO */
477 if (umcs7840_get_reg_sync(sc, umcs7840_port_registers[pn].reg_sp, &data))
479 data |= MCS7840_DEV_SPx_RESET_OUT_FIFO | MCS7840_DEV_SPx_RESET_IN_FIFO;
480 if (umcs7840_set_reg_sync(sc, umcs7840_port_registers[pn].reg_sp, data))
482 data &= ~(MCS7840_DEV_SPx_RESET_OUT_FIFO | MCS7840_DEV_SPx_RESET_IN_FIFO);
483 if (umcs7840_set_reg_sync(sc, umcs7840_port_registers[pn].reg_sp, data))
487 if (umcs7840_set_baudrate(sc, pn, 9600))
491 /* Finally enable all interrupts -- documented */
493 * Copied from vendor driver, I don't know why we should read LCR
496 if (umcs7840_get_UART_reg_sync(sc, pn, MCS7840_UART_REG_LCR, &sc->sc_ports[pn].sc_lcr))
498 if (umcs7840_set_UART_reg_sync(sc, pn, MCS7840_UART_REG_IER,
499 MCS7840_UART_IER_RXSTAT | MCS7840_UART_IER_MODEM))
503 if (umcs7840_get_reg_sync(sc, umcs7840_port_registers[pn].reg_control, &data))
505 data &= ~MCS7840_DEV_CONTROLx_RX_DISABLE;
506 if (umcs7840_set_reg_sync(sc, umcs7840_port_registers[pn].reg_control, data))
510 if (umcs7840_get_UART_reg_sync(sc, pn, MCS7840_UART_REG_LSR, &sc->sc_ports[pn].sc_lsr))
512 if (umcs7840_get_UART_reg_sync(sc, pn, MCS7840_UART_REG_MSR, &sc->sc_ports[pn].sc_msr))
514 DPRINTF("Port %d has been opened, LSR=%02x MSR=%02x\n", pn, sc->sc_ports[pn].sc_lsr, sc->sc_ports[pn].sc_msr);
518 umcs7840_cfg_close(struct ucom_softc *ucom)
520 struct umcs7840_softc *sc = ucom->sc_parent;
521 uint16_t pn = ucom->sc_portno;
524 umcs7840_stop_read(ucom);
525 umcs7840_stop_write(ucom);
527 umcs7840_set_UART_reg_sync(sc, pn, MCS7840_UART_REG_MCR, 0);
528 umcs7840_set_UART_reg_sync(sc, pn, MCS7840_UART_REG_IER, 0);
531 if (umcs7840_get_reg_sync(sc, umcs7840_port_registers[pn].reg_control, &data))
533 data |= MCS7840_DEV_CONTROLx_RX_DISABLE;
534 if (umcs7840_set_reg_sync(sc, umcs7840_port_registers[pn].reg_control, data))
536 DPRINTF("Port %d has been closed\n", pn);
540 umcs7840_cfg_set_dtr(struct ucom_softc *ucom, uint8_t onoff)
542 struct umcs7840_softc *sc = ucom->sc_parent;
543 uint8_t pn = ucom->sc_portno;
546 sc->sc_ports[pn].sc_mcr |= MCS7840_UART_MCR_DTR;
548 sc->sc_ports[pn].sc_mcr &= ~MCS7840_UART_MCR_DTR;
550 umcs7840_set_UART_reg_sync(sc, pn, MCS7840_UART_REG_MCR, sc->sc_ports[pn].sc_mcr);
551 DPRINTF("Port %d DTR set to: %s\n", pn, onoff ? "on" : "off");
555 umcs7840_cfg_set_rts(struct ucom_softc *ucom, uint8_t onoff)
557 struct umcs7840_softc *sc = ucom->sc_parent;
558 uint8_t pn = ucom->sc_portno;
561 sc->sc_ports[pn].sc_mcr |= MCS7840_UART_MCR_RTS;
563 sc->sc_ports[pn].sc_mcr &= ~MCS7840_UART_MCR_RTS;
565 umcs7840_set_UART_reg_sync(sc, pn, MCS7840_UART_REG_MCR, sc->sc_ports[pn].sc_mcr);
566 DPRINTF("Port %d RTS set to: %s\n", pn, onoff ? "on" : "off");
570 umcs7840_cfg_set_break(struct ucom_softc *ucom, uint8_t onoff)
572 struct umcs7840_softc *sc = ucom->sc_parent;
573 uint8_t pn = ucom->sc_portno;
576 sc->sc_ports[pn].sc_lcr |= MCS7840_UART_LCR_BREAK;
578 sc->sc_ports[pn].sc_lcr &= ~MCS7840_UART_LCR_BREAK;
580 umcs7840_set_UART_reg_sync(sc, pn, MCS7840_UART_REG_LCR, sc->sc_ports[pn].sc_lcr);
581 DPRINTF("Port %d BREAK set to: %s\n", pn, onoff ? "on" : "off");
586 umcs7840_cfg_param(struct ucom_softc *ucom, struct termios *t)
588 struct umcs7840_softc *sc = ucom->sc_parent;
589 uint8_t pn = ucom->sc_portno;
590 uint8_t lcr = sc->sc_ports[pn].sc_lcr;
591 uint8_t mcr = sc->sc_ports[pn].sc_mcr;
593 DPRINTF("Port %d config:\n", pn);
594 if (t->c_cflag & CSTOPB) {
595 DPRINTF(" 2 stop bits\n");
596 lcr |= MCS7840_UART_LCR_STOPB2;
598 lcr |= MCS7840_UART_LCR_STOPB1;
599 DPRINTF(" 1 stop bit\n");
602 lcr &= ~MCS7840_UART_LCR_PARITYMASK;
603 if (t->c_cflag & PARENB) {
604 lcr |= MCS7840_UART_LCR_PARITYON;
605 if (t->c_cflag & PARODD) {
606 lcr = MCS7840_UART_LCR_PARITYODD;
607 DPRINTF(" parity on - odd\n");
609 lcr = MCS7840_UART_LCR_PARITYEVEN;
610 DPRINTF(" parity on - even\n");
613 lcr &= ~MCS7840_UART_LCR_PARITYON;
614 DPRINTF(" parity off\n");
617 lcr &= ~MCS7840_UART_LCR_DATALENMASK;
618 switch (t->c_cflag & CSIZE) {
620 lcr |= MCS7840_UART_LCR_DATALEN5;
624 lcr |= MCS7840_UART_LCR_DATALEN6;
628 lcr |= MCS7840_UART_LCR_DATALEN7;
632 lcr |= MCS7840_UART_LCR_DATALEN8;
637 if (t->c_cflag & CRTSCTS) {
638 mcr |= MCS7840_UART_MCR_CTSRTS;
639 DPRINTF(" CTS/RTS\n");
641 mcr &= ~MCS7840_UART_MCR_CTSRTS;
643 if (t->c_cflag & (CDTR_IFLOW | CDSR_OFLOW)) {
644 mcr |= MCS7840_UART_MCR_DTRDSR;
645 DPRINTF(" DTR/DSR\n");
647 mcr &= ~MCS7840_UART_MCR_DTRDSR;
649 sc->sc_ports[pn].sc_lcr = lcr;
650 umcs7840_set_UART_reg_sync(sc, pn, MCS7840_UART_REG_LCR, sc->sc_ports[pn].sc_lcr);
651 DPRINTF("Port %d LCR=%02x\n", pn, sc->sc_ports[pn].sc_lcr);
653 sc->sc_ports[pn].sc_mcr = mcr;
654 umcs7840_set_UART_reg_sync(sc, pn, MCS7840_UART_REG_MCR, sc->sc_ports[pn].sc_mcr);
655 DPRINTF("Port %d MCR=%02x\n", pn, sc->sc_ports[pn].sc_mcr);
657 umcs7840_set_baudrate(sc, pn, t->c_ospeed);
662 umcs7840_pre_param(struct ucom_softc *ucom, struct termios *t)
667 if (umcs7840_calc_baudrate(t->c_ospeed, &divisor, &clk) || !divisor)
673 umcs7840_start_read(struct ucom_softc *ucom)
675 struct umcs7840_softc *sc = ucom->sc_parent;
676 uint8_t pn = ucom->sc_portno;
678 /* Start interrupt transfer */
679 usbd_transfer_start(sc->sc_intr_xfer);
681 /* Start read transfer */
682 usbd_transfer_start(sc->sc_ports[pn].sc_xfer[UMCS7840_BULK_RD_EP]);
686 umcs7840_stop_read(struct ucom_softc *ucom)
688 struct umcs7840_softc *sc = ucom->sc_parent;
689 uint8_t pn = ucom->sc_portno;
691 /* Stop read transfer */
692 usbd_transfer_stop(sc->sc_ports[pn].sc_xfer[UMCS7840_BULK_RD_EP]);
696 umcs7840_start_write(struct ucom_softc *ucom)
698 struct umcs7840_softc *sc = ucom->sc_parent;
699 uint8_t pn = ucom->sc_portno;
701 /* Start interrupt transfer */
702 usbd_transfer_start(sc->sc_intr_xfer);
704 /* Start write transfer */
705 usbd_transfer_start(sc->sc_ports[pn].sc_xfer[UMCS7840_BULK_WR_EP]);
709 umcs7840_stop_write(struct ucom_softc *ucom)
711 struct umcs7840_softc *sc = ucom->sc_parent;
712 uint8_t pn = ucom->sc_portno;
714 /* Stop write transfer */
715 usbd_transfer_stop(sc->sc_ports[pn].sc_xfer[UMCS7840_BULK_WR_EP]);
719 umcs7840_cfg_get_status(struct ucom_softc *ucom, uint8_t *lsr, uint8_t *msr)
721 struct umcs7840_softc *sc = ucom->sc_parent;
723 *lsr = sc->sc_ports[ucom->sc_portno].sc_lsr;
724 *msr = sc->sc_ports[ucom->sc_portno].sc_msr;
725 DPRINTF("Port %d status: LSR=%02x MSR=%02x\n", ucom->sc_portno, *lsr, *msr);
729 umcs7840_intr_callback(struct usb_xfer *xfer, usb_error_t error)
731 struct umcs7840_softc *sc = usbd_xfer_softc(xfer);
732 struct usb_page_cache *pc;
737 usbd_xfer_status(xfer, &actlen, NULL, NULL, NULL);
739 switch (USB_GET_STATE(xfer)) {
740 case USB_ST_TRANSFERRED:
741 if (actlen == 5 || actlen == 13) {
742 pc = usbd_xfer_get_frame(xfer, 0);
743 usbd_copy_out(pc, 0, buf, actlen);
744 /* Check status of all ports */
745 for (subunit = 0; subunit < sc->sc_numports; ++subunit) {
746 uint8_t pn = sc->sc_ucom[subunit].sc_portno;
748 if (buf[pn] & MCS7840_UART_ISR_NOPENDING)
750 DPRINTF("Port %d has pending interrupt: %02x (FIFO: %02x)\n", pn, buf[pn] & MCS7840_UART_ISR_INTMASK, buf[pn] & (~MCS7840_UART_ISR_INTMASK));
751 switch (buf[pn] & MCS7840_UART_ISR_INTMASK) {
752 case MCS7840_UART_ISR_RXERR:
753 case MCS7840_UART_ISR_RXHASDATA:
754 case MCS7840_UART_ISR_RXTIMEOUT:
756 if (umcs7840_get_UART_reg_sync(sc, pn, MCS7840_UART_REG_LSR, &sc->sc_ports[pn].sc_lsr))
757 break; /* Inner switch */
758 ucom_status_change(&sc->sc_ucom[subunit]);
761 case MCS7840_UART_ISR_TXEMPTY:
763 break; /* Inner switch */
764 case MCS7840_UART_ISR_MSCHANGE:
766 if (umcs7840_get_UART_reg_sync(sc, pn, MCS7840_UART_REG_MSR, &sc->sc_ports[pn].sc_msr))
767 break; /* Inner switch */
768 DPRINTF("Port %d: new MSR %02x\n", pn, sc->sc_ports[pn].sc_msr);
769 ucom_status_change(&sc->sc_ucom[subunit]);
774 device_printf(sc->sc_dev, "Invalid interrupt data length %d", actlen);
778 usbd_xfer_set_frame_len(xfer, 0, usbd_xfer_max_len(xfer));
779 usbd_transfer_submit(xfer);
783 if (error != USB_ERR_CANCELLED) {
784 /* try to clear stall first */
785 usbd_xfer_set_stall(xfer);
793 umcs7840_read_callback1(struct usb_xfer *xfer, usb_error_t error)
795 umcs7840_read_callbackN(xfer, error, 0);
799 umcs7840_read_callback2(struct usb_xfer *xfer, usb_error_t error)
801 umcs7840_read_callbackN(xfer, error, 1);
804 umcs7840_read_callback3(struct usb_xfer *xfer, usb_error_t error)
806 umcs7840_read_callbackN(xfer, error, 2);
810 umcs7840_read_callback4(struct usb_xfer *xfer, usb_error_t error)
812 umcs7840_read_callbackN(xfer, error, 3);
816 umcs7840_read_callbackN(struct usb_xfer *xfer, usb_error_t error, uint8_t subunit)
818 struct umcs7840_softc *sc = usbd_xfer_softc(xfer);
819 struct ucom_softc *ucom = &sc->sc_ucom[subunit];
820 struct usb_page_cache *pc;
823 usbd_xfer_status(xfer, &actlen, NULL, NULL, NULL);
825 DPRINTF("Port %d read, state = %d, data length = %d\n", ucom->sc_portno, USB_GET_STATE(xfer), actlen);
827 switch (USB_GET_STATE(xfer)) {
828 case USB_ST_TRANSFERRED:
829 pc = usbd_xfer_get_frame(xfer, 0);
830 ucom_put_data(ucom, pc, 0, actlen);
834 usbd_xfer_set_frame_len(xfer, 0, usbd_xfer_max_len(xfer));
835 usbd_transfer_submit(xfer);
839 if (error != USB_ERR_CANCELLED) {
840 /* try to clear stall first */
841 usbd_xfer_set_stall(xfer);
849 umcs7840_write_callback1(struct usb_xfer *xfer, usb_error_t error)
851 umcs7840_write_callbackN(xfer, error, 0);
855 umcs7840_write_callback2(struct usb_xfer *xfer, usb_error_t error)
857 umcs7840_write_callbackN(xfer, error, 1);
861 umcs7840_write_callback3(struct usb_xfer *xfer, usb_error_t error)
863 umcs7840_write_callbackN(xfer, error, 2);
867 umcs7840_write_callback4(struct usb_xfer *xfer, usb_error_t error)
869 umcs7840_write_callbackN(xfer, error, 3);
873 umcs7840_write_callbackN(struct usb_xfer *xfer, usb_error_t error, uint8_t subunit)
875 struct umcs7840_softc *sc = usbd_xfer_softc(xfer);
876 struct ucom_softc *ucom = &sc->sc_ucom[subunit];
877 struct usb_page_cache *pc;
880 DPRINTF("Port %d write, state = %d\n", ucom->sc_portno, USB_GET_STATE(xfer));
882 switch (USB_GET_STATE(xfer)) {
884 case USB_ST_TRANSFERRED:
886 pc = usbd_xfer_get_frame(xfer, 0);
887 if (ucom_get_data(ucom, pc, 0, usbd_xfer_max_len(xfer), &actlen)) {
888 DPRINTF("Port %d write, has %d bytes\n", ucom->sc_portno, actlen);
889 usbd_xfer_set_frame_len(xfer, 0, actlen);
890 usbd_transfer_submit(xfer);
895 if (error != USB_ERR_CANCELLED) {
896 /* try to clear stall first */
897 usbd_xfer_set_stall(xfer);
905 umcs7840_poll(struct ucom_softc *ucom)
907 struct umcs7840_softc *sc = ucom->sc_parent;
909 DPRINTF("Port %d poll\n", ucom->sc_portno);
910 usbd_transfer_poll(sc->sc_ports[ucom->sc_portno].sc_xfer, UMCS7840_N_TRANSFERS);
911 usbd_transfer_poll(&sc->sc_intr_xfer, 1);
915 umcs7840_get_reg_sync(struct umcs7840_softc *sc, uint8_t reg, uint8_t *data)
917 struct usb_device_request req;
921 req.bmRequestType = UT_READ_VENDOR_DEVICE;
922 req.bRequest = MCS7840_RDREQ;
923 USETW(req.wValue, 0);
924 USETW(req.wIndex, reg);
925 USETW(req.wLength, UMCS7840_READ_LENGTH);
927 err = usbd_do_request_proc(sc->sc_udev, &sc->sc_super_ucom.sc_tq, &req, (void *)data, 0, &len, UMCS7840_CTRL_TIMEOUT);
928 if (err == USB_ERR_NORMAL_COMPLETION && len != 1) {
929 device_printf(sc->sc_dev, "Reading register %d failed: invalid length %d\n", reg, len);
930 return (USB_ERR_INVAL);
932 device_printf(sc->sc_dev, "Reading register %d failed: %s\n", reg, usbd_errstr(err));
937 umcs7840_set_reg_sync(struct umcs7840_softc *sc, uint8_t reg, uint8_t data)
939 struct usb_device_request req;
942 req.bmRequestType = UT_WRITE_VENDOR_DEVICE;
943 req.bRequest = MCS7840_WRREQ;
944 USETW(req.wValue, data);
945 USETW(req.wIndex, reg);
946 USETW(req.wLength, 0);
948 err = usbd_do_request_proc(sc->sc_udev, &sc->sc_super_ucom.sc_tq, &req, NULL, 0, NULL, UMCS7840_CTRL_TIMEOUT);
950 device_printf(sc->sc_dev, "Writing register %d failed: %s\n", reg, usbd_errstr(err));
956 umcs7840_get_UART_reg_sync(struct umcs7840_softc *sc, uint8_t portno, uint8_t reg, uint8_t *data)
958 struct usb_device_request req;
963 /* portno is port number */
964 wVal = ((uint16_t)(portno + 1)) << 8;
966 req.bmRequestType = UT_READ_VENDOR_DEVICE;
967 req.bRequest = MCS7840_RDREQ;
968 USETW(req.wValue, wVal);
969 USETW(req.wIndex, reg);
970 USETW(req.wLength, UMCS7840_READ_LENGTH);
972 err = usbd_do_request_proc(sc->sc_udev, &sc->sc_super_ucom.sc_tq, &req, (void *)data, 0, &len, UMCS7840_CTRL_TIMEOUT);
973 if (err == USB_ERR_NORMAL_COMPLETION && len != 1) {
974 device_printf(sc->sc_dev, "Reading UART%d register %d failed: invalid length %d\n", portno, reg, len);
975 return (USB_ERR_INVAL);
977 device_printf(sc->sc_dev, "Reading UART%d register %d failed: %s\n", portno, reg, usbd_errstr(err));
982 umcs7840_set_UART_reg_sync(struct umcs7840_softc *sc, uint8_t portno, uint8_t reg, uint8_t data)
984 struct usb_device_request req;
988 /* portno is port number */
989 wVal = ((uint16_t)(portno + 1)) << 8 | data;
991 req.bmRequestType = UT_WRITE_VENDOR_DEVICE;
992 req.bRequest = MCS7840_WRREQ;
993 USETW(req.wValue, wVal);
994 USETW(req.wIndex, reg);
995 USETW(req.wLength, 0);
997 err = usbd_do_request_proc(sc->sc_udev, &sc->sc_super_ucom.sc_tq, &req, NULL, 0, NULL, UMCS7840_CTRL_TIMEOUT);
999 device_printf(sc->sc_dev, "Writing UART%d register %d failed: %s\n", portno, reg, usbd_errstr(err));
1004 umcs7840_set_baudrate(struct umcs7840_softc *sc, uint8_t portno, uint32_t rate)
1011 if (umcs7840_calc_baudrate(rate, &divisor, &clk)) {
1012 DPRINTF("Port %d bad speed: %d\n", portno, rate);
1015 if (divisor == 0 || (clk & MCS7840_DEV_SPx_CLOCK_MASK) != clk) {
1016 DPRINTF("Port %d bad speed calculation: %d\n", portno, rate);
1019 DPRINTF("Port %d set speed: %d (%02x / %d)\n", portno, rate, clk, divisor);
1021 /* Set clock source for standard BAUD frequencies */
1022 err = umcs7840_get_reg_sync(sc, umcs7840_port_registers[portno].reg_sp, &data);
1025 data &= MCS7840_DEV_SPx_CLOCK_MASK;
1027 err = umcs7840_set_reg_sync(sc, umcs7840_port_registers[portno].reg_sp, data);
1032 sc->sc_ports[portno].sc_lcr |= MCS7840_UART_LCR_DIVISORS;
1033 err = umcs7840_set_UART_reg_sync(sc, portno, MCS7840_UART_REG_LCR, sc->sc_ports[portno].sc_lcr);
1037 err = umcs7840_set_UART_reg_sync(sc, portno, MCS7840_UART_REG_DLL, (uint8_t)(divisor & 0xff));
1040 err = umcs7840_set_UART_reg_sync(sc, portno, MCS7840_UART_REG_DLM, (uint8_t)((divisor >> 8) & 0xff));
1044 /* Turn off access to DLL/DLM registers of UART */
1045 sc->sc_ports[portno].sc_lcr &= ~MCS7840_UART_LCR_DIVISORS;
1046 err = umcs7840_set_UART_reg_sync(sc, portno, MCS7840_UART_REG_LCR, sc->sc_ports[portno].sc_lcr);
1052 /* Maximum speeds for standard frequencies, when PLL is not used */
1053 static const uint32_t umcs7840_baudrate_divisors[] = {0, 115200, 230400, 403200, 460800, 806400, 921600, 1572864, 3145728,};
1054 static const uint8_t umcs7840_baudrate_divisors_len = NELEM(umcs7840_baudrate_divisors);
1057 umcs7840_calc_baudrate(uint32_t rate, uint16_t *divisor, uint8_t *clk)
1061 if (rate > umcs7840_baudrate_divisors[umcs7840_baudrate_divisors_len - 1])
1064 for (i = 0; i < umcs7840_baudrate_divisors_len - 1 &&
1065 !(rate > umcs7840_baudrate_divisors[i] && rate <= umcs7840_baudrate_divisors[i + 1]); ++i);
1066 *divisor = umcs7840_baudrate_divisors[i + 1] / rate;
1068 *clk = i << MCS7840_DEV_SPx_CLOCK_SHIFT;