1 /******************************************************************************
3 Copyright (c) 2001-2014, Intel Corporation
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7 modification, are permitted provided that the following conditions are met:
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32 ******************************************************************************/
35 #include "ixgbe_api.h"
36 #include "ixgbe_common.h"
39 * ixgbe_dcb_get_rtrup2tc - read rtrup2tc reg
40 * @hw: pointer to hardware structure
41 * @map: pointer to u8 arr for returning map
43 * Read the rtrup2tc HW register and resolve its content into map
45 void ixgbe_dcb_get_rtrup2tc(struct ixgbe_hw *hw, u8 *map)
47 if (hw->mac.ops.get_rtrup2tc)
48 hw->mac.ops.get_rtrup2tc(hw, map);
52 * ixgbe_init_shared_code - Initialize the shared code
53 * @hw: pointer to hardware structure
55 * This will assign function pointers and assign the MAC type and PHY code.
56 * Does not touch the hardware. This function must be called prior to any
57 * other function in the shared code. The ixgbe_hw structure should be
58 * memset to 0 prior to calling this function. The following fields in
59 * hw structure should be filled in prior to calling this function:
60 * hw_addr, back, device_id, vendor_id, subsystem_device_id,
61 * subsystem_vendor_id, and revision_id
63 s32 ixgbe_init_shared_code(struct ixgbe_hw *hw)
67 DEBUGFUNC("ixgbe_init_shared_code");
72 ixgbe_set_mac_type(hw);
74 switch (hw->mac.type) {
75 case ixgbe_mac_82598EB:
76 status = ixgbe_init_ops_82598(hw);
78 case ixgbe_mac_82599EB:
79 status = ixgbe_init_ops_82599(hw);
82 status = ixgbe_init_ops_X540(hw);
85 status = ixgbe_init_ops_X550(hw);
87 case ixgbe_mac_X550EM_x:
88 case ixgbe_mac_X550EM_a:
89 status = ixgbe_init_ops_X550EM(hw);
91 case ixgbe_mac_82599_vf:
92 case ixgbe_mac_X540_vf:
93 case ixgbe_mac_X550_vf:
94 case ixgbe_mac_X550EM_x_vf:
95 case ixgbe_mac_X550EM_a_vf:
96 status = ixgbe_init_ops_vf(hw);
99 status = IXGBE_ERR_DEVICE_NOT_SUPPORTED;
107 * ixgbe_set_mac_type - Sets MAC type
108 * @hw: pointer to the HW structure
110 * This function sets the mac type of the adapter based on the
111 * vendor ID and device ID stored in the hw structure.
113 s32 ixgbe_set_mac_type(struct ixgbe_hw *hw)
115 s32 ret_val = IXGBE_SUCCESS;
117 DEBUGFUNC("ixgbe_set_mac_type\n");
119 if (hw->vendor_id != IXGBE_INTEL_VENDOR_ID) {
120 ERROR_REPORT2(IXGBE_ERROR_UNSUPPORTED,
121 "Unsupported vendor id: %x", hw->vendor_id);
122 return IXGBE_ERR_DEVICE_NOT_SUPPORTED;
125 switch (hw->device_id) {
126 case IXGBE_DEV_ID_82598:
127 case IXGBE_DEV_ID_82598_BX:
128 case IXGBE_DEV_ID_82598AF_SINGLE_PORT:
129 case IXGBE_DEV_ID_82598AF_DUAL_PORT:
130 case IXGBE_DEV_ID_82598AT:
131 case IXGBE_DEV_ID_82598AT2:
132 case IXGBE_DEV_ID_82598EB_CX4:
133 case IXGBE_DEV_ID_82598_CX4_DUAL_PORT:
134 case IXGBE_DEV_ID_82598_DA_DUAL_PORT:
135 case IXGBE_DEV_ID_82598_SR_DUAL_PORT_EM:
136 case IXGBE_DEV_ID_82598EB_XF_LR:
137 case IXGBE_DEV_ID_82598EB_SFP_LOM:
138 hw->mac.type = ixgbe_mac_82598EB;
140 case IXGBE_DEV_ID_82599_KX4:
141 case IXGBE_DEV_ID_82599_KX4_MEZZ:
142 case IXGBE_DEV_ID_82599_XAUI_LOM:
143 case IXGBE_DEV_ID_82599_COMBO_BACKPLANE:
144 case IXGBE_DEV_ID_82599_KR:
145 case IXGBE_DEV_ID_82599_SFP:
146 case IXGBE_DEV_ID_82599_BACKPLANE_FCOE:
147 case IXGBE_DEV_ID_82599_SFP_FCOE:
148 case IXGBE_DEV_ID_82599_SFP_EM:
149 case IXGBE_DEV_ID_82599_SFP_SF2:
150 case IXGBE_DEV_ID_82599_SFP_SF_QP:
151 case IXGBE_DEV_ID_82599_QSFP_SF_QP:
152 case IXGBE_DEV_ID_82599EN_SFP:
153 case IXGBE_DEV_ID_82599_CX4:
154 case IXGBE_DEV_ID_82599_BYPASS:
155 case IXGBE_DEV_ID_82599_T3_LOM:
156 hw->mac.type = ixgbe_mac_82599EB;
158 case IXGBE_DEV_ID_82599_VF:
159 case IXGBE_DEV_ID_82599_VF_HV:
160 hw->mac.type = ixgbe_mac_82599_vf;
162 case IXGBE_DEV_ID_X540_VF:
163 case IXGBE_DEV_ID_X540_VF_HV:
164 hw->mac.type = ixgbe_mac_X540_vf;
166 case IXGBE_DEV_ID_X540T:
167 case IXGBE_DEV_ID_X540T1:
168 case IXGBE_DEV_ID_X540_BYPASS:
169 hw->mac.type = ixgbe_mac_X540;
171 case IXGBE_DEV_ID_X550T:
172 hw->mac.type = ixgbe_mac_X550;
174 case IXGBE_DEV_ID_X550EM_X_KX4:
175 case IXGBE_DEV_ID_X550EM_X_KR:
176 case IXGBE_DEV_ID_X550EM_X_10G_T:
177 case IXGBE_DEV_ID_X550EM_X_1G_T:
178 case IXGBE_DEV_ID_X550EM_X_SFP:
179 hw->mac.type = ixgbe_mac_X550EM_x;
181 case IXGBE_DEV_ID_X550EM_A_KR:
182 case IXGBE_DEV_ID_X550EM_A_KR_L:
183 case IXGBE_DEV_ID_X550EM_A_SFP_N:
184 case IXGBE_DEV_ID_X550EM_A_1G_T:
185 case IXGBE_DEV_ID_X550EM_A_1G_T_L:
186 case IXGBE_DEV_ID_X550EM_A_10G_T:
187 case IXGBE_DEV_ID_X550EM_A_QSFP:
188 case IXGBE_DEV_ID_X550EM_A_QSFP_N:
189 case IXGBE_DEV_ID_X550EM_A_SFP:
190 hw->mac.type = ixgbe_mac_X550EM_a;
192 case IXGBE_DEV_ID_X550_VF:
193 case IXGBE_DEV_ID_X550_VF_HV:
194 hw->mac.type = ixgbe_mac_X550_vf;
196 case IXGBE_DEV_ID_X550EM_X_VF:
197 case IXGBE_DEV_ID_X550EM_X_VF_HV:
198 hw->mac.type = ixgbe_mac_X550EM_x_vf;
200 case IXGBE_DEV_ID_X550EM_A_VF:
201 case IXGBE_DEV_ID_X550EM_A_VF_HV:
202 hw->mac.type = ixgbe_mac_X550EM_a_vf;
205 ret_val = IXGBE_ERR_DEVICE_NOT_SUPPORTED;
206 ERROR_REPORT2(IXGBE_ERROR_UNSUPPORTED,
207 "Unsupported device id: %x",
212 DEBUGOUT2("ixgbe_set_mac_type found mac: %d, returns: %d\n",
213 hw->mac.type, ret_val);
218 * ixgbe_init_hw - Initialize the hardware
219 * @hw: pointer to hardware structure
221 * Initialize the hardware by resetting and then starting the hardware
223 s32 ixgbe_init_hw(struct ixgbe_hw *hw)
225 return ixgbe_call_func(hw, hw->mac.ops.init_hw, (hw),
226 IXGBE_NOT_IMPLEMENTED);
230 * ixgbe_reset_hw - Performs a hardware reset
231 * @hw: pointer to hardware structure
233 * Resets the hardware by resetting the transmit and receive units, masks and
234 * clears all interrupts, performs a PHY reset, and performs a MAC reset
236 s32 ixgbe_reset_hw(struct ixgbe_hw *hw)
238 return ixgbe_call_func(hw, hw->mac.ops.reset_hw, (hw),
239 IXGBE_NOT_IMPLEMENTED);
243 * ixgbe_start_hw - Prepares hardware for Rx/Tx
244 * @hw: pointer to hardware structure
246 * Starts the hardware by filling the bus info structure and media type,
247 * clears all on chip counters, initializes receive address registers,
248 * multicast table, VLAN filter table, calls routine to setup link and
249 * flow control settings, and leaves transmit and receive units disabled
252 s32 ixgbe_start_hw(struct ixgbe_hw *hw)
254 return ixgbe_call_func(hw, hw->mac.ops.start_hw, (hw),
255 IXGBE_NOT_IMPLEMENTED);
259 * ixgbe_enable_relaxed_ordering - Enables tx relaxed ordering,
260 * which is disabled by default in ixgbe_start_hw();
262 * @hw: pointer to hardware structure
264 * Enable relaxed ordering;
266 void ixgbe_enable_relaxed_ordering(struct ixgbe_hw *hw)
268 if (hw->mac.ops.enable_relaxed_ordering)
269 hw->mac.ops.enable_relaxed_ordering(hw);
273 * ixgbe_clear_hw_cntrs - Clear hardware counters
274 * @hw: pointer to hardware structure
276 * Clears all hardware statistics counters by reading them from the hardware
277 * Statistics counters are clear on read.
279 s32 ixgbe_clear_hw_cntrs(struct ixgbe_hw *hw)
281 return ixgbe_call_func(hw, hw->mac.ops.clear_hw_cntrs, (hw),
282 IXGBE_NOT_IMPLEMENTED);
286 * ixgbe_get_media_type - Get media type
287 * @hw: pointer to hardware structure
289 * Returns the media type (fiber, copper, backplane)
291 enum ixgbe_media_type ixgbe_get_media_type(struct ixgbe_hw *hw)
293 return ixgbe_call_func(hw, hw->mac.ops.get_media_type, (hw),
294 ixgbe_media_type_unknown);
298 * ixgbe_get_mac_addr - Get MAC address
299 * @hw: pointer to hardware structure
300 * @mac_addr: Adapter MAC address
302 * Reads the adapter's MAC address from the first Receive Address Register
303 * (RAR0) A reset of the adapter must have been performed prior to calling
304 * this function in order for the MAC address to have been loaded from the
307 s32 ixgbe_get_mac_addr(struct ixgbe_hw *hw, u8 *mac_addr)
309 return ixgbe_call_func(hw, hw->mac.ops.get_mac_addr,
310 (hw, mac_addr), IXGBE_NOT_IMPLEMENTED);
314 * ixgbe_get_san_mac_addr - Get SAN MAC address
315 * @hw: pointer to hardware structure
316 * @san_mac_addr: SAN MAC address
318 * Reads the SAN MAC address from the EEPROM, if it's available. This is
319 * per-port, so set_lan_id() must be called before reading the addresses.
321 s32 ixgbe_get_san_mac_addr(struct ixgbe_hw *hw, u8 *san_mac_addr)
323 return ixgbe_call_func(hw, hw->mac.ops.get_san_mac_addr,
324 (hw, san_mac_addr), IXGBE_NOT_IMPLEMENTED);
328 * ixgbe_set_san_mac_addr - Write a SAN MAC address
329 * @hw: pointer to hardware structure
330 * @san_mac_addr: SAN MAC address
332 * Writes A SAN MAC address to the EEPROM.
334 s32 ixgbe_set_san_mac_addr(struct ixgbe_hw *hw, u8 *san_mac_addr)
336 return ixgbe_call_func(hw, hw->mac.ops.set_san_mac_addr,
337 (hw, san_mac_addr), IXGBE_NOT_IMPLEMENTED);
341 * ixgbe_get_device_caps - Get additional device capabilities
342 * @hw: pointer to hardware structure
343 * @device_caps: the EEPROM word for device capabilities
345 * Reads the extra device capabilities from the EEPROM
347 s32 ixgbe_get_device_caps(struct ixgbe_hw *hw, u16 *device_caps)
349 return ixgbe_call_func(hw, hw->mac.ops.get_device_caps,
350 (hw, device_caps), IXGBE_NOT_IMPLEMENTED);
354 * ixgbe_get_wwn_prefix - Get alternative WWNN/WWPN prefix from the EEPROM
355 * @hw: pointer to hardware structure
356 * @wwnn_prefix: the alternative WWNN prefix
357 * @wwpn_prefix: the alternative WWPN prefix
359 * This function will read the EEPROM from the alternative SAN MAC address
360 * block to check the support for the alternative WWNN/WWPN prefix support.
362 s32 ixgbe_get_wwn_prefix(struct ixgbe_hw *hw, u16 *wwnn_prefix,
365 return ixgbe_call_func(hw, hw->mac.ops.get_wwn_prefix,
366 (hw, wwnn_prefix, wwpn_prefix),
367 IXGBE_NOT_IMPLEMENTED);
371 * ixgbe_get_fcoe_boot_status - Get FCOE boot status from EEPROM
372 * @hw: pointer to hardware structure
373 * @bs: the fcoe boot status
375 * This function will read the FCOE boot status from the iSCSI FCOE block
377 s32 ixgbe_get_fcoe_boot_status(struct ixgbe_hw *hw, u16 *bs)
379 return ixgbe_call_func(hw, hw->mac.ops.get_fcoe_boot_status,
381 IXGBE_NOT_IMPLEMENTED);
385 * ixgbe_get_bus_info - Set PCI bus info
386 * @hw: pointer to hardware structure
388 * Sets the PCI bus info (speed, width, type) within the ixgbe_hw structure
390 s32 ixgbe_get_bus_info(struct ixgbe_hw *hw)
392 return ixgbe_call_func(hw, hw->mac.ops.get_bus_info, (hw),
393 IXGBE_NOT_IMPLEMENTED);
397 * ixgbe_get_num_of_tx_queues - Get Tx queues
398 * @hw: pointer to hardware structure
400 * Returns the number of transmit queues for the given adapter.
402 u32 ixgbe_get_num_of_tx_queues(struct ixgbe_hw *hw)
404 return hw->mac.max_tx_queues;
408 * ixgbe_get_num_of_rx_queues - Get Rx queues
409 * @hw: pointer to hardware structure
411 * Returns the number of receive queues for the given adapter.
413 u32 ixgbe_get_num_of_rx_queues(struct ixgbe_hw *hw)
415 return hw->mac.max_rx_queues;
419 * ixgbe_stop_adapter - Disable Rx/Tx units
420 * @hw: pointer to hardware structure
422 * Sets the adapter_stopped flag within ixgbe_hw struct. Clears interrupts,
423 * disables transmit and receive units. The adapter_stopped flag is used by
424 * the shared code and drivers to determine if the adapter is in a stopped
425 * state and should not touch the hardware.
427 s32 ixgbe_stop_adapter(struct ixgbe_hw *hw)
429 return ixgbe_call_func(hw, hw->mac.ops.stop_adapter, (hw),
430 IXGBE_NOT_IMPLEMENTED);
434 * ixgbe_read_pba_string - Reads part number string from EEPROM
435 * @hw: pointer to hardware structure
436 * @pba_num: stores the part number string from the EEPROM
437 * @pba_num_size: part number string buffer length
439 * Reads the part number string from the EEPROM.
441 s32 ixgbe_read_pba_string(struct ixgbe_hw *hw, u8 *pba_num, u32 pba_num_size)
443 return ixgbe_read_pba_string_generic(hw, pba_num, pba_num_size);
447 * ixgbe_read_pba_num - Reads part number from EEPROM
448 * @hw: pointer to hardware structure
449 * @pba_num: stores the part number from the EEPROM
451 * Reads the part number from the EEPROM.
453 s32 ixgbe_read_pba_num(struct ixgbe_hw *hw, u32 *pba_num)
455 return ixgbe_read_pba_num_generic(hw, pba_num);
459 * ixgbe_identify_phy - Get PHY type
460 * @hw: pointer to hardware structure
462 * Determines the physical layer module found on the current adapter.
464 s32 ixgbe_identify_phy(struct ixgbe_hw *hw)
466 s32 status = IXGBE_SUCCESS;
468 if (hw->phy.type == ixgbe_phy_unknown) {
469 status = ixgbe_call_func(hw, hw->phy.ops.identify, (hw),
470 IXGBE_NOT_IMPLEMENTED);
477 * ixgbe_reset_phy - Perform a PHY reset
478 * @hw: pointer to hardware structure
480 s32 ixgbe_reset_phy(struct ixgbe_hw *hw)
482 s32 status = IXGBE_SUCCESS;
484 if (hw->phy.type == ixgbe_phy_unknown) {
485 if (ixgbe_identify_phy(hw) != IXGBE_SUCCESS)
486 status = IXGBE_ERR_PHY;
489 if (status == IXGBE_SUCCESS) {
490 status = ixgbe_call_func(hw, hw->phy.ops.reset, (hw),
491 IXGBE_NOT_IMPLEMENTED);
497 * ixgbe_get_phy_firmware_version -
498 * @hw: pointer to hardware structure
499 * @firmware_version: pointer to firmware version
501 s32 ixgbe_get_phy_firmware_version(struct ixgbe_hw *hw, u16 *firmware_version)
503 s32 status = IXGBE_SUCCESS;
505 status = ixgbe_call_func(hw, hw->phy.ops.get_firmware_version,
506 (hw, firmware_version),
507 IXGBE_NOT_IMPLEMENTED);
512 * ixgbe_read_phy_reg - Read PHY register
513 * @hw: pointer to hardware structure
514 * @reg_addr: 32 bit address of PHY register to read
515 * @phy_data: Pointer to read data from PHY register
517 * Reads a value from a specified PHY register
519 s32 ixgbe_read_phy_reg(struct ixgbe_hw *hw, u32 reg_addr, u32 device_type,
523 ixgbe_identify_phy(hw);
525 return ixgbe_call_func(hw, hw->phy.ops.read_reg, (hw, reg_addr,
526 device_type, phy_data), IXGBE_NOT_IMPLEMENTED);
530 * ixgbe_write_phy_reg - Write PHY register
531 * @hw: pointer to hardware structure
532 * @reg_addr: 32 bit PHY register to write
533 * @phy_data: Data to write to the PHY register
535 * Writes a value to specified PHY register
537 s32 ixgbe_write_phy_reg(struct ixgbe_hw *hw, u32 reg_addr, u32 device_type,
541 ixgbe_identify_phy(hw);
543 return ixgbe_call_func(hw, hw->phy.ops.write_reg, (hw, reg_addr,
544 device_type, phy_data), IXGBE_NOT_IMPLEMENTED);
548 * ixgbe_setup_phy_link - Restart PHY autoneg
549 * @hw: pointer to hardware structure
551 * Restart autonegotiation and PHY and waits for completion.
553 s32 ixgbe_setup_phy_link(struct ixgbe_hw *hw)
555 return ixgbe_call_func(hw, hw->phy.ops.setup_link, (hw),
556 IXGBE_NOT_IMPLEMENTED);
560 * ixgbe_setup_internal_phy - Configure integrated PHY
561 * @hw: pointer to hardware structure
563 * Reconfigure the integrated PHY in order to enable talk to the external PHY.
564 * Returns success if not implemented, since nothing needs to be done in this
567 s32 ixgbe_setup_internal_phy(struct ixgbe_hw *hw)
569 return ixgbe_call_func(hw, hw->phy.ops.setup_internal_link, (hw),
574 * ixgbe_check_phy_link - Determine link and speed status
575 * @hw: pointer to hardware structure
577 * Reads a PHY register to determine if link is up and the current speed for
580 s32 ixgbe_check_phy_link(struct ixgbe_hw *hw, ixgbe_link_speed *speed,
583 return ixgbe_call_func(hw, hw->phy.ops.check_link, (hw, speed,
584 link_up), IXGBE_NOT_IMPLEMENTED);
588 * ixgbe_setup_phy_link_speed - Set auto advertise
589 * @hw: pointer to hardware structure
590 * @speed: new link speed
592 * Sets the auto advertised capabilities
594 s32 ixgbe_setup_phy_link_speed(struct ixgbe_hw *hw, ixgbe_link_speed speed,
595 bool autoneg_wait_to_complete)
597 return ixgbe_call_func(hw, hw->phy.ops.setup_link_speed, (hw, speed,
598 autoneg_wait_to_complete),
599 IXGBE_NOT_IMPLEMENTED);
603 * ixgbe_set_phy_power - Control the phy power state
604 * @hw: pointer to hardware structure
605 * @on: TRUE for on, FALSE for off
607 s32 ixgbe_set_phy_power(struct ixgbe_hw *hw, bool on)
609 return ixgbe_call_func(hw, hw->phy.ops.set_phy_power, (hw, on),
610 IXGBE_NOT_IMPLEMENTED);
614 * ixgbe_check_link - Get link and speed status
615 * @hw: pointer to hardware structure
617 * Reads the links register to determine if link is up and the current speed
619 s32 ixgbe_check_link(struct ixgbe_hw *hw, ixgbe_link_speed *speed,
620 bool *link_up, bool link_up_wait_to_complete)
622 return ixgbe_call_func(hw, hw->mac.ops.check_link, (hw, speed,
623 link_up, link_up_wait_to_complete),
624 IXGBE_NOT_IMPLEMENTED);
628 * ixgbe_disable_tx_laser - Disable Tx laser
629 * @hw: pointer to hardware structure
631 * If the driver needs to disable the laser on SFI optics.
633 void ixgbe_disable_tx_laser(struct ixgbe_hw *hw)
635 if (hw->mac.ops.disable_tx_laser)
636 hw->mac.ops.disable_tx_laser(hw);
640 * ixgbe_enable_tx_laser - Enable Tx laser
641 * @hw: pointer to hardware structure
643 * If the driver needs to enable the laser on SFI optics.
645 void ixgbe_enable_tx_laser(struct ixgbe_hw *hw)
647 if (hw->mac.ops.enable_tx_laser)
648 hw->mac.ops.enable_tx_laser(hw);
652 * ixgbe_flap_tx_laser - flap Tx laser to start autotry process
653 * @hw: pointer to hardware structure
655 * When the driver changes the link speeds that it can support then
656 * flap the tx laser to alert the link partner to start autotry
657 * process on its end.
659 void ixgbe_flap_tx_laser(struct ixgbe_hw *hw)
661 if (hw->mac.ops.flap_tx_laser)
662 hw->mac.ops.flap_tx_laser(hw);
666 * ixgbe_setup_link - Set link speed
667 * @hw: pointer to hardware structure
668 * @speed: new link speed
670 * Configures link settings. Restarts the link.
671 * Performs autonegotiation if needed.
673 s32 ixgbe_setup_link(struct ixgbe_hw *hw, ixgbe_link_speed speed,
674 bool autoneg_wait_to_complete)
676 return ixgbe_call_func(hw, hw->mac.ops.setup_link, (hw, speed,
677 autoneg_wait_to_complete),
678 IXGBE_NOT_IMPLEMENTED);
682 * ixgbe_setup_mac_link - Set link speed
683 * @hw: pointer to hardware structure
684 * @speed: new link speed
686 * Configures link settings. Restarts the link.
687 * Performs autonegotiation if needed.
689 s32 ixgbe_setup_mac_link(struct ixgbe_hw *hw, ixgbe_link_speed speed,
690 bool autoneg_wait_to_complete)
692 return ixgbe_call_func(hw, hw->mac.ops.setup_mac_link, (hw, speed,
693 autoneg_wait_to_complete),
694 IXGBE_NOT_IMPLEMENTED);
698 * ixgbe_get_link_capabilities - Returns link capabilities
699 * @hw: pointer to hardware structure
701 * Determines the link capabilities of the current configuration.
703 s32 ixgbe_get_link_capabilities(struct ixgbe_hw *hw, ixgbe_link_speed *speed,
706 return ixgbe_call_func(hw, hw->mac.ops.get_link_capabilities, (hw,
707 speed, autoneg), IXGBE_NOT_IMPLEMENTED);
711 * ixgbe_led_on - Turn on LEDs
712 * @hw: pointer to hardware structure
713 * @index: led number to turn on
715 * Turns on the software controllable LEDs.
717 s32 ixgbe_led_on(struct ixgbe_hw *hw, u32 index)
719 return ixgbe_call_func(hw, hw->mac.ops.led_on, (hw, index),
720 IXGBE_NOT_IMPLEMENTED);
724 * ixgbe_led_off - Turn off LEDs
725 * @hw: pointer to hardware structure
726 * @index: led number to turn off
728 * Turns off the software controllable LEDs.
730 s32 ixgbe_led_off(struct ixgbe_hw *hw, u32 index)
732 return ixgbe_call_func(hw, hw->mac.ops.led_off, (hw, index),
733 IXGBE_NOT_IMPLEMENTED);
737 * ixgbe_blink_led_start - Blink LEDs
738 * @hw: pointer to hardware structure
739 * @index: led number to blink
741 * Blink LED based on index.
743 s32 ixgbe_blink_led_start(struct ixgbe_hw *hw, u32 index)
745 return ixgbe_call_func(hw, hw->mac.ops.blink_led_start, (hw, index),
746 IXGBE_NOT_IMPLEMENTED);
750 * ixgbe_blink_led_stop - Stop blinking LEDs
751 * @hw: pointer to hardware structure
753 * Stop blinking LED based on index.
755 s32 ixgbe_blink_led_stop(struct ixgbe_hw *hw, u32 index)
757 return ixgbe_call_func(hw, hw->mac.ops.blink_led_stop, (hw, index),
758 IXGBE_NOT_IMPLEMENTED);
762 * ixgbe_init_eeprom_params - Initialize EEPROM parameters
763 * @hw: pointer to hardware structure
765 * Initializes the EEPROM parameters ixgbe_eeprom_info within the
766 * ixgbe_hw struct in order to set up EEPROM access.
768 s32 ixgbe_init_eeprom_params(struct ixgbe_hw *hw)
770 return ixgbe_call_func(hw, hw->eeprom.ops.init_params, (hw),
771 IXGBE_NOT_IMPLEMENTED);
776 * ixgbe_write_eeprom - Write word to EEPROM
777 * @hw: pointer to hardware structure
778 * @offset: offset within the EEPROM to be written to
779 * @data: 16 bit word to be written to the EEPROM
781 * Writes 16 bit value to EEPROM. If ixgbe_eeprom_update_checksum is not
782 * called after this function, the EEPROM will most likely contain an
785 s32 ixgbe_write_eeprom(struct ixgbe_hw *hw, u16 offset, u16 data)
787 return ixgbe_call_func(hw, hw->eeprom.ops.write, (hw, offset, data),
788 IXGBE_NOT_IMPLEMENTED);
792 * ixgbe_write_eeprom_buffer - Write word(s) to EEPROM
793 * @hw: pointer to hardware structure
794 * @offset: offset within the EEPROM to be written to
795 * @data: 16 bit word(s) to be written to the EEPROM
796 * @words: number of words
798 * Writes 16 bit word(s) to EEPROM. If ixgbe_eeprom_update_checksum is not
799 * called after this function, the EEPROM will most likely contain an
802 s32 ixgbe_write_eeprom_buffer(struct ixgbe_hw *hw, u16 offset, u16 words,
805 return ixgbe_call_func(hw, hw->eeprom.ops.write_buffer,
806 (hw, offset, words, data),
807 IXGBE_NOT_IMPLEMENTED);
811 * ixgbe_read_eeprom - Read word from EEPROM
812 * @hw: pointer to hardware structure
813 * @offset: offset within the EEPROM to be read
814 * @data: read 16 bit value from EEPROM
816 * Reads 16 bit value from EEPROM
818 s32 ixgbe_read_eeprom(struct ixgbe_hw *hw, u16 offset, u16 *data)
820 return ixgbe_call_func(hw, hw->eeprom.ops.read, (hw, offset, data),
821 IXGBE_NOT_IMPLEMENTED);
825 * ixgbe_read_eeprom_buffer - Read word(s) from EEPROM
826 * @hw: pointer to hardware structure
827 * @offset: offset within the EEPROM to be read
828 * @data: read 16 bit word(s) from EEPROM
829 * @words: number of words
831 * Reads 16 bit word(s) from EEPROM
833 s32 ixgbe_read_eeprom_buffer(struct ixgbe_hw *hw, u16 offset,
834 u16 words, u16 *data)
836 return ixgbe_call_func(hw, hw->eeprom.ops.read_buffer,
837 (hw, offset, words, data),
838 IXGBE_NOT_IMPLEMENTED);
842 * ixgbe_validate_eeprom_checksum - Validate EEPROM checksum
843 * @hw: pointer to hardware structure
844 * @checksum_val: calculated checksum
846 * Performs checksum calculation and validates the EEPROM checksum
848 s32 ixgbe_validate_eeprom_checksum(struct ixgbe_hw *hw, u16 *checksum_val)
850 return ixgbe_call_func(hw, hw->eeprom.ops.validate_checksum,
851 (hw, checksum_val), IXGBE_NOT_IMPLEMENTED);
855 * ixgbe_eeprom_update_checksum - Updates the EEPROM checksum
856 * @hw: pointer to hardware structure
858 s32 ixgbe_update_eeprom_checksum(struct ixgbe_hw *hw)
860 return ixgbe_call_func(hw, hw->eeprom.ops.update_checksum, (hw),
861 IXGBE_NOT_IMPLEMENTED);
865 * ixgbe_insert_mac_addr - Find a RAR for this mac address
866 * @hw: pointer to hardware structure
867 * @addr: Address to put into receive address register
868 * @vmdq: VMDq pool to assign
870 * Puts an ethernet address into a receive address register, or
871 * finds the rar that it is aleady in; adds to the pool list
873 s32 ixgbe_insert_mac_addr(struct ixgbe_hw *hw, u8 *addr, u32 vmdq)
875 return ixgbe_call_func(hw, hw->mac.ops.insert_mac_addr,
877 IXGBE_NOT_IMPLEMENTED);
881 * ixgbe_set_rar - Set Rx address register
882 * @hw: pointer to hardware structure
883 * @index: Receive address register to write
884 * @addr: Address to put into receive address register
886 * @enable_addr: set flag that address is active
888 * Puts an ethernet address into a receive address register.
890 s32 ixgbe_set_rar(struct ixgbe_hw *hw, u32 index, u8 *addr, u32 vmdq,
893 return ixgbe_call_func(hw, hw->mac.ops.set_rar, (hw, index, addr, vmdq,
894 enable_addr), IXGBE_NOT_IMPLEMENTED);
898 * ixgbe_clear_rar - Clear Rx address register
899 * @hw: pointer to hardware structure
900 * @index: Receive address register to write
902 * Puts an ethernet address into a receive address register.
904 s32 ixgbe_clear_rar(struct ixgbe_hw *hw, u32 index)
906 return ixgbe_call_func(hw, hw->mac.ops.clear_rar, (hw, index),
907 IXGBE_NOT_IMPLEMENTED);
911 * ixgbe_set_vmdq - Associate a VMDq index with a receive address
912 * @hw: pointer to hardware structure
913 * @rar: receive address register index to associate with VMDq index
914 * @vmdq: VMDq set or pool index
916 s32 ixgbe_set_vmdq(struct ixgbe_hw *hw, u32 rar, u32 vmdq)
918 return ixgbe_call_func(hw, hw->mac.ops.set_vmdq, (hw, rar, vmdq),
919 IXGBE_NOT_IMPLEMENTED);
924 * ixgbe_set_vmdq_san_mac - Associate VMDq index 127 with a receive address
925 * @hw: pointer to hardware structure
926 * @vmdq: VMDq default pool index
928 s32 ixgbe_set_vmdq_san_mac(struct ixgbe_hw *hw, u32 vmdq)
930 return ixgbe_call_func(hw, hw->mac.ops.set_vmdq_san_mac,
931 (hw, vmdq), IXGBE_NOT_IMPLEMENTED);
935 * ixgbe_clear_vmdq - Disassociate a VMDq index from a receive address
936 * @hw: pointer to hardware structure
937 * @rar: receive address register index to disassociate with VMDq index
938 * @vmdq: VMDq set or pool index
940 s32 ixgbe_clear_vmdq(struct ixgbe_hw *hw, u32 rar, u32 vmdq)
942 return ixgbe_call_func(hw, hw->mac.ops.clear_vmdq, (hw, rar, vmdq),
943 IXGBE_NOT_IMPLEMENTED);
947 * ixgbe_init_rx_addrs - Initializes receive address filters.
948 * @hw: pointer to hardware structure
950 * Places the MAC address in receive address register 0 and clears the rest
951 * of the receive address registers. Clears the multicast table. Assumes
952 * the receiver is in reset when the routine is called.
954 s32 ixgbe_init_rx_addrs(struct ixgbe_hw *hw)
956 return ixgbe_call_func(hw, hw->mac.ops.init_rx_addrs, (hw),
957 IXGBE_NOT_IMPLEMENTED);
961 * ixgbe_get_num_rx_addrs - Returns the number of RAR entries.
962 * @hw: pointer to hardware structure
964 u32 ixgbe_get_num_rx_addrs(struct ixgbe_hw *hw)
966 return hw->mac.num_rar_entries;
970 * ixgbe_update_uc_addr_list - Updates the MAC's list of secondary addresses
971 * @hw: pointer to hardware structure
972 * @addr_list: the list of new multicast addresses
973 * @addr_count: number of addresses
974 * @func: iterator function to walk the multicast address list
976 * The given list replaces any existing list. Clears the secondary addrs from
977 * receive address registers. Uses unused receive address registers for the
978 * first secondary addresses, and falls back to promiscuous mode as needed.
980 s32 ixgbe_update_uc_addr_list(struct ixgbe_hw *hw, u8 *addr_list,
981 u32 addr_count, ixgbe_mc_addr_itr func)
983 return ixgbe_call_func(hw, hw->mac.ops.update_uc_addr_list, (hw,
984 addr_list, addr_count, func),
985 IXGBE_NOT_IMPLEMENTED);
989 * ixgbe_update_mc_addr_list - Updates the MAC's list of multicast addresses
990 * @hw: pointer to hardware structure
991 * @mc_addr_list: the list of new multicast addresses
992 * @mc_addr_count: number of addresses
993 * @func: iterator function to walk the multicast address list
995 * The given list replaces any existing list. Clears the MC addrs from receive
996 * address registers and the multicast table. Uses unused receive address
997 * registers for the first multicast addresses, and hashes the rest into the
1000 s32 ixgbe_update_mc_addr_list(struct ixgbe_hw *hw, u8 *mc_addr_list,
1001 u32 mc_addr_count, ixgbe_mc_addr_itr func,
1004 return ixgbe_call_func(hw, hw->mac.ops.update_mc_addr_list, (hw,
1005 mc_addr_list, mc_addr_count, func, clear),
1006 IXGBE_NOT_IMPLEMENTED);
1010 * ixgbe_enable_mc - Enable multicast address in RAR
1011 * @hw: pointer to hardware structure
1013 * Enables multicast address in RAR and the use of the multicast hash table.
1015 s32 ixgbe_enable_mc(struct ixgbe_hw *hw)
1017 return ixgbe_call_func(hw, hw->mac.ops.enable_mc, (hw),
1018 IXGBE_NOT_IMPLEMENTED);
1022 * ixgbe_disable_mc - Disable multicast address in RAR
1023 * @hw: pointer to hardware structure
1025 * Disables multicast address in RAR and the use of the multicast hash table.
1027 s32 ixgbe_disable_mc(struct ixgbe_hw *hw)
1029 return ixgbe_call_func(hw, hw->mac.ops.disable_mc, (hw),
1030 IXGBE_NOT_IMPLEMENTED);
1034 * ixgbe_clear_vfta - Clear VLAN filter table
1035 * @hw: pointer to hardware structure
1037 * Clears the VLAN filer table, and the VMDq index associated with the filter
1039 s32 ixgbe_clear_vfta(struct ixgbe_hw *hw)
1041 return ixgbe_call_func(hw, hw->mac.ops.clear_vfta, (hw),
1042 IXGBE_NOT_IMPLEMENTED);
1046 * ixgbe_set_vfta - Set VLAN filter table
1047 * @hw: pointer to hardware structure
1048 * @vlan: VLAN id to write to VLAN filter
1049 * @vind: VMDq output index that maps queue to VLAN id in VFTA
1050 * @vlan_on: boolean flag to turn on/off VLAN in VFTA
1052 * Turn on/off specified VLAN in the VLAN filter table.
1054 s32 ixgbe_set_vfta(struct ixgbe_hw *hw, u32 vlan, u32 vind, bool vlan_on)
1056 return ixgbe_call_func(hw, hw->mac.ops.set_vfta, (hw, vlan, vind,
1057 vlan_on), IXGBE_NOT_IMPLEMENTED);
1061 * ixgbe_set_vlvf - Set VLAN Pool Filter
1062 * @hw: pointer to hardware structure
1063 * @vlan: VLAN id to write to VLAN filter
1064 * @vind: VMDq output index that maps queue to VLAN id in VFVFB
1065 * @vlan_on: boolean flag to turn on/off VLAN in VFVF
1066 * @vfta_changed: pointer to boolean flag which indicates whether VFTA
1069 * Turn on/off specified bit in VLVF table.
1071 s32 ixgbe_set_vlvf(struct ixgbe_hw *hw, u32 vlan, u32 vind, bool vlan_on,
1074 return ixgbe_call_func(hw, hw->mac.ops.set_vlvf, (hw, vlan, vind,
1075 vlan_on, vfta_changed), IXGBE_NOT_IMPLEMENTED);
1079 * ixgbe_fc_enable - Enable flow control
1080 * @hw: pointer to hardware structure
1082 * Configures the flow control settings based on SW configuration.
1084 s32 ixgbe_fc_enable(struct ixgbe_hw *hw)
1086 return ixgbe_call_func(hw, hw->mac.ops.fc_enable, (hw),
1087 IXGBE_NOT_IMPLEMENTED);
1091 * ixgbe_setup_fc - Set up flow control
1092 * @hw: pointer to hardware structure
1094 * Called at init time to set up flow control.
1096 s32 ixgbe_setup_fc(struct ixgbe_hw *hw)
1098 return ixgbe_call_func(hw, hw->mac.ops.setup_fc, (hw),
1099 IXGBE_NOT_IMPLEMENTED);
1103 * ixgbe_set_fw_drv_ver - Try to send the driver version number FW
1104 * @hw: pointer to hardware structure
1105 * @maj: driver major number to be sent to firmware
1106 * @min: driver minor number to be sent to firmware
1107 * @build: driver build number to be sent to firmware
1108 * @ver: driver version number to be sent to firmware
1110 s32 ixgbe_set_fw_drv_ver(struct ixgbe_hw *hw, u8 maj, u8 min, u8 build,
1113 return ixgbe_call_func(hw, hw->mac.ops.set_fw_drv_ver, (hw, maj, min,
1114 build, ver), IXGBE_NOT_IMPLEMENTED);
1120 * ixgbe_dmac_config - Configure DMA Coalescing registers.
1121 * @hw: pointer to hardware structure
1123 * Configure DMA coalescing. If enabling dmac, dmac is activated.
1124 * When disabling dmac, dmac enable dmac bit is cleared.
1126 s32 ixgbe_dmac_config(struct ixgbe_hw *hw)
1128 return ixgbe_call_func(hw, hw->mac.ops.dmac_config, (hw),
1129 IXGBE_NOT_IMPLEMENTED);
1133 * ixgbe_dmac_update_tcs - Configure DMA Coalescing registers.
1134 * @hw: pointer to hardware structure
1136 * Disables dmac, updates per TC settings, and then enable dmac.
1138 s32 ixgbe_dmac_update_tcs(struct ixgbe_hw *hw)
1140 return ixgbe_call_func(hw, hw->mac.ops.dmac_update_tcs, (hw),
1141 IXGBE_NOT_IMPLEMENTED);
1145 * ixgbe_dmac_config_tcs - Configure DMA Coalescing registers.
1146 * @hw: pointer to hardware structure
1148 * Configure DMA coalescing threshold per TC and set high priority bit for
1149 * FCOE TC. The dmac enable bit must be cleared before configuring.
1151 s32 ixgbe_dmac_config_tcs(struct ixgbe_hw *hw)
1153 return ixgbe_call_func(hw, hw->mac.ops.dmac_config_tcs, (hw),
1154 IXGBE_NOT_IMPLEMENTED);
1158 * ixgbe_setup_eee - Enable/disable EEE support
1159 * @hw: pointer to the HW structure
1160 * @enable_eee: boolean flag to enable EEE
1162 * Enable/disable EEE based on enable_ee flag.
1163 * Auto-negotiation must be started after BASE-T EEE bits in PHY register 7.3C
1167 s32 ixgbe_setup_eee(struct ixgbe_hw *hw, bool enable_eee)
1169 return ixgbe_call_func(hw, hw->mac.ops.setup_eee, (hw, enable_eee),
1170 IXGBE_NOT_IMPLEMENTED);
1174 * ixgbe_set_source_address_pruning - Enable/Disable source address pruning
1175 * @hw: pointer to hardware structure
1176 * @enbale: enable or disable source address pruning
1177 * @pool: Rx pool - Rx pool to toggle source address pruning
1179 void ixgbe_set_source_address_pruning(struct ixgbe_hw *hw, bool enable,
1182 if (hw->mac.ops.set_source_address_pruning)
1183 hw->mac.ops.set_source_address_pruning(hw, enable, pool);
1187 * ixgbe_set_ethertype_anti_spoofing - Enable/Disable Ethertype anti-spoofing
1188 * @hw: pointer to hardware structure
1189 * @enable: enable or disable switch for Ethertype anti-spoofing
1190 * @vf: Virtual Function pool - VF Pool to set for Ethertype anti-spoofing
1193 void ixgbe_set_ethertype_anti_spoofing(struct ixgbe_hw *hw, bool enable, int vf)
1195 if (hw->mac.ops.set_ethertype_anti_spoofing)
1196 hw->mac.ops.set_ethertype_anti_spoofing(hw, enable, vf);
1200 * ixgbe_read_iosf_sb_reg - Read 32 bit PHY register
1201 * @hw: pointer to hardware structure
1202 * @reg_addr: 32 bit address of PHY register to read
1203 * @device_type: type of device you want to communicate with
1204 * @phy_data: Pointer to read data from PHY register
1206 * Reads a value from a specified PHY register
1208 s32 ixgbe_read_iosf_sb_reg(struct ixgbe_hw *hw, u32 reg_addr,
1209 u32 device_type, u32 *phy_data)
1211 return ixgbe_call_func(hw, hw->mac.ops.read_iosf_sb_reg, (hw, reg_addr,
1212 device_type, phy_data), IXGBE_NOT_IMPLEMENTED);
1216 * ixgbe_write_iosf_sb_reg - Write 32 bit register through IOSF Sideband
1217 * @hw: pointer to hardware structure
1218 * @reg_addr: 32 bit PHY register to write
1219 * @device_type: type of device you want to communicate with
1220 * @phy_data: Data to write to the PHY register
1222 * Writes a value to specified PHY register
1224 s32 ixgbe_write_iosf_sb_reg(struct ixgbe_hw *hw, u32 reg_addr,
1225 u32 device_type, u32 phy_data)
1227 return ixgbe_call_func(hw, hw->mac.ops.write_iosf_sb_reg, (hw, reg_addr,
1228 device_type, phy_data), IXGBE_NOT_IMPLEMENTED);
1232 * ixgbe_disable_mdd - Disable malicious driver detection
1233 * @hw: pointer to hardware structure
1236 void ixgbe_disable_mdd(struct ixgbe_hw *hw)
1238 if (hw->mac.ops.disable_mdd)
1239 hw->mac.ops.disable_mdd(hw);
1243 * ixgbe_enable_mdd - Enable malicious driver detection
1244 * @hw: pointer to hardware structure
1247 void ixgbe_enable_mdd(struct ixgbe_hw *hw)
1249 if (hw->mac.ops.enable_mdd)
1250 hw->mac.ops.enable_mdd(hw);
1254 * ixgbe_mdd_event - Handle malicious driver detection event
1255 * @hw: pointer to hardware structure
1256 * @vf_bitmap: vf bitmap of malicious vfs
1259 void ixgbe_mdd_event(struct ixgbe_hw *hw, u32 *vf_bitmap)
1261 if (hw->mac.ops.mdd_event)
1262 hw->mac.ops.mdd_event(hw, vf_bitmap);
1266 * ixgbe_restore_mdd_vf - Restore VF that was disabled during malicious driver
1268 * @hw: pointer to hardware structure
1272 void ixgbe_restore_mdd_vf(struct ixgbe_hw *hw, u32 vf)
1274 if (hw->mac.ops.restore_mdd_vf)
1275 hw->mac.ops.restore_mdd_vf(hw, vf);
1279 * ixgbe_enter_lplu - Transition to low power states
1280 * @hw: pointer to hardware structure
1282 * Configures Low Power Link Up on transition to low power states
1283 * (from D0 to non-D0).
1285 s32 ixgbe_enter_lplu(struct ixgbe_hw *hw)
1287 return ixgbe_call_func(hw, hw->phy.ops.enter_lplu, (hw),
1288 IXGBE_NOT_IMPLEMENTED);
1292 * ixgbe_handle_lasi - Handle external Base T PHY interrupt
1293 * @hw: pointer to hardware structure
1295 * Handle external Base T PHY interrupt. If high temperature
1296 * failure alarm then return error, else if link status change
1297 * then setup internal/external PHY link
1299 * Return IXGBE_ERR_OVERTEMP if interrupt is high temperature
1300 * failure alarm, else return PHY access status.
1302 s32 ixgbe_handle_lasi(struct ixgbe_hw *hw)
1304 return ixgbe_call_func(hw, hw->phy.ops.handle_lasi, (hw),
1305 IXGBE_NOT_IMPLEMENTED);
1309 * ixgbe_read_analog_reg8 - Reads 8 bit analog register
1310 * @hw: pointer to hardware structure
1311 * @reg: analog register to read
1314 * Performs write operation to analog register specified.
1316 s32 ixgbe_read_analog_reg8(struct ixgbe_hw *hw, u32 reg, u8 *val)
1318 return ixgbe_call_func(hw, hw->mac.ops.read_analog_reg8, (hw, reg,
1319 val), IXGBE_NOT_IMPLEMENTED);
1323 * ixgbe_write_analog_reg8 - Writes 8 bit analog register
1324 * @hw: pointer to hardware structure
1325 * @reg: analog register to write
1326 * @val: value to write
1328 * Performs write operation to Atlas analog register specified.
1330 s32 ixgbe_write_analog_reg8(struct ixgbe_hw *hw, u32 reg, u8 val)
1332 return ixgbe_call_func(hw, hw->mac.ops.write_analog_reg8, (hw, reg,
1333 val), IXGBE_NOT_IMPLEMENTED);
1337 * ixgbe_init_uta_tables - Initializes Unicast Table Arrays.
1338 * @hw: pointer to hardware structure
1340 * Initializes the Unicast Table Arrays to zero on device load. This
1341 * is part of the Rx init addr execution path.
1343 s32 ixgbe_init_uta_tables(struct ixgbe_hw *hw)
1345 return ixgbe_call_func(hw, hw->mac.ops.init_uta_tables, (hw),
1346 IXGBE_NOT_IMPLEMENTED);
1350 * ixgbe_read_i2c_byte - Reads 8 bit word over I2C at specified device address
1351 * @hw: pointer to hardware structure
1352 * @byte_offset: byte offset to read
1353 * @dev_addr: I2C bus address to read from
1356 * Performs byte read operation to SFP module's EEPROM over I2C interface.
1358 s32 ixgbe_read_i2c_byte(struct ixgbe_hw *hw, u8 byte_offset, u8 dev_addr,
1361 return ixgbe_call_func(hw, hw->phy.ops.read_i2c_byte, (hw, byte_offset,
1362 dev_addr, data), IXGBE_NOT_IMPLEMENTED);
1366 * ixgbe_read_i2c_byte_unlocked - Reads 8 bit word via I2C from device address
1367 * @hw: pointer to hardware structure
1368 * @byte_offset: byte offset to read
1369 * @dev_addr: I2C bus address to read from
1372 * Performs byte read operation to SFP module's EEPROM over I2C interface.
1374 s32 ixgbe_read_i2c_byte_unlocked(struct ixgbe_hw *hw, u8 byte_offset,
1375 u8 dev_addr, u8 *data)
1377 return ixgbe_call_func(hw, hw->phy.ops.read_i2c_byte_unlocked,
1378 (hw, byte_offset, dev_addr, data),
1379 IXGBE_NOT_IMPLEMENTED);
1383 * ixgbe_read_i2c_combined - Perform I2C read combined operation
1384 * @hw: pointer to the hardware structure
1385 * @addr: I2C bus address to read from
1386 * @reg: I2C device register to read from
1387 * @val: pointer to location to receive read value
1389 * Returns an error code on error.
1391 s32 ixgbe_read_i2c_combined(struct ixgbe_hw *hw, u8 addr, u16 reg, u16 *val)
1393 return ixgbe_call_func(hw, hw->phy.ops.read_i2c_combined, (hw, addr,
1394 reg, val), IXGBE_NOT_IMPLEMENTED);
1398 * ixgbe_read_i2c_combined_unlocked - Perform I2C read combined operation
1399 * @hw: pointer to the hardware structure
1400 * @addr: I2C bus address to read from
1401 * @reg: I2C device register to read from
1402 * @val: pointer to location to receive read value
1404 * Returns an error code on error.
1406 s32 ixgbe_read_i2c_combined_unlocked(struct ixgbe_hw *hw, u8 addr, u16 reg,
1409 return ixgbe_call_func(hw, hw->phy.ops.read_i2c_combined_unlocked,
1410 (hw, addr, reg, val),
1411 IXGBE_NOT_IMPLEMENTED);
1415 * ixgbe_write_i2c_byte - Writes 8 bit word over I2C
1416 * @hw: pointer to hardware structure
1417 * @byte_offset: byte offset to write
1418 * @dev_addr: I2C bus address to write to
1419 * @data: value to write
1421 * Performs byte write operation to SFP module's EEPROM over I2C interface
1422 * at a specified device address.
1424 s32 ixgbe_write_i2c_byte(struct ixgbe_hw *hw, u8 byte_offset, u8 dev_addr,
1427 return ixgbe_call_func(hw, hw->phy.ops.write_i2c_byte, (hw, byte_offset,
1428 dev_addr, data), IXGBE_NOT_IMPLEMENTED);
1432 * ixgbe_write_i2c_byte_unlocked - Writes 8 bit word over I2C
1433 * @hw: pointer to hardware structure
1434 * @byte_offset: byte offset to write
1435 * @dev_addr: I2C bus address to write to
1436 * @data: value to write
1438 * Performs byte write operation to SFP module's EEPROM over I2C interface
1439 * at a specified device address.
1441 s32 ixgbe_write_i2c_byte_unlocked(struct ixgbe_hw *hw, u8 byte_offset,
1442 u8 dev_addr, u8 data)
1444 return ixgbe_call_func(hw, hw->phy.ops.write_i2c_byte_unlocked,
1445 (hw, byte_offset, dev_addr, data),
1446 IXGBE_NOT_IMPLEMENTED);
1450 * ixgbe_write_i2c_combined - Perform I2C write combined operation
1451 * @hw: pointer to the hardware structure
1452 * @addr: I2C bus address to write to
1453 * @reg: I2C device register to write to
1454 * @val: value to write
1456 * Returns an error code on error.
1458 s32 ixgbe_write_i2c_combined(struct ixgbe_hw *hw, u8 addr, u16 reg, u16 val)
1460 return ixgbe_call_func(hw, hw->phy.ops.write_i2c_combined, (hw, addr,
1461 reg, val), IXGBE_NOT_IMPLEMENTED);
1465 * ixgbe_write_i2c_combined_unlocked - Perform I2C write combined operation
1466 * @hw: pointer to the hardware structure
1467 * @addr: I2C bus address to write to
1468 * @reg: I2C device register to write to
1469 * @val: value to write
1471 * Returns an error code on error.
1473 s32 ixgbe_write_i2c_combined_unlocked(struct ixgbe_hw *hw, u8 addr, u16 reg,
1476 return ixgbe_call_func(hw, hw->phy.ops.write_i2c_combined_unlocked,
1477 (hw, addr, reg, val), IXGBE_NOT_IMPLEMENTED);
1481 * ixgbe_write_i2c_eeprom - Writes 8 bit EEPROM word over I2C interface
1482 * @hw: pointer to hardware structure
1483 * @byte_offset: EEPROM byte offset to write
1484 * @eeprom_data: value to write
1486 * Performs byte write operation to SFP module's EEPROM over I2C interface.
1488 s32 ixgbe_write_i2c_eeprom(struct ixgbe_hw *hw,
1489 u8 byte_offset, u8 eeprom_data)
1491 return ixgbe_call_func(hw, hw->phy.ops.write_i2c_eeprom,
1492 (hw, byte_offset, eeprom_data),
1493 IXGBE_NOT_IMPLEMENTED);
1497 * ixgbe_read_i2c_eeprom - Reads 8 bit EEPROM word over I2C interface
1498 * @hw: pointer to hardware structure
1499 * @byte_offset: EEPROM byte offset to read
1500 * @eeprom_data: value read
1502 * Performs byte read operation to SFP module's EEPROM over I2C interface.
1504 s32 ixgbe_read_i2c_eeprom(struct ixgbe_hw *hw, u8 byte_offset, u8 *eeprom_data)
1506 return ixgbe_call_func(hw, hw->phy.ops.read_i2c_eeprom,
1507 (hw, byte_offset, eeprom_data),
1508 IXGBE_NOT_IMPLEMENTED);
1512 * ixgbe_get_supported_physical_layer - Returns physical layer type
1513 * @hw: pointer to hardware structure
1515 * Determines physical layer capabilities of the current configuration.
1517 u32 ixgbe_get_supported_physical_layer(struct ixgbe_hw *hw)
1519 return ixgbe_call_func(hw, hw->mac.ops.get_supported_physical_layer,
1520 (hw), IXGBE_PHYSICAL_LAYER_UNKNOWN);
1524 * ixgbe_enable_rx_dma - Enables Rx DMA unit, dependent on device specifics
1525 * @hw: pointer to hardware structure
1526 * @regval: bitfield to write to the Rx DMA register
1528 * Enables the Rx DMA unit of the device.
1530 s32 ixgbe_enable_rx_dma(struct ixgbe_hw *hw, u32 regval)
1532 return ixgbe_call_func(hw, hw->mac.ops.enable_rx_dma,
1533 (hw, regval), IXGBE_NOT_IMPLEMENTED);
1537 * ixgbe_disable_sec_rx_path - Stops the receive data path
1538 * @hw: pointer to hardware structure
1540 * Stops the receive data path.
1542 s32 ixgbe_disable_sec_rx_path(struct ixgbe_hw *hw)
1544 return ixgbe_call_func(hw, hw->mac.ops.disable_sec_rx_path,
1545 (hw), IXGBE_NOT_IMPLEMENTED);
1549 * ixgbe_enable_sec_rx_path - Enables the receive data path
1550 * @hw: pointer to hardware structure
1552 * Enables the receive data path.
1554 s32 ixgbe_enable_sec_rx_path(struct ixgbe_hw *hw)
1556 return ixgbe_call_func(hw, hw->mac.ops.enable_sec_rx_path,
1557 (hw), IXGBE_NOT_IMPLEMENTED);
1561 * ixgbe_acquire_swfw_semaphore - Acquire SWFW semaphore
1562 * @hw: pointer to hardware structure
1563 * @mask: Mask to specify which semaphore to acquire
1565 * Acquires the SWFW semaphore through SW_FW_SYNC register for the specified
1566 * function (CSR, PHY0, PHY1, EEPROM, Flash)
1568 s32 ixgbe_acquire_swfw_semaphore(struct ixgbe_hw *hw, u32 mask)
1570 return ixgbe_call_func(hw, hw->mac.ops.acquire_swfw_sync,
1571 (hw, mask), IXGBE_NOT_IMPLEMENTED);
1575 * ixgbe_release_swfw_semaphore - Release SWFW semaphore
1576 * @hw: pointer to hardware structure
1577 * @mask: Mask to specify which semaphore to release
1579 * Releases the SWFW semaphore through SW_FW_SYNC register for the specified
1580 * function (CSR, PHY0, PHY1, EEPROM, Flash)
1582 void ixgbe_release_swfw_semaphore(struct ixgbe_hw *hw, u32 mask)
1584 if (hw->mac.ops.release_swfw_sync)
1585 hw->mac.ops.release_swfw_sync(hw, mask);
1589 void ixgbe_disable_rx(struct ixgbe_hw *hw)
1591 if (hw->mac.ops.disable_rx)
1592 hw->mac.ops.disable_rx(hw);
1595 void ixgbe_enable_rx(struct ixgbe_hw *hw)
1597 if (hw->mac.ops.enable_rx)
1598 hw->mac.ops.enable_rx(hw);
1602 * ixgbe_set_rate_select_speed - Set module link speed
1603 * @hw: pointer to hardware structure
1604 * @speed: link speed to set
1606 * Set module link speed via the rate select.
1608 void ixgbe_set_rate_select_speed(struct ixgbe_hw *hw, ixgbe_link_speed speed)
1610 if (hw->mac.ops.set_rate_select_speed)
1611 hw->mac.ops.set_rate_select_speed(hw, speed);